Merge pull request #1939 from nilfit/spim-anomaly-109
spim: Fix nRF52832 SPIM with polling executors
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commit
1e80fd81f7
@ -51,7 +51,7 @@ nrf52805 = ["nrf52805-pac", "_nrf52"]
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nrf52810 = ["nrf52810-pac", "_nrf52"]
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nrf52811 = ["nrf52811-pac", "_nrf52"]
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nrf52820 = ["nrf52820-pac", "_nrf52"]
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nrf52832 = ["nrf52832-pac", "_nrf52"]
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nrf52832 = ["nrf52832-pac", "_nrf52", "_nrf52832_anomaly_109"]
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nrf52833 = ["nrf52833-pac", "_nrf52", "_gpio-p1"]
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nrf52840 = ["nrf52840-pac", "_nrf52", "_gpio-p1"]
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nrf5340-app-s = ["_nrf5340-app", "_s"]
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@ -90,6 +90,9 @@ _ppi = []
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_dppi = []
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_gpio-p1 = []
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# Errata workarounds
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_nrf52832_anomaly_109 = []
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[dependencies]
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embassy-time = { version = "0.1.3", path = "../embassy-time", optional = true }
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embassy-sync = { version = "0.3.0", path = "../embassy-sync" }
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@ -68,30 +68,14 @@ impl<T: Instance> interrupt::typelevel::Handler<T::Interrupt> for InterruptHandl
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let r = T::regs();
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let s = T::state();
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#[cfg(feature = "nrf52832")]
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// NRF32 Anomaly 109 workaround... NRF52832
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if r.intenset.read().started().is_enabled() && r.events_started.read().bits() != 0 {
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// Handle the first "fake" transmission
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r.events_started.reset();
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r.events_end.reset();
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// Update DMA registers with correct rx/tx buffer sizes
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r.rxd
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.maxcnt
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.write(|w| unsafe { w.maxcnt().bits(s.rx.load(Ordering::Relaxed)) });
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r.txd
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.maxcnt
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.write(|w| unsafe { w.maxcnt().bits(s.tx.load(Ordering::Relaxed)) });
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// Disable interrupt for STARTED event...
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#[cfg(feature = "_nrf52832_anomaly_109")]
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if r.events_started.read().bits() != 0 {
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s.waker.wake();
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r.intenclr.write(|w| w.started().clear());
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// ... and start actual, hopefully glitch-free transmission
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r.tasks_start.write(|w| unsafe { w.bits(1) });
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return;
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}
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if r.events_end.read().bits() != 0 {
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s.end_waker.wake();
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s.waker.wake();
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r.intenclr.write(|w| w.end().clear());
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}
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}
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@ -222,8 +206,7 @@ impl<'d, T: Instance> Spim<'d, T> {
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r.rxd.ptr.write(|w| unsafe { w.ptr().bits(ptr as _) });
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r.rxd.maxcnt.write(|w| unsafe { w.maxcnt().bits(rx_len as _) });
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// ANOMALY 109 workaround
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#[cfg(feature = "nrf52832")]
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#[cfg(feature = "_nrf52832_anomaly_109")]
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{
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let s = T::state();
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@ -254,6 +237,9 @@ impl<'d, T: Instance> Spim<'d, T> {
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fn blocking_inner_from_ram(&mut self, rx: *mut [u8], tx: *const [u8]) -> Result<(), Error> {
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self.prepare(rx, tx)?;
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#[cfg(feature = "_nrf52832_anomaly_109")]
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while let Poll::Pending = self.nrf52832_dma_workaround_status() {}
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// Wait for 'end' event.
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while T::regs().events_end.read().bits() == 0 {}
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@ -278,9 +264,19 @@ impl<'d, T: Instance> Spim<'d, T> {
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async fn async_inner_from_ram(&mut self, rx: *mut [u8], tx: *const [u8]) -> Result<(), Error> {
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self.prepare(rx, tx)?;
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#[cfg(feature = "_nrf52832_anomaly_109")]
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poll_fn(|cx| {
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let s = T::state();
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s.waker.register(cx.waker());
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self.nrf52832_dma_workaround_status()
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})
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.await;
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// Wait for 'end' event.
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poll_fn(|cx| {
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T::state().end_waker.register(cx.waker());
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T::state().waker.register(cx.waker());
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if T::regs().events_end.read().bits() != 0 {
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return Poll::Ready(());
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}
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@ -371,6 +367,32 @@ impl<'d, T: Instance> Spim<'d, T> {
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pub async fn write_from_ram(&mut self, data: &[u8]) -> Result<(), Error> {
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self.async_inner_from_ram(&mut [], data).await
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}
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#[cfg(feature = "_nrf52832_anomaly_109")]
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fn nrf52832_dma_workaround_status(&mut self) -> Poll<()> {
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let r = T::regs();
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if r.events_started.read().bits() != 0 {
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let s = T::state();
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// Handle the first "fake" transmission
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r.events_started.reset();
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r.events_end.reset();
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// Update DMA registers with correct rx/tx buffer sizes
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r.rxd
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.maxcnt
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.write(|w| unsafe { w.maxcnt().bits(s.rx.load(Ordering::Relaxed)) });
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r.txd
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.maxcnt
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.write(|w| unsafe { w.maxcnt().bits(s.tx.load(Ordering::Relaxed)) });
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r.intenset.write(|w| w.end().set());
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// ... and start actual, hopefully glitch-free transmission
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r.tasks_start.write(|w| unsafe { w.bits(1) });
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return Poll::Ready(());
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}
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Poll::Pending
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}
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}
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impl<'d, T: Instance> Drop for Spim<'d, T> {
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@ -395,7 +417,7 @@ impl<'d, T: Instance> Drop for Spim<'d, T> {
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}
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pub(crate) mod sealed {
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#[cfg(feature = "nrf52832")]
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#[cfg(feature = "_nrf52832_anomaly_109")]
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use core::sync::atomic::AtomicU8;
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use embassy_sync::waitqueue::AtomicWaker;
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@ -403,20 +425,20 @@ pub(crate) mod sealed {
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use super::*;
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pub struct State {
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pub end_waker: AtomicWaker,
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#[cfg(feature = "nrf52832")]
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pub waker: AtomicWaker,
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#[cfg(feature = "_nrf52832_anomaly_109")]
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pub rx: AtomicU8,
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#[cfg(feature = "nrf52832")]
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#[cfg(feature = "_nrf52832_anomaly_109")]
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pub tx: AtomicU8,
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}
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impl State {
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pub const fn new() -> Self {
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Self {
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end_waker: AtomicWaker::new(),
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#[cfg(feature = "nrf52832")]
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waker: AtomicWaker::new(),
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#[cfg(feature = "_nrf52832_anomaly_109")]
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rx: AtomicU8::new(0),
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#[cfg(feature = "nrf52832")]
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#[cfg(feature = "_nrf52832_anomaly_109")]
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tx: AtomicU8::new(0),
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}
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}
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