stm32: document hrtim, qspi, sdmmc, spi.
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@ -54,6 +54,7 @@ const SD_INIT_FREQ: Hertz = Hertz(400_000);
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/// The signalling scheme used on the SDMMC bus
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#[non_exhaustive]
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#[allow(missing_docs)]
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#[derive(Debug, Copy, Clone, PartialEq, Eq)]
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#[cfg_attr(feature = "defmt", derive(defmt::Format))]
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pub enum Signalling {
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@ -70,6 +71,9 @@ impl Default for Signalling {
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}
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}
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/// Aligned data block for SDMMC transfers.
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///
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/// This is a 512-byte array, aligned to 4 bytes to satisfy DMA requirements.
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#[repr(align(4))]
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#[derive(Debug, Clone, PartialEq, Eq)]
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#[cfg_attr(feature = "defmt", derive(defmt::Format))]
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@ -94,17 +98,23 @@ impl DerefMut for DataBlock {
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#[derive(Debug, Copy, Clone, PartialEq, Eq)]
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#[cfg_attr(feature = "defmt", derive(defmt::Format))]
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pub enum Error {
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/// Timeout reported by the hardware
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Timeout,
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/// Timeout reported by the software driver.
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SoftwareTimeout,
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/// Unsupported card version.
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UnsupportedCardVersion,
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/// Unsupported card type.
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UnsupportedCardType,
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/// CRC error.
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Crc,
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DataCrcFail,
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RxOverFlow,
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/// No card inserted.
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NoCard,
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/// Bad clock supplied to the SDMMC peripheral.
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BadClock,
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/// Signaling switch failed.
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SignalingSwitchFailed,
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PeripheralBusy,
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/// ST bit error.
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#[cfg(sdmmc_v1)]
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StBitErr,
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}
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@ -363,6 +373,7 @@ impl<'d, T: Instance, Dma: SdmmcDma<T>> Sdmmc<'d, T, Dma> {
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#[cfg(sdmmc_v2)]
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impl<'d, T: Instance> Sdmmc<'d, T, NoDma> {
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/// Create a new SDMMC driver, with 1 data lane.
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pub fn new_1bit(
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sdmmc: impl Peripheral<P = T> + 'd,
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_irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd,
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@ -396,6 +407,7 @@ impl<'d, T: Instance> Sdmmc<'d, T, NoDma> {
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)
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}
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/// Create a new SDMMC driver, with 4 data lanes.
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pub fn new_4bit(
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sdmmc: impl Peripheral<P = T> + 'd,
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_irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd,
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@ -497,7 +509,7 @@ impl<'d, T: Instance, Dma: SdmmcDma<T> + 'd> Sdmmc<'d, T, Dma> {
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}
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/// Data transfer is in progress
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#[inline(always)]
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#[inline]
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fn data_active() -> bool {
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let regs = T::regs();
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@ -509,7 +521,7 @@ impl<'d, T: Instance, Dma: SdmmcDma<T> + 'd> Sdmmc<'d, T, Dma> {
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}
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/// Coammand transfer is in progress
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#[inline(always)]
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#[inline]
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fn cmd_active() -> bool {
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let regs = T::regs();
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@ -521,7 +533,7 @@ impl<'d, T: Instance, Dma: SdmmcDma<T> + 'd> Sdmmc<'d, T, Dma> {
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}
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/// Wait idle on CMDACT, RXACT and TXACT (v1) or DOSNACT and CPSMACT (v2)
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#[inline(always)]
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#[inline]
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fn wait_idle() {
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while Self::data_active() || Self::cmd_active() {}
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}
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@ -837,7 +849,7 @@ impl<'d, T: Instance, Dma: SdmmcDma<T> + 'd> Sdmmc<'d, T, Dma> {
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}
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/// Clear flags in interrupt clear register
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#[inline(always)]
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#[inline]
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fn clear_interrupt_flags() {
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let regs = T::regs();
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regs.icr().write(|w| {
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@ -1152,7 +1164,8 @@ impl<'d, T: Instance, Dma: SdmmcDma<T> + 'd> Sdmmc<'d, T, Dma> {
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Ok(())
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}
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#[inline(always)]
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/// Read a data block.
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#[inline]
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pub async fn read_block(&mut self, block_idx: u32, buffer: &mut DataBlock) -> Result<(), Error> {
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let card_capacity = self.card()?.card_type;
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@ -1204,6 +1217,7 @@ impl<'d, T: Instance, Dma: SdmmcDma<T> + 'd> Sdmmc<'d, T, Dma> {
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res
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}
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/// Write a data block.
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pub async fn write_block(&mut self, block_idx: u32, buffer: &DataBlock) -> Result<(), Error> {
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let card = self.card.as_mut().ok_or(Error::NoCard)?;
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@ -1283,7 +1297,7 @@ impl<'d, T: Instance, Dma: SdmmcDma<T> + 'd> Sdmmc<'d, T, Dma> {
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///
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/// Returns Error::NoCard if [`init_card`](#method.init_card)
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/// has not previously succeeded
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#[inline(always)]
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#[inline]
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pub fn card(&self) -> Result<&Card, Error> {
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self.card.as_ref().ok_or(Error::NoCard)
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}
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@ -1419,7 +1433,9 @@ pub(crate) mod sealed {
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pub trait Pins<T: Instance> {}
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}
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/// SDMMC instance trait.
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pub trait Instance: sealed::Instance + RccPeripheral + 'static {}
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pin_trait!(CkPin, Instance);
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pin_trait!(CmdPin, Instance);
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pin_trait!(D0Pin, Instance);
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@ -1434,7 +1450,10 @@ pin_trait!(D7Pin, Instance);
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#[cfg(sdmmc_v1)]
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dma_trait!(SdmmcDma, Instance);
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// SDMMCv2 uses internal DMA
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/// DMA instance trait.
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///
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/// This is only implemented for `NoDma`, since SDMMCv2 has DMA built-in, instead of
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/// using ST's system-wide DMA peripheral.
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#[cfg(sdmmc_v2)]
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pub trait SdmmcDma<T: Instance> {}
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#[cfg(sdmmc_v2)]
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