Checkpoint.

This commit is contained in:
Bob McWhirter 2021-05-06 09:20:09 -04:00
parent 386e4bf0de
commit 1eb70a7e5d
4 changed files with 33 additions and 24 deletions

View File

@ -1,5 +1,8 @@
[target.'cfg(all(target_arch = "arm", target_os = "none"))'] [target.'cfg(all(target_arch = "arm", target_os = "none"))']
runner = "probe-run --chip STM32F401CCUx" #runner = "probe-run --chip STM32F401CCUx"
#runner = "probe-run --chip STM32L4S5VITx"
#runner = "probe-run --chip ${PROBE_RUN_CHIP}"
runner = "probe-run"
rustflags = [ rustflags = [
# LLD (shipped with the Rust toolchain) is used as the default linker # LLD (shipped with the Rust toolchain) is used as the default linker
@ -25,4 +28,5 @@ rustflags = [
] ]
[build] [build]
target = "thumbv7em-none-eabihf" #target = "thumbv7em-none-eabihf"
target = "thumbv7em-none-eabi"

View File

@ -18,9 +18,11 @@ defmt-error = []
[dependencies] [dependencies]
embassy = { version = "0.1.0", path = "../embassy", features = ["defmt", "defmt-trace"] } embassy = { version = "0.1.0", path = "../embassy", features = ["defmt", "defmt-trace"] }
embassy-traits = { version = "0.1.0", path = "../embassy-traits", features = ["defmt"] } embassy-traits = { version = "0.1.0", path = "../embassy-traits", features = ["defmt"] }
embassy-stm32 = { version = "0.1.0", path = "../embassy-stm32", features = ["defmt", "defmt-trace", "stm32f429zi"] } #embassy-stm32 = { version = "0.1.0", path = "../embassy-stm32", features = ["defmt", "defmt-trace", "stm32f429zi"] }
embassy-stm32 = { version = "0.1.0", path = "../embassy-stm32", features = ["defmt", "defmt-trace", "stm32l4s5vi"] }
embassy-extras = {version = "0.1.0", path = "../embassy-extras" } embassy-extras = {version = "0.1.0", path = "../embassy-extras" }
stm32f4 = { version = "0.13", features = ["stm32f429"] } #stm32f4 = { version = "0.13", features = ["stm32f429"] }
stm32l4 = { version = "0.13", features = ["stm32l4x5" ] }
defmt = "0.2.0" defmt = "0.2.0"
defmt-rtt = "0.2.0" defmt-rtt = "0.2.0"

View File

@ -12,7 +12,8 @@ use embedded_hal::digital::v2::OutputPin;
use example_common::*; use example_common::*;
use cortex_m_rt::entry; use cortex_m_rt::entry;
use stm32f4::stm32f429 as pac; //use stm32f4::stm32f429 as pac;
use stm32l4::stm32l4x5 as pac;
#[entry] #[entry]
fn main() -> ! { fn main() -> ! {
@ -25,21 +26,21 @@ fn main() -> ! {
w.dbg_standby().set_bit(); w.dbg_standby().set_bit();
w.dbg_stop().set_bit() w.dbg_stop().set_bit()
}); });
pp.RCC.ahb1enr.modify(|_, w| w.dma1en().enabled()); pp.RCC.ahb1enr.modify(|_, w| w.dma1en().set_bit());
pp.RCC.ahb1enr.modify(|_, w| { pp.RCC.ahb2enr.modify(|_, w| {
w.gpioaen().enabled(); w.gpioaen().set_bit();
w.gpioben().enabled(); w.gpioben().set_bit();
w.gpiocen().enabled(); w.gpiocen().set_bit();
w.gpioden().enabled(); w.gpioden().set_bit();
w.gpioeen().enabled(); w.gpioeen().set_bit();
w.gpiofen().enabled(); w.gpiofen().set_bit();
w w
}); });
let p = embassy_stm32::init(Default::default()); let p = embassy_stm32::init(Default::default());
let mut led = Output::new(p.PB7, Level::High); let mut led = Output::new(p.PA5, Level::High);
loop { loop {
info!("high"); info!("high");

View File

@ -16,7 +16,8 @@ use embassy_traits::gpio::{WaitForFallingEdge, WaitForRisingEdge};
use example_common::*; use example_common::*;
use cortex_m_rt::entry; use cortex_m_rt::entry;
use stm32f4::stm32f429 as pac; //use stm32f4::stm32f429 as pac;
use stm32l4::stm32l4x5 as pac;
#[embassy::task] #[embassy::task]
async fn main_task() { async fn main_task() {
@ -56,19 +57,20 @@ fn main() -> ! {
w.dbg_standby().set_bit(); w.dbg_standby().set_bit();
w.dbg_stop().set_bit() w.dbg_stop().set_bit()
}); });
pp.RCC.ahb1enr.modify(|_, w| w.dma1en().enabled());
pp.RCC.ahb1enr.modify(|_, w| { pp.RCC.ahb1enr.modify(|_, w| w.dma1en().set_bit());
w.gpioaen().enabled();
w.gpioben().enabled(); pp.RCC.ahb2enr.modify(|_, w| {
w.gpiocen().enabled(); w.gpioaen().set_bit();
w.gpioden().enabled(); w.gpioben().set_bit();
w.gpioeen().enabled(); w.gpiocen().set_bit();
w.gpiofen().enabled(); w.gpioden().set_bit();
w.gpioeen().set_bit();
w.gpiofen().set_bit();
w w
}); });
pp.RCC.apb2enr.modify(|_, w| { pp.RCC.apb2enr.modify(|_, w| {
w.syscfgen().enabled(); w.syscfgen().set_bit();
w w
}); });