Use RccPeripheral for DAC and add a hackfix for H7
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@ -1,9 +1,9 @@
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#![macro_use]
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#![macro_use]
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use cfg_if::cfg_if;
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use embassy_hal_common::{into_ref, PeripheralRef};
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use embassy_hal_common::{into_ref, PeripheralRef};
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use crate::pac::dac;
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use crate::pac::dac;
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use crate::rcc::RccPeripheral;
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use crate::{peripherals, Peripheral};
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use crate::{peripherals, Peripheral};
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#[derive(Debug, Copy, Clone, Eq, PartialEq)]
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#[derive(Debug, Copy, Clone, Eq, PartialEq)]
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@ -102,14 +102,6 @@ pub struct Dac<'d, T: Instance> {
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_peri: PeripheralRef<'d, T>,
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_peri: PeripheralRef<'d, T>,
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}
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}
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macro_rules! enable {
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($enable_reg:ident, $enable_field:ident, $reset_reg:ident, $reset_field:ident) => {
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crate::pac::RCC.$enable_reg().modify(|w| w.$enable_field(true));
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crate::pac::RCC.$reset_reg().modify(|w| w.$reset_field(true));
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crate::pac::RCC.$reset_reg().modify(|w| w.$reset_field(false));
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};
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}
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impl<'d, T: Instance> Dac<'d, T> {
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impl<'d, T: Instance> Dac<'d, T> {
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pub fn new_1ch(peri: impl Peripheral<P = T> + 'd, _ch1: impl Peripheral<P = impl DacPin<T, 1>> + 'd) -> Self {
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pub fn new_1ch(peri: impl Peripheral<P = T> + 'd, _ch1: impl Peripheral<P = impl DacPin<T, 1>> + 'd) -> Self {
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into_ref!(peri);
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into_ref!(peri);
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@ -126,27 +118,10 @@ impl<'d, T: Instance> Dac<'d, T> {
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}
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}
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fn new_inner(peri: PeripheralRef<'d, T>, channels: u8) -> Self {
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fn new_inner(peri: PeripheralRef<'d, T>, channels: u8) -> Self {
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unsafe {
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T::enable();
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// Sadly we cannot use `RccPeripheral::enable` since devices are quite inconsistent DAC clock
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T::reset();
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// configuration.
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critical_section::with(|_| {
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cfg_if! {
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if #[cfg(rcc_f1)] {
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enable!(apb1enr, set_dacen, apb1rstr, set_dacrst);
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} else if #[cfg(rcc_h7)] {
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enable!(apb1lenr, set_dac12en, apb1lrstr, set_dac12rst);
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} else if #[cfg(rcc_h7ab)] {
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enable!(apb1lenr, set_dac1en, apb1lrstr, set_dac1rst);
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} else if #[cfg(stm32g0)] {
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enable!(apbenr1, set_dac1en, apbrstr1, set_dac1rst);
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} else if #[cfg(any(stm32l4, stm32l5))] {
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enable!(apb1enr1, set_dac1en, apb1rstr1, set_dac1rst);
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} else {
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unimplemented!("DAC enable/reset is not yet implemented for this chip");
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}
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}
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});
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unsafe {
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T::regs().cr().modify(|reg| {
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T::regs().cr().modify(|reg| {
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for ch in 0..channels {
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for ch in 0..channels {
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reg.set_en(ch as usize, true);
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reg.set_en(ch as usize, true);
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@ -248,12 +223,44 @@ pub(crate) mod sealed {
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}
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}
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}
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}
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pub trait Instance: sealed::Instance + 'static {}
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pub trait Instance: sealed::Instance + RccPeripheral + 'static {}
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pub trait DacPin<T: Instance, const C: u8>: crate::gpio::Pin + 'static {}
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pub trait DacPin<T: Instance, const C: u8>: crate::gpio::Pin + 'static {}
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foreach_peripheral!(
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foreach_peripheral!(
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(dac, $inst:ident) => {
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(dac, $inst:ident) => {
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// H7 uses single bit for both DAC1 and DAC2, this is a hack until a proper fix is implemented
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#[cfg(rcc_h7)]
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impl crate::rcc::sealed::RccPeripheral for peripherals::$inst {
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fn frequency() -> crate::time::Hertz {
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critical_section::with(|_| unsafe {
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crate::rcc::get_freqs().apb1
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})
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}
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fn reset() {
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critical_section::with(|_| unsafe {
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crate::pac::RCC.apb1lrstr().modify(|w| w.set_dac12rst(true));
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crate::pac::RCC.apb1lrstr().modify(|w| w.set_dac12rst(false));
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})
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}
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fn enable() {
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critical_section::with(|_| unsafe {
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crate::pac::RCC.apb1lenr().modify(|w| w.set_dac12en(true));
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})
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}
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fn disable() {
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critical_section::with(|_| unsafe {
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crate::pac::RCC.apb1lenr().modify(|w| w.set_dac12en(false));
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})
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}
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}
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#[cfg(rcc_h7)]
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impl crate::rcc::RccPeripheral for peripherals::$inst {}
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impl crate::dac::sealed::Instance for peripherals::$inst {
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impl crate::dac::sealed::Instance for peripherals::$inst {
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fn regs() -> &'static crate::pac::dac::Dac {
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fn regs() -> &'static crate::pac::dac::Dac {
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&crate::pac::$inst
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&crate::pac::$inst
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