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Enable clock for SPI v1 and v3

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This commit is contained in:
Ulf Lilleengen 2021-06-08 11:04:44 +02:00
parent a57482fddd
commit 212bda0940
2 changed files with 20 additions and 14 deletions
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17
embassy-stm32/src/spi/v1.rs
View File

@ -2,6 +2,7 @@
use crate::gpio::{sealed::Pin, AnyPin}; use crate::gpio::{sealed::Pin, AnyPin};
use crate::pac::spi; use crate::pac::spi;
use crate::rcc::RccPeripheral;
use crate::spi::{ByteOrder, Config, Error, Instance, MisoPin, MosiPin, SckPin, WordSize}; use crate::spi::{ByteOrder, Config, Error, Instance, MisoPin, MosiPin, SckPin, WordSize};
use crate::time::Hertz; use crate::time::Hertz;
use core::marker::PhantomData; use core::marker::PhantomData;
@ -19,7 +20,7 @@ impl WordSize {
} }
} }
pub struct Spi<'d, T: Instance> { pub struct Spi<'d, T: Instance + RccPeripheral> {
sck: AnyPin, sck: AnyPin,
mosi: AnyPin, mosi: AnyPin,
miso: AnyPin, miso: AnyPin,
@ -27,7 +28,7 @@ pub struct Spi<'d, T: Instance> {
phantom: PhantomData<&'d mut T>, phantom: PhantomData<&'d mut T>,
} }
impl<'d, T: Instance> Spi<'d, T> { impl<'d, T: Instance + RccPeripheral> Spi<'d, T> {
pub fn new<F>( pub fn new<F>(
pclk: Hertz, pclk: Hertz,
_peri: impl Unborrow<Target = T> + 'd, _peri: impl Unborrow<Target = T> + 'd,
@ -61,6 +62,8 @@ impl<'d, T: Instance> Spi<'d, T> {
let br = Self::compute_baud_rate(pclk, freq.into()); let br = Self::compute_baud_rate(pclk, freq.into());
unsafe { unsafe {
T::enable();
T::reset();
T::regs().cr1().modify(|w| { T::regs().cr1().modify(|w| {
w.set_cpha( w.set_cpha(
match config.mode.phase == Phase::CaptureOnSecondTransition { match config.mode.phase == Phase::CaptureOnSecondTransition {
@ -128,7 +131,7 @@ impl<'d, T: Instance> Spi<'d, T> {
} }
} }
impl<'d, T: Instance> Drop for Spi<'d, T> { impl<'d, T: Instance + RccPeripheral> Drop for Spi<'d, T> {
fn drop(&mut self) { fn drop(&mut self) {
unsafe { unsafe {
self.sck.set_as_analog(); self.sck.set_as_analog();
@ -138,7 +141,7 @@ impl<'d, T: Instance> Drop for Spi<'d, T> {
} }
} }
impl<'d, T: Instance> embedded_hal::blocking::spi::Write<u8> for Spi<'d, T> { impl<'d, T: Instance + RccPeripheral> embedded_hal::blocking::spi::Write<u8> for Spi<'d, T> {
type Error = Error; type Error = Error;
fn write(&mut self, words: &[u8]) -> Result<(), Self::Error> { fn write(&mut self, words: &[u8]) -> Result<(), Self::Error> {
@ -174,7 +177,7 @@ impl<'d, T: Instance> embedded_hal::blocking::spi::Write<u8> for Spi<'d, T> {
} }
} }
impl<'d, T: Instance> embedded_hal::blocking::spi::Transfer<u8> for Spi<'d, T> { impl<'d, T: Instance + RccPeripheral> embedded_hal::blocking::spi::Transfer<u8> for Spi<'d, T> {
type Error = Error; type Error = Error;
fn transfer<'w>(&mut self, words: &'w mut [u8]) -> Result<&'w [u8], Self::Error> { fn transfer<'w>(&mut self, words: &'w mut [u8]) -> Result<&'w [u8], Self::Error> {
@ -215,7 +218,7 @@ impl<'d, T: Instance> embedded_hal::blocking::spi::Transfer<u8> for Spi<'d, T> {
} }
} }
impl<'d, T: Instance> embedded_hal::blocking::spi::Write<u16> for Spi<'d, T> { impl<'d, T: Instance + RccPeripheral> embedded_hal::blocking::spi::Write<u16> for Spi<'d, T> {
type Error = Error; type Error = Error;
fn write(&mut self, words: &[u16]) -> Result<(), Self::Error> { fn write(&mut self, words: &[u16]) -> Result<(), Self::Error> {
@ -251,7 +254,7 @@ impl<'d, T: Instance> embedded_hal::blocking::spi::Write<u16> for Spi<'d, T> {
} }
} }
impl<'d, T: Instance> embedded_hal::blocking::spi::Transfer<u16> for Spi<'d, T> { impl<'d, T: Instance + RccPeripheral> embedded_hal::blocking::spi::Transfer<u16> for Spi<'d, T> {
type Error = Error; type Error = Error;
fn transfer<'w>(&mut self, words: &'w mut [u16]) -> Result<&'w [u16], Self::Error> { fn transfer<'w>(&mut self, words: &'w mut [u16]) -> Result<&'w [u16], Self::Error> {

17
embassy-stm32/src/spi/v3.rs
View File

@ -4,6 +4,7 @@ use crate::gpio::{AnyPin, Pin};
use crate::pac::gpio::vals::{Afr, Moder}; use crate::pac::gpio::vals::{Afr, Moder};
use crate::pac::gpio::Gpio; use crate::pac::gpio::Gpio;
use crate::pac::spi; use crate::pac::spi;
use crate::rcc::RccPeripheral;
use crate::spi::{ByteOrder, Config, Error, Instance, MisoPin, MosiPin, SckPin, WordSize}; use crate::spi::{ByteOrder, Config, Error, Instance, MisoPin, MosiPin, SckPin, WordSize};
use crate::time::Hertz; use crate::time::Hertz;
use core::marker::PhantomData; use core::marker::PhantomData;
@ -28,14 +29,14 @@ impl WordSize {
} }
} }
pub struct Spi<'d, T: Instance> { pub struct Spi<'d, T: Instance + RccPeripheral> {
sck: AnyPin, sck: AnyPin,
mosi: AnyPin, mosi: AnyPin,
miso: AnyPin, miso: AnyPin,
phantom: PhantomData<&'d mut T>, phantom: PhantomData<&'d mut T>,
} }
impl<'d, T: Instance> Spi<'d, T> { impl<'d, T: Instance + RccPeripheral> Spi<'d, T> {
pub fn new<F>( pub fn new<F>(
pclk: Hertz, pclk: Hertz,
_peri: impl Unborrow<Target = T> + 'd, _peri: impl Unborrow<Target = T> + 'd,
@ -64,6 +65,8 @@ impl<'d, T: Instance> Spi<'d, T> {
let br = Self::compute_baud_rate(pclk, freq.into()); let br = Self::compute_baud_rate(pclk, freq.into());
unsafe { unsafe {
T::enable();
T::reset();
T::regs().ifcr().write(|w| w.0 = 0xffff_ffff); T::regs().ifcr().write(|w| w.0 = 0xffff_ffff);
T::regs().cfg2().modify(|w| { T::regs().cfg2().modify(|w| {
//w.set_ssoe(true); //w.set_ssoe(true);
@ -161,7 +164,7 @@ impl<'d, T: Instance> Spi<'d, T> {
} }
} }
impl<'d, T: Instance> Drop for Spi<'d, T> { impl<'d, T: Instance + RccPeripheral> Drop for Spi<'d, T> {
fn drop(&mut self) { fn drop(&mut self) {
unsafe { unsafe {
Self::unconfigure_pin(self.sck.block(), self.sck.pin() as _); Self::unconfigure_pin(self.sck.block(), self.sck.pin() as _);
@ -171,7 +174,7 @@ impl<'d, T: Instance> Drop for Spi<'d, T> {
} }
} }
impl<'d, T: Instance> embedded_hal::blocking::spi::Write<u8> for Spi<'d, T> { impl<'d, T: Instance + RccPeripheral> embedded_hal::blocking::spi::Write<u8> for Spi<'d, T> {
type Error = Error; type Error = Error;
fn write(&mut self, words: &[u8]) -> Result<(), Self::Error> { fn write(&mut self, words: &[u8]) -> Result<(), Self::Error> {
@ -208,7 +211,7 @@ impl<'d, T: Instance> embedded_hal::blocking::spi::Write<u8> for Spi<'d, T> {
} }
} }
impl<'d, T: Instance> embedded_hal::blocking::spi::Transfer<u8> for Spi<'d, T> { impl<'d, T: Instance + RccPeripheral> embedded_hal::blocking::spi::Transfer<u8> for Spi<'d, T> {
type Error = Error; type Error = Error;
fn transfer<'w>(&mut self, words: &'w mut [u8]) -> Result<&'w [u8], Self::Error> { fn transfer<'w>(&mut self, words: &'w mut [u8]) -> Result<&'w [u8], Self::Error> {
@ -265,7 +268,7 @@ impl<'d, T: Instance> embedded_hal::blocking::spi::Transfer<u8> for Spi<'d, T> {
} }
} }
impl<'d, T: Instance> embedded_hal::blocking::spi::Write<u16> for Spi<'d, T> { impl<'d, T: Instance + RccPeripheral> embedded_hal::blocking::spi::Write<u16> for Spi<'d, T> {
type Error = Error; type Error = Error;
fn write(&mut self, words: &[u16]) -> Result<(), Self::Error> { fn write(&mut self, words: &[u16]) -> Result<(), Self::Error> {
@ -302,7 +305,7 @@ impl<'d, T: Instance> embedded_hal::blocking::spi::Write<u16> for Spi<'d, T> {
} }
} }
impl<'d, T: Instance> embedded_hal::blocking::spi::Transfer<u16> for Spi<'d, T> { impl<'d, T: Instance + RccPeripheral> embedded_hal::blocking::spi::Transfer<u16> for Spi<'d, T> {
type Error = Error; type Error = Error;
fn transfer<'w>(&mut self, words: &'w mut [u16]) -> Result<&'w [u16], Self::Error> { fn transfer<'w>(&mut self, words: &'w mut [u16]) -> Result<&'w [u16], Self::Error> {