Pass rx pin to right init arg
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81f10e136a
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@ -5,8 +5,8 @@ use embassy_hal_common::{into_ref, PeripheralRef};
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use crate::dma::{AnyChannel, Channel};
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use crate::gpio::sealed::Pin;
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use crate::gpio::AnyPin;
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use crate::{pac, peripherals, Peripheral};
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use crate::pac::io::vals::{Inover, Outover};
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use crate::{pac, peripherals, Peripheral};
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#[cfg(feature = "nightly")]
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mod buffered;
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@ -180,7 +180,7 @@ impl<'d, T: Instance> UartTx<'d, T, Async> {
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}
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impl<'d, T: Instance, M: Mode> UartRx<'d, T, M> {
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/// Create a new DMA-enabled UART which can only send data
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/// Create a new DMA-enabled UART which can only recieve data
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pub fn new(
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_uart: impl Peripheral<P = T> + 'd,
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rx: impl Peripheral<P = impl RxPin<T>> + 'd,
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@ -188,7 +188,7 @@ impl<'d, T: Instance, M: Mode> UartRx<'d, T, M> {
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config: Config,
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) -> Self {
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into_ref!(rx, rx_dma);
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Uart::<T, M>::init(Some(rx.map_into()), None, None, None, config);
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Uart::<T, M>::init(None, Some(rx.map_into()), None, None, config);
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Self::new_inner(Some(rx_dma.map_into()))
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}
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@ -396,28 +396,44 @@ impl<'d, T: Instance + 'd, M: Mode> Uart<'d, T, M> {
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if let Some(pin) = &tx {
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pin.io().ctrl().write(|w| {
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w.set_funcsel(2);
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w.set_outover(if config.invert_tx { Outover::INVERT } else { Outover::NORMAL });
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w.set_outover(if config.invert_tx {
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Outover::INVERT
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} else {
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Outover::NORMAL
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});
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});
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pin.pad_ctrl().write(|w| w.set_ie(true));
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}
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if let Some(pin) = &rx {
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pin.io().ctrl().write(|w| {
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w.set_funcsel(2);
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w.set_inover(if config.invert_rx { Inover::INVERT } else { Inover::NORMAL });
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w.set_inover(if config.invert_rx {
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Inover::INVERT
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} else {
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Inover::NORMAL
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});
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});
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pin.pad_ctrl().write(|w| w.set_ie(true));
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}
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if let Some(pin) = &cts {
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pin.io().ctrl().write(|w| {
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w.set_funcsel(2);
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w.set_inover(if config.invert_cts { Inover::INVERT } else { Inover::NORMAL });
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w.set_inover(if config.invert_cts {
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Inover::INVERT
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} else {
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Inover::NORMAL
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});
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});
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pin.pad_ctrl().write(|w| w.set_ie(true));
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}
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if let Some(pin) = &rts {
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pin.io().ctrl().write(|w| {
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w.set_funcsel(2);
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w.set_outover(if config.invert_rts { Outover::INVERT } else { Outover::NORMAL });
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w.set_outover(if config.invert_rts {
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Outover::INVERT
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} else {
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Outover::NORMAL
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});
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});
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pin.pad_ctrl().write(|w| w.set_ie(true));
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}
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