diff --git a/embassy-stm32/src/chip/stm32h723ve.rs b/embassy-stm32/src/chip/stm32h723ve.rs deleted file mode 100644 index 11be318c..00000000 --- a/embassy-stm32/src/chip/stm32h723ve.rs +++ /dev/null @@ -1,885 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, ADC3, BDMA, COMP1, COMP2, CORDIC, DAC1, DCMI, DMA2D, DTS, - ETH, FDCAN1, FDCAN2, FDCAN3, FMAC, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, - PA11, PA12, PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, - PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, - PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, - PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, - PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, - PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, - PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, PJ0, PJ1, PJ2, PJ3, - PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, PJ10, PJ11, PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, - PK6, PK7, PK8, PK9, PK10, PK11, PK12, PK13, PK14, PK15, I2C1, I2C2, I2C3, I2C4, I2C5, IWDG1, - LPTIM1, LPTIM2, LPTIM3, LPTIM4, LPTIM5, LPUART1, LTDC, MDIOS, MDMA, OCTOSPI1, OCTOSPI2, - OCTOSPIM, OPAMP1, OPAMP2, PSSI, PWR, RCC, RNG, RTC, SAI1, SAI4, SDMMC1, SDMMC2, SPI1, SPI2, - SPI3, SPI4, SPI6, SWPMI1, SYSCFG, TIM1, TIM12, TIM13, TIM14, TIM15, TIM16, TIM17, TIM2, TIM23, - TIM24, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, UART4, UART5, UART7, UART8, UART9, USART1, USART10, - USART2, USART3, USART6, USB_OTG_HS, VREFBUF, WWDG1 -); -pub const GPIO_BASE: usize = 0x58020000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC = 18, - ADC3 = 127, - BDMA_Channel0 = 129, - BDMA_Channel1 = 130, - BDMA_Channel2 = 131, - BDMA_Channel3 = 132, - BDMA_Channel4 = 133, - BDMA_Channel5 = 134, - BDMA_Channel6 = 135, - BDMA_Channel7 = 136, - CEC = 94, - CORDIC = 154, - CRS = 144, - DCMI_PSSI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - DTS = 147, - ECC = 145, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN3_IT0 = 159, - FDCAN3_IT1 = 160, - FDCAN_CAL = 63, - FLASH = 4, - FMAC = 153, - FMC = 48, - FPU = 81, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - I2C5_ER = 158, - I2C5_EV = 157, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPTIM4 = 140, - LPTIM5 = 141, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OCTOSPI1 = 92, - OCTOSPI2 = 150, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_AVD = 1, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI4 = 146, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TAMP_STAMP = 2, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM23 = 161, - TIM24 = 162, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - UART9 = 155, - USART1 = 37, - USART10 = 156, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(ADC3); - declare!(BDMA_Channel0); - declare!(BDMA_Channel1); - declare!(BDMA_Channel2); - declare!(BDMA_Channel3); - declare!(BDMA_Channel4); - declare!(BDMA_Channel5); - declare!(BDMA_Channel6); - declare!(BDMA_Channel7); - declare!(CEC); - declare!(CORDIC); - declare!(CRS); - declare!(DCMI_PSSI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(DTS); - declare!(ECC); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN3_IT0); - declare!(FDCAN3_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMAC); - declare!(FMC); - declare!(FPU); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(I2C5_ER); - declare!(I2C5_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPTIM4); - declare!(LPTIM5); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_AVD); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI4); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM23); - declare!(TIM24); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(UART9); - declare!(USART1); - declare!(USART10); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn ADC3(); - fn BDMA_Channel0(); - fn BDMA_Channel1(); - fn BDMA_Channel2(); - fn BDMA_Channel3(); - fn BDMA_Channel4(); - fn BDMA_Channel5(); - fn BDMA_Channel6(); - fn BDMA_Channel7(); - fn CEC(); - fn CORDIC(); - fn CRS(); - fn DCMI_PSSI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn DTS(); - fn ECC(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN3_IT0(); - fn FDCAN3_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMAC(); - fn FMC(); - fn FPU(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn I2C5_ER(); - fn I2C5_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPTIM4(); - fn LPTIM5(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_AVD(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI4(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM23(); - fn TIM24(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn UART9(); - fn USART1(); - fn USART10(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 163] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_AVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { - _handler: DCMI_PSSI, - }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _reserved: 0 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _reserved: 0 }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: ADC3 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA_Channel0, - }, - Vector { - _handler: BDMA_Channel1, - }, - Vector { - _handler: BDMA_Channel2, - }, - Vector { - _handler: BDMA_Channel3, - }, - Vector { - _handler: BDMA_Channel4, - }, - Vector { - _handler: BDMA_Channel5, - }, - Vector { - _handler: BDMA_Channel6, - }, - Vector { - _handler: BDMA_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: LPTIM4 }, - Vector { _handler: LPTIM5 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _handler: SAI4 }, - Vector { _handler: DTS }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - Vector { _handler: OCTOSPI2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: FMAC }, - Vector { _handler: CORDIC }, - Vector { _handler: UART9 }, - Vector { _handler: USART10 }, - Vector { _handler: I2C5_EV }, - Vector { _handler: I2C5_ER }, - Vector { - _handler: FDCAN3_IT0, - }, - Vector { - _handler: FDCAN3_IT1, - }, - Vector { _handler: TIM23 }, - Vector { _handler: TIM24 }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -impl_rng!(0x48021800); -impl_sdmmc!(SDMMC1, 0x52007000); -impl_sdmmc_pin!(SDMMC1, D0Pin, PB13, 12); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -impl_sdmmc!(SDMMC2, 0x48022400); -impl_sdmmc_pin!(SDMMC2, CmdPin, PA0, 9); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D1Pin, PG10, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); -impl_sdmmc_pin!(SDMMC2, D3Pin, PG12, 10); -impl_sdmmc_pin!(SDMMC2, D6Pin, PG13, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PG14, 10); -impl_sdmmc_pin!(SDMMC2, D0Pin, PG9, 11); diff --git a/embassy-stm32/src/chip/stm32h723vg.rs b/embassy-stm32/src/chip/stm32h723vg.rs deleted file mode 100644 index 11be318c..00000000 --- a/embassy-stm32/src/chip/stm32h723vg.rs +++ /dev/null @@ -1,885 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, ADC3, BDMA, COMP1, COMP2, CORDIC, DAC1, DCMI, DMA2D, DTS, - ETH, FDCAN1, FDCAN2, FDCAN3, FMAC, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, - PA11, PA12, PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, - PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, - PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, - PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, - PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, - PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, - PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, PJ0, PJ1, PJ2, PJ3, - PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, PJ10, PJ11, PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, - PK6, PK7, PK8, PK9, PK10, PK11, PK12, PK13, PK14, PK15, I2C1, I2C2, I2C3, I2C4, I2C5, IWDG1, - LPTIM1, LPTIM2, LPTIM3, LPTIM4, LPTIM5, LPUART1, LTDC, MDIOS, MDMA, OCTOSPI1, OCTOSPI2, - OCTOSPIM, OPAMP1, OPAMP2, PSSI, PWR, RCC, RNG, RTC, SAI1, SAI4, SDMMC1, SDMMC2, SPI1, SPI2, - SPI3, SPI4, SPI6, SWPMI1, SYSCFG, TIM1, TIM12, TIM13, TIM14, TIM15, TIM16, TIM17, TIM2, TIM23, - TIM24, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, UART4, UART5, UART7, UART8, UART9, USART1, USART10, - USART2, USART3, USART6, USB_OTG_HS, VREFBUF, WWDG1 -); -pub const GPIO_BASE: usize = 0x58020000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC = 18, - ADC3 = 127, - BDMA_Channel0 = 129, - BDMA_Channel1 = 130, - BDMA_Channel2 = 131, - BDMA_Channel3 = 132, - BDMA_Channel4 = 133, - BDMA_Channel5 = 134, - BDMA_Channel6 = 135, - BDMA_Channel7 = 136, - CEC = 94, - CORDIC = 154, - CRS = 144, - DCMI_PSSI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - DTS = 147, - ECC = 145, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN3_IT0 = 159, - FDCAN3_IT1 = 160, - FDCAN_CAL = 63, - FLASH = 4, - FMAC = 153, - FMC = 48, - FPU = 81, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - I2C5_ER = 158, - I2C5_EV = 157, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPTIM4 = 140, - LPTIM5 = 141, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OCTOSPI1 = 92, - OCTOSPI2 = 150, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_AVD = 1, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI4 = 146, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TAMP_STAMP = 2, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM23 = 161, - TIM24 = 162, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - UART9 = 155, - USART1 = 37, - USART10 = 156, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(ADC3); - declare!(BDMA_Channel0); - declare!(BDMA_Channel1); - declare!(BDMA_Channel2); - declare!(BDMA_Channel3); - declare!(BDMA_Channel4); - declare!(BDMA_Channel5); - declare!(BDMA_Channel6); - declare!(BDMA_Channel7); - declare!(CEC); - declare!(CORDIC); - declare!(CRS); - declare!(DCMI_PSSI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(DTS); - declare!(ECC); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN3_IT0); - declare!(FDCAN3_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMAC); - declare!(FMC); - declare!(FPU); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(I2C5_ER); - declare!(I2C5_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPTIM4); - declare!(LPTIM5); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_AVD); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI4); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM23); - declare!(TIM24); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(UART9); - declare!(USART1); - declare!(USART10); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn ADC3(); - fn BDMA_Channel0(); - fn BDMA_Channel1(); - fn BDMA_Channel2(); - fn BDMA_Channel3(); - fn BDMA_Channel4(); - fn BDMA_Channel5(); - fn BDMA_Channel6(); - fn BDMA_Channel7(); - fn CEC(); - fn CORDIC(); - fn CRS(); - fn DCMI_PSSI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn DTS(); - fn ECC(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN3_IT0(); - fn FDCAN3_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMAC(); - fn FMC(); - fn FPU(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn I2C5_ER(); - fn I2C5_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPTIM4(); - fn LPTIM5(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_AVD(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI4(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM23(); - fn TIM24(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn UART9(); - fn USART1(); - fn USART10(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 163] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_AVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { - _handler: DCMI_PSSI, - }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _reserved: 0 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _reserved: 0 }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: ADC3 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA_Channel0, - }, - Vector { - _handler: BDMA_Channel1, - }, - Vector { - _handler: BDMA_Channel2, - }, - Vector { - _handler: BDMA_Channel3, - }, - Vector { - _handler: BDMA_Channel4, - }, - Vector { - _handler: BDMA_Channel5, - }, - Vector { - _handler: BDMA_Channel6, - }, - Vector { - _handler: BDMA_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: LPTIM4 }, - Vector { _handler: LPTIM5 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _handler: SAI4 }, - Vector { _handler: DTS }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - Vector { _handler: OCTOSPI2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: FMAC }, - Vector { _handler: CORDIC }, - Vector { _handler: UART9 }, - Vector { _handler: USART10 }, - Vector { _handler: I2C5_EV }, - Vector { _handler: I2C5_ER }, - Vector { - _handler: FDCAN3_IT0, - }, - Vector { - _handler: FDCAN3_IT1, - }, - Vector { _handler: TIM23 }, - Vector { _handler: TIM24 }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -impl_rng!(0x48021800); -impl_sdmmc!(SDMMC1, 0x52007000); -impl_sdmmc_pin!(SDMMC1, D0Pin, PB13, 12); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -impl_sdmmc!(SDMMC2, 0x48022400); -impl_sdmmc_pin!(SDMMC2, CmdPin, PA0, 9); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D1Pin, PG10, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); -impl_sdmmc_pin!(SDMMC2, D3Pin, PG12, 10); -impl_sdmmc_pin!(SDMMC2, D6Pin, PG13, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PG14, 10); -impl_sdmmc_pin!(SDMMC2, D0Pin, PG9, 11); diff --git a/embassy-stm32/src/chip/stm32h723ze.rs b/embassy-stm32/src/chip/stm32h723ze.rs deleted file mode 100644 index 256d7b48..00000000 --- a/embassy-stm32/src/chip/stm32h723ze.rs +++ /dev/null @@ -1,885 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, ADC3, BDMA, COMP1, COMP2, CORDIC, DAC1, DCMI, DMA2D, DTS, - ETH, FDCAN1, FDCAN2, FDCAN3, FMAC, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, - PA11, PA12, PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, - PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, - PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, - PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, - PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, - PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, - PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, PJ0, PJ1, PJ2, PJ3, - PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, PJ10, PJ11, PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, - PK6, PK7, PK8, PK9, PK10, PK11, PK12, PK13, PK14, PK15, I2C1, I2C2, I2C3, I2C4, I2C5, IWDG1, - LPTIM1, LPTIM2, LPTIM3, LPTIM4, LPTIM5, LPUART1, LTDC, MDIOS, MDMA, OCTOSPI1, OCTOSPI2, - OCTOSPIM, OPAMP1, OPAMP2, PSSI, PWR, RCC, RNG, RTC, SAI1, SAI4, SDMMC1, SDMMC2, SPI1, SPI2, - SPI3, SPI4, SPI5, SPI6, SWPMI1, SYSCFG, TIM1, TIM12, TIM13, TIM14, TIM15, TIM16, TIM17, TIM2, - TIM23, TIM24, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, UART4, UART5, UART7, UART8, UART9, USART1, - USART10, USART2, USART3, USART6, USB_OTG_HS, VREFBUF, WWDG1 -); -pub const GPIO_BASE: usize = 0x58020000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC = 18, - ADC3 = 127, - BDMA_Channel0 = 129, - BDMA_Channel1 = 130, - BDMA_Channel2 = 131, - BDMA_Channel3 = 132, - BDMA_Channel4 = 133, - BDMA_Channel5 = 134, - BDMA_Channel6 = 135, - BDMA_Channel7 = 136, - CEC = 94, - CORDIC = 154, - CRS = 144, - DCMI_PSSI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - DTS = 147, - ECC = 145, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN3_IT0 = 159, - FDCAN3_IT1 = 160, - FDCAN_CAL = 63, - FLASH = 4, - FMAC = 153, - FMC = 48, - FPU = 81, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - I2C5_ER = 158, - I2C5_EV = 157, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPTIM4 = 140, - LPTIM5 = 141, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OCTOSPI1 = 92, - OCTOSPI2 = 150, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_AVD = 1, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI4 = 146, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TAMP_STAMP = 2, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM23 = 161, - TIM24 = 162, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - UART9 = 155, - USART1 = 37, - USART10 = 156, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(ADC3); - declare!(BDMA_Channel0); - declare!(BDMA_Channel1); - declare!(BDMA_Channel2); - declare!(BDMA_Channel3); - declare!(BDMA_Channel4); - declare!(BDMA_Channel5); - declare!(BDMA_Channel6); - declare!(BDMA_Channel7); - declare!(CEC); - declare!(CORDIC); - declare!(CRS); - declare!(DCMI_PSSI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(DTS); - declare!(ECC); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN3_IT0); - declare!(FDCAN3_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMAC); - declare!(FMC); - declare!(FPU); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(I2C5_ER); - declare!(I2C5_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPTIM4); - declare!(LPTIM5); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_AVD); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI4); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM23); - declare!(TIM24); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(UART9); - declare!(USART1); - declare!(USART10); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn ADC3(); - fn BDMA_Channel0(); - fn BDMA_Channel1(); - fn BDMA_Channel2(); - fn BDMA_Channel3(); - fn BDMA_Channel4(); - fn BDMA_Channel5(); - fn BDMA_Channel6(); - fn BDMA_Channel7(); - fn CEC(); - fn CORDIC(); - fn CRS(); - fn DCMI_PSSI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn DTS(); - fn ECC(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN3_IT0(); - fn FDCAN3_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMAC(); - fn FMC(); - fn FPU(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn I2C5_ER(); - fn I2C5_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPTIM4(); - fn LPTIM5(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_AVD(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI4(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM23(); - fn TIM24(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn UART9(); - fn USART1(); - fn USART10(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 163] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_AVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { - _handler: DCMI_PSSI, - }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _reserved: 0 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _reserved: 0 }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: ADC3 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA_Channel0, - }, - Vector { - _handler: BDMA_Channel1, - }, - Vector { - _handler: BDMA_Channel2, - }, - Vector { - _handler: BDMA_Channel3, - }, - Vector { - _handler: BDMA_Channel4, - }, - Vector { - _handler: BDMA_Channel5, - }, - Vector { - _handler: BDMA_Channel6, - }, - Vector { - _handler: BDMA_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: LPTIM4 }, - Vector { _handler: LPTIM5 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _handler: SAI4 }, - Vector { _handler: DTS }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - Vector { _handler: OCTOSPI2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: FMAC }, - Vector { _handler: CORDIC }, - Vector { _handler: UART9 }, - Vector { _handler: USART10 }, - Vector { _handler: I2C5_EV }, - Vector { _handler: I2C5_ER }, - Vector { - _handler: FDCAN3_IT0, - }, - Vector { - _handler: FDCAN3_IT1, - }, - Vector { _handler: TIM23 }, - Vector { _handler: TIM24 }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -impl_rng!(0x48021800); -impl_sdmmc!(SDMMC1, 0x52007000); -impl_sdmmc_pin!(SDMMC1, D0Pin, PB13, 12); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -impl_sdmmc!(SDMMC2, 0x48022400); -impl_sdmmc_pin!(SDMMC2, CmdPin, PA0, 9); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D1Pin, PG10, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); -impl_sdmmc_pin!(SDMMC2, D3Pin, PG12, 10); -impl_sdmmc_pin!(SDMMC2, D6Pin, PG13, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PG14, 10); -impl_sdmmc_pin!(SDMMC2, D0Pin, PG9, 11); diff --git a/embassy-stm32/src/chip/stm32h723zg.rs b/embassy-stm32/src/chip/stm32h723zg.rs deleted file mode 100644 index 256d7b48..00000000 --- a/embassy-stm32/src/chip/stm32h723zg.rs +++ /dev/null @@ -1,885 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, ADC3, BDMA, COMP1, COMP2, CORDIC, DAC1, DCMI, DMA2D, DTS, - ETH, FDCAN1, FDCAN2, FDCAN3, FMAC, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, - PA11, PA12, PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, - PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, - PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, - PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, - PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, - PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, - PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, PJ0, PJ1, PJ2, PJ3, - PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, PJ10, PJ11, PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, - PK6, PK7, PK8, PK9, PK10, PK11, PK12, PK13, PK14, PK15, I2C1, I2C2, I2C3, I2C4, I2C5, IWDG1, - LPTIM1, LPTIM2, LPTIM3, LPTIM4, LPTIM5, LPUART1, LTDC, MDIOS, MDMA, OCTOSPI1, OCTOSPI2, - OCTOSPIM, OPAMP1, OPAMP2, PSSI, PWR, RCC, RNG, RTC, SAI1, SAI4, SDMMC1, SDMMC2, SPI1, SPI2, - SPI3, SPI4, SPI5, SPI6, SWPMI1, SYSCFG, TIM1, TIM12, TIM13, TIM14, TIM15, TIM16, TIM17, TIM2, - TIM23, TIM24, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, UART4, UART5, UART7, UART8, UART9, USART1, - USART10, USART2, USART3, USART6, USB_OTG_HS, VREFBUF, WWDG1 -); -pub const GPIO_BASE: usize = 0x58020000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC = 18, - ADC3 = 127, - BDMA_Channel0 = 129, - BDMA_Channel1 = 130, - BDMA_Channel2 = 131, - BDMA_Channel3 = 132, - BDMA_Channel4 = 133, - BDMA_Channel5 = 134, - BDMA_Channel6 = 135, - BDMA_Channel7 = 136, - CEC = 94, - CORDIC = 154, - CRS = 144, - DCMI_PSSI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - DTS = 147, - ECC = 145, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN3_IT0 = 159, - FDCAN3_IT1 = 160, - FDCAN_CAL = 63, - FLASH = 4, - FMAC = 153, - FMC = 48, - FPU = 81, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - I2C5_ER = 158, - I2C5_EV = 157, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPTIM4 = 140, - LPTIM5 = 141, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OCTOSPI1 = 92, - OCTOSPI2 = 150, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_AVD = 1, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI4 = 146, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TAMP_STAMP = 2, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM23 = 161, - TIM24 = 162, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - UART9 = 155, - USART1 = 37, - USART10 = 156, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(ADC3); - declare!(BDMA_Channel0); - declare!(BDMA_Channel1); - declare!(BDMA_Channel2); - declare!(BDMA_Channel3); - declare!(BDMA_Channel4); - declare!(BDMA_Channel5); - declare!(BDMA_Channel6); - declare!(BDMA_Channel7); - declare!(CEC); - declare!(CORDIC); - declare!(CRS); - declare!(DCMI_PSSI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(DTS); - declare!(ECC); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN3_IT0); - declare!(FDCAN3_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMAC); - declare!(FMC); - declare!(FPU); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(I2C5_ER); - declare!(I2C5_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPTIM4); - declare!(LPTIM5); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_AVD); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI4); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM23); - declare!(TIM24); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(UART9); - declare!(USART1); - declare!(USART10); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn ADC3(); - fn BDMA_Channel0(); - fn BDMA_Channel1(); - fn BDMA_Channel2(); - fn BDMA_Channel3(); - fn BDMA_Channel4(); - fn BDMA_Channel5(); - fn BDMA_Channel6(); - fn BDMA_Channel7(); - fn CEC(); - fn CORDIC(); - fn CRS(); - fn DCMI_PSSI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn DTS(); - fn ECC(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN3_IT0(); - fn FDCAN3_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMAC(); - fn FMC(); - fn FPU(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn I2C5_ER(); - fn I2C5_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPTIM4(); - fn LPTIM5(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_AVD(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI4(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM23(); - fn TIM24(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn UART9(); - fn USART1(); - fn USART10(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 163] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_AVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { - _handler: DCMI_PSSI, - }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _reserved: 0 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _reserved: 0 }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: ADC3 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA_Channel0, - }, - Vector { - _handler: BDMA_Channel1, - }, - Vector { - _handler: BDMA_Channel2, - }, - Vector { - _handler: BDMA_Channel3, - }, - Vector { - _handler: BDMA_Channel4, - }, - Vector { - _handler: BDMA_Channel5, - }, - Vector { - _handler: BDMA_Channel6, - }, - Vector { - _handler: BDMA_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: LPTIM4 }, - Vector { _handler: LPTIM5 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _handler: SAI4 }, - Vector { _handler: DTS }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - Vector { _handler: OCTOSPI2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: FMAC }, - Vector { _handler: CORDIC }, - Vector { _handler: UART9 }, - Vector { _handler: USART10 }, - Vector { _handler: I2C5_EV }, - Vector { _handler: I2C5_ER }, - Vector { - _handler: FDCAN3_IT0, - }, - Vector { - _handler: FDCAN3_IT1, - }, - Vector { _handler: TIM23 }, - Vector { _handler: TIM24 }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -impl_rng!(0x48021800); -impl_sdmmc!(SDMMC1, 0x52007000); -impl_sdmmc_pin!(SDMMC1, D0Pin, PB13, 12); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -impl_sdmmc!(SDMMC2, 0x48022400); -impl_sdmmc_pin!(SDMMC2, CmdPin, PA0, 9); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D1Pin, PG10, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); -impl_sdmmc_pin!(SDMMC2, D3Pin, PG12, 10); -impl_sdmmc_pin!(SDMMC2, D6Pin, PG13, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PG14, 10); -impl_sdmmc_pin!(SDMMC2, D0Pin, PG9, 11); diff --git a/embassy-stm32/src/chip/stm32h725ae.rs b/embassy-stm32/src/chip/stm32h725ae.rs deleted file mode 100644 index c1ee7b25..00000000 --- a/embassy-stm32/src/chip/stm32h725ae.rs +++ /dev/null @@ -1,885 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, ADC3, BDMA, COMP1, COMP2, CORDIC, DAC1, DCMI, DMA2D, DTS, - ETH, FDCAN1, FDCAN2, FDCAN3, FMAC, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, - PA11, PA12, PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, - PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, - PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, - PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, - PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, - PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, - PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, PJ0, PJ1, PJ2, PJ3, - PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, PJ10, PJ11, PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, - PK6, PK7, PK8, PK9, PK10, PK11, PK12, PK13, PK14, PK15, I2C1, I2C2, I2C3, I2C4, I2C5, IWDG1, - LPTIM1, LPTIM2, LPTIM3, LPTIM4, LPTIM5, LPUART1, LTDC, MDIOS, MDMA, OCTOSPI1, OCTOSPI2, - OCTOSPIM, OPAMP1, OPAMP2, PSSI, PWR, RCC, RNG, RTC, SAI1, SAI4, SDMMC1, SDMMC2, SPI1, SPI2, - SPI3, SPI4, SPI5, SPI6, SWPMI1, SYSCFG, TIM1, TIM12, TIM13, TIM14, TIM15, TIM16, TIM17, TIM2, - TIM23, TIM24, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, UART4, UART5, UART7, UART8, UART9, USART1, - USART2, USART3, USART6, USB_OTG_HS, VREFBUF, WWDG1 -); -pub const GPIO_BASE: usize = 0x58020000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC = 18, - ADC3 = 127, - BDMA_Channel0 = 129, - BDMA_Channel1 = 130, - BDMA_Channel2 = 131, - BDMA_Channel3 = 132, - BDMA_Channel4 = 133, - BDMA_Channel5 = 134, - BDMA_Channel6 = 135, - BDMA_Channel7 = 136, - CEC = 94, - CORDIC = 154, - CRS = 144, - DCMI_PSSI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - DTS = 147, - ECC = 145, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN3_IT0 = 159, - FDCAN3_IT1 = 160, - FDCAN_CAL = 63, - FLASH = 4, - FMAC = 153, - FMC = 48, - FPU = 81, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - I2C5_ER = 158, - I2C5_EV = 157, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPTIM4 = 140, - LPTIM5 = 141, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OCTOSPI1 = 92, - OCTOSPI2 = 150, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_AVD = 1, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI4 = 146, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TAMP_STAMP = 2, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM23 = 161, - TIM24 = 162, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - UART9 = 155, - USART1 = 37, - USART10 = 156, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(ADC3); - declare!(BDMA_Channel0); - declare!(BDMA_Channel1); - declare!(BDMA_Channel2); - declare!(BDMA_Channel3); - declare!(BDMA_Channel4); - declare!(BDMA_Channel5); - declare!(BDMA_Channel6); - declare!(BDMA_Channel7); - declare!(CEC); - declare!(CORDIC); - declare!(CRS); - declare!(DCMI_PSSI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(DTS); - declare!(ECC); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN3_IT0); - declare!(FDCAN3_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMAC); - declare!(FMC); - declare!(FPU); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(I2C5_ER); - declare!(I2C5_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPTIM4); - declare!(LPTIM5); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_AVD); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI4); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM23); - declare!(TIM24); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(UART9); - declare!(USART1); - declare!(USART10); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn ADC3(); - fn BDMA_Channel0(); - fn BDMA_Channel1(); - fn BDMA_Channel2(); - fn BDMA_Channel3(); - fn BDMA_Channel4(); - fn BDMA_Channel5(); - fn BDMA_Channel6(); - fn BDMA_Channel7(); - fn CEC(); - fn CORDIC(); - fn CRS(); - fn DCMI_PSSI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn DTS(); - fn ECC(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN3_IT0(); - fn FDCAN3_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMAC(); - fn FMC(); - fn FPU(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn I2C5_ER(); - fn I2C5_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPTIM4(); - fn LPTIM5(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_AVD(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI4(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM23(); - fn TIM24(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn UART9(); - fn USART1(); - fn USART10(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 163] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_AVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { - _handler: DCMI_PSSI, - }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _reserved: 0 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _reserved: 0 }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: ADC3 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA_Channel0, - }, - Vector { - _handler: BDMA_Channel1, - }, - Vector { - _handler: BDMA_Channel2, - }, - Vector { - _handler: BDMA_Channel3, - }, - Vector { - _handler: BDMA_Channel4, - }, - Vector { - _handler: BDMA_Channel5, - }, - Vector { - _handler: BDMA_Channel6, - }, - Vector { - _handler: BDMA_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: LPTIM4 }, - Vector { _handler: LPTIM5 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _handler: SAI4 }, - Vector { _handler: DTS }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - Vector { _handler: OCTOSPI2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: FMAC }, - Vector { _handler: CORDIC }, - Vector { _handler: UART9 }, - Vector { _handler: USART10 }, - Vector { _handler: I2C5_EV }, - Vector { _handler: I2C5_ER }, - Vector { - _handler: FDCAN3_IT0, - }, - Vector { - _handler: FDCAN3_IT1, - }, - Vector { _handler: TIM23 }, - Vector { _handler: TIM24 }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -impl_rng!(0x48021800); -impl_sdmmc!(SDMMC1, 0x52007000); -impl_sdmmc_pin!(SDMMC1, D0Pin, PB13, 12); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -impl_sdmmc!(SDMMC2, 0x48022400); -impl_sdmmc_pin!(SDMMC2, CmdPin, PA0, 9); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D1Pin, PG10, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); -impl_sdmmc_pin!(SDMMC2, D3Pin, PG12, 10); -impl_sdmmc_pin!(SDMMC2, D6Pin, PG13, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PG14, 10); -impl_sdmmc_pin!(SDMMC2, D0Pin, PG9, 11); diff --git a/embassy-stm32/src/chip/stm32h725ag.rs b/embassy-stm32/src/chip/stm32h725ag.rs deleted file mode 100644 index c1ee7b25..00000000 --- a/embassy-stm32/src/chip/stm32h725ag.rs +++ /dev/null @@ -1,885 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, ADC3, BDMA, COMP1, COMP2, CORDIC, DAC1, DCMI, DMA2D, DTS, - ETH, FDCAN1, FDCAN2, FDCAN3, FMAC, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, - PA11, PA12, PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, - PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, - PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, - PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, - PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, - PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, - PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, PJ0, PJ1, PJ2, PJ3, - PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, PJ10, PJ11, PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, - PK6, PK7, PK8, PK9, PK10, PK11, PK12, PK13, PK14, PK15, I2C1, I2C2, I2C3, I2C4, I2C5, IWDG1, - LPTIM1, LPTIM2, LPTIM3, LPTIM4, LPTIM5, LPUART1, LTDC, MDIOS, MDMA, OCTOSPI1, OCTOSPI2, - OCTOSPIM, OPAMP1, OPAMP2, PSSI, PWR, RCC, RNG, RTC, SAI1, SAI4, SDMMC1, SDMMC2, SPI1, SPI2, - SPI3, SPI4, SPI5, SPI6, SWPMI1, SYSCFG, TIM1, TIM12, TIM13, TIM14, TIM15, TIM16, TIM17, TIM2, - TIM23, TIM24, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, UART4, UART5, UART7, UART8, UART9, USART1, - USART2, USART3, USART6, USB_OTG_HS, VREFBUF, WWDG1 -); -pub const GPIO_BASE: usize = 0x58020000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC = 18, - ADC3 = 127, - BDMA_Channel0 = 129, - BDMA_Channel1 = 130, - BDMA_Channel2 = 131, - BDMA_Channel3 = 132, - BDMA_Channel4 = 133, - BDMA_Channel5 = 134, - BDMA_Channel6 = 135, - BDMA_Channel7 = 136, - CEC = 94, - CORDIC = 154, - CRS = 144, - DCMI_PSSI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - DTS = 147, - ECC = 145, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN3_IT0 = 159, - FDCAN3_IT1 = 160, - FDCAN_CAL = 63, - FLASH = 4, - FMAC = 153, - FMC = 48, - FPU = 81, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - I2C5_ER = 158, - I2C5_EV = 157, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPTIM4 = 140, - LPTIM5 = 141, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OCTOSPI1 = 92, - OCTOSPI2 = 150, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_AVD = 1, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI4 = 146, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TAMP_STAMP = 2, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM23 = 161, - TIM24 = 162, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - UART9 = 155, - USART1 = 37, - USART10 = 156, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(ADC3); - declare!(BDMA_Channel0); - declare!(BDMA_Channel1); - declare!(BDMA_Channel2); - declare!(BDMA_Channel3); - declare!(BDMA_Channel4); - declare!(BDMA_Channel5); - declare!(BDMA_Channel6); - declare!(BDMA_Channel7); - declare!(CEC); - declare!(CORDIC); - declare!(CRS); - declare!(DCMI_PSSI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(DTS); - declare!(ECC); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN3_IT0); - declare!(FDCAN3_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMAC); - declare!(FMC); - declare!(FPU); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(I2C5_ER); - declare!(I2C5_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPTIM4); - declare!(LPTIM5); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_AVD); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI4); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM23); - declare!(TIM24); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(UART9); - declare!(USART1); - declare!(USART10); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn ADC3(); - fn BDMA_Channel0(); - fn BDMA_Channel1(); - fn BDMA_Channel2(); - fn BDMA_Channel3(); - fn BDMA_Channel4(); - fn BDMA_Channel5(); - fn BDMA_Channel6(); - fn BDMA_Channel7(); - fn CEC(); - fn CORDIC(); - fn CRS(); - fn DCMI_PSSI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn DTS(); - fn ECC(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN3_IT0(); - fn FDCAN3_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMAC(); - fn FMC(); - fn FPU(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn I2C5_ER(); - fn I2C5_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPTIM4(); - fn LPTIM5(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_AVD(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI4(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM23(); - fn TIM24(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn UART9(); - fn USART1(); - fn USART10(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 163] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_AVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { - _handler: DCMI_PSSI, - }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _reserved: 0 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _reserved: 0 }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: ADC3 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA_Channel0, - }, - Vector { - _handler: BDMA_Channel1, - }, - Vector { - _handler: BDMA_Channel2, - }, - Vector { - _handler: BDMA_Channel3, - }, - Vector { - _handler: BDMA_Channel4, - }, - Vector { - _handler: BDMA_Channel5, - }, - Vector { - _handler: BDMA_Channel6, - }, - Vector { - _handler: BDMA_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: LPTIM4 }, - Vector { _handler: LPTIM5 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _handler: SAI4 }, - Vector { _handler: DTS }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - Vector { _handler: OCTOSPI2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: FMAC }, - Vector { _handler: CORDIC }, - Vector { _handler: UART9 }, - Vector { _handler: USART10 }, - Vector { _handler: I2C5_EV }, - Vector { _handler: I2C5_ER }, - Vector { - _handler: FDCAN3_IT0, - }, - Vector { - _handler: FDCAN3_IT1, - }, - Vector { _handler: TIM23 }, - Vector { _handler: TIM24 }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -impl_rng!(0x48021800); -impl_sdmmc!(SDMMC1, 0x52007000); -impl_sdmmc_pin!(SDMMC1, D0Pin, PB13, 12); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -impl_sdmmc!(SDMMC2, 0x48022400); -impl_sdmmc_pin!(SDMMC2, CmdPin, PA0, 9); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D1Pin, PG10, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); -impl_sdmmc_pin!(SDMMC2, D3Pin, PG12, 10); -impl_sdmmc_pin!(SDMMC2, D6Pin, PG13, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PG14, 10); -impl_sdmmc_pin!(SDMMC2, D0Pin, PG9, 11); diff --git a/embassy-stm32/src/chip/stm32h725ie.rs b/embassy-stm32/src/chip/stm32h725ie.rs deleted file mode 100644 index 256d7b48..00000000 --- a/embassy-stm32/src/chip/stm32h725ie.rs +++ /dev/null @@ -1,885 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, ADC3, BDMA, COMP1, COMP2, CORDIC, DAC1, DCMI, DMA2D, DTS, - ETH, FDCAN1, FDCAN2, FDCAN3, FMAC, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, - PA11, PA12, PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, - PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, - PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, - PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, - PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, - PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, - PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, PJ0, PJ1, PJ2, PJ3, - PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, PJ10, PJ11, PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, - PK6, PK7, PK8, PK9, PK10, PK11, PK12, PK13, PK14, PK15, I2C1, I2C2, I2C3, I2C4, I2C5, IWDG1, - LPTIM1, LPTIM2, LPTIM3, LPTIM4, LPTIM5, LPUART1, LTDC, MDIOS, MDMA, OCTOSPI1, OCTOSPI2, - OCTOSPIM, OPAMP1, OPAMP2, PSSI, PWR, RCC, RNG, RTC, SAI1, SAI4, SDMMC1, SDMMC2, SPI1, SPI2, - SPI3, SPI4, SPI5, SPI6, SWPMI1, SYSCFG, TIM1, TIM12, TIM13, TIM14, TIM15, TIM16, TIM17, TIM2, - TIM23, TIM24, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, UART4, UART5, UART7, UART8, UART9, USART1, - USART10, USART2, USART3, USART6, USB_OTG_HS, VREFBUF, WWDG1 -); -pub const GPIO_BASE: usize = 0x58020000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC = 18, - ADC3 = 127, - BDMA_Channel0 = 129, - BDMA_Channel1 = 130, - BDMA_Channel2 = 131, - BDMA_Channel3 = 132, - BDMA_Channel4 = 133, - BDMA_Channel5 = 134, - BDMA_Channel6 = 135, - BDMA_Channel7 = 136, - CEC = 94, - CORDIC = 154, - CRS = 144, - DCMI_PSSI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - DTS = 147, - ECC = 145, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN3_IT0 = 159, - FDCAN3_IT1 = 160, - FDCAN_CAL = 63, - FLASH = 4, - FMAC = 153, - FMC = 48, - FPU = 81, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - I2C5_ER = 158, - I2C5_EV = 157, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPTIM4 = 140, - LPTIM5 = 141, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OCTOSPI1 = 92, - OCTOSPI2 = 150, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_AVD = 1, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI4 = 146, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TAMP_STAMP = 2, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM23 = 161, - TIM24 = 162, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - UART9 = 155, - USART1 = 37, - USART10 = 156, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(ADC3); - declare!(BDMA_Channel0); - declare!(BDMA_Channel1); - declare!(BDMA_Channel2); - declare!(BDMA_Channel3); - declare!(BDMA_Channel4); - declare!(BDMA_Channel5); - declare!(BDMA_Channel6); - declare!(BDMA_Channel7); - declare!(CEC); - declare!(CORDIC); - declare!(CRS); - declare!(DCMI_PSSI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(DTS); - declare!(ECC); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN3_IT0); - declare!(FDCAN3_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMAC); - declare!(FMC); - declare!(FPU); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(I2C5_ER); - declare!(I2C5_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPTIM4); - declare!(LPTIM5); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_AVD); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI4); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM23); - declare!(TIM24); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(UART9); - declare!(USART1); - declare!(USART10); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn ADC3(); - fn BDMA_Channel0(); - fn BDMA_Channel1(); - fn BDMA_Channel2(); - fn BDMA_Channel3(); - fn BDMA_Channel4(); - fn BDMA_Channel5(); - fn BDMA_Channel6(); - fn BDMA_Channel7(); - fn CEC(); - fn CORDIC(); - fn CRS(); - fn DCMI_PSSI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn DTS(); - fn ECC(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN3_IT0(); - fn FDCAN3_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMAC(); - fn FMC(); - fn FPU(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn I2C5_ER(); - fn I2C5_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPTIM4(); - fn LPTIM5(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_AVD(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI4(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM23(); - fn TIM24(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn UART9(); - fn USART1(); - fn USART10(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 163] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_AVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { - _handler: DCMI_PSSI, - }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _reserved: 0 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _reserved: 0 }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: ADC3 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA_Channel0, - }, - Vector { - _handler: BDMA_Channel1, - }, - Vector { - _handler: BDMA_Channel2, - }, - Vector { - _handler: BDMA_Channel3, - }, - Vector { - _handler: BDMA_Channel4, - }, - Vector { - _handler: BDMA_Channel5, - }, - Vector { - _handler: BDMA_Channel6, - }, - Vector { - _handler: BDMA_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: LPTIM4 }, - Vector { _handler: LPTIM5 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _handler: SAI4 }, - Vector { _handler: DTS }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - Vector { _handler: OCTOSPI2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: FMAC }, - Vector { _handler: CORDIC }, - Vector { _handler: UART9 }, - Vector { _handler: USART10 }, - Vector { _handler: I2C5_EV }, - Vector { _handler: I2C5_ER }, - Vector { - _handler: FDCAN3_IT0, - }, - Vector { - _handler: FDCAN3_IT1, - }, - Vector { _handler: TIM23 }, - Vector { _handler: TIM24 }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -impl_rng!(0x48021800); -impl_sdmmc!(SDMMC1, 0x52007000); -impl_sdmmc_pin!(SDMMC1, D0Pin, PB13, 12); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -impl_sdmmc!(SDMMC2, 0x48022400); -impl_sdmmc_pin!(SDMMC2, CmdPin, PA0, 9); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D1Pin, PG10, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); -impl_sdmmc_pin!(SDMMC2, D3Pin, PG12, 10); -impl_sdmmc_pin!(SDMMC2, D6Pin, PG13, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PG14, 10); -impl_sdmmc_pin!(SDMMC2, D0Pin, PG9, 11); diff --git a/embassy-stm32/src/chip/stm32h725ig.rs b/embassy-stm32/src/chip/stm32h725ig.rs deleted file mode 100644 index 256d7b48..00000000 --- a/embassy-stm32/src/chip/stm32h725ig.rs +++ /dev/null @@ -1,885 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, ADC3, BDMA, COMP1, COMP2, CORDIC, DAC1, DCMI, DMA2D, DTS, - ETH, FDCAN1, FDCAN2, FDCAN3, FMAC, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, - PA11, PA12, PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, - PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, - PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, - PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, - PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, - PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, - PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, PJ0, PJ1, PJ2, PJ3, - PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, PJ10, PJ11, PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, - PK6, PK7, PK8, PK9, PK10, PK11, PK12, PK13, PK14, PK15, I2C1, I2C2, I2C3, I2C4, I2C5, IWDG1, - LPTIM1, LPTIM2, LPTIM3, LPTIM4, LPTIM5, LPUART1, LTDC, MDIOS, MDMA, OCTOSPI1, OCTOSPI2, - OCTOSPIM, OPAMP1, OPAMP2, PSSI, PWR, RCC, RNG, RTC, SAI1, SAI4, SDMMC1, SDMMC2, SPI1, SPI2, - SPI3, SPI4, SPI5, SPI6, SWPMI1, SYSCFG, TIM1, TIM12, TIM13, TIM14, TIM15, TIM16, TIM17, TIM2, - TIM23, TIM24, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, UART4, UART5, UART7, UART8, UART9, USART1, - USART10, USART2, USART3, USART6, USB_OTG_HS, VREFBUF, WWDG1 -); -pub const GPIO_BASE: usize = 0x58020000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC = 18, - ADC3 = 127, - BDMA_Channel0 = 129, - BDMA_Channel1 = 130, - BDMA_Channel2 = 131, - BDMA_Channel3 = 132, - BDMA_Channel4 = 133, - BDMA_Channel5 = 134, - BDMA_Channel6 = 135, - BDMA_Channel7 = 136, - CEC = 94, - CORDIC = 154, - CRS = 144, - DCMI_PSSI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - DTS = 147, - ECC = 145, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN3_IT0 = 159, - FDCAN3_IT1 = 160, - FDCAN_CAL = 63, - FLASH = 4, - FMAC = 153, - FMC = 48, - FPU = 81, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - I2C5_ER = 158, - I2C5_EV = 157, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPTIM4 = 140, - LPTIM5 = 141, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OCTOSPI1 = 92, - OCTOSPI2 = 150, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_AVD = 1, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI4 = 146, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TAMP_STAMP = 2, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM23 = 161, - TIM24 = 162, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - UART9 = 155, - USART1 = 37, - USART10 = 156, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(ADC3); - declare!(BDMA_Channel0); - declare!(BDMA_Channel1); - declare!(BDMA_Channel2); - declare!(BDMA_Channel3); - declare!(BDMA_Channel4); - declare!(BDMA_Channel5); - declare!(BDMA_Channel6); - declare!(BDMA_Channel7); - declare!(CEC); - declare!(CORDIC); - declare!(CRS); - declare!(DCMI_PSSI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(DTS); - declare!(ECC); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN3_IT0); - declare!(FDCAN3_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMAC); - declare!(FMC); - declare!(FPU); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(I2C5_ER); - declare!(I2C5_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPTIM4); - declare!(LPTIM5); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_AVD); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI4); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM23); - declare!(TIM24); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(UART9); - declare!(USART1); - declare!(USART10); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn ADC3(); - fn BDMA_Channel0(); - fn BDMA_Channel1(); - fn BDMA_Channel2(); - fn BDMA_Channel3(); - fn BDMA_Channel4(); - fn BDMA_Channel5(); - fn BDMA_Channel6(); - fn BDMA_Channel7(); - fn CEC(); - fn CORDIC(); - fn CRS(); - fn DCMI_PSSI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn DTS(); - fn ECC(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN3_IT0(); - fn FDCAN3_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMAC(); - fn FMC(); - fn FPU(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn I2C5_ER(); - fn I2C5_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPTIM4(); - fn LPTIM5(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_AVD(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI4(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM23(); - fn TIM24(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn UART9(); - fn USART1(); - fn USART10(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 163] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_AVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { - _handler: DCMI_PSSI, - }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _reserved: 0 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _reserved: 0 }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: ADC3 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA_Channel0, - }, - Vector { - _handler: BDMA_Channel1, - }, - Vector { - _handler: BDMA_Channel2, - }, - Vector { - _handler: BDMA_Channel3, - }, - Vector { - _handler: BDMA_Channel4, - }, - Vector { - _handler: BDMA_Channel5, - }, - Vector { - _handler: BDMA_Channel6, - }, - Vector { - _handler: BDMA_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: LPTIM4 }, - Vector { _handler: LPTIM5 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _handler: SAI4 }, - Vector { _handler: DTS }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - Vector { _handler: OCTOSPI2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: FMAC }, - Vector { _handler: CORDIC }, - Vector { _handler: UART9 }, - Vector { _handler: USART10 }, - Vector { _handler: I2C5_EV }, - Vector { _handler: I2C5_ER }, - Vector { - _handler: FDCAN3_IT0, - }, - Vector { - _handler: FDCAN3_IT1, - }, - Vector { _handler: TIM23 }, - Vector { _handler: TIM24 }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -impl_rng!(0x48021800); -impl_sdmmc!(SDMMC1, 0x52007000); -impl_sdmmc_pin!(SDMMC1, D0Pin, PB13, 12); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -impl_sdmmc!(SDMMC2, 0x48022400); -impl_sdmmc_pin!(SDMMC2, CmdPin, PA0, 9); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D1Pin, PG10, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); -impl_sdmmc_pin!(SDMMC2, D3Pin, PG12, 10); -impl_sdmmc_pin!(SDMMC2, D6Pin, PG13, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PG14, 10); -impl_sdmmc_pin!(SDMMC2, D0Pin, PG9, 11); diff --git a/embassy-stm32/src/chip/stm32h725re.rs b/embassy-stm32/src/chip/stm32h725re.rs deleted file mode 100644 index aa848d4d..00000000 --- a/embassy-stm32/src/chip/stm32h725re.rs +++ /dev/null @@ -1,884 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, ADC3, BDMA, COMP1, COMP2, CORDIC, DAC1, DCMI, DMA2D, DTS, - FDCAN1, FDCAN2, FMAC, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, - PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, - PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, - PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, - PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, - PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, - PG6, PG7, PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, - PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, - PJ10, PJ11, PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, - PK11, PK12, PK13, PK14, PK15, I2C1, I2C2, I2C3, I2C4, IWDG1, LPTIM1, LPTIM2, LPTIM3, LPTIM4, - LPTIM5, LPUART1, LTDC, MDIOS, MDMA, OCTOSPI1, OCTOSPI2, OCTOSPIM, OPAMP1, PSSI, PWR, RCC, RNG, - RTC, SDMMC1, SDMMC2, SPI1, SPI2, SPI3, SPI6, SWPMI1, SYSCFG, TIM1, TIM12, TIM13, TIM14, TIM15, - TIM16, TIM17, TIM2, TIM23, TIM24, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, UART4, UART5, UART7, - USART1, USART2, USART3, USB_OTG_HS, VREFBUF, WWDG1 -); -pub const GPIO_BASE: usize = 0x58020000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC = 18, - ADC3 = 127, - BDMA_Channel0 = 129, - BDMA_Channel1 = 130, - BDMA_Channel2 = 131, - BDMA_Channel3 = 132, - BDMA_Channel4 = 133, - BDMA_Channel5 = 134, - BDMA_Channel6 = 135, - BDMA_Channel7 = 136, - CEC = 94, - CORDIC = 154, - CRS = 144, - DCMI_PSSI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - DTS = 147, - ECC = 145, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN3_IT0 = 159, - FDCAN3_IT1 = 160, - FDCAN_CAL = 63, - FLASH = 4, - FMAC = 153, - FMC = 48, - FPU = 81, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - I2C5_ER = 158, - I2C5_EV = 157, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPTIM4 = 140, - LPTIM5 = 141, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OCTOSPI1 = 92, - OCTOSPI2 = 150, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_AVD = 1, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI4 = 146, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TAMP_STAMP = 2, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM23 = 161, - TIM24 = 162, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - UART9 = 155, - USART1 = 37, - USART10 = 156, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(ADC3); - declare!(BDMA_Channel0); - declare!(BDMA_Channel1); - declare!(BDMA_Channel2); - declare!(BDMA_Channel3); - declare!(BDMA_Channel4); - declare!(BDMA_Channel5); - declare!(BDMA_Channel6); - declare!(BDMA_Channel7); - declare!(CEC); - declare!(CORDIC); - declare!(CRS); - declare!(DCMI_PSSI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(DTS); - declare!(ECC); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN3_IT0); - declare!(FDCAN3_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMAC); - declare!(FMC); - declare!(FPU); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(I2C5_ER); - declare!(I2C5_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPTIM4); - declare!(LPTIM5); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_AVD); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI4); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM23); - declare!(TIM24); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(UART9); - declare!(USART1); - declare!(USART10); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn ADC3(); - fn BDMA_Channel0(); - fn BDMA_Channel1(); - fn BDMA_Channel2(); - fn BDMA_Channel3(); - fn BDMA_Channel4(); - fn BDMA_Channel5(); - fn BDMA_Channel6(); - fn BDMA_Channel7(); - fn CEC(); - fn CORDIC(); - fn CRS(); - fn DCMI_PSSI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn DTS(); - fn ECC(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN3_IT0(); - fn FDCAN3_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMAC(); - fn FMC(); - fn FPU(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn I2C5_ER(); - fn I2C5_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPTIM4(); - fn LPTIM5(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_AVD(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI4(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM23(); - fn TIM24(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn UART9(); - fn USART1(); - fn USART10(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 163] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_AVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { - _handler: DCMI_PSSI, - }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _reserved: 0 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _reserved: 0 }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: ADC3 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA_Channel0, - }, - Vector { - _handler: BDMA_Channel1, - }, - Vector { - _handler: BDMA_Channel2, - }, - Vector { - _handler: BDMA_Channel3, - }, - Vector { - _handler: BDMA_Channel4, - }, - Vector { - _handler: BDMA_Channel5, - }, - Vector { - _handler: BDMA_Channel6, - }, - Vector { - _handler: BDMA_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: LPTIM4 }, - Vector { _handler: LPTIM5 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _handler: SAI4 }, - Vector { _handler: DTS }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - Vector { _handler: OCTOSPI2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: FMAC }, - Vector { _handler: CORDIC }, - Vector { _handler: UART9 }, - Vector { _handler: USART10 }, - Vector { _handler: I2C5_EV }, - Vector { _handler: I2C5_ER }, - Vector { - _handler: FDCAN3_IT0, - }, - Vector { - _handler: FDCAN3_IT1, - }, - Vector { _handler: TIM23 }, - Vector { _handler: TIM24 }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -impl_rng!(0x48021800); -impl_sdmmc!(SDMMC1, 0x52007000); -impl_sdmmc_pin!(SDMMC1, D0Pin, PB13, 12); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -impl_sdmmc!(SDMMC2, 0x48022400); -impl_sdmmc_pin!(SDMMC2, CmdPin, PA0, 9); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D1Pin, PG10, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); -impl_sdmmc_pin!(SDMMC2, D3Pin, PG12, 10); -impl_sdmmc_pin!(SDMMC2, D6Pin, PG13, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PG14, 10); -impl_sdmmc_pin!(SDMMC2, D0Pin, PG9, 11); diff --git a/embassy-stm32/src/chip/stm32h725rg.rs b/embassy-stm32/src/chip/stm32h725rg.rs deleted file mode 100644 index aa848d4d..00000000 --- a/embassy-stm32/src/chip/stm32h725rg.rs +++ /dev/null @@ -1,884 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, ADC3, BDMA, COMP1, COMP2, CORDIC, DAC1, DCMI, DMA2D, DTS, - FDCAN1, FDCAN2, FMAC, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, - PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, - PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, - PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, - PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, - PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, - PG6, PG7, PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, - PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, - PJ10, PJ11, PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, - PK11, PK12, PK13, PK14, PK15, I2C1, I2C2, I2C3, I2C4, IWDG1, LPTIM1, LPTIM2, LPTIM3, LPTIM4, - LPTIM5, LPUART1, LTDC, MDIOS, MDMA, OCTOSPI1, OCTOSPI2, OCTOSPIM, OPAMP1, PSSI, PWR, RCC, RNG, - RTC, SDMMC1, SDMMC2, SPI1, SPI2, SPI3, SPI6, SWPMI1, SYSCFG, TIM1, TIM12, TIM13, TIM14, TIM15, - TIM16, TIM17, TIM2, TIM23, TIM24, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, UART4, UART5, UART7, - USART1, USART2, USART3, USB_OTG_HS, VREFBUF, WWDG1 -); -pub const GPIO_BASE: usize = 0x58020000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC = 18, - ADC3 = 127, - BDMA_Channel0 = 129, - BDMA_Channel1 = 130, - BDMA_Channel2 = 131, - BDMA_Channel3 = 132, - BDMA_Channel4 = 133, - BDMA_Channel5 = 134, - BDMA_Channel6 = 135, - BDMA_Channel7 = 136, - CEC = 94, - CORDIC = 154, - CRS = 144, - DCMI_PSSI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - DTS = 147, - ECC = 145, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN3_IT0 = 159, - FDCAN3_IT1 = 160, - FDCAN_CAL = 63, - FLASH = 4, - FMAC = 153, - FMC = 48, - FPU = 81, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - I2C5_ER = 158, - I2C5_EV = 157, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPTIM4 = 140, - LPTIM5 = 141, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OCTOSPI1 = 92, - OCTOSPI2 = 150, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_AVD = 1, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI4 = 146, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TAMP_STAMP = 2, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM23 = 161, - TIM24 = 162, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - UART9 = 155, - USART1 = 37, - USART10 = 156, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(ADC3); - declare!(BDMA_Channel0); - declare!(BDMA_Channel1); - declare!(BDMA_Channel2); - declare!(BDMA_Channel3); - declare!(BDMA_Channel4); - declare!(BDMA_Channel5); - declare!(BDMA_Channel6); - declare!(BDMA_Channel7); - declare!(CEC); - declare!(CORDIC); - declare!(CRS); - declare!(DCMI_PSSI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(DTS); - declare!(ECC); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN3_IT0); - declare!(FDCAN3_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMAC); - declare!(FMC); - declare!(FPU); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(I2C5_ER); - declare!(I2C5_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPTIM4); - declare!(LPTIM5); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_AVD); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI4); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM23); - declare!(TIM24); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(UART9); - declare!(USART1); - declare!(USART10); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn ADC3(); - fn BDMA_Channel0(); - fn BDMA_Channel1(); - fn BDMA_Channel2(); - fn BDMA_Channel3(); - fn BDMA_Channel4(); - fn BDMA_Channel5(); - fn BDMA_Channel6(); - fn BDMA_Channel7(); - fn CEC(); - fn CORDIC(); - fn CRS(); - fn DCMI_PSSI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn DTS(); - fn ECC(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN3_IT0(); - fn FDCAN3_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMAC(); - fn FMC(); - fn FPU(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn I2C5_ER(); - fn I2C5_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPTIM4(); - fn LPTIM5(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_AVD(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI4(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM23(); - fn TIM24(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn UART9(); - fn USART1(); - fn USART10(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 163] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_AVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { - _handler: DCMI_PSSI, - }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _reserved: 0 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _reserved: 0 }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: ADC3 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA_Channel0, - }, - Vector { - _handler: BDMA_Channel1, - }, - Vector { - _handler: BDMA_Channel2, - }, - Vector { - _handler: BDMA_Channel3, - }, - Vector { - _handler: BDMA_Channel4, - }, - Vector { - _handler: BDMA_Channel5, - }, - Vector { - _handler: BDMA_Channel6, - }, - Vector { - _handler: BDMA_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: LPTIM4 }, - Vector { _handler: LPTIM5 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _handler: SAI4 }, - Vector { _handler: DTS }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - Vector { _handler: OCTOSPI2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: FMAC }, - Vector { _handler: CORDIC }, - Vector { _handler: UART9 }, - Vector { _handler: USART10 }, - Vector { _handler: I2C5_EV }, - Vector { _handler: I2C5_ER }, - Vector { - _handler: FDCAN3_IT0, - }, - Vector { - _handler: FDCAN3_IT1, - }, - Vector { _handler: TIM23 }, - Vector { _handler: TIM24 }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -impl_rng!(0x48021800); -impl_sdmmc!(SDMMC1, 0x52007000); -impl_sdmmc_pin!(SDMMC1, D0Pin, PB13, 12); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -impl_sdmmc!(SDMMC2, 0x48022400); -impl_sdmmc_pin!(SDMMC2, CmdPin, PA0, 9); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D1Pin, PG10, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); -impl_sdmmc_pin!(SDMMC2, D3Pin, PG12, 10); -impl_sdmmc_pin!(SDMMC2, D6Pin, PG13, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PG14, 10); -impl_sdmmc_pin!(SDMMC2, D0Pin, PG9, 11); diff --git a/embassy-stm32/src/chip/stm32h725ve.rs b/embassy-stm32/src/chip/stm32h725ve.rs deleted file mode 100644 index ff8a58db..00000000 --- a/embassy-stm32/src/chip/stm32h725ve.rs +++ /dev/null @@ -1,885 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, ADC3, BDMA, COMP1, COMP2, CORDIC, DAC1, DCMI, DMA2D, DTS, - ETH, FDCAN1, FDCAN2, FDCAN3, FMAC, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, - PA11, PA12, PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, - PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, - PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, - PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, - PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, - PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, - PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, PJ0, PJ1, PJ2, PJ3, - PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, PJ10, PJ11, PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, - PK6, PK7, PK8, PK9, PK10, PK11, PK12, PK13, PK14, PK15, I2C1, I2C2, I2C3, I2C4, I2C5, IWDG1, - LPTIM1, LPTIM2, LPTIM3, LPTIM4, LPTIM5, LPUART1, LTDC, MDIOS, MDMA, OCTOSPI1, OCTOSPI2, - OCTOSPIM, OPAMP1, OPAMP2, PSSI, PWR, RCC, RNG, RTC, SAI1, SAI4, SDMMC1, SDMMC2, SPI1, SPI2, - SPI3, SPI4, SPI6, SWPMI1, SYSCFG, TIM1, TIM12, TIM13, TIM14, TIM15, TIM16, TIM17, TIM2, TIM23, - TIM24, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, UART4, UART5, UART7, UART8, USART1, USART2, USART3, - USART6, USB_OTG_HS, VREFBUF, WWDG1 -); -pub const GPIO_BASE: usize = 0x58020000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC = 18, - ADC3 = 127, - BDMA_Channel0 = 129, - BDMA_Channel1 = 130, - BDMA_Channel2 = 131, - BDMA_Channel3 = 132, - BDMA_Channel4 = 133, - BDMA_Channel5 = 134, - BDMA_Channel6 = 135, - BDMA_Channel7 = 136, - CEC = 94, - CORDIC = 154, - CRS = 144, - DCMI_PSSI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - DTS = 147, - ECC = 145, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN3_IT0 = 159, - FDCAN3_IT1 = 160, - FDCAN_CAL = 63, - FLASH = 4, - FMAC = 153, - FMC = 48, - FPU = 81, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - I2C5_ER = 158, - I2C5_EV = 157, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPTIM4 = 140, - LPTIM5 = 141, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OCTOSPI1 = 92, - OCTOSPI2 = 150, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_AVD = 1, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI4 = 146, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TAMP_STAMP = 2, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM23 = 161, - TIM24 = 162, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - UART9 = 155, - USART1 = 37, - USART10 = 156, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(ADC3); - declare!(BDMA_Channel0); - declare!(BDMA_Channel1); - declare!(BDMA_Channel2); - declare!(BDMA_Channel3); - declare!(BDMA_Channel4); - declare!(BDMA_Channel5); - declare!(BDMA_Channel6); - declare!(BDMA_Channel7); - declare!(CEC); - declare!(CORDIC); - declare!(CRS); - declare!(DCMI_PSSI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(DTS); - declare!(ECC); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN3_IT0); - declare!(FDCAN3_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMAC); - declare!(FMC); - declare!(FPU); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(I2C5_ER); - declare!(I2C5_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPTIM4); - declare!(LPTIM5); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_AVD); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI4); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM23); - declare!(TIM24); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(UART9); - declare!(USART1); - declare!(USART10); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn ADC3(); - fn BDMA_Channel0(); - fn BDMA_Channel1(); - fn BDMA_Channel2(); - fn BDMA_Channel3(); - fn BDMA_Channel4(); - fn BDMA_Channel5(); - fn BDMA_Channel6(); - fn BDMA_Channel7(); - fn CEC(); - fn CORDIC(); - fn CRS(); - fn DCMI_PSSI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn DTS(); - fn ECC(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN3_IT0(); - fn FDCAN3_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMAC(); - fn FMC(); - fn FPU(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn I2C5_ER(); - fn I2C5_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPTIM4(); - fn LPTIM5(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_AVD(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI4(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM23(); - fn TIM24(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn UART9(); - fn USART1(); - fn USART10(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 163] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_AVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { - _handler: DCMI_PSSI, - }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _reserved: 0 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _reserved: 0 }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: ADC3 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA_Channel0, - }, - Vector { - _handler: BDMA_Channel1, - }, - Vector { - _handler: BDMA_Channel2, - }, - Vector { - _handler: BDMA_Channel3, - }, - Vector { - _handler: BDMA_Channel4, - }, - Vector { - _handler: BDMA_Channel5, - }, - Vector { - _handler: BDMA_Channel6, - }, - Vector { - _handler: BDMA_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: LPTIM4 }, - Vector { _handler: LPTIM5 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _handler: SAI4 }, - Vector { _handler: DTS }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - Vector { _handler: OCTOSPI2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: FMAC }, - Vector { _handler: CORDIC }, - Vector { _handler: UART9 }, - Vector { _handler: USART10 }, - Vector { _handler: I2C5_EV }, - Vector { _handler: I2C5_ER }, - Vector { - _handler: FDCAN3_IT0, - }, - Vector { - _handler: FDCAN3_IT1, - }, - Vector { _handler: TIM23 }, - Vector { _handler: TIM24 }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -impl_rng!(0x48021800); -impl_sdmmc!(SDMMC1, 0x52007000); -impl_sdmmc_pin!(SDMMC1, D0Pin, PB13, 12); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -impl_sdmmc!(SDMMC2, 0x48022400); -impl_sdmmc_pin!(SDMMC2, CmdPin, PA0, 9); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D1Pin, PG10, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); -impl_sdmmc_pin!(SDMMC2, D3Pin, PG12, 10); -impl_sdmmc_pin!(SDMMC2, D6Pin, PG13, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PG14, 10); -impl_sdmmc_pin!(SDMMC2, D0Pin, PG9, 11); diff --git a/embassy-stm32/src/chip/stm32h725vg.rs b/embassy-stm32/src/chip/stm32h725vg.rs deleted file mode 100644 index b9604da9..00000000 --- a/embassy-stm32/src/chip/stm32h725vg.rs +++ /dev/null @@ -1,885 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, ADC3, BDMA, COMP1, COMP2, CORDIC, DAC1, DCMI, DMA2D, DTS, - ETH, FDCAN1, FDCAN2, FDCAN3, FMAC, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, - PA11, PA12, PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, - PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, - PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, - PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, - PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, - PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, - PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, PJ0, PJ1, PJ2, PJ3, - PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, PJ10, PJ11, PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, - PK6, PK7, PK8, PK9, PK10, PK11, PK12, PK13, PK14, PK15, I2C1, I2C2, I2C3, I2C4, I2C5, IWDG1, - LPTIM1, LPTIM2, LPTIM3, LPTIM4, LPTIM5, LPUART1, LTDC, MDIOS, MDMA, OCTOSPI1, OCTOSPI2, - OCTOSPIM, OPAMP1, OPAMP2, PSSI, PWR, RCC, RNG, RTC, SAI1, SAI4, SDMMC1, SDMMC2, SPI1, SPI2, - SPI3, SPI4, SPI6, SWPMI1, SYSCFG, TIM1, TIM12, TIM13, TIM14, TIM15, TIM16, TIM17, TIM2, TIM23, - TIM24, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, UART4, UART5, UART7, UART8, UART9, USART1, USART2, - USART3, USART6, USB_OTG_HS, VREFBUF, WWDG1 -); -pub const GPIO_BASE: usize = 0x58020000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC = 18, - ADC3 = 127, - BDMA_Channel0 = 129, - BDMA_Channel1 = 130, - BDMA_Channel2 = 131, - BDMA_Channel3 = 132, - BDMA_Channel4 = 133, - BDMA_Channel5 = 134, - BDMA_Channel6 = 135, - BDMA_Channel7 = 136, - CEC = 94, - CORDIC = 154, - CRS = 144, - DCMI_PSSI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - DTS = 147, - ECC = 145, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN3_IT0 = 159, - FDCAN3_IT1 = 160, - FDCAN_CAL = 63, - FLASH = 4, - FMAC = 153, - FMC = 48, - FPU = 81, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - I2C5_ER = 158, - I2C5_EV = 157, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPTIM4 = 140, - LPTIM5 = 141, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OCTOSPI1 = 92, - OCTOSPI2 = 150, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_AVD = 1, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI4 = 146, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TAMP_STAMP = 2, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM23 = 161, - TIM24 = 162, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - UART9 = 155, - USART1 = 37, - USART10 = 156, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(ADC3); - declare!(BDMA_Channel0); - declare!(BDMA_Channel1); - declare!(BDMA_Channel2); - declare!(BDMA_Channel3); - declare!(BDMA_Channel4); - declare!(BDMA_Channel5); - declare!(BDMA_Channel6); - declare!(BDMA_Channel7); - declare!(CEC); - declare!(CORDIC); - declare!(CRS); - declare!(DCMI_PSSI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(DTS); - declare!(ECC); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN3_IT0); - declare!(FDCAN3_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMAC); - declare!(FMC); - declare!(FPU); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(I2C5_ER); - declare!(I2C5_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPTIM4); - declare!(LPTIM5); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_AVD); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI4); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM23); - declare!(TIM24); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(UART9); - declare!(USART1); - declare!(USART10); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn ADC3(); - fn BDMA_Channel0(); - fn BDMA_Channel1(); - fn BDMA_Channel2(); - fn BDMA_Channel3(); - fn BDMA_Channel4(); - fn BDMA_Channel5(); - fn BDMA_Channel6(); - fn BDMA_Channel7(); - fn CEC(); - fn CORDIC(); - fn CRS(); - fn DCMI_PSSI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn DTS(); - fn ECC(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN3_IT0(); - fn FDCAN3_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMAC(); - fn FMC(); - fn FPU(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn I2C5_ER(); - fn I2C5_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPTIM4(); - fn LPTIM5(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_AVD(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI4(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM23(); - fn TIM24(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn UART9(); - fn USART1(); - fn USART10(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 163] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_AVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { - _handler: DCMI_PSSI, - }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _reserved: 0 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _reserved: 0 }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: ADC3 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA_Channel0, - }, - Vector { - _handler: BDMA_Channel1, - }, - Vector { - _handler: BDMA_Channel2, - }, - Vector { - _handler: BDMA_Channel3, - }, - Vector { - _handler: BDMA_Channel4, - }, - Vector { - _handler: BDMA_Channel5, - }, - Vector { - _handler: BDMA_Channel6, - }, - Vector { - _handler: BDMA_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: LPTIM4 }, - Vector { _handler: LPTIM5 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _handler: SAI4 }, - Vector { _handler: DTS }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - Vector { _handler: OCTOSPI2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: FMAC }, - Vector { _handler: CORDIC }, - Vector { _handler: UART9 }, - Vector { _handler: USART10 }, - Vector { _handler: I2C5_EV }, - Vector { _handler: I2C5_ER }, - Vector { - _handler: FDCAN3_IT0, - }, - Vector { - _handler: FDCAN3_IT1, - }, - Vector { _handler: TIM23 }, - Vector { _handler: TIM24 }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -impl_rng!(0x48021800); -impl_sdmmc!(SDMMC1, 0x52007000); -impl_sdmmc_pin!(SDMMC1, D0Pin, PB13, 12); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -impl_sdmmc!(SDMMC2, 0x48022400); -impl_sdmmc_pin!(SDMMC2, CmdPin, PA0, 9); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D1Pin, PG10, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); -impl_sdmmc_pin!(SDMMC2, D3Pin, PG12, 10); -impl_sdmmc_pin!(SDMMC2, D6Pin, PG13, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PG14, 10); -impl_sdmmc_pin!(SDMMC2, D0Pin, PG9, 11); diff --git a/embassy-stm32/src/chip/stm32h725ze.rs b/embassy-stm32/src/chip/stm32h725ze.rs deleted file mode 100644 index 256d7b48..00000000 --- a/embassy-stm32/src/chip/stm32h725ze.rs +++ /dev/null @@ -1,885 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, ADC3, BDMA, COMP1, COMP2, CORDIC, DAC1, DCMI, DMA2D, DTS, - ETH, FDCAN1, FDCAN2, FDCAN3, FMAC, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, - PA11, PA12, PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, - PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, - PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, - PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, - PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, - PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, - PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, PJ0, PJ1, PJ2, PJ3, - PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, PJ10, PJ11, PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, - PK6, PK7, PK8, PK9, PK10, PK11, PK12, PK13, PK14, PK15, I2C1, I2C2, I2C3, I2C4, I2C5, IWDG1, - LPTIM1, LPTIM2, LPTIM3, LPTIM4, LPTIM5, LPUART1, LTDC, MDIOS, MDMA, OCTOSPI1, OCTOSPI2, - OCTOSPIM, OPAMP1, OPAMP2, PSSI, PWR, RCC, RNG, RTC, SAI1, SAI4, SDMMC1, SDMMC2, SPI1, SPI2, - SPI3, SPI4, SPI5, SPI6, SWPMI1, SYSCFG, TIM1, TIM12, TIM13, TIM14, TIM15, TIM16, TIM17, TIM2, - TIM23, TIM24, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, UART4, UART5, UART7, UART8, UART9, USART1, - USART10, USART2, USART3, USART6, USB_OTG_HS, VREFBUF, WWDG1 -); -pub const GPIO_BASE: usize = 0x58020000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC = 18, - ADC3 = 127, - BDMA_Channel0 = 129, - BDMA_Channel1 = 130, - BDMA_Channel2 = 131, - BDMA_Channel3 = 132, - BDMA_Channel4 = 133, - BDMA_Channel5 = 134, - BDMA_Channel6 = 135, - BDMA_Channel7 = 136, - CEC = 94, - CORDIC = 154, - CRS = 144, - DCMI_PSSI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - DTS = 147, - ECC = 145, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN3_IT0 = 159, - FDCAN3_IT1 = 160, - FDCAN_CAL = 63, - FLASH = 4, - FMAC = 153, - FMC = 48, - FPU = 81, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - I2C5_ER = 158, - I2C5_EV = 157, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPTIM4 = 140, - LPTIM5 = 141, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OCTOSPI1 = 92, - OCTOSPI2 = 150, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_AVD = 1, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI4 = 146, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TAMP_STAMP = 2, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM23 = 161, - TIM24 = 162, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - UART9 = 155, - USART1 = 37, - USART10 = 156, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(ADC3); - declare!(BDMA_Channel0); - declare!(BDMA_Channel1); - declare!(BDMA_Channel2); - declare!(BDMA_Channel3); - declare!(BDMA_Channel4); - declare!(BDMA_Channel5); - declare!(BDMA_Channel6); - declare!(BDMA_Channel7); - declare!(CEC); - declare!(CORDIC); - declare!(CRS); - declare!(DCMI_PSSI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(DTS); - declare!(ECC); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN3_IT0); - declare!(FDCAN3_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMAC); - declare!(FMC); - declare!(FPU); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(I2C5_ER); - declare!(I2C5_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPTIM4); - declare!(LPTIM5); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_AVD); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI4); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM23); - declare!(TIM24); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(UART9); - declare!(USART1); - declare!(USART10); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn ADC3(); - fn BDMA_Channel0(); - fn BDMA_Channel1(); - fn BDMA_Channel2(); - fn BDMA_Channel3(); - fn BDMA_Channel4(); - fn BDMA_Channel5(); - fn BDMA_Channel6(); - fn BDMA_Channel7(); - fn CEC(); - fn CORDIC(); - fn CRS(); - fn DCMI_PSSI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn DTS(); - fn ECC(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN3_IT0(); - fn FDCAN3_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMAC(); - fn FMC(); - fn FPU(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn I2C5_ER(); - fn I2C5_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPTIM4(); - fn LPTIM5(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_AVD(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI4(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM23(); - fn TIM24(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn UART9(); - fn USART1(); - fn USART10(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 163] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_AVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { - _handler: DCMI_PSSI, - }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _reserved: 0 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _reserved: 0 }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: ADC3 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA_Channel0, - }, - Vector { - _handler: BDMA_Channel1, - }, - Vector { - _handler: BDMA_Channel2, - }, - Vector { - _handler: BDMA_Channel3, - }, - Vector { - _handler: BDMA_Channel4, - }, - Vector { - _handler: BDMA_Channel5, - }, - Vector { - _handler: BDMA_Channel6, - }, - Vector { - _handler: BDMA_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: LPTIM4 }, - Vector { _handler: LPTIM5 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _handler: SAI4 }, - Vector { _handler: DTS }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - Vector { _handler: OCTOSPI2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: FMAC }, - Vector { _handler: CORDIC }, - Vector { _handler: UART9 }, - Vector { _handler: USART10 }, - Vector { _handler: I2C5_EV }, - Vector { _handler: I2C5_ER }, - Vector { - _handler: FDCAN3_IT0, - }, - Vector { - _handler: FDCAN3_IT1, - }, - Vector { _handler: TIM23 }, - Vector { _handler: TIM24 }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -impl_rng!(0x48021800); -impl_sdmmc!(SDMMC1, 0x52007000); -impl_sdmmc_pin!(SDMMC1, D0Pin, PB13, 12); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -impl_sdmmc!(SDMMC2, 0x48022400); -impl_sdmmc_pin!(SDMMC2, CmdPin, PA0, 9); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D1Pin, PG10, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); -impl_sdmmc_pin!(SDMMC2, D3Pin, PG12, 10); -impl_sdmmc_pin!(SDMMC2, D6Pin, PG13, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PG14, 10); -impl_sdmmc_pin!(SDMMC2, D0Pin, PG9, 11); diff --git a/embassy-stm32/src/chip/stm32h725zg.rs b/embassy-stm32/src/chip/stm32h725zg.rs deleted file mode 100644 index 256d7b48..00000000 --- a/embassy-stm32/src/chip/stm32h725zg.rs +++ /dev/null @@ -1,885 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, ADC3, BDMA, COMP1, COMP2, CORDIC, DAC1, DCMI, DMA2D, DTS, - ETH, FDCAN1, FDCAN2, FDCAN3, FMAC, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, - PA11, PA12, PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, - PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, - PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, - PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, - PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, - PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, - PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, PJ0, PJ1, PJ2, PJ3, - PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, PJ10, PJ11, PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, - PK6, PK7, PK8, PK9, PK10, PK11, PK12, PK13, PK14, PK15, I2C1, I2C2, I2C3, I2C4, I2C5, IWDG1, - LPTIM1, LPTIM2, LPTIM3, LPTIM4, LPTIM5, LPUART1, LTDC, MDIOS, MDMA, OCTOSPI1, OCTOSPI2, - OCTOSPIM, OPAMP1, OPAMP2, PSSI, PWR, RCC, RNG, RTC, SAI1, SAI4, SDMMC1, SDMMC2, SPI1, SPI2, - SPI3, SPI4, SPI5, SPI6, SWPMI1, SYSCFG, TIM1, TIM12, TIM13, TIM14, TIM15, TIM16, TIM17, TIM2, - TIM23, TIM24, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, UART4, UART5, UART7, UART8, UART9, USART1, - USART10, USART2, USART3, USART6, USB_OTG_HS, VREFBUF, WWDG1 -); -pub const GPIO_BASE: usize = 0x58020000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC = 18, - ADC3 = 127, - BDMA_Channel0 = 129, - BDMA_Channel1 = 130, - BDMA_Channel2 = 131, - BDMA_Channel3 = 132, - BDMA_Channel4 = 133, - BDMA_Channel5 = 134, - BDMA_Channel6 = 135, - BDMA_Channel7 = 136, - CEC = 94, - CORDIC = 154, - CRS = 144, - DCMI_PSSI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - DTS = 147, - ECC = 145, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN3_IT0 = 159, - FDCAN3_IT1 = 160, - FDCAN_CAL = 63, - FLASH = 4, - FMAC = 153, - FMC = 48, - FPU = 81, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - I2C5_ER = 158, - I2C5_EV = 157, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPTIM4 = 140, - LPTIM5 = 141, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OCTOSPI1 = 92, - OCTOSPI2 = 150, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_AVD = 1, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI4 = 146, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TAMP_STAMP = 2, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM23 = 161, - TIM24 = 162, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - UART9 = 155, - USART1 = 37, - USART10 = 156, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(ADC3); - declare!(BDMA_Channel0); - declare!(BDMA_Channel1); - declare!(BDMA_Channel2); - declare!(BDMA_Channel3); - declare!(BDMA_Channel4); - declare!(BDMA_Channel5); - declare!(BDMA_Channel6); - declare!(BDMA_Channel7); - declare!(CEC); - declare!(CORDIC); - declare!(CRS); - declare!(DCMI_PSSI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(DTS); - declare!(ECC); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN3_IT0); - declare!(FDCAN3_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMAC); - declare!(FMC); - declare!(FPU); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(I2C5_ER); - declare!(I2C5_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPTIM4); - declare!(LPTIM5); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_AVD); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI4); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM23); - declare!(TIM24); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(UART9); - declare!(USART1); - declare!(USART10); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn ADC3(); - fn BDMA_Channel0(); - fn BDMA_Channel1(); - fn BDMA_Channel2(); - fn BDMA_Channel3(); - fn BDMA_Channel4(); - fn BDMA_Channel5(); - fn BDMA_Channel6(); - fn BDMA_Channel7(); - fn CEC(); - fn CORDIC(); - fn CRS(); - fn DCMI_PSSI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn DTS(); - fn ECC(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN3_IT0(); - fn FDCAN3_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMAC(); - fn FMC(); - fn FPU(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn I2C5_ER(); - fn I2C5_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPTIM4(); - fn LPTIM5(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_AVD(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI4(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM23(); - fn TIM24(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn UART9(); - fn USART1(); - fn USART10(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 163] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_AVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { - _handler: DCMI_PSSI, - }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _reserved: 0 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _reserved: 0 }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: ADC3 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA_Channel0, - }, - Vector { - _handler: BDMA_Channel1, - }, - Vector { - _handler: BDMA_Channel2, - }, - Vector { - _handler: BDMA_Channel3, - }, - Vector { - _handler: BDMA_Channel4, - }, - Vector { - _handler: BDMA_Channel5, - }, - Vector { - _handler: BDMA_Channel6, - }, - Vector { - _handler: BDMA_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: LPTIM4 }, - Vector { _handler: LPTIM5 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _handler: SAI4 }, - Vector { _handler: DTS }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - Vector { _handler: OCTOSPI2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: FMAC }, - Vector { _handler: CORDIC }, - Vector { _handler: UART9 }, - Vector { _handler: USART10 }, - Vector { _handler: I2C5_EV }, - Vector { _handler: I2C5_ER }, - Vector { - _handler: FDCAN3_IT0, - }, - Vector { - _handler: FDCAN3_IT1, - }, - Vector { _handler: TIM23 }, - Vector { _handler: TIM24 }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -impl_rng!(0x48021800); -impl_sdmmc!(SDMMC1, 0x52007000); -impl_sdmmc_pin!(SDMMC1, D0Pin, PB13, 12); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -impl_sdmmc!(SDMMC2, 0x48022400); -impl_sdmmc_pin!(SDMMC2, CmdPin, PA0, 9); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D1Pin, PG10, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); -impl_sdmmc_pin!(SDMMC2, D3Pin, PG12, 10); -impl_sdmmc_pin!(SDMMC2, D6Pin, PG13, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PG14, 10); -impl_sdmmc_pin!(SDMMC2, D0Pin, PG9, 11); diff --git a/embassy-stm32/src/chip/stm32h730ab.rs b/embassy-stm32/src/chip/stm32h730ab.rs deleted file mode 100644 index 2a14ee4f..00000000 --- a/embassy-stm32/src/chip/stm32h730ab.rs +++ /dev/null @@ -1,894 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, ADC3, BDMA, COMP1, COMP2, CORDIC, CRYP, DAC1, DCMI, DMA2D, - DTS, ETH, FDCAN1, FDCAN2, FDCAN3, FMAC, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, - PA11, PA12, PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, - PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, - PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, - PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, - PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, - PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, - PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, PJ0, PJ1, PJ2, PJ3, - PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, PJ10, PJ11, PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, - PK6, PK7, PK8, PK9, PK10, PK11, PK12, PK13, PK14, PK15, HASH, I2C1, I2C2, I2C3, I2C4, I2C5, - IWDG1, LPTIM1, LPTIM2, LPTIM3, LPTIM4, LPTIM5, LPUART1, LTDC, MDIOS, MDMA, OCTOSPI1, OCTOSPI2, - OCTOSPIM, OPAMP1, OPAMP2, OTFDEC1, OTFDEC2, PSSI, PWR, RCC, RNG, RTC, SAI1, SAI4, SDMMC1, - SDMMC2, SPI1, SPI2, SPI3, SPI4, SPI5, SPI6, SWPMI1, SYSCFG, TIM1, TIM12, TIM13, TIM14, TIM15, - TIM16, TIM17, TIM2, TIM23, TIM24, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, UART4, UART5, UART7, - UART8, UART9, USART1, USART2, USART3, USART6, USB_OTG_HS, VREFBUF, WWDG1 -); -pub const GPIO_BASE: usize = 0x58020000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC = 18, - ADC3 = 127, - BDMA_Channel0 = 129, - BDMA_Channel1 = 130, - BDMA_Channel2 = 131, - BDMA_Channel3 = 132, - BDMA_Channel4 = 133, - BDMA_Channel5 = 134, - BDMA_Channel6 = 135, - BDMA_Channel7 = 136, - CEC = 94, - CORDIC = 154, - CRS = 144, - CRYP = 79, - DCMI_PSSI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - DTS = 147, - ECC = 145, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN3_IT0 = 159, - FDCAN3_IT1 = 160, - FDCAN_CAL = 63, - FLASH = 4, - FMAC = 153, - FMC = 48, - FPU = 81, - HASH_RNG = 80, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - I2C5_ER = 158, - I2C5_EV = 157, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPTIM4 = 140, - LPTIM5 = 141, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OCTOSPI1 = 92, - OCTOSPI2 = 150, - OTFDEC1 = 151, - OTFDEC2 = 152, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_AVD = 1, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI4 = 146, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TAMP_STAMP = 2, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM23 = 161, - TIM24 = 162, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - UART9 = 155, - USART1 = 37, - USART10 = 156, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(ADC3); - declare!(BDMA_Channel0); - declare!(BDMA_Channel1); - declare!(BDMA_Channel2); - declare!(BDMA_Channel3); - declare!(BDMA_Channel4); - declare!(BDMA_Channel5); - declare!(BDMA_Channel6); - declare!(BDMA_Channel7); - declare!(CEC); - declare!(CORDIC); - declare!(CRS); - declare!(CRYP); - declare!(DCMI_PSSI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(DTS); - declare!(ECC); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN3_IT0); - declare!(FDCAN3_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMAC); - declare!(FMC); - declare!(FPU); - declare!(HASH_RNG); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(I2C5_ER); - declare!(I2C5_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPTIM4); - declare!(LPTIM5); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTFDEC1); - declare!(OTFDEC2); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_AVD); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI4); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM23); - declare!(TIM24); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(UART9); - declare!(USART1); - declare!(USART10); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn ADC3(); - fn BDMA_Channel0(); - fn BDMA_Channel1(); - fn BDMA_Channel2(); - fn BDMA_Channel3(); - fn BDMA_Channel4(); - fn BDMA_Channel5(); - fn BDMA_Channel6(); - fn BDMA_Channel7(); - fn CEC(); - fn CORDIC(); - fn CRS(); - fn CRYP(); - fn DCMI_PSSI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn DTS(); - fn ECC(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN3_IT0(); - fn FDCAN3_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMAC(); - fn FMC(); - fn FPU(); - fn HASH_RNG(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn I2C5_ER(); - fn I2C5_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPTIM4(); - fn LPTIM5(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTFDEC1(); - fn OTFDEC2(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_AVD(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI4(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM23(); - fn TIM24(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn UART9(); - fn USART1(); - fn USART10(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 163] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_AVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { - _handler: DCMI_PSSI, - }, - Vector { _handler: CRYP }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _reserved: 0 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _reserved: 0 }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: ADC3 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA_Channel0, - }, - Vector { - _handler: BDMA_Channel1, - }, - Vector { - _handler: BDMA_Channel2, - }, - Vector { - _handler: BDMA_Channel3, - }, - Vector { - _handler: BDMA_Channel4, - }, - Vector { - _handler: BDMA_Channel5, - }, - Vector { - _handler: BDMA_Channel6, - }, - Vector { - _handler: BDMA_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: LPTIM4 }, - Vector { _handler: LPTIM5 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _handler: SAI4 }, - Vector { _handler: DTS }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - Vector { _handler: OCTOSPI2 }, - Vector { _handler: OTFDEC1 }, - Vector { _handler: OTFDEC2 }, - Vector { _handler: FMAC }, - Vector { _handler: CORDIC }, - Vector { _handler: UART9 }, - Vector { _handler: USART10 }, - Vector { _handler: I2C5_EV }, - Vector { _handler: I2C5_ER }, - Vector { - _handler: FDCAN3_IT0, - }, - Vector { - _handler: FDCAN3_IT1, - }, - Vector { _handler: TIM23 }, - Vector { _handler: TIM24 }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -impl_rng!(0x48021800); -impl_sdmmc!(SDMMC1, 0x52007000); -impl_sdmmc_pin!(SDMMC1, D0Pin, PB13, 12); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -impl_sdmmc!(SDMMC2, 0x48022400); -impl_sdmmc_pin!(SDMMC2, CmdPin, PA0, 9); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D1Pin, PG10, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); -impl_sdmmc_pin!(SDMMC2, D3Pin, PG12, 10); -impl_sdmmc_pin!(SDMMC2, D6Pin, PG13, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PG14, 10); -impl_sdmmc_pin!(SDMMC2, D0Pin, PG9, 11); diff --git a/embassy-stm32/src/chip/stm32h730ib.rs b/embassy-stm32/src/chip/stm32h730ib.rs deleted file mode 100644 index 696b1231..00000000 --- a/embassy-stm32/src/chip/stm32h730ib.rs +++ /dev/null @@ -1,894 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, ADC3, BDMA, COMP1, COMP2, CORDIC, CRYP, DAC1, DCMI, DMA2D, - DTS, ETH, FDCAN1, FDCAN2, FDCAN3, FMAC, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, - PA11, PA12, PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, - PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, - PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, - PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, - PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, - PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, - PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, PJ0, PJ1, PJ2, PJ3, - PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, PJ10, PJ11, PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, - PK6, PK7, PK8, PK9, PK10, PK11, PK12, PK13, PK14, PK15, HASH, I2C1, I2C2, I2C3, I2C4, I2C5, - IWDG1, LPTIM1, LPTIM2, LPTIM3, LPTIM4, LPTIM5, LPUART1, LTDC, MDIOS, MDMA, OCTOSPI1, OCTOSPI2, - OCTOSPIM, OPAMP1, OPAMP2, OTFDEC1, OTFDEC2, PSSI, PWR, RCC, RNG, RTC, SAI1, SAI4, SDMMC1, - SDMMC2, SPI1, SPI2, SPI3, SPI4, SPI5, SPI6, SWPMI1, SYSCFG, TIM1, TIM12, TIM13, TIM14, TIM15, - TIM16, TIM17, TIM2, TIM23, TIM24, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, UART4, UART5, UART7, - UART8, UART9, USART1, USART10, USART2, USART3, USART6, USB_OTG_HS, VREFBUF, WWDG1 -); -pub const GPIO_BASE: usize = 0x58020000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC = 18, - ADC3 = 127, - BDMA_Channel0 = 129, - BDMA_Channel1 = 130, - BDMA_Channel2 = 131, - BDMA_Channel3 = 132, - BDMA_Channel4 = 133, - BDMA_Channel5 = 134, - BDMA_Channel6 = 135, - BDMA_Channel7 = 136, - CEC = 94, - CORDIC = 154, - CRS = 144, - CRYP = 79, - DCMI_PSSI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - DTS = 147, - ECC = 145, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN3_IT0 = 159, - FDCAN3_IT1 = 160, - FDCAN_CAL = 63, - FLASH = 4, - FMAC = 153, - FMC = 48, - FPU = 81, - HASH_RNG = 80, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - I2C5_ER = 158, - I2C5_EV = 157, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPTIM4 = 140, - LPTIM5 = 141, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OCTOSPI1 = 92, - OCTOSPI2 = 150, - OTFDEC1 = 151, - OTFDEC2 = 152, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_AVD = 1, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI4 = 146, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TAMP_STAMP = 2, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM23 = 161, - TIM24 = 162, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - UART9 = 155, - USART1 = 37, - USART10 = 156, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(ADC3); - declare!(BDMA_Channel0); - declare!(BDMA_Channel1); - declare!(BDMA_Channel2); - declare!(BDMA_Channel3); - declare!(BDMA_Channel4); - declare!(BDMA_Channel5); - declare!(BDMA_Channel6); - declare!(BDMA_Channel7); - declare!(CEC); - declare!(CORDIC); - declare!(CRS); - declare!(CRYP); - declare!(DCMI_PSSI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(DTS); - declare!(ECC); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN3_IT0); - declare!(FDCAN3_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMAC); - declare!(FMC); - declare!(FPU); - declare!(HASH_RNG); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(I2C5_ER); - declare!(I2C5_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPTIM4); - declare!(LPTIM5); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTFDEC1); - declare!(OTFDEC2); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_AVD); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI4); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM23); - declare!(TIM24); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(UART9); - declare!(USART1); - declare!(USART10); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn ADC3(); - fn BDMA_Channel0(); - fn BDMA_Channel1(); - fn BDMA_Channel2(); - fn BDMA_Channel3(); - fn BDMA_Channel4(); - fn BDMA_Channel5(); - fn BDMA_Channel6(); - fn BDMA_Channel7(); - fn CEC(); - fn CORDIC(); - fn CRS(); - fn CRYP(); - fn DCMI_PSSI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn DTS(); - fn ECC(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN3_IT0(); - fn FDCAN3_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMAC(); - fn FMC(); - fn FPU(); - fn HASH_RNG(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn I2C5_ER(); - fn I2C5_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPTIM4(); - fn LPTIM5(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTFDEC1(); - fn OTFDEC2(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_AVD(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI4(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM23(); - fn TIM24(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn UART9(); - fn USART1(); - fn USART10(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 163] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_AVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { - _handler: DCMI_PSSI, - }, - Vector { _handler: CRYP }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _reserved: 0 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _reserved: 0 }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: ADC3 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA_Channel0, - }, - Vector { - _handler: BDMA_Channel1, - }, - Vector { - _handler: BDMA_Channel2, - }, - Vector { - _handler: BDMA_Channel3, - }, - Vector { - _handler: BDMA_Channel4, - }, - Vector { - _handler: BDMA_Channel5, - }, - Vector { - _handler: BDMA_Channel6, - }, - Vector { - _handler: BDMA_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: LPTIM4 }, - Vector { _handler: LPTIM5 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _handler: SAI4 }, - Vector { _handler: DTS }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - Vector { _handler: OCTOSPI2 }, - Vector { _handler: OTFDEC1 }, - Vector { _handler: OTFDEC2 }, - Vector { _handler: FMAC }, - Vector { _handler: CORDIC }, - Vector { _handler: UART9 }, - Vector { _handler: USART10 }, - Vector { _handler: I2C5_EV }, - Vector { _handler: I2C5_ER }, - Vector { - _handler: FDCAN3_IT0, - }, - Vector { - _handler: FDCAN3_IT1, - }, - Vector { _handler: TIM23 }, - Vector { _handler: TIM24 }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -impl_rng!(0x48021800); -impl_sdmmc!(SDMMC1, 0x52007000); -impl_sdmmc_pin!(SDMMC1, D0Pin, PB13, 12); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -impl_sdmmc!(SDMMC2, 0x48022400); -impl_sdmmc_pin!(SDMMC2, CmdPin, PA0, 9); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D1Pin, PG10, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); -impl_sdmmc_pin!(SDMMC2, D3Pin, PG12, 10); -impl_sdmmc_pin!(SDMMC2, D6Pin, PG13, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PG14, 10); -impl_sdmmc_pin!(SDMMC2, D0Pin, PG9, 11); diff --git a/embassy-stm32/src/chip/stm32h730vb.rs b/embassy-stm32/src/chip/stm32h730vb.rs deleted file mode 100644 index ae3ede17..00000000 --- a/embassy-stm32/src/chip/stm32h730vb.rs +++ /dev/null @@ -1,894 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, ADC3, BDMA, COMP1, COMP2, CORDIC, CRYP, DAC1, DCMI, DMA2D, - DTS, ETH, FDCAN1, FDCAN2, FDCAN3, FMAC, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, - PA11, PA12, PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, - PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, - PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, - PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, - PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, - PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, - PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, PJ0, PJ1, PJ2, PJ3, - PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, PJ10, PJ11, PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, - PK6, PK7, PK8, PK9, PK10, PK11, PK12, PK13, PK14, PK15, HASH, I2C1, I2C2, I2C3, I2C4, I2C5, - IWDG1, LPTIM1, LPTIM2, LPTIM3, LPTIM4, LPTIM5, LPUART1, LTDC, MDIOS, MDMA, OCTOSPI1, OCTOSPI2, - OCTOSPIM, OPAMP1, OPAMP2, OTFDEC1, OTFDEC2, PSSI, PWR, RCC, RNG, RTC, SAI1, SAI4, SDMMC1, - SDMMC2, SPI1, SPI2, SPI3, SPI4, SPI6, SWPMI1, SYSCFG, TIM1, TIM12, TIM13, TIM14, TIM15, TIM16, - TIM17, TIM2, TIM23, TIM24, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, UART4, UART5, UART7, UART8, - UART9, USART1, USART10, USART2, USART3, USART6, USB_OTG_HS, VREFBUF, WWDG1 -); -pub const GPIO_BASE: usize = 0x58020000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC = 18, - ADC3 = 127, - BDMA_Channel0 = 129, - BDMA_Channel1 = 130, - BDMA_Channel2 = 131, - BDMA_Channel3 = 132, - BDMA_Channel4 = 133, - BDMA_Channel5 = 134, - BDMA_Channel6 = 135, - BDMA_Channel7 = 136, - CEC = 94, - CORDIC = 154, - CRS = 144, - CRYP = 79, - DCMI_PSSI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - DTS = 147, - ECC = 145, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN3_IT0 = 159, - FDCAN3_IT1 = 160, - FDCAN_CAL = 63, - FLASH = 4, - FMAC = 153, - FMC = 48, - FPU = 81, - HASH_RNG = 80, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - I2C5_ER = 158, - I2C5_EV = 157, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPTIM4 = 140, - LPTIM5 = 141, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OCTOSPI1 = 92, - OCTOSPI2 = 150, - OTFDEC1 = 151, - OTFDEC2 = 152, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_AVD = 1, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI4 = 146, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TAMP_STAMP = 2, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM23 = 161, - TIM24 = 162, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - UART9 = 155, - USART1 = 37, - USART10 = 156, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(ADC3); - declare!(BDMA_Channel0); - declare!(BDMA_Channel1); - declare!(BDMA_Channel2); - declare!(BDMA_Channel3); - declare!(BDMA_Channel4); - declare!(BDMA_Channel5); - declare!(BDMA_Channel6); - declare!(BDMA_Channel7); - declare!(CEC); - declare!(CORDIC); - declare!(CRS); - declare!(CRYP); - declare!(DCMI_PSSI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(DTS); - declare!(ECC); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN3_IT0); - declare!(FDCAN3_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMAC); - declare!(FMC); - declare!(FPU); - declare!(HASH_RNG); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(I2C5_ER); - declare!(I2C5_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPTIM4); - declare!(LPTIM5); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTFDEC1); - declare!(OTFDEC2); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_AVD); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI4); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM23); - declare!(TIM24); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(UART9); - declare!(USART1); - declare!(USART10); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn ADC3(); - fn BDMA_Channel0(); - fn BDMA_Channel1(); - fn BDMA_Channel2(); - fn BDMA_Channel3(); - fn BDMA_Channel4(); - fn BDMA_Channel5(); - fn BDMA_Channel6(); - fn BDMA_Channel7(); - fn CEC(); - fn CORDIC(); - fn CRS(); - fn CRYP(); - fn DCMI_PSSI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn DTS(); - fn ECC(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN3_IT0(); - fn FDCAN3_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMAC(); - fn FMC(); - fn FPU(); - fn HASH_RNG(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn I2C5_ER(); - fn I2C5_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPTIM4(); - fn LPTIM5(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTFDEC1(); - fn OTFDEC2(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_AVD(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI4(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM23(); - fn TIM24(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn UART9(); - fn USART1(); - fn USART10(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 163] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_AVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { - _handler: DCMI_PSSI, - }, - Vector { _handler: CRYP }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _reserved: 0 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _reserved: 0 }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: ADC3 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA_Channel0, - }, - Vector { - _handler: BDMA_Channel1, - }, - Vector { - _handler: BDMA_Channel2, - }, - Vector { - _handler: BDMA_Channel3, - }, - Vector { - _handler: BDMA_Channel4, - }, - Vector { - _handler: BDMA_Channel5, - }, - Vector { - _handler: BDMA_Channel6, - }, - Vector { - _handler: BDMA_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: LPTIM4 }, - Vector { _handler: LPTIM5 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _handler: SAI4 }, - Vector { _handler: DTS }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - Vector { _handler: OCTOSPI2 }, - Vector { _handler: OTFDEC1 }, - Vector { _handler: OTFDEC2 }, - Vector { _handler: FMAC }, - Vector { _handler: CORDIC }, - Vector { _handler: UART9 }, - Vector { _handler: USART10 }, - Vector { _handler: I2C5_EV }, - Vector { _handler: I2C5_ER }, - Vector { - _handler: FDCAN3_IT0, - }, - Vector { - _handler: FDCAN3_IT1, - }, - Vector { _handler: TIM23 }, - Vector { _handler: TIM24 }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -impl_rng!(0x48021800); -impl_sdmmc!(SDMMC1, 0x52007000); -impl_sdmmc_pin!(SDMMC1, D0Pin, PB13, 12); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -impl_sdmmc!(SDMMC2, 0x48022400); -impl_sdmmc_pin!(SDMMC2, CmdPin, PA0, 9); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D1Pin, PG10, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); -impl_sdmmc_pin!(SDMMC2, D3Pin, PG12, 10); -impl_sdmmc_pin!(SDMMC2, D6Pin, PG13, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PG14, 10); -impl_sdmmc_pin!(SDMMC2, D0Pin, PG9, 11); diff --git a/embassy-stm32/src/chip/stm32h730zb.rs b/embassy-stm32/src/chip/stm32h730zb.rs deleted file mode 100644 index 696b1231..00000000 --- a/embassy-stm32/src/chip/stm32h730zb.rs +++ /dev/null @@ -1,894 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, ADC3, BDMA, COMP1, COMP2, CORDIC, CRYP, DAC1, DCMI, DMA2D, - DTS, ETH, FDCAN1, FDCAN2, FDCAN3, FMAC, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, - PA11, PA12, PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, - PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, - PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, - PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, - PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, - PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, - PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, PJ0, PJ1, PJ2, PJ3, - PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, PJ10, PJ11, PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, - PK6, PK7, PK8, PK9, PK10, PK11, PK12, PK13, PK14, PK15, HASH, I2C1, I2C2, I2C3, I2C4, I2C5, - IWDG1, LPTIM1, LPTIM2, LPTIM3, LPTIM4, LPTIM5, LPUART1, LTDC, MDIOS, MDMA, OCTOSPI1, OCTOSPI2, - OCTOSPIM, OPAMP1, OPAMP2, OTFDEC1, OTFDEC2, PSSI, PWR, RCC, RNG, RTC, SAI1, SAI4, SDMMC1, - SDMMC2, SPI1, SPI2, SPI3, SPI4, SPI5, SPI6, SWPMI1, SYSCFG, TIM1, TIM12, TIM13, TIM14, TIM15, - TIM16, TIM17, TIM2, TIM23, TIM24, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, UART4, UART5, UART7, - UART8, UART9, USART1, USART10, USART2, USART3, USART6, USB_OTG_HS, VREFBUF, WWDG1 -); -pub const GPIO_BASE: usize = 0x58020000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC = 18, - ADC3 = 127, - BDMA_Channel0 = 129, - BDMA_Channel1 = 130, - BDMA_Channel2 = 131, - BDMA_Channel3 = 132, - BDMA_Channel4 = 133, - BDMA_Channel5 = 134, - BDMA_Channel6 = 135, - BDMA_Channel7 = 136, - CEC = 94, - CORDIC = 154, - CRS = 144, - CRYP = 79, - DCMI_PSSI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - DTS = 147, - ECC = 145, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN3_IT0 = 159, - FDCAN3_IT1 = 160, - FDCAN_CAL = 63, - FLASH = 4, - FMAC = 153, - FMC = 48, - FPU = 81, - HASH_RNG = 80, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - I2C5_ER = 158, - I2C5_EV = 157, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPTIM4 = 140, - LPTIM5 = 141, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OCTOSPI1 = 92, - OCTOSPI2 = 150, - OTFDEC1 = 151, - OTFDEC2 = 152, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_AVD = 1, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI4 = 146, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TAMP_STAMP = 2, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM23 = 161, - TIM24 = 162, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - UART9 = 155, - USART1 = 37, - USART10 = 156, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(ADC3); - declare!(BDMA_Channel0); - declare!(BDMA_Channel1); - declare!(BDMA_Channel2); - declare!(BDMA_Channel3); - declare!(BDMA_Channel4); - declare!(BDMA_Channel5); - declare!(BDMA_Channel6); - declare!(BDMA_Channel7); - declare!(CEC); - declare!(CORDIC); - declare!(CRS); - declare!(CRYP); - declare!(DCMI_PSSI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(DTS); - declare!(ECC); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN3_IT0); - declare!(FDCAN3_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMAC); - declare!(FMC); - declare!(FPU); - declare!(HASH_RNG); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(I2C5_ER); - declare!(I2C5_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPTIM4); - declare!(LPTIM5); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTFDEC1); - declare!(OTFDEC2); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_AVD); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI4); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM23); - declare!(TIM24); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(UART9); - declare!(USART1); - declare!(USART10); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn ADC3(); - fn BDMA_Channel0(); - fn BDMA_Channel1(); - fn BDMA_Channel2(); - fn BDMA_Channel3(); - fn BDMA_Channel4(); - fn BDMA_Channel5(); - fn BDMA_Channel6(); - fn BDMA_Channel7(); - fn CEC(); - fn CORDIC(); - fn CRS(); - fn CRYP(); - fn DCMI_PSSI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn DTS(); - fn ECC(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN3_IT0(); - fn FDCAN3_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMAC(); - fn FMC(); - fn FPU(); - fn HASH_RNG(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn I2C5_ER(); - fn I2C5_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPTIM4(); - fn LPTIM5(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTFDEC1(); - fn OTFDEC2(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_AVD(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI4(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM23(); - fn TIM24(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn UART9(); - fn USART1(); - fn USART10(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 163] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_AVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { - _handler: DCMI_PSSI, - }, - Vector { _handler: CRYP }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _reserved: 0 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _reserved: 0 }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: ADC3 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA_Channel0, - }, - Vector { - _handler: BDMA_Channel1, - }, - Vector { - _handler: BDMA_Channel2, - }, - Vector { - _handler: BDMA_Channel3, - }, - Vector { - _handler: BDMA_Channel4, - }, - Vector { - _handler: BDMA_Channel5, - }, - Vector { - _handler: BDMA_Channel6, - }, - Vector { - _handler: BDMA_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: LPTIM4 }, - Vector { _handler: LPTIM5 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _handler: SAI4 }, - Vector { _handler: DTS }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - Vector { _handler: OCTOSPI2 }, - Vector { _handler: OTFDEC1 }, - Vector { _handler: OTFDEC2 }, - Vector { _handler: FMAC }, - Vector { _handler: CORDIC }, - Vector { _handler: UART9 }, - Vector { _handler: USART10 }, - Vector { _handler: I2C5_EV }, - Vector { _handler: I2C5_ER }, - Vector { - _handler: FDCAN3_IT0, - }, - Vector { - _handler: FDCAN3_IT1, - }, - Vector { _handler: TIM23 }, - Vector { _handler: TIM24 }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -impl_rng!(0x48021800); -impl_sdmmc!(SDMMC1, 0x52007000); -impl_sdmmc_pin!(SDMMC1, D0Pin, PB13, 12); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -impl_sdmmc!(SDMMC2, 0x48022400); -impl_sdmmc_pin!(SDMMC2, CmdPin, PA0, 9); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D1Pin, PG10, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); -impl_sdmmc_pin!(SDMMC2, D3Pin, PG12, 10); -impl_sdmmc_pin!(SDMMC2, D6Pin, PG13, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PG14, 10); -impl_sdmmc_pin!(SDMMC2, D0Pin, PG9, 11); diff --git a/embassy-stm32/src/chip/stm32h733vg.rs b/embassy-stm32/src/chip/stm32h733vg.rs deleted file mode 100644 index ae3ede17..00000000 --- a/embassy-stm32/src/chip/stm32h733vg.rs +++ /dev/null @@ -1,894 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, ADC3, BDMA, COMP1, COMP2, CORDIC, CRYP, DAC1, DCMI, DMA2D, - DTS, ETH, FDCAN1, FDCAN2, FDCAN3, FMAC, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, - PA11, PA12, PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, - PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, - PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, - PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, - PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, - PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, - PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, PJ0, PJ1, PJ2, PJ3, - PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, PJ10, PJ11, PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, - PK6, PK7, PK8, PK9, PK10, PK11, PK12, PK13, PK14, PK15, HASH, I2C1, I2C2, I2C3, I2C4, I2C5, - IWDG1, LPTIM1, LPTIM2, LPTIM3, LPTIM4, LPTIM5, LPUART1, LTDC, MDIOS, MDMA, OCTOSPI1, OCTOSPI2, - OCTOSPIM, OPAMP1, OPAMP2, OTFDEC1, OTFDEC2, PSSI, PWR, RCC, RNG, RTC, SAI1, SAI4, SDMMC1, - SDMMC2, SPI1, SPI2, SPI3, SPI4, SPI6, SWPMI1, SYSCFG, TIM1, TIM12, TIM13, TIM14, TIM15, TIM16, - TIM17, TIM2, TIM23, TIM24, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, UART4, UART5, UART7, UART8, - UART9, USART1, USART10, USART2, USART3, USART6, USB_OTG_HS, VREFBUF, WWDG1 -); -pub const GPIO_BASE: usize = 0x58020000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC = 18, - ADC3 = 127, - BDMA_Channel0 = 129, - BDMA_Channel1 = 130, - BDMA_Channel2 = 131, - BDMA_Channel3 = 132, - BDMA_Channel4 = 133, - BDMA_Channel5 = 134, - BDMA_Channel6 = 135, - BDMA_Channel7 = 136, - CEC = 94, - CORDIC = 154, - CRS = 144, - CRYP = 79, - DCMI_PSSI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - DTS = 147, - ECC = 145, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN3_IT0 = 159, - FDCAN3_IT1 = 160, - FDCAN_CAL = 63, - FLASH = 4, - FMAC = 153, - FMC = 48, - FPU = 81, - HASH_RNG = 80, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - I2C5_ER = 158, - I2C5_EV = 157, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPTIM4 = 140, - LPTIM5 = 141, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OCTOSPI1 = 92, - OCTOSPI2 = 150, - OTFDEC1 = 151, - OTFDEC2 = 152, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_AVD = 1, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI4 = 146, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TAMP_STAMP = 2, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM23 = 161, - TIM24 = 162, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - UART9 = 155, - USART1 = 37, - USART10 = 156, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(ADC3); - declare!(BDMA_Channel0); - declare!(BDMA_Channel1); - declare!(BDMA_Channel2); - declare!(BDMA_Channel3); - declare!(BDMA_Channel4); - declare!(BDMA_Channel5); - declare!(BDMA_Channel6); - declare!(BDMA_Channel7); - declare!(CEC); - declare!(CORDIC); - declare!(CRS); - declare!(CRYP); - declare!(DCMI_PSSI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(DTS); - declare!(ECC); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN3_IT0); - declare!(FDCAN3_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMAC); - declare!(FMC); - declare!(FPU); - declare!(HASH_RNG); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(I2C5_ER); - declare!(I2C5_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPTIM4); - declare!(LPTIM5); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTFDEC1); - declare!(OTFDEC2); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_AVD); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI4); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM23); - declare!(TIM24); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(UART9); - declare!(USART1); - declare!(USART10); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn ADC3(); - fn BDMA_Channel0(); - fn BDMA_Channel1(); - fn BDMA_Channel2(); - fn BDMA_Channel3(); - fn BDMA_Channel4(); - fn BDMA_Channel5(); - fn BDMA_Channel6(); - fn BDMA_Channel7(); - fn CEC(); - fn CORDIC(); - fn CRS(); - fn CRYP(); - fn DCMI_PSSI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn DTS(); - fn ECC(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN3_IT0(); - fn FDCAN3_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMAC(); - fn FMC(); - fn FPU(); - fn HASH_RNG(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn I2C5_ER(); - fn I2C5_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPTIM4(); - fn LPTIM5(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTFDEC1(); - fn OTFDEC2(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_AVD(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI4(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM23(); - fn TIM24(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn UART9(); - fn USART1(); - fn USART10(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 163] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_AVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { - _handler: DCMI_PSSI, - }, - Vector { _handler: CRYP }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _reserved: 0 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _reserved: 0 }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: ADC3 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA_Channel0, - }, - Vector { - _handler: BDMA_Channel1, - }, - Vector { - _handler: BDMA_Channel2, - }, - Vector { - _handler: BDMA_Channel3, - }, - Vector { - _handler: BDMA_Channel4, - }, - Vector { - _handler: BDMA_Channel5, - }, - Vector { - _handler: BDMA_Channel6, - }, - Vector { - _handler: BDMA_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: LPTIM4 }, - Vector { _handler: LPTIM5 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _handler: SAI4 }, - Vector { _handler: DTS }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - Vector { _handler: OCTOSPI2 }, - Vector { _handler: OTFDEC1 }, - Vector { _handler: OTFDEC2 }, - Vector { _handler: FMAC }, - Vector { _handler: CORDIC }, - Vector { _handler: UART9 }, - Vector { _handler: USART10 }, - Vector { _handler: I2C5_EV }, - Vector { _handler: I2C5_ER }, - Vector { - _handler: FDCAN3_IT0, - }, - Vector { - _handler: FDCAN3_IT1, - }, - Vector { _handler: TIM23 }, - Vector { _handler: TIM24 }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -impl_rng!(0x48021800); -impl_sdmmc!(SDMMC1, 0x52007000); -impl_sdmmc_pin!(SDMMC1, D0Pin, PB13, 12); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -impl_sdmmc!(SDMMC2, 0x48022400); -impl_sdmmc_pin!(SDMMC2, CmdPin, PA0, 9); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D1Pin, PG10, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); -impl_sdmmc_pin!(SDMMC2, D3Pin, PG12, 10); -impl_sdmmc_pin!(SDMMC2, D6Pin, PG13, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PG14, 10); -impl_sdmmc_pin!(SDMMC2, D0Pin, PG9, 11); diff --git a/embassy-stm32/src/chip/stm32h733zg.rs b/embassy-stm32/src/chip/stm32h733zg.rs deleted file mode 100644 index 696b1231..00000000 --- a/embassy-stm32/src/chip/stm32h733zg.rs +++ /dev/null @@ -1,894 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, ADC3, BDMA, COMP1, COMP2, CORDIC, CRYP, DAC1, DCMI, DMA2D, - DTS, ETH, FDCAN1, FDCAN2, FDCAN3, FMAC, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, - PA11, PA12, PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, - PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, - PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, - PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, - PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, - PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, - PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, PJ0, PJ1, PJ2, PJ3, - PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, PJ10, PJ11, PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, - PK6, PK7, PK8, PK9, PK10, PK11, PK12, PK13, PK14, PK15, HASH, I2C1, I2C2, I2C3, I2C4, I2C5, - IWDG1, LPTIM1, LPTIM2, LPTIM3, LPTIM4, LPTIM5, LPUART1, LTDC, MDIOS, MDMA, OCTOSPI1, OCTOSPI2, - OCTOSPIM, OPAMP1, OPAMP2, OTFDEC1, OTFDEC2, PSSI, PWR, RCC, RNG, RTC, SAI1, SAI4, SDMMC1, - SDMMC2, SPI1, SPI2, SPI3, SPI4, SPI5, SPI6, SWPMI1, SYSCFG, TIM1, TIM12, TIM13, TIM14, TIM15, - TIM16, TIM17, TIM2, TIM23, TIM24, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, UART4, UART5, UART7, - UART8, UART9, USART1, USART10, USART2, USART3, USART6, USB_OTG_HS, VREFBUF, WWDG1 -); -pub const GPIO_BASE: usize = 0x58020000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC = 18, - ADC3 = 127, - BDMA_Channel0 = 129, - BDMA_Channel1 = 130, - BDMA_Channel2 = 131, - BDMA_Channel3 = 132, - BDMA_Channel4 = 133, - BDMA_Channel5 = 134, - BDMA_Channel6 = 135, - BDMA_Channel7 = 136, - CEC = 94, - CORDIC = 154, - CRS = 144, - CRYP = 79, - DCMI_PSSI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - DTS = 147, - ECC = 145, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN3_IT0 = 159, - FDCAN3_IT1 = 160, - FDCAN_CAL = 63, - FLASH = 4, - FMAC = 153, - FMC = 48, - FPU = 81, - HASH_RNG = 80, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - I2C5_ER = 158, - I2C5_EV = 157, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPTIM4 = 140, - LPTIM5 = 141, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OCTOSPI1 = 92, - OCTOSPI2 = 150, - OTFDEC1 = 151, - OTFDEC2 = 152, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_AVD = 1, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI4 = 146, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TAMP_STAMP = 2, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM23 = 161, - TIM24 = 162, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - UART9 = 155, - USART1 = 37, - USART10 = 156, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(ADC3); - declare!(BDMA_Channel0); - declare!(BDMA_Channel1); - declare!(BDMA_Channel2); - declare!(BDMA_Channel3); - declare!(BDMA_Channel4); - declare!(BDMA_Channel5); - declare!(BDMA_Channel6); - declare!(BDMA_Channel7); - declare!(CEC); - declare!(CORDIC); - declare!(CRS); - declare!(CRYP); - declare!(DCMI_PSSI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(DTS); - declare!(ECC); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN3_IT0); - declare!(FDCAN3_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMAC); - declare!(FMC); - declare!(FPU); - declare!(HASH_RNG); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(I2C5_ER); - declare!(I2C5_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPTIM4); - declare!(LPTIM5); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTFDEC1); - declare!(OTFDEC2); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_AVD); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI4); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM23); - declare!(TIM24); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(UART9); - declare!(USART1); - declare!(USART10); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn ADC3(); - fn BDMA_Channel0(); - fn BDMA_Channel1(); - fn BDMA_Channel2(); - fn BDMA_Channel3(); - fn BDMA_Channel4(); - fn BDMA_Channel5(); - fn BDMA_Channel6(); - fn BDMA_Channel7(); - fn CEC(); - fn CORDIC(); - fn CRS(); - fn CRYP(); - fn DCMI_PSSI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn DTS(); - fn ECC(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN3_IT0(); - fn FDCAN3_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMAC(); - fn FMC(); - fn FPU(); - fn HASH_RNG(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn I2C5_ER(); - fn I2C5_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPTIM4(); - fn LPTIM5(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTFDEC1(); - fn OTFDEC2(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_AVD(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI4(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM23(); - fn TIM24(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn UART9(); - fn USART1(); - fn USART10(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 163] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_AVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { - _handler: DCMI_PSSI, - }, - Vector { _handler: CRYP }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _reserved: 0 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _reserved: 0 }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: ADC3 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA_Channel0, - }, - Vector { - _handler: BDMA_Channel1, - }, - Vector { - _handler: BDMA_Channel2, - }, - Vector { - _handler: BDMA_Channel3, - }, - Vector { - _handler: BDMA_Channel4, - }, - Vector { - _handler: BDMA_Channel5, - }, - Vector { - _handler: BDMA_Channel6, - }, - Vector { - _handler: BDMA_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: LPTIM4 }, - Vector { _handler: LPTIM5 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _handler: SAI4 }, - Vector { _handler: DTS }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - Vector { _handler: OCTOSPI2 }, - Vector { _handler: OTFDEC1 }, - Vector { _handler: OTFDEC2 }, - Vector { _handler: FMAC }, - Vector { _handler: CORDIC }, - Vector { _handler: UART9 }, - Vector { _handler: USART10 }, - Vector { _handler: I2C5_EV }, - Vector { _handler: I2C5_ER }, - Vector { - _handler: FDCAN3_IT0, - }, - Vector { - _handler: FDCAN3_IT1, - }, - Vector { _handler: TIM23 }, - Vector { _handler: TIM24 }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -impl_rng!(0x48021800); -impl_sdmmc!(SDMMC1, 0x52007000); -impl_sdmmc_pin!(SDMMC1, D0Pin, PB13, 12); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -impl_sdmmc!(SDMMC2, 0x48022400); -impl_sdmmc_pin!(SDMMC2, CmdPin, PA0, 9); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D1Pin, PG10, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); -impl_sdmmc_pin!(SDMMC2, D3Pin, PG12, 10); -impl_sdmmc_pin!(SDMMC2, D6Pin, PG13, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PG14, 10); -impl_sdmmc_pin!(SDMMC2, D0Pin, PG9, 11); diff --git a/embassy-stm32/src/chip/stm32h735ag.rs b/embassy-stm32/src/chip/stm32h735ag.rs deleted file mode 100644 index 2a14ee4f..00000000 --- a/embassy-stm32/src/chip/stm32h735ag.rs +++ /dev/null @@ -1,894 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, ADC3, BDMA, COMP1, COMP2, CORDIC, CRYP, DAC1, DCMI, DMA2D, - DTS, ETH, FDCAN1, FDCAN2, FDCAN3, FMAC, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, - PA11, PA12, PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, - PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, - PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, - PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, - PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, - PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, - PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, PJ0, PJ1, PJ2, PJ3, - PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, PJ10, PJ11, PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, - PK6, PK7, PK8, PK9, PK10, PK11, PK12, PK13, PK14, PK15, HASH, I2C1, I2C2, I2C3, I2C4, I2C5, - IWDG1, LPTIM1, LPTIM2, LPTIM3, LPTIM4, LPTIM5, LPUART1, LTDC, MDIOS, MDMA, OCTOSPI1, OCTOSPI2, - OCTOSPIM, OPAMP1, OPAMP2, OTFDEC1, OTFDEC2, PSSI, PWR, RCC, RNG, RTC, SAI1, SAI4, SDMMC1, - SDMMC2, SPI1, SPI2, SPI3, SPI4, SPI5, SPI6, SWPMI1, SYSCFG, TIM1, TIM12, TIM13, TIM14, TIM15, - TIM16, TIM17, TIM2, TIM23, TIM24, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, UART4, UART5, UART7, - UART8, UART9, USART1, USART2, USART3, USART6, USB_OTG_HS, VREFBUF, WWDG1 -); -pub const GPIO_BASE: usize = 0x58020000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC = 18, - ADC3 = 127, - BDMA_Channel0 = 129, - BDMA_Channel1 = 130, - BDMA_Channel2 = 131, - BDMA_Channel3 = 132, - BDMA_Channel4 = 133, - BDMA_Channel5 = 134, - BDMA_Channel6 = 135, - BDMA_Channel7 = 136, - CEC = 94, - CORDIC = 154, - CRS = 144, - CRYP = 79, - DCMI_PSSI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - DTS = 147, - ECC = 145, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN3_IT0 = 159, - FDCAN3_IT1 = 160, - FDCAN_CAL = 63, - FLASH = 4, - FMAC = 153, - FMC = 48, - FPU = 81, - HASH_RNG = 80, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - I2C5_ER = 158, - I2C5_EV = 157, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPTIM4 = 140, - LPTIM5 = 141, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OCTOSPI1 = 92, - OCTOSPI2 = 150, - OTFDEC1 = 151, - OTFDEC2 = 152, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_AVD = 1, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI4 = 146, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TAMP_STAMP = 2, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM23 = 161, - TIM24 = 162, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - UART9 = 155, - USART1 = 37, - USART10 = 156, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(ADC3); - declare!(BDMA_Channel0); - declare!(BDMA_Channel1); - declare!(BDMA_Channel2); - declare!(BDMA_Channel3); - declare!(BDMA_Channel4); - declare!(BDMA_Channel5); - declare!(BDMA_Channel6); - declare!(BDMA_Channel7); - declare!(CEC); - declare!(CORDIC); - declare!(CRS); - declare!(CRYP); - declare!(DCMI_PSSI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(DTS); - declare!(ECC); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN3_IT0); - declare!(FDCAN3_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMAC); - declare!(FMC); - declare!(FPU); - declare!(HASH_RNG); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(I2C5_ER); - declare!(I2C5_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPTIM4); - declare!(LPTIM5); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTFDEC1); - declare!(OTFDEC2); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_AVD); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI4); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM23); - declare!(TIM24); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(UART9); - declare!(USART1); - declare!(USART10); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn ADC3(); - fn BDMA_Channel0(); - fn BDMA_Channel1(); - fn BDMA_Channel2(); - fn BDMA_Channel3(); - fn BDMA_Channel4(); - fn BDMA_Channel5(); - fn BDMA_Channel6(); - fn BDMA_Channel7(); - fn CEC(); - fn CORDIC(); - fn CRS(); - fn CRYP(); - fn DCMI_PSSI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn DTS(); - fn ECC(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN3_IT0(); - fn FDCAN3_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMAC(); - fn FMC(); - fn FPU(); - fn HASH_RNG(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn I2C5_ER(); - fn I2C5_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPTIM4(); - fn LPTIM5(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTFDEC1(); - fn OTFDEC2(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_AVD(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI4(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM23(); - fn TIM24(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn UART9(); - fn USART1(); - fn USART10(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 163] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_AVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { - _handler: DCMI_PSSI, - }, - Vector { _handler: CRYP }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _reserved: 0 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _reserved: 0 }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: ADC3 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA_Channel0, - }, - Vector { - _handler: BDMA_Channel1, - }, - Vector { - _handler: BDMA_Channel2, - }, - Vector { - _handler: BDMA_Channel3, - }, - Vector { - _handler: BDMA_Channel4, - }, - Vector { - _handler: BDMA_Channel5, - }, - Vector { - _handler: BDMA_Channel6, - }, - Vector { - _handler: BDMA_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: LPTIM4 }, - Vector { _handler: LPTIM5 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _handler: SAI4 }, - Vector { _handler: DTS }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - Vector { _handler: OCTOSPI2 }, - Vector { _handler: OTFDEC1 }, - Vector { _handler: OTFDEC2 }, - Vector { _handler: FMAC }, - Vector { _handler: CORDIC }, - Vector { _handler: UART9 }, - Vector { _handler: USART10 }, - Vector { _handler: I2C5_EV }, - Vector { _handler: I2C5_ER }, - Vector { - _handler: FDCAN3_IT0, - }, - Vector { - _handler: FDCAN3_IT1, - }, - Vector { _handler: TIM23 }, - Vector { _handler: TIM24 }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -impl_rng!(0x48021800); -impl_sdmmc!(SDMMC1, 0x52007000); -impl_sdmmc_pin!(SDMMC1, D0Pin, PB13, 12); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -impl_sdmmc!(SDMMC2, 0x48022400); -impl_sdmmc_pin!(SDMMC2, CmdPin, PA0, 9); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D1Pin, PG10, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); -impl_sdmmc_pin!(SDMMC2, D3Pin, PG12, 10); -impl_sdmmc_pin!(SDMMC2, D6Pin, PG13, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PG14, 10); -impl_sdmmc_pin!(SDMMC2, D0Pin, PG9, 11); diff --git a/embassy-stm32/src/chip/stm32h735ig.rs b/embassy-stm32/src/chip/stm32h735ig.rs deleted file mode 100644 index 696b1231..00000000 --- a/embassy-stm32/src/chip/stm32h735ig.rs +++ /dev/null @@ -1,894 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, ADC3, BDMA, COMP1, COMP2, CORDIC, CRYP, DAC1, DCMI, DMA2D, - DTS, ETH, FDCAN1, FDCAN2, FDCAN3, FMAC, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, - PA11, PA12, PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, - PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, - PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, - PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, - PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, - PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, - PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, PJ0, PJ1, PJ2, PJ3, - PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, PJ10, PJ11, PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, - PK6, PK7, PK8, PK9, PK10, PK11, PK12, PK13, PK14, PK15, HASH, I2C1, I2C2, I2C3, I2C4, I2C5, - IWDG1, LPTIM1, LPTIM2, LPTIM3, LPTIM4, LPTIM5, LPUART1, LTDC, MDIOS, MDMA, OCTOSPI1, OCTOSPI2, - OCTOSPIM, OPAMP1, OPAMP2, OTFDEC1, OTFDEC2, PSSI, PWR, RCC, RNG, RTC, SAI1, SAI4, SDMMC1, - SDMMC2, SPI1, SPI2, SPI3, SPI4, SPI5, SPI6, SWPMI1, SYSCFG, TIM1, TIM12, TIM13, TIM14, TIM15, - TIM16, TIM17, TIM2, TIM23, TIM24, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, UART4, UART5, UART7, - UART8, UART9, USART1, USART10, USART2, USART3, USART6, USB_OTG_HS, VREFBUF, WWDG1 -); -pub const GPIO_BASE: usize = 0x58020000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC = 18, - ADC3 = 127, - BDMA_Channel0 = 129, - BDMA_Channel1 = 130, - BDMA_Channel2 = 131, - BDMA_Channel3 = 132, - BDMA_Channel4 = 133, - BDMA_Channel5 = 134, - BDMA_Channel6 = 135, - BDMA_Channel7 = 136, - CEC = 94, - CORDIC = 154, - CRS = 144, - CRYP = 79, - DCMI_PSSI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - DTS = 147, - ECC = 145, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN3_IT0 = 159, - FDCAN3_IT1 = 160, - FDCAN_CAL = 63, - FLASH = 4, - FMAC = 153, - FMC = 48, - FPU = 81, - HASH_RNG = 80, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - I2C5_ER = 158, - I2C5_EV = 157, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPTIM4 = 140, - LPTIM5 = 141, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OCTOSPI1 = 92, - OCTOSPI2 = 150, - OTFDEC1 = 151, - OTFDEC2 = 152, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_AVD = 1, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI4 = 146, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TAMP_STAMP = 2, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM23 = 161, - TIM24 = 162, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - UART9 = 155, - USART1 = 37, - USART10 = 156, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(ADC3); - declare!(BDMA_Channel0); - declare!(BDMA_Channel1); - declare!(BDMA_Channel2); - declare!(BDMA_Channel3); - declare!(BDMA_Channel4); - declare!(BDMA_Channel5); - declare!(BDMA_Channel6); - declare!(BDMA_Channel7); - declare!(CEC); - declare!(CORDIC); - declare!(CRS); - declare!(CRYP); - declare!(DCMI_PSSI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(DTS); - declare!(ECC); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN3_IT0); - declare!(FDCAN3_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMAC); - declare!(FMC); - declare!(FPU); - declare!(HASH_RNG); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(I2C5_ER); - declare!(I2C5_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPTIM4); - declare!(LPTIM5); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTFDEC1); - declare!(OTFDEC2); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_AVD); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI4); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM23); - declare!(TIM24); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(UART9); - declare!(USART1); - declare!(USART10); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn ADC3(); - fn BDMA_Channel0(); - fn BDMA_Channel1(); - fn BDMA_Channel2(); - fn BDMA_Channel3(); - fn BDMA_Channel4(); - fn BDMA_Channel5(); - fn BDMA_Channel6(); - fn BDMA_Channel7(); - fn CEC(); - fn CORDIC(); - fn CRS(); - fn CRYP(); - fn DCMI_PSSI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn DTS(); - fn ECC(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN3_IT0(); - fn FDCAN3_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMAC(); - fn FMC(); - fn FPU(); - fn HASH_RNG(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn I2C5_ER(); - fn I2C5_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPTIM4(); - fn LPTIM5(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTFDEC1(); - fn OTFDEC2(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_AVD(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI4(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM23(); - fn TIM24(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn UART9(); - fn USART1(); - fn USART10(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 163] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_AVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { - _handler: DCMI_PSSI, - }, - Vector { _handler: CRYP }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _reserved: 0 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _reserved: 0 }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: ADC3 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA_Channel0, - }, - Vector { - _handler: BDMA_Channel1, - }, - Vector { - _handler: BDMA_Channel2, - }, - Vector { - _handler: BDMA_Channel3, - }, - Vector { - _handler: BDMA_Channel4, - }, - Vector { - _handler: BDMA_Channel5, - }, - Vector { - _handler: BDMA_Channel6, - }, - Vector { - _handler: BDMA_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: LPTIM4 }, - Vector { _handler: LPTIM5 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _handler: SAI4 }, - Vector { _handler: DTS }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - Vector { _handler: OCTOSPI2 }, - Vector { _handler: OTFDEC1 }, - Vector { _handler: OTFDEC2 }, - Vector { _handler: FMAC }, - Vector { _handler: CORDIC }, - Vector { _handler: UART9 }, - Vector { _handler: USART10 }, - Vector { _handler: I2C5_EV }, - Vector { _handler: I2C5_ER }, - Vector { - _handler: FDCAN3_IT0, - }, - Vector { - _handler: FDCAN3_IT1, - }, - Vector { _handler: TIM23 }, - Vector { _handler: TIM24 }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -impl_rng!(0x48021800); -impl_sdmmc!(SDMMC1, 0x52007000); -impl_sdmmc_pin!(SDMMC1, D0Pin, PB13, 12); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -impl_sdmmc!(SDMMC2, 0x48022400); -impl_sdmmc_pin!(SDMMC2, CmdPin, PA0, 9); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D1Pin, PG10, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); -impl_sdmmc_pin!(SDMMC2, D3Pin, PG12, 10); -impl_sdmmc_pin!(SDMMC2, D6Pin, PG13, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PG14, 10); -impl_sdmmc_pin!(SDMMC2, D0Pin, PG9, 11); diff --git a/embassy-stm32/src/chip/stm32h735rg.rs b/embassy-stm32/src/chip/stm32h735rg.rs deleted file mode 100644 index 1eb951c4..00000000 --- a/embassy-stm32/src/chip/stm32h735rg.rs +++ /dev/null @@ -1,893 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, ADC3, BDMA, COMP1, COMP2, CORDIC, CRYP, DAC1, DCMI, DMA2D, - DTS, FDCAN1, FDCAN2, FMAC, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, - PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, - PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, - PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, - PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, - PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, - PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, - PJ8, PJ9, PJ10, PJ11, PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, - PK10, PK11, PK12, PK13, PK14, PK15, HASH, I2C1, I2C2, I2C3, I2C4, IWDG1, LPTIM1, LPTIM2, - LPTIM3, LPTIM4, LPTIM5, LPUART1, LTDC, MDIOS, MDMA, OCTOSPI1, OCTOSPI2, OCTOSPIM, OPAMP1, - OTFDEC1, OTFDEC2, PSSI, PWR, RCC, RNG, RTC, SDMMC1, SDMMC2, SPI1, SPI2, SPI3, SPI6, SWPMI1, - SYSCFG, TIM1, TIM12, TIM13, TIM14, TIM15, TIM16, TIM17, TIM2, TIM23, TIM24, TIM3, TIM4, TIM5, - TIM6, TIM7, TIM8, UART4, UART5, UART7, USART1, USART2, USART3, USB_OTG_HS, VREFBUF, WWDG1 -); -pub const GPIO_BASE: usize = 0x58020000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC = 18, - ADC3 = 127, - BDMA_Channel0 = 129, - BDMA_Channel1 = 130, - BDMA_Channel2 = 131, - BDMA_Channel3 = 132, - BDMA_Channel4 = 133, - BDMA_Channel5 = 134, - BDMA_Channel6 = 135, - BDMA_Channel7 = 136, - CEC = 94, - CORDIC = 154, - CRS = 144, - CRYP = 79, - DCMI_PSSI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - DTS = 147, - ECC = 145, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN3_IT0 = 159, - FDCAN3_IT1 = 160, - FDCAN_CAL = 63, - FLASH = 4, - FMAC = 153, - FMC = 48, - FPU = 81, - HASH_RNG = 80, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - I2C5_ER = 158, - I2C5_EV = 157, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPTIM4 = 140, - LPTIM5 = 141, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OCTOSPI1 = 92, - OCTOSPI2 = 150, - OTFDEC1 = 151, - OTFDEC2 = 152, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_AVD = 1, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI4 = 146, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TAMP_STAMP = 2, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM23 = 161, - TIM24 = 162, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - UART9 = 155, - USART1 = 37, - USART10 = 156, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(ADC3); - declare!(BDMA_Channel0); - declare!(BDMA_Channel1); - declare!(BDMA_Channel2); - declare!(BDMA_Channel3); - declare!(BDMA_Channel4); - declare!(BDMA_Channel5); - declare!(BDMA_Channel6); - declare!(BDMA_Channel7); - declare!(CEC); - declare!(CORDIC); - declare!(CRS); - declare!(CRYP); - declare!(DCMI_PSSI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(DTS); - declare!(ECC); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN3_IT0); - declare!(FDCAN3_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMAC); - declare!(FMC); - declare!(FPU); - declare!(HASH_RNG); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(I2C5_ER); - declare!(I2C5_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPTIM4); - declare!(LPTIM5); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTFDEC1); - declare!(OTFDEC2); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_AVD); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI4); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM23); - declare!(TIM24); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(UART9); - declare!(USART1); - declare!(USART10); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn ADC3(); - fn BDMA_Channel0(); - fn BDMA_Channel1(); - fn BDMA_Channel2(); - fn BDMA_Channel3(); - fn BDMA_Channel4(); - fn BDMA_Channel5(); - fn BDMA_Channel6(); - fn BDMA_Channel7(); - fn CEC(); - fn CORDIC(); - fn CRS(); - fn CRYP(); - fn DCMI_PSSI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn DTS(); - fn ECC(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN3_IT0(); - fn FDCAN3_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMAC(); - fn FMC(); - fn FPU(); - fn HASH_RNG(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn I2C5_ER(); - fn I2C5_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPTIM4(); - fn LPTIM5(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTFDEC1(); - fn OTFDEC2(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_AVD(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI4(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM23(); - fn TIM24(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn UART9(); - fn USART1(); - fn USART10(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 163] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_AVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { - _handler: DCMI_PSSI, - }, - Vector { _handler: CRYP }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _reserved: 0 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _reserved: 0 }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: ADC3 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA_Channel0, - }, - Vector { - _handler: BDMA_Channel1, - }, - Vector { - _handler: BDMA_Channel2, - }, - Vector { - _handler: BDMA_Channel3, - }, - Vector { - _handler: BDMA_Channel4, - }, - Vector { - _handler: BDMA_Channel5, - }, - Vector { - _handler: BDMA_Channel6, - }, - Vector { - _handler: BDMA_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: LPTIM4 }, - Vector { _handler: LPTIM5 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _handler: SAI4 }, - Vector { _handler: DTS }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - Vector { _handler: OCTOSPI2 }, - Vector { _handler: OTFDEC1 }, - Vector { _handler: OTFDEC2 }, - Vector { _handler: FMAC }, - Vector { _handler: CORDIC }, - Vector { _handler: UART9 }, - Vector { _handler: USART10 }, - Vector { _handler: I2C5_EV }, - Vector { _handler: I2C5_ER }, - Vector { - _handler: FDCAN3_IT0, - }, - Vector { - _handler: FDCAN3_IT1, - }, - Vector { _handler: TIM23 }, - Vector { _handler: TIM24 }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -impl_rng!(0x48021800); -impl_sdmmc!(SDMMC1, 0x52007000); -impl_sdmmc_pin!(SDMMC1, D0Pin, PB13, 12); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -impl_sdmmc!(SDMMC2, 0x48022400); -impl_sdmmc_pin!(SDMMC2, CmdPin, PA0, 9); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D1Pin, PG10, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); -impl_sdmmc_pin!(SDMMC2, D3Pin, PG12, 10); -impl_sdmmc_pin!(SDMMC2, D6Pin, PG13, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PG14, 10); -impl_sdmmc_pin!(SDMMC2, D0Pin, PG9, 11); diff --git a/embassy-stm32/src/chip/stm32h735vg.rs b/embassy-stm32/src/chip/stm32h735vg.rs deleted file mode 100644 index 7843ad5d..00000000 --- a/embassy-stm32/src/chip/stm32h735vg.rs +++ /dev/null @@ -1,894 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, ADC3, BDMA, COMP1, COMP2, CORDIC, CRYP, DAC1, DCMI, DMA2D, - DTS, ETH, FDCAN1, FDCAN2, FDCAN3, FMAC, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, - PA11, PA12, PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, - PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, - PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, - PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, - PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, - PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, - PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, PJ0, PJ1, PJ2, PJ3, - PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, PJ10, PJ11, PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, - PK6, PK7, PK8, PK9, PK10, PK11, PK12, PK13, PK14, PK15, HASH, I2C1, I2C2, I2C3, I2C4, I2C5, - IWDG1, LPTIM1, LPTIM2, LPTIM3, LPTIM4, LPTIM5, LPUART1, LTDC, MDIOS, MDMA, OCTOSPI1, OCTOSPI2, - OCTOSPIM, OPAMP1, OPAMP2, OTFDEC1, OTFDEC2, PSSI, PWR, RCC, RNG, RTC, SAI1, SAI4, SDMMC1, - SDMMC2, SPI1, SPI2, SPI3, SPI4, SPI6, SWPMI1, SYSCFG, TIM1, TIM12, TIM13, TIM14, TIM15, TIM16, - TIM17, TIM2, TIM23, TIM24, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, UART4, UART5, UART7, UART8, - UART9, USART1, USART2, USART3, USART6, USB_OTG_HS, VREFBUF, WWDG1 -); -pub const GPIO_BASE: usize = 0x58020000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC = 18, - ADC3 = 127, - BDMA_Channel0 = 129, - BDMA_Channel1 = 130, - BDMA_Channel2 = 131, - BDMA_Channel3 = 132, - BDMA_Channel4 = 133, - BDMA_Channel5 = 134, - BDMA_Channel6 = 135, - BDMA_Channel7 = 136, - CEC = 94, - CORDIC = 154, - CRS = 144, - CRYP = 79, - DCMI_PSSI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - DTS = 147, - ECC = 145, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN3_IT0 = 159, - FDCAN3_IT1 = 160, - FDCAN_CAL = 63, - FLASH = 4, - FMAC = 153, - FMC = 48, - FPU = 81, - HASH_RNG = 80, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - I2C5_ER = 158, - I2C5_EV = 157, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPTIM4 = 140, - LPTIM5 = 141, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OCTOSPI1 = 92, - OCTOSPI2 = 150, - OTFDEC1 = 151, - OTFDEC2 = 152, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_AVD = 1, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI4 = 146, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TAMP_STAMP = 2, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM23 = 161, - TIM24 = 162, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - UART9 = 155, - USART1 = 37, - USART10 = 156, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(ADC3); - declare!(BDMA_Channel0); - declare!(BDMA_Channel1); - declare!(BDMA_Channel2); - declare!(BDMA_Channel3); - declare!(BDMA_Channel4); - declare!(BDMA_Channel5); - declare!(BDMA_Channel6); - declare!(BDMA_Channel7); - declare!(CEC); - declare!(CORDIC); - declare!(CRS); - declare!(CRYP); - declare!(DCMI_PSSI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(DTS); - declare!(ECC); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN3_IT0); - declare!(FDCAN3_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMAC); - declare!(FMC); - declare!(FPU); - declare!(HASH_RNG); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(I2C5_ER); - declare!(I2C5_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPTIM4); - declare!(LPTIM5); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTFDEC1); - declare!(OTFDEC2); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_AVD); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI4); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM23); - declare!(TIM24); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(UART9); - declare!(USART1); - declare!(USART10); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn ADC3(); - fn BDMA_Channel0(); - fn BDMA_Channel1(); - fn BDMA_Channel2(); - fn BDMA_Channel3(); - fn BDMA_Channel4(); - fn BDMA_Channel5(); - fn BDMA_Channel6(); - fn BDMA_Channel7(); - fn CEC(); - fn CORDIC(); - fn CRS(); - fn CRYP(); - fn DCMI_PSSI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn DTS(); - fn ECC(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN3_IT0(); - fn FDCAN3_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMAC(); - fn FMC(); - fn FPU(); - fn HASH_RNG(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn I2C5_ER(); - fn I2C5_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPTIM4(); - fn LPTIM5(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTFDEC1(); - fn OTFDEC2(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_AVD(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI4(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM23(); - fn TIM24(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn UART9(); - fn USART1(); - fn USART10(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 163] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_AVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { - _handler: DCMI_PSSI, - }, - Vector { _handler: CRYP }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _reserved: 0 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _reserved: 0 }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: ADC3 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA_Channel0, - }, - Vector { - _handler: BDMA_Channel1, - }, - Vector { - _handler: BDMA_Channel2, - }, - Vector { - _handler: BDMA_Channel3, - }, - Vector { - _handler: BDMA_Channel4, - }, - Vector { - _handler: BDMA_Channel5, - }, - Vector { - _handler: BDMA_Channel6, - }, - Vector { - _handler: BDMA_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: LPTIM4 }, - Vector { _handler: LPTIM5 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _handler: SAI4 }, - Vector { _handler: DTS }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - Vector { _handler: OCTOSPI2 }, - Vector { _handler: OTFDEC1 }, - Vector { _handler: OTFDEC2 }, - Vector { _handler: FMAC }, - Vector { _handler: CORDIC }, - Vector { _handler: UART9 }, - Vector { _handler: USART10 }, - Vector { _handler: I2C5_EV }, - Vector { _handler: I2C5_ER }, - Vector { - _handler: FDCAN3_IT0, - }, - Vector { - _handler: FDCAN3_IT1, - }, - Vector { _handler: TIM23 }, - Vector { _handler: TIM24 }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -impl_rng!(0x48021800); -impl_sdmmc!(SDMMC1, 0x52007000); -impl_sdmmc_pin!(SDMMC1, D0Pin, PB13, 12); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -impl_sdmmc!(SDMMC2, 0x48022400); -impl_sdmmc_pin!(SDMMC2, CmdPin, PA0, 9); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D1Pin, PG10, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); -impl_sdmmc_pin!(SDMMC2, D3Pin, PG12, 10); -impl_sdmmc_pin!(SDMMC2, D6Pin, PG13, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PG14, 10); -impl_sdmmc_pin!(SDMMC2, D0Pin, PG9, 11); diff --git a/embassy-stm32/src/chip/stm32h735zg.rs b/embassy-stm32/src/chip/stm32h735zg.rs deleted file mode 100644 index 696b1231..00000000 --- a/embassy-stm32/src/chip/stm32h735zg.rs +++ /dev/null @@ -1,894 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, ADC3, BDMA, COMP1, COMP2, CORDIC, CRYP, DAC1, DCMI, DMA2D, - DTS, ETH, FDCAN1, FDCAN2, FDCAN3, FMAC, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, - PA11, PA12, PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, - PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, - PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, - PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, - PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, - PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, - PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, PJ0, PJ1, PJ2, PJ3, - PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, PJ10, PJ11, PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, - PK6, PK7, PK8, PK9, PK10, PK11, PK12, PK13, PK14, PK15, HASH, I2C1, I2C2, I2C3, I2C4, I2C5, - IWDG1, LPTIM1, LPTIM2, LPTIM3, LPTIM4, LPTIM5, LPUART1, LTDC, MDIOS, MDMA, OCTOSPI1, OCTOSPI2, - OCTOSPIM, OPAMP1, OPAMP2, OTFDEC1, OTFDEC2, PSSI, PWR, RCC, RNG, RTC, SAI1, SAI4, SDMMC1, - SDMMC2, SPI1, SPI2, SPI3, SPI4, SPI5, SPI6, SWPMI1, SYSCFG, TIM1, TIM12, TIM13, TIM14, TIM15, - TIM16, TIM17, TIM2, TIM23, TIM24, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, UART4, UART5, UART7, - UART8, UART9, USART1, USART10, USART2, USART3, USART6, USB_OTG_HS, VREFBUF, WWDG1 -); -pub const GPIO_BASE: usize = 0x58020000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC = 18, - ADC3 = 127, - BDMA_Channel0 = 129, - BDMA_Channel1 = 130, - BDMA_Channel2 = 131, - BDMA_Channel3 = 132, - BDMA_Channel4 = 133, - BDMA_Channel5 = 134, - BDMA_Channel6 = 135, - BDMA_Channel7 = 136, - CEC = 94, - CORDIC = 154, - CRS = 144, - CRYP = 79, - DCMI_PSSI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - DTS = 147, - ECC = 145, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN3_IT0 = 159, - FDCAN3_IT1 = 160, - FDCAN_CAL = 63, - FLASH = 4, - FMAC = 153, - FMC = 48, - FPU = 81, - HASH_RNG = 80, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - I2C5_ER = 158, - I2C5_EV = 157, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPTIM4 = 140, - LPTIM5 = 141, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OCTOSPI1 = 92, - OCTOSPI2 = 150, - OTFDEC1 = 151, - OTFDEC2 = 152, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_AVD = 1, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI4 = 146, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TAMP_STAMP = 2, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM23 = 161, - TIM24 = 162, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - UART9 = 155, - USART1 = 37, - USART10 = 156, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(ADC3); - declare!(BDMA_Channel0); - declare!(BDMA_Channel1); - declare!(BDMA_Channel2); - declare!(BDMA_Channel3); - declare!(BDMA_Channel4); - declare!(BDMA_Channel5); - declare!(BDMA_Channel6); - declare!(BDMA_Channel7); - declare!(CEC); - declare!(CORDIC); - declare!(CRS); - declare!(CRYP); - declare!(DCMI_PSSI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(DTS); - declare!(ECC); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN3_IT0); - declare!(FDCAN3_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMAC); - declare!(FMC); - declare!(FPU); - declare!(HASH_RNG); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(I2C5_ER); - declare!(I2C5_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPTIM4); - declare!(LPTIM5); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTFDEC1); - declare!(OTFDEC2); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_AVD); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI4); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM23); - declare!(TIM24); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(UART9); - declare!(USART1); - declare!(USART10); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn ADC3(); - fn BDMA_Channel0(); - fn BDMA_Channel1(); - fn BDMA_Channel2(); - fn BDMA_Channel3(); - fn BDMA_Channel4(); - fn BDMA_Channel5(); - fn BDMA_Channel6(); - fn BDMA_Channel7(); - fn CEC(); - fn CORDIC(); - fn CRS(); - fn CRYP(); - fn DCMI_PSSI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn DTS(); - fn ECC(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN3_IT0(); - fn FDCAN3_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMAC(); - fn FMC(); - fn FPU(); - fn HASH_RNG(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn I2C5_ER(); - fn I2C5_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPTIM4(); - fn LPTIM5(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTFDEC1(); - fn OTFDEC2(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_AVD(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI4(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM23(); - fn TIM24(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn UART9(); - fn USART1(); - fn USART10(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 163] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_AVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { - _handler: DCMI_PSSI, - }, - Vector { _handler: CRYP }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _reserved: 0 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _reserved: 0 }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: ADC3 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA_Channel0, - }, - Vector { - _handler: BDMA_Channel1, - }, - Vector { - _handler: BDMA_Channel2, - }, - Vector { - _handler: BDMA_Channel3, - }, - Vector { - _handler: BDMA_Channel4, - }, - Vector { - _handler: BDMA_Channel5, - }, - Vector { - _handler: BDMA_Channel6, - }, - Vector { - _handler: BDMA_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: LPTIM4 }, - Vector { _handler: LPTIM5 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _handler: SAI4 }, - Vector { _handler: DTS }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - Vector { _handler: OCTOSPI2 }, - Vector { _handler: OTFDEC1 }, - Vector { _handler: OTFDEC2 }, - Vector { _handler: FMAC }, - Vector { _handler: CORDIC }, - Vector { _handler: UART9 }, - Vector { _handler: USART10 }, - Vector { _handler: I2C5_EV }, - Vector { _handler: I2C5_ER }, - Vector { - _handler: FDCAN3_IT0, - }, - Vector { - _handler: FDCAN3_IT1, - }, - Vector { _handler: TIM23 }, - Vector { _handler: TIM24 }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -impl_rng!(0x48021800); -impl_sdmmc!(SDMMC1, 0x52007000); -impl_sdmmc_pin!(SDMMC1, D0Pin, PB13, 12); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -impl_sdmmc!(SDMMC2, 0x48022400); -impl_sdmmc_pin!(SDMMC2, CmdPin, PA0, 9); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D1Pin, PG10, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); -impl_sdmmc_pin!(SDMMC2, D3Pin, PG12, 10); -impl_sdmmc_pin!(SDMMC2, D6Pin, PG13, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PG14, 10); -impl_sdmmc_pin!(SDMMC2, D0Pin, PG9, 11); diff --git a/embassy-stm32/src/chip/stm32h742ag.rs b/embassy-stm32/src/chip/stm32h742ag.rs deleted file mode 100644 index 16c6b22f..00000000 --- a/embassy-stm32/src/chip/stm32h742ag.rs +++ /dev/null @@ -1,892 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, ADC3, BDMA, COMP1, COMP2, DAC1, DCMI, DMA2D, ETH, FDCAN1, - FDCAN2, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, - PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, - PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, - PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, - PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, - PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, - PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, - PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, - PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, PJ10, PJ11, PJ12, - PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, PK11, PK12, PK13, - PK14, PK15, I2C1, I2C2, I2C3, I2C4, IWDG1, LPTIM1, LPTIM2, LPTIM3, LPTIM4, LPTIM5, LPUART1, - MDIOS, MDMA, OPAMP1, OPAMP2, PWR, QUADSPI, RCC, RNG, RTC, SAI1, SAI2, SAI3, SAI4, SDMMC1, - SDMMC2, SPI1, SPI2, SPI3, SPI4, SPI5, SPI6, SWPMI1, SYSCFG, TIM1, TIM12, TIM13, TIM14, TIM15, - TIM16, TIM17, TIM2, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, UART4, UART5, UART7, UART8, USART1, - USART2, USART3, USART6, USB_OTG_FS, USB_OTG_HS, VREFBUF, WWDG1 -); -pub const GPIO_BASE: usize = 0x58020000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC = 18, - ADC3 = 127, - BDMA_Channel0 = 129, - BDMA_Channel1 = 130, - BDMA_Channel2 = 131, - BDMA_Channel3 = 132, - BDMA_Channel4 = 133, - BDMA_Channel5 = 134, - BDMA_Channel6 = 135, - BDMA_Channel7 = 136, - CEC = 94, - CRS = 144, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - ECC = 145, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - HRTIM1_FLT = 109, - HRTIM1_Master = 103, - HRTIM1_TIMA = 104, - HRTIM1_TIMB = 105, - HRTIM1_TIMC = 106, - HRTIM1_TIMD = 107, - HRTIM1_TIME = 108, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPTIM4 = 140, - LPTIM5 = 141, - LPUART1 = 142, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OTG_FS = 101, - OTG_FS_EP1_IN = 99, - OTG_FS_EP1_OUT = 98, - OTG_FS_WKUP = 100, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_AVD = 1, - QUADSPI = 92, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SAI3 = 114, - SAI4 = 146, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TAMP_STAMP = 2, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(ADC3); - declare!(BDMA_Channel0); - declare!(BDMA_Channel1); - declare!(BDMA_Channel2); - declare!(BDMA_Channel3); - declare!(BDMA_Channel4); - declare!(BDMA_Channel5); - declare!(BDMA_Channel6); - declare!(BDMA_Channel7); - declare!(CEC); - declare!(CRS); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(ECC); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HRTIM1_FLT); - declare!(HRTIM1_Master); - declare!(HRTIM1_TIMA); - declare!(HRTIM1_TIMB); - declare!(HRTIM1_TIMC); - declare!(HRTIM1_TIMD); - declare!(HRTIM1_TIME); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPTIM4); - declare!(LPTIM5); - declare!(LPUART1); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OTG_FS); - declare!(OTG_FS_EP1_IN); - declare!(OTG_FS_EP1_OUT); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_AVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SAI3); - declare!(SAI4); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn ADC3(); - fn BDMA_Channel0(); - fn BDMA_Channel1(); - fn BDMA_Channel2(); - fn BDMA_Channel3(); - fn BDMA_Channel4(); - fn BDMA_Channel5(); - fn BDMA_Channel6(); - fn BDMA_Channel7(); - fn CEC(); - fn CRS(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn ECC(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HRTIM1_FLT(); - fn HRTIM1_Master(); - fn HRTIM1_TIMA(); - fn HRTIM1_TIMB(); - fn HRTIM1_TIMC(); - fn HRTIM1_TIMD(); - fn HRTIM1_TIME(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPTIM4(); - fn LPTIM5(); - fn LPUART1(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OTG_FS(); - fn OTG_FS_EP1_IN(); - fn OTG_FS_EP1_OUT(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_AVD(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SAI3(); - fn SAI4(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 150] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_AVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: QUADSPI }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { - _handler: OTG_FS_EP1_OUT, - }, - Vector { - _handler: OTG_FS_EP1_IN, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { _handler: OTG_FS }, - Vector { _reserved: 0 }, - Vector { - _handler: HRTIM1_Master, - }, - Vector { - _handler: HRTIM1_TIMA, - }, - Vector { - _handler: HRTIM1_TIMB, - }, - Vector { - _handler: HRTIM1_TIMC, - }, - Vector { - _handler: HRTIM1_TIMD, - }, - Vector { - _handler: HRTIM1_TIME, - }, - Vector { - _handler: HRTIM1_FLT, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SAI3 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _reserved: 0 }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: ADC3 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA_Channel0, - }, - Vector { - _handler: BDMA_Channel1, - }, - Vector { - _handler: BDMA_Channel2, - }, - Vector { - _handler: BDMA_Channel3, - }, - Vector { - _handler: BDMA_Channel4, - }, - Vector { - _handler: BDMA_Channel5, - }, - Vector { - _handler: BDMA_Channel6, - }, - Vector { - _handler: BDMA_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: LPTIM4 }, - Vector { _handler: LPTIM5 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _handler: SAI4 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -impl_rng!(0x48021800); -impl_sdmmc!(SDMMC1, 0x52007000); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -impl_sdmmc!(SDMMC2, 0x48022400); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); diff --git a/embassy-stm32/src/chip/stm32h742ai.rs b/embassy-stm32/src/chip/stm32h742ai.rs deleted file mode 100644 index 16c6b22f..00000000 --- a/embassy-stm32/src/chip/stm32h742ai.rs +++ /dev/null @@ -1,892 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, ADC3, BDMA, COMP1, COMP2, DAC1, DCMI, DMA2D, ETH, FDCAN1, - FDCAN2, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, - PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, - PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, - PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, - PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, - PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, - PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, - PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, - PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, PJ10, PJ11, PJ12, - PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, PK11, PK12, PK13, - PK14, PK15, I2C1, I2C2, I2C3, I2C4, IWDG1, LPTIM1, LPTIM2, LPTIM3, LPTIM4, LPTIM5, LPUART1, - MDIOS, MDMA, OPAMP1, OPAMP2, PWR, QUADSPI, RCC, RNG, RTC, SAI1, SAI2, SAI3, SAI4, SDMMC1, - SDMMC2, SPI1, SPI2, SPI3, SPI4, SPI5, SPI6, SWPMI1, SYSCFG, TIM1, TIM12, TIM13, TIM14, TIM15, - TIM16, TIM17, TIM2, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, UART4, UART5, UART7, UART8, USART1, - USART2, USART3, USART6, USB_OTG_FS, USB_OTG_HS, VREFBUF, WWDG1 -); -pub const GPIO_BASE: usize = 0x58020000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC = 18, - ADC3 = 127, - BDMA_Channel0 = 129, - BDMA_Channel1 = 130, - BDMA_Channel2 = 131, - BDMA_Channel3 = 132, - BDMA_Channel4 = 133, - BDMA_Channel5 = 134, - BDMA_Channel6 = 135, - BDMA_Channel7 = 136, - CEC = 94, - CRS = 144, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - ECC = 145, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - HRTIM1_FLT = 109, - HRTIM1_Master = 103, - HRTIM1_TIMA = 104, - HRTIM1_TIMB = 105, - HRTIM1_TIMC = 106, - HRTIM1_TIMD = 107, - HRTIM1_TIME = 108, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPTIM4 = 140, - LPTIM5 = 141, - LPUART1 = 142, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OTG_FS = 101, - OTG_FS_EP1_IN = 99, - OTG_FS_EP1_OUT = 98, - OTG_FS_WKUP = 100, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_AVD = 1, - QUADSPI = 92, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SAI3 = 114, - SAI4 = 146, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TAMP_STAMP = 2, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(ADC3); - declare!(BDMA_Channel0); - declare!(BDMA_Channel1); - declare!(BDMA_Channel2); - declare!(BDMA_Channel3); - declare!(BDMA_Channel4); - declare!(BDMA_Channel5); - declare!(BDMA_Channel6); - declare!(BDMA_Channel7); - declare!(CEC); - declare!(CRS); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(ECC); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HRTIM1_FLT); - declare!(HRTIM1_Master); - declare!(HRTIM1_TIMA); - declare!(HRTIM1_TIMB); - declare!(HRTIM1_TIMC); - declare!(HRTIM1_TIMD); - declare!(HRTIM1_TIME); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPTIM4); - declare!(LPTIM5); - declare!(LPUART1); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OTG_FS); - declare!(OTG_FS_EP1_IN); - declare!(OTG_FS_EP1_OUT); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_AVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SAI3); - declare!(SAI4); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn ADC3(); - fn BDMA_Channel0(); - fn BDMA_Channel1(); - fn BDMA_Channel2(); - fn BDMA_Channel3(); - fn BDMA_Channel4(); - fn BDMA_Channel5(); - fn BDMA_Channel6(); - fn BDMA_Channel7(); - fn CEC(); - fn CRS(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn ECC(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HRTIM1_FLT(); - fn HRTIM1_Master(); - fn HRTIM1_TIMA(); - fn HRTIM1_TIMB(); - fn HRTIM1_TIMC(); - fn HRTIM1_TIMD(); - fn HRTIM1_TIME(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPTIM4(); - fn LPTIM5(); - fn LPUART1(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OTG_FS(); - fn OTG_FS_EP1_IN(); - fn OTG_FS_EP1_OUT(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_AVD(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SAI3(); - fn SAI4(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 150] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_AVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: QUADSPI }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { - _handler: OTG_FS_EP1_OUT, - }, - Vector { - _handler: OTG_FS_EP1_IN, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { _handler: OTG_FS }, - Vector { _reserved: 0 }, - Vector { - _handler: HRTIM1_Master, - }, - Vector { - _handler: HRTIM1_TIMA, - }, - Vector { - _handler: HRTIM1_TIMB, - }, - Vector { - _handler: HRTIM1_TIMC, - }, - Vector { - _handler: HRTIM1_TIMD, - }, - Vector { - _handler: HRTIM1_TIME, - }, - Vector { - _handler: HRTIM1_FLT, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SAI3 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _reserved: 0 }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: ADC3 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA_Channel0, - }, - Vector { - _handler: BDMA_Channel1, - }, - Vector { - _handler: BDMA_Channel2, - }, - Vector { - _handler: BDMA_Channel3, - }, - Vector { - _handler: BDMA_Channel4, - }, - Vector { - _handler: BDMA_Channel5, - }, - Vector { - _handler: BDMA_Channel6, - }, - Vector { - _handler: BDMA_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: LPTIM4 }, - Vector { _handler: LPTIM5 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _handler: SAI4 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -impl_rng!(0x48021800); -impl_sdmmc!(SDMMC1, 0x52007000); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -impl_sdmmc!(SDMMC2, 0x48022400); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); diff --git a/embassy-stm32/src/chip/stm32h742bg.rs b/embassy-stm32/src/chip/stm32h742bg.rs deleted file mode 100644 index 16c6b22f..00000000 --- a/embassy-stm32/src/chip/stm32h742bg.rs +++ /dev/null @@ -1,892 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, ADC3, BDMA, COMP1, COMP2, DAC1, DCMI, DMA2D, ETH, FDCAN1, - FDCAN2, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, - PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, - PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, - PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, - PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, - PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, - PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, - PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, - PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, PJ10, PJ11, PJ12, - PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, PK11, PK12, PK13, - PK14, PK15, I2C1, I2C2, I2C3, I2C4, IWDG1, LPTIM1, LPTIM2, LPTIM3, LPTIM4, LPTIM5, LPUART1, - MDIOS, MDMA, OPAMP1, OPAMP2, PWR, QUADSPI, RCC, RNG, RTC, SAI1, SAI2, SAI3, SAI4, SDMMC1, - SDMMC2, SPI1, SPI2, SPI3, SPI4, SPI5, SPI6, SWPMI1, SYSCFG, TIM1, TIM12, TIM13, TIM14, TIM15, - TIM16, TIM17, TIM2, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, UART4, UART5, UART7, UART8, USART1, - USART2, USART3, USART6, USB_OTG_FS, USB_OTG_HS, VREFBUF, WWDG1 -); -pub const GPIO_BASE: usize = 0x58020000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC = 18, - ADC3 = 127, - BDMA_Channel0 = 129, - BDMA_Channel1 = 130, - BDMA_Channel2 = 131, - BDMA_Channel3 = 132, - BDMA_Channel4 = 133, - BDMA_Channel5 = 134, - BDMA_Channel6 = 135, - BDMA_Channel7 = 136, - CEC = 94, - CRS = 144, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - ECC = 145, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - HRTIM1_FLT = 109, - HRTIM1_Master = 103, - HRTIM1_TIMA = 104, - HRTIM1_TIMB = 105, - HRTIM1_TIMC = 106, - HRTIM1_TIMD = 107, - HRTIM1_TIME = 108, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPTIM4 = 140, - LPTIM5 = 141, - LPUART1 = 142, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OTG_FS = 101, - OTG_FS_EP1_IN = 99, - OTG_FS_EP1_OUT = 98, - OTG_FS_WKUP = 100, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_AVD = 1, - QUADSPI = 92, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SAI3 = 114, - SAI4 = 146, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TAMP_STAMP = 2, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(ADC3); - declare!(BDMA_Channel0); - declare!(BDMA_Channel1); - declare!(BDMA_Channel2); - declare!(BDMA_Channel3); - declare!(BDMA_Channel4); - declare!(BDMA_Channel5); - declare!(BDMA_Channel6); - declare!(BDMA_Channel7); - declare!(CEC); - declare!(CRS); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(ECC); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HRTIM1_FLT); - declare!(HRTIM1_Master); - declare!(HRTIM1_TIMA); - declare!(HRTIM1_TIMB); - declare!(HRTIM1_TIMC); - declare!(HRTIM1_TIMD); - declare!(HRTIM1_TIME); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPTIM4); - declare!(LPTIM5); - declare!(LPUART1); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OTG_FS); - declare!(OTG_FS_EP1_IN); - declare!(OTG_FS_EP1_OUT); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_AVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SAI3); - declare!(SAI4); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn ADC3(); - fn BDMA_Channel0(); - fn BDMA_Channel1(); - fn BDMA_Channel2(); - fn BDMA_Channel3(); - fn BDMA_Channel4(); - fn BDMA_Channel5(); - fn BDMA_Channel6(); - fn BDMA_Channel7(); - fn CEC(); - fn CRS(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn ECC(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HRTIM1_FLT(); - fn HRTIM1_Master(); - fn HRTIM1_TIMA(); - fn HRTIM1_TIMB(); - fn HRTIM1_TIMC(); - fn HRTIM1_TIMD(); - fn HRTIM1_TIME(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPTIM4(); - fn LPTIM5(); - fn LPUART1(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OTG_FS(); - fn OTG_FS_EP1_IN(); - fn OTG_FS_EP1_OUT(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_AVD(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SAI3(); - fn SAI4(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 150] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_AVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: QUADSPI }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { - _handler: OTG_FS_EP1_OUT, - }, - Vector { - _handler: OTG_FS_EP1_IN, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { _handler: OTG_FS }, - Vector { _reserved: 0 }, - Vector { - _handler: HRTIM1_Master, - }, - Vector { - _handler: HRTIM1_TIMA, - }, - Vector { - _handler: HRTIM1_TIMB, - }, - Vector { - _handler: HRTIM1_TIMC, - }, - Vector { - _handler: HRTIM1_TIMD, - }, - Vector { - _handler: HRTIM1_TIME, - }, - Vector { - _handler: HRTIM1_FLT, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SAI3 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _reserved: 0 }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: ADC3 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA_Channel0, - }, - Vector { - _handler: BDMA_Channel1, - }, - Vector { - _handler: BDMA_Channel2, - }, - Vector { - _handler: BDMA_Channel3, - }, - Vector { - _handler: BDMA_Channel4, - }, - Vector { - _handler: BDMA_Channel5, - }, - Vector { - _handler: BDMA_Channel6, - }, - Vector { - _handler: BDMA_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: LPTIM4 }, - Vector { _handler: LPTIM5 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _handler: SAI4 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -impl_rng!(0x48021800); -impl_sdmmc!(SDMMC1, 0x52007000); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -impl_sdmmc!(SDMMC2, 0x48022400); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); diff --git a/embassy-stm32/src/chip/stm32h742bi.rs b/embassy-stm32/src/chip/stm32h742bi.rs deleted file mode 100644 index 16c6b22f..00000000 --- a/embassy-stm32/src/chip/stm32h742bi.rs +++ /dev/null @@ -1,892 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, ADC3, BDMA, COMP1, COMP2, DAC1, DCMI, DMA2D, ETH, FDCAN1, - FDCAN2, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, - PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, - PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, - PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, - PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, - PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, - PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, - PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, - PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, PJ10, PJ11, PJ12, - PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, PK11, PK12, PK13, - PK14, PK15, I2C1, I2C2, I2C3, I2C4, IWDG1, LPTIM1, LPTIM2, LPTIM3, LPTIM4, LPTIM5, LPUART1, - MDIOS, MDMA, OPAMP1, OPAMP2, PWR, QUADSPI, RCC, RNG, RTC, SAI1, SAI2, SAI3, SAI4, SDMMC1, - SDMMC2, SPI1, SPI2, SPI3, SPI4, SPI5, SPI6, SWPMI1, SYSCFG, TIM1, TIM12, TIM13, TIM14, TIM15, - TIM16, TIM17, TIM2, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, UART4, UART5, UART7, UART8, USART1, - USART2, USART3, USART6, USB_OTG_FS, USB_OTG_HS, VREFBUF, WWDG1 -); -pub const GPIO_BASE: usize = 0x58020000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC = 18, - ADC3 = 127, - BDMA_Channel0 = 129, - BDMA_Channel1 = 130, - BDMA_Channel2 = 131, - BDMA_Channel3 = 132, - BDMA_Channel4 = 133, - BDMA_Channel5 = 134, - BDMA_Channel6 = 135, - BDMA_Channel7 = 136, - CEC = 94, - CRS = 144, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - ECC = 145, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - HRTIM1_FLT = 109, - HRTIM1_Master = 103, - HRTIM1_TIMA = 104, - HRTIM1_TIMB = 105, - HRTIM1_TIMC = 106, - HRTIM1_TIMD = 107, - HRTIM1_TIME = 108, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPTIM4 = 140, - LPTIM5 = 141, - LPUART1 = 142, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OTG_FS = 101, - OTG_FS_EP1_IN = 99, - OTG_FS_EP1_OUT = 98, - OTG_FS_WKUP = 100, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_AVD = 1, - QUADSPI = 92, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SAI3 = 114, - SAI4 = 146, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TAMP_STAMP = 2, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(ADC3); - declare!(BDMA_Channel0); - declare!(BDMA_Channel1); - declare!(BDMA_Channel2); - declare!(BDMA_Channel3); - declare!(BDMA_Channel4); - declare!(BDMA_Channel5); - declare!(BDMA_Channel6); - declare!(BDMA_Channel7); - declare!(CEC); - declare!(CRS); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(ECC); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HRTIM1_FLT); - declare!(HRTIM1_Master); - declare!(HRTIM1_TIMA); - declare!(HRTIM1_TIMB); - declare!(HRTIM1_TIMC); - declare!(HRTIM1_TIMD); - declare!(HRTIM1_TIME); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPTIM4); - declare!(LPTIM5); - declare!(LPUART1); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OTG_FS); - declare!(OTG_FS_EP1_IN); - declare!(OTG_FS_EP1_OUT); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_AVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SAI3); - declare!(SAI4); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn ADC3(); - fn BDMA_Channel0(); - fn BDMA_Channel1(); - fn BDMA_Channel2(); - fn BDMA_Channel3(); - fn BDMA_Channel4(); - fn BDMA_Channel5(); - fn BDMA_Channel6(); - fn BDMA_Channel7(); - fn CEC(); - fn CRS(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn ECC(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HRTIM1_FLT(); - fn HRTIM1_Master(); - fn HRTIM1_TIMA(); - fn HRTIM1_TIMB(); - fn HRTIM1_TIMC(); - fn HRTIM1_TIMD(); - fn HRTIM1_TIME(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPTIM4(); - fn LPTIM5(); - fn LPUART1(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OTG_FS(); - fn OTG_FS_EP1_IN(); - fn OTG_FS_EP1_OUT(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_AVD(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SAI3(); - fn SAI4(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 150] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_AVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: QUADSPI }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { - _handler: OTG_FS_EP1_OUT, - }, - Vector { - _handler: OTG_FS_EP1_IN, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { _handler: OTG_FS }, - Vector { _reserved: 0 }, - Vector { - _handler: HRTIM1_Master, - }, - Vector { - _handler: HRTIM1_TIMA, - }, - Vector { - _handler: HRTIM1_TIMB, - }, - Vector { - _handler: HRTIM1_TIMC, - }, - Vector { - _handler: HRTIM1_TIMD, - }, - Vector { - _handler: HRTIM1_TIME, - }, - Vector { - _handler: HRTIM1_FLT, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SAI3 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _reserved: 0 }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: ADC3 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA_Channel0, - }, - Vector { - _handler: BDMA_Channel1, - }, - Vector { - _handler: BDMA_Channel2, - }, - Vector { - _handler: BDMA_Channel3, - }, - Vector { - _handler: BDMA_Channel4, - }, - Vector { - _handler: BDMA_Channel5, - }, - Vector { - _handler: BDMA_Channel6, - }, - Vector { - _handler: BDMA_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: LPTIM4 }, - Vector { _handler: LPTIM5 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _handler: SAI4 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -impl_rng!(0x48021800); -impl_sdmmc!(SDMMC1, 0x52007000); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -impl_sdmmc!(SDMMC2, 0x48022400); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); diff --git a/embassy-stm32/src/chip/stm32h742ig.rs b/embassy-stm32/src/chip/stm32h742ig.rs deleted file mode 100644 index 16c6b22f..00000000 --- a/embassy-stm32/src/chip/stm32h742ig.rs +++ /dev/null @@ -1,892 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, ADC3, BDMA, COMP1, COMP2, DAC1, DCMI, DMA2D, ETH, FDCAN1, - FDCAN2, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, - PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, - PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, - PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, - PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, - PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, - PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, - PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, - PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, PJ10, PJ11, PJ12, - PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, PK11, PK12, PK13, - PK14, PK15, I2C1, I2C2, I2C3, I2C4, IWDG1, LPTIM1, LPTIM2, LPTIM3, LPTIM4, LPTIM5, LPUART1, - MDIOS, MDMA, OPAMP1, OPAMP2, PWR, QUADSPI, RCC, RNG, RTC, SAI1, SAI2, SAI3, SAI4, SDMMC1, - SDMMC2, SPI1, SPI2, SPI3, SPI4, SPI5, SPI6, SWPMI1, SYSCFG, TIM1, TIM12, TIM13, TIM14, TIM15, - TIM16, TIM17, TIM2, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, UART4, UART5, UART7, UART8, USART1, - USART2, USART3, USART6, USB_OTG_FS, USB_OTG_HS, VREFBUF, WWDG1 -); -pub const GPIO_BASE: usize = 0x58020000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC = 18, - ADC3 = 127, - BDMA_Channel0 = 129, - BDMA_Channel1 = 130, - BDMA_Channel2 = 131, - BDMA_Channel3 = 132, - BDMA_Channel4 = 133, - BDMA_Channel5 = 134, - BDMA_Channel6 = 135, - BDMA_Channel7 = 136, - CEC = 94, - CRS = 144, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - ECC = 145, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - HRTIM1_FLT = 109, - HRTIM1_Master = 103, - HRTIM1_TIMA = 104, - HRTIM1_TIMB = 105, - HRTIM1_TIMC = 106, - HRTIM1_TIMD = 107, - HRTIM1_TIME = 108, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPTIM4 = 140, - LPTIM5 = 141, - LPUART1 = 142, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OTG_FS = 101, - OTG_FS_EP1_IN = 99, - OTG_FS_EP1_OUT = 98, - OTG_FS_WKUP = 100, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_AVD = 1, - QUADSPI = 92, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SAI3 = 114, - SAI4 = 146, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TAMP_STAMP = 2, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(ADC3); - declare!(BDMA_Channel0); - declare!(BDMA_Channel1); - declare!(BDMA_Channel2); - declare!(BDMA_Channel3); - declare!(BDMA_Channel4); - declare!(BDMA_Channel5); - declare!(BDMA_Channel6); - declare!(BDMA_Channel7); - declare!(CEC); - declare!(CRS); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(ECC); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HRTIM1_FLT); - declare!(HRTIM1_Master); - declare!(HRTIM1_TIMA); - declare!(HRTIM1_TIMB); - declare!(HRTIM1_TIMC); - declare!(HRTIM1_TIMD); - declare!(HRTIM1_TIME); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPTIM4); - declare!(LPTIM5); - declare!(LPUART1); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OTG_FS); - declare!(OTG_FS_EP1_IN); - declare!(OTG_FS_EP1_OUT); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_AVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SAI3); - declare!(SAI4); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn ADC3(); - fn BDMA_Channel0(); - fn BDMA_Channel1(); - fn BDMA_Channel2(); - fn BDMA_Channel3(); - fn BDMA_Channel4(); - fn BDMA_Channel5(); - fn BDMA_Channel6(); - fn BDMA_Channel7(); - fn CEC(); - fn CRS(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn ECC(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HRTIM1_FLT(); - fn HRTIM1_Master(); - fn HRTIM1_TIMA(); - fn HRTIM1_TIMB(); - fn HRTIM1_TIMC(); - fn HRTIM1_TIMD(); - fn HRTIM1_TIME(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPTIM4(); - fn LPTIM5(); - fn LPUART1(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OTG_FS(); - fn OTG_FS_EP1_IN(); - fn OTG_FS_EP1_OUT(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_AVD(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SAI3(); - fn SAI4(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 150] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_AVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: QUADSPI }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { - _handler: OTG_FS_EP1_OUT, - }, - Vector { - _handler: OTG_FS_EP1_IN, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { _handler: OTG_FS }, - Vector { _reserved: 0 }, - Vector { - _handler: HRTIM1_Master, - }, - Vector { - _handler: HRTIM1_TIMA, - }, - Vector { - _handler: HRTIM1_TIMB, - }, - Vector { - _handler: HRTIM1_TIMC, - }, - Vector { - _handler: HRTIM1_TIMD, - }, - Vector { - _handler: HRTIM1_TIME, - }, - Vector { - _handler: HRTIM1_FLT, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SAI3 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _reserved: 0 }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: ADC3 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA_Channel0, - }, - Vector { - _handler: BDMA_Channel1, - }, - Vector { - _handler: BDMA_Channel2, - }, - Vector { - _handler: BDMA_Channel3, - }, - Vector { - _handler: BDMA_Channel4, - }, - Vector { - _handler: BDMA_Channel5, - }, - Vector { - _handler: BDMA_Channel6, - }, - Vector { - _handler: BDMA_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: LPTIM4 }, - Vector { _handler: LPTIM5 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _handler: SAI4 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -impl_rng!(0x48021800); -impl_sdmmc!(SDMMC1, 0x52007000); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -impl_sdmmc!(SDMMC2, 0x48022400); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); diff --git a/embassy-stm32/src/chip/stm32h742ii.rs b/embassy-stm32/src/chip/stm32h742ii.rs deleted file mode 100644 index 16c6b22f..00000000 --- a/embassy-stm32/src/chip/stm32h742ii.rs +++ /dev/null @@ -1,892 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, ADC3, BDMA, COMP1, COMP2, DAC1, DCMI, DMA2D, ETH, FDCAN1, - FDCAN2, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, - PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, - PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, - PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, - PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, - PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, - PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, - PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, - PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, PJ10, PJ11, PJ12, - PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, PK11, PK12, PK13, - PK14, PK15, I2C1, I2C2, I2C3, I2C4, IWDG1, LPTIM1, LPTIM2, LPTIM3, LPTIM4, LPTIM5, LPUART1, - MDIOS, MDMA, OPAMP1, OPAMP2, PWR, QUADSPI, RCC, RNG, RTC, SAI1, SAI2, SAI3, SAI4, SDMMC1, - SDMMC2, SPI1, SPI2, SPI3, SPI4, SPI5, SPI6, SWPMI1, SYSCFG, TIM1, TIM12, TIM13, TIM14, TIM15, - TIM16, TIM17, TIM2, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, UART4, UART5, UART7, UART8, USART1, - USART2, USART3, USART6, USB_OTG_FS, USB_OTG_HS, VREFBUF, WWDG1 -); -pub const GPIO_BASE: usize = 0x58020000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC = 18, - ADC3 = 127, - BDMA_Channel0 = 129, - BDMA_Channel1 = 130, - BDMA_Channel2 = 131, - BDMA_Channel3 = 132, - BDMA_Channel4 = 133, - BDMA_Channel5 = 134, - BDMA_Channel6 = 135, - BDMA_Channel7 = 136, - CEC = 94, - CRS = 144, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - ECC = 145, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - HRTIM1_FLT = 109, - HRTIM1_Master = 103, - HRTIM1_TIMA = 104, - HRTIM1_TIMB = 105, - HRTIM1_TIMC = 106, - HRTIM1_TIMD = 107, - HRTIM1_TIME = 108, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPTIM4 = 140, - LPTIM5 = 141, - LPUART1 = 142, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OTG_FS = 101, - OTG_FS_EP1_IN = 99, - OTG_FS_EP1_OUT = 98, - OTG_FS_WKUP = 100, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_AVD = 1, - QUADSPI = 92, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SAI3 = 114, - SAI4 = 146, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TAMP_STAMP = 2, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(ADC3); - declare!(BDMA_Channel0); - declare!(BDMA_Channel1); - declare!(BDMA_Channel2); - declare!(BDMA_Channel3); - declare!(BDMA_Channel4); - declare!(BDMA_Channel5); - declare!(BDMA_Channel6); - declare!(BDMA_Channel7); - declare!(CEC); - declare!(CRS); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(ECC); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HRTIM1_FLT); - declare!(HRTIM1_Master); - declare!(HRTIM1_TIMA); - declare!(HRTIM1_TIMB); - declare!(HRTIM1_TIMC); - declare!(HRTIM1_TIMD); - declare!(HRTIM1_TIME); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPTIM4); - declare!(LPTIM5); - declare!(LPUART1); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OTG_FS); - declare!(OTG_FS_EP1_IN); - declare!(OTG_FS_EP1_OUT); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_AVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SAI3); - declare!(SAI4); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn ADC3(); - fn BDMA_Channel0(); - fn BDMA_Channel1(); - fn BDMA_Channel2(); - fn BDMA_Channel3(); - fn BDMA_Channel4(); - fn BDMA_Channel5(); - fn BDMA_Channel6(); - fn BDMA_Channel7(); - fn CEC(); - fn CRS(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn ECC(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HRTIM1_FLT(); - fn HRTIM1_Master(); - fn HRTIM1_TIMA(); - fn HRTIM1_TIMB(); - fn HRTIM1_TIMC(); - fn HRTIM1_TIMD(); - fn HRTIM1_TIME(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPTIM4(); - fn LPTIM5(); - fn LPUART1(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OTG_FS(); - fn OTG_FS_EP1_IN(); - fn OTG_FS_EP1_OUT(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_AVD(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SAI3(); - fn SAI4(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 150] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_AVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: QUADSPI }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { - _handler: OTG_FS_EP1_OUT, - }, - Vector { - _handler: OTG_FS_EP1_IN, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { _handler: OTG_FS }, - Vector { _reserved: 0 }, - Vector { - _handler: HRTIM1_Master, - }, - Vector { - _handler: HRTIM1_TIMA, - }, - Vector { - _handler: HRTIM1_TIMB, - }, - Vector { - _handler: HRTIM1_TIMC, - }, - Vector { - _handler: HRTIM1_TIMD, - }, - Vector { - _handler: HRTIM1_TIME, - }, - Vector { - _handler: HRTIM1_FLT, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SAI3 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _reserved: 0 }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: ADC3 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA_Channel0, - }, - Vector { - _handler: BDMA_Channel1, - }, - Vector { - _handler: BDMA_Channel2, - }, - Vector { - _handler: BDMA_Channel3, - }, - Vector { - _handler: BDMA_Channel4, - }, - Vector { - _handler: BDMA_Channel5, - }, - Vector { - _handler: BDMA_Channel6, - }, - Vector { - _handler: BDMA_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: LPTIM4 }, - Vector { _handler: LPTIM5 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _handler: SAI4 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -impl_rng!(0x48021800); -impl_sdmmc!(SDMMC1, 0x52007000); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -impl_sdmmc!(SDMMC2, 0x48022400); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); diff --git a/embassy-stm32/src/chip/stm32h742vg.rs b/embassy-stm32/src/chip/stm32h742vg.rs deleted file mode 100644 index 548d9af4..00000000 --- a/embassy-stm32/src/chip/stm32h742vg.rs +++ /dev/null @@ -1,892 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, ADC3, BDMA, COMP1, COMP2, DAC1, DCMI, DMA2D, ETH, FDCAN1, - FDCAN2, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, - PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, - PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, - PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, - PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, - PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, - PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, - PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, - PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, PJ10, PJ11, PJ12, - PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, PK11, PK12, PK13, - PK14, PK15, I2C1, I2C2, I2C3, I2C4, IWDG1, LPTIM1, LPTIM2, LPTIM3, LPTIM4, LPTIM5, LPUART1, - MDIOS, MDMA, OPAMP1, OPAMP2, PWR, QUADSPI, RCC, RNG, RTC, SAI1, SAI2, SAI3, SAI4, SDMMC1, - SDMMC2, SPI1, SPI2, SPI3, SPI4, SPI6, SWPMI1, SYSCFG, TIM1, TIM12, TIM13, TIM14, TIM15, TIM16, - TIM17, TIM2, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, UART4, UART5, UART7, UART8, USART1, USART2, - USART3, USART6, USB_OTG_FS, USB_OTG_HS, VREFBUF, WWDG1 -); -pub const GPIO_BASE: usize = 0x58020000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC = 18, - ADC3 = 127, - BDMA_Channel0 = 129, - BDMA_Channel1 = 130, - BDMA_Channel2 = 131, - BDMA_Channel3 = 132, - BDMA_Channel4 = 133, - BDMA_Channel5 = 134, - BDMA_Channel6 = 135, - BDMA_Channel7 = 136, - CEC = 94, - CRS = 144, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - ECC = 145, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - HRTIM1_FLT = 109, - HRTIM1_Master = 103, - HRTIM1_TIMA = 104, - HRTIM1_TIMB = 105, - HRTIM1_TIMC = 106, - HRTIM1_TIMD = 107, - HRTIM1_TIME = 108, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPTIM4 = 140, - LPTIM5 = 141, - LPUART1 = 142, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OTG_FS = 101, - OTG_FS_EP1_IN = 99, - OTG_FS_EP1_OUT = 98, - OTG_FS_WKUP = 100, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_AVD = 1, - QUADSPI = 92, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SAI3 = 114, - SAI4 = 146, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TAMP_STAMP = 2, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(ADC3); - declare!(BDMA_Channel0); - declare!(BDMA_Channel1); - declare!(BDMA_Channel2); - declare!(BDMA_Channel3); - declare!(BDMA_Channel4); - declare!(BDMA_Channel5); - declare!(BDMA_Channel6); - declare!(BDMA_Channel7); - declare!(CEC); - declare!(CRS); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(ECC); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HRTIM1_FLT); - declare!(HRTIM1_Master); - declare!(HRTIM1_TIMA); - declare!(HRTIM1_TIMB); - declare!(HRTIM1_TIMC); - declare!(HRTIM1_TIMD); - declare!(HRTIM1_TIME); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPTIM4); - declare!(LPTIM5); - declare!(LPUART1); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OTG_FS); - declare!(OTG_FS_EP1_IN); - declare!(OTG_FS_EP1_OUT); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_AVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SAI3); - declare!(SAI4); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn ADC3(); - fn BDMA_Channel0(); - fn BDMA_Channel1(); - fn BDMA_Channel2(); - fn BDMA_Channel3(); - fn BDMA_Channel4(); - fn BDMA_Channel5(); - fn BDMA_Channel6(); - fn BDMA_Channel7(); - fn CEC(); - fn CRS(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn ECC(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HRTIM1_FLT(); - fn HRTIM1_Master(); - fn HRTIM1_TIMA(); - fn HRTIM1_TIMB(); - fn HRTIM1_TIMC(); - fn HRTIM1_TIMD(); - fn HRTIM1_TIME(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPTIM4(); - fn LPTIM5(); - fn LPUART1(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OTG_FS(); - fn OTG_FS_EP1_IN(); - fn OTG_FS_EP1_OUT(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_AVD(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SAI3(); - fn SAI4(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 150] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_AVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: QUADSPI }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { - _handler: OTG_FS_EP1_OUT, - }, - Vector { - _handler: OTG_FS_EP1_IN, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { _handler: OTG_FS }, - Vector { _reserved: 0 }, - Vector { - _handler: HRTIM1_Master, - }, - Vector { - _handler: HRTIM1_TIMA, - }, - Vector { - _handler: HRTIM1_TIMB, - }, - Vector { - _handler: HRTIM1_TIMC, - }, - Vector { - _handler: HRTIM1_TIMD, - }, - Vector { - _handler: HRTIM1_TIME, - }, - Vector { - _handler: HRTIM1_FLT, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SAI3 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _reserved: 0 }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: ADC3 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA_Channel0, - }, - Vector { - _handler: BDMA_Channel1, - }, - Vector { - _handler: BDMA_Channel2, - }, - Vector { - _handler: BDMA_Channel3, - }, - Vector { - _handler: BDMA_Channel4, - }, - Vector { - _handler: BDMA_Channel5, - }, - Vector { - _handler: BDMA_Channel6, - }, - Vector { - _handler: BDMA_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: LPTIM4 }, - Vector { _handler: LPTIM5 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _handler: SAI4 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -impl_rng!(0x48021800); -impl_sdmmc!(SDMMC1, 0x52007000); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -impl_sdmmc!(SDMMC2, 0x48022400); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); diff --git a/embassy-stm32/src/chip/stm32h742vi.rs b/embassy-stm32/src/chip/stm32h742vi.rs deleted file mode 100644 index 548d9af4..00000000 --- a/embassy-stm32/src/chip/stm32h742vi.rs +++ /dev/null @@ -1,892 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, ADC3, BDMA, COMP1, COMP2, DAC1, DCMI, DMA2D, ETH, FDCAN1, - FDCAN2, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, - PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, - PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, - PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, - PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, - PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, - PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, - PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, - PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, PJ10, PJ11, PJ12, - PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, PK11, PK12, PK13, - PK14, PK15, I2C1, I2C2, I2C3, I2C4, IWDG1, LPTIM1, LPTIM2, LPTIM3, LPTIM4, LPTIM5, LPUART1, - MDIOS, MDMA, OPAMP1, OPAMP2, PWR, QUADSPI, RCC, RNG, RTC, SAI1, SAI2, SAI3, SAI4, SDMMC1, - SDMMC2, SPI1, SPI2, SPI3, SPI4, SPI6, SWPMI1, SYSCFG, TIM1, TIM12, TIM13, TIM14, TIM15, TIM16, - TIM17, TIM2, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, UART4, UART5, UART7, UART8, USART1, USART2, - USART3, USART6, USB_OTG_FS, USB_OTG_HS, VREFBUF, WWDG1 -); -pub const GPIO_BASE: usize = 0x58020000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC = 18, - ADC3 = 127, - BDMA_Channel0 = 129, - BDMA_Channel1 = 130, - BDMA_Channel2 = 131, - BDMA_Channel3 = 132, - BDMA_Channel4 = 133, - BDMA_Channel5 = 134, - BDMA_Channel6 = 135, - BDMA_Channel7 = 136, - CEC = 94, - CRS = 144, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - ECC = 145, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - HRTIM1_FLT = 109, - HRTIM1_Master = 103, - HRTIM1_TIMA = 104, - HRTIM1_TIMB = 105, - HRTIM1_TIMC = 106, - HRTIM1_TIMD = 107, - HRTIM1_TIME = 108, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPTIM4 = 140, - LPTIM5 = 141, - LPUART1 = 142, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OTG_FS = 101, - OTG_FS_EP1_IN = 99, - OTG_FS_EP1_OUT = 98, - OTG_FS_WKUP = 100, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_AVD = 1, - QUADSPI = 92, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SAI3 = 114, - SAI4 = 146, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TAMP_STAMP = 2, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(ADC3); - declare!(BDMA_Channel0); - declare!(BDMA_Channel1); - declare!(BDMA_Channel2); - declare!(BDMA_Channel3); - declare!(BDMA_Channel4); - declare!(BDMA_Channel5); - declare!(BDMA_Channel6); - declare!(BDMA_Channel7); - declare!(CEC); - declare!(CRS); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(ECC); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HRTIM1_FLT); - declare!(HRTIM1_Master); - declare!(HRTIM1_TIMA); - declare!(HRTIM1_TIMB); - declare!(HRTIM1_TIMC); - declare!(HRTIM1_TIMD); - declare!(HRTIM1_TIME); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPTIM4); - declare!(LPTIM5); - declare!(LPUART1); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OTG_FS); - declare!(OTG_FS_EP1_IN); - declare!(OTG_FS_EP1_OUT); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_AVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SAI3); - declare!(SAI4); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn ADC3(); - fn BDMA_Channel0(); - fn BDMA_Channel1(); - fn BDMA_Channel2(); - fn BDMA_Channel3(); - fn BDMA_Channel4(); - fn BDMA_Channel5(); - fn BDMA_Channel6(); - fn BDMA_Channel7(); - fn CEC(); - fn CRS(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn ECC(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HRTIM1_FLT(); - fn HRTIM1_Master(); - fn HRTIM1_TIMA(); - fn HRTIM1_TIMB(); - fn HRTIM1_TIMC(); - fn HRTIM1_TIMD(); - fn HRTIM1_TIME(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPTIM4(); - fn LPTIM5(); - fn LPUART1(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OTG_FS(); - fn OTG_FS_EP1_IN(); - fn OTG_FS_EP1_OUT(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_AVD(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SAI3(); - fn SAI4(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 150] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_AVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: QUADSPI }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { - _handler: OTG_FS_EP1_OUT, - }, - Vector { - _handler: OTG_FS_EP1_IN, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { _handler: OTG_FS }, - Vector { _reserved: 0 }, - Vector { - _handler: HRTIM1_Master, - }, - Vector { - _handler: HRTIM1_TIMA, - }, - Vector { - _handler: HRTIM1_TIMB, - }, - Vector { - _handler: HRTIM1_TIMC, - }, - Vector { - _handler: HRTIM1_TIMD, - }, - Vector { - _handler: HRTIM1_TIME, - }, - Vector { - _handler: HRTIM1_FLT, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SAI3 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _reserved: 0 }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: ADC3 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA_Channel0, - }, - Vector { - _handler: BDMA_Channel1, - }, - Vector { - _handler: BDMA_Channel2, - }, - Vector { - _handler: BDMA_Channel3, - }, - Vector { - _handler: BDMA_Channel4, - }, - Vector { - _handler: BDMA_Channel5, - }, - Vector { - _handler: BDMA_Channel6, - }, - Vector { - _handler: BDMA_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: LPTIM4 }, - Vector { _handler: LPTIM5 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _handler: SAI4 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -impl_rng!(0x48021800); -impl_sdmmc!(SDMMC1, 0x52007000); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -impl_sdmmc!(SDMMC2, 0x48022400); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); diff --git a/embassy-stm32/src/chip/stm32h742xg.rs b/embassy-stm32/src/chip/stm32h742xg.rs deleted file mode 100644 index 16c6b22f..00000000 --- a/embassy-stm32/src/chip/stm32h742xg.rs +++ /dev/null @@ -1,892 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, ADC3, BDMA, COMP1, COMP2, DAC1, DCMI, DMA2D, ETH, FDCAN1, - FDCAN2, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, - PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, - PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, - PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, - PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, - PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, - PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, - PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, - PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, PJ10, PJ11, PJ12, - PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, PK11, PK12, PK13, - PK14, PK15, I2C1, I2C2, I2C3, I2C4, IWDG1, LPTIM1, LPTIM2, LPTIM3, LPTIM4, LPTIM5, LPUART1, - MDIOS, MDMA, OPAMP1, OPAMP2, PWR, QUADSPI, RCC, RNG, RTC, SAI1, SAI2, SAI3, SAI4, SDMMC1, - SDMMC2, SPI1, SPI2, SPI3, SPI4, SPI5, SPI6, SWPMI1, SYSCFG, TIM1, TIM12, TIM13, TIM14, TIM15, - TIM16, TIM17, TIM2, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, UART4, UART5, UART7, UART8, USART1, - USART2, USART3, USART6, USB_OTG_FS, USB_OTG_HS, VREFBUF, WWDG1 -); -pub const GPIO_BASE: usize = 0x58020000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC = 18, - ADC3 = 127, - BDMA_Channel0 = 129, - BDMA_Channel1 = 130, - BDMA_Channel2 = 131, - BDMA_Channel3 = 132, - BDMA_Channel4 = 133, - BDMA_Channel5 = 134, - BDMA_Channel6 = 135, - BDMA_Channel7 = 136, - CEC = 94, - CRS = 144, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - ECC = 145, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - HRTIM1_FLT = 109, - HRTIM1_Master = 103, - HRTIM1_TIMA = 104, - HRTIM1_TIMB = 105, - HRTIM1_TIMC = 106, - HRTIM1_TIMD = 107, - HRTIM1_TIME = 108, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPTIM4 = 140, - LPTIM5 = 141, - LPUART1 = 142, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OTG_FS = 101, - OTG_FS_EP1_IN = 99, - OTG_FS_EP1_OUT = 98, - OTG_FS_WKUP = 100, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_AVD = 1, - QUADSPI = 92, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SAI3 = 114, - SAI4 = 146, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TAMP_STAMP = 2, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(ADC3); - declare!(BDMA_Channel0); - declare!(BDMA_Channel1); - declare!(BDMA_Channel2); - declare!(BDMA_Channel3); - declare!(BDMA_Channel4); - declare!(BDMA_Channel5); - declare!(BDMA_Channel6); - declare!(BDMA_Channel7); - declare!(CEC); - declare!(CRS); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(ECC); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HRTIM1_FLT); - declare!(HRTIM1_Master); - declare!(HRTIM1_TIMA); - declare!(HRTIM1_TIMB); - declare!(HRTIM1_TIMC); - declare!(HRTIM1_TIMD); - declare!(HRTIM1_TIME); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPTIM4); - declare!(LPTIM5); - declare!(LPUART1); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OTG_FS); - declare!(OTG_FS_EP1_IN); - declare!(OTG_FS_EP1_OUT); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_AVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SAI3); - declare!(SAI4); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn ADC3(); - fn BDMA_Channel0(); - fn BDMA_Channel1(); - fn BDMA_Channel2(); - fn BDMA_Channel3(); - fn BDMA_Channel4(); - fn BDMA_Channel5(); - fn BDMA_Channel6(); - fn BDMA_Channel7(); - fn CEC(); - fn CRS(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn ECC(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HRTIM1_FLT(); - fn HRTIM1_Master(); - fn HRTIM1_TIMA(); - fn HRTIM1_TIMB(); - fn HRTIM1_TIMC(); - fn HRTIM1_TIMD(); - fn HRTIM1_TIME(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPTIM4(); - fn LPTIM5(); - fn LPUART1(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OTG_FS(); - fn OTG_FS_EP1_IN(); - fn OTG_FS_EP1_OUT(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_AVD(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SAI3(); - fn SAI4(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 150] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_AVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: QUADSPI }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { - _handler: OTG_FS_EP1_OUT, - }, - Vector { - _handler: OTG_FS_EP1_IN, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { _handler: OTG_FS }, - Vector { _reserved: 0 }, - Vector { - _handler: HRTIM1_Master, - }, - Vector { - _handler: HRTIM1_TIMA, - }, - Vector { - _handler: HRTIM1_TIMB, - }, - Vector { - _handler: HRTIM1_TIMC, - }, - Vector { - _handler: HRTIM1_TIMD, - }, - Vector { - _handler: HRTIM1_TIME, - }, - Vector { - _handler: HRTIM1_FLT, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SAI3 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _reserved: 0 }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: ADC3 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA_Channel0, - }, - Vector { - _handler: BDMA_Channel1, - }, - Vector { - _handler: BDMA_Channel2, - }, - Vector { - _handler: BDMA_Channel3, - }, - Vector { - _handler: BDMA_Channel4, - }, - Vector { - _handler: BDMA_Channel5, - }, - Vector { - _handler: BDMA_Channel6, - }, - Vector { - _handler: BDMA_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: LPTIM4 }, - Vector { _handler: LPTIM5 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _handler: SAI4 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -impl_rng!(0x48021800); -impl_sdmmc!(SDMMC1, 0x52007000); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -impl_sdmmc!(SDMMC2, 0x48022400); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); diff --git a/embassy-stm32/src/chip/stm32h742xi.rs b/embassy-stm32/src/chip/stm32h742xi.rs deleted file mode 100644 index 16c6b22f..00000000 --- a/embassy-stm32/src/chip/stm32h742xi.rs +++ /dev/null @@ -1,892 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, ADC3, BDMA, COMP1, COMP2, DAC1, DCMI, DMA2D, ETH, FDCAN1, - FDCAN2, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, - PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, - PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, - PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, - PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, - PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, - PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, - PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, - PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, PJ10, PJ11, PJ12, - PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, PK11, PK12, PK13, - PK14, PK15, I2C1, I2C2, I2C3, I2C4, IWDG1, LPTIM1, LPTIM2, LPTIM3, LPTIM4, LPTIM5, LPUART1, - MDIOS, MDMA, OPAMP1, OPAMP2, PWR, QUADSPI, RCC, RNG, RTC, SAI1, SAI2, SAI3, SAI4, SDMMC1, - SDMMC2, SPI1, SPI2, SPI3, SPI4, SPI5, SPI6, SWPMI1, SYSCFG, TIM1, TIM12, TIM13, TIM14, TIM15, - TIM16, TIM17, TIM2, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, UART4, UART5, UART7, UART8, USART1, - USART2, USART3, USART6, USB_OTG_FS, USB_OTG_HS, VREFBUF, WWDG1 -); -pub const GPIO_BASE: usize = 0x58020000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC = 18, - ADC3 = 127, - BDMA_Channel0 = 129, - BDMA_Channel1 = 130, - BDMA_Channel2 = 131, - BDMA_Channel3 = 132, - BDMA_Channel4 = 133, - BDMA_Channel5 = 134, - BDMA_Channel6 = 135, - BDMA_Channel7 = 136, - CEC = 94, - CRS = 144, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - ECC = 145, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - HRTIM1_FLT = 109, - HRTIM1_Master = 103, - HRTIM1_TIMA = 104, - HRTIM1_TIMB = 105, - HRTIM1_TIMC = 106, - HRTIM1_TIMD = 107, - HRTIM1_TIME = 108, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPTIM4 = 140, - LPTIM5 = 141, - LPUART1 = 142, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OTG_FS = 101, - OTG_FS_EP1_IN = 99, - OTG_FS_EP1_OUT = 98, - OTG_FS_WKUP = 100, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_AVD = 1, - QUADSPI = 92, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SAI3 = 114, - SAI4 = 146, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TAMP_STAMP = 2, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(ADC3); - declare!(BDMA_Channel0); - declare!(BDMA_Channel1); - declare!(BDMA_Channel2); - declare!(BDMA_Channel3); - declare!(BDMA_Channel4); - declare!(BDMA_Channel5); - declare!(BDMA_Channel6); - declare!(BDMA_Channel7); - declare!(CEC); - declare!(CRS); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(ECC); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HRTIM1_FLT); - declare!(HRTIM1_Master); - declare!(HRTIM1_TIMA); - declare!(HRTIM1_TIMB); - declare!(HRTIM1_TIMC); - declare!(HRTIM1_TIMD); - declare!(HRTIM1_TIME); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPTIM4); - declare!(LPTIM5); - declare!(LPUART1); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OTG_FS); - declare!(OTG_FS_EP1_IN); - declare!(OTG_FS_EP1_OUT); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_AVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SAI3); - declare!(SAI4); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn ADC3(); - fn BDMA_Channel0(); - fn BDMA_Channel1(); - fn BDMA_Channel2(); - fn BDMA_Channel3(); - fn BDMA_Channel4(); - fn BDMA_Channel5(); - fn BDMA_Channel6(); - fn BDMA_Channel7(); - fn CEC(); - fn CRS(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn ECC(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HRTIM1_FLT(); - fn HRTIM1_Master(); - fn HRTIM1_TIMA(); - fn HRTIM1_TIMB(); - fn HRTIM1_TIMC(); - fn HRTIM1_TIMD(); - fn HRTIM1_TIME(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPTIM4(); - fn LPTIM5(); - fn LPUART1(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OTG_FS(); - fn OTG_FS_EP1_IN(); - fn OTG_FS_EP1_OUT(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_AVD(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SAI3(); - fn SAI4(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 150] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_AVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: QUADSPI }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { - _handler: OTG_FS_EP1_OUT, - }, - Vector { - _handler: OTG_FS_EP1_IN, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { _handler: OTG_FS }, - Vector { _reserved: 0 }, - Vector { - _handler: HRTIM1_Master, - }, - Vector { - _handler: HRTIM1_TIMA, - }, - Vector { - _handler: HRTIM1_TIMB, - }, - Vector { - _handler: HRTIM1_TIMC, - }, - Vector { - _handler: HRTIM1_TIMD, - }, - Vector { - _handler: HRTIM1_TIME, - }, - Vector { - _handler: HRTIM1_FLT, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SAI3 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _reserved: 0 }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: ADC3 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA_Channel0, - }, - Vector { - _handler: BDMA_Channel1, - }, - Vector { - _handler: BDMA_Channel2, - }, - Vector { - _handler: BDMA_Channel3, - }, - Vector { - _handler: BDMA_Channel4, - }, - Vector { - _handler: BDMA_Channel5, - }, - Vector { - _handler: BDMA_Channel6, - }, - Vector { - _handler: BDMA_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: LPTIM4 }, - Vector { _handler: LPTIM5 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _handler: SAI4 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -impl_rng!(0x48021800); -impl_sdmmc!(SDMMC1, 0x52007000); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -impl_sdmmc!(SDMMC2, 0x48022400); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); diff --git a/embassy-stm32/src/chip/stm32h742zg.rs b/embassy-stm32/src/chip/stm32h742zg.rs deleted file mode 100644 index 16c6b22f..00000000 --- a/embassy-stm32/src/chip/stm32h742zg.rs +++ /dev/null @@ -1,892 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, ADC3, BDMA, COMP1, COMP2, DAC1, DCMI, DMA2D, ETH, FDCAN1, - FDCAN2, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, - PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, - PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, - PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, - PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, - PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, - PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, - PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, - PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, PJ10, PJ11, PJ12, - PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, PK11, PK12, PK13, - PK14, PK15, I2C1, I2C2, I2C3, I2C4, IWDG1, LPTIM1, LPTIM2, LPTIM3, LPTIM4, LPTIM5, LPUART1, - MDIOS, MDMA, OPAMP1, OPAMP2, PWR, QUADSPI, RCC, RNG, RTC, SAI1, SAI2, SAI3, SAI4, SDMMC1, - SDMMC2, SPI1, SPI2, SPI3, SPI4, SPI5, SPI6, SWPMI1, SYSCFG, TIM1, TIM12, TIM13, TIM14, TIM15, - TIM16, TIM17, TIM2, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, UART4, UART5, UART7, UART8, USART1, - USART2, USART3, USART6, USB_OTG_FS, USB_OTG_HS, VREFBUF, WWDG1 -); -pub const GPIO_BASE: usize = 0x58020000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC = 18, - ADC3 = 127, - BDMA_Channel0 = 129, - BDMA_Channel1 = 130, - BDMA_Channel2 = 131, - BDMA_Channel3 = 132, - BDMA_Channel4 = 133, - BDMA_Channel5 = 134, - BDMA_Channel6 = 135, - BDMA_Channel7 = 136, - CEC = 94, - CRS = 144, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - ECC = 145, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - HRTIM1_FLT = 109, - HRTIM1_Master = 103, - HRTIM1_TIMA = 104, - HRTIM1_TIMB = 105, - HRTIM1_TIMC = 106, - HRTIM1_TIMD = 107, - HRTIM1_TIME = 108, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPTIM4 = 140, - LPTIM5 = 141, - LPUART1 = 142, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OTG_FS = 101, - OTG_FS_EP1_IN = 99, - OTG_FS_EP1_OUT = 98, - OTG_FS_WKUP = 100, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_AVD = 1, - QUADSPI = 92, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SAI3 = 114, - SAI4 = 146, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TAMP_STAMP = 2, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(ADC3); - declare!(BDMA_Channel0); - declare!(BDMA_Channel1); - declare!(BDMA_Channel2); - declare!(BDMA_Channel3); - declare!(BDMA_Channel4); - declare!(BDMA_Channel5); - declare!(BDMA_Channel6); - declare!(BDMA_Channel7); - declare!(CEC); - declare!(CRS); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(ECC); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HRTIM1_FLT); - declare!(HRTIM1_Master); - declare!(HRTIM1_TIMA); - declare!(HRTIM1_TIMB); - declare!(HRTIM1_TIMC); - declare!(HRTIM1_TIMD); - declare!(HRTIM1_TIME); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPTIM4); - declare!(LPTIM5); - declare!(LPUART1); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OTG_FS); - declare!(OTG_FS_EP1_IN); - declare!(OTG_FS_EP1_OUT); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_AVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SAI3); - declare!(SAI4); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn ADC3(); - fn BDMA_Channel0(); - fn BDMA_Channel1(); - fn BDMA_Channel2(); - fn BDMA_Channel3(); - fn BDMA_Channel4(); - fn BDMA_Channel5(); - fn BDMA_Channel6(); - fn BDMA_Channel7(); - fn CEC(); - fn CRS(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn ECC(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HRTIM1_FLT(); - fn HRTIM1_Master(); - fn HRTIM1_TIMA(); - fn HRTIM1_TIMB(); - fn HRTIM1_TIMC(); - fn HRTIM1_TIMD(); - fn HRTIM1_TIME(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPTIM4(); - fn LPTIM5(); - fn LPUART1(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OTG_FS(); - fn OTG_FS_EP1_IN(); - fn OTG_FS_EP1_OUT(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_AVD(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SAI3(); - fn SAI4(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 150] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_AVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: QUADSPI }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { - _handler: OTG_FS_EP1_OUT, - }, - Vector { - _handler: OTG_FS_EP1_IN, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { _handler: OTG_FS }, - Vector { _reserved: 0 }, - Vector { - _handler: HRTIM1_Master, - }, - Vector { - _handler: HRTIM1_TIMA, - }, - Vector { - _handler: HRTIM1_TIMB, - }, - Vector { - _handler: HRTIM1_TIMC, - }, - Vector { - _handler: HRTIM1_TIMD, - }, - Vector { - _handler: HRTIM1_TIME, - }, - Vector { - _handler: HRTIM1_FLT, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SAI3 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _reserved: 0 }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: ADC3 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA_Channel0, - }, - Vector { - _handler: BDMA_Channel1, - }, - Vector { - _handler: BDMA_Channel2, - }, - Vector { - _handler: BDMA_Channel3, - }, - Vector { - _handler: BDMA_Channel4, - }, - Vector { - _handler: BDMA_Channel5, - }, - Vector { - _handler: BDMA_Channel6, - }, - Vector { - _handler: BDMA_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: LPTIM4 }, - Vector { _handler: LPTIM5 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _handler: SAI4 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -impl_rng!(0x48021800); -impl_sdmmc!(SDMMC1, 0x52007000); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -impl_sdmmc!(SDMMC2, 0x48022400); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); diff --git a/embassy-stm32/src/chip/stm32h742zi.rs b/embassy-stm32/src/chip/stm32h742zi.rs deleted file mode 100644 index 16c6b22f..00000000 --- a/embassy-stm32/src/chip/stm32h742zi.rs +++ /dev/null @@ -1,892 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, ADC3, BDMA, COMP1, COMP2, DAC1, DCMI, DMA2D, ETH, FDCAN1, - FDCAN2, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, - PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, - PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, - PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, - PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, - PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, - PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, - PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, - PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, PJ10, PJ11, PJ12, - PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, PK11, PK12, PK13, - PK14, PK15, I2C1, I2C2, I2C3, I2C4, IWDG1, LPTIM1, LPTIM2, LPTIM3, LPTIM4, LPTIM5, LPUART1, - MDIOS, MDMA, OPAMP1, OPAMP2, PWR, QUADSPI, RCC, RNG, RTC, SAI1, SAI2, SAI3, SAI4, SDMMC1, - SDMMC2, SPI1, SPI2, SPI3, SPI4, SPI5, SPI6, SWPMI1, SYSCFG, TIM1, TIM12, TIM13, TIM14, TIM15, - TIM16, TIM17, TIM2, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, UART4, UART5, UART7, UART8, USART1, - USART2, USART3, USART6, USB_OTG_FS, USB_OTG_HS, VREFBUF, WWDG1 -); -pub const GPIO_BASE: usize = 0x58020000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC = 18, - ADC3 = 127, - BDMA_Channel0 = 129, - BDMA_Channel1 = 130, - BDMA_Channel2 = 131, - BDMA_Channel3 = 132, - BDMA_Channel4 = 133, - BDMA_Channel5 = 134, - BDMA_Channel6 = 135, - BDMA_Channel7 = 136, - CEC = 94, - CRS = 144, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - ECC = 145, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - HRTIM1_FLT = 109, - HRTIM1_Master = 103, - HRTIM1_TIMA = 104, - HRTIM1_TIMB = 105, - HRTIM1_TIMC = 106, - HRTIM1_TIMD = 107, - HRTIM1_TIME = 108, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPTIM4 = 140, - LPTIM5 = 141, - LPUART1 = 142, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OTG_FS = 101, - OTG_FS_EP1_IN = 99, - OTG_FS_EP1_OUT = 98, - OTG_FS_WKUP = 100, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_AVD = 1, - QUADSPI = 92, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SAI3 = 114, - SAI4 = 146, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TAMP_STAMP = 2, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(ADC3); - declare!(BDMA_Channel0); - declare!(BDMA_Channel1); - declare!(BDMA_Channel2); - declare!(BDMA_Channel3); - declare!(BDMA_Channel4); - declare!(BDMA_Channel5); - declare!(BDMA_Channel6); - declare!(BDMA_Channel7); - declare!(CEC); - declare!(CRS); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(ECC); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HRTIM1_FLT); - declare!(HRTIM1_Master); - declare!(HRTIM1_TIMA); - declare!(HRTIM1_TIMB); - declare!(HRTIM1_TIMC); - declare!(HRTIM1_TIMD); - declare!(HRTIM1_TIME); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPTIM4); - declare!(LPTIM5); - declare!(LPUART1); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OTG_FS); - declare!(OTG_FS_EP1_IN); - declare!(OTG_FS_EP1_OUT); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_AVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SAI3); - declare!(SAI4); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn ADC3(); - fn BDMA_Channel0(); - fn BDMA_Channel1(); - fn BDMA_Channel2(); - fn BDMA_Channel3(); - fn BDMA_Channel4(); - fn BDMA_Channel5(); - fn BDMA_Channel6(); - fn BDMA_Channel7(); - fn CEC(); - fn CRS(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn ECC(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HRTIM1_FLT(); - fn HRTIM1_Master(); - fn HRTIM1_TIMA(); - fn HRTIM1_TIMB(); - fn HRTIM1_TIMC(); - fn HRTIM1_TIMD(); - fn HRTIM1_TIME(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPTIM4(); - fn LPTIM5(); - fn LPUART1(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OTG_FS(); - fn OTG_FS_EP1_IN(); - fn OTG_FS_EP1_OUT(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_AVD(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SAI3(); - fn SAI4(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 150] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_AVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: QUADSPI }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { - _handler: OTG_FS_EP1_OUT, - }, - Vector { - _handler: OTG_FS_EP1_IN, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { _handler: OTG_FS }, - Vector { _reserved: 0 }, - Vector { - _handler: HRTIM1_Master, - }, - Vector { - _handler: HRTIM1_TIMA, - }, - Vector { - _handler: HRTIM1_TIMB, - }, - Vector { - _handler: HRTIM1_TIMC, - }, - Vector { - _handler: HRTIM1_TIMD, - }, - Vector { - _handler: HRTIM1_TIME, - }, - Vector { - _handler: HRTIM1_FLT, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SAI3 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _reserved: 0 }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: ADC3 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA_Channel0, - }, - Vector { - _handler: BDMA_Channel1, - }, - Vector { - _handler: BDMA_Channel2, - }, - Vector { - _handler: BDMA_Channel3, - }, - Vector { - _handler: BDMA_Channel4, - }, - Vector { - _handler: BDMA_Channel5, - }, - Vector { - _handler: BDMA_Channel6, - }, - Vector { - _handler: BDMA_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: LPTIM4 }, - Vector { _handler: LPTIM5 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _handler: SAI4 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -impl_rng!(0x48021800); -impl_sdmmc!(SDMMC1, 0x52007000); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -impl_sdmmc!(SDMMC2, 0x48022400); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); diff --git a/embassy-stm32/src/chip/stm32h743ag.rs b/embassy-stm32/src/chip/stm32h743ag.rs deleted file mode 100644 index 061955f8..00000000 --- a/embassy-stm32/src/chip/stm32h743ag.rs +++ /dev/null @@ -1,901 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, ADC3, BDMA, COMP1, COMP2, DAC1, DCMI, DMA2D, ETH, FDCAN1, - FDCAN2, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, - PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, - PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, - PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, - PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, - PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, - PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, - PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, - PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, PJ10, PJ11, PJ12, - PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, PK11, PK12, PK13, - PK14, PK15, I2C1, I2C2, I2C3, I2C4, IWDG1, JPEG, LPTIM1, LPTIM2, LPTIM3, LPTIM4, LPTIM5, - LPUART1, LTDC, MDIOS, MDMA, OPAMP1, OPAMP2, PWR, QUADSPI, RCC, RNG, RTC, SAI1, SAI2, SAI3, - SAI4, SDMMC1, SDMMC2, SPI1, SPI2, SPI3, SPI4, SPI5, SPI6, SWPMI1, SYSCFG, TIM1, TIM12, TIM13, - TIM14, TIM15, TIM16, TIM17, TIM2, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, UART4, UART5, UART7, - UART8, USART1, USART2, USART3, USART6, USB_OTG_FS, USB_OTG_HS, VREFBUF, WWDG1 -); -pub const GPIO_BASE: usize = 0x58020000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC = 18, - ADC3 = 127, - BDMA_Channel0 = 129, - BDMA_Channel1 = 130, - BDMA_Channel2 = 131, - BDMA_Channel3 = 132, - BDMA_Channel4 = 133, - BDMA_Channel5 = 134, - BDMA_Channel6 = 135, - BDMA_Channel7 = 136, - CEC = 94, - CRS = 144, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - ECC = 145, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - HRTIM1_FLT = 109, - HRTIM1_Master = 103, - HRTIM1_TIMA = 104, - HRTIM1_TIMB = 105, - HRTIM1_TIMC = 106, - HRTIM1_TIMD = 107, - HRTIM1_TIME = 108, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - JPEG = 121, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPTIM4 = 140, - LPTIM5 = 141, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OTG_FS = 101, - OTG_FS_EP1_IN = 99, - OTG_FS_EP1_OUT = 98, - OTG_FS_WKUP = 100, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_AVD = 1, - QUADSPI = 92, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SAI3 = 114, - SAI4 = 146, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TAMP_STAMP = 2, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(ADC3); - declare!(BDMA_Channel0); - declare!(BDMA_Channel1); - declare!(BDMA_Channel2); - declare!(BDMA_Channel3); - declare!(BDMA_Channel4); - declare!(BDMA_Channel5); - declare!(BDMA_Channel6); - declare!(BDMA_Channel7); - declare!(CEC); - declare!(CRS); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(ECC); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HRTIM1_FLT); - declare!(HRTIM1_Master); - declare!(HRTIM1_TIMA); - declare!(HRTIM1_TIMB); - declare!(HRTIM1_TIMC); - declare!(HRTIM1_TIMD); - declare!(HRTIM1_TIME); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(JPEG); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPTIM4); - declare!(LPTIM5); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OTG_FS); - declare!(OTG_FS_EP1_IN); - declare!(OTG_FS_EP1_OUT); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_AVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SAI3); - declare!(SAI4); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn ADC3(); - fn BDMA_Channel0(); - fn BDMA_Channel1(); - fn BDMA_Channel2(); - fn BDMA_Channel3(); - fn BDMA_Channel4(); - fn BDMA_Channel5(); - fn BDMA_Channel6(); - fn BDMA_Channel7(); - fn CEC(); - fn CRS(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn ECC(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HRTIM1_FLT(); - fn HRTIM1_Master(); - fn HRTIM1_TIMA(); - fn HRTIM1_TIMB(); - fn HRTIM1_TIMC(); - fn HRTIM1_TIMD(); - fn HRTIM1_TIME(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn JPEG(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPTIM4(); - fn LPTIM5(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OTG_FS(); - fn OTG_FS_EP1_IN(); - fn OTG_FS_EP1_OUT(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_AVD(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SAI3(); - fn SAI4(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 150] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_AVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: QUADSPI }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { - _handler: OTG_FS_EP1_OUT, - }, - Vector { - _handler: OTG_FS_EP1_IN, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { _handler: OTG_FS }, - Vector { _reserved: 0 }, - Vector { - _handler: HRTIM1_Master, - }, - Vector { - _handler: HRTIM1_TIMA, - }, - Vector { - _handler: HRTIM1_TIMB, - }, - Vector { - _handler: HRTIM1_TIMC, - }, - Vector { - _handler: HRTIM1_TIMD, - }, - Vector { - _handler: HRTIM1_TIME, - }, - Vector { - _handler: HRTIM1_FLT, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SAI3 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _handler: JPEG }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: ADC3 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA_Channel0, - }, - Vector { - _handler: BDMA_Channel1, - }, - Vector { - _handler: BDMA_Channel2, - }, - Vector { - _handler: BDMA_Channel3, - }, - Vector { - _handler: BDMA_Channel4, - }, - Vector { - _handler: BDMA_Channel5, - }, - Vector { - _handler: BDMA_Channel6, - }, - Vector { - _handler: BDMA_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: LPTIM4 }, - Vector { _handler: LPTIM5 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _handler: SAI4 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -impl_rng!(0x48021800); -impl_sdmmc!(SDMMC1, 0x52007000); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -impl_sdmmc!(SDMMC2, 0x48022400); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); diff --git a/embassy-stm32/src/chip/stm32h743ai.rs b/embassy-stm32/src/chip/stm32h743ai.rs deleted file mode 100644 index 061955f8..00000000 --- a/embassy-stm32/src/chip/stm32h743ai.rs +++ /dev/null @@ -1,901 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, ADC3, BDMA, COMP1, COMP2, DAC1, DCMI, DMA2D, ETH, FDCAN1, - FDCAN2, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, - PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, - PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, - PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, - PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, - PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, - PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, - PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, - PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, PJ10, PJ11, PJ12, - PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, PK11, PK12, PK13, - PK14, PK15, I2C1, I2C2, I2C3, I2C4, IWDG1, JPEG, LPTIM1, LPTIM2, LPTIM3, LPTIM4, LPTIM5, - LPUART1, LTDC, MDIOS, MDMA, OPAMP1, OPAMP2, PWR, QUADSPI, RCC, RNG, RTC, SAI1, SAI2, SAI3, - SAI4, SDMMC1, SDMMC2, SPI1, SPI2, SPI3, SPI4, SPI5, SPI6, SWPMI1, SYSCFG, TIM1, TIM12, TIM13, - TIM14, TIM15, TIM16, TIM17, TIM2, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, UART4, UART5, UART7, - UART8, USART1, USART2, USART3, USART6, USB_OTG_FS, USB_OTG_HS, VREFBUF, WWDG1 -); -pub const GPIO_BASE: usize = 0x58020000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC = 18, - ADC3 = 127, - BDMA_Channel0 = 129, - BDMA_Channel1 = 130, - BDMA_Channel2 = 131, - BDMA_Channel3 = 132, - BDMA_Channel4 = 133, - BDMA_Channel5 = 134, - BDMA_Channel6 = 135, - BDMA_Channel7 = 136, - CEC = 94, - CRS = 144, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - ECC = 145, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - HRTIM1_FLT = 109, - HRTIM1_Master = 103, - HRTIM1_TIMA = 104, - HRTIM1_TIMB = 105, - HRTIM1_TIMC = 106, - HRTIM1_TIMD = 107, - HRTIM1_TIME = 108, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - JPEG = 121, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPTIM4 = 140, - LPTIM5 = 141, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OTG_FS = 101, - OTG_FS_EP1_IN = 99, - OTG_FS_EP1_OUT = 98, - OTG_FS_WKUP = 100, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_AVD = 1, - QUADSPI = 92, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SAI3 = 114, - SAI4 = 146, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TAMP_STAMP = 2, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(ADC3); - declare!(BDMA_Channel0); - declare!(BDMA_Channel1); - declare!(BDMA_Channel2); - declare!(BDMA_Channel3); - declare!(BDMA_Channel4); - declare!(BDMA_Channel5); - declare!(BDMA_Channel6); - declare!(BDMA_Channel7); - declare!(CEC); - declare!(CRS); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(ECC); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HRTIM1_FLT); - declare!(HRTIM1_Master); - declare!(HRTIM1_TIMA); - declare!(HRTIM1_TIMB); - declare!(HRTIM1_TIMC); - declare!(HRTIM1_TIMD); - declare!(HRTIM1_TIME); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(JPEG); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPTIM4); - declare!(LPTIM5); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OTG_FS); - declare!(OTG_FS_EP1_IN); - declare!(OTG_FS_EP1_OUT); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_AVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SAI3); - declare!(SAI4); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn ADC3(); - fn BDMA_Channel0(); - fn BDMA_Channel1(); - fn BDMA_Channel2(); - fn BDMA_Channel3(); - fn BDMA_Channel4(); - fn BDMA_Channel5(); - fn BDMA_Channel6(); - fn BDMA_Channel7(); - fn CEC(); - fn CRS(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn ECC(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HRTIM1_FLT(); - fn HRTIM1_Master(); - fn HRTIM1_TIMA(); - fn HRTIM1_TIMB(); - fn HRTIM1_TIMC(); - fn HRTIM1_TIMD(); - fn HRTIM1_TIME(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn JPEG(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPTIM4(); - fn LPTIM5(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OTG_FS(); - fn OTG_FS_EP1_IN(); - fn OTG_FS_EP1_OUT(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_AVD(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SAI3(); - fn SAI4(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 150] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_AVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: QUADSPI }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { - _handler: OTG_FS_EP1_OUT, - }, - Vector { - _handler: OTG_FS_EP1_IN, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { _handler: OTG_FS }, - Vector { _reserved: 0 }, - Vector { - _handler: HRTIM1_Master, - }, - Vector { - _handler: HRTIM1_TIMA, - }, - Vector { - _handler: HRTIM1_TIMB, - }, - Vector { - _handler: HRTIM1_TIMC, - }, - Vector { - _handler: HRTIM1_TIMD, - }, - Vector { - _handler: HRTIM1_TIME, - }, - Vector { - _handler: HRTIM1_FLT, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SAI3 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _handler: JPEG }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: ADC3 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA_Channel0, - }, - Vector { - _handler: BDMA_Channel1, - }, - Vector { - _handler: BDMA_Channel2, - }, - Vector { - _handler: BDMA_Channel3, - }, - Vector { - _handler: BDMA_Channel4, - }, - Vector { - _handler: BDMA_Channel5, - }, - Vector { - _handler: BDMA_Channel6, - }, - Vector { - _handler: BDMA_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: LPTIM4 }, - Vector { _handler: LPTIM5 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _handler: SAI4 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -impl_rng!(0x48021800); -impl_sdmmc!(SDMMC1, 0x52007000); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -impl_sdmmc!(SDMMC2, 0x48022400); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); diff --git a/embassy-stm32/src/chip/stm32h743bg.rs b/embassy-stm32/src/chip/stm32h743bg.rs deleted file mode 100644 index 061955f8..00000000 --- a/embassy-stm32/src/chip/stm32h743bg.rs +++ /dev/null @@ -1,901 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, ADC3, BDMA, COMP1, COMP2, DAC1, DCMI, DMA2D, ETH, FDCAN1, - FDCAN2, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, - PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, - PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, - PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, - PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, - PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, - PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, - PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, - PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, PJ10, PJ11, PJ12, - PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, PK11, PK12, PK13, - PK14, PK15, I2C1, I2C2, I2C3, I2C4, IWDG1, JPEG, LPTIM1, LPTIM2, LPTIM3, LPTIM4, LPTIM5, - LPUART1, LTDC, MDIOS, MDMA, OPAMP1, OPAMP2, PWR, QUADSPI, RCC, RNG, RTC, SAI1, SAI2, SAI3, - SAI4, SDMMC1, SDMMC2, SPI1, SPI2, SPI3, SPI4, SPI5, SPI6, SWPMI1, SYSCFG, TIM1, TIM12, TIM13, - TIM14, TIM15, TIM16, TIM17, TIM2, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, UART4, UART5, UART7, - UART8, USART1, USART2, USART3, USART6, USB_OTG_FS, USB_OTG_HS, VREFBUF, WWDG1 -); -pub const GPIO_BASE: usize = 0x58020000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC = 18, - ADC3 = 127, - BDMA_Channel0 = 129, - BDMA_Channel1 = 130, - BDMA_Channel2 = 131, - BDMA_Channel3 = 132, - BDMA_Channel4 = 133, - BDMA_Channel5 = 134, - BDMA_Channel6 = 135, - BDMA_Channel7 = 136, - CEC = 94, - CRS = 144, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - ECC = 145, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - HRTIM1_FLT = 109, - HRTIM1_Master = 103, - HRTIM1_TIMA = 104, - HRTIM1_TIMB = 105, - HRTIM1_TIMC = 106, - HRTIM1_TIMD = 107, - HRTIM1_TIME = 108, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - JPEG = 121, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPTIM4 = 140, - LPTIM5 = 141, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OTG_FS = 101, - OTG_FS_EP1_IN = 99, - OTG_FS_EP1_OUT = 98, - OTG_FS_WKUP = 100, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_AVD = 1, - QUADSPI = 92, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SAI3 = 114, - SAI4 = 146, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TAMP_STAMP = 2, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(ADC3); - declare!(BDMA_Channel0); - declare!(BDMA_Channel1); - declare!(BDMA_Channel2); - declare!(BDMA_Channel3); - declare!(BDMA_Channel4); - declare!(BDMA_Channel5); - declare!(BDMA_Channel6); - declare!(BDMA_Channel7); - declare!(CEC); - declare!(CRS); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(ECC); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HRTIM1_FLT); - declare!(HRTIM1_Master); - declare!(HRTIM1_TIMA); - declare!(HRTIM1_TIMB); - declare!(HRTIM1_TIMC); - declare!(HRTIM1_TIMD); - declare!(HRTIM1_TIME); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(JPEG); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPTIM4); - declare!(LPTIM5); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OTG_FS); - declare!(OTG_FS_EP1_IN); - declare!(OTG_FS_EP1_OUT); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_AVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SAI3); - declare!(SAI4); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn ADC3(); - fn BDMA_Channel0(); - fn BDMA_Channel1(); - fn BDMA_Channel2(); - fn BDMA_Channel3(); - fn BDMA_Channel4(); - fn BDMA_Channel5(); - fn BDMA_Channel6(); - fn BDMA_Channel7(); - fn CEC(); - fn CRS(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn ECC(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HRTIM1_FLT(); - fn HRTIM1_Master(); - fn HRTIM1_TIMA(); - fn HRTIM1_TIMB(); - fn HRTIM1_TIMC(); - fn HRTIM1_TIMD(); - fn HRTIM1_TIME(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn JPEG(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPTIM4(); - fn LPTIM5(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OTG_FS(); - fn OTG_FS_EP1_IN(); - fn OTG_FS_EP1_OUT(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_AVD(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SAI3(); - fn SAI4(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 150] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_AVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: QUADSPI }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { - _handler: OTG_FS_EP1_OUT, - }, - Vector { - _handler: OTG_FS_EP1_IN, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { _handler: OTG_FS }, - Vector { _reserved: 0 }, - Vector { - _handler: HRTIM1_Master, - }, - Vector { - _handler: HRTIM1_TIMA, - }, - Vector { - _handler: HRTIM1_TIMB, - }, - Vector { - _handler: HRTIM1_TIMC, - }, - Vector { - _handler: HRTIM1_TIMD, - }, - Vector { - _handler: HRTIM1_TIME, - }, - Vector { - _handler: HRTIM1_FLT, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SAI3 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _handler: JPEG }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: ADC3 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA_Channel0, - }, - Vector { - _handler: BDMA_Channel1, - }, - Vector { - _handler: BDMA_Channel2, - }, - Vector { - _handler: BDMA_Channel3, - }, - Vector { - _handler: BDMA_Channel4, - }, - Vector { - _handler: BDMA_Channel5, - }, - Vector { - _handler: BDMA_Channel6, - }, - Vector { - _handler: BDMA_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: LPTIM4 }, - Vector { _handler: LPTIM5 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _handler: SAI4 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -impl_rng!(0x48021800); -impl_sdmmc!(SDMMC1, 0x52007000); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -impl_sdmmc!(SDMMC2, 0x48022400); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); diff --git a/embassy-stm32/src/chip/stm32h743bi.rs b/embassy-stm32/src/chip/stm32h743bi.rs deleted file mode 100644 index 061955f8..00000000 --- a/embassy-stm32/src/chip/stm32h743bi.rs +++ /dev/null @@ -1,901 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, ADC3, BDMA, COMP1, COMP2, DAC1, DCMI, DMA2D, ETH, FDCAN1, - FDCAN2, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, - PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, - PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, - PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, - PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, - PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, - PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, - PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, - PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, PJ10, PJ11, PJ12, - PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, PK11, PK12, PK13, - PK14, PK15, I2C1, I2C2, I2C3, I2C4, IWDG1, JPEG, LPTIM1, LPTIM2, LPTIM3, LPTIM4, LPTIM5, - LPUART1, LTDC, MDIOS, MDMA, OPAMP1, OPAMP2, PWR, QUADSPI, RCC, RNG, RTC, SAI1, SAI2, SAI3, - SAI4, SDMMC1, SDMMC2, SPI1, SPI2, SPI3, SPI4, SPI5, SPI6, SWPMI1, SYSCFG, TIM1, TIM12, TIM13, - TIM14, TIM15, TIM16, TIM17, TIM2, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, UART4, UART5, UART7, - UART8, USART1, USART2, USART3, USART6, USB_OTG_FS, USB_OTG_HS, VREFBUF, WWDG1 -); -pub const GPIO_BASE: usize = 0x58020000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC = 18, - ADC3 = 127, - BDMA_Channel0 = 129, - BDMA_Channel1 = 130, - BDMA_Channel2 = 131, - BDMA_Channel3 = 132, - BDMA_Channel4 = 133, - BDMA_Channel5 = 134, - BDMA_Channel6 = 135, - BDMA_Channel7 = 136, - CEC = 94, - CRS = 144, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - ECC = 145, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - HRTIM1_FLT = 109, - HRTIM1_Master = 103, - HRTIM1_TIMA = 104, - HRTIM1_TIMB = 105, - HRTIM1_TIMC = 106, - HRTIM1_TIMD = 107, - HRTIM1_TIME = 108, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - JPEG = 121, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPTIM4 = 140, - LPTIM5 = 141, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OTG_FS = 101, - OTG_FS_EP1_IN = 99, - OTG_FS_EP1_OUT = 98, - OTG_FS_WKUP = 100, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_AVD = 1, - QUADSPI = 92, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SAI3 = 114, - SAI4 = 146, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TAMP_STAMP = 2, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(ADC3); - declare!(BDMA_Channel0); - declare!(BDMA_Channel1); - declare!(BDMA_Channel2); - declare!(BDMA_Channel3); - declare!(BDMA_Channel4); - declare!(BDMA_Channel5); - declare!(BDMA_Channel6); - declare!(BDMA_Channel7); - declare!(CEC); - declare!(CRS); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(ECC); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HRTIM1_FLT); - declare!(HRTIM1_Master); - declare!(HRTIM1_TIMA); - declare!(HRTIM1_TIMB); - declare!(HRTIM1_TIMC); - declare!(HRTIM1_TIMD); - declare!(HRTIM1_TIME); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(JPEG); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPTIM4); - declare!(LPTIM5); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OTG_FS); - declare!(OTG_FS_EP1_IN); - declare!(OTG_FS_EP1_OUT); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_AVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SAI3); - declare!(SAI4); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn ADC3(); - fn BDMA_Channel0(); - fn BDMA_Channel1(); - fn BDMA_Channel2(); - fn BDMA_Channel3(); - fn BDMA_Channel4(); - fn BDMA_Channel5(); - fn BDMA_Channel6(); - fn BDMA_Channel7(); - fn CEC(); - fn CRS(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn ECC(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HRTIM1_FLT(); - fn HRTIM1_Master(); - fn HRTIM1_TIMA(); - fn HRTIM1_TIMB(); - fn HRTIM1_TIMC(); - fn HRTIM1_TIMD(); - fn HRTIM1_TIME(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn JPEG(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPTIM4(); - fn LPTIM5(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OTG_FS(); - fn OTG_FS_EP1_IN(); - fn OTG_FS_EP1_OUT(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_AVD(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SAI3(); - fn SAI4(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 150] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_AVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: QUADSPI }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { - _handler: OTG_FS_EP1_OUT, - }, - Vector { - _handler: OTG_FS_EP1_IN, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { _handler: OTG_FS }, - Vector { _reserved: 0 }, - Vector { - _handler: HRTIM1_Master, - }, - Vector { - _handler: HRTIM1_TIMA, - }, - Vector { - _handler: HRTIM1_TIMB, - }, - Vector { - _handler: HRTIM1_TIMC, - }, - Vector { - _handler: HRTIM1_TIMD, - }, - Vector { - _handler: HRTIM1_TIME, - }, - Vector { - _handler: HRTIM1_FLT, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SAI3 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _handler: JPEG }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: ADC3 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA_Channel0, - }, - Vector { - _handler: BDMA_Channel1, - }, - Vector { - _handler: BDMA_Channel2, - }, - Vector { - _handler: BDMA_Channel3, - }, - Vector { - _handler: BDMA_Channel4, - }, - Vector { - _handler: BDMA_Channel5, - }, - Vector { - _handler: BDMA_Channel6, - }, - Vector { - _handler: BDMA_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: LPTIM4 }, - Vector { _handler: LPTIM5 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _handler: SAI4 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -impl_rng!(0x48021800); -impl_sdmmc!(SDMMC1, 0x52007000); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -impl_sdmmc!(SDMMC2, 0x48022400); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); diff --git a/embassy-stm32/src/chip/stm32h743ig.rs b/embassy-stm32/src/chip/stm32h743ig.rs deleted file mode 100644 index 061955f8..00000000 --- a/embassy-stm32/src/chip/stm32h743ig.rs +++ /dev/null @@ -1,901 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, ADC3, BDMA, COMP1, COMP2, DAC1, DCMI, DMA2D, ETH, FDCAN1, - FDCAN2, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, - PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, - PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, - PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, - PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, - PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, - PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, - PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, - PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, PJ10, PJ11, PJ12, - PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, PK11, PK12, PK13, - PK14, PK15, I2C1, I2C2, I2C3, I2C4, IWDG1, JPEG, LPTIM1, LPTIM2, LPTIM3, LPTIM4, LPTIM5, - LPUART1, LTDC, MDIOS, MDMA, OPAMP1, OPAMP2, PWR, QUADSPI, RCC, RNG, RTC, SAI1, SAI2, SAI3, - SAI4, SDMMC1, SDMMC2, SPI1, SPI2, SPI3, SPI4, SPI5, SPI6, SWPMI1, SYSCFG, TIM1, TIM12, TIM13, - TIM14, TIM15, TIM16, TIM17, TIM2, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, UART4, UART5, UART7, - UART8, USART1, USART2, USART3, USART6, USB_OTG_FS, USB_OTG_HS, VREFBUF, WWDG1 -); -pub const GPIO_BASE: usize = 0x58020000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC = 18, - ADC3 = 127, - BDMA_Channel0 = 129, - BDMA_Channel1 = 130, - BDMA_Channel2 = 131, - BDMA_Channel3 = 132, - BDMA_Channel4 = 133, - BDMA_Channel5 = 134, - BDMA_Channel6 = 135, - BDMA_Channel7 = 136, - CEC = 94, - CRS = 144, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - ECC = 145, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - HRTIM1_FLT = 109, - HRTIM1_Master = 103, - HRTIM1_TIMA = 104, - HRTIM1_TIMB = 105, - HRTIM1_TIMC = 106, - HRTIM1_TIMD = 107, - HRTIM1_TIME = 108, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - JPEG = 121, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPTIM4 = 140, - LPTIM5 = 141, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OTG_FS = 101, - OTG_FS_EP1_IN = 99, - OTG_FS_EP1_OUT = 98, - OTG_FS_WKUP = 100, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_AVD = 1, - QUADSPI = 92, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SAI3 = 114, - SAI4 = 146, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TAMP_STAMP = 2, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(ADC3); - declare!(BDMA_Channel0); - declare!(BDMA_Channel1); - declare!(BDMA_Channel2); - declare!(BDMA_Channel3); - declare!(BDMA_Channel4); - declare!(BDMA_Channel5); - declare!(BDMA_Channel6); - declare!(BDMA_Channel7); - declare!(CEC); - declare!(CRS); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(ECC); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HRTIM1_FLT); - declare!(HRTIM1_Master); - declare!(HRTIM1_TIMA); - declare!(HRTIM1_TIMB); - declare!(HRTIM1_TIMC); - declare!(HRTIM1_TIMD); - declare!(HRTIM1_TIME); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(JPEG); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPTIM4); - declare!(LPTIM5); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OTG_FS); - declare!(OTG_FS_EP1_IN); - declare!(OTG_FS_EP1_OUT); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_AVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SAI3); - declare!(SAI4); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn ADC3(); - fn BDMA_Channel0(); - fn BDMA_Channel1(); - fn BDMA_Channel2(); - fn BDMA_Channel3(); - fn BDMA_Channel4(); - fn BDMA_Channel5(); - fn BDMA_Channel6(); - fn BDMA_Channel7(); - fn CEC(); - fn CRS(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn ECC(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HRTIM1_FLT(); - fn HRTIM1_Master(); - fn HRTIM1_TIMA(); - fn HRTIM1_TIMB(); - fn HRTIM1_TIMC(); - fn HRTIM1_TIMD(); - fn HRTIM1_TIME(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn JPEG(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPTIM4(); - fn LPTIM5(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OTG_FS(); - fn OTG_FS_EP1_IN(); - fn OTG_FS_EP1_OUT(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_AVD(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SAI3(); - fn SAI4(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 150] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_AVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: QUADSPI }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { - _handler: OTG_FS_EP1_OUT, - }, - Vector { - _handler: OTG_FS_EP1_IN, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { _handler: OTG_FS }, - Vector { _reserved: 0 }, - Vector { - _handler: HRTIM1_Master, - }, - Vector { - _handler: HRTIM1_TIMA, - }, - Vector { - _handler: HRTIM1_TIMB, - }, - Vector { - _handler: HRTIM1_TIMC, - }, - Vector { - _handler: HRTIM1_TIMD, - }, - Vector { - _handler: HRTIM1_TIME, - }, - Vector { - _handler: HRTIM1_FLT, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SAI3 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _handler: JPEG }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: ADC3 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA_Channel0, - }, - Vector { - _handler: BDMA_Channel1, - }, - Vector { - _handler: BDMA_Channel2, - }, - Vector { - _handler: BDMA_Channel3, - }, - Vector { - _handler: BDMA_Channel4, - }, - Vector { - _handler: BDMA_Channel5, - }, - Vector { - _handler: BDMA_Channel6, - }, - Vector { - _handler: BDMA_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: LPTIM4 }, - Vector { _handler: LPTIM5 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _handler: SAI4 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -impl_rng!(0x48021800); -impl_sdmmc!(SDMMC1, 0x52007000); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -impl_sdmmc!(SDMMC2, 0x48022400); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); diff --git a/embassy-stm32/src/chip/stm32h743ii.rs b/embassy-stm32/src/chip/stm32h743ii.rs deleted file mode 100644 index 061955f8..00000000 --- a/embassy-stm32/src/chip/stm32h743ii.rs +++ /dev/null @@ -1,901 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, ADC3, BDMA, COMP1, COMP2, DAC1, DCMI, DMA2D, ETH, FDCAN1, - FDCAN2, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, - PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, - PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, - PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, - PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, - PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, - PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, - PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, - PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, PJ10, PJ11, PJ12, - PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, PK11, PK12, PK13, - PK14, PK15, I2C1, I2C2, I2C3, I2C4, IWDG1, JPEG, LPTIM1, LPTIM2, LPTIM3, LPTIM4, LPTIM5, - LPUART1, LTDC, MDIOS, MDMA, OPAMP1, OPAMP2, PWR, QUADSPI, RCC, RNG, RTC, SAI1, SAI2, SAI3, - SAI4, SDMMC1, SDMMC2, SPI1, SPI2, SPI3, SPI4, SPI5, SPI6, SWPMI1, SYSCFG, TIM1, TIM12, TIM13, - TIM14, TIM15, TIM16, TIM17, TIM2, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, UART4, UART5, UART7, - UART8, USART1, USART2, USART3, USART6, USB_OTG_FS, USB_OTG_HS, VREFBUF, WWDG1 -); -pub const GPIO_BASE: usize = 0x58020000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC = 18, - ADC3 = 127, - BDMA_Channel0 = 129, - BDMA_Channel1 = 130, - BDMA_Channel2 = 131, - BDMA_Channel3 = 132, - BDMA_Channel4 = 133, - BDMA_Channel5 = 134, - BDMA_Channel6 = 135, - BDMA_Channel7 = 136, - CEC = 94, - CRS = 144, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - ECC = 145, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - HRTIM1_FLT = 109, - HRTIM1_Master = 103, - HRTIM1_TIMA = 104, - HRTIM1_TIMB = 105, - HRTIM1_TIMC = 106, - HRTIM1_TIMD = 107, - HRTIM1_TIME = 108, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - JPEG = 121, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPTIM4 = 140, - LPTIM5 = 141, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OTG_FS = 101, - OTG_FS_EP1_IN = 99, - OTG_FS_EP1_OUT = 98, - OTG_FS_WKUP = 100, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_AVD = 1, - QUADSPI = 92, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SAI3 = 114, - SAI4 = 146, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TAMP_STAMP = 2, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(ADC3); - declare!(BDMA_Channel0); - declare!(BDMA_Channel1); - declare!(BDMA_Channel2); - declare!(BDMA_Channel3); - declare!(BDMA_Channel4); - declare!(BDMA_Channel5); - declare!(BDMA_Channel6); - declare!(BDMA_Channel7); - declare!(CEC); - declare!(CRS); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(ECC); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HRTIM1_FLT); - declare!(HRTIM1_Master); - declare!(HRTIM1_TIMA); - declare!(HRTIM1_TIMB); - declare!(HRTIM1_TIMC); - declare!(HRTIM1_TIMD); - declare!(HRTIM1_TIME); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(JPEG); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPTIM4); - declare!(LPTIM5); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OTG_FS); - declare!(OTG_FS_EP1_IN); - declare!(OTG_FS_EP1_OUT); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_AVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SAI3); - declare!(SAI4); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn ADC3(); - fn BDMA_Channel0(); - fn BDMA_Channel1(); - fn BDMA_Channel2(); - fn BDMA_Channel3(); - fn BDMA_Channel4(); - fn BDMA_Channel5(); - fn BDMA_Channel6(); - fn BDMA_Channel7(); - fn CEC(); - fn CRS(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn ECC(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HRTIM1_FLT(); - fn HRTIM1_Master(); - fn HRTIM1_TIMA(); - fn HRTIM1_TIMB(); - fn HRTIM1_TIMC(); - fn HRTIM1_TIMD(); - fn HRTIM1_TIME(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn JPEG(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPTIM4(); - fn LPTIM5(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OTG_FS(); - fn OTG_FS_EP1_IN(); - fn OTG_FS_EP1_OUT(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_AVD(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SAI3(); - fn SAI4(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 150] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_AVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: QUADSPI }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { - _handler: OTG_FS_EP1_OUT, - }, - Vector { - _handler: OTG_FS_EP1_IN, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { _handler: OTG_FS }, - Vector { _reserved: 0 }, - Vector { - _handler: HRTIM1_Master, - }, - Vector { - _handler: HRTIM1_TIMA, - }, - Vector { - _handler: HRTIM1_TIMB, - }, - Vector { - _handler: HRTIM1_TIMC, - }, - Vector { - _handler: HRTIM1_TIMD, - }, - Vector { - _handler: HRTIM1_TIME, - }, - Vector { - _handler: HRTIM1_FLT, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SAI3 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _handler: JPEG }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: ADC3 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA_Channel0, - }, - Vector { - _handler: BDMA_Channel1, - }, - Vector { - _handler: BDMA_Channel2, - }, - Vector { - _handler: BDMA_Channel3, - }, - Vector { - _handler: BDMA_Channel4, - }, - Vector { - _handler: BDMA_Channel5, - }, - Vector { - _handler: BDMA_Channel6, - }, - Vector { - _handler: BDMA_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: LPTIM4 }, - Vector { _handler: LPTIM5 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _handler: SAI4 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -impl_rng!(0x48021800); -impl_sdmmc!(SDMMC1, 0x52007000); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -impl_sdmmc!(SDMMC2, 0x48022400); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); diff --git a/embassy-stm32/src/chip/stm32h743vg.rs b/embassy-stm32/src/chip/stm32h743vg.rs deleted file mode 100644 index d7d3d60e..00000000 --- a/embassy-stm32/src/chip/stm32h743vg.rs +++ /dev/null @@ -1,901 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, ADC3, BDMA, COMP1, COMP2, DAC1, DCMI, DMA2D, ETH, FDCAN1, - FDCAN2, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, - PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, - PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, - PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, - PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, - PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, - PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, - PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, - PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, PJ10, PJ11, PJ12, - PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, PK11, PK12, PK13, - PK14, PK15, I2C1, I2C2, I2C3, I2C4, IWDG1, JPEG, LPTIM1, LPTIM2, LPTIM3, LPTIM4, LPTIM5, - LPUART1, LTDC, MDIOS, MDMA, OPAMP1, OPAMP2, PWR, QUADSPI, RCC, RNG, RTC, SAI1, SAI2, SAI3, - SAI4, SDMMC1, SDMMC2, SPI1, SPI2, SPI3, SPI4, SPI6, SWPMI1, SYSCFG, TIM1, TIM12, TIM13, TIM14, - TIM15, TIM16, TIM17, TIM2, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, UART4, UART5, UART7, UART8, - USART1, USART2, USART3, USART6, USB_OTG_FS, USB_OTG_HS, VREFBUF, WWDG1 -); -pub const GPIO_BASE: usize = 0x58020000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC = 18, - ADC3 = 127, - BDMA_Channel0 = 129, - BDMA_Channel1 = 130, - BDMA_Channel2 = 131, - BDMA_Channel3 = 132, - BDMA_Channel4 = 133, - BDMA_Channel5 = 134, - BDMA_Channel6 = 135, - BDMA_Channel7 = 136, - CEC = 94, - CRS = 144, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - ECC = 145, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - HRTIM1_FLT = 109, - HRTIM1_Master = 103, - HRTIM1_TIMA = 104, - HRTIM1_TIMB = 105, - HRTIM1_TIMC = 106, - HRTIM1_TIMD = 107, - HRTIM1_TIME = 108, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - JPEG = 121, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPTIM4 = 140, - LPTIM5 = 141, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OTG_FS = 101, - OTG_FS_EP1_IN = 99, - OTG_FS_EP1_OUT = 98, - OTG_FS_WKUP = 100, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_AVD = 1, - QUADSPI = 92, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SAI3 = 114, - SAI4 = 146, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TAMP_STAMP = 2, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(ADC3); - declare!(BDMA_Channel0); - declare!(BDMA_Channel1); - declare!(BDMA_Channel2); - declare!(BDMA_Channel3); - declare!(BDMA_Channel4); - declare!(BDMA_Channel5); - declare!(BDMA_Channel6); - declare!(BDMA_Channel7); - declare!(CEC); - declare!(CRS); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(ECC); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HRTIM1_FLT); - declare!(HRTIM1_Master); - declare!(HRTIM1_TIMA); - declare!(HRTIM1_TIMB); - declare!(HRTIM1_TIMC); - declare!(HRTIM1_TIMD); - declare!(HRTIM1_TIME); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(JPEG); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPTIM4); - declare!(LPTIM5); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OTG_FS); - declare!(OTG_FS_EP1_IN); - declare!(OTG_FS_EP1_OUT); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_AVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SAI3); - declare!(SAI4); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn ADC3(); - fn BDMA_Channel0(); - fn BDMA_Channel1(); - fn BDMA_Channel2(); - fn BDMA_Channel3(); - fn BDMA_Channel4(); - fn BDMA_Channel5(); - fn BDMA_Channel6(); - fn BDMA_Channel7(); - fn CEC(); - fn CRS(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn ECC(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HRTIM1_FLT(); - fn HRTIM1_Master(); - fn HRTIM1_TIMA(); - fn HRTIM1_TIMB(); - fn HRTIM1_TIMC(); - fn HRTIM1_TIMD(); - fn HRTIM1_TIME(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn JPEG(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPTIM4(); - fn LPTIM5(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OTG_FS(); - fn OTG_FS_EP1_IN(); - fn OTG_FS_EP1_OUT(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_AVD(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SAI3(); - fn SAI4(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 150] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_AVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: QUADSPI }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { - _handler: OTG_FS_EP1_OUT, - }, - Vector { - _handler: OTG_FS_EP1_IN, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { _handler: OTG_FS }, - Vector { _reserved: 0 }, - Vector { - _handler: HRTIM1_Master, - }, - Vector { - _handler: HRTIM1_TIMA, - }, - Vector { - _handler: HRTIM1_TIMB, - }, - Vector { - _handler: HRTIM1_TIMC, - }, - Vector { - _handler: HRTIM1_TIMD, - }, - Vector { - _handler: HRTIM1_TIME, - }, - Vector { - _handler: HRTIM1_FLT, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SAI3 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _handler: JPEG }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: ADC3 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA_Channel0, - }, - Vector { - _handler: BDMA_Channel1, - }, - Vector { - _handler: BDMA_Channel2, - }, - Vector { - _handler: BDMA_Channel3, - }, - Vector { - _handler: BDMA_Channel4, - }, - Vector { - _handler: BDMA_Channel5, - }, - Vector { - _handler: BDMA_Channel6, - }, - Vector { - _handler: BDMA_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: LPTIM4 }, - Vector { _handler: LPTIM5 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _handler: SAI4 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -impl_rng!(0x48021800); -impl_sdmmc!(SDMMC1, 0x52007000); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -impl_sdmmc!(SDMMC2, 0x48022400); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); diff --git a/embassy-stm32/src/chip/stm32h743vi.rs b/embassy-stm32/src/chip/stm32h743vi.rs deleted file mode 100644 index d7d3d60e..00000000 --- a/embassy-stm32/src/chip/stm32h743vi.rs +++ /dev/null @@ -1,901 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, ADC3, BDMA, COMP1, COMP2, DAC1, DCMI, DMA2D, ETH, FDCAN1, - FDCAN2, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, - PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, - PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, - PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, - PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, - PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, - PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, - PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, - PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, PJ10, PJ11, PJ12, - PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, PK11, PK12, PK13, - PK14, PK15, I2C1, I2C2, I2C3, I2C4, IWDG1, JPEG, LPTIM1, LPTIM2, LPTIM3, LPTIM4, LPTIM5, - LPUART1, LTDC, MDIOS, MDMA, OPAMP1, OPAMP2, PWR, QUADSPI, RCC, RNG, RTC, SAI1, SAI2, SAI3, - SAI4, SDMMC1, SDMMC2, SPI1, SPI2, SPI3, SPI4, SPI6, SWPMI1, SYSCFG, TIM1, TIM12, TIM13, TIM14, - TIM15, TIM16, TIM17, TIM2, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, UART4, UART5, UART7, UART8, - USART1, USART2, USART3, USART6, USB_OTG_FS, USB_OTG_HS, VREFBUF, WWDG1 -); -pub const GPIO_BASE: usize = 0x58020000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC = 18, - ADC3 = 127, - BDMA_Channel0 = 129, - BDMA_Channel1 = 130, - BDMA_Channel2 = 131, - BDMA_Channel3 = 132, - BDMA_Channel4 = 133, - BDMA_Channel5 = 134, - BDMA_Channel6 = 135, - BDMA_Channel7 = 136, - CEC = 94, - CRS = 144, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - ECC = 145, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - HRTIM1_FLT = 109, - HRTIM1_Master = 103, - HRTIM1_TIMA = 104, - HRTIM1_TIMB = 105, - HRTIM1_TIMC = 106, - HRTIM1_TIMD = 107, - HRTIM1_TIME = 108, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - JPEG = 121, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPTIM4 = 140, - LPTIM5 = 141, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OTG_FS = 101, - OTG_FS_EP1_IN = 99, - OTG_FS_EP1_OUT = 98, - OTG_FS_WKUP = 100, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_AVD = 1, - QUADSPI = 92, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SAI3 = 114, - SAI4 = 146, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TAMP_STAMP = 2, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(ADC3); - declare!(BDMA_Channel0); - declare!(BDMA_Channel1); - declare!(BDMA_Channel2); - declare!(BDMA_Channel3); - declare!(BDMA_Channel4); - declare!(BDMA_Channel5); - declare!(BDMA_Channel6); - declare!(BDMA_Channel7); - declare!(CEC); - declare!(CRS); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(ECC); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HRTIM1_FLT); - declare!(HRTIM1_Master); - declare!(HRTIM1_TIMA); - declare!(HRTIM1_TIMB); - declare!(HRTIM1_TIMC); - declare!(HRTIM1_TIMD); - declare!(HRTIM1_TIME); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(JPEG); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPTIM4); - declare!(LPTIM5); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OTG_FS); - declare!(OTG_FS_EP1_IN); - declare!(OTG_FS_EP1_OUT); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_AVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SAI3); - declare!(SAI4); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn ADC3(); - fn BDMA_Channel0(); - fn BDMA_Channel1(); - fn BDMA_Channel2(); - fn BDMA_Channel3(); - fn BDMA_Channel4(); - fn BDMA_Channel5(); - fn BDMA_Channel6(); - fn BDMA_Channel7(); - fn CEC(); - fn CRS(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn ECC(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HRTIM1_FLT(); - fn HRTIM1_Master(); - fn HRTIM1_TIMA(); - fn HRTIM1_TIMB(); - fn HRTIM1_TIMC(); - fn HRTIM1_TIMD(); - fn HRTIM1_TIME(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn JPEG(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPTIM4(); - fn LPTIM5(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OTG_FS(); - fn OTG_FS_EP1_IN(); - fn OTG_FS_EP1_OUT(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_AVD(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SAI3(); - fn SAI4(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 150] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_AVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: QUADSPI }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { - _handler: OTG_FS_EP1_OUT, - }, - Vector { - _handler: OTG_FS_EP1_IN, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { _handler: OTG_FS }, - Vector { _reserved: 0 }, - Vector { - _handler: HRTIM1_Master, - }, - Vector { - _handler: HRTIM1_TIMA, - }, - Vector { - _handler: HRTIM1_TIMB, - }, - Vector { - _handler: HRTIM1_TIMC, - }, - Vector { - _handler: HRTIM1_TIMD, - }, - Vector { - _handler: HRTIM1_TIME, - }, - Vector { - _handler: HRTIM1_FLT, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SAI3 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _handler: JPEG }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: ADC3 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA_Channel0, - }, - Vector { - _handler: BDMA_Channel1, - }, - Vector { - _handler: BDMA_Channel2, - }, - Vector { - _handler: BDMA_Channel3, - }, - Vector { - _handler: BDMA_Channel4, - }, - Vector { - _handler: BDMA_Channel5, - }, - Vector { - _handler: BDMA_Channel6, - }, - Vector { - _handler: BDMA_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: LPTIM4 }, - Vector { _handler: LPTIM5 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _handler: SAI4 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -impl_rng!(0x48021800); -impl_sdmmc!(SDMMC1, 0x52007000); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -impl_sdmmc!(SDMMC2, 0x48022400); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); diff --git a/embassy-stm32/src/chip/stm32h743xg.rs b/embassy-stm32/src/chip/stm32h743xg.rs deleted file mode 100644 index 061955f8..00000000 --- a/embassy-stm32/src/chip/stm32h743xg.rs +++ /dev/null @@ -1,901 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, ADC3, BDMA, COMP1, COMP2, DAC1, DCMI, DMA2D, ETH, FDCAN1, - FDCAN2, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, - PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, - PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, - PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, - PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, - PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, - PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, - PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, - PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, PJ10, PJ11, PJ12, - PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, PK11, PK12, PK13, - PK14, PK15, I2C1, I2C2, I2C3, I2C4, IWDG1, JPEG, LPTIM1, LPTIM2, LPTIM3, LPTIM4, LPTIM5, - LPUART1, LTDC, MDIOS, MDMA, OPAMP1, OPAMP2, PWR, QUADSPI, RCC, RNG, RTC, SAI1, SAI2, SAI3, - SAI4, SDMMC1, SDMMC2, SPI1, SPI2, SPI3, SPI4, SPI5, SPI6, SWPMI1, SYSCFG, TIM1, TIM12, TIM13, - TIM14, TIM15, TIM16, TIM17, TIM2, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, UART4, UART5, UART7, - UART8, USART1, USART2, USART3, USART6, USB_OTG_FS, USB_OTG_HS, VREFBUF, WWDG1 -); -pub const GPIO_BASE: usize = 0x58020000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC = 18, - ADC3 = 127, - BDMA_Channel0 = 129, - BDMA_Channel1 = 130, - BDMA_Channel2 = 131, - BDMA_Channel3 = 132, - BDMA_Channel4 = 133, - BDMA_Channel5 = 134, - BDMA_Channel6 = 135, - BDMA_Channel7 = 136, - CEC = 94, - CRS = 144, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - ECC = 145, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - HRTIM1_FLT = 109, - HRTIM1_Master = 103, - HRTIM1_TIMA = 104, - HRTIM1_TIMB = 105, - HRTIM1_TIMC = 106, - HRTIM1_TIMD = 107, - HRTIM1_TIME = 108, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - JPEG = 121, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPTIM4 = 140, - LPTIM5 = 141, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OTG_FS = 101, - OTG_FS_EP1_IN = 99, - OTG_FS_EP1_OUT = 98, - OTG_FS_WKUP = 100, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_AVD = 1, - QUADSPI = 92, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SAI3 = 114, - SAI4 = 146, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TAMP_STAMP = 2, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(ADC3); - declare!(BDMA_Channel0); - declare!(BDMA_Channel1); - declare!(BDMA_Channel2); - declare!(BDMA_Channel3); - declare!(BDMA_Channel4); - declare!(BDMA_Channel5); - declare!(BDMA_Channel6); - declare!(BDMA_Channel7); - declare!(CEC); - declare!(CRS); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(ECC); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HRTIM1_FLT); - declare!(HRTIM1_Master); - declare!(HRTIM1_TIMA); - declare!(HRTIM1_TIMB); - declare!(HRTIM1_TIMC); - declare!(HRTIM1_TIMD); - declare!(HRTIM1_TIME); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(JPEG); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPTIM4); - declare!(LPTIM5); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OTG_FS); - declare!(OTG_FS_EP1_IN); - declare!(OTG_FS_EP1_OUT); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_AVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SAI3); - declare!(SAI4); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn ADC3(); - fn BDMA_Channel0(); - fn BDMA_Channel1(); - fn BDMA_Channel2(); - fn BDMA_Channel3(); - fn BDMA_Channel4(); - fn BDMA_Channel5(); - fn BDMA_Channel6(); - fn BDMA_Channel7(); - fn CEC(); - fn CRS(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn ECC(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HRTIM1_FLT(); - fn HRTIM1_Master(); - fn HRTIM1_TIMA(); - fn HRTIM1_TIMB(); - fn HRTIM1_TIMC(); - fn HRTIM1_TIMD(); - fn HRTIM1_TIME(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn JPEG(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPTIM4(); - fn LPTIM5(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OTG_FS(); - fn OTG_FS_EP1_IN(); - fn OTG_FS_EP1_OUT(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_AVD(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SAI3(); - fn SAI4(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 150] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_AVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: QUADSPI }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { - _handler: OTG_FS_EP1_OUT, - }, - Vector { - _handler: OTG_FS_EP1_IN, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { _handler: OTG_FS }, - Vector { _reserved: 0 }, - Vector { - _handler: HRTIM1_Master, - }, - Vector { - _handler: HRTIM1_TIMA, - }, - Vector { - _handler: HRTIM1_TIMB, - }, - Vector { - _handler: HRTIM1_TIMC, - }, - Vector { - _handler: HRTIM1_TIMD, - }, - Vector { - _handler: HRTIM1_TIME, - }, - Vector { - _handler: HRTIM1_FLT, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SAI3 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _handler: JPEG }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: ADC3 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA_Channel0, - }, - Vector { - _handler: BDMA_Channel1, - }, - Vector { - _handler: BDMA_Channel2, - }, - Vector { - _handler: BDMA_Channel3, - }, - Vector { - _handler: BDMA_Channel4, - }, - Vector { - _handler: BDMA_Channel5, - }, - Vector { - _handler: BDMA_Channel6, - }, - Vector { - _handler: BDMA_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: LPTIM4 }, - Vector { _handler: LPTIM5 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _handler: SAI4 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -impl_rng!(0x48021800); -impl_sdmmc!(SDMMC1, 0x52007000); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -impl_sdmmc!(SDMMC2, 0x48022400); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); diff --git a/embassy-stm32/src/chip/stm32h743xi.rs b/embassy-stm32/src/chip/stm32h743xi.rs deleted file mode 100644 index 061955f8..00000000 --- a/embassy-stm32/src/chip/stm32h743xi.rs +++ /dev/null @@ -1,901 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, ADC3, BDMA, COMP1, COMP2, DAC1, DCMI, DMA2D, ETH, FDCAN1, - FDCAN2, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, - PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, - PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, - PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, - PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, - PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, - PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, - PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, - PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, PJ10, PJ11, PJ12, - PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, PK11, PK12, PK13, - PK14, PK15, I2C1, I2C2, I2C3, I2C4, IWDG1, JPEG, LPTIM1, LPTIM2, LPTIM3, LPTIM4, LPTIM5, - LPUART1, LTDC, MDIOS, MDMA, OPAMP1, OPAMP2, PWR, QUADSPI, RCC, RNG, RTC, SAI1, SAI2, SAI3, - SAI4, SDMMC1, SDMMC2, SPI1, SPI2, SPI3, SPI4, SPI5, SPI6, SWPMI1, SYSCFG, TIM1, TIM12, TIM13, - TIM14, TIM15, TIM16, TIM17, TIM2, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, UART4, UART5, UART7, - UART8, USART1, USART2, USART3, USART6, USB_OTG_FS, USB_OTG_HS, VREFBUF, WWDG1 -); -pub const GPIO_BASE: usize = 0x58020000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC = 18, - ADC3 = 127, - BDMA_Channel0 = 129, - BDMA_Channel1 = 130, - BDMA_Channel2 = 131, - BDMA_Channel3 = 132, - BDMA_Channel4 = 133, - BDMA_Channel5 = 134, - BDMA_Channel6 = 135, - BDMA_Channel7 = 136, - CEC = 94, - CRS = 144, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - ECC = 145, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - HRTIM1_FLT = 109, - HRTIM1_Master = 103, - HRTIM1_TIMA = 104, - HRTIM1_TIMB = 105, - HRTIM1_TIMC = 106, - HRTIM1_TIMD = 107, - HRTIM1_TIME = 108, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - JPEG = 121, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPTIM4 = 140, - LPTIM5 = 141, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OTG_FS = 101, - OTG_FS_EP1_IN = 99, - OTG_FS_EP1_OUT = 98, - OTG_FS_WKUP = 100, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_AVD = 1, - QUADSPI = 92, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SAI3 = 114, - SAI4 = 146, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TAMP_STAMP = 2, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(ADC3); - declare!(BDMA_Channel0); - declare!(BDMA_Channel1); - declare!(BDMA_Channel2); - declare!(BDMA_Channel3); - declare!(BDMA_Channel4); - declare!(BDMA_Channel5); - declare!(BDMA_Channel6); - declare!(BDMA_Channel7); - declare!(CEC); - declare!(CRS); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(ECC); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HRTIM1_FLT); - declare!(HRTIM1_Master); - declare!(HRTIM1_TIMA); - declare!(HRTIM1_TIMB); - declare!(HRTIM1_TIMC); - declare!(HRTIM1_TIMD); - declare!(HRTIM1_TIME); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(JPEG); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPTIM4); - declare!(LPTIM5); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OTG_FS); - declare!(OTG_FS_EP1_IN); - declare!(OTG_FS_EP1_OUT); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_AVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SAI3); - declare!(SAI4); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn ADC3(); - fn BDMA_Channel0(); - fn BDMA_Channel1(); - fn BDMA_Channel2(); - fn BDMA_Channel3(); - fn BDMA_Channel4(); - fn BDMA_Channel5(); - fn BDMA_Channel6(); - fn BDMA_Channel7(); - fn CEC(); - fn CRS(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn ECC(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HRTIM1_FLT(); - fn HRTIM1_Master(); - fn HRTIM1_TIMA(); - fn HRTIM1_TIMB(); - fn HRTIM1_TIMC(); - fn HRTIM1_TIMD(); - fn HRTIM1_TIME(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn JPEG(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPTIM4(); - fn LPTIM5(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OTG_FS(); - fn OTG_FS_EP1_IN(); - fn OTG_FS_EP1_OUT(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_AVD(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SAI3(); - fn SAI4(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 150] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_AVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: QUADSPI }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { - _handler: OTG_FS_EP1_OUT, - }, - Vector { - _handler: OTG_FS_EP1_IN, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { _handler: OTG_FS }, - Vector { _reserved: 0 }, - Vector { - _handler: HRTIM1_Master, - }, - Vector { - _handler: HRTIM1_TIMA, - }, - Vector { - _handler: HRTIM1_TIMB, - }, - Vector { - _handler: HRTIM1_TIMC, - }, - Vector { - _handler: HRTIM1_TIMD, - }, - Vector { - _handler: HRTIM1_TIME, - }, - Vector { - _handler: HRTIM1_FLT, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SAI3 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _handler: JPEG }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: ADC3 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA_Channel0, - }, - Vector { - _handler: BDMA_Channel1, - }, - Vector { - _handler: BDMA_Channel2, - }, - Vector { - _handler: BDMA_Channel3, - }, - Vector { - _handler: BDMA_Channel4, - }, - Vector { - _handler: BDMA_Channel5, - }, - Vector { - _handler: BDMA_Channel6, - }, - Vector { - _handler: BDMA_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: LPTIM4 }, - Vector { _handler: LPTIM5 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _handler: SAI4 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -impl_rng!(0x48021800); -impl_sdmmc!(SDMMC1, 0x52007000); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -impl_sdmmc!(SDMMC2, 0x48022400); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); diff --git a/embassy-stm32/src/chip/stm32h743zg.rs b/embassy-stm32/src/chip/stm32h743zg.rs deleted file mode 100644 index 061955f8..00000000 --- a/embassy-stm32/src/chip/stm32h743zg.rs +++ /dev/null @@ -1,901 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, ADC3, BDMA, COMP1, COMP2, DAC1, DCMI, DMA2D, ETH, FDCAN1, - FDCAN2, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, - PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, - PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, - PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, - PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, - PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, - PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, - PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, - PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, PJ10, PJ11, PJ12, - PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, PK11, PK12, PK13, - PK14, PK15, I2C1, I2C2, I2C3, I2C4, IWDG1, JPEG, LPTIM1, LPTIM2, LPTIM3, LPTIM4, LPTIM5, - LPUART1, LTDC, MDIOS, MDMA, OPAMP1, OPAMP2, PWR, QUADSPI, RCC, RNG, RTC, SAI1, SAI2, SAI3, - SAI4, SDMMC1, SDMMC2, SPI1, SPI2, SPI3, SPI4, SPI5, SPI6, SWPMI1, SYSCFG, TIM1, TIM12, TIM13, - TIM14, TIM15, TIM16, TIM17, TIM2, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, UART4, UART5, UART7, - UART8, USART1, USART2, USART3, USART6, USB_OTG_FS, USB_OTG_HS, VREFBUF, WWDG1 -); -pub const GPIO_BASE: usize = 0x58020000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC = 18, - ADC3 = 127, - BDMA_Channel0 = 129, - BDMA_Channel1 = 130, - BDMA_Channel2 = 131, - BDMA_Channel3 = 132, - BDMA_Channel4 = 133, - BDMA_Channel5 = 134, - BDMA_Channel6 = 135, - BDMA_Channel7 = 136, - CEC = 94, - CRS = 144, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - ECC = 145, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - HRTIM1_FLT = 109, - HRTIM1_Master = 103, - HRTIM1_TIMA = 104, - HRTIM1_TIMB = 105, - HRTIM1_TIMC = 106, - HRTIM1_TIMD = 107, - HRTIM1_TIME = 108, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - JPEG = 121, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPTIM4 = 140, - LPTIM5 = 141, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OTG_FS = 101, - OTG_FS_EP1_IN = 99, - OTG_FS_EP1_OUT = 98, - OTG_FS_WKUP = 100, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_AVD = 1, - QUADSPI = 92, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SAI3 = 114, - SAI4 = 146, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TAMP_STAMP = 2, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(ADC3); - declare!(BDMA_Channel0); - declare!(BDMA_Channel1); - declare!(BDMA_Channel2); - declare!(BDMA_Channel3); - declare!(BDMA_Channel4); - declare!(BDMA_Channel5); - declare!(BDMA_Channel6); - declare!(BDMA_Channel7); - declare!(CEC); - declare!(CRS); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(ECC); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HRTIM1_FLT); - declare!(HRTIM1_Master); - declare!(HRTIM1_TIMA); - declare!(HRTIM1_TIMB); - declare!(HRTIM1_TIMC); - declare!(HRTIM1_TIMD); - declare!(HRTIM1_TIME); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(JPEG); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPTIM4); - declare!(LPTIM5); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OTG_FS); - declare!(OTG_FS_EP1_IN); - declare!(OTG_FS_EP1_OUT); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_AVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SAI3); - declare!(SAI4); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn ADC3(); - fn BDMA_Channel0(); - fn BDMA_Channel1(); - fn BDMA_Channel2(); - fn BDMA_Channel3(); - fn BDMA_Channel4(); - fn BDMA_Channel5(); - fn BDMA_Channel6(); - fn BDMA_Channel7(); - fn CEC(); - fn CRS(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn ECC(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HRTIM1_FLT(); - fn HRTIM1_Master(); - fn HRTIM1_TIMA(); - fn HRTIM1_TIMB(); - fn HRTIM1_TIMC(); - fn HRTIM1_TIMD(); - fn HRTIM1_TIME(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn JPEG(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPTIM4(); - fn LPTIM5(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OTG_FS(); - fn OTG_FS_EP1_IN(); - fn OTG_FS_EP1_OUT(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_AVD(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SAI3(); - fn SAI4(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 150] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_AVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: QUADSPI }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { - _handler: OTG_FS_EP1_OUT, - }, - Vector { - _handler: OTG_FS_EP1_IN, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { _handler: OTG_FS }, - Vector { _reserved: 0 }, - Vector { - _handler: HRTIM1_Master, - }, - Vector { - _handler: HRTIM1_TIMA, - }, - Vector { - _handler: HRTIM1_TIMB, - }, - Vector { - _handler: HRTIM1_TIMC, - }, - Vector { - _handler: HRTIM1_TIMD, - }, - Vector { - _handler: HRTIM1_TIME, - }, - Vector { - _handler: HRTIM1_FLT, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SAI3 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _handler: JPEG }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: ADC3 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA_Channel0, - }, - Vector { - _handler: BDMA_Channel1, - }, - Vector { - _handler: BDMA_Channel2, - }, - Vector { - _handler: BDMA_Channel3, - }, - Vector { - _handler: BDMA_Channel4, - }, - Vector { - _handler: BDMA_Channel5, - }, - Vector { - _handler: BDMA_Channel6, - }, - Vector { - _handler: BDMA_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: LPTIM4 }, - Vector { _handler: LPTIM5 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _handler: SAI4 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -impl_rng!(0x48021800); -impl_sdmmc!(SDMMC1, 0x52007000); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -impl_sdmmc!(SDMMC2, 0x48022400); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); diff --git a/embassy-stm32/src/chip/stm32h743zi.rs b/embassy-stm32/src/chip/stm32h743zi.rs deleted file mode 100644 index 061955f8..00000000 --- a/embassy-stm32/src/chip/stm32h743zi.rs +++ /dev/null @@ -1,901 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, ADC3, BDMA, COMP1, COMP2, DAC1, DCMI, DMA2D, ETH, FDCAN1, - FDCAN2, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, - PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, - PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, - PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, - PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, - PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, - PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, - PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, - PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, PJ10, PJ11, PJ12, - PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, PK11, PK12, PK13, - PK14, PK15, I2C1, I2C2, I2C3, I2C4, IWDG1, JPEG, LPTIM1, LPTIM2, LPTIM3, LPTIM4, LPTIM5, - LPUART1, LTDC, MDIOS, MDMA, OPAMP1, OPAMP2, PWR, QUADSPI, RCC, RNG, RTC, SAI1, SAI2, SAI3, - SAI4, SDMMC1, SDMMC2, SPI1, SPI2, SPI3, SPI4, SPI5, SPI6, SWPMI1, SYSCFG, TIM1, TIM12, TIM13, - TIM14, TIM15, TIM16, TIM17, TIM2, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, UART4, UART5, UART7, - UART8, USART1, USART2, USART3, USART6, USB_OTG_FS, USB_OTG_HS, VREFBUF, WWDG1 -); -pub const GPIO_BASE: usize = 0x58020000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC = 18, - ADC3 = 127, - BDMA_Channel0 = 129, - BDMA_Channel1 = 130, - BDMA_Channel2 = 131, - BDMA_Channel3 = 132, - BDMA_Channel4 = 133, - BDMA_Channel5 = 134, - BDMA_Channel6 = 135, - BDMA_Channel7 = 136, - CEC = 94, - CRS = 144, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - ECC = 145, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - HRTIM1_FLT = 109, - HRTIM1_Master = 103, - HRTIM1_TIMA = 104, - HRTIM1_TIMB = 105, - HRTIM1_TIMC = 106, - HRTIM1_TIMD = 107, - HRTIM1_TIME = 108, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - JPEG = 121, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPTIM4 = 140, - LPTIM5 = 141, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OTG_FS = 101, - OTG_FS_EP1_IN = 99, - OTG_FS_EP1_OUT = 98, - OTG_FS_WKUP = 100, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_AVD = 1, - QUADSPI = 92, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SAI3 = 114, - SAI4 = 146, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TAMP_STAMP = 2, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(ADC3); - declare!(BDMA_Channel0); - declare!(BDMA_Channel1); - declare!(BDMA_Channel2); - declare!(BDMA_Channel3); - declare!(BDMA_Channel4); - declare!(BDMA_Channel5); - declare!(BDMA_Channel6); - declare!(BDMA_Channel7); - declare!(CEC); - declare!(CRS); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(ECC); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HRTIM1_FLT); - declare!(HRTIM1_Master); - declare!(HRTIM1_TIMA); - declare!(HRTIM1_TIMB); - declare!(HRTIM1_TIMC); - declare!(HRTIM1_TIMD); - declare!(HRTIM1_TIME); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(JPEG); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPTIM4); - declare!(LPTIM5); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OTG_FS); - declare!(OTG_FS_EP1_IN); - declare!(OTG_FS_EP1_OUT); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_AVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SAI3); - declare!(SAI4); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn ADC3(); - fn BDMA_Channel0(); - fn BDMA_Channel1(); - fn BDMA_Channel2(); - fn BDMA_Channel3(); - fn BDMA_Channel4(); - fn BDMA_Channel5(); - fn BDMA_Channel6(); - fn BDMA_Channel7(); - fn CEC(); - fn CRS(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn ECC(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HRTIM1_FLT(); - fn HRTIM1_Master(); - fn HRTIM1_TIMA(); - fn HRTIM1_TIMB(); - fn HRTIM1_TIMC(); - fn HRTIM1_TIMD(); - fn HRTIM1_TIME(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn JPEG(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPTIM4(); - fn LPTIM5(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OTG_FS(); - fn OTG_FS_EP1_IN(); - fn OTG_FS_EP1_OUT(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_AVD(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SAI3(); - fn SAI4(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 150] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_AVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: QUADSPI }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { - _handler: OTG_FS_EP1_OUT, - }, - Vector { - _handler: OTG_FS_EP1_IN, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { _handler: OTG_FS }, - Vector { _reserved: 0 }, - Vector { - _handler: HRTIM1_Master, - }, - Vector { - _handler: HRTIM1_TIMA, - }, - Vector { - _handler: HRTIM1_TIMB, - }, - Vector { - _handler: HRTIM1_TIMC, - }, - Vector { - _handler: HRTIM1_TIMD, - }, - Vector { - _handler: HRTIM1_TIME, - }, - Vector { - _handler: HRTIM1_FLT, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SAI3 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _handler: JPEG }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: ADC3 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA_Channel0, - }, - Vector { - _handler: BDMA_Channel1, - }, - Vector { - _handler: BDMA_Channel2, - }, - Vector { - _handler: BDMA_Channel3, - }, - Vector { - _handler: BDMA_Channel4, - }, - Vector { - _handler: BDMA_Channel5, - }, - Vector { - _handler: BDMA_Channel6, - }, - Vector { - _handler: BDMA_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: LPTIM4 }, - Vector { _handler: LPTIM5 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _handler: SAI4 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -impl_rng!(0x48021800); -impl_sdmmc!(SDMMC1, 0x52007000); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -impl_sdmmc!(SDMMC2, 0x48022400); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); diff --git a/embassy-stm32/src/chip/stm32h745bg.rs b/embassy-stm32/src/chip/stm32h745bg.rs deleted file mode 100644 index c6f4316a..00000000 --- a/embassy-stm32/src/chip/stm32h745bg.rs +++ /dev/null @@ -1,915 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, ADC3, BDMA, COMP1, COMP2, DAC1, DCMI, DMA2D, ETH, FDCAN1, - FDCAN2, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, - PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, - PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, - PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, - PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, - PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, - PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, - PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, - PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, PJ10, PJ11, PJ12, - PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, PK11, PK12, PK13, - PK14, PK15, I2C1, I2C2, I2C3, I2C4, IWDG1, IWDG2, JPEG, LPTIM1, LPTIM2, LPTIM3, LPTIM4, LPTIM5, - LPUART1, LTDC, MDIOS, MDMA, OPAMP1, OPAMP2, PWR, QUADSPI, RCC, RNG, RTC, SAI1, SAI2, SAI3, - SAI4, SDMMC1, SDMMC2, SPI1, SPI2, SPI3, SPI4, SPI5, SPI6, SWPMI1, SYSCFG, TIM1, TIM12, TIM13, - TIM14, TIM15, TIM16, TIM17, TIM2, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, UART4, UART5, UART7, - UART8, USART1, USART2, USART3, USART6, USB_OTG_FS, USB_OTG_HS, VREFBUF, WWDG1, WWDG2 -); -pub const GPIO_BASE: usize = 0x58020000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC = 18, - ADC3 = 127, - BDMA_Channel0 = 129, - BDMA_Channel1 = 130, - BDMA_Channel2 = 131, - BDMA_Channel3 = 132, - BDMA_Channel4 = 133, - BDMA_Channel5 = 134, - BDMA_Channel6 = 135, - BDMA_Channel7 = 136, - CEC = 94, - CM4_SEV = 65, - CM7_SEV = 64, - CRS = 144, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - ECC = 145, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - HOLD_CORE = 148, - HRTIM1_FLT = 109, - HRTIM1_Master = 103, - HRTIM1_TIMA = 104, - HRTIM1_TIMB = 105, - HRTIM1_TIMC = 106, - HRTIM1_TIMD = 107, - HRTIM1_TIME = 108, - HSEM1 = 125, - HSEM2 = 126, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - JPEG = 121, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPTIM4 = 140, - LPTIM5 = 141, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OTG_FS = 101, - OTG_FS_EP1_IN = 99, - OTG_FS_EP1_OUT = 98, - OTG_FS_WKUP = 100, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_AVD = 1, - QUADSPI = 92, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SAI3 = 114, - SAI4 = 146, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TAMP_STAMP = 2, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(ADC3); - declare!(BDMA_Channel0); - declare!(BDMA_Channel1); - declare!(BDMA_Channel2); - declare!(BDMA_Channel3); - declare!(BDMA_Channel4); - declare!(BDMA_Channel5); - declare!(BDMA_Channel6); - declare!(BDMA_Channel7); - declare!(CEC); - declare!(CM4_SEV); - declare!(CM7_SEV); - declare!(CRS); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(ECC); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HOLD_CORE); - declare!(HRTIM1_FLT); - declare!(HRTIM1_Master); - declare!(HRTIM1_TIMA); - declare!(HRTIM1_TIMB); - declare!(HRTIM1_TIMC); - declare!(HRTIM1_TIMD); - declare!(HRTIM1_TIME); - declare!(HSEM1); - declare!(HSEM2); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(JPEG); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPTIM4); - declare!(LPTIM5); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OTG_FS); - declare!(OTG_FS_EP1_IN); - declare!(OTG_FS_EP1_OUT); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_AVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SAI3); - declare!(SAI4); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn ADC3(); - fn BDMA_Channel0(); - fn BDMA_Channel1(); - fn BDMA_Channel2(); - fn BDMA_Channel3(); - fn BDMA_Channel4(); - fn BDMA_Channel5(); - fn BDMA_Channel6(); - fn BDMA_Channel7(); - fn CEC(); - fn CM4_SEV(); - fn CM7_SEV(); - fn CRS(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn ECC(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HOLD_CORE(); - fn HRTIM1_FLT(); - fn HRTIM1_Master(); - fn HRTIM1_TIMA(); - fn HRTIM1_TIMB(); - fn HRTIM1_TIMC(); - fn HRTIM1_TIMD(); - fn HRTIM1_TIME(); - fn HSEM1(); - fn HSEM2(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn JPEG(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPTIM4(); - fn LPTIM5(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OTG_FS(); - fn OTG_FS_EP1_IN(); - fn OTG_FS_EP1_OUT(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_AVD(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SAI3(); - fn SAI4(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 150] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_AVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { _handler: CM7_SEV }, - Vector { _handler: CM4_SEV }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: QUADSPI }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { - _handler: OTG_FS_EP1_OUT, - }, - Vector { - _handler: OTG_FS_EP1_IN, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { _handler: OTG_FS }, - Vector { _reserved: 0 }, - Vector { - _handler: HRTIM1_Master, - }, - Vector { - _handler: HRTIM1_TIMA, - }, - Vector { - _handler: HRTIM1_TIMB, - }, - Vector { - _handler: HRTIM1_TIMC, - }, - Vector { - _handler: HRTIM1_TIMD, - }, - Vector { - _handler: HRTIM1_TIME, - }, - Vector { - _handler: HRTIM1_FLT, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SAI3 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _handler: JPEG }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _handler: HSEM2 }, - Vector { _handler: ADC3 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA_Channel0, - }, - Vector { - _handler: BDMA_Channel1, - }, - Vector { - _handler: BDMA_Channel2, - }, - Vector { - _handler: BDMA_Channel3, - }, - Vector { - _handler: BDMA_Channel4, - }, - Vector { - _handler: BDMA_Channel5, - }, - Vector { - _handler: BDMA_Channel6, - }, - Vector { - _handler: BDMA_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: LPTIM4 }, - Vector { _handler: LPTIM5 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _handler: SAI4 }, - Vector { _reserved: 0 }, - Vector { - _handler: HOLD_CORE, - }, - Vector { - _handler: WAKEUP_PIN, - }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -impl_rng!(0x48021800); -impl_sdmmc!(SDMMC1, 0x52007000); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -impl_sdmmc!(SDMMC2, 0x48022400); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); diff --git a/embassy-stm32/src/chip/stm32h745bi.rs b/embassy-stm32/src/chip/stm32h745bi.rs deleted file mode 100644 index c6f4316a..00000000 --- a/embassy-stm32/src/chip/stm32h745bi.rs +++ /dev/null @@ -1,915 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, ADC3, BDMA, COMP1, COMP2, DAC1, DCMI, DMA2D, ETH, FDCAN1, - FDCAN2, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, - PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, - PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, - PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, - PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, - PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, - PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, - PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, - PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, PJ10, PJ11, PJ12, - PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, PK11, PK12, PK13, - PK14, PK15, I2C1, I2C2, I2C3, I2C4, IWDG1, IWDG2, JPEG, LPTIM1, LPTIM2, LPTIM3, LPTIM4, LPTIM5, - LPUART1, LTDC, MDIOS, MDMA, OPAMP1, OPAMP2, PWR, QUADSPI, RCC, RNG, RTC, SAI1, SAI2, SAI3, - SAI4, SDMMC1, SDMMC2, SPI1, SPI2, SPI3, SPI4, SPI5, SPI6, SWPMI1, SYSCFG, TIM1, TIM12, TIM13, - TIM14, TIM15, TIM16, TIM17, TIM2, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, UART4, UART5, UART7, - UART8, USART1, USART2, USART3, USART6, USB_OTG_FS, USB_OTG_HS, VREFBUF, WWDG1, WWDG2 -); -pub const GPIO_BASE: usize = 0x58020000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC = 18, - ADC3 = 127, - BDMA_Channel0 = 129, - BDMA_Channel1 = 130, - BDMA_Channel2 = 131, - BDMA_Channel3 = 132, - BDMA_Channel4 = 133, - BDMA_Channel5 = 134, - BDMA_Channel6 = 135, - BDMA_Channel7 = 136, - CEC = 94, - CM4_SEV = 65, - CM7_SEV = 64, - CRS = 144, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - ECC = 145, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - HOLD_CORE = 148, - HRTIM1_FLT = 109, - HRTIM1_Master = 103, - HRTIM1_TIMA = 104, - HRTIM1_TIMB = 105, - HRTIM1_TIMC = 106, - HRTIM1_TIMD = 107, - HRTIM1_TIME = 108, - HSEM1 = 125, - HSEM2 = 126, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - JPEG = 121, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPTIM4 = 140, - LPTIM5 = 141, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OTG_FS = 101, - OTG_FS_EP1_IN = 99, - OTG_FS_EP1_OUT = 98, - OTG_FS_WKUP = 100, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_AVD = 1, - QUADSPI = 92, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SAI3 = 114, - SAI4 = 146, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TAMP_STAMP = 2, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(ADC3); - declare!(BDMA_Channel0); - declare!(BDMA_Channel1); - declare!(BDMA_Channel2); - declare!(BDMA_Channel3); - declare!(BDMA_Channel4); - declare!(BDMA_Channel5); - declare!(BDMA_Channel6); - declare!(BDMA_Channel7); - declare!(CEC); - declare!(CM4_SEV); - declare!(CM7_SEV); - declare!(CRS); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(ECC); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HOLD_CORE); - declare!(HRTIM1_FLT); - declare!(HRTIM1_Master); - declare!(HRTIM1_TIMA); - declare!(HRTIM1_TIMB); - declare!(HRTIM1_TIMC); - declare!(HRTIM1_TIMD); - declare!(HRTIM1_TIME); - declare!(HSEM1); - declare!(HSEM2); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(JPEG); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPTIM4); - declare!(LPTIM5); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OTG_FS); - declare!(OTG_FS_EP1_IN); - declare!(OTG_FS_EP1_OUT); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_AVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SAI3); - declare!(SAI4); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn ADC3(); - fn BDMA_Channel0(); - fn BDMA_Channel1(); - fn BDMA_Channel2(); - fn BDMA_Channel3(); - fn BDMA_Channel4(); - fn BDMA_Channel5(); - fn BDMA_Channel6(); - fn BDMA_Channel7(); - fn CEC(); - fn CM4_SEV(); - fn CM7_SEV(); - fn CRS(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn ECC(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HOLD_CORE(); - fn HRTIM1_FLT(); - fn HRTIM1_Master(); - fn HRTIM1_TIMA(); - fn HRTIM1_TIMB(); - fn HRTIM1_TIMC(); - fn HRTIM1_TIMD(); - fn HRTIM1_TIME(); - fn HSEM1(); - fn HSEM2(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn JPEG(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPTIM4(); - fn LPTIM5(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OTG_FS(); - fn OTG_FS_EP1_IN(); - fn OTG_FS_EP1_OUT(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_AVD(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SAI3(); - fn SAI4(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 150] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_AVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { _handler: CM7_SEV }, - Vector { _handler: CM4_SEV }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: QUADSPI }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { - _handler: OTG_FS_EP1_OUT, - }, - Vector { - _handler: OTG_FS_EP1_IN, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { _handler: OTG_FS }, - Vector { _reserved: 0 }, - Vector { - _handler: HRTIM1_Master, - }, - Vector { - _handler: HRTIM1_TIMA, - }, - Vector { - _handler: HRTIM1_TIMB, - }, - Vector { - _handler: HRTIM1_TIMC, - }, - Vector { - _handler: HRTIM1_TIMD, - }, - Vector { - _handler: HRTIM1_TIME, - }, - Vector { - _handler: HRTIM1_FLT, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SAI3 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _handler: JPEG }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _handler: HSEM2 }, - Vector { _handler: ADC3 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA_Channel0, - }, - Vector { - _handler: BDMA_Channel1, - }, - Vector { - _handler: BDMA_Channel2, - }, - Vector { - _handler: BDMA_Channel3, - }, - Vector { - _handler: BDMA_Channel4, - }, - Vector { - _handler: BDMA_Channel5, - }, - Vector { - _handler: BDMA_Channel6, - }, - Vector { - _handler: BDMA_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: LPTIM4 }, - Vector { _handler: LPTIM5 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _handler: SAI4 }, - Vector { _reserved: 0 }, - Vector { - _handler: HOLD_CORE, - }, - Vector { - _handler: WAKEUP_PIN, - }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -impl_rng!(0x48021800); -impl_sdmmc!(SDMMC1, 0x52007000); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -impl_sdmmc!(SDMMC2, 0x48022400); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); diff --git a/embassy-stm32/src/chip/stm32h745ig.rs b/embassy-stm32/src/chip/stm32h745ig.rs deleted file mode 100644 index c6f4316a..00000000 --- a/embassy-stm32/src/chip/stm32h745ig.rs +++ /dev/null @@ -1,915 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, ADC3, BDMA, COMP1, COMP2, DAC1, DCMI, DMA2D, ETH, FDCAN1, - FDCAN2, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, - PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, - PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, - PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, - PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, - PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, - PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, - PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, - PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, PJ10, PJ11, PJ12, - PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, PK11, PK12, PK13, - PK14, PK15, I2C1, I2C2, I2C3, I2C4, IWDG1, IWDG2, JPEG, LPTIM1, LPTIM2, LPTIM3, LPTIM4, LPTIM5, - LPUART1, LTDC, MDIOS, MDMA, OPAMP1, OPAMP2, PWR, QUADSPI, RCC, RNG, RTC, SAI1, SAI2, SAI3, - SAI4, SDMMC1, SDMMC2, SPI1, SPI2, SPI3, SPI4, SPI5, SPI6, SWPMI1, SYSCFG, TIM1, TIM12, TIM13, - TIM14, TIM15, TIM16, TIM17, TIM2, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, UART4, UART5, UART7, - UART8, USART1, USART2, USART3, USART6, USB_OTG_FS, USB_OTG_HS, VREFBUF, WWDG1, WWDG2 -); -pub const GPIO_BASE: usize = 0x58020000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC = 18, - ADC3 = 127, - BDMA_Channel0 = 129, - BDMA_Channel1 = 130, - BDMA_Channel2 = 131, - BDMA_Channel3 = 132, - BDMA_Channel4 = 133, - BDMA_Channel5 = 134, - BDMA_Channel6 = 135, - BDMA_Channel7 = 136, - CEC = 94, - CM4_SEV = 65, - CM7_SEV = 64, - CRS = 144, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - ECC = 145, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - HOLD_CORE = 148, - HRTIM1_FLT = 109, - HRTIM1_Master = 103, - HRTIM1_TIMA = 104, - HRTIM1_TIMB = 105, - HRTIM1_TIMC = 106, - HRTIM1_TIMD = 107, - HRTIM1_TIME = 108, - HSEM1 = 125, - HSEM2 = 126, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - JPEG = 121, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPTIM4 = 140, - LPTIM5 = 141, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OTG_FS = 101, - OTG_FS_EP1_IN = 99, - OTG_FS_EP1_OUT = 98, - OTG_FS_WKUP = 100, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_AVD = 1, - QUADSPI = 92, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SAI3 = 114, - SAI4 = 146, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TAMP_STAMP = 2, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(ADC3); - declare!(BDMA_Channel0); - declare!(BDMA_Channel1); - declare!(BDMA_Channel2); - declare!(BDMA_Channel3); - declare!(BDMA_Channel4); - declare!(BDMA_Channel5); - declare!(BDMA_Channel6); - declare!(BDMA_Channel7); - declare!(CEC); - declare!(CM4_SEV); - declare!(CM7_SEV); - declare!(CRS); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(ECC); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HOLD_CORE); - declare!(HRTIM1_FLT); - declare!(HRTIM1_Master); - declare!(HRTIM1_TIMA); - declare!(HRTIM1_TIMB); - declare!(HRTIM1_TIMC); - declare!(HRTIM1_TIMD); - declare!(HRTIM1_TIME); - declare!(HSEM1); - declare!(HSEM2); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(JPEG); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPTIM4); - declare!(LPTIM5); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OTG_FS); - declare!(OTG_FS_EP1_IN); - declare!(OTG_FS_EP1_OUT); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_AVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SAI3); - declare!(SAI4); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn ADC3(); - fn BDMA_Channel0(); - fn BDMA_Channel1(); - fn BDMA_Channel2(); - fn BDMA_Channel3(); - fn BDMA_Channel4(); - fn BDMA_Channel5(); - fn BDMA_Channel6(); - fn BDMA_Channel7(); - fn CEC(); - fn CM4_SEV(); - fn CM7_SEV(); - fn CRS(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn ECC(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HOLD_CORE(); - fn HRTIM1_FLT(); - fn HRTIM1_Master(); - fn HRTIM1_TIMA(); - fn HRTIM1_TIMB(); - fn HRTIM1_TIMC(); - fn HRTIM1_TIMD(); - fn HRTIM1_TIME(); - fn HSEM1(); - fn HSEM2(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn JPEG(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPTIM4(); - fn LPTIM5(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OTG_FS(); - fn OTG_FS_EP1_IN(); - fn OTG_FS_EP1_OUT(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_AVD(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SAI3(); - fn SAI4(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 150] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_AVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { _handler: CM7_SEV }, - Vector { _handler: CM4_SEV }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: QUADSPI }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { - _handler: OTG_FS_EP1_OUT, - }, - Vector { - _handler: OTG_FS_EP1_IN, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { _handler: OTG_FS }, - Vector { _reserved: 0 }, - Vector { - _handler: HRTIM1_Master, - }, - Vector { - _handler: HRTIM1_TIMA, - }, - Vector { - _handler: HRTIM1_TIMB, - }, - Vector { - _handler: HRTIM1_TIMC, - }, - Vector { - _handler: HRTIM1_TIMD, - }, - Vector { - _handler: HRTIM1_TIME, - }, - Vector { - _handler: HRTIM1_FLT, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SAI3 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _handler: JPEG }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _handler: HSEM2 }, - Vector { _handler: ADC3 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA_Channel0, - }, - Vector { - _handler: BDMA_Channel1, - }, - Vector { - _handler: BDMA_Channel2, - }, - Vector { - _handler: BDMA_Channel3, - }, - Vector { - _handler: BDMA_Channel4, - }, - Vector { - _handler: BDMA_Channel5, - }, - Vector { - _handler: BDMA_Channel6, - }, - Vector { - _handler: BDMA_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: LPTIM4 }, - Vector { _handler: LPTIM5 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _handler: SAI4 }, - Vector { _reserved: 0 }, - Vector { - _handler: HOLD_CORE, - }, - Vector { - _handler: WAKEUP_PIN, - }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -impl_rng!(0x48021800); -impl_sdmmc!(SDMMC1, 0x52007000); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -impl_sdmmc!(SDMMC2, 0x48022400); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); diff --git a/embassy-stm32/src/chip/stm32h745ii.rs b/embassy-stm32/src/chip/stm32h745ii.rs deleted file mode 100644 index c6f4316a..00000000 --- a/embassy-stm32/src/chip/stm32h745ii.rs +++ /dev/null @@ -1,915 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, ADC3, BDMA, COMP1, COMP2, DAC1, DCMI, DMA2D, ETH, FDCAN1, - FDCAN2, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, - PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, - PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, - PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, - PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, - PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, - PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, - PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, - PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, PJ10, PJ11, PJ12, - PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, PK11, PK12, PK13, - PK14, PK15, I2C1, I2C2, I2C3, I2C4, IWDG1, IWDG2, JPEG, LPTIM1, LPTIM2, LPTIM3, LPTIM4, LPTIM5, - LPUART1, LTDC, MDIOS, MDMA, OPAMP1, OPAMP2, PWR, QUADSPI, RCC, RNG, RTC, SAI1, SAI2, SAI3, - SAI4, SDMMC1, SDMMC2, SPI1, SPI2, SPI3, SPI4, SPI5, SPI6, SWPMI1, SYSCFG, TIM1, TIM12, TIM13, - TIM14, TIM15, TIM16, TIM17, TIM2, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, UART4, UART5, UART7, - UART8, USART1, USART2, USART3, USART6, USB_OTG_FS, USB_OTG_HS, VREFBUF, WWDG1, WWDG2 -); -pub const GPIO_BASE: usize = 0x58020000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC = 18, - ADC3 = 127, - BDMA_Channel0 = 129, - BDMA_Channel1 = 130, - BDMA_Channel2 = 131, - BDMA_Channel3 = 132, - BDMA_Channel4 = 133, - BDMA_Channel5 = 134, - BDMA_Channel6 = 135, - BDMA_Channel7 = 136, - CEC = 94, - CM4_SEV = 65, - CM7_SEV = 64, - CRS = 144, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - ECC = 145, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - HOLD_CORE = 148, - HRTIM1_FLT = 109, - HRTIM1_Master = 103, - HRTIM1_TIMA = 104, - HRTIM1_TIMB = 105, - HRTIM1_TIMC = 106, - HRTIM1_TIMD = 107, - HRTIM1_TIME = 108, - HSEM1 = 125, - HSEM2 = 126, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - JPEG = 121, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPTIM4 = 140, - LPTIM5 = 141, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OTG_FS = 101, - OTG_FS_EP1_IN = 99, - OTG_FS_EP1_OUT = 98, - OTG_FS_WKUP = 100, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_AVD = 1, - QUADSPI = 92, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SAI3 = 114, - SAI4 = 146, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TAMP_STAMP = 2, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(ADC3); - declare!(BDMA_Channel0); - declare!(BDMA_Channel1); - declare!(BDMA_Channel2); - declare!(BDMA_Channel3); - declare!(BDMA_Channel4); - declare!(BDMA_Channel5); - declare!(BDMA_Channel6); - declare!(BDMA_Channel7); - declare!(CEC); - declare!(CM4_SEV); - declare!(CM7_SEV); - declare!(CRS); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(ECC); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HOLD_CORE); - declare!(HRTIM1_FLT); - declare!(HRTIM1_Master); - declare!(HRTIM1_TIMA); - declare!(HRTIM1_TIMB); - declare!(HRTIM1_TIMC); - declare!(HRTIM1_TIMD); - declare!(HRTIM1_TIME); - declare!(HSEM1); - declare!(HSEM2); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(JPEG); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPTIM4); - declare!(LPTIM5); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OTG_FS); - declare!(OTG_FS_EP1_IN); - declare!(OTG_FS_EP1_OUT); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_AVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SAI3); - declare!(SAI4); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn ADC3(); - fn BDMA_Channel0(); - fn BDMA_Channel1(); - fn BDMA_Channel2(); - fn BDMA_Channel3(); - fn BDMA_Channel4(); - fn BDMA_Channel5(); - fn BDMA_Channel6(); - fn BDMA_Channel7(); - fn CEC(); - fn CM4_SEV(); - fn CM7_SEV(); - fn CRS(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn ECC(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HOLD_CORE(); - fn HRTIM1_FLT(); - fn HRTIM1_Master(); - fn HRTIM1_TIMA(); - fn HRTIM1_TIMB(); - fn HRTIM1_TIMC(); - fn HRTIM1_TIMD(); - fn HRTIM1_TIME(); - fn HSEM1(); - fn HSEM2(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn JPEG(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPTIM4(); - fn LPTIM5(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OTG_FS(); - fn OTG_FS_EP1_IN(); - fn OTG_FS_EP1_OUT(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_AVD(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SAI3(); - fn SAI4(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 150] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_AVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { _handler: CM7_SEV }, - Vector { _handler: CM4_SEV }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: QUADSPI }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { - _handler: OTG_FS_EP1_OUT, - }, - Vector { - _handler: OTG_FS_EP1_IN, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { _handler: OTG_FS }, - Vector { _reserved: 0 }, - Vector { - _handler: HRTIM1_Master, - }, - Vector { - _handler: HRTIM1_TIMA, - }, - Vector { - _handler: HRTIM1_TIMB, - }, - Vector { - _handler: HRTIM1_TIMC, - }, - Vector { - _handler: HRTIM1_TIMD, - }, - Vector { - _handler: HRTIM1_TIME, - }, - Vector { - _handler: HRTIM1_FLT, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SAI3 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _handler: JPEG }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _handler: HSEM2 }, - Vector { _handler: ADC3 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA_Channel0, - }, - Vector { - _handler: BDMA_Channel1, - }, - Vector { - _handler: BDMA_Channel2, - }, - Vector { - _handler: BDMA_Channel3, - }, - Vector { - _handler: BDMA_Channel4, - }, - Vector { - _handler: BDMA_Channel5, - }, - Vector { - _handler: BDMA_Channel6, - }, - Vector { - _handler: BDMA_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: LPTIM4 }, - Vector { _handler: LPTIM5 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _handler: SAI4 }, - Vector { _reserved: 0 }, - Vector { - _handler: HOLD_CORE, - }, - Vector { - _handler: WAKEUP_PIN, - }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -impl_rng!(0x48021800); -impl_sdmmc!(SDMMC1, 0x52007000); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -impl_sdmmc!(SDMMC2, 0x48022400); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); diff --git a/embassy-stm32/src/chip/stm32h745xg.rs b/embassy-stm32/src/chip/stm32h745xg.rs deleted file mode 100644 index c6f4316a..00000000 --- a/embassy-stm32/src/chip/stm32h745xg.rs +++ /dev/null @@ -1,915 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, ADC3, BDMA, COMP1, COMP2, DAC1, DCMI, DMA2D, ETH, FDCAN1, - FDCAN2, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, - PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, - PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, - PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, - PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, - PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, - PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, - PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, - PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, PJ10, PJ11, PJ12, - PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, PK11, PK12, PK13, - PK14, PK15, I2C1, I2C2, I2C3, I2C4, IWDG1, IWDG2, JPEG, LPTIM1, LPTIM2, LPTIM3, LPTIM4, LPTIM5, - LPUART1, LTDC, MDIOS, MDMA, OPAMP1, OPAMP2, PWR, QUADSPI, RCC, RNG, RTC, SAI1, SAI2, SAI3, - SAI4, SDMMC1, SDMMC2, SPI1, SPI2, SPI3, SPI4, SPI5, SPI6, SWPMI1, SYSCFG, TIM1, TIM12, TIM13, - TIM14, TIM15, TIM16, TIM17, TIM2, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, UART4, UART5, UART7, - UART8, USART1, USART2, USART3, USART6, USB_OTG_FS, USB_OTG_HS, VREFBUF, WWDG1, WWDG2 -); -pub const GPIO_BASE: usize = 0x58020000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC = 18, - ADC3 = 127, - BDMA_Channel0 = 129, - BDMA_Channel1 = 130, - BDMA_Channel2 = 131, - BDMA_Channel3 = 132, - BDMA_Channel4 = 133, - BDMA_Channel5 = 134, - BDMA_Channel6 = 135, - BDMA_Channel7 = 136, - CEC = 94, - CM4_SEV = 65, - CM7_SEV = 64, - CRS = 144, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - ECC = 145, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - HOLD_CORE = 148, - HRTIM1_FLT = 109, - HRTIM1_Master = 103, - HRTIM1_TIMA = 104, - HRTIM1_TIMB = 105, - HRTIM1_TIMC = 106, - HRTIM1_TIMD = 107, - HRTIM1_TIME = 108, - HSEM1 = 125, - HSEM2 = 126, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - JPEG = 121, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPTIM4 = 140, - LPTIM5 = 141, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OTG_FS = 101, - OTG_FS_EP1_IN = 99, - OTG_FS_EP1_OUT = 98, - OTG_FS_WKUP = 100, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_AVD = 1, - QUADSPI = 92, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SAI3 = 114, - SAI4 = 146, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TAMP_STAMP = 2, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(ADC3); - declare!(BDMA_Channel0); - declare!(BDMA_Channel1); - declare!(BDMA_Channel2); - declare!(BDMA_Channel3); - declare!(BDMA_Channel4); - declare!(BDMA_Channel5); - declare!(BDMA_Channel6); - declare!(BDMA_Channel7); - declare!(CEC); - declare!(CM4_SEV); - declare!(CM7_SEV); - declare!(CRS); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(ECC); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HOLD_CORE); - declare!(HRTIM1_FLT); - declare!(HRTIM1_Master); - declare!(HRTIM1_TIMA); - declare!(HRTIM1_TIMB); - declare!(HRTIM1_TIMC); - declare!(HRTIM1_TIMD); - declare!(HRTIM1_TIME); - declare!(HSEM1); - declare!(HSEM2); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(JPEG); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPTIM4); - declare!(LPTIM5); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OTG_FS); - declare!(OTG_FS_EP1_IN); - declare!(OTG_FS_EP1_OUT); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_AVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SAI3); - declare!(SAI4); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn ADC3(); - fn BDMA_Channel0(); - fn BDMA_Channel1(); - fn BDMA_Channel2(); - fn BDMA_Channel3(); - fn BDMA_Channel4(); - fn BDMA_Channel5(); - fn BDMA_Channel6(); - fn BDMA_Channel7(); - fn CEC(); - fn CM4_SEV(); - fn CM7_SEV(); - fn CRS(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn ECC(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HOLD_CORE(); - fn HRTIM1_FLT(); - fn HRTIM1_Master(); - fn HRTIM1_TIMA(); - fn HRTIM1_TIMB(); - fn HRTIM1_TIMC(); - fn HRTIM1_TIMD(); - fn HRTIM1_TIME(); - fn HSEM1(); - fn HSEM2(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn JPEG(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPTIM4(); - fn LPTIM5(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OTG_FS(); - fn OTG_FS_EP1_IN(); - fn OTG_FS_EP1_OUT(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_AVD(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SAI3(); - fn SAI4(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 150] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_AVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { _handler: CM7_SEV }, - Vector { _handler: CM4_SEV }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: QUADSPI }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { - _handler: OTG_FS_EP1_OUT, - }, - Vector { - _handler: OTG_FS_EP1_IN, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { _handler: OTG_FS }, - Vector { _reserved: 0 }, - Vector { - _handler: HRTIM1_Master, - }, - Vector { - _handler: HRTIM1_TIMA, - }, - Vector { - _handler: HRTIM1_TIMB, - }, - Vector { - _handler: HRTIM1_TIMC, - }, - Vector { - _handler: HRTIM1_TIMD, - }, - Vector { - _handler: HRTIM1_TIME, - }, - Vector { - _handler: HRTIM1_FLT, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SAI3 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _handler: JPEG }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _handler: HSEM2 }, - Vector { _handler: ADC3 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA_Channel0, - }, - Vector { - _handler: BDMA_Channel1, - }, - Vector { - _handler: BDMA_Channel2, - }, - Vector { - _handler: BDMA_Channel3, - }, - Vector { - _handler: BDMA_Channel4, - }, - Vector { - _handler: BDMA_Channel5, - }, - Vector { - _handler: BDMA_Channel6, - }, - Vector { - _handler: BDMA_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: LPTIM4 }, - Vector { _handler: LPTIM5 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _handler: SAI4 }, - Vector { _reserved: 0 }, - Vector { - _handler: HOLD_CORE, - }, - Vector { - _handler: WAKEUP_PIN, - }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -impl_rng!(0x48021800); -impl_sdmmc!(SDMMC1, 0x52007000); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -impl_sdmmc!(SDMMC2, 0x48022400); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); diff --git a/embassy-stm32/src/chip/stm32h745xi.rs b/embassy-stm32/src/chip/stm32h745xi.rs deleted file mode 100644 index c6f4316a..00000000 --- a/embassy-stm32/src/chip/stm32h745xi.rs +++ /dev/null @@ -1,915 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, ADC3, BDMA, COMP1, COMP2, DAC1, DCMI, DMA2D, ETH, FDCAN1, - FDCAN2, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, - PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, - PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, - PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, - PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, - PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, - PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, - PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, - PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, PJ10, PJ11, PJ12, - PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, PK11, PK12, PK13, - PK14, PK15, I2C1, I2C2, I2C3, I2C4, IWDG1, IWDG2, JPEG, LPTIM1, LPTIM2, LPTIM3, LPTIM4, LPTIM5, - LPUART1, LTDC, MDIOS, MDMA, OPAMP1, OPAMP2, PWR, QUADSPI, RCC, RNG, RTC, SAI1, SAI2, SAI3, - SAI4, SDMMC1, SDMMC2, SPI1, SPI2, SPI3, SPI4, SPI5, SPI6, SWPMI1, SYSCFG, TIM1, TIM12, TIM13, - TIM14, TIM15, TIM16, TIM17, TIM2, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, UART4, UART5, UART7, - UART8, USART1, USART2, USART3, USART6, USB_OTG_FS, USB_OTG_HS, VREFBUF, WWDG1, WWDG2 -); -pub const GPIO_BASE: usize = 0x58020000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC = 18, - ADC3 = 127, - BDMA_Channel0 = 129, - BDMA_Channel1 = 130, - BDMA_Channel2 = 131, - BDMA_Channel3 = 132, - BDMA_Channel4 = 133, - BDMA_Channel5 = 134, - BDMA_Channel6 = 135, - BDMA_Channel7 = 136, - CEC = 94, - CM4_SEV = 65, - CM7_SEV = 64, - CRS = 144, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - ECC = 145, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - HOLD_CORE = 148, - HRTIM1_FLT = 109, - HRTIM1_Master = 103, - HRTIM1_TIMA = 104, - HRTIM1_TIMB = 105, - HRTIM1_TIMC = 106, - HRTIM1_TIMD = 107, - HRTIM1_TIME = 108, - HSEM1 = 125, - HSEM2 = 126, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - JPEG = 121, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPTIM4 = 140, - LPTIM5 = 141, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OTG_FS = 101, - OTG_FS_EP1_IN = 99, - OTG_FS_EP1_OUT = 98, - OTG_FS_WKUP = 100, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_AVD = 1, - QUADSPI = 92, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SAI3 = 114, - SAI4 = 146, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TAMP_STAMP = 2, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(ADC3); - declare!(BDMA_Channel0); - declare!(BDMA_Channel1); - declare!(BDMA_Channel2); - declare!(BDMA_Channel3); - declare!(BDMA_Channel4); - declare!(BDMA_Channel5); - declare!(BDMA_Channel6); - declare!(BDMA_Channel7); - declare!(CEC); - declare!(CM4_SEV); - declare!(CM7_SEV); - declare!(CRS); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(ECC); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HOLD_CORE); - declare!(HRTIM1_FLT); - declare!(HRTIM1_Master); - declare!(HRTIM1_TIMA); - declare!(HRTIM1_TIMB); - declare!(HRTIM1_TIMC); - declare!(HRTIM1_TIMD); - declare!(HRTIM1_TIME); - declare!(HSEM1); - declare!(HSEM2); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(JPEG); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPTIM4); - declare!(LPTIM5); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OTG_FS); - declare!(OTG_FS_EP1_IN); - declare!(OTG_FS_EP1_OUT); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_AVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SAI3); - declare!(SAI4); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn ADC3(); - fn BDMA_Channel0(); - fn BDMA_Channel1(); - fn BDMA_Channel2(); - fn BDMA_Channel3(); - fn BDMA_Channel4(); - fn BDMA_Channel5(); - fn BDMA_Channel6(); - fn BDMA_Channel7(); - fn CEC(); - fn CM4_SEV(); - fn CM7_SEV(); - fn CRS(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn ECC(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HOLD_CORE(); - fn HRTIM1_FLT(); - fn HRTIM1_Master(); - fn HRTIM1_TIMA(); - fn HRTIM1_TIMB(); - fn HRTIM1_TIMC(); - fn HRTIM1_TIMD(); - fn HRTIM1_TIME(); - fn HSEM1(); - fn HSEM2(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn JPEG(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPTIM4(); - fn LPTIM5(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OTG_FS(); - fn OTG_FS_EP1_IN(); - fn OTG_FS_EP1_OUT(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_AVD(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SAI3(); - fn SAI4(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 150] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_AVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { _handler: CM7_SEV }, - Vector { _handler: CM4_SEV }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: QUADSPI }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { - _handler: OTG_FS_EP1_OUT, - }, - Vector { - _handler: OTG_FS_EP1_IN, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { _handler: OTG_FS }, - Vector { _reserved: 0 }, - Vector { - _handler: HRTIM1_Master, - }, - Vector { - _handler: HRTIM1_TIMA, - }, - Vector { - _handler: HRTIM1_TIMB, - }, - Vector { - _handler: HRTIM1_TIMC, - }, - Vector { - _handler: HRTIM1_TIMD, - }, - Vector { - _handler: HRTIM1_TIME, - }, - Vector { - _handler: HRTIM1_FLT, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SAI3 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _handler: JPEG }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _handler: HSEM2 }, - Vector { _handler: ADC3 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA_Channel0, - }, - Vector { - _handler: BDMA_Channel1, - }, - Vector { - _handler: BDMA_Channel2, - }, - Vector { - _handler: BDMA_Channel3, - }, - Vector { - _handler: BDMA_Channel4, - }, - Vector { - _handler: BDMA_Channel5, - }, - Vector { - _handler: BDMA_Channel6, - }, - Vector { - _handler: BDMA_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: LPTIM4 }, - Vector { _handler: LPTIM5 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _handler: SAI4 }, - Vector { _reserved: 0 }, - Vector { - _handler: HOLD_CORE, - }, - Vector { - _handler: WAKEUP_PIN, - }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -impl_rng!(0x48021800); -impl_sdmmc!(SDMMC1, 0x52007000); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -impl_sdmmc!(SDMMC2, 0x48022400); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); diff --git a/embassy-stm32/src/chip/stm32h745zg.rs b/embassy-stm32/src/chip/stm32h745zg.rs deleted file mode 100644 index c6f4316a..00000000 --- a/embassy-stm32/src/chip/stm32h745zg.rs +++ /dev/null @@ -1,915 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, ADC3, BDMA, COMP1, COMP2, DAC1, DCMI, DMA2D, ETH, FDCAN1, - FDCAN2, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, - PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, - PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, - PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, - PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, - PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, - PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, - PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, - PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, PJ10, PJ11, PJ12, - PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, PK11, PK12, PK13, - PK14, PK15, I2C1, I2C2, I2C3, I2C4, IWDG1, IWDG2, JPEG, LPTIM1, LPTIM2, LPTIM3, LPTIM4, LPTIM5, - LPUART1, LTDC, MDIOS, MDMA, OPAMP1, OPAMP2, PWR, QUADSPI, RCC, RNG, RTC, SAI1, SAI2, SAI3, - SAI4, SDMMC1, SDMMC2, SPI1, SPI2, SPI3, SPI4, SPI5, SPI6, SWPMI1, SYSCFG, TIM1, TIM12, TIM13, - TIM14, TIM15, TIM16, TIM17, TIM2, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, UART4, UART5, UART7, - UART8, USART1, USART2, USART3, USART6, USB_OTG_FS, USB_OTG_HS, VREFBUF, WWDG1, WWDG2 -); -pub const GPIO_BASE: usize = 0x58020000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC = 18, - ADC3 = 127, - BDMA_Channel0 = 129, - BDMA_Channel1 = 130, - BDMA_Channel2 = 131, - BDMA_Channel3 = 132, - BDMA_Channel4 = 133, - BDMA_Channel5 = 134, - BDMA_Channel6 = 135, - BDMA_Channel7 = 136, - CEC = 94, - CM4_SEV = 65, - CM7_SEV = 64, - CRS = 144, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - ECC = 145, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - HOLD_CORE = 148, - HRTIM1_FLT = 109, - HRTIM1_Master = 103, - HRTIM1_TIMA = 104, - HRTIM1_TIMB = 105, - HRTIM1_TIMC = 106, - HRTIM1_TIMD = 107, - HRTIM1_TIME = 108, - HSEM1 = 125, - HSEM2 = 126, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - JPEG = 121, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPTIM4 = 140, - LPTIM5 = 141, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OTG_FS = 101, - OTG_FS_EP1_IN = 99, - OTG_FS_EP1_OUT = 98, - OTG_FS_WKUP = 100, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_AVD = 1, - QUADSPI = 92, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SAI3 = 114, - SAI4 = 146, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TAMP_STAMP = 2, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(ADC3); - declare!(BDMA_Channel0); - declare!(BDMA_Channel1); - declare!(BDMA_Channel2); - declare!(BDMA_Channel3); - declare!(BDMA_Channel4); - declare!(BDMA_Channel5); - declare!(BDMA_Channel6); - declare!(BDMA_Channel7); - declare!(CEC); - declare!(CM4_SEV); - declare!(CM7_SEV); - declare!(CRS); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(ECC); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HOLD_CORE); - declare!(HRTIM1_FLT); - declare!(HRTIM1_Master); - declare!(HRTIM1_TIMA); - declare!(HRTIM1_TIMB); - declare!(HRTIM1_TIMC); - declare!(HRTIM1_TIMD); - declare!(HRTIM1_TIME); - declare!(HSEM1); - declare!(HSEM2); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(JPEG); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPTIM4); - declare!(LPTIM5); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OTG_FS); - declare!(OTG_FS_EP1_IN); - declare!(OTG_FS_EP1_OUT); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_AVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SAI3); - declare!(SAI4); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn ADC3(); - fn BDMA_Channel0(); - fn BDMA_Channel1(); - fn BDMA_Channel2(); - fn BDMA_Channel3(); - fn BDMA_Channel4(); - fn BDMA_Channel5(); - fn BDMA_Channel6(); - fn BDMA_Channel7(); - fn CEC(); - fn CM4_SEV(); - fn CM7_SEV(); - fn CRS(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn ECC(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HOLD_CORE(); - fn HRTIM1_FLT(); - fn HRTIM1_Master(); - fn HRTIM1_TIMA(); - fn HRTIM1_TIMB(); - fn HRTIM1_TIMC(); - fn HRTIM1_TIMD(); - fn HRTIM1_TIME(); - fn HSEM1(); - fn HSEM2(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn JPEG(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPTIM4(); - fn LPTIM5(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OTG_FS(); - fn OTG_FS_EP1_IN(); - fn OTG_FS_EP1_OUT(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_AVD(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SAI3(); - fn SAI4(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 150] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_AVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { _handler: CM7_SEV }, - Vector { _handler: CM4_SEV }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: QUADSPI }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { - _handler: OTG_FS_EP1_OUT, - }, - Vector { - _handler: OTG_FS_EP1_IN, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { _handler: OTG_FS }, - Vector { _reserved: 0 }, - Vector { - _handler: HRTIM1_Master, - }, - Vector { - _handler: HRTIM1_TIMA, - }, - Vector { - _handler: HRTIM1_TIMB, - }, - Vector { - _handler: HRTIM1_TIMC, - }, - Vector { - _handler: HRTIM1_TIMD, - }, - Vector { - _handler: HRTIM1_TIME, - }, - Vector { - _handler: HRTIM1_FLT, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SAI3 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _handler: JPEG }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _handler: HSEM2 }, - Vector { _handler: ADC3 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA_Channel0, - }, - Vector { - _handler: BDMA_Channel1, - }, - Vector { - _handler: BDMA_Channel2, - }, - Vector { - _handler: BDMA_Channel3, - }, - Vector { - _handler: BDMA_Channel4, - }, - Vector { - _handler: BDMA_Channel5, - }, - Vector { - _handler: BDMA_Channel6, - }, - Vector { - _handler: BDMA_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: LPTIM4 }, - Vector { _handler: LPTIM5 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _handler: SAI4 }, - Vector { _reserved: 0 }, - Vector { - _handler: HOLD_CORE, - }, - Vector { - _handler: WAKEUP_PIN, - }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -impl_rng!(0x48021800); -impl_sdmmc!(SDMMC1, 0x52007000); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -impl_sdmmc!(SDMMC2, 0x48022400); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); diff --git a/embassy-stm32/src/chip/stm32h745zi.rs b/embassy-stm32/src/chip/stm32h745zi.rs deleted file mode 100644 index c6f4316a..00000000 --- a/embassy-stm32/src/chip/stm32h745zi.rs +++ /dev/null @@ -1,915 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, ADC3, BDMA, COMP1, COMP2, DAC1, DCMI, DMA2D, ETH, FDCAN1, - FDCAN2, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, - PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, - PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, - PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, - PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, - PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, - PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, - PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, - PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, PJ10, PJ11, PJ12, - PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, PK11, PK12, PK13, - PK14, PK15, I2C1, I2C2, I2C3, I2C4, IWDG1, IWDG2, JPEG, LPTIM1, LPTIM2, LPTIM3, LPTIM4, LPTIM5, - LPUART1, LTDC, MDIOS, MDMA, OPAMP1, OPAMP2, PWR, QUADSPI, RCC, RNG, RTC, SAI1, SAI2, SAI3, - SAI4, SDMMC1, SDMMC2, SPI1, SPI2, SPI3, SPI4, SPI5, SPI6, SWPMI1, SYSCFG, TIM1, TIM12, TIM13, - TIM14, TIM15, TIM16, TIM17, TIM2, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, UART4, UART5, UART7, - UART8, USART1, USART2, USART3, USART6, USB_OTG_FS, USB_OTG_HS, VREFBUF, WWDG1, WWDG2 -); -pub const GPIO_BASE: usize = 0x58020000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC = 18, - ADC3 = 127, - BDMA_Channel0 = 129, - BDMA_Channel1 = 130, - BDMA_Channel2 = 131, - BDMA_Channel3 = 132, - BDMA_Channel4 = 133, - BDMA_Channel5 = 134, - BDMA_Channel6 = 135, - BDMA_Channel7 = 136, - CEC = 94, - CM4_SEV = 65, - CM7_SEV = 64, - CRS = 144, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - ECC = 145, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - HOLD_CORE = 148, - HRTIM1_FLT = 109, - HRTIM1_Master = 103, - HRTIM1_TIMA = 104, - HRTIM1_TIMB = 105, - HRTIM1_TIMC = 106, - HRTIM1_TIMD = 107, - HRTIM1_TIME = 108, - HSEM1 = 125, - HSEM2 = 126, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - JPEG = 121, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPTIM4 = 140, - LPTIM5 = 141, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OTG_FS = 101, - OTG_FS_EP1_IN = 99, - OTG_FS_EP1_OUT = 98, - OTG_FS_WKUP = 100, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_AVD = 1, - QUADSPI = 92, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SAI3 = 114, - SAI4 = 146, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TAMP_STAMP = 2, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(ADC3); - declare!(BDMA_Channel0); - declare!(BDMA_Channel1); - declare!(BDMA_Channel2); - declare!(BDMA_Channel3); - declare!(BDMA_Channel4); - declare!(BDMA_Channel5); - declare!(BDMA_Channel6); - declare!(BDMA_Channel7); - declare!(CEC); - declare!(CM4_SEV); - declare!(CM7_SEV); - declare!(CRS); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(ECC); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HOLD_CORE); - declare!(HRTIM1_FLT); - declare!(HRTIM1_Master); - declare!(HRTIM1_TIMA); - declare!(HRTIM1_TIMB); - declare!(HRTIM1_TIMC); - declare!(HRTIM1_TIMD); - declare!(HRTIM1_TIME); - declare!(HSEM1); - declare!(HSEM2); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(JPEG); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPTIM4); - declare!(LPTIM5); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OTG_FS); - declare!(OTG_FS_EP1_IN); - declare!(OTG_FS_EP1_OUT); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_AVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SAI3); - declare!(SAI4); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn ADC3(); - fn BDMA_Channel0(); - fn BDMA_Channel1(); - fn BDMA_Channel2(); - fn BDMA_Channel3(); - fn BDMA_Channel4(); - fn BDMA_Channel5(); - fn BDMA_Channel6(); - fn BDMA_Channel7(); - fn CEC(); - fn CM4_SEV(); - fn CM7_SEV(); - fn CRS(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn ECC(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HOLD_CORE(); - fn HRTIM1_FLT(); - fn HRTIM1_Master(); - fn HRTIM1_TIMA(); - fn HRTIM1_TIMB(); - fn HRTIM1_TIMC(); - fn HRTIM1_TIMD(); - fn HRTIM1_TIME(); - fn HSEM1(); - fn HSEM2(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn JPEG(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPTIM4(); - fn LPTIM5(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OTG_FS(); - fn OTG_FS_EP1_IN(); - fn OTG_FS_EP1_OUT(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_AVD(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SAI3(); - fn SAI4(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 150] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_AVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { _handler: CM7_SEV }, - Vector { _handler: CM4_SEV }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: QUADSPI }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { - _handler: OTG_FS_EP1_OUT, - }, - Vector { - _handler: OTG_FS_EP1_IN, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { _handler: OTG_FS }, - Vector { _reserved: 0 }, - Vector { - _handler: HRTIM1_Master, - }, - Vector { - _handler: HRTIM1_TIMA, - }, - Vector { - _handler: HRTIM1_TIMB, - }, - Vector { - _handler: HRTIM1_TIMC, - }, - Vector { - _handler: HRTIM1_TIMD, - }, - Vector { - _handler: HRTIM1_TIME, - }, - Vector { - _handler: HRTIM1_FLT, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SAI3 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _handler: JPEG }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _handler: HSEM2 }, - Vector { _handler: ADC3 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA_Channel0, - }, - Vector { - _handler: BDMA_Channel1, - }, - Vector { - _handler: BDMA_Channel2, - }, - Vector { - _handler: BDMA_Channel3, - }, - Vector { - _handler: BDMA_Channel4, - }, - Vector { - _handler: BDMA_Channel5, - }, - Vector { - _handler: BDMA_Channel6, - }, - Vector { - _handler: BDMA_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: LPTIM4 }, - Vector { _handler: LPTIM5 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _handler: SAI4 }, - Vector { _reserved: 0 }, - Vector { - _handler: HOLD_CORE, - }, - Vector { - _handler: WAKEUP_PIN, - }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -impl_rng!(0x48021800); -impl_sdmmc!(SDMMC1, 0x52007000); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -impl_sdmmc!(SDMMC2, 0x48022400); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); diff --git a/embassy-stm32/src/chip/stm32h747ag.rs b/embassy-stm32/src/chip/stm32h747ag.rs deleted file mode 100644 index 48827a95..00000000 --- a/embassy-stm32/src/chip/stm32h747ag.rs +++ /dev/null @@ -1,918 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, ADC3, BDMA, COMP1, COMP2, DAC1, DCMI, DMA2D, ETH, FDCAN1, - FDCAN2, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, - PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, - PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, - PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, - PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, - PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, - PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, - PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, - PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, PJ10, PJ11, PJ12, - PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, PK11, PK12, PK13, - PK14, PK15, I2C1, I2C2, I2C3, I2C4, IWDG1, IWDG2, JPEG, LPTIM1, LPTIM2, LPTIM3, LPTIM4, LPTIM5, - LPUART1, LTDC, MDIOS, MDMA, OPAMP1, OPAMP2, PWR, QUADSPI, RCC, RNG, RTC, SAI1, SAI2, SAI3, - SAI4, SDMMC1, SDMMC2, SPI1, SPI2, SPI3, SPI4, SPI5, SPI6, SWPMI1, SYSCFG, TIM1, TIM12, TIM13, - TIM14, TIM15, TIM16, TIM17, TIM2, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, UART4, UART5, UART7, - UART8, USART1, USART2, USART3, USART6, USB_OTG_FS, USB_OTG_HS, VREFBUF, WWDG1, WWDG2 -); -pub const GPIO_BASE: usize = 0x58020000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC = 18, - ADC3 = 127, - BDMA_Channel0 = 129, - BDMA_Channel1 = 130, - BDMA_Channel2 = 131, - BDMA_Channel3 = 132, - BDMA_Channel4 = 133, - BDMA_Channel5 = 134, - BDMA_Channel6 = 135, - BDMA_Channel7 = 136, - CEC = 94, - CM4_SEV = 65, - CM7_SEV = 64, - CRS = 144, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - DSI = 123, - ECC = 145, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - HOLD_CORE = 148, - HRTIM1_FLT = 109, - HRTIM1_Master = 103, - HRTIM1_TIMA = 104, - HRTIM1_TIMB = 105, - HRTIM1_TIMC = 106, - HRTIM1_TIMD = 107, - HRTIM1_TIME = 108, - HSEM1 = 125, - HSEM2 = 126, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - JPEG = 121, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPTIM4 = 140, - LPTIM5 = 141, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OTG_FS = 101, - OTG_FS_EP1_IN = 99, - OTG_FS_EP1_OUT = 98, - OTG_FS_WKUP = 100, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_AVD = 1, - QUADSPI = 92, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SAI3 = 114, - SAI4 = 146, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TAMP_STAMP = 2, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(ADC3); - declare!(BDMA_Channel0); - declare!(BDMA_Channel1); - declare!(BDMA_Channel2); - declare!(BDMA_Channel3); - declare!(BDMA_Channel4); - declare!(BDMA_Channel5); - declare!(BDMA_Channel6); - declare!(BDMA_Channel7); - declare!(CEC); - declare!(CM4_SEV); - declare!(CM7_SEV); - declare!(CRS); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(DSI); - declare!(ECC); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HOLD_CORE); - declare!(HRTIM1_FLT); - declare!(HRTIM1_Master); - declare!(HRTIM1_TIMA); - declare!(HRTIM1_TIMB); - declare!(HRTIM1_TIMC); - declare!(HRTIM1_TIMD); - declare!(HRTIM1_TIME); - declare!(HSEM1); - declare!(HSEM2); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(JPEG); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPTIM4); - declare!(LPTIM5); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OTG_FS); - declare!(OTG_FS_EP1_IN); - declare!(OTG_FS_EP1_OUT); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_AVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SAI3); - declare!(SAI4); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn ADC3(); - fn BDMA_Channel0(); - fn BDMA_Channel1(); - fn BDMA_Channel2(); - fn BDMA_Channel3(); - fn BDMA_Channel4(); - fn BDMA_Channel5(); - fn BDMA_Channel6(); - fn BDMA_Channel7(); - fn CEC(); - fn CM4_SEV(); - fn CM7_SEV(); - fn CRS(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn DSI(); - fn ECC(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HOLD_CORE(); - fn HRTIM1_FLT(); - fn HRTIM1_Master(); - fn HRTIM1_TIMA(); - fn HRTIM1_TIMB(); - fn HRTIM1_TIMC(); - fn HRTIM1_TIMD(); - fn HRTIM1_TIME(); - fn HSEM1(); - fn HSEM2(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn JPEG(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPTIM4(); - fn LPTIM5(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OTG_FS(); - fn OTG_FS_EP1_IN(); - fn OTG_FS_EP1_OUT(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_AVD(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SAI3(); - fn SAI4(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 150] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_AVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { _handler: CM7_SEV }, - Vector { _handler: CM4_SEV }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: QUADSPI }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { - _handler: OTG_FS_EP1_OUT, - }, - Vector { - _handler: OTG_FS_EP1_IN, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { _handler: OTG_FS }, - Vector { _reserved: 0 }, - Vector { - _handler: HRTIM1_Master, - }, - Vector { - _handler: HRTIM1_TIMA, - }, - Vector { - _handler: HRTIM1_TIMB, - }, - Vector { - _handler: HRTIM1_TIMC, - }, - Vector { - _handler: HRTIM1_TIMD, - }, - Vector { - _handler: HRTIM1_TIME, - }, - Vector { - _handler: HRTIM1_FLT, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SAI3 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _handler: JPEG }, - Vector { _handler: MDMA }, - Vector { _handler: DSI }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _handler: HSEM2 }, - Vector { _handler: ADC3 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA_Channel0, - }, - Vector { - _handler: BDMA_Channel1, - }, - Vector { - _handler: BDMA_Channel2, - }, - Vector { - _handler: BDMA_Channel3, - }, - Vector { - _handler: BDMA_Channel4, - }, - Vector { - _handler: BDMA_Channel5, - }, - Vector { - _handler: BDMA_Channel6, - }, - Vector { - _handler: BDMA_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: LPTIM4 }, - Vector { _handler: LPTIM5 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _handler: SAI4 }, - Vector { _reserved: 0 }, - Vector { - _handler: HOLD_CORE, - }, - Vector { - _handler: WAKEUP_PIN, - }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -impl_rng!(0x48021800); -impl_sdmmc!(SDMMC1, 0x52007000); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -impl_sdmmc!(SDMMC2, 0x48022400); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); diff --git a/embassy-stm32/src/chip/stm32h747ai.rs b/embassy-stm32/src/chip/stm32h747ai.rs deleted file mode 100644 index 48827a95..00000000 --- a/embassy-stm32/src/chip/stm32h747ai.rs +++ /dev/null @@ -1,918 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, ADC3, BDMA, COMP1, COMP2, DAC1, DCMI, DMA2D, ETH, FDCAN1, - FDCAN2, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, - PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, - PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, - PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, - PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, - PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, - PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, - PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, - PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, PJ10, PJ11, PJ12, - PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, PK11, PK12, PK13, - PK14, PK15, I2C1, I2C2, I2C3, I2C4, IWDG1, IWDG2, JPEG, LPTIM1, LPTIM2, LPTIM3, LPTIM4, LPTIM5, - LPUART1, LTDC, MDIOS, MDMA, OPAMP1, OPAMP2, PWR, QUADSPI, RCC, RNG, RTC, SAI1, SAI2, SAI3, - SAI4, SDMMC1, SDMMC2, SPI1, SPI2, SPI3, SPI4, SPI5, SPI6, SWPMI1, SYSCFG, TIM1, TIM12, TIM13, - TIM14, TIM15, TIM16, TIM17, TIM2, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, UART4, UART5, UART7, - UART8, USART1, USART2, USART3, USART6, USB_OTG_FS, USB_OTG_HS, VREFBUF, WWDG1, WWDG2 -); -pub const GPIO_BASE: usize = 0x58020000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC = 18, - ADC3 = 127, - BDMA_Channel0 = 129, - BDMA_Channel1 = 130, - BDMA_Channel2 = 131, - BDMA_Channel3 = 132, - BDMA_Channel4 = 133, - BDMA_Channel5 = 134, - BDMA_Channel6 = 135, - BDMA_Channel7 = 136, - CEC = 94, - CM4_SEV = 65, - CM7_SEV = 64, - CRS = 144, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - DSI = 123, - ECC = 145, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - HOLD_CORE = 148, - HRTIM1_FLT = 109, - HRTIM1_Master = 103, - HRTIM1_TIMA = 104, - HRTIM1_TIMB = 105, - HRTIM1_TIMC = 106, - HRTIM1_TIMD = 107, - HRTIM1_TIME = 108, - HSEM1 = 125, - HSEM2 = 126, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - JPEG = 121, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPTIM4 = 140, - LPTIM5 = 141, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OTG_FS = 101, - OTG_FS_EP1_IN = 99, - OTG_FS_EP1_OUT = 98, - OTG_FS_WKUP = 100, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_AVD = 1, - QUADSPI = 92, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SAI3 = 114, - SAI4 = 146, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TAMP_STAMP = 2, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(ADC3); - declare!(BDMA_Channel0); - declare!(BDMA_Channel1); - declare!(BDMA_Channel2); - declare!(BDMA_Channel3); - declare!(BDMA_Channel4); - declare!(BDMA_Channel5); - declare!(BDMA_Channel6); - declare!(BDMA_Channel7); - declare!(CEC); - declare!(CM4_SEV); - declare!(CM7_SEV); - declare!(CRS); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(DSI); - declare!(ECC); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HOLD_CORE); - declare!(HRTIM1_FLT); - declare!(HRTIM1_Master); - declare!(HRTIM1_TIMA); - declare!(HRTIM1_TIMB); - declare!(HRTIM1_TIMC); - declare!(HRTIM1_TIMD); - declare!(HRTIM1_TIME); - declare!(HSEM1); - declare!(HSEM2); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(JPEG); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPTIM4); - declare!(LPTIM5); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OTG_FS); - declare!(OTG_FS_EP1_IN); - declare!(OTG_FS_EP1_OUT); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_AVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SAI3); - declare!(SAI4); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn ADC3(); - fn BDMA_Channel0(); - fn BDMA_Channel1(); - fn BDMA_Channel2(); - fn BDMA_Channel3(); - fn BDMA_Channel4(); - fn BDMA_Channel5(); - fn BDMA_Channel6(); - fn BDMA_Channel7(); - fn CEC(); - fn CM4_SEV(); - fn CM7_SEV(); - fn CRS(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn DSI(); - fn ECC(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HOLD_CORE(); - fn HRTIM1_FLT(); - fn HRTIM1_Master(); - fn HRTIM1_TIMA(); - fn HRTIM1_TIMB(); - fn HRTIM1_TIMC(); - fn HRTIM1_TIMD(); - fn HRTIM1_TIME(); - fn HSEM1(); - fn HSEM2(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn JPEG(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPTIM4(); - fn LPTIM5(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OTG_FS(); - fn OTG_FS_EP1_IN(); - fn OTG_FS_EP1_OUT(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_AVD(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SAI3(); - fn SAI4(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 150] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_AVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { _handler: CM7_SEV }, - Vector { _handler: CM4_SEV }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: QUADSPI }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { - _handler: OTG_FS_EP1_OUT, - }, - Vector { - _handler: OTG_FS_EP1_IN, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { _handler: OTG_FS }, - Vector { _reserved: 0 }, - Vector { - _handler: HRTIM1_Master, - }, - Vector { - _handler: HRTIM1_TIMA, - }, - Vector { - _handler: HRTIM1_TIMB, - }, - Vector { - _handler: HRTIM1_TIMC, - }, - Vector { - _handler: HRTIM1_TIMD, - }, - Vector { - _handler: HRTIM1_TIME, - }, - Vector { - _handler: HRTIM1_FLT, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SAI3 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _handler: JPEG }, - Vector { _handler: MDMA }, - Vector { _handler: DSI }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _handler: HSEM2 }, - Vector { _handler: ADC3 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA_Channel0, - }, - Vector { - _handler: BDMA_Channel1, - }, - Vector { - _handler: BDMA_Channel2, - }, - Vector { - _handler: BDMA_Channel3, - }, - Vector { - _handler: BDMA_Channel4, - }, - Vector { - _handler: BDMA_Channel5, - }, - Vector { - _handler: BDMA_Channel6, - }, - Vector { - _handler: BDMA_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: LPTIM4 }, - Vector { _handler: LPTIM5 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _handler: SAI4 }, - Vector { _reserved: 0 }, - Vector { - _handler: HOLD_CORE, - }, - Vector { - _handler: WAKEUP_PIN, - }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -impl_rng!(0x48021800); -impl_sdmmc!(SDMMC1, 0x52007000); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -impl_sdmmc!(SDMMC2, 0x48022400); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); diff --git a/embassy-stm32/src/chip/stm32h747bg.rs b/embassy-stm32/src/chip/stm32h747bg.rs deleted file mode 100644 index 48827a95..00000000 --- a/embassy-stm32/src/chip/stm32h747bg.rs +++ /dev/null @@ -1,918 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, ADC3, BDMA, COMP1, COMP2, DAC1, DCMI, DMA2D, ETH, FDCAN1, - FDCAN2, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, - PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, - PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, - PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, - PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, - PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, - PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, - PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, - PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, PJ10, PJ11, PJ12, - PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, PK11, PK12, PK13, - PK14, PK15, I2C1, I2C2, I2C3, I2C4, IWDG1, IWDG2, JPEG, LPTIM1, LPTIM2, LPTIM3, LPTIM4, LPTIM5, - LPUART1, LTDC, MDIOS, MDMA, OPAMP1, OPAMP2, PWR, QUADSPI, RCC, RNG, RTC, SAI1, SAI2, SAI3, - SAI4, SDMMC1, SDMMC2, SPI1, SPI2, SPI3, SPI4, SPI5, SPI6, SWPMI1, SYSCFG, TIM1, TIM12, TIM13, - TIM14, TIM15, TIM16, TIM17, TIM2, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, UART4, UART5, UART7, - UART8, USART1, USART2, USART3, USART6, USB_OTG_FS, USB_OTG_HS, VREFBUF, WWDG1, WWDG2 -); -pub const GPIO_BASE: usize = 0x58020000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC = 18, - ADC3 = 127, - BDMA_Channel0 = 129, - BDMA_Channel1 = 130, - BDMA_Channel2 = 131, - BDMA_Channel3 = 132, - BDMA_Channel4 = 133, - BDMA_Channel5 = 134, - BDMA_Channel6 = 135, - BDMA_Channel7 = 136, - CEC = 94, - CM4_SEV = 65, - CM7_SEV = 64, - CRS = 144, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - DSI = 123, - ECC = 145, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - HOLD_CORE = 148, - HRTIM1_FLT = 109, - HRTIM1_Master = 103, - HRTIM1_TIMA = 104, - HRTIM1_TIMB = 105, - HRTIM1_TIMC = 106, - HRTIM1_TIMD = 107, - HRTIM1_TIME = 108, - HSEM1 = 125, - HSEM2 = 126, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - JPEG = 121, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPTIM4 = 140, - LPTIM5 = 141, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OTG_FS = 101, - OTG_FS_EP1_IN = 99, - OTG_FS_EP1_OUT = 98, - OTG_FS_WKUP = 100, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_AVD = 1, - QUADSPI = 92, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SAI3 = 114, - SAI4 = 146, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TAMP_STAMP = 2, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(ADC3); - declare!(BDMA_Channel0); - declare!(BDMA_Channel1); - declare!(BDMA_Channel2); - declare!(BDMA_Channel3); - declare!(BDMA_Channel4); - declare!(BDMA_Channel5); - declare!(BDMA_Channel6); - declare!(BDMA_Channel7); - declare!(CEC); - declare!(CM4_SEV); - declare!(CM7_SEV); - declare!(CRS); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(DSI); - declare!(ECC); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HOLD_CORE); - declare!(HRTIM1_FLT); - declare!(HRTIM1_Master); - declare!(HRTIM1_TIMA); - declare!(HRTIM1_TIMB); - declare!(HRTIM1_TIMC); - declare!(HRTIM1_TIMD); - declare!(HRTIM1_TIME); - declare!(HSEM1); - declare!(HSEM2); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(JPEG); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPTIM4); - declare!(LPTIM5); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OTG_FS); - declare!(OTG_FS_EP1_IN); - declare!(OTG_FS_EP1_OUT); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_AVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SAI3); - declare!(SAI4); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn ADC3(); - fn BDMA_Channel0(); - fn BDMA_Channel1(); - fn BDMA_Channel2(); - fn BDMA_Channel3(); - fn BDMA_Channel4(); - fn BDMA_Channel5(); - fn BDMA_Channel6(); - fn BDMA_Channel7(); - fn CEC(); - fn CM4_SEV(); - fn CM7_SEV(); - fn CRS(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn DSI(); - fn ECC(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HOLD_CORE(); - fn HRTIM1_FLT(); - fn HRTIM1_Master(); - fn HRTIM1_TIMA(); - fn HRTIM1_TIMB(); - fn HRTIM1_TIMC(); - fn HRTIM1_TIMD(); - fn HRTIM1_TIME(); - fn HSEM1(); - fn HSEM2(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn JPEG(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPTIM4(); - fn LPTIM5(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OTG_FS(); - fn OTG_FS_EP1_IN(); - fn OTG_FS_EP1_OUT(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_AVD(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SAI3(); - fn SAI4(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 150] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_AVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { _handler: CM7_SEV }, - Vector { _handler: CM4_SEV }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: QUADSPI }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { - _handler: OTG_FS_EP1_OUT, - }, - Vector { - _handler: OTG_FS_EP1_IN, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { _handler: OTG_FS }, - Vector { _reserved: 0 }, - Vector { - _handler: HRTIM1_Master, - }, - Vector { - _handler: HRTIM1_TIMA, - }, - Vector { - _handler: HRTIM1_TIMB, - }, - Vector { - _handler: HRTIM1_TIMC, - }, - Vector { - _handler: HRTIM1_TIMD, - }, - Vector { - _handler: HRTIM1_TIME, - }, - Vector { - _handler: HRTIM1_FLT, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SAI3 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _handler: JPEG }, - Vector { _handler: MDMA }, - Vector { _handler: DSI }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _handler: HSEM2 }, - Vector { _handler: ADC3 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA_Channel0, - }, - Vector { - _handler: BDMA_Channel1, - }, - Vector { - _handler: BDMA_Channel2, - }, - Vector { - _handler: BDMA_Channel3, - }, - Vector { - _handler: BDMA_Channel4, - }, - Vector { - _handler: BDMA_Channel5, - }, - Vector { - _handler: BDMA_Channel6, - }, - Vector { - _handler: BDMA_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: LPTIM4 }, - Vector { _handler: LPTIM5 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _handler: SAI4 }, - Vector { _reserved: 0 }, - Vector { - _handler: HOLD_CORE, - }, - Vector { - _handler: WAKEUP_PIN, - }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -impl_rng!(0x48021800); -impl_sdmmc!(SDMMC1, 0x52007000); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -impl_sdmmc!(SDMMC2, 0x48022400); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); diff --git a/embassy-stm32/src/chip/stm32h747bi.rs b/embassy-stm32/src/chip/stm32h747bi.rs deleted file mode 100644 index 48827a95..00000000 --- a/embassy-stm32/src/chip/stm32h747bi.rs +++ /dev/null @@ -1,918 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, ADC3, BDMA, COMP1, COMP2, DAC1, DCMI, DMA2D, ETH, FDCAN1, - FDCAN2, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, - PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, - PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, - PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, - PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, - PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, - PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, - PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, - PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, PJ10, PJ11, PJ12, - PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, PK11, PK12, PK13, - PK14, PK15, I2C1, I2C2, I2C3, I2C4, IWDG1, IWDG2, JPEG, LPTIM1, LPTIM2, LPTIM3, LPTIM4, LPTIM5, - LPUART1, LTDC, MDIOS, MDMA, OPAMP1, OPAMP2, PWR, QUADSPI, RCC, RNG, RTC, SAI1, SAI2, SAI3, - SAI4, SDMMC1, SDMMC2, SPI1, SPI2, SPI3, SPI4, SPI5, SPI6, SWPMI1, SYSCFG, TIM1, TIM12, TIM13, - TIM14, TIM15, TIM16, TIM17, TIM2, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, UART4, UART5, UART7, - UART8, USART1, USART2, USART3, USART6, USB_OTG_FS, USB_OTG_HS, VREFBUF, WWDG1, WWDG2 -); -pub const GPIO_BASE: usize = 0x58020000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC = 18, - ADC3 = 127, - BDMA_Channel0 = 129, - BDMA_Channel1 = 130, - BDMA_Channel2 = 131, - BDMA_Channel3 = 132, - BDMA_Channel4 = 133, - BDMA_Channel5 = 134, - BDMA_Channel6 = 135, - BDMA_Channel7 = 136, - CEC = 94, - CM4_SEV = 65, - CM7_SEV = 64, - CRS = 144, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - DSI = 123, - ECC = 145, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - HOLD_CORE = 148, - HRTIM1_FLT = 109, - HRTIM1_Master = 103, - HRTIM1_TIMA = 104, - HRTIM1_TIMB = 105, - HRTIM1_TIMC = 106, - HRTIM1_TIMD = 107, - HRTIM1_TIME = 108, - HSEM1 = 125, - HSEM2 = 126, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - JPEG = 121, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPTIM4 = 140, - LPTIM5 = 141, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OTG_FS = 101, - OTG_FS_EP1_IN = 99, - OTG_FS_EP1_OUT = 98, - OTG_FS_WKUP = 100, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_AVD = 1, - QUADSPI = 92, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SAI3 = 114, - SAI4 = 146, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TAMP_STAMP = 2, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(ADC3); - declare!(BDMA_Channel0); - declare!(BDMA_Channel1); - declare!(BDMA_Channel2); - declare!(BDMA_Channel3); - declare!(BDMA_Channel4); - declare!(BDMA_Channel5); - declare!(BDMA_Channel6); - declare!(BDMA_Channel7); - declare!(CEC); - declare!(CM4_SEV); - declare!(CM7_SEV); - declare!(CRS); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(DSI); - declare!(ECC); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HOLD_CORE); - declare!(HRTIM1_FLT); - declare!(HRTIM1_Master); - declare!(HRTIM1_TIMA); - declare!(HRTIM1_TIMB); - declare!(HRTIM1_TIMC); - declare!(HRTIM1_TIMD); - declare!(HRTIM1_TIME); - declare!(HSEM1); - declare!(HSEM2); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(JPEG); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPTIM4); - declare!(LPTIM5); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OTG_FS); - declare!(OTG_FS_EP1_IN); - declare!(OTG_FS_EP1_OUT); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_AVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SAI3); - declare!(SAI4); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn ADC3(); - fn BDMA_Channel0(); - fn BDMA_Channel1(); - fn BDMA_Channel2(); - fn BDMA_Channel3(); - fn BDMA_Channel4(); - fn BDMA_Channel5(); - fn BDMA_Channel6(); - fn BDMA_Channel7(); - fn CEC(); - fn CM4_SEV(); - fn CM7_SEV(); - fn CRS(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn DSI(); - fn ECC(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HOLD_CORE(); - fn HRTIM1_FLT(); - fn HRTIM1_Master(); - fn HRTIM1_TIMA(); - fn HRTIM1_TIMB(); - fn HRTIM1_TIMC(); - fn HRTIM1_TIMD(); - fn HRTIM1_TIME(); - fn HSEM1(); - fn HSEM2(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn JPEG(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPTIM4(); - fn LPTIM5(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OTG_FS(); - fn OTG_FS_EP1_IN(); - fn OTG_FS_EP1_OUT(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_AVD(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SAI3(); - fn SAI4(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 150] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_AVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { _handler: CM7_SEV }, - Vector { _handler: CM4_SEV }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: QUADSPI }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { - _handler: OTG_FS_EP1_OUT, - }, - Vector { - _handler: OTG_FS_EP1_IN, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { _handler: OTG_FS }, - Vector { _reserved: 0 }, - Vector { - _handler: HRTIM1_Master, - }, - Vector { - _handler: HRTIM1_TIMA, - }, - Vector { - _handler: HRTIM1_TIMB, - }, - Vector { - _handler: HRTIM1_TIMC, - }, - Vector { - _handler: HRTIM1_TIMD, - }, - Vector { - _handler: HRTIM1_TIME, - }, - Vector { - _handler: HRTIM1_FLT, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SAI3 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _handler: JPEG }, - Vector { _handler: MDMA }, - Vector { _handler: DSI }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _handler: HSEM2 }, - Vector { _handler: ADC3 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA_Channel0, - }, - Vector { - _handler: BDMA_Channel1, - }, - Vector { - _handler: BDMA_Channel2, - }, - Vector { - _handler: BDMA_Channel3, - }, - Vector { - _handler: BDMA_Channel4, - }, - Vector { - _handler: BDMA_Channel5, - }, - Vector { - _handler: BDMA_Channel6, - }, - Vector { - _handler: BDMA_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: LPTIM4 }, - Vector { _handler: LPTIM5 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _handler: SAI4 }, - Vector { _reserved: 0 }, - Vector { - _handler: HOLD_CORE, - }, - Vector { - _handler: WAKEUP_PIN, - }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -impl_rng!(0x48021800); -impl_sdmmc!(SDMMC1, 0x52007000); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -impl_sdmmc!(SDMMC2, 0x48022400); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); diff --git a/embassy-stm32/src/chip/stm32h747ig.rs b/embassy-stm32/src/chip/stm32h747ig.rs deleted file mode 100644 index 48827a95..00000000 --- a/embassy-stm32/src/chip/stm32h747ig.rs +++ /dev/null @@ -1,918 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, ADC3, BDMA, COMP1, COMP2, DAC1, DCMI, DMA2D, ETH, FDCAN1, - FDCAN2, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, - PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, - PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, - PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, - PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, - PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, - PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, - PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, - PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, PJ10, PJ11, PJ12, - PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, PK11, PK12, PK13, - PK14, PK15, I2C1, I2C2, I2C3, I2C4, IWDG1, IWDG2, JPEG, LPTIM1, LPTIM2, LPTIM3, LPTIM4, LPTIM5, - LPUART1, LTDC, MDIOS, MDMA, OPAMP1, OPAMP2, PWR, QUADSPI, RCC, RNG, RTC, SAI1, SAI2, SAI3, - SAI4, SDMMC1, SDMMC2, SPI1, SPI2, SPI3, SPI4, SPI5, SPI6, SWPMI1, SYSCFG, TIM1, TIM12, TIM13, - TIM14, TIM15, TIM16, TIM17, TIM2, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, UART4, UART5, UART7, - UART8, USART1, USART2, USART3, USART6, USB_OTG_FS, USB_OTG_HS, VREFBUF, WWDG1, WWDG2 -); -pub const GPIO_BASE: usize = 0x58020000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC = 18, - ADC3 = 127, - BDMA_Channel0 = 129, - BDMA_Channel1 = 130, - BDMA_Channel2 = 131, - BDMA_Channel3 = 132, - BDMA_Channel4 = 133, - BDMA_Channel5 = 134, - BDMA_Channel6 = 135, - BDMA_Channel7 = 136, - CEC = 94, - CM4_SEV = 65, - CM7_SEV = 64, - CRS = 144, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - DSI = 123, - ECC = 145, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - HOLD_CORE = 148, - HRTIM1_FLT = 109, - HRTIM1_Master = 103, - HRTIM1_TIMA = 104, - HRTIM1_TIMB = 105, - HRTIM1_TIMC = 106, - HRTIM1_TIMD = 107, - HRTIM1_TIME = 108, - HSEM1 = 125, - HSEM2 = 126, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - JPEG = 121, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPTIM4 = 140, - LPTIM5 = 141, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OTG_FS = 101, - OTG_FS_EP1_IN = 99, - OTG_FS_EP1_OUT = 98, - OTG_FS_WKUP = 100, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_AVD = 1, - QUADSPI = 92, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SAI3 = 114, - SAI4 = 146, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TAMP_STAMP = 2, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(ADC3); - declare!(BDMA_Channel0); - declare!(BDMA_Channel1); - declare!(BDMA_Channel2); - declare!(BDMA_Channel3); - declare!(BDMA_Channel4); - declare!(BDMA_Channel5); - declare!(BDMA_Channel6); - declare!(BDMA_Channel7); - declare!(CEC); - declare!(CM4_SEV); - declare!(CM7_SEV); - declare!(CRS); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(DSI); - declare!(ECC); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HOLD_CORE); - declare!(HRTIM1_FLT); - declare!(HRTIM1_Master); - declare!(HRTIM1_TIMA); - declare!(HRTIM1_TIMB); - declare!(HRTIM1_TIMC); - declare!(HRTIM1_TIMD); - declare!(HRTIM1_TIME); - declare!(HSEM1); - declare!(HSEM2); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(JPEG); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPTIM4); - declare!(LPTIM5); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OTG_FS); - declare!(OTG_FS_EP1_IN); - declare!(OTG_FS_EP1_OUT); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_AVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SAI3); - declare!(SAI4); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn ADC3(); - fn BDMA_Channel0(); - fn BDMA_Channel1(); - fn BDMA_Channel2(); - fn BDMA_Channel3(); - fn BDMA_Channel4(); - fn BDMA_Channel5(); - fn BDMA_Channel6(); - fn BDMA_Channel7(); - fn CEC(); - fn CM4_SEV(); - fn CM7_SEV(); - fn CRS(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn DSI(); - fn ECC(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HOLD_CORE(); - fn HRTIM1_FLT(); - fn HRTIM1_Master(); - fn HRTIM1_TIMA(); - fn HRTIM1_TIMB(); - fn HRTIM1_TIMC(); - fn HRTIM1_TIMD(); - fn HRTIM1_TIME(); - fn HSEM1(); - fn HSEM2(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn JPEG(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPTIM4(); - fn LPTIM5(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OTG_FS(); - fn OTG_FS_EP1_IN(); - fn OTG_FS_EP1_OUT(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_AVD(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SAI3(); - fn SAI4(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 150] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_AVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { _handler: CM7_SEV }, - Vector { _handler: CM4_SEV }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: QUADSPI }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { - _handler: OTG_FS_EP1_OUT, - }, - Vector { - _handler: OTG_FS_EP1_IN, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { _handler: OTG_FS }, - Vector { _reserved: 0 }, - Vector { - _handler: HRTIM1_Master, - }, - Vector { - _handler: HRTIM1_TIMA, - }, - Vector { - _handler: HRTIM1_TIMB, - }, - Vector { - _handler: HRTIM1_TIMC, - }, - Vector { - _handler: HRTIM1_TIMD, - }, - Vector { - _handler: HRTIM1_TIME, - }, - Vector { - _handler: HRTIM1_FLT, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SAI3 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _handler: JPEG }, - Vector { _handler: MDMA }, - Vector { _handler: DSI }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _handler: HSEM2 }, - Vector { _handler: ADC3 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA_Channel0, - }, - Vector { - _handler: BDMA_Channel1, - }, - Vector { - _handler: BDMA_Channel2, - }, - Vector { - _handler: BDMA_Channel3, - }, - Vector { - _handler: BDMA_Channel4, - }, - Vector { - _handler: BDMA_Channel5, - }, - Vector { - _handler: BDMA_Channel6, - }, - Vector { - _handler: BDMA_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: LPTIM4 }, - Vector { _handler: LPTIM5 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _handler: SAI4 }, - Vector { _reserved: 0 }, - Vector { - _handler: HOLD_CORE, - }, - Vector { - _handler: WAKEUP_PIN, - }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -impl_rng!(0x48021800); -impl_sdmmc!(SDMMC1, 0x52007000); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -impl_sdmmc!(SDMMC2, 0x48022400); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); diff --git a/embassy-stm32/src/chip/stm32h747ii.rs b/embassy-stm32/src/chip/stm32h747ii.rs deleted file mode 100644 index 48827a95..00000000 --- a/embassy-stm32/src/chip/stm32h747ii.rs +++ /dev/null @@ -1,918 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, ADC3, BDMA, COMP1, COMP2, DAC1, DCMI, DMA2D, ETH, FDCAN1, - FDCAN2, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, - PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, - PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, - PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, - PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, - PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, - PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, - PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, - PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, PJ10, PJ11, PJ12, - PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, PK11, PK12, PK13, - PK14, PK15, I2C1, I2C2, I2C3, I2C4, IWDG1, IWDG2, JPEG, LPTIM1, LPTIM2, LPTIM3, LPTIM4, LPTIM5, - LPUART1, LTDC, MDIOS, MDMA, OPAMP1, OPAMP2, PWR, QUADSPI, RCC, RNG, RTC, SAI1, SAI2, SAI3, - SAI4, SDMMC1, SDMMC2, SPI1, SPI2, SPI3, SPI4, SPI5, SPI6, SWPMI1, SYSCFG, TIM1, TIM12, TIM13, - TIM14, TIM15, TIM16, TIM17, TIM2, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, UART4, UART5, UART7, - UART8, USART1, USART2, USART3, USART6, USB_OTG_FS, USB_OTG_HS, VREFBUF, WWDG1, WWDG2 -); -pub const GPIO_BASE: usize = 0x58020000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC = 18, - ADC3 = 127, - BDMA_Channel0 = 129, - BDMA_Channel1 = 130, - BDMA_Channel2 = 131, - BDMA_Channel3 = 132, - BDMA_Channel4 = 133, - BDMA_Channel5 = 134, - BDMA_Channel6 = 135, - BDMA_Channel7 = 136, - CEC = 94, - CM4_SEV = 65, - CM7_SEV = 64, - CRS = 144, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - DSI = 123, - ECC = 145, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - HOLD_CORE = 148, - HRTIM1_FLT = 109, - HRTIM1_Master = 103, - HRTIM1_TIMA = 104, - HRTIM1_TIMB = 105, - HRTIM1_TIMC = 106, - HRTIM1_TIMD = 107, - HRTIM1_TIME = 108, - HSEM1 = 125, - HSEM2 = 126, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - JPEG = 121, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPTIM4 = 140, - LPTIM5 = 141, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OTG_FS = 101, - OTG_FS_EP1_IN = 99, - OTG_FS_EP1_OUT = 98, - OTG_FS_WKUP = 100, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_AVD = 1, - QUADSPI = 92, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SAI3 = 114, - SAI4 = 146, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TAMP_STAMP = 2, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(ADC3); - declare!(BDMA_Channel0); - declare!(BDMA_Channel1); - declare!(BDMA_Channel2); - declare!(BDMA_Channel3); - declare!(BDMA_Channel4); - declare!(BDMA_Channel5); - declare!(BDMA_Channel6); - declare!(BDMA_Channel7); - declare!(CEC); - declare!(CM4_SEV); - declare!(CM7_SEV); - declare!(CRS); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(DSI); - declare!(ECC); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HOLD_CORE); - declare!(HRTIM1_FLT); - declare!(HRTIM1_Master); - declare!(HRTIM1_TIMA); - declare!(HRTIM1_TIMB); - declare!(HRTIM1_TIMC); - declare!(HRTIM1_TIMD); - declare!(HRTIM1_TIME); - declare!(HSEM1); - declare!(HSEM2); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(JPEG); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPTIM4); - declare!(LPTIM5); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OTG_FS); - declare!(OTG_FS_EP1_IN); - declare!(OTG_FS_EP1_OUT); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_AVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SAI3); - declare!(SAI4); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn ADC3(); - fn BDMA_Channel0(); - fn BDMA_Channel1(); - fn BDMA_Channel2(); - fn BDMA_Channel3(); - fn BDMA_Channel4(); - fn BDMA_Channel5(); - fn BDMA_Channel6(); - fn BDMA_Channel7(); - fn CEC(); - fn CM4_SEV(); - fn CM7_SEV(); - fn CRS(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn DSI(); - fn ECC(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HOLD_CORE(); - fn HRTIM1_FLT(); - fn HRTIM1_Master(); - fn HRTIM1_TIMA(); - fn HRTIM1_TIMB(); - fn HRTIM1_TIMC(); - fn HRTIM1_TIMD(); - fn HRTIM1_TIME(); - fn HSEM1(); - fn HSEM2(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn JPEG(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPTIM4(); - fn LPTIM5(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OTG_FS(); - fn OTG_FS_EP1_IN(); - fn OTG_FS_EP1_OUT(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_AVD(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SAI3(); - fn SAI4(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 150] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_AVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { _handler: CM7_SEV }, - Vector { _handler: CM4_SEV }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: QUADSPI }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { - _handler: OTG_FS_EP1_OUT, - }, - Vector { - _handler: OTG_FS_EP1_IN, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { _handler: OTG_FS }, - Vector { _reserved: 0 }, - Vector { - _handler: HRTIM1_Master, - }, - Vector { - _handler: HRTIM1_TIMA, - }, - Vector { - _handler: HRTIM1_TIMB, - }, - Vector { - _handler: HRTIM1_TIMC, - }, - Vector { - _handler: HRTIM1_TIMD, - }, - Vector { - _handler: HRTIM1_TIME, - }, - Vector { - _handler: HRTIM1_FLT, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SAI3 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _handler: JPEG }, - Vector { _handler: MDMA }, - Vector { _handler: DSI }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _handler: HSEM2 }, - Vector { _handler: ADC3 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA_Channel0, - }, - Vector { - _handler: BDMA_Channel1, - }, - Vector { - _handler: BDMA_Channel2, - }, - Vector { - _handler: BDMA_Channel3, - }, - Vector { - _handler: BDMA_Channel4, - }, - Vector { - _handler: BDMA_Channel5, - }, - Vector { - _handler: BDMA_Channel6, - }, - Vector { - _handler: BDMA_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: LPTIM4 }, - Vector { _handler: LPTIM5 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _handler: SAI4 }, - Vector { _reserved: 0 }, - Vector { - _handler: HOLD_CORE, - }, - Vector { - _handler: WAKEUP_PIN, - }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -impl_rng!(0x48021800); -impl_sdmmc!(SDMMC1, 0x52007000); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -impl_sdmmc!(SDMMC2, 0x48022400); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); diff --git a/embassy-stm32/src/chip/stm32h747xg.rs b/embassy-stm32/src/chip/stm32h747xg.rs deleted file mode 100644 index 48827a95..00000000 --- a/embassy-stm32/src/chip/stm32h747xg.rs +++ /dev/null @@ -1,918 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, ADC3, BDMA, COMP1, COMP2, DAC1, DCMI, DMA2D, ETH, FDCAN1, - FDCAN2, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, - PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, - PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, - PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, - PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, - PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, - PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, - PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, - PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, PJ10, PJ11, PJ12, - PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, PK11, PK12, PK13, - PK14, PK15, I2C1, I2C2, I2C3, I2C4, IWDG1, IWDG2, JPEG, LPTIM1, LPTIM2, LPTIM3, LPTIM4, LPTIM5, - LPUART1, LTDC, MDIOS, MDMA, OPAMP1, OPAMP2, PWR, QUADSPI, RCC, RNG, RTC, SAI1, SAI2, SAI3, - SAI4, SDMMC1, SDMMC2, SPI1, SPI2, SPI3, SPI4, SPI5, SPI6, SWPMI1, SYSCFG, TIM1, TIM12, TIM13, - TIM14, TIM15, TIM16, TIM17, TIM2, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, UART4, UART5, UART7, - UART8, USART1, USART2, USART3, USART6, USB_OTG_FS, USB_OTG_HS, VREFBUF, WWDG1, WWDG2 -); -pub const GPIO_BASE: usize = 0x58020000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC = 18, - ADC3 = 127, - BDMA_Channel0 = 129, - BDMA_Channel1 = 130, - BDMA_Channel2 = 131, - BDMA_Channel3 = 132, - BDMA_Channel4 = 133, - BDMA_Channel5 = 134, - BDMA_Channel6 = 135, - BDMA_Channel7 = 136, - CEC = 94, - CM4_SEV = 65, - CM7_SEV = 64, - CRS = 144, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - DSI = 123, - ECC = 145, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - HOLD_CORE = 148, - HRTIM1_FLT = 109, - HRTIM1_Master = 103, - HRTIM1_TIMA = 104, - HRTIM1_TIMB = 105, - HRTIM1_TIMC = 106, - HRTIM1_TIMD = 107, - HRTIM1_TIME = 108, - HSEM1 = 125, - HSEM2 = 126, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - JPEG = 121, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPTIM4 = 140, - LPTIM5 = 141, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OTG_FS = 101, - OTG_FS_EP1_IN = 99, - OTG_FS_EP1_OUT = 98, - OTG_FS_WKUP = 100, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_AVD = 1, - QUADSPI = 92, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SAI3 = 114, - SAI4 = 146, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TAMP_STAMP = 2, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(ADC3); - declare!(BDMA_Channel0); - declare!(BDMA_Channel1); - declare!(BDMA_Channel2); - declare!(BDMA_Channel3); - declare!(BDMA_Channel4); - declare!(BDMA_Channel5); - declare!(BDMA_Channel6); - declare!(BDMA_Channel7); - declare!(CEC); - declare!(CM4_SEV); - declare!(CM7_SEV); - declare!(CRS); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(DSI); - declare!(ECC); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HOLD_CORE); - declare!(HRTIM1_FLT); - declare!(HRTIM1_Master); - declare!(HRTIM1_TIMA); - declare!(HRTIM1_TIMB); - declare!(HRTIM1_TIMC); - declare!(HRTIM1_TIMD); - declare!(HRTIM1_TIME); - declare!(HSEM1); - declare!(HSEM2); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(JPEG); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPTIM4); - declare!(LPTIM5); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OTG_FS); - declare!(OTG_FS_EP1_IN); - declare!(OTG_FS_EP1_OUT); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_AVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SAI3); - declare!(SAI4); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn ADC3(); - fn BDMA_Channel0(); - fn BDMA_Channel1(); - fn BDMA_Channel2(); - fn BDMA_Channel3(); - fn BDMA_Channel4(); - fn BDMA_Channel5(); - fn BDMA_Channel6(); - fn BDMA_Channel7(); - fn CEC(); - fn CM4_SEV(); - fn CM7_SEV(); - fn CRS(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn DSI(); - fn ECC(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HOLD_CORE(); - fn HRTIM1_FLT(); - fn HRTIM1_Master(); - fn HRTIM1_TIMA(); - fn HRTIM1_TIMB(); - fn HRTIM1_TIMC(); - fn HRTIM1_TIMD(); - fn HRTIM1_TIME(); - fn HSEM1(); - fn HSEM2(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn JPEG(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPTIM4(); - fn LPTIM5(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OTG_FS(); - fn OTG_FS_EP1_IN(); - fn OTG_FS_EP1_OUT(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_AVD(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SAI3(); - fn SAI4(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 150] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_AVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { _handler: CM7_SEV }, - Vector { _handler: CM4_SEV }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: QUADSPI }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { - _handler: OTG_FS_EP1_OUT, - }, - Vector { - _handler: OTG_FS_EP1_IN, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { _handler: OTG_FS }, - Vector { _reserved: 0 }, - Vector { - _handler: HRTIM1_Master, - }, - Vector { - _handler: HRTIM1_TIMA, - }, - Vector { - _handler: HRTIM1_TIMB, - }, - Vector { - _handler: HRTIM1_TIMC, - }, - Vector { - _handler: HRTIM1_TIMD, - }, - Vector { - _handler: HRTIM1_TIME, - }, - Vector { - _handler: HRTIM1_FLT, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SAI3 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _handler: JPEG }, - Vector { _handler: MDMA }, - Vector { _handler: DSI }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _handler: HSEM2 }, - Vector { _handler: ADC3 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA_Channel0, - }, - Vector { - _handler: BDMA_Channel1, - }, - Vector { - _handler: BDMA_Channel2, - }, - Vector { - _handler: BDMA_Channel3, - }, - Vector { - _handler: BDMA_Channel4, - }, - Vector { - _handler: BDMA_Channel5, - }, - Vector { - _handler: BDMA_Channel6, - }, - Vector { - _handler: BDMA_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: LPTIM4 }, - Vector { _handler: LPTIM5 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _handler: SAI4 }, - Vector { _reserved: 0 }, - Vector { - _handler: HOLD_CORE, - }, - Vector { - _handler: WAKEUP_PIN, - }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -impl_rng!(0x48021800); -impl_sdmmc!(SDMMC1, 0x52007000); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -impl_sdmmc!(SDMMC2, 0x48022400); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); diff --git a/embassy-stm32/src/chip/stm32h747xi.rs b/embassy-stm32/src/chip/stm32h747xi.rs deleted file mode 100644 index 48827a95..00000000 --- a/embassy-stm32/src/chip/stm32h747xi.rs +++ /dev/null @@ -1,918 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, ADC3, BDMA, COMP1, COMP2, DAC1, DCMI, DMA2D, ETH, FDCAN1, - FDCAN2, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, - PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, - PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, - PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, - PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, - PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, - PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, - PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, - PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, PJ10, PJ11, PJ12, - PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, PK11, PK12, PK13, - PK14, PK15, I2C1, I2C2, I2C3, I2C4, IWDG1, IWDG2, JPEG, LPTIM1, LPTIM2, LPTIM3, LPTIM4, LPTIM5, - LPUART1, LTDC, MDIOS, MDMA, OPAMP1, OPAMP2, PWR, QUADSPI, RCC, RNG, RTC, SAI1, SAI2, SAI3, - SAI4, SDMMC1, SDMMC2, SPI1, SPI2, SPI3, SPI4, SPI5, SPI6, SWPMI1, SYSCFG, TIM1, TIM12, TIM13, - TIM14, TIM15, TIM16, TIM17, TIM2, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, UART4, UART5, UART7, - UART8, USART1, USART2, USART3, USART6, USB_OTG_FS, USB_OTG_HS, VREFBUF, WWDG1, WWDG2 -); -pub const GPIO_BASE: usize = 0x58020000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC = 18, - ADC3 = 127, - BDMA_Channel0 = 129, - BDMA_Channel1 = 130, - BDMA_Channel2 = 131, - BDMA_Channel3 = 132, - BDMA_Channel4 = 133, - BDMA_Channel5 = 134, - BDMA_Channel6 = 135, - BDMA_Channel7 = 136, - CEC = 94, - CM4_SEV = 65, - CM7_SEV = 64, - CRS = 144, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - DSI = 123, - ECC = 145, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - HOLD_CORE = 148, - HRTIM1_FLT = 109, - HRTIM1_Master = 103, - HRTIM1_TIMA = 104, - HRTIM1_TIMB = 105, - HRTIM1_TIMC = 106, - HRTIM1_TIMD = 107, - HRTIM1_TIME = 108, - HSEM1 = 125, - HSEM2 = 126, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - JPEG = 121, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPTIM4 = 140, - LPTIM5 = 141, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OTG_FS = 101, - OTG_FS_EP1_IN = 99, - OTG_FS_EP1_OUT = 98, - OTG_FS_WKUP = 100, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_AVD = 1, - QUADSPI = 92, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SAI3 = 114, - SAI4 = 146, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TAMP_STAMP = 2, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(ADC3); - declare!(BDMA_Channel0); - declare!(BDMA_Channel1); - declare!(BDMA_Channel2); - declare!(BDMA_Channel3); - declare!(BDMA_Channel4); - declare!(BDMA_Channel5); - declare!(BDMA_Channel6); - declare!(BDMA_Channel7); - declare!(CEC); - declare!(CM4_SEV); - declare!(CM7_SEV); - declare!(CRS); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(DSI); - declare!(ECC); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HOLD_CORE); - declare!(HRTIM1_FLT); - declare!(HRTIM1_Master); - declare!(HRTIM1_TIMA); - declare!(HRTIM1_TIMB); - declare!(HRTIM1_TIMC); - declare!(HRTIM1_TIMD); - declare!(HRTIM1_TIME); - declare!(HSEM1); - declare!(HSEM2); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(JPEG); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPTIM4); - declare!(LPTIM5); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OTG_FS); - declare!(OTG_FS_EP1_IN); - declare!(OTG_FS_EP1_OUT); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_AVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SAI3); - declare!(SAI4); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn ADC3(); - fn BDMA_Channel0(); - fn BDMA_Channel1(); - fn BDMA_Channel2(); - fn BDMA_Channel3(); - fn BDMA_Channel4(); - fn BDMA_Channel5(); - fn BDMA_Channel6(); - fn BDMA_Channel7(); - fn CEC(); - fn CM4_SEV(); - fn CM7_SEV(); - fn CRS(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn DSI(); - fn ECC(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HOLD_CORE(); - fn HRTIM1_FLT(); - fn HRTIM1_Master(); - fn HRTIM1_TIMA(); - fn HRTIM1_TIMB(); - fn HRTIM1_TIMC(); - fn HRTIM1_TIMD(); - fn HRTIM1_TIME(); - fn HSEM1(); - fn HSEM2(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn JPEG(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPTIM4(); - fn LPTIM5(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OTG_FS(); - fn OTG_FS_EP1_IN(); - fn OTG_FS_EP1_OUT(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_AVD(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SAI3(); - fn SAI4(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 150] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_AVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { _handler: CM7_SEV }, - Vector { _handler: CM4_SEV }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: QUADSPI }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { - _handler: OTG_FS_EP1_OUT, - }, - Vector { - _handler: OTG_FS_EP1_IN, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { _handler: OTG_FS }, - Vector { _reserved: 0 }, - Vector { - _handler: HRTIM1_Master, - }, - Vector { - _handler: HRTIM1_TIMA, - }, - Vector { - _handler: HRTIM1_TIMB, - }, - Vector { - _handler: HRTIM1_TIMC, - }, - Vector { - _handler: HRTIM1_TIMD, - }, - Vector { - _handler: HRTIM1_TIME, - }, - Vector { - _handler: HRTIM1_FLT, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SAI3 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _handler: JPEG }, - Vector { _handler: MDMA }, - Vector { _handler: DSI }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _handler: HSEM2 }, - Vector { _handler: ADC3 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA_Channel0, - }, - Vector { - _handler: BDMA_Channel1, - }, - Vector { - _handler: BDMA_Channel2, - }, - Vector { - _handler: BDMA_Channel3, - }, - Vector { - _handler: BDMA_Channel4, - }, - Vector { - _handler: BDMA_Channel5, - }, - Vector { - _handler: BDMA_Channel6, - }, - Vector { - _handler: BDMA_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: LPTIM4 }, - Vector { _handler: LPTIM5 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _handler: SAI4 }, - Vector { _reserved: 0 }, - Vector { - _handler: HOLD_CORE, - }, - Vector { - _handler: WAKEUP_PIN, - }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -impl_rng!(0x48021800); -impl_sdmmc!(SDMMC1, 0x52007000); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -impl_sdmmc!(SDMMC2, 0x48022400); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); diff --git a/embassy-stm32/src/chip/stm32h747zi.rs b/embassy-stm32/src/chip/stm32h747zi.rs deleted file mode 100644 index 8c3a0f51..00000000 --- a/embassy-stm32/src/chip/stm32h747zi.rs +++ /dev/null @@ -1,918 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, ADC3, BDMA, COMP1, COMP2, DAC1, DCMI, DMA2D, ETH, FDCAN1, - FDCAN2, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, - PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, - PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, - PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, - PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, - PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, - PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, - PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, - PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, PJ10, PJ11, PJ12, - PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, PK11, PK12, PK13, - PK14, PK15, I2C1, I2C2, I2C3, I2C4, IWDG1, IWDG2, JPEG, LPTIM1, LPTIM2, LPTIM3, LPTIM4, LPTIM5, - LPUART1, LTDC, MDIOS, MDMA, OPAMP1, OPAMP2, PWR, QUADSPI, RCC, RNG, RTC, SAI1, SAI2, SAI3, - SAI4, SDMMC1, SDMMC2, SPI1, SPI2, SPI3, SPI4, SPI6, SWPMI1, SYSCFG, TIM1, TIM12, TIM13, TIM14, - TIM15, TIM16, TIM17, TIM2, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, UART4, UART5, UART7, UART8, - USART1, USART2, USART3, USART6, USB_OTG_FS, USB_OTG_HS, VREFBUF, WWDG1, WWDG2 -); -pub const GPIO_BASE: usize = 0x58020000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC = 18, - ADC3 = 127, - BDMA_Channel0 = 129, - BDMA_Channel1 = 130, - BDMA_Channel2 = 131, - BDMA_Channel3 = 132, - BDMA_Channel4 = 133, - BDMA_Channel5 = 134, - BDMA_Channel6 = 135, - BDMA_Channel7 = 136, - CEC = 94, - CM4_SEV = 65, - CM7_SEV = 64, - CRS = 144, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - DSI = 123, - ECC = 145, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - HOLD_CORE = 148, - HRTIM1_FLT = 109, - HRTIM1_Master = 103, - HRTIM1_TIMA = 104, - HRTIM1_TIMB = 105, - HRTIM1_TIMC = 106, - HRTIM1_TIMD = 107, - HRTIM1_TIME = 108, - HSEM1 = 125, - HSEM2 = 126, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - JPEG = 121, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPTIM4 = 140, - LPTIM5 = 141, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OTG_FS = 101, - OTG_FS_EP1_IN = 99, - OTG_FS_EP1_OUT = 98, - OTG_FS_WKUP = 100, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_AVD = 1, - QUADSPI = 92, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SAI3 = 114, - SAI4 = 146, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TAMP_STAMP = 2, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(ADC3); - declare!(BDMA_Channel0); - declare!(BDMA_Channel1); - declare!(BDMA_Channel2); - declare!(BDMA_Channel3); - declare!(BDMA_Channel4); - declare!(BDMA_Channel5); - declare!(BDMA_Channel6); - declare!(BDMA_Channel7); - declare!(CEC); - declare!(CM4_SEV); - declare!(CM7_SEV); - declare!(CRS); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(DSI); - declare!(ECC); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HOLD_CORE); - declare!(HRTIM1_FLT); - declare!(HRTIM1_Master); - declare!(HRTIM1_TIMA); - declare!(HRTIM1_TIMB); - declare!(HRTIM1_TIMC); - declare!(HRTIM1_TIMD); - declare!(HRTIM1_TIME); - declare!(HSEM1); - declare!(HSEM2); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(JPEG); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPTIM4); - declare!(LPTIM5); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OTG_FS); - declare!(OTG_FS_EP1_IN); - declare!(OTG_FS_EP1_OUT); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_AVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SAI3); - declare!(SAI4); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn ADC3(); - fn BDMA_Channel0(); - fn BDMA_Channel1(); - fn BDMA_Channel2(); - fn BDMA_Channel3(); - fn BDMA_Channel4(); - fn BDMA_Channel5(); - fn BDMA_Channel6(); - fn BDMA_Channel7(); - fn CEC(); - fn CM4_SEV(); - fn CM7_SEV(); - fn CRS(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn DSI(); - fn ECC(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HOLD_CORE(); - fn HRTIM1_FLT(); - fn HRTIM1_Master(); - fn HRTIM1_TIMA(); - fn HRTIM1_TIMB(); - fn HRTIM1_TIMC(); - fn HRTIM1_TIMD(); - fn HRTIM1_TIME(); - fn HSEM1(); - fn HSEM2(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn JPEG(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPTIM4(); - fn LPTIM5(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OTG_FS(); - fn OTG_FS_EP1_IN(); - fn OTG_FS_EP1_OUT(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_AVD(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SAI3(); - fn SAI4(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 150] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_AVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { _handler: CM7_SEV }, - Vector { _handler: CM4_SEV }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: QUADSPI }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { - _handler: OTG_FS_EP1_OUT, - }, - Vector { - _handler: OTG_FS_EP1_IN, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { _handler: OTG_FS }, - Vector { _reserved: 0 }, - Vector { - _handler: HRTIM1_Master, - }, - Vector { - _handler: HRTIM1_TIMA, - }, - Vector { - _handler: HRTIM1_TIMB, - }, - Vector { - _handler: HRTIM1_TIMC, - }, - Vector { - _handler: HRTIM1_TIMD, - }, - Vector { - _handler: HRTIM1_TIME, - }, - Vector { - _handler: HRTIM1_FLT, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SAI3 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _handler: JPEG }, - Vector { _handler: MDMA }, - Vector { _handler: DSI }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _handler: HSEM2 }, - Vector { _handler: ADC3 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA_Channel0, - }, - Vector { - _handler: BDMA_Channel1, - }, - Vector { - _handler: BDMA_Channel2, - }, - Vector { - _handler: BDMA_Channel3, - }, - Vector { - _handler: BDMA_Channel4, - }, - Vector { - _handler: BDMA_Channel5, - }, - Vector { - _handler: BDMA_Channel6, - }, - Vector { - _handler: BDMA_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: LPTIM4 }, - Vector { _handler: LPTIM5 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _handler: SAI4 }, - Vector { _reserved: 0 }, - Vector { - _handler: HOLD_CORE, - }, - Vector { - _handler: WAKEUP_PIN, - }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -impl_rng!(0x48021800); -impl_sdmmc!(SDMMC1, 0x52007000); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -impl_sdmmc!(SDMMC2, 0x48022400); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); diff --git a/embassy-stm32/src/chip/stm32h750ib.rs b/embassy-stm32/src/chip/stm32h750ib.rs deleted file mode 100644 index 7f0e79d8..00000000 --- a/embassy-stm32/src/chip/stm32h750ib.rs +++ /dev/null @@ -1,904 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, ADC3, BDMA, COMP1, COMP2, CRYP, DAC1, DCMI, DMA2D, ETH, - FDCAN1, FDCAN2, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, - PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, - PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, - PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, - PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, - PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, - PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, - PH10, PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, - PI11, PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, PJ10, PJ11, - PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, PK11, PK12, - PK13, PK14, PK15, HASH, I2C1, I2C2, I2C3, I2C4, IWDG1, JPEG, LPTIM1, LPTIM2, LPTIM3, LPTIM4, - LPTIM5, LPUART1, LTDC, MDIOS, MDMA, OPAMP1, OPAMP2, PWR, QUADSPI, RCC, RNG, RTC, SAI1, SAI2, - SAI3, SAI4, SDMMC1, SDMMC2, SPI1, SPI2, SPI3, SPI4, SPI5, SPI6, SWPMI1, SYSCFG, TIM1, TIM12, - TIM13, TIM14, TIM15, TIM16, TIM17, TIM2, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, UART4, UART5, - UART7, UART8, USART1, USART2, USART3, USART6, USB_OTG_FS, USB_OTG_HS, VREFBUF, WWDG1 -); -pub const GPIO_BASE: usize = 0x58020000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC = 18, - ADC3 = 127, - BDMA_Channel0 = 129, - BDMA_Channel1 = 130, - BDMA_Channel2 = 131, - BDMA_Channel3 = 132, - BDMA_Channel4 = 133, - BDMA_Channel5 = 134, - BDMA_Channel6 = 135, - BDMA_Channel7 = 136, - CEC = 94, - CRS = 144, - CRYP = 79, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - ECC = 145, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - HASH_RNG = 80, - HRTIM1_FLT = 109, - HRTIM1_Master = 103, - HRTIM1_TIMA = 104, - HRTIM1_TIMB = 105, - HRTIM1_TIMC = 106, - HRTIM1_TIMD = 107, - HRTIM1_TIME = 108, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - JPEG = 121, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPTIM4 = 140, - LPTIM5 = 141, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OTG_FS = 101, - OTG_FS_EP1_IN = 99, - OTG_FS_EP1_OUT = 98, - OTG_FS_WKUP = 100, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_AVD = 1, - QUADSPI = 92, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SAI3 = 114, - SAI4 = 146, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TAMP_STAMP = 2, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(ADC3); - declare!(BDMA_Channel0); - declare!(BDMA_Channel1); - declare!(BDMA_Channel2); - declare!(BDMA_Channel3); - declare!(BDMA_Channel4); - declare!(BDMA_Channel5); - declare!(BDMA_Channel6); - declare!(BDMA_Channel7); - declare!(CEC); - declare!(CRS); - declare!(CRYP); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(ECC); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HASH_RNG); - declare!(HRTIM1_FLT); - declare!(HRTIM1_Master); - declare!(HRTIM1_TIMA); - declare!(HRTIM1_TIMB); - declare!(HRTIM1_TIMC); - declare!(HRTIM1_TIMD); - declare!(HRTIM1_TIME); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(JPEG); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPTIM4); - declare!(LPTIM5); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OTG_FS); - declare!(OTG_FS_EP1_IN); - declare!(OTG_FS_EP1_OUT); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_AVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SAI3); - declare!(SAI4); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn ADC3(); - fn BDMA_Channel0(); - fn BDMA_Channel1(); - fn BDMA_Channel2(); - fn BDMA_Channel3(); - fn BDMA_Channel4(); - fn BDMA_Channel5(); - fn BDMA_Channel6(); - fn BDMA_Channel7(); - fn CEC(); - fn CRS(); - fn CRYP(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn ECC(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HASH_RNG(); - fn HRTIM1_FLT(); - fn HRTIM1_Master(); - fn HRTIM1_TIMA(); - fn HRTIM1_TIMB(); - fn HRTIM1_TIMC(); - fn HRTIM1_TIMD(); - fn HRTIM1_TIME(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn JPEG(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPTIM4(); - fn LPTIM5(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OTG_FS(); - fn OTG_FS_EP1_IN(); - fn OTG_FS_EP1_OUT(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_AVD(); - fn QUADSPI(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SAI3(); - fn SAI4(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 150] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_AVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _handler: CRYP }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: QUADSPI }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { - _handler: OTG_FS_EP1_OUT, - }, - Vector { - _handler: OTG_FS_EP1_IN, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { _handler: OTG_FS }, - Vector { _reserved: 0 }, - Vector { - _handler: HRTIM1_Master, - }, - Vector { - _handler: HRTIM1_TIMA, - }, - Vector { - _handler: HRTIM1_TIMB, - }, - Vector { - _handler: HRTIM1_TIMC, - }, - Vector { - _handler: HRTIM1_TIMD, - }, - Vector { - _handler: HRTIM1_TIME, - }, - Vector { - _handler: HRTIM1_FLT, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SAI3 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _handler: JPEG }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: ADC3 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA_Channel0, - }, - Vector { - _handler: BDMA_Channel1, - }, - Vector { - _handler: BDMA_Channel2, - }, - Vector { - _handler: BDMA_Channel3, - }, - Vector { - _handler: BDMA_Channel4, - }, - Vector { - _handler: BDMA_Channel5, - }, - Vector { - _handler: BDMA_Channel6, - }, - Vector { - _handler: BDMA_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: LPTIM4 }, - Vector { _handler: LPTIM5 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _handler: SAI4 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -impl_rng!(0x48021800); -impl_sdmmc!(SDMMC1, 0x52007000); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -impl_sdmmc!(SDMMC2, 0x48022400); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); diff --git a/embassy-stm32/src/chip/stm32h750vb.rs b/embassy-stm32/src/chip/stm32h750vb.rs deleted file mode 100644 index 6d8a74d8..00000000 --- a/embassy-stm32/src/chip/stm32h750vb.rs +++ /dev/null @@ -1,904 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, ADC3, BDMA, COMP1, COMP2, CRYP, DAC1, DCMI, DMA2D, ETH, - FDCAN1, FDCAN2, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, - PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, - PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, - PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, - PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, - PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, - PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, - PH10, PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, - PI11, PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, PJ10, PJ11, - PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, PK11, PK12, - PK13, PK14, PK15, HASH, I2C1, I2C2, I2C3, I2C4, IWDG1, JPEG, LPTIM1, LPTIM2, LPTIM3, LPTIM4, - LPTIM5, LPUART1, LTDC, MDIOS, MDMA, OPAMP1, OPAMP2, PWR, QUADSPI, RCC, RNG, RTC, SAI1, SAI2, - SAI3, SAI4, SDMMC1, SDMMC2, SPI1, SPI2, SPI3, SPI4, SPI6, SWPMI1, SYSCFG, TIM1, TIM12, TIM13, - TIM14, TIM15, TIM16, TIM17, TIM2, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, UART4, UART5, UART7, - UART8, USART1, USART2, USART3, USART6, USB_OTG_FS, USB_OTG_HS, VREFBUF, WWDG1 -); -pub const GPIO_BASE: usize = 0x58020000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC = 18, - ADC3 = 127, - BDMA_Channel0 = 129, - BDMA_Channel1 = 130, - BDMA_Channel2 = 131, - BDMA_Channel3 = 132, - BDMA_Channel4 = 133, - BDMA_Channel5 = 134, - BDMA_Channel6 = 135, - BDMA_Channel7 = 136, - CEC = 94, - CRS = 144, - CRYP = 79, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - ECC = 145, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - HASH_RNG = 80, - HRTIM1_FLT = 109, - HRTIM1_Master = 103, - HRTIM1_TIMA = 104, - HRTIM1_TIMB = 105, - HRTIM1_TIMC = 106, - HRTIM1_TIMD = 107, - HRTIM1_TIME = 108, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - JPEG = 121, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPTIM4 = 140, - LPTIM5 = 141, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OTG_FS = 101, - OTG_FS_EP1_IN = 99, - OTG_FS_EP1_OUT = 98, - OTG_FS_WKUP = 100, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_AVD = 1, - QUADSPI = 92, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SAI3 = 114, - SAI4 = 146, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TAMP_STAMP = 2, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(ADC3); - declare!(BDMA_Channel0); - declare!(BDMA_Channel1); - declare!(BDMA_Channel2); - declare!(BDMA_Channel3); - declare!(BDMA_Channel4); - declare!(BDMA_Channel5); - declare!(BDMA_Channel6); - declare!(BDMA_Channel7); - declare!(CEC); - declare!(CRS); - declare!(CRYP); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(ECC); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HASH_RNG); - declare!(HRTIM1_FLT); - declare!(HRTIM1_Master); - declare!(HRTIM1_TIMA); - declare!(HRTIM1_TIMB); - declare!(HRTIM1_TIMC); - declare!(HRTIM1_TIMD); - declare!(HRTIM1_TIME); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(JPEG); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPTIM4); - declare!(LPTIM5); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OTG_FS); - declare!(OTG_FS_EP1_IN); - declare!(OTG_FS_EP1_OUT); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_AVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SAI3); - declare!(SAI4); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn ADC3(); - fn BDMA_Channel0(); - fn BDMA_Channel1(); - fn BDMA_Channel2(); - fn BDMA_Channel3(); - fn BDMA_Channel4(); - fn BDMA_Channel5(); - fn BDMA_Channel6(); - fn BDMA_Channel7(); - fn CEC(); - fn CRS(); - fn CRYP(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn ECC(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HASH_RNG(); - fn HRTIM1_FLT(); - fn HRTIM1_Master(); - fn HRTIM1_TIMA(); - fn HRTIM1_TIMB(); - fn HRTIM1_TIMC(); - fn HRTIM1_TIMD(); - fn HRTIM1_TIME(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn JPEG(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPTIM4(); - fn LPTIM5(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OTG_FS(); - fn OTG_FS_EP1_IN(); - fn OTG_FS_EP1_OUT(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_AVD(); - fn QUADSPI(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SAI3(); - fn SAI4(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 150] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_AVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _handler: CRYP }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: QUADSPI }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { - _handler: OTG_FS_EP1_OUT, - }, - Vector { - _handler: OTG_FS_EP1_IN, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { _handler: OTG_FS }, - Vector { _reserved: 0 }, - Vector { - _handler: HRTIM1_Master, - }, - Vector { - _handler: HRTIM1_TIMA, - }, - Vector { - _handler: HRTIM1_TIMB, - }, - Vector { - _handler: HRTIM1_TIMC, - }, - Vector { - _handler: HRTIM1_TIMD, - }, - Vector { - _handler: HRTIM1_TIME, - }, - Vector { - _handler: HRTIM1_FLT, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SAI3 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _handler: JPEG }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: ADC3 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA_Channel0, - }, - Vector { - _handler: BDMA_Channel1, - }, - Vector { - _handler: BDMA_Channel2, - }, - Vector { - _handler: BDMA_Channel3, - }, - Vector { - _handler: BDMA_Channel4, - }, - Vector { - _handler: BDMA_Channel5, - }, - Vector { - _handler: BDMA_Channel6, - }, - Vector { - _handler: BDMA_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: LPTIM4 }, - Vector { _handler: LPTIM5 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _handler: SAI4 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -impl_rng!(0x48021800); -impl_sdmmc!(SDMMC1, 0x52007000); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -impl_sdmmc!(SDMMC2, 0x48022400); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); diff --git a/embassy-stm32/src/chip/stm32h750xb.rs b/embassy-stm32/src/chip/stm32h750xb.rs deleted file mode 100644 index 7f0e79d8..00000000 --- a/embassy-stm32/src/chip/stm32h750xb.rs +++ /dev/null @@ -1,904 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, ADC3, BDMA, COMP1, COMP2, CRYP, DAC1, DCMI, DMA2D, ETH, - FDCAN1, FDCAN2, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, - PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, - PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, - PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, - PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, - PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, - PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, - PH10, PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, - PI11, PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, PJ10, PJ11, - PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, PK11, PK12, - PK13, PK14, PK15, HASH, I2C1, I2C2, I2C3, I2C4, IWDG1, JPEG, LPTIM1, LPTIM2, LPTIM3, LPTIM4, - LPTIM5, LPUART1, LTDC, MDIOS, MDMA, OPAMP1, OPAMP2, PWR, QUADSPI, RCC, RNG, RTC, SAI1, SAI2, - SAI3, SAI4, SDMMC1, SDMMC2, SPI1, SPI2, SPI3, SPI4, SPI5, SPI6, SWPMI1, SYSCFG, TIM1, TIM12, - TIM13, TIM14, TIM15, TIM16, TIM17, TIM2, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, UART4, UART5, - UART7, UART8, USART1, USART2, USART3, USART6, USB_OTG_FS, USB_OTG_HS, VREFBUF, WWDG1 -); -pub const GPIO_BASE: usize = 0x58020000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC = 18, - ADC3 = 127, - BDMA_Channel0 = 129, - BDMA_Channel1 = 130, - BDMA_Channel2 = 131, - BDMA_Channel3 = 132, - BDMA_Channel4 = 133, - BDMA_Channel5 = 134, - BDMA_Channel6 = 135, - BDMA_Channel7 = 136, - CEC = 94, - CRS = 144, - CRYP = 79, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - ECC = 145, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - HASH_RNG = 80, - HRTIM1_FLT = 109, - HRTIM1_Master = 103, - HRTIM1_TIMA = 104, - HRTIM1_TIMB = 105, - HRTIM1_TIMC = 106, - HRTIM1_TIMD = 107, - HRTIM1_TIME = 108, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - JPEG = 121, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPTIM4 = 140, - LPTIM5 = 141, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OTG_FS = 101, - OTG_FS_EP1_IN = 99, - OTG_FS_EP1_OUT = 98, - OTG_FS_WKUP = 100, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_AVD = 1, - QUADSPI = 92, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SAI3 = 114, - SAI4 = 146, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TAMP_STAMP = 2, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(ADC3); - declare!(BDMA_Channel0); - declare!(BDMA_Channel1); - declare!(BDMA_Channel2); - declare!(BDMA_Channel3); - declare!(BDMA_Channel4); - declare!(BDMA_Channel5); - declare!(BDMA_Channel6); - declare!(BDMA_Channel7); - declare!(CEC); - declare!(CRS); - declare!(CRYP); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(ECC); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HASH_RNG); - declare!(HRTIM1_FLT); - declare!(HRTIM1_Master); - declare!(HRTIM1_TIMA); - declare!(HRTIM1_TIMB); - declare!(HRTIM1_TIMC); - declare!(HRTIM1_TIMD); - declare!(HRTIM1_TIME); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(JPEG); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPTIM4); - declare!(LPTIM5); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OTG_FS); - declare!(OTG_FS_EP1_IN); - declare!(OTG_FS_EP1_OUT); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_AVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SAI3); - declare!(SAI4); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn ADC3(); - fn BDMA_Channel0(); - fn BDMA_Channel1(); - fn BDMA_Channel2(); - fn BDMA_Channel3(); - fn BDMA_Channel4(); - fn BDMA_Channel5(); - fn BDMA_Channel6(); - fn BDMA_Channel7(); - fn CEC(); - fn CRS(); - fn CRYP(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn ECC(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HASH_RNG(); - fn HRTIM1_FLT(); - fn HRTIM1_Master(); - fn HRTIM1_TIMA(); - fn HRTIM1_TIMB(); - fn HRTIM1_TIMC(); - fn HRTIM1_TIMD(); - fn HRTIM1_TIME(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn JPEG(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPTIM4(); - fn LPTIM5(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OTG_FS(); - fn OTG_FS_EP1_IN(); - fn OTG_FS_EP1_OUT(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_AVD(); - fn QUADSPI(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SAI3(); - fn SAI4(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 150] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_AVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _handler: CRYP }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: QUADSPI }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { - _handler: OTG_FS_EP1_OUT, - }, - Vector { - _handler: OTG_FS_EP1_IN, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { _handler: OTG_FS }, - Vector { _reserved: 0 }, - Vector { - _handler: HRTIM1_Master, - }, - Vector { - _handler: HRTIM1_TIMA, - }, - Vector { - _handler: HRTIM1_TIMB, - }, - Vector { - _handler: HRTIM1_TIMC, - }, - Vector { - _handler: HRTIM1_TIMD, - }, - Vector { - _handler: HRTIM1_TIME, - }, - Vector { - _handler: HRTIM1_FLT, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SAI3 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _handler: JPEG }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: ADC3 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA_Channel0, - }, - Vector { - _handler: BDMA_Channel1, - }, - Vector { - _handler: BDMA_Channel2, - }, - Vector { - _handler: BDMA_Channel3, - }, - Vector { - _handler: BDMA_Channel4, - }, - Vector { - _handler: BDMA_Channel5, - }, - Vector { - _handler: BDMA_Channel6, - }, - Vector { - _handler: BDMA_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: LPTIM4 }, - Vector { _handler: LPTIM5 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _handler: SAI4 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -impl_rng!(0x48021800); -impl_sdmmc!(SDMMC1, 0x52007000); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -impl_sdmmc!(SDMMC2, 0x48022400); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); diff --git a/embassy-stm32/src/chip/stm32h750zb.rs b/embassy-stm32/src/chip/stm32h750zb.rs deleted file mode 100644 index 7f0e79d8..00000000 --- a/embassy-stm32/src/chip/stm32h750zb.rs +++ /dev/null @@ -1,904 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, ADC3, BDMA, COMP1, COMP2, CRYP, DAC1, DCMI, DMA2D, ETH, - FDCAN1, FDCAN2, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, - PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, - PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, - PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, - PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, - PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, - PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, - PH10, PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, - PI11, PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, PJ10, PJ11, - PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, PK11, PK12, - PK13, PK14, PK15, HASH, I2C1, I2C2, I2C3, I2C4, IWDG1, JPEG, LPTIM1, LPTIM2, LPTIM3, LPTIM4, - LPTIM5, LPUART1, LTDC, MDIOS, MDMA, OPAMP1, OPAMP2, PWR, QUADSPI, RCC, RNG, RTC, SAI1, SAI2, - SAI3, SAI4, SDMMC1, SDMMC2, SPI1, SPI2, SPI3, SPI4, SPI5, SPI6, SWPMI1, SYSCFG, TIM1, TIM12, - TIM13, TIM14, TIM15, TIM16, TIM17, TIM2, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, UART4, UART5, - UART7, UART8, USART1, USART2, USART3, USART6, USB_OTG_FS, USB_OTG_HS, VREFBUF, WWDG1 -); -pub const GPIO_BASE: usize = 0x58020000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC = 18, - ADC3 = 127, - BDMA_Channel0 = 129, - BDMA_Channel1 = 130, - BDMA_Channel2 = 131, - BDMA_Channel3 = 132, - BDMA_Channel4 = 133, - BDMA_Channel5 = 134, - BDMA_Channel6 = 135, - BDMA_Channel7 = 136, - CEC = 94, - CRS = 144, - CRYP = 79, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - ECC = 145, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - HASH_RNG = 80, - HRTIM1_FLT = 109, - HRTIM1_Master = 103, - HRTIM1_TIMA = 104, - HRTIM1_TIMB = 105, - HRTIM1_TIMC = 106, - HRTIM1_TIMD = 107, - HRTIM1_TIME = 108, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - JPEG = 121, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPTIM4 = 140, - LPTIM5 = 141, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OTG_FS = 101, - OTG_FS_EP1_IN = 99, - OTG_FS_EP1_OUT = 98, - OTG_FS_WKUP = 100, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_AVD = 1, - QUADSPI = 92, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SAI3 = 114, - SAI4 = 146, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TAMP_STAMP = 2, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(ADC3); - declare!(BDMA_Channel0); - declare!(BDMA_Channel1); - declare!(BDMA_Channel2); - declare!(BDMA_Channel3); - declare!(BDMA_Channel4); - declare!(BDMA_Channel5); - declare!(BDMA_Channel6); - declare!(BDMA_Channel7); - declare!(CEC); - declare!(CRS); - declare!(CRYP); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(ECC); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HASH_RNG); - declare!(HRTIM1_FLT); - declare!(HRTIM1_Master); - declare!(HRTIM1_TIMA); - declare!(HRTIM1_TIMB); - declare!(HRTIM1_TIMC); - declare!(HRTIM1_TIMD); - declare!(HRTIM1_TIME); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(JPEG); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPTIM4); - declare!(LPTIM5); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OTG_FS); - declare!(OTG_FS_EP1_IN); - declare!(OTG_FS_EP1_OUT); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_AVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SAI3); - declare!(SAI4); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn ADC3(); - fn BDMA_Channel0(); - fn BDMA_Channel1(); - fn BDMA_Channel2(); - fn BDMA_Channel3(); - fn BDMA_Channel4(); - fn BDMA_Channel5(); - fn BDMA_Channel6(); - fn BDMA_Channel7(); - fn CEC(); - fn CRS(); - fn CRYP(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn ECC(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HASH_RNG(); - fn HRTIM1_FLT(); - fn HRTIM1_Master(); - fn HRTIM1_TIMA(); - fn HRTIM1_TIMB(); - fn HRTIM1_TIMC(); - fn HRTIM1_TIMD(); - fn HRTIM1_TIME(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn JPEG(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPTIM4(); - fn LPTIM5(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OTG_FS(); - fn OTG_FS_EP1_IN(); - fn OTG_FS_EP1_OUT(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_AVD(); - fn QUADSPI(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SAI3(); - fn SAI4(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 150] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_AVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _handler: CRYP }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: QUADSPI }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { - _handler: OTG_FS_EP1_OUT, - }, - Vector { - _handler: OTG_FS_EP1_IN, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { _handler: OTG_FS }, - Vector { _reserved: 0 }, - Vector { - _handler: HRTIM1_Master, - }, - Vector { - _handler: HRTIM1_TIMA, - }, - Vector { - _handler: HRTIM1_TIMB, - }, - Vector { - _handler: HRTIM1_TIMC, - }, - Vector { - _handler: HRTIM1_TIMD, - }, - Vector { - _handler: HRTIM1_TIME, - }, - Vector { - _handler: HRTIM1_FLT, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SAI3 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _handler: JPEG }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: ADC3 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA_Channel0, - }, - Vector { - _handler: BDMA_Channel1, - }, - Vector { - _handler: BDMA_Channel2, - }, - Vector { - _handler: BDMA_Channel3, - }, - Vector { - _handler: BDMA_Channel4, - }, - Vector { - _handler: BDMA_Channel5, - }, - Vector { - _handler: BDMA_Channel6, - }, - Vector { - _handler: BDMA_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: LPTIM4 }, - Vector { _handler: LPTIM5 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _handler: SAI4 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -impl_rng!(0x48021800); -impl_sdmmc!(SDMMC1, 0x52007000); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -impl_sdmmc!(SDMMC2, 0x48022400); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); diff --git a/embassy-stm32/src/chip/stm32h753ai.rs b/embassy-stm32/src/chip/stm32h753ai.rs deleted file mode 100644 index 7f0e79d8..00000000 --- a/embassy-stm32/src/chip/stm32h753ai.rs +++ /dev/null @@ -1,904 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, ADC3, BDMA, COMP1, COMP2, CRYP, DAC1, DCMI, DMA2D, ETH, - FDCAN1, FDCAN2, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, - PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, - PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, - PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, - PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, - PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, - PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, - PH10, PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, - PI11, PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, PJ10, PJ11, - PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, PK11, PK12, - PK13, PK14, PK15, HASH, I2C1, I2C2, I2C3, I2C4, IWDG1, JPEG, LPTIM1, LPTIM2, LPTIM3, LPTIM4, - LPTIM5, LPUART1, LTDC, MDIOS, MDMA, OPAMP1, OPAMP2, PWR, QUADSPI, RCC, RNG, RTC, SAI1, SAI2, - SAI3, SAI4, SDMMC1, SDMMC2, SPI1, SPI2, SPI3, SPI4, SPI5, SPI6, SWPMI1, SYSCFG, TIM1, TIM12, - TIM13, TIM14, TIM15, TIM16, TIM17, TIM2, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, UART4, UART5, - UART7, UART8, USART1, USART2, USART3, USART6, USB_OTG_FS, USB_OTG_HS, VREFBUF, WWDG1 -); -pub const GPIO_BASE: usize = 0x58020000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC = 18, - ADC3 = 127, - BDMA_Channel0 = 129, - BDMA_Channel1 = 130, - BDMA_Channel2 = 131, - BDMA_Channel3 = 132, - BDMA_Channel4 = 133, - BDMA_Channel5 = 134, - BDMA_Channel6 = 135, - BDMA_Channel7 = 136, - CEC = 94, - CRS = 144, - CRYP = 79, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - ECC = 145, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - HASH_RNG = 80, - HRTIM1_FLT = 109, - HRTIM1_Master = 103, - HRTIM1_TIMA = 104, - HRTIM1_TIMB = 105, - HRTIM1_TIMC = 106, - HRTIM1_TIMD = 107, - HRTIM1_TIME = 108, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - JPEG = 121, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPTIM4 = 140, - LPTIM5 = 141, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OTG_FS = 101, - OTG_FS_EP1_IN = 99, - OTG_FS_EP1_OUT = 98, - OTG_FS_WKUP = 100, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_AVD = 1, - QUADSPI = 92, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SAI3 = 114, - SAI4 = 146, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TAMP_STAMP = 2, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(ADC3); - declare!(BDMA_Channel0); - declare!(BDMA_Channel1); - declare!(BDMA_Channel2); - declare!(BDMA_Channel3); - declare!(BDMA_Channel4); - declare!(BDMA_Channel5); - declare!(BDMA_Channel6); - declare!(BDMA_Channel7); - declare!(CEC); - declare!(CRS); - declare!(CRYP); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(ECC); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HASH_RNG); - declare!(HRTIM1_FLT); - declare!(HRTIM1_Master); - declare!(HRTIM1_TIMA); - declare!(HRTIM1_TIMB); - declare!(HRTIM1_TIMC); - declare!(HRTIM1_TIMD); - declare!(HRTIM1_TIME); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(JPEG); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPTIM4); - declare!(LPTIM5); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OTG_FS); - declare!(OTG_FS_EP1_IN); - declare!(OTG_FS_EP1_OUT); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_AVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SAI3); - declare!(SAI4); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn ADC3(); - fn BDMA_Channel0(); - fn BDMA_Channel1(); - fn BDMA_Channel2(); - fn BDMA_Channel3(); - fn BDMA_Channel4(); - fn BDMA_Channel5(); - fn BDMA_Channel6(); - fn BDMA_Channel7(); - fn CEC(); - fn CRS(); - fn CRYP(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn ECC(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HASH_RNG(); - fn HRTIM1_FLT(); - fn HRTIM1_Master(); - fn HRTIM1_TIMA(); - fn HRTIM1_TIMB(); - fn HRTIM1_TIMC(); - fn HRTIM1_TIMD(); - fn HRTIM1_TIME(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn JPEG(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPTIM4(); - fn LPTIM5(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OTG_FS(); - fn OTG_FS_EP1_IN(); - fn OTG_FS_EP1_OUT(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_AVD(); - fn QUADSPI(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SAI3(); - fn SAI4(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 150] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_AVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _handler: CRYP }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: QUADSPI }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { - _handler: OTG_FS_EP1_OUT, - }, - Vector { - _handler: OTG_FS_EP1_IN, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { _handler: OTG_FS }, - Vector { _reserved: 0 }, - Vector { - _handler: HRTIM1_Master, - }, - Vector { - _handler: HRTIM1_TIMA, - }, - Vector { - _handler: HRTIM1_TIMB, - }, - Vector { - _handler: HRTIM1_TIMC, - }, - Vector { - _handler: HRTIM1_TIMD, - }, - Vector { - _handler: HRTIM1_TIME, - }, - Vector { - _handler: HRTIM1_FLT, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SAI3 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _handler: JPEG }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: ADC3 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA_Channel0, - }, - Vector { - _handler: BDMA_Channel1, - }, - Vector { - _handler: BDMA_Channel2, - }, - Vector { - _handler: BDMA_Channel3, - }, - Vector { - _handler: BDMA_Channel4, - }, - Vector { - _handler: BDMA_Channel5, - }, - Vector { - _handler: BDMA_Channel6, - }, - Vector { - _handler: BDMA_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: LPTIM4 }, - Vector { _handler: LPTIM5 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _handler: SAI4 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -impl_rng!(0x48021800); -impl_sdmmc!(SDMMC1, 0x52007000); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -impl_sdmmc!(SDMMC2, 0x48022400); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); diff --git a/embassy-stm32/src/chip/stm32h753bi.rs b/embassy-stm32/src/chip/stm32h753bi.rs deleted file mode 100644 index 7f0e79d8..00000000 --- a/embassy-stm32/src/chip/stm32h753bi.rs +++ /dev/null @@ -1,904 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, ADC3, BDMA, COMP1, COMP2, CRYP, DAC1, DCMI, DMA2D, ETH, - FDCAN1, FDCAN2, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, - PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, - PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, - PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, - PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, - PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, - PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, - PH10, PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, - PI11, PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, PJ10, PJ11, - PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, PK11, PK12, - PK13, PK14, PK15, HASH, I2C1, I2C2, I2C3, I2C4, IWDG1, JPEG, LPTIM1, LPTIM2, LPTIM3, LPTIM4, - LPTIM5, LPUART1, LTDC, MDIOS, MDMA, OPAMP1, OPAMP2, PWR, QUADSPI, RCC, RNG, RTC, SAI1, SAI2, - SAI3, SAI4, SDMMC1, SDMMC2, SPI1, SPI2, SPI3, SPI4, SPI5, SPI6, SWPMI1, SYSCFG, TIM1, TIM12, - TIM13, TIM14, TIM15, TIM16, TIM17, TIM2, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, UART4, UART5, - UART7, UART8, USART1, USART2, USART3, USART6, USB_OTG_FS, USB_OTG_HS, VREFBUF, WWDG1 -); -pub const GPIO_BASE: usize = 0x58020000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC = 18, - ADC3 = 127, - BDMA_Channel0 = 129, - BDMA_Channel1 = 130, - BDMA_Channel2 = 131, - BDMA_Channel3 = 132, - BDMA_Channel4 = 133, - BDMA_Channel5 = 134, - BDMA_Channel6 = 135, - BDMA_Channel7 = 136, - CEC = 94, - CRS = 144, - CRYP = 79, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - ECC = 145, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - HASH_RNG = 80, - HRTIM1_FLT = 109, - HRTIM1_Master = 103, - HRTIM1_TIMA = 104, - HRTIM1_TIMB = 105, - HRTIM1_TIMC = 106, - HRTIM1_TIMD = 107, - HRTIM1_TIME = 108, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - JPEG = 121, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPTIM4 = 140, - LPTIM5 = 141, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OTG_FS = 101, - OTG_FS_EP1_IN = 99, - OTG_FS_EP1_OUT = 98, - OTG_FS_WKUP = 100, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_AVD = 1, - QUADSPI = 92, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SAI3 = 114, - SAI4 = 146, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TAMP_STAMP = 2, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(ADC3); - declare!(BDMA_Channel0); - declare!(BDMA_Channel1); - declare!(BDMA_Channel2); - declare!(BDMA_Channel3); - declare!(BDMA_Channel4); - declare!(BDMA_Channel5); - declare!(BDMA_Channel6); - declare!(BDMA_Channel7); - declare!(CEC); - declare!(CRS); - declare!(CRYP); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(ECC); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HASH_RNG); - declare!(HRTIM1_FLT); - declare!(HRTIM1_Master); - declare!(HRTIM1_TIMA); - declare!(HRTIM1_TIMB); - declare!(HRTIM1_TIMC); - declare!(HRTIM1_TIMD); - declare!(HRTIM1_TIME); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(JPEG); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPTIM4); - declare!(LPTIM5); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OTG_FS); - declare!(OTG_FS_EP1_IN); - declare!(OTG_FS_EP1_OUT); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_AVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SAI3); - declare!(SAI4); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn ADC3(); - fn BDMA_Channel0(); - fn BDMA_Channel1(); - fn BDMA_Channel2(); - fn BDMA_Channel3(); - fn BDMA_Channel4(); - fn BDMA_Channel5(); - fn BDMA_Channel6(); - fn BDMA_Channel7(); - fn CEC(); - fn CRS(); - fn CRYP(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn ECC(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HASH_RNG(); - fn HRTIM1_FLT(); - fn HRTIM1_Master(); - fn HRTIM1_TIMA(); - fn HRTIM1_TIMB(); - fn HRTIM1_TIMC(); - fn HRTIM1_TIMD(); - fn HRTIM1_TIME(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn JPEG(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPTIM4(); - fn LPTIM5(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OTG_FS(); - fn OTG_FS_EP1_IN(); - fn OTG_FS_EP1_OUT(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_AVD(); - fn QUADSPI(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SAI3(); - fn SAI4(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 150] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_AVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _handler: CRYP }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: QUADSPI }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { - _handler: OTG_FS_EP1_OUT, - }, - Vector { - _handler: OTG_FS_EP1_IN, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { _handler: OTG_FS }, - Vector { _reserved: 0 }, - Vector { - _handler: HRTIM1_Master, - }, - Vector { - _handler: HRTIM1_TIMA, - }, - Vector { - _handler: HRTIM1_TIMB, - }, - Vector { - _handler: HRTIM1_TIMC, - }, - Vector { - _handler: HRTIM1_TIMD, - }, - Vector { - _handler: HRTIM1_TIME, - }, - Vector { - _handler: HRTIM1_FLT, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SAI3 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _handler: JPEG }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: ADC3 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA_Channel0, - }, - Vector { - _handler: BDMA_Channel1, - }, - Vector { - _handler: BDMA_Channel2, - }, - Vector { - _handler: BDMA_Channel3, - }, - Vector { - _handler: BDMA_Channel4, - }, - Vector { - _handler: BDMA_Channel5, - }, - Vector { - _handler: BDMA_Channel6, - }, - Vector { - _handler: BDMA_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: LPTIM4 }, - Vector { _handler: LPTIM5 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _handler: SAI4 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -impl_rng!(0x48021800); -impl_sdmmc!(SDMMC1, 0x52007000); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -impl_sdmmc!(SDMMC2, 0x48022400); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); diff --git a/embassy-stm32/src/chip/stm32h753ii.rs b/embassy-stm32/src/chip/stm32h753ii.rs deleted file mode 100644 index 7f0e79d8..00000000 --- a/embassy-stm32/src/chip/stm32h753ii.rs +++ /dev/null @@ -1,904 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, ADC3, BDMA, COMP1, COMP2, CRYP, DAC1, DCMI, DMA2D, ETH, - FDCAN1, FDCAN2, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, - PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, - PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, - PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, - PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, - PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, - PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, - PH10, PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, - PI11, PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, PJ10, PJ11, - PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, PK11, PK12, - PK13, PK14, PK15, HASH, I2C1, I2C2, I2C3, I2C4, IWDG1, JPEG, LPTIM1, LPTIM2, LPTIM3, LPTIM4, - LPTIM5, LPUART1, LTDC, MDIOS, MDMA, OPAMP1, OPAMP2, PWR, QUADSPI, RCC, RNG, RTC, SAI1, SAI2, - SAI3, SAI4, SDMMC1, SDMMC2, SPI1, SPI2, SPI3, SPI4, SPI5, SPI6, SWPMI1, SYSCFG, TIM1, TIM12, - TIM13, TIM14, TIM15, TIM16, TIM17, TIM2, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, UART4, UART5, - UART7, UART8, USART1, USART2, USART3, USART6, USB_OTG_FS, USB_OTG_HS, VREFBUF, WWDG1 -); -pub const GPIO_BASE: usize = 0x58020000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC = 18, - ADC3 = 127, - BDMA_Channel0 = 129, - BDMA_Channel1 = 130, - BDMA_Channel2 = 131, - BDMA_Channel3 = 132, - BDMA_Channel4 = 133, - BDMA_Channel5 = 134, - BDMA_Channel6 = 135, - BDMA_Channel7 = 136, - CEC = 94, - CRS = 144, - CRYP = 79, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - ECC = 145, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - HASH_RNG = 80, - HRTIM1_FLT = 109, - HRTIM1_Master = 103, - HRTIM1_TIMA = 104, - HRTIM1_TIMB = 105, - HRTIM1_TIMC = 106, - HRTIM1_TIMD = 107, - HRTIM1_TIME = 108, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - JPEG = 121, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPTIM4 = 140, - LPTIM5 = 141, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OTG_FS = 101, - OTG_FS_EP1_IN = 99, - OTG_FS_EP1_OUT = 98, - OTG_FS_WKUP = 100, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_AVD = 1, - QUADSPI = 92, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SAI3 = 114, - SAI4 = 146, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TAMP_STAMP = 2, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(ADC3); - declare!(BDMA_Channel0); - declare!(BDMA_Channel1); - declare!(BDMA_Channel2); - declare!(BDMA_Channel3); - declare!(BDMA_Channel4); - declare!(BDMA_Channel5); - declare!(BDMA_Channel6); - declare!(BDMA_Channel7); - declare!(CEC); - declare!(CRS); - declare!(CRYP); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(ECC); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HASH_RNG); - declare!(HRTIM1_FLT); - declare!(HRTIM1_Master); - declare!(HRTIM1_TIMA); - declare!(HRTIM1_TIMB); - declare!(HRTIM1_TIMC); - declare!(HRTIM1_TIMD); - declare!(HRTIM1_TIME); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(JPEG); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPTIM4); - declare!(LPTIM5); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OTG_FS); - declare!(OTG_FS_EP1_IN); - declare!(OTG_FS_EP1_OUT); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_AVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SAI3); - declare!(SAI4); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn ADC3(); - fn BDMA_Channel0(); - fn BDMA_Channel1(); - fn BDMA_Channel2(); - fn BDMA_Channel3(); - fn BDMA_Channel4(); - fn BDMA_Channel5(); - fn BDMA_Channel6(); - fn BDMA_Channel7(); - fn CEC(); - fn CRS(); - fn CRYP(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn ECC(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HASH_RNG(); - fn HRTIM1_FLT(); - fn HRTIM1_Master(); - fn HRTIM1_TIMA(); - fn HRTIM1_TIMB(); - fn HRTIM1_TIMC(); - fn HRTIM1_TIMD(); - fn HRTIM1_TIME(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn JPEG(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPTIM4(); - fn LPTIM5(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OTG_FS(); - fn OTG_FS_EP1_IN(); - fn OTG_FS_EP1_OUT(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_AVD(); - fn QUADSPI(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SAI3(); - fn SAI4(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 150] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_AVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _handler: CRYP }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: QUADSPI }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { - _handler: OTG_FS_EP1_OUT, - }, - Vector { - _handler: OTG_FS_EP1_IN, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { _handler: OTG_FS }, - Vector { _reserved: 0 }, - Vector { - _handler: HRTIM1_Master, - }, - Vector { - _handler: HRTIM1_TIMA, - }, - Vector { - _handler: HRTIM1_TIMB, - }, - Vector { - _handler: HRTIM1_TIMC, - }, - Vector { - _handler: HRTIM1_TIMD, - }, - Vector { - _handler: HRTIM1_TIME, - }, - Vector { - _handler: HRTIM1_FLT, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SAI3 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _handler: JPEG }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: ADC3 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA_Channel0, - }, - Vector { - _handler: BDMA_Channel1, - }, - Vector { - _handler: BDMA_Channel2, - }, - Vector { - _handler: BDMA_Channel3, - }, - Vector { - _handler: BDMA_Channel4, - }, - Vector { - _handler: BDMA_Channel5, - }, - Vector { - _handler: BDMA_Channel6, - }, - Vector { - _handler: BDMA_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: LPTIM4 }, - Vector { _handler: LPTIM5 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _handler: SAI4 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -impl_rng!(0x48021800); -impl_sdmmc!(SDMMC1, 0x52007000); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -impl_sdmmc!(SDMMC2, 0x48022400); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); diff --git a/embassy-stm32/src/chip/stm32h753vi.rs b/embassy-stm32/src/chip/stm32h753vi.rs deleted file mode 100644 index 6d8a74d8..00000000 --- a/embassy-stm32/src/chip/stm32h753vi.rs +++ /dev/null @@ -1,904 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, ADC3, BDMA, COMP1, COMP2, CRYP, DAC1, DCMI, DMA2D, ETH, - FDCAN1, FDCAN2, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, - PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, - PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, - PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, - PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, - PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, - PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, - PH10, PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, - PI11, PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, PJ10, PJ11, - PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, PK11, PK12, - PK13, PK14, PK15, HASH, I2C1, I2C2, I2C3, I2C4, IWDG1, JPEG, LPTIM1, LPTIM2, LPTIM3, LPTIM4, - LPTIM5, LPUART1, LTDC, MDIOS, MDMA, OPAMP1, OPAMP2, PWR, QUADSPI, RCC, RNG, RTC, SAI1, SAI2, - SAI3, SAI4, SDMMC1, SDMMC2, SPI1, SPI2, SPI3, SPI4, SPI6, SWPMI1, SYSCFG, TIM1, TIM12, TIM13, - TIM14, TIM15, TIM16, TIM17, TIM2, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, UART4, UART5, UART7, - UART8, USART1, USART2, USART3, USART6, USB_OTG_FS, USB_OTG_HS, VREFBUF, WWDG1 -); -pub const GPIO_BASE: usize = 0x58020000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC = 18, - ADC3 = 127, - BDMA_Channel0 = 129, - BDMA_Channel1 = 130, - BDMA_Channel2 = 131, - BDMA_Channel3 = 132, - BDMA_Channel4 = 133, - BDMA_Channel5 = 134, - BDMA_Channel6 = 135, - BDMA_Channel7 = 136, - CEC = 94, - CRS = 144, - CRYP = 79, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - ECC = 145, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - HASH_RNG = 80, - HRTIM1_FLT = 109, - HRTIM1_Master = 103, - HRTIM1_TIMA = 104, - HRTIM1_TIMB = 105, - HRTIM1_TIMC = 106, - HRTIM1_TIMD = 107, - HRTIM1_TIME = 108, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - JPEG = 121, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPTIM4 = 140, - LPTIM5 = 141, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OTG_FS = 101, - OTG_FS_EP1_IN = 99, - OTG_FS_EP1_OUT = 98, - OTG_FS_WKUP = 100, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_AVD = 1, - QUADSPI = 92, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SAI3 = 114, - SAI4 = 146, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TAMP_STAMP = 2, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(ADC3); - declare!(BDMA_Channel0); - declare!(BDMA_Channel1); - declare!(BDMA_Channel2); - declare!(BDMA_Channel3); - declare!(BDMA_Channel4); - declare!(BDMA_Channel5); - declare!(BDMA_Channel6); - declare!(BDMA_Channel7); - declare!(CEC); - declare!(CRS); - declare!(CRYP); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(ECC); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HASH_RNG); - declare!(HRTIM1_FLT); - declare!(HRTIM1_Master); - declare!(HRTIM1_TIMA); - declare!(HRTIM1_TIMB); - declare!(HRTIM1_TIMC); - declare!(HRTIM1_TIMD); - declare!(HRTIM1_TIME); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(JPEG); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPTIM4); - declare!(LPTIM5); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OTG_FS); - declare!(OTG_FS_EP1_IN); - declare!(OTG_FS_EP1_OUT); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_AVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SAI3); - declare!(SAI4); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn ADC3(); - fn BDMA_Channel0(); - fn BDMA_Channel1(); - fn BDMA_Channel2(); - fn BDMA_Channel3(); - fn BDMA_Channel4(); - fn BDMA_Channel5(); - fn BDMA_Channel6(); - fn BDMA_Channel7(); - fn CEC(); - fn CRS(); - fn CRYP(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn ECC(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HASH_RNG(); - fn HRTIM1_FLT(); - fn HRTIM1_Master(); - fn HRTIM1_TIMA(); - fn HRTIM1_TIMB(); - fn HRTIM1_TIMC(); - fn HRTIM1_TIMD(); - fn HRTIM1_TIME(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn JPEG(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPTIM4(); - fn LPTIM5(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OTG_FS(); - fn OTG_FS_EP1_IN(); - fn OTG_FS_EP1_OUT(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_AVD(); - fn QUADSPI(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SAI3(); - fn SAI4(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 150] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_AVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _handler: CRYP }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: QUADSPI }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { - _handler: OTG_FS_EP1_OUT, - }, - Vector { - _handler: OTG_FS_EP1_IN, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { _handler: OTG_FS }, - Vector { _reserved: 0 }, - Vector { - _handler: HRTIM1_Master, - }, - Vector { - _handler: HRTIM1_TIMA, - }, - Vector { - _handler: HRTIM1_TIMB, - }, - Vector { - _handler: HRTIM1_TIMC, - }, - Vector { - _handler: HRTIM1_TIMD, - }, - Vector { - _handler: HRTIM1_TIME, - }, - Vector { - _handler: HRTIM1_FLT, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SAI3 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _handler: JPEG }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: ADC3 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA_Channel0, - }, - Vector { - _handler: BDMA_Channel1, - }, - Vector { - _handler: BDMA_Channel2, - }, - Vector { - _handler: BDMA_Channel3, - }, - Vector { - _handler: BDMA_Channel4, - }, - Vector { - _handler: BDMA_Channel5, - }, - Vector { - _handler: BDMA_Channel6, - }, - Vector { - _handler: BDMA_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: LPTIM4 }, - Vector { _handler: LPTIM5 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _handler: SAI4 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -impl_rng!(0x48021800); -impl_sdmmc!(SDMMC1, 0x52007000); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -impl_sdmmc!(SDMMC2, 0x48022400); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); diff --git a/embassy-stm32/src/chip/stm32h753xi.rs b/embassy-stm32/src/chip/stm32h753xi.rs deleted file mode 100644 index 7f0e79d8..00000000 --- a/embassy-stm32/src/chip/stm32h753xi.rs +++ /dev/null @@ -1,904 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, ADC3, BDMA, COMP1, COMP2, CRYP, DAC1, DCMI, DMA2D, ETH, - FDCAN1, FDCAN2, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, - PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, - PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, - PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, - PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, - PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, - PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, - PH10, PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, - PI11, PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, PJ10, PJ11, - PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, PK11, PK12, - PK13, PK14, PK15, HASH, I2C1, I2C2, I2C3, I2C4, IWDG1, JPEG, LPTIM1, LPTIM2, LPTIM3, LPTIM4, - LPTIM5, LPUART1, LTDC, MDIOS, MDMA, OPAMP1, OPAMP2, PWR, QUADSPI, RCC, RNG, RTC, SAI1, SAI2, - SAI3, SAI4, SDMMC1, SDMMC2, SPI1, SPI2, SPI3, SPI4, SPI5, SPI6, SWPMI1, SYSCFG, TIM1, TIM12, - TIM13, TIM14, TIM15, TIM16, TIM17, TIM2, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, UART4, UART5, - UART7, UART8, USART1, USART2, USART3, USART6, USB_OTG_FS, USB_OTG_HS, VREFBUF, WWDG1 -); -pub const GPIO_BASE: usize = 0x58020000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC = 18, - ADC3 = 127, - BDMA_Channel0 = 129, - BDMA_Channel1 = 130, - BDMA_Channel2 = 131, - BDMA_Channel3 = 132, - BDMA_Channel4 = 133, - BDMA_Channel5 = 134, - BDMA_Channel6 = 135, - BDMA_Channel7 = 136, - CEC = 94, - CRS = 144, - CRYP = 79, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - ECC = 145, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - HASH_RNG = 80, - HRTIM1_FLT = 109, - HRTIM1_Master = 103, - HRTIM1_TIMA = 104, - HRTIM1_TIMB = 105, - HRTIM1_TIMC = 106, - HRTIM1_TIMD = 107, - HRTIM1_TIME = 108, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - JPEG = 121, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPTIM4 = 140, - LPTIM5 = 141, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OTG_FS = 101, - OTG_FS_EP1_IN = 99, - OTG_FS_EP1_OUT = 98, - OTG_FS_WKUP = 100, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_AVD = 1, - QUADSPI = 92, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SAI3 = 114, - SAI4 = 146, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TAMP_STAMP = 2, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(ADC3); - declare!(BDMA_Channel0); - declare!(BDMA_Channel1); - declare!(BDMA_Channel2); - declare!(BDMA_Channel3); - declare!(BDMA_Channel4); - declare!(BDMA_Channel5); - declare!(BDMA_Channel6); - declare!(BDMA_Channel7); - declare!(CEC); - declare!(CRS); - declare!(CRYP); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(ECC); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HASH_RNG); - declare!(HRTIM1_FLT); - declare!(HRTIM1_Master); - declare!(HRTIM1_TIMA); - declare!(HRTIM1_TIMB); - declare!(HRTIM1_TIMC); - declare!(HRTIM1_TIMD); - declare!(HRTIM1_TIME); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(JPEG); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPTIM4); - declare!(LPTIM5); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OTG_FS); - declare!(OTG_FS_EP1_IN); - declare!(OTG_FS_EP1_OUT); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_AVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SAI3); - declare!(SAI4); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn ADC3(); - fn BDMA_Channel0(); - fn BDMA_Channel1(); - fn BDMA_Channel2(); - fn BDMA_Channel3(); - fn BDMA_Channel4(); - fn BDMA_Channel5(); - fn BDMA_Channel6(); - fn BDMA_Channel7(); - fn CEC(); - fn CRS(); - fn CRYP(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn ECC(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HASH_RNG(); - fn HRTIM1_FLT(); - fn HRTIM1_Master(); - fn HRTIM1_TIMA(); - fn HRTIM1_TIMB(); - fn HRTIM1_TIMC(); - fn HRTIM1_TIMD(); - fn HRTIM1_TIME(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn JPEG(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPTIM4(); - fn LPTIM5(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OTG_FS(); - fn OTG_FS_EP1_IN(); - fn OTG_FS_EP1_OUT(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_AVD(); - fn QUADSPI(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SAI3(); - fn SAI4(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 150] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_AVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _handler: CRYP }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: QUADSPI }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { - _handler: OTG_FS_EP1_OUT, - }, - Vector { - _handler: OTG_FS_EP1_IN, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { _handler: OTG_FS }, - Vector { _reserved: 0 }, - Vector { - _handler: HRTIM1_Master, - }, - Vector { - _handler: HRTIM1_TIMA, - }, - Vector { - _handler: HRTIM1_TIMB, - }, - Vector { - _handler: HRTIM1_TIMC, - }, - Vector { - _handler: HRTIM1_TIMD, - }, - Vector { - _handler: HRTIM1_TIME, - }, - Vector { - _handler: HRTIM1_FLT, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SAI3 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _handler: JPEG }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: ADC3 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA_Channel0, - }, - Vector { - _handler: BDMA_Channel1, - }, - Vector { - _handler: BDMA_Channel2, - }, - Vector { - _handler: BDMA_Channel3, - }, - Vector { - _handler: BDMA_Channel4, - }, - Vector { - _handler: BDMA_Channel5, - }, - Vector { - _handler: BDMA_Channel6, - }, - Vector { - _handler: BDMA_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: LPTIM4 }, - Vector { _handler: LPTIM5 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _handler: SAI4 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -impl_rng!(0x48021800); -impl_sdmmc!(SDMMC1, 0x52007000); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -impl_sdmmc!(SDMMC2, 0x48022400); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); diff --git a/embassy-stm32/src/chip/stm32h753zi.rs b/embassy-stm32/src/chip/stm32h753zi.rs deleted file mode 100644 index 7f0e79d8..00000000 --- a/embassy-stm32/src/chip/stm32h753zi.rs +++ /dev/null @@ -1,904 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, ADC3, BDMA, COMP1, COMP2, CRYP, DAC1, DCMI, DMA2D, ETH, - FDCAN1, FDCAN2, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, - PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, - PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, - PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, - PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, - PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, - PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, - PH10, PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, - PI11, PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, PJ10, PJ11, - PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, PK11, PK12, - PK13, PK14, PK15, HASH, I2C1, I2C2, I2C3, I2C4, IWDG1, JPEG, LPTIM1, LPTIM2, LPTIM3, LPTIM4, - LPTIM5, LPUART1, LTDC, MDIOS, MDMA, OPAMP1, OPAMP2, PWR, QUADSPI, RCC, RNG, RTC, SAI1, SAI2, - SAI3, SAI4, SDMMC1, SDMMC2, SPI1, SPI2, SPI3, SPI4, SPI5, SPI6, SWPMI1, SYSCFG, TIM1, TIM12, - TIM13, TIM14, TIM15, TIM16, TIM17, TIM2, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, UART4, UART5, - UART7, UART8, USART1, USART2, USART3, USART6, USB_OTG_FS, USB_OTG_HS, VREFBUF, WWDG1 -); -pub const GPIO_BASE: usize = 0x58020000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC = 18, - ADC3 = 127, - BDMA_Channel0 = 129, - BDMA_Channel1 = 130, - BDMA_Channel2 = 131, - BDMA_Channel3 = 132, - BDMA_Channel4 = 133, - BDMA_Channel5 = 134, - BDMA_Channel6 = 135, - BDMA_Channel7 = 136, - CEC = 94, - CRS = 144, - CRYP = 79, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - ECC = 145, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - HASH_RNG = 80, - HRTIM1_FLT = 109, - HRTIM1_Master = 103, - HRTIM1_TIMA = 104, - HRTIM1_TIMB = 105, - HRTIM1_TIMC = 106, - HRTIM1_TIMD = 107, - HRTIM1_TIME = 108, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - JPEG = 121, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPTIM4 = 140, - LPTIM5 = 141, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OTG_FS = 101, - OTG_FS_EP1_IN = 99, - OTG_FS_EP1_OUT = 98, - OTG_FS_WKUP = 100, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_AVD = 1, - QUADSPI = 92, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SAI3 = 114, - SAI4 = 146, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TAMP_STAMP = 2, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(ADC3); - declare!(BDMA_Channel0); - declare!(BDMA_Channel1); - declare!(BDMA_Channel2); - declare!(BDMA_Channel3); - declare!(BDMA_Channel4); - declare!(BDMA_Channel5); - declare!(BDMA_Channel6); - declare!(BDMA_Channel7); - declare!(CEC); - declare!(CRS); - declare!(CRYP); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(ECC); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HASH_RNG); - declare!(HRTIM1_FLT); - declare!(HRTIM1_Master); - declare!(HRTIM1_TIMA); - declare!(HRTIM1_TIMB); - declare!(HRTIM1_TIMC); - declare!(HRTIM1_TIMD); - declare!(HRTIM1_TIME); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(JPEG); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPTIM4); - declare!(LPTIM5); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OTG_FS); - declare!(OTG_FS_EP1_IN); - declare!(OTG_FS_EP1_OUT); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_AVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SAI3); - declare!(SAI4); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn ADC3(); - fn BDMA_Channel0(); - fn BDMA_Channel1(); - fn BDMA_Channel2(); - fn BDMA_Channel3(); - fn BDMA_Channel4(); - fn BDMA_Channel5(); - fn BDMA_Channel6(); - fn BDMA_Channel7(); - fn CEC(); - fn CRS(); - fn CRYP(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn ECC(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HASH_RNG(); - fn HRTIM1_FLT(); - fn HRTIM1_Master(); - fn HRTIM1_TIMA(); - fn HRTIM1_TIMB(); - fn HRTIM1_TIMC(); - fn HRTIM1_TIMD(); - fn HRTIM1_TIME(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn JPEG(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPTIM4(); - fn LPTIM5(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OTG_FS(); - fn OTG_FS_EP1_IN(); - fn OTG_FS_EP1_OUT(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_AVD(); - fn QUADSPI(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SAI3(); - fn SAI4(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 150] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_AVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _handler: CRYP }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: QUADSPI }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { - _handler: OTG_FS_EP1_OUT, - }, - Vector { - _handler: OTG_FS_EP1_IN, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { _handler: OTG_FS }, - Vector { _reserved: 0 }, - Vector { - _handler: HRTIM1_Master, - }, - Vector { - _handler: HRTIM1_TIMA, - }, - Vector { - _handler: HRTIM1_TIMB, - }, - Vector { - _handler: HRTIM1_TIMC, - }, - Vector { - _handler: HRTIM1_TIMD, - }, - Vector { - _handler: HRTIM1_TIME, - }, - Vector { - _handler: HRTIM1_FLT, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SAI3 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _handler: JPEG }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: ADC3 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA_Channel0, - }, - Vector { - _handler: BDMA_Channel1, - }, - Vector { - _handler: BDMA_Channel2, - }, - Vector { - _handler: BDMA_Channel3, - }, - Vector { - _handler: BDMA_Channel4, - }, - Vector { - _handler: BDMA_Channel5, - }, - Vector { - _handler: BDMA_Channel6, - }, - Vector { - _handler: BDMA_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: LPTIM4 }, - Vector { _handler: LPTIM5 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _handler: SAI4 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -impl_rng!(0x48021800); -impl_sdmmc!(SDMMC1, 0x52007000); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -impl_sdmmc!(SDMMC2, 0x48022400); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); diff --git a/embassy-stm32/src/chip/stm32h755bi.rs b/embassy-stm32/src/chip/stm32h755bi.rs deleted file mode 100644 index 225ca3f5..00000000 --- a/embassy-stm32/src/chip/stm32h755bi.rs +++ /dev/null @@ -1,919 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, ADC3, BDMA, COMP1, COMP2, CRYP, DAC1, DCMI, DMA2D, ETH, - FDCAN1, FDCAN2, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, - PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, - PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, - PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, - PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, - PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, - PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, - PH10, PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, - PI11, PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, PJ10, PJ11, - PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, PK11, PK12, - PK13, PK14, PK15, HASH, I2C1, I2C2, I2C3, I2C4, IWDG1, IWDG2, JPEG, LPTIM1, LPTIM2, LPTIM3, - LPTIM4, LPTIM5, LPUART1, LTDC, MDIOS, MDMA, OPAMP1, OPAMP2, PWR, QUADSPI, RCC, RNG, RTC, SAI1, - SAI2, SAI3, SAI4, SDMMC1, SDMMC2, SPI1, SPI2, SPI3, SPI4, SPI5, SPI6, SWPMI1, SYSCFG, TIM1, - TIM12, TIM13, TIM14, TIM15, TIM16, TIM17, TIM2, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, UART4, - UART5, UART7, UART8, USART1, USART2, USART3, USART6, USB_OTG_FS, USB_OTG_HS, VREFBUF, WWDG1, - WWDG2 -); -pub const GPIO_BASE: usize = 0x58020000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC = 18, - ADC3 = 127, - BDMA_Channel0 = 129, - BDMA_Channel1 = 130, - BDMA_Channel2 = 131, - BDMA_Channel3 = 132, - BDMA_Channel4 = 133, - BDMA_Channel5 = 134, - BDMA_Channel6 = 135, - BDMA_Channel7 = 136, - CEC = 94, - CM4_SEV = 65, - CM7_SEV = 64, - CRS = 144, - CRYP = 79, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - ECC = 145, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - HASH_RNG = 80, - HOLD_CORE = 148, - HRTIM1_FLT = 109, - HRTIM1_Master = 103, - HRTIM1_TIMA = 104, - HRTIM1_TIMB = 105, - HRTIM1_TIMC = 106, - HRTIM1_TIMD = 107, - HRTIM1_TIME = 108, - HSEM1 = 125, - HSEM2 = 126, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - JPEG = 121, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPTIM4 = 140, - LPTIM5 = 141, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OTG_FS = 101, - OTG_FS_EP1_IN = 99, - OTG_FS_EP1_OUT = 98, - OTG_FS_WKUP = 100, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_AVD = 1, - QUADSPI = 92, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SAI3 = 114, - SAI4 = 146, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TAMP_STAMP = 2, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(ADC3); - declare!(BDMA_Channel0); - declare!(BDMA_Channel1); - declare!(BDMA_Channel2); - declare!(BDMA_Channel3); - declare!(BDMA_Channel4); - declare!(BDMA_Channel5); - declare!(BDMA_Channel6); - declare!(BDMA_Channel7); - declare!(CEC); - declare!(CM4_SEV); - declare!(CM7_SEV); - declare!(CRS); - declare!(CRYP); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(ECC); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HASH_RNG); - declare!(HOLD_CORE); - declare!(HRTIM1_FLT); - declare!(HRTIM1_Master); - declare!(HRTIM1_TIMA); - declare!(HRTIM1_TIMB); - declare!(HRTIM1_TIMC); - declare!(HRTIM1_TIMD); - declare!(HRTIM1_TIME); - declare!(HSEM1); - declare!(HSEM2); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(JPEG); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPTIM4); - declare!(LPTIM5); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OTG_FS); - declare!(OTG_FS_EP1_IN); - declare!(OTG_FS_EP1_OUT); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_AVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SAI3); - declare!(SAI4); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn ADC3(); - fn BDMA_Channel0(); - fn BDMA_Channel1(); - fn BDMA_Channel2(); - fn BDMA_Channel3(); - fn BDMA_Channel4(); - fn BDMA_Channel5(); - fn BDMA_Channel6(); - fn BDMA_Channel7(); - fn CEC(); - fn CM4_SEV(); - fn CM7_SEV(); - fn CRS(); - fn CRYP(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn ECC(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HASH_RNG(); - fn HOLD_CORE(); - fn HRTIM1_FLT(); - fn HRTIM1_Master(); - fn HRTIM1_TIMA(); - fn HRTIM1_TIMB(); - fn HRTIM1_TIMC(); - fn HRTIM1_TIMD(); - fn HRTIM1_TIME(); - fn HSEM1(); - fn HSEM2(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn JPEG(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPTIM4(); - fn LPTIM5(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OTG_FS(); - fn OTG_FS_EP1_IN(); - fn OTG_FS_EP1_OUT(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_AVD(); - fn QUADSPI(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SAI3(); - fn SAI4(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 150] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_AVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { _handler: CM7_SEV }, - Vector { _handler: CM4_SEV }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _handler: CRYP }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: QUADSPI }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { - _handler: OTG_FS_EP1_OUT, - }, - Vector { - _handler: OTG_FS_EP1_IN, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { _handler: OTG_FS }, - Vector { _reserved: 0 }, - Vector { - _handler: HRTIM1_Master, - }, - Vector { - _handler: HRTIM1_TIMA, - }, - Vector { - _handler: HRTIM1_TIMB, - }, - Vector { - _handler: HRTIM1_TIMC, - }, - Vector { - _handler: HRTIM1_TIMD, - }, - Vector { - _handler: HRTIM1_TIME, - }, - Vector { - _handler: HRTIM1_FLT, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SAI3 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _handler: JPEG }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _handler: HSEM2 }, - Vector { _handler: ADC3 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA_Channel0, - }, - Vector { - _handler: BDMA_Channel1, - }, - Vector { - _handler: BDMA_Channel2, - }, - Vector { - _handler: BDMA_Channel3, - }, - Vector { - _handler: BDMA_Channel4, - }, - Vector { - _handler: BDMA_Channel5, - }, - Vector { - _handler: BDMA_Channel6, - }, - Vector { - _handler: BDMA_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: LPTIM4 }, - Vector { _handler: LPTIM5 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _handler: SAI4 }, - Vector { _reserved: 0 }, - Vector { - _handler: HOLD_CORE, - }, - Vector { - _handler: WAKEUP_PIN, - }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -impl_rng!(0x48021800); -impl_sdmmc!(SDMMC1, 0x52007000); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -impl_sdmmc!(SDMMC2, 0x48022400); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); diff --git a/embassy-stm32/src/chip/stm32h755ii.rs b/embassy-stm32/src/chip/stm32h755ii.rs deleted file mode 100644 index 225ca3f5..00000000 --- a/embassy-stm32/src/chip/stm32h755ii.rs +++ /dev/null @@ -1,919 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, ADC3, BDMA, COMP1, COMP2, CRYP, DAC1, DCMI, DMA2D, ETH, - FDCAN1, FDCAN2, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, - PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, - PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, - PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, - PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, - PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, - PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, - PH10, PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, - PI11, PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, PJ10, PJ11, - PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, PK11, PK12, - PK13, PK14, PK15, HASH, I2C1, I2C2, I2C3, I2C4, IWDG1, IWDG2, JPEG, LPTIM1, LPTIM2, LPTIM3, - LPTIM4, LPTIM5, LPUART1, LTDC, MDIOS, MDMA, OPAMP1, OPAMP2, PWR, QUADSPI, RCC, RNG, RTC, SAI1, - SAI2, SAI3, SAI4, SDMMC1, SDMMC2, SPI1, SPI2, SPI3, SPI4, SPI5, SPI6, SWPMI1, SYSCFG, TIM1, - TIM12, TIM13, TIM14, TIM15, TIM16, TIM17, TIM2, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, UART4, - UART5, UART7, UART8, USART1, USART2, USART3, USART6, USB_OTG_FS, USB_OTG_HS, VREFBUF, WWDG1, - WWDG2 -); -pub const GPIO_BASE: usize = 0x58020000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC = 18, - ADC3 = 127, - BDMA_Channel0 = 129, - BDMA_Channel1 = 130, - BDMA_Channel2 = 131, - BDMA_Channel3 = 132, - BDMA_Channel4 = 133, - BDMA_Channel5 = 134, - BDMA_Channel6 = 135, - BDMA_Channel7 = 136, - CEC = 94, - CM4_SEV = 65, - CM7_SEV = 64, - CRS = 144, - CRYP = 79, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - ECC = 145, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - HASH_RNG = 80, - HOLD_CORE = 148, - HRTIM1_FLT = 109, - HRTIM1_Master = 103, - HRTIM1_TIMA = 104, - HRTIM1_TIMB = 105, - HRTIM1_TIMC = 106, - HRTIM1_TIMD = 107, - HRTIM1_TIME = 108, - HSEM1 = 125, - HSEM2 = 126, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - JPEG = 121, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPTIM4 = 140, - LPTIM5 = 141, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OTG_FS = 101, - OTG_FS_EP1_IN = 99, - OTG_FS_EP1_OUT = 98, - OTG_FS_WKUP = 100, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_AVD = 1, - QUADSPI = 92, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SAI3 = 114, - SAI4 = 146, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TAMP_STAMP = 2, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(ADC3); - declare!(BDMA_Channel0); - declare!(BDMA_Channel1); - declare!(BDMA_Channel2); - declare!(BDMA_Channel3); - declare!(BDMA_Channel4); - declare!(BDMA_Channel5); - declare!(BDMA_Channel6); - declare!(BDMA_Channel7); - declare!(CEC); - declare!(CM4_SEV); - declare!(CM7_SEV); - declare!(CRS); - declare!(CRYP); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(ECC); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HASH_RNG); - declare!(HOLD_CORE); - declare!(HRTIM1_FLT); - declare!(HRTIM1_Master); - declare!(HRTIM1_TIMA); - declare!(HRTIM1_TIMB); - declare!(HRTIM1_TIMC); - declare!(HRTIM1_TIMD); - declare!(HRTIM1_TIME); - declare!(HSEM1); - declare!(HSEM2); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(JPEG); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPTIM4); - declare!(LPTIM5); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OTG_FS); - declare!(OTG_FS_EP1_IN); - declare!(OTG_FS_EP1_OUT); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_AVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SAI3); - declare!(SAI4); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn ADC3(); - fn BDMA_Channel0(); - fn BDMA_Channel1(); - fn BDMA_Channel2(); - fn BDMA_Channel3(); - fn BDMA_Channel4(); - fn BDMA_Channel5(); - fn BDMA_Channel6(); - fn BDMA_Channel7(); - fn CEC(); - fn CM4_SEV(); - fn CM7_SEV(); - fn CRS(); - fn CRYP(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn ECC(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HASH_RNG(); - fn HOLD_CORE(); - fn HRTIM1_FLT(); - fn HRTIM1_Master(); - fn HRTIM1_TIMA(); - fn HRTIM1_TIMB(); - fn HRTIM1_TIMC(); - fn HRTIM1_TIMD(); - fn HRTIM1_TIME(); - fn HSEM1(); - fn HSEM2(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn JPEG(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPTIM4(); - fn LPTIM5(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OTG_FS(); - fn OTG_FS_EP1_IN(); - fn OTG_FS_EP1_OUT(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_AVD(); - fn QUADSPI(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SAI3(); - fn SAI4(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 150] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_AVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { _handler: CM7_SEV }, - Vector { _handler: CM4_SEV }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _handler: CRYP }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: QUADSPI }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { - _handler: OTG_FS_EP1_OUT, - }, - Vector { - _handler: OTG_FS_EP1_IN, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { _handler: OTG_FS }, - Vector { _reserved: 0 }, - Vector { - _handler: HRTIM1_Master, - }, - Vector { - _handler: HRTIM1_TIMA, - }, - Vector { - _handler: HRTIM1_TIMB, - }, - Vector { - _handler: HRTIM1_TIMC, - }, - Vector { - _handler: HRTIM1_TIMD, - }, - Vector { - _handler: HRTIM1_TIME, - }, - Vector { - _handler: HRTIM1_FLT, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SAI3 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _handler: JPEG }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _handler: HSEM2 }, - Vector { _handler: ADC3 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA_Channel0, - }, - Vector { - _handler: BDMA_Channel1, - }, - Vector { - _handler: BDMA_Channel2, - }, - Vector { - _handler: BDMA_Channel3, - }, - Vector { - _handler: BDMA_Channel4, - }, - Vector { - _handler: BDMA_Channel5, - }, - Vector { - _handler: BDMA_Channel6, - }, - Vector { - _handler: BDMA_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: LPTIM4 }, - Vector { _handler: LPTIM5 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _handler: SAI4 }, - Vector { _reserved: 0 }, - Vector { - _handler: HOLD_CORE, - }, - Vector { - _handler: WAKEUP_PIN, - }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -impl_rng!(0x48021800); -impl_sdmmc!(SDMMC1, 0x52007000); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -impl_sdmmc!(SDMMC2, 0x48022400); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); diff --git a/embassy-stm32/src/chip/stm32h755xi.rs b/embassy-stm32/src/chip/stm32h755xi.rs deleted file mode 100644 index 225ca3f5..00000000 --- a/embassy-stm32/src/chip/stm32h755xi.rs +++ /dev/null @@ -1,919 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, ADC3, BDMA, COMP1, COMP2, CRYP, DAC1, DCMI, DMA2D, ETH, - FDCAN1, FDCAN2, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, - PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, - PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, - PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, - PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, - PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, - PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, - PH10, PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, - PI11, PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, PJ10, PJ11, - PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, PK11, PK12, - PK13, PK14, PK15, HASH, I2C1, I2C2, I2C3, I2C4, IWDG1, IWDG2, JPEG, LPTIM1, LPTIM2, LPTIM3, - LPTIM4, LPTIM5, LPUART1, LTDC, MDIOS, MDMA, OPAMP1, OPAMP2, PWR, QUADSPI, RCC, RNG, RTC, SAI1, - SAI2, SAI3, SAI4, SDMMC1, SDMMC2, SPI1, SPI2, SPI3, SPI4, SPI5, SPI6, SWPMI1, SYSCFG, TIM1, - TIM12, TIM13, TIM14, TIM15, TIM16, TIM17, TIM2, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, UART4, - UART5, UART7, UART8, USART1, USART2, USART3, USART6, USB_OTG_FS, USB_OTG_HS, VREFBUF, WWDG1, - WWDG2 -); -pub const GPIO_BASE: usize = 0x58020000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC = 18, - ADC3 = 127, - BDMA_Channel0 = 129, - BDMA_Channel1 = 130, - BDMA_Channel2 = 131, - BDMA_Channel3 = 132, - BDMA_Channel4 = 133, - BDMA_Channel5 = 134, - BDMA_Channel6 = 135, - BDMA_Channel7 = 136, - CEC = 94, - CM4_SEV = 65, - CM7_SEV = 64, - CRS = 144, - CRYP = 79, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - ECC = 145, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - HASH_RNG = 80, - HOLD_CORE = 148, - HRTIM1_FLT = 109, - HRTIM1_Master = 103, - HRTIM1_TIMA = 104, - HRTIM1_TIMB = 105, - HRTIM1_TIMC = 106, - HRTIM1_TIMD = 107, - HRTIM1_TIME = 108, - HSEM1 = 125, - HSEM2 = 126, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - JPEG = 121, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPTIM4 = 140, - LPTIM5 = 141, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OTG_FS = 101, - OTG_FS_EP1_IN = 99, - OTG_FS_EP1_OUT = 98, - OTG_FS_WKUP = 100, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_AVD = 1, - QUADSPI = 92, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SAI3 = 114, - SAI4 = 146, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TAMP_STAMP = 2, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(ADC3); - declare!(BDMA_Channel0); - declare!(BDMA_Channel1); - declare!(BDMA_Channel2); - declare!(BDMA_Channel3); - declare!(BDMA_Channel4); - declare!(BDMA_Channel5); - declare!(BDMA_Channel6); - declare!(BDMA_Channel7); - declare!(CEC); - declare!(CM4_SEV); - declare!(CM7_SEV); - declare!(CRS); - declare!(CRYP); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(ECC); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HASH_RNG); - declare!(HOLD_CORE); - declare!(HRTIM1_FLT); - declare!(HRTIM1_Master); - declare!(HRTIM1_TIMA); - declare!(HRTIM1_TIMB); - declare!(HRTIM1_TIMC); - declare!(HRTIM1_TIMD); - declare!(HRTIM1_TIME); - declare!(HSEM1); - declare!(HSEM2); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(JPEG); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPTIM4); - declare!(LPTIM5); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OTG_FS); - declare!(OTG_FS_EP1_IN); - declare!(OTG_FS_EP1_OUT); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_AVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SAI3); - declare!(SAI4); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn ADC3(); - fn BDMA_Channel0(); - fn BDMA_Channel1(); - fn BDMA_Channel2(); - fn BDMA_Channel3(); - fn BDMA_Channel4(); - fn BDMA_Channel5(); - fn BDMA_Channel6(); - fn BDMA_Channel7(); - fn CEC(); - fn CM4_SEV(); - fn CM7_SEV(); - fn CRS(); - fn CRYP(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn ECC(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HASH_RNG(); - fn HOLD_CORE(); - fn HRTIM1_FLT(); - fn HRTIM1_Master(); - fn HRTIM1_TIMA(); - fn HRTIM1_TIMB(); - fn HRTIM1_TIMC(); - fn HRTIM1_TIMD(); - fn HRTIM1_TIME(); - fn HSEM1(); - fn HSEM2(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn JPEG(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPTIM4(); - fn LPTIM5(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OTG_FS(); - fn OTG_FS_EP1_IN(); - fn OTG_FS_EP1_OUT(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_AVD(); - fn QUADSPI(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SAI3(); - fn SAI4(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 150] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_AVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { _handler: CM7_SEV }, - Vector { _handler: CM4_SEV }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _handler: CRYP }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: QUADSPI }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { - _handler: OTG_FS_EP1_OUT, - }, - Vector { - _handler: OTG_FS_EP1_IN, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { _handler: OTG_FS }, - Vector { _reserved: 0 }, - Vector { - _handler: HRTIM1_Master, - }, - Vector { - _handler: HRTIM1_TIMA, - }, - Vector { - _handler: HRTIM1_TIMB, - }, - Vector { - _handler: HRTIM1_TIMC, - }, - Vector { - _handler: HRTIM1_TIMD, - }, - Vector { - _handler: HRTIM1_TIME, - }, - Vector { - _handler: HRTIM1_FLT, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SAI3 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _handler: JPEG }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _handler: HSEM2 }, - Vector { _handler: ADC3 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA_Channel0, - }, - Vector { - _handler: BDMA_Channel1, - }, - Vector { - _handler: BDMA_Channel2, - }, - Vector { - _handler: BDMA_Channel3, - }, - Vector { - _handler: BDMA_Channel4, - }, - Vector { - _handler: BDMA_Channel5, - }, - Vector { - _handler: BDMA_Channel6, - }, - Vector { - _handler: BDMA_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: LPTIM4 }, - Vector { _handler: LPTIM5 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _handler: SAI4 }, - Vector { _reserved: 0 }, - Vector { - _handler: HOLD_CORE, - }, - Vector { - _handler: WAKEUP_PIN, - }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -impl_rng!(0x48021800); -impl_sdmmc!(SDMMC1, 0x52007000); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -impl_sdmmc!(SDMMC2, 0x48022400); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); diff --git a/embassy-stm32/src/chip/stm32h755zi.rs b/embassy-stm32/src/chip/stm32h755zi.rs deleted file mode 100644 index 225ca3f5..00000000 --- a/embassy-stm32/src/chip/stm32h755zi.rs +++ /dev/null @@ -1,919 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, ADC3, BDMA, COMP1, COMP2, CRYP, DAC1, DCMI, DMA2D, ETH, - FDCAN1, FDCAN2, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, - PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, - PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, - PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, - PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, - PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, - PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, - PH10, PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, - PI11, PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, PJ10, PJ11, - PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, PK11, PK12, - PK13, PK14, PK15, HASH, I2C1, I2C2, I2C3, I2C4, IWDG1, IWDG2, JPEG, LPTIM1, LPTIM2, LPTIM3, - LPTIM4, LPTIM5, LPUART1, LTDC, MDIOS, MDMA, OPAMP1, OPAMP2, PWR, QUADSPI, RCC, RNG, RTC, SAI1, - SAI2, SAI3, SAI4, SDMMC1, SDMMC2, SPI1, SPI2, SPI3, SPI4, SPI5, SPI6, SWPMI1, SYSCFG, TIM1, - TIM12, TIM13, TIM14, TIM15, TIM16, TIM17, TIM2, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, UART4, - UART5, UART7, UART8, USART1, USART2, USART3, USART6, USB_OTG_FS, USB_OTG_HS, VREFBUF, WWDG1, - WWDG2 -); -pub const GPIO_BASE: usize = 0x58020000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC = 18, - ADC3 = 127, - BDMA_Channel0 = 129, - BDMA_Channel1 = 130, - BDMA_Channel2 = 131, - BDMA_Channel3 = 132, - BDMA_Channel4 = 133, - BDMA_Channel5 = 134, - BDMA_Channel6 = 135, - BDMA_Channel7 = 136, - CEC = 94, - CM4_SEV = 65, - CM7_SEV = 64, - CRS = 144, - CRYP = 79, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - ECC = 145, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - HASH_RNG = 80, - HOLD_CORE = 148, - HRTIM1_FLT = 109, - HRTIM1_Master = 103, - HRTIM1_TIMA = 104, - HRTIM1_TIMB = 105, - HRTIM1_TIMC = 106, - HRTIM1_TIMD = 107, - HRTIM1_TIME = 108, - HSEM1 = 125, - HSEM2 = 126, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - JPEG = 121, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPTIM4 = 140, - LPTIM5 = 141, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OTG_FS = 101, - OTG_FS_EP1_IN = 99, - OTG_FS_EP1_OUT = 98, - OTG_FS_WKUP = 100, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_AVD = 1, - QUADSPI = 92, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SAI3 = 114, - SAI4 = 146, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TAMP_STAMP = 2, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(ADC3); - declare!(BDMA_Channel0); - declare!(BDMA_Channel1); - declare!(BDMA_Channel2); - declare!(BDMA_Channel3); - declare!(BDMA_Channel4); - declare!(BDMA_Channel5); - declare!(BDMA_Channel6); - declare!(BDMA_Channel7); - declare!(CEC); - declare!(CM4_SEV); - declare!(CM7_SEV); - declare!(CRS); - declare!(CRYP); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(ECC); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HASH_RNG); - declare!(HOLD_CORE); - declare!(HRTIM1_FLT); - declare!(HRTIM1_Master); - declare!(HRTIM1_TIMA); - declare!(HRTIM1_TIMB); - declare!(HRTIM1_TIMC); - declare!(HRTIM1_TIMD); - declare!(HRTIM1_TIME); - declare!(HSEM1); - declare!(HSEM2); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(JPEG); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPTIM4); - declare!(LPTIM5); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OTG_FS); - declare!(OTG_FS_EP1_IN); - declare!(OTG_FS_EP1_OUT); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_AVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SAI3); - declare!(SAI4); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn ADC3(); - fn BDMA_Channel0(); - fn BDMA_Channel1(); - fn BDMA_Channel2(); - fn BDMA_Channel3(); - fn BDMA_Channel4(); - fn BDMA_Channel5(); - fn BDMA_Channel6(); - fn BDMA_Channel7(); - fn CEC(); - fn CM4_SEV(); - fn CM7_SEV(); - fn CRS(); - fn CRYP(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn ECC(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HASH_RNG(); - fn HOLD_CORE(); - fn HRTIM1_FLT(); - fn HRTIM1_Master(); - fn HRTIM1_TIMA(); - fn HRTIM1_TIMB(); - fn HRTIM1_TIMC(); - fn HRTIM1_TIMD(); - fn HRTIM1_TIME(); - fn HSEM1(); - fn HSEM2(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn JPEG(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPTIM4(); - fn LPTIM5(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OTG_FS(); - fn OTG_FS_EP1_IN(); - fn OTG_FS_EP1_OUT(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_AVD(); - fn QUADSPI(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SAI3(); - fn SAI4(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 150] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_AVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { _handler: CM7_SEV }, - Vector { _handler: CM4_SEV }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _handler: CRYP }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: QUADSPI }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { - _handler: OTG_FS_EP1_OUT, - }, - Vector { - _handler: OTG_FS_EP1_IN, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { _handler: OTG_FS }, - Vector { _reserved: 0 }, - Vector { - _handler: HRTIM1_Master, - }, - Vector { - _handler: HRTIM1_TIMA, - }, - Vector { - _handler: HRTIM1_TIMB, - }, - Vector { - _handler: HRTIM1_TIMC, - }, - Vector { - _handler: HRTIM1_TIMD, - }, - Vector { - _handler: HRTIM1_TIME, - }, - Vector { - _handler: HRTIM1_FLT, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SAI3 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _handler: JPEG }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _handler: HSEM2 }, - Vector { _handler: ADC3 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA_Channel0, - }, - Vector { - _handler: BDMA_Channel1, - }, - Vector { - _handler: BDMA_Channel2, - }, - Vector { - _handler: BDMA_Channel3, - }, - Vector { - _handler: BDMA_Channel4, - }, - Vector { - _handler: BDMA_Channel5, - }, - Vector { - _handler: BDMA_Channel6, - }, - Vector { - _handler: BDMA_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: LPTIM4 }, - Vector { _handler: LPTIM5 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _handler: SAI4 }, - Vector { _reserved: 0 }, - Vector { - _handler: HOLD_CORE, - }, - Vector { - _handler: WAKEUP_PIN, - }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -impl_rng!(0x48021800); -impl_sdmmc!(SDMMC1, 0x52007000); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -impl_sdmmc!(SDMMC2, 0x48022400); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); diff --git a/embassy-stm32/src/chip/stm32h757ai.rs b/embassy-stm32/src/chip/stm32h757ai.rs deleted file mode 100644 index 90d611be..00000000 --- a/embassy-stm32/src/chip/stm32h757ai.rs +++ /dev/null @@ -1,922 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, ADC3, BDMA, COMP1, COMP2, CRYP, DAC1, DCMI, DMA2D, ETH, - FDCAN1, FDCAN2, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, - PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, - PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, - PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, - PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, - PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, - PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, - PH10, PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, - PI11, PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, PJ10, PJ11, - PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, PK11, PK12, - PK13, PK14, PK15, HASH, I2C1, I2C2, I2C3, I2C4, IWDG1, IWDG2, JPEG, LPTIM1, LPTIM2, LPTIM3, - LPTIM4, LPTIM5, LPUART1, LTDC, MDIOS, MDMA, OPAMP1, OPAMP2, PWR, QUADSPI, RCC, RNG, RTC, SAI1, - SAI2, SAI3, SAI4, SDMMC1, SDMMC2, SPI1, SPI2, SPI3, SPI4, SPI5, SPI6, SWPMI1, SYSCFG, TIM1, - TIM12, TIM13, TIM14, TIM15, TIM16, TIM17, TIM2, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, UART4, - UART5, UART7, UART8, USART1, USART2, USART3, USART6, USB_OTG_FS, USB_OTG_HS, VREFBUF, WWDG1, - WWDG2 -); -pub const GPIO_BASE: usize = 0x58020000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC = 18, - ADC3 = 127, - BDMA_Channel0 = 129, - BDMA_Channel1 = 130, - BDMA_Channel2 = 131, - BDMA_Channel3 = 132, - BDMA_Channel4 = 133, - BDMA_Channel5 = 134, - BDMA_Channel6 = 135, - BDMA_Channel7 = 136, - CEC = 94, - CM4_SEV = 65, - CM7_SEV = 64, - CRS = 144, - CRYP = 79, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - DSI = 123, - ECC = 145, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - HASH_RNG = 80, - HOLD_CORE = 148, - HRTIM1_FLT = 109, - HRTIM1_Master = 103, - HRTIM1_TIMA = 104, - HRTIM1_TIMB = 105, - HRTIM1_TIMC = 106, - HRTIM1_TIMD = 107, - HRTIM1_TIME = 108, - HSEM1 = 125, - HSEM2 = 126, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - JPEG = 121, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPTIM4 = 140, - LPTIM5 = 141, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OTG_FS = 101, - OTG_FS_EP1_IN = 99, - OTG_FS_EP1_OUT = 98, - OTG_FS_WKUP = 100, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_AVD = 1, - QUADSPI = 92, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SAI3 = 114, - SAI4 = 146, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TAMP_STAMP = 2, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(ADC3); - declare!(BDMA_Channel0); - declare!(BDMA_Channel1); - declare!(BDMA_Channel2); - declare!(BDMA_Channel3); - declare!(BDMA_Channel4); - declare!(BDMA_Channel5); - declare!(BDMA_Channel6); - declare!(BDMA_Channel7); - declare!(CEC); - declare!(CM4_SEV); - declare!(CM7_SEV); - declare!(CRS); - declare!(CRYP); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(DSI); - declare!(ECC); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HASH_RNG); - declare!(HOLD_CORE); - declare!(HRTIM1_FLT); - declare!(HRTIM1_Master); - declare!(HRTIM1_TIMA); - declare!(HRTIM1_TIMB); - declare!(HRTIM1_TIMC); - declare!(HRTIM1_TIMD); - declare!(HRTIM1_TIME); - declare!(HSEM1); - declare!(HSEM2); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(JPEG); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPTIM4); - declare!(LPTIM5); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OTG_FS); - declare!(OTG_FS_EP1_IN); - declare!(OTG_FS_EP1_OUT); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_AVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SAI3); - declare!(SAI4); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn ADC3(); - fn BDMA_Channel0(); - fn BDMA_Channel1(); - fn BDMA_Channel2(); - fn BDMA_Channel3(); - fn BDMA_Channel4(); - fn BDMA_Channel5(); - fn BDMA_Channel6(); - fn BDMA_Channel7(); - fn CEC(); - fn CM4_SEV(); - fn CM7_SEV(); - fn CRS(); - fn CRYP(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn DSI(); - fn ECC(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HASH_RNG(); - fn HOLD_CORE(); - fn HRTIM1_FLT(); - fn HRTIM1_Master(); - fn HRTIM1_TIMA(); - fn HRTIM1_TIMB(); - fn HRTIM1_TIMC(); - fn HRTIM1_TIMD(); - fn HRTIM1_TIME(); - fn HSEM1(); - fn HSEM2(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn JPEG(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPTIM4(); - fn LPTIM5(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OTG_FS(); - fn OTG_FS_EP1_IN(); - fn OTG_FS_EP1_OUT(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_AVD(); - fn QUADSPI(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SAI3(); - fn SAI4(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 150] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_AVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { _handler: CM7_SEV }, - Vector { _handler: CM4_SEV }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _handler: CRYP }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: QUADSPI }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { - _handler: OTG_FS_EP1_OUT, - }, - Vector { - _handler: OTG_FS_EP1_IN, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { _handler: OTG_FS }, - Vector { _reserved: 0 }, - Vector { - _handler: HRTIM1_Master, - }, - Vector { - _handler: HRTIM1_TIMA, - }, - Vector { - _handler: HRTIM1_TIMB, - }, - Vector { - _handler: HRTIM1_TIMC, - }, - Vector { - _handler: HRTIM1_TIMD, - }, - Vector { - _handler: HRTIM1_TIME, - }, - Vector { - _handler: HRTIM1_FLT, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SAI3 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _handler: JPEG }, - Vector { _handler: MDMA }, - Vector { _handler: DSI }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _handler: HSEM2 }, - Vector { _handler: ADC3 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA_Channel0, - }, - Vector { - _handler: BDMA_Channel1, - }, - Vector { - _handler: BDMA_Channel2, - }, - Vector { - _handler: BDMA_Channel3, - }, - Vector { - _handler: BDMA_Channel4, - }, - Vector { - _handler: BDMA_Channel5, - }, - Vector { - _handler: BDMA_Channel6, - }, - Vector { - _handler: BDMA_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: LPTIM4 }, - Vector { _handler: LPTIM5 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _handler: SAI4 }, - Vector { _reserved: 0 }, - Vector { - _handler: HOLD_CORE, - }, - Vector { - _handler: WAKEUP_PIN, - }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -impl_rng!(0x48021800); -impl_sdmmc!(SDMMC1, 0x52007000); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -impl_sdmmc!(SDMMC2, 0x48022400); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); diff --git a/embassy-stm32/src/chip/stm32h757bi.rs b/embassy-stm32/src/chip/stm32h757bi.rs deleted file mode 100644 index 90d611be..00000000 --- a/embassy-stm32/src/chip/stm32h757bi.rs +++ /dev/null @@ -1,922 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, ADC3, BDMA, COMP1, COMP2, CRYP, DAC1, DCMI, DMA2D, ETH, - FDCAN1, FDCAN2, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, - PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, - PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, - PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, - PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, - PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, - PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, - PH10, PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, - PI11, PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, PJ10, PJ11, - PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, PK11, PK12, - PK13, PK14, PK15, HASH, I2C1, I2C2, I2C3, I2C4, IWDG1, IWDG2, JPEG, LPTIM1, LPTIM2, LPTIM3, - LPTIM4, LPTIM5, LPUART1, LTDC, MDIOS, MDMA, OPAMP1, OPAMP2, PWR, QUADSPI, RCC, RNG, RTC, SAI1, - SAI2, SAI3, SAI4, SDMMC1, SDMMC2, SPI1, SPI2, SPI3, SPI4, SPI5, SPI6, SWPMI1, SYSCFG, TIM1, - TIM12, TIM13, TIM14, TIM15, TIM16, TIM17, TIM2, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, UART4, - UART5, UART7, UART8, USART1, USART2, USART3, USART6, USB_OTG_FS, USB_OTG_HS, VREFBUF, WWDG1, - WWDG2 -); -pub const GPIO_BASE: usize = 0x58020000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC = 18, - ADC3 = 127, - BDMA_Channel0 = 129, - BDMA_Channel1 = 130, - BDMA_Channel2 = 131, - BDMA_Channel3 = 132, - BDMA_Channel4 = 133, - BDMA_Channel5 = 134, - BDMA_Channel6 = 135, - BDMA_Channel7 = 136, - CEC = 94, - CM4_SEV = 65, - CM7_SEV = 64, - CRS = 144, - CRYP = 79, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - DSI = 123, - ECC = 145, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - HASH_RNG = 80, - HOLD_CORE = 148, - HRTIM1_FLT = 109, - HRTIM1_Master = 103, - HRTIM1_TIMA = 104, - HRTIM1_TIMB = 105, - HRTIM1_TIMC = 106, - HRTIM1_TIMD = 107, - HRTIM1_TIME = 108, - HSEM1 = 125, - HSEM2 = 126, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - JPEG = 121, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPTIM4 = 140, - LPTIM5 = 141, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OTG_FS = 101, - OTG_FS_EP1_IN = 99, - OTG_FS_EP1_OUT = 98, - OTG_FS_WKUP = 100, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_AVD = 1, - QUADSPI = 92, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SAI3 = 114, - SAI4 = 146, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TAMP_STAMP = 2, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(ADC3); - declare!(BDMA_Channel0); - declare!(BDMA_Channel1); - declare!(BDMA_Channel2); - declare!(BDMA_Channel3); - declare!(BDMA_Channel4); - declare!(BDMA_Channel5); - declare!(BDMA_Channel6); - declare!(BDMA_Channel7); - declare!(CEC); - declare!(CM4_SEV); - declare!(CM7_SEV); - declare!(CRS); - declare!(CRYP); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(DSI); - declare!(ECC); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HASH_RNG); - declare!(HOLD_CORE); - declare!(HRTIM1_FLT); - declare!(HRTIM1_Master); - declare!(HRTIM1_TIMA); - declare!(HRTIM1_TIMB); - declare!(HRTIM1_TIMC); - declare!(HRTIM1_TIMD); - declare!(HRTIM1_TIME); - declare!(HSEM1); - declare!(HSEM2); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(JPEG); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPTIM4); - declare!(LPTIM5); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OTG_FS); - declare!(OTG_FS_EP1_IN); - declare!(OTG_FS_EP1_OUT); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_AVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SAI3); - declare!(SAI4); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn ADC3(); - fn BDMA_Channel0(); - fn BDMA_Channel1(); - fn BDMA_Channel2(); - fn BDMA_Channel3(); - fn BDMA_Channel4(); - fn BDMA_Channel5(); - fn BDMA_Channel6(); - fn BDMA_Channel7(); - fn CEC(); - fn CM4_SEV(); - fn CM7_SEV(); - fn CRS(); - fn CRYP(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn DSI(); - fn ECC(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HASH_RNG(); - fn HOLD_CORE(); - fn HRTIM1_FLT(); - fn HRTIM1_Master(); - fn HRTIM1_TIMA(); - fn HRTIM1_TIMB(); - fn HRTIM1_TIMC(); - fn HRTIM1_TIMD(); - fn HRTIM1_TIME(); - fn HSEM1(); - fn HSEM2(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn JPEG(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPTIM4(); - fn LPTIM5(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OTG_FS(); - fn OTG_FS_EP1_IN(); - fn OTG_FS_EP1_OUT(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_AVD(); - fn QUADSPI(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SAI3(); - fn SAI4(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 150] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_AVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { _handler: CM7_SEV }, - Vector { _handler: CM4_SEV }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _handler: CRYP }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: QUADSPI }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { - _handler: OTG_FS_EP1_OUT, - }, - Vector { - _handler: OTG_FS_EP1_IN, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { _handler: OTG_FS }, - Vector { _reserved: 0 }, - Vector { - _handler: HRTIM1_Master, - }, - Vector { - _handler: HRTIM1_TIMA, - }, - Vector { - _handler: HRTIM1_TIMB, - }, - Vector { - _handler: HRTIM1_TIMC, - }, - Vector { - _handler: HRTIM1_TIMD, - }, - Vector { - _handler: HRTIM1_TIME, - }, - Vector { - _handler: HRTIM1_FLT, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SAI3 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _handler: JPEG }, - Vector { _handler: MDMA }, - Vector { _handler: DSI }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _handler: HSEM2 }, - Vector { _handler: ADC3 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA_Channel0, - }, - Vector { - _handler: BDMA_Channel1, - }, - Vector { - _handler: BDMA_Channel2, - }, - Vector { - _handler: BDMA_Channel3, - }, - Vector { - _handler: BDMA_Channel4, - }, - Vector { - _handler: BDMA_Channel5, - }, - Vector { - _handler: BDMA_Channel6, - }, - Vector { - _handler: BDMA_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: LPTIM4 }, - Vector { _handler: LPTIM5 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _handler: SAI4 }, - Vector { _reserved: 0 }, - Vector { - _handler: HOLD_CORE, - }, - Vector { - _handler: WAKEUP_PIN, - }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -impl_rng!(0x48021800); -impl_sdmmc!(SDMMC1, 0x52007000); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -impl_sdmmc!(SDMMC2, 0x48022400); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); diff --git a/embassy-stm32/src/chip/stm32h757ii.rs b/embassy-stm32/src/chip/stm32h757ii.rs deleted file mode 100644 index 90d611be..00000000 --- a/embassy-stm32/src/chip/stm32h757ii.rs +++ /dev/null @@ -1,922 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, ADC3, BDMA, COMP1, COMP2, CRYP, DAC1, DCMI, DMA2D, ETH, - FDCAN1, FDCAN2, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, - PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, - PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, - PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, - PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, - PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, - PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, - PH10, PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, - PI11, PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, PJ10, PJ11, - PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, PK11, PK12, - PK13, PK14, PK15, HASH, I2C1, I2C2, I2C3, I2C4, IWDG1, IWDG2, JPEG, LPTIM1, LPTIM2, LPTIM3, - LPTIM4, LPTIM5, LPUART1, LTDC, MDIOS, MDMA, OPAMP1, OPAMP2, PWR, QUADSPI, RCC, RNG, RTC, SAI1, - SAI2, SAI3, SAI4, SDMMC1, SDMMC2, SPI1, SPI2, SPI3, SPI4, SPI5, SPI6, SWPMI1, SYSCFG, TIM1, - TIM12, TIM13, TIM14, TIM15, TIM16, TIM17, TIM2, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, UART4, - UART5, UART7, UART8, USART1, USART2, USART3, USART6, USB_OTG_FS, USB_OTG_HS, VREFBUF, WWDG1, - WWDG2 -); -pub const GPIO_BASE: usize = 0x58020000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC = 18, - ADC3 = 127, - BDMA_Channel0 = 129, - BDMA_Channel1 = 130, - BDMA_Channel2 = 131, - BDMA_Channel3 = 132, - BDMA_Channel4 = 133, - BDMA_Channel5 = 134, - BDMA_Channel6 = 135, - BDMA_Channel7 = 136, - CEC = 94, - CM4_SEV = 65, - CM7_SEV = 64, - CRS = 144, - CRYP = 79, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - DSI = 123, - ECC = 145, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - HASH_RNG = 80, - HOLD_CORE = 148, - HRTIM1_FLT = 109, - HRTIM1_Master = 103, - HRTIM1_TIMA = 104, - HRTIM1_TIMB = 105, - HRTIM1_TIMC = 106, - HRTIM1_TIMD = 107, - HRTIM1_TIME = 108, - HSEM1 = 125, - HSEM2 = 126, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - JPEG = 121, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPTIM4 = 140, - LPTIM5 = 141, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OTG_FS = 101, - OTG_FS_EP1_IN = 99, - OTG_FS_EP1_OUT = 98, - OTG_FS_WKUP = 100, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_AVD = 1, - QUADSPI = 92, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SAI3 = 114, - SAI4 = 146, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TAMP_STAMP = 2, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(ADC3); - declare!(BDMA_Channel0); - declare!(BDMA_Channel1); - declare!(BDMA_Channel2); - declare!(BDMA_Channel3); - declare!(BDMA_Channel4); - declare!(BDMA_Channel5); - declare!(BDMA_Channel6); - declare!(BDMA_Channel7); - declare!(CEC); - declare!(CM4_SEV); - declare!(CM7_SEV); - declare!(CRS); - declare!(CRYP); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(DSI); - declare!(ECC); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HASH_RNG); - declare!(HOLD_CORE); - declare!(HRTIM1_FLT); - declare!(HRTIM1_Master); - declare!(HRTIM1_TIMA); - declare!(HRTIM1_TIMB); - declare!(HRTIM1_TIMC); - declare!(HRTIM1_TIMD); - declare!(HRTIM1_TIME); - declare!(HSEM1); - declare!(HSEM2); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(JPEG); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPTIM4); - declare!(LPTIM5); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OTG_FS); - declare!(OTG_FS_EP1_IN); - declare!(OTG_FS_EP1_OUT); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_AVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SAI3); - declare!(SAI4); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn ADC3(); - fn BDMA_Channel0(); - fn BDMA_Channel1(); - fn BDMA_Channel2(); - fn BDMA_Channel3(); - fn BDMA_Channel4(); - fn BDMA_Channel5(); - fn BDMA_Channel6(); - fn BDMA_Channel7(); - fn CEC(); - fn CM4_SEV(); - fn CM7_SEV(); - fn CRS(); - fn CRYP(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn DSI(); - fn ECC(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HASH_RNG(); - fn HOLD_CORE(); - fn HRTIM1_FLT(); - fn HRTIM1_Master(); - fn HRTIM1_TIMA(); - fn HRTIM1_TIMB(); - fn HRTIM1_TIMC(); - fn HRTIM1_TIMD(); - fn HRTIM1_TIME(); - fn HSEM1(); - fn HSEM2(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn JPEG(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPTIM4(); - fn LPTIM5(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OTG_FS(); - fn OTG_FS_EP1_IN(); - fn OTG_FS_EP1_OUT(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_AVD(); - fn QUADSPI(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SAI3(); - fn SAI4(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 150] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_AVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { _handler: CM7_SEV }, - Vector { _handler: CM4_SEV }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _handler: CRYP }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: QUADSPI }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { - _handler: OTG_FS_EP1_OUT, - }, - Vector { - _handler: OTG_FS_EP1_IN, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { _handler: OTG_FS }, - Vector { _reserved: 0 }, - Vector { - _handler: HRTIM1_Master, - }, - Vector { - _handler: HRTIM1_TIMA, - }, - Vector { - _handler: HRTIM1_TIMB, - }, - Vector { - _handler: HRTIM1_TIMC, - }, - Vector { - _handler: HRTIM1_TIMD, - }, - Vector { - _handler: HRTIM1_TIME, - }, - Vector { - _handler: HRTIM1_FLT, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SAI3 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _handler: JPEG }, - Vector { _handler: MDMA }, - Vector { _handler: DSI }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _handler: HSEM2 }, - Vector { _handler: ADC3 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA_Channel0, - }, - Vector { - _handler: BDMA_Channel1, - }, - Vector { - _handler: BDMA_Channel2, - }, - Vector { - _handler: BDMA_Channel3, - }, - Vector { - _handler: BDMA_Channel4, - }, - Vector { - _handler: BDMA_Channel5, - }, - Vector { - _handler: BDMA_Channel6, - }, - Vector { - _handler: BDMA_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: LPTIM4 }, - Vector { _handler: LPTIM5 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _handler: SAI4 }, - Vector { _reserved: 0 }, - Vector { - _handler: HOLD_CORE, - }, - Vector { - _handler: WAKEUP_PIN, - }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -impl_rng!(0x48021800); -impl_sdmmc!(SDMMC1, 0x52007000); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -impl_sdmmc!(SDMMC2, 0x48022400); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); diff --git a/embassy-stm32/src/chip/stm32h757xi.rs b/embassy-stm32/src/chip/stm32h757xi.rs deleted file mode 100644 index 90d611be..00000000 --- a/embassy-stm32/src/chip/stm32h757xi.rs +++ /dev/null @@ -1,922 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, ADC3, BDMA, COMP1, COMP2, CRYP, DAC1, DCMI, DMA2D, ETH, - FDCAN1, FDCAN2, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, - PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, - PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, - PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, - PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, - PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, - PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, - PH10, PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, - PI11, PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, PJ10, PJ11, - PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, PK11, PK12, - PK13, PK14, PK15, HASH, I2C1, I2C2, I2C3, I2C4, IWDG1, IWDG2, JPEG, LPTIM1, LPTIM2, LPTIM3, - LPTIM4, LPTIM5, LPUART1, LTDC, MDIOS, MDMA, OPAMP1, OPAMP2, PWR, QUADSPI, RCC, RNG, RTC, SAI1, - SAI2, SAI3, SAI4, SDMMC1, SDMMC2, SPI1, SPI2, SPI3, SPI4, SPI5, SPI6, SWPMI1, SYSCFG, TIM1, - TIM12, TIM13, TIM14, TIM15, TIM16, TIM17, TIM2, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, UART4, - UART5, UART7, UART8, USART1, USART2, USART3, USART6, USB_OTG_FS, USB_OTG_HS, VREFBUF, WWDG1, - WWDG2 -); -pub const GPIO_BASE: usize = 0x58020000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC = 18, - ADC3 = 127, - BDMA_Channel0 = 129, - BDMA_Channel1 = 130, - BDMA_Channel2 = 131, - BDMA_Channel3 = 132, - BDMA_Channel4 = 133, - BDMA_Channel5 = 134, - BDMA_Channel6 = 135, - BDMA_Channel7 = 136, - CEC = 94, - CM4_SEV = 65, - CM7_SEV = 64, - CRS = 144, - CRYP = 79, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - DSI = 123, - ECC = 145, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - HASH_RNG = 80, - HOLD_CORE = 148, - HRTIM1_FLT = 109, - HRTIM1_Master = 103, - HRTIM1_TIMA = 104, - HRTIM1_TIMB = 105, - HRTIM1_TIMC = 106, - HRTIM1_TIMD = 107, - HRTIM1_TIME = 108, - HSEM1 = 125, - HSEM2 = 126, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - JPEG = 121, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPTIM4 = 140, - LPTIM5 = 141, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OTG_FS = 101, - OTG_FS_EP1_IN = 99, - OTG_FS_EP1_OUT = 98, - OTG_FS_WKUP = 100, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_AVD = 1, - QUADSPI = 92, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SAI3 = 114, - SAI4 = 146, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TAMP_STAMP = 2, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(ADC3); - declare!(BDMA_Channel0); - declare!(BDMA_Channel1); - declare!(BDMA_Channel2); - declare!(BDMA_Channel3); - declare!(BDMA_Channel4); - declare!(BDMA_Channel5); - declare!(BDMA_Channel6); - declare!(BDMA_Channel7); - declare!(CEC); - declare!(CM4_SEV); - declare!(CM7_SEV); - declare!(CRS); - declare!(CRYP); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(DSI); - declare!(ECC); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HASH_RNG); - declare!(HOLD_CORE); - declare!(HRTIM1_FLT); - declare!(HRTIM1_Master); - declare!(HRTIM1_TIMA); - declare!(HRTIM1_TIMB); - declare!(HRTIM1_TIMC); - declare!(HRTIM1_TIMD); - declare!(HRTIM1_TIME); - declare!(HSEM1); - declare!(HSEM2); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(JPEG); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPTIM4); - declare!(LPTIM5); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OTG_FS); - declare!(OTG_FS_EP1_IN); - declare!(OTG_FS_EP1_OUT); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_AVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SAI3); - declare!(SAI4); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn ADC3(); - fn BDMA_Channel0(); - fn BDMA_Channel1(); - fn BDMA_Channel2(); - fn BDMA_Channel3(); - fn BDMA_Channel4(); - fn BDMA_Channel5(); - fn BDMA_Channel6(); - fn BDMA_Channel7(); - fn CEC(); - fn CM4_SEV(); - fn CM7_SEV(); - fn CRS(); - fn CRYP(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn DSI(); - fn ECC(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HASH_RNG(); - fn HOLD_CORE(); - fn HRTIM1_FLT(); - fn HRTIM1_Master(); - fn HRTIM1_TIMA(); - fn HRTIM1_TIMB(); - fn HRTIM1_TIMC(); - fn HRTIM1_TIMD(); - fn HRTIM1_TIME(); - fn HSEM1(); - fn HSEM2(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn JPEG(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPTIM4(); - fn LPTIM5(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OTG_FS(); - fn OTG_FS_EP1_IN(); - fn OTG_FS_EP1_OUT(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_AVD(); - fn QUADSPI(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SAI3(); - fn SAI4(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 150] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_AVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { _handler: CM7_SEV }, - Vector { _handler: CM4_SEV }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _handler: CRYP }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: QUADSPI }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { - _handler: OTG_FS_EP1_OUT, - }, - Vector { - _handler: OTG_FS_EP1_IN, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { _handler: OTG_FS }, - Vector { _reserved: 0 }, - Vector { - _handler: HRTIM1_Master, - }, - Vector { - _handler: HRTIM1_TIMA, - }, - Vector { - _handler: HRTIM1_TIMB, - }, - Vector { - _handler: HRTIM1_TIMC, - }, - Vector { - _handler: HRTIM1_TIMD, - }, - Vector { - _handler: HRTIM1_TIME, - }, - Vector { - _handler: HRTIM1_FLT, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SAI3 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _handler: JPEG }, - Vector { _handler: MDMA }, - Vector { _handler: DSI }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _handler: HSEM2 }, - Vector { _handler: ADC3 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA_Channel0, - }, - Vector { - _handler: BDMA_Channel1, - }, - Vector { - _handler: BDMA_Channel2, - }, - Vector { - _handler: BDMA_Channel3, - }, - Vector { - _handler: BDMA_Channel4, - }, - Vector { - _handler: BDMA_Channel5, - }, - Vector { - _handler: BDMA_Channel6, - }, - Vector { - _handler: BDMA_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: LPTIM4 }, - Vector { _handler: LPTIM5 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _handler: SAI4 }, - Vector { _reserved: 0 }, - Vector { - _handler: HOLD_CORE, - }, - Vector { - _handler: WAKEUP_PIN, - }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -impl_rng!(0x48021800); -impl_sdmmc!(SDMMC1, 0x52007000); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -impl_sdmmc!(SDMMC2, 0x48022400); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); diff --git a/embassy-stm32/src/chip/stm32h757zi.rs b/embassy-stm32/src/chip/stm32h757zi.rs deleted file mode 100644 index 3bc83c70..00000000 --- a/embassy-stm32/src/chip/stm32h757zi.rs +++ /dev/null @@ -1,921 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, ADC3, BDMA, COMP1, COMP2, CRYP, DAC1, DCMI, DMA2D, ETH, - FDCAN1, FDCAN2, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, - PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, - PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, - PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, - PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, - PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, - PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, - PH10, PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, - PI11, PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, PJ10, PJ11, - PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, PK11, PK12, - PK13, PK14, PK15, HASH, I2C1, I2C2, I2C3, I2C4, IWDG1, IWDG2, JPEG, LPTIM1, LPTIM2, LPTIM3, - LPTIM4, LPTIM5, LPUART1, LTDC, MDIOS, MDMA, OPAMP1, OPAMP2, PWR, QUADSPI, RCC, RNG, RTC, SAI1, - SAI2, SAI3, SAI4, SDMMC1, SDMMC2, SPI1, SPI2, SPI3, SPI4, SPI6, SWPMI1, SYSCFG, TIM1, TIM12, - TIM13, TIM14, TIM15, TIM16, TIM17, TIM2, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, UART4, UART5, - UART7, UART8, USART1, USART2, USART3, USART6, USB_OTG_FS, USB_OTG_HS, VREFBUF, WWDG1, WWDG2 -); -pub const GPIO_BASE: usize = 0x58020000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC = 18, - ADC3 = 127, - BDMA_Channel0 = 129, - BDMA_Channel1 = 130, - BDMA_Channel2 = 131, - BDMA_Channel3 = 132, - BDMA_Channel4 = 133, - BDMA_Channel5 = 134, - BDMA_Channel6 = 135, - BDMA_Channel7 = 136, - CEC = 94, - CM4_SEV = 65, - CM7_SEV = 64, - CRS = 144, - CRYP = 79, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - DSI = 123, - ECC = 145, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - HASH_RNG = 80, - HOLD_CORE = 148, - HRTIM1_FLT = 109, - HRTIM1_Master = 103, - HRTIM1_TIMA = 104, - HRTIM1_TIMB = 105, - HRTIM1_TIMC = 106, - HRTIM1_TIMD = 107, - HRTIM1_TIME = 108, - HSEM1 = 125, - HSEM2 = 126, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - JPEG = 121, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPTIM4 = 140, - LPTIM5 = 141, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OTG_FS = 101, - OTG_FS_EP1_IN = 99, - OTG_FS_EP1_OUT = 98, - OTG_FS_WKUP = 100, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_AVD = 1, - QUADSPI = 92, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SAI3 = 114, - SAI4 = 146, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TAMP_STAMP = 2, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(ADC3); - declare!(BDMA_Channel0); - declare!(BDMA_Channel1); - declare!(BDMA_Channel2); - declare!(BDMA_Channel3); - declare!(BDMA_Channel4); - declare!(BDMA_Channel5); - declare!(BDMA_Channel6); - declare!(BDMA_Channel7); - declare!(CEC); - declare!(CM4_SEV); - declare!(CM7_SEV); - declare!(CRS); - declare!(CRYP); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(DSI); - declare!(ECC); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HASH_RNG); - declare!(HOLD_CORE); - declare!(HRTIM1_FLT); - declare!(HRTIM1_Master); - declare!(HRTIM1_TIMA); - declare!(HRTIM1_TIMB); - declare!(HRTIM1_TIMC); - declare!(HRTIM1_TIMD); - declare!(HRTIM1_TIME); - declare!(HSEM1); - declare!(HSEM2); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(JPEG); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPTIM4); - declare!(LPTIM5); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OTG_FS); - declare!(OTG_FS_EP1_IN); - declare!(OTG_FS_EP1_OUT); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_AVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SAI3); - declare!(SAI4); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn ADC3(); - fn BDMA_Channel0(); - fn BDMA_Channel1(); - fn BDMA_Channel2(); - fn BDMA_Channel3(); - fn BDMA_Channel4(); - fn BDMA_Channel5(); - fn BDMA_Channel6(); - fn BDMA_Channel7(); - fn CEC(); - fn CM4_SEV(); - fn CM7_SEV(); - fn CRS(); - fn CRYP(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn DSI(); - fn ECC(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HASH_RNG(); - fn HOLD_CORE(); - fn HRTIM1_FLT(); - fn HRTIM1_Master(); - fn HRTIM1_TIMA(); - fn HRTIM1_TIMB(); - fn HRTIM1_TIMC(); - fn HRTIM1_TIMD(); - fn HRTIM1_TIME(); - fn HSEM1(); - fn HSEM2(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn JPEG(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPTIM4(); - fn LPTIM5(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OTG_FS(); - fn OTG_FS_EP1_IN(); - fn OTG_FS_EP1_OUT(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_AVD(); - fn QUADSPI(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SAI3(); - fn SAI4(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 150] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_AVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { _handler: CM7_SEV }, - Vector { _handler: CM4_SEV }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _handler: CRYP }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: QUADSPI }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { - _handler: OTG_FS_EP1_OUT, - }, - Vector { - _handler: OTG_FS_EP1_IN, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { _handler: OTG_FS }, - Vector { _reserved: 0 }, - Vector { - _handler: HRTIM1_Master, - }, - Vector { - _handler: HRTIM1_TIMA, - }, - Vector { - _handler: HRTIM1_TIMB, - }, - Vector { - _handler: HRTIM1_TIMC, - }, - Vector { - _handler: HRTIM1_TIMD, - }, - Vector { - _handler: HRTIM1_TIME, - }, - Vector { - _handler: HRTIM1_FLT, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SAI3 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _handler: JPEG }, - Vector { _handler: MDMA }, - Vector { _handler: DSI }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _handler: HSEM2 }, - Vector { _handler: ADC3 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA_Channel0, - }, - Vector { - _handler: BDMA_Channel1, - }, - Vector { - _handler: BDMA_Channel2, - }, - Vector { - _handler: BDMA_Channel3, - }, - Vector { - _handler: BDMA_Channel4, - }, - Vector { - _handler: BDMA_Channel5, - }, - Vector { - _handler: BDMA_Channel6, - }, - Vector { - _handler: BDMA_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: LPTIM4 }, - Vector { _handler: LPTIM5 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _handler: SAI4 }, - Vector { _reserved: 0 }, - Vector { - _handler: HOLD_CORE, - }, - Vector { - _handler: WAKEUP_PIN, - }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -impl_rng!(0x48021800); -impl_sdmmc!(SDMMC1, 0x52007000); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -impl_sdmmc!(SDMMC2, 0x48022400); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); diff --git a/embassy-stm32/src/chip/stm32h7a3ag.rs b/embassy-stm32/src/chip/stm32h7a3ag.rs deleted file mode 100644 index 9496672f..00000000 --- a/embassy-stm32/src/chip/stm32h7a3ag.rs +++ /dev/null @@ -1,886 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, BDMA1, BDMA2, COMP1, COMP2, DAC1, DAC2, DCMI, DMA2D, DTS, - FDCAN1, FDCAN2, GFXMMU, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, - PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, - PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, - PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, - PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, - PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, - PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, - PI8, PI9, PI10, PI11, PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, - PJ10, PJ11, PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, - PK11, PK12, PK13, PK14, PK15, I2C1, I2C2, I2C3, I2C4, IWDG1, JPEG, LPTIM1, LPTIM2, LPTIM3, - LPUART1, LTDC, MDIOS, MDMA, OCTOSPI1, OCTOSPI2, OCTOSPIM, OPAMP1, OPAMP2, PSSI, PWR, RCC, RNG, - RTC, SAI1, SAI2, SDMMC1, SDMMC2, SPDIFRX, SPI1, SPI2, SPI3, SPI4, SPI5, SPI6, SWPMI1, SYSCFG, - TIM1, TIM12, TIM13, TIM14, TIM15, TIM16, TIM17, TIM2, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, - UART4, UART5, UART7, UART8, UART9, USART1, USART10, USART2, USART3, USART6, USB_OTG_HS, - VREFBUF, WWDG1 -); -pub const GPIO_BASE: usize = 0x58020000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC = 18, - BDMA1 = 154, - BDMA2_Channel0 = 129, - BDMA2_Channel1 = 130, - BDMA2_Channel2 = 131, - BDMA2_Channel3 = 132, - BDMA2_Channel4 = 133, - BDMA2_Channel5 = 134, - BDMA2_Channel6 = 135, - BDMA2_Channel7 = 136, - CEC = 94, - CRS = 144, - DAC2 = 127, - DCMI_PSSI = 78, - DFSDM1_FLT4 = 64, - DFSDM1_FLT5 = 65, - DFSDM1_FLT6 = 66, - DFSDM1_FLT7 = 67, - DFSDM2 = 42, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - DTS = 147, - ECC = 145, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - GFXMMU = 153, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - JPEG = 121, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OCTOSPI1 = 92, - OCTOSPI2 = 150, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_PVM = 1, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_TAMP_STAMP_CSS_LSE = 2, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - UART9 = 140, - USART1 = 37, - USART10 = 141, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(BDMA1); - declare!(BDMA2_Channel0); - declare!(BDMA2_Channel1); - declare!(BDMA2_Channel2); - declare!(BDMA2_Channel3); - declare!(BDMA2_Channel4); - declare!(BDMA2_Channel5); - declare!(BDMA2_Channel6); - declare!(BDMA2_Channel7); - declare!(CEC); - declare!(CRS); - declare!(DAC2); - declare!(DCMI_PSSI); - declare!(DFSDM1_FLT4); - declare!(DFSDM1_FLT5); - declare!(DFSDM1_FLT6); - declare!(DFSDM1_FLT7); - declare!(DFSDM2); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(DTS); - declare!(ECC); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(GFXMMU); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(JPEG); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_PVM); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_TAMP_STAMP_CSS_LSE); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(UART9); - declare!(USART1); - declare!(USART10); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn BDMA1(); - fn BDMA2_Channel0(); - fn BDMA2_Channel1(); - fn BDMA2_Channel2(); - fn BDMA2_Channel3(); - fn BDMA2_Channel4(); - fn BDMA2_Channel5(); - fn BDMA2_Channel6(); - fn BDMA2_Channel7(); - fn CEC(); - fn CRS(); - fn DAC2(); - fn DCMI_PSSI(); - fn DFSDM1_FLT4(); - fn DFSDM1_FLT5(); - fn DFSDM1_FLT6(); - fn DFSDM1_FLT7(); - fn DFSDM2(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn DTS(); - fn ECC(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn GFXMMU(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn JPEG(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_PVM(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_TAMP_STAMP_CSS_LSE(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn UART9(); - fn USART1(); - fn USART10(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 155] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: RTC_TAMP_STAMP_CSS_LSE, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _handler: DFSDM2 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { - _handler: DFSDM1_FLT4, - }, - Vector { - _handler: DFSDM1_FLT5, - }, - Vector { - _handler: DFSDM1_FLT6, - }, - Vector { - _handler: DFSDM1_FLT7, - }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { - _handler: DCMI_PSSI, - }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _handler: JPEG }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: DAC2 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA2_Channel0, - }, - Vector { - _handler: BDMA2_Channel1, - }, - Vector { - _handler: BDMA2_Channel2, - }, - Vector { - _handler: BDMA2_Channel3, - }, - Vector { - _handler: BDMA2_Channel4, - }, - Vector { - _handler: BDMA2_Channel5, - }, - Vector { - _handler: BDMA2_Channel6, - }, - Vector { - _handler: BDMA2_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: UART9 }, - Vector { _handler: USART10 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _reserved: 0 }, - Vector { _handler: DTS }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - Vector { _handler: OCTOSPI2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: GFXMMU }, - Vector { _handler: BDMA1 }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -impl_rng!(0x48021800); -impl_sdmmc!(SDMMC1, 0x52007000); -impl_sdmmc_pin!(SDMMC1, D0Pin, PB13, 12); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -impl_sdmmc!(SDMMC2, 0x48022400); -impl_sdmmc_pin!(SDMMC2, CmdPin, PA0, 9); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D1Pin, PG10, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); -impl_sdmmc_pin!(SDMMC2, D3Pin, PG12, 10); -impl_sdmmc_pin!(SDMMC2, D6Pin, PG13, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PG14, 10); -impl_sdmmc_pin!(SDMMC2, D0Pin, PG9, 11); diff --git a/embassy-stm32/src/chip/stm32h7a3ai.rs b/embassy-stm32/src/chip/stm32h7a3ai.rs deleted file mode 100644 index 9496672f..00000000 --- a/embassy-stm32/src/chip/stm32h7a3ai.rs +++ /dev/null @@ -1,886 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, BDMA1, BDMA2, COMP1, COMP2, DAC1, DAC2, DCMI, DMA2D, DTS, - FDCAN1, FDCAN2, GFXMMU, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, - PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, - PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, - PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, - PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, - PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, - PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, - PI8, PI9, PI10, PI11, PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, - PJ10, PJ11, PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, - PK11, PK12, PK13, PK14, PK15, I2C1, I2C2, I2C3, I2C4, IWDG1, JPEG, LPTIM1, LPTIM2, LPTIM3, - LPUART1, LTDC, MDIOS, MDMA, OCTOSPI1, OCTOSPI2, OCTOSPIM, OPAMP1, OPAMP2, PSSI, PWR, RCC, RNG, - RTC, SAI1, SAI2, SDMMC1, SDMMC2, SPDIFRX, SPI1, SPI2, SPI3, SPI4, SPI5, SPI6, SWPMI1, SYSCFG, - TIM1, TIM12, TIM13, TIM14, TIM15, TIM16, TIM17, TIM2, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, - UART4, UART5, UART7, UART8, UART9, USART1, USART10, USART2, USART3, USART6, USB_OTG_HS, - VREFBUF, WWDG1 -); -pub const GPIO_BASE: usize = 0x58020000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC = 18, - BDMA1 = 154, - BDMA2_Channel0 = 129, - BDMA2_Channel1 = 130, - BDMA2_Channel2 = 131, - BDMA2_Channel3 = 132, - BDMA2_Channel4 = 133, - BDMA2_Channel5 = 134, - BDMA2_Channel6 = 135, - BDMA2_Channel7 = 136, - CEC = 94, - CRS = 144, - DAC2 = 127, - DCMI_PSSI = 78, - DFSDM1_FLT4 = 64, - DFSDM1_FLT5 = 65, - DFSDM1_FLT6 = 66, - DFSDM1_FLT7 = 67, - DFSDM2 = 42, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - DTS = 147, - ECC = 145, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - GFXMMU = 153, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - JPEG = 121, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OCTOSPI1 = 92, - OCTOSPI2 = 150, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_PVM = 1, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_TAMP_STAMP_CSS_LSE = 2, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - UART9 = 140, - USART1 = 37, - USART10 = 141, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(BDMA1); - declare!(BDMA2_Channel0); - declare!(BDMA2_Channel1); - declare!(BDMA2_Channel2); - declare!(BDMA2_Channel3); - declare!(BDMA2_Channel4); - declare!(BDMA2_Channel5); - declare!(BDMA2_Channel6); - declare!(BDMA2_Channel7); - declare!(CEC); - declare!(CRS); - declare!(DAC2); - declare!(DCMI_PSSI); - declare!(DFSDM1_FLT4); - declare!(DFSDM1_FLT5); - declare!(DFSDM1_FLT6); - declare!(DFSDM1_FLT7); - declare!(DFSDM2); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(DTS); - declare!(ECC); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(GFXMMU); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(JPEG); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_PVM); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_TAMP_STAMP_CSS_LSE); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(UART9); - declare!(USART1); - declare!(USART10); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn BDMA1(); - fn BDMA2_Channel0(); - fn BDMA2_Channel1(); - fn BDMA2_Channel2(); - fn BDMA2_Channel3(); - fn BDMA2_Channel4(); - fn BDMA2_Channel5(); - fn BDMA2_Channel6(); - fn BDMA2_Channel7(); - fn CEC(); - fn CRS(); - fn DAC2(); - fn DCMI_PSSI(); - fn DFSDM1_FLT4(); - fn DFSDM1_FLT5(); - fn DFSDM1_FLT6(); - fn DFSDM1_FLT7(); - fn DFSDM2(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn DTS(); - fn ECC(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn GFXMMU(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn JPEG(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_PVM(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_TAMP_STAMP_CSS_LSE(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn UART9(); - fn USART1(); - fn USART10(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 155] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: RTC_TAMP_STAMP_CSS_LSE, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _handler: DFSDM2 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { - _handler: DFSDM1_FLT4, - }, - Vector { - _handler: DFSDM1_FLT5, - }, - Vector { - _handler: DFSDM1_FLT6, - }, - Vector { - _handler: DFSDM1_FLT7, - }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { - _handler: DCMI_PSSI, - }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _handler: JPEG }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: DAC2 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA2_Channel0, - }, - Vector { - _handler: BDMA2_Channel1, - }, - Vector { - _handler: BDMA2_Channel2, - }, - Vector { - _handler: BDMA2_Channel3, - }, - Vector { - _handler: BDMA2_Channel4, - }, - Vector { - _handler: BDMA2_Channel5, - }, - Vector { - _handler: BDMA2_Channel6, - }, - Vector { - _handler: BDMA2_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: UART9 }, - Vector { _handler: USART10 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _reserved: 0 }, - Vector { _handler: DTS }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - Vector { _handler: OCTOSPI2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: GFXMMU }, - Vector { _handler: BDMA1 }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -impl_rng!(0x48021800); -impl_sdmmc!(SDMMC1, 0x52007000); -impl_sdmmc_pin!(SDMMC1, D0Pin, PB13, 12); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -impl_sdmmc!(SDMMC2, 0x48022400); -impl_sdmmc_pin!(SDMMC2, CmdPin, PA0, 9); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D1Pin, PG10, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); -impl_sdmmc_pin!(SDMMC2, D3Pin, PG12, 10); -impl_sdmmc_pin!(SDMMC2, D6Pin, PG13, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PG14, 10); -impl_sdmmc_pin!(SDMMC2, D0Pin, PG9, 11); diff --git a/embassy-stm32/src/chip/stm32h7a3ig.rs b/embassy-stm32/src/chip/stm32h7a3ig.rs deleted file mode 100644 index 9496672f..00000000 --- a/embassy-stm32/src/chip/stm32h7a3ig.rs +++ /dev/null @@ -1,886 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, BDMA1, BDMA2, COMP1, COMP2, DAC1, DAC2, DCMI, DMA2D, DTS, - FDCAN1, FDCAN2, GFXMMU, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, - PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, - PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, - PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, - PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, - PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, - PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, - PI8, PI9, PI10, PI11, PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, - PJ10, PJ11, PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, - PK11, PK12, PK13, PK14, PK15, I2C1, I2C2, I2C3, I2C4, IWDG1, JPEG, LPTIM1, LPTIM2, LPTIM3, - LPUART1, LTDC, MDIOS, MDMA, OCTOSPI1, OCTOSPI2, OCTOSPIM, OPAMP1, OPAMP2, PSSI, PWR, RCC, RNG, - RTC, SAI1, SAI2, SDMMC1, SDMMC2, SPDIFRX, SPI1, SPI2, SPI3, SPI4, SPI5, SPI6, SWPMI1, SYSCFG, - TIM1, TIM12, TIM13, TIM14, TIM15, TIM16, TIM17, TIM2, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, - UART4, UART5, UART7, UART8, UART9, USART1, USART10, USART2, USART3, USART6, USB_OTG_HS, - VREFBUF, WWDG1 -); -pub const GPIO_BASE: usize = 0x58020000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC = 18, - BDMA1 = 154, - BDMA2_Channel0 = 129, - BDMA2_Channel1 = 130, - BDMA2_Channel2 = 131, - BDMA2_Channel3 = 132, - BDMA2_Channel4 = 133, - BDMA2_Channel5 = 134, - BDMA2_Channel6 = 135, - BDMA2_Channel7 = 136, - CEC = 94, - CRS = 144, - DAC2 = 127, - DCMI_PSSI = 78, - DFSDM1_FLT4 = 64, - DFSDM1_FLT5 = 65, - DFSDM1_FLT6 = 66, - DFSDM1_FLT7 = 67, - DFSDM2 = 42, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - DTS = 147, - ECC = 145, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - GFXMMU = 153, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - JPEG = 121, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OCTOSPI1 = 92, - OCTOSPI2 = 150, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_PVM = 1, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_TAMP_STAMP_CSS_LSE = 2, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - UART9 = 140, - USART1 = 37, - USART10 = 141, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(BDMA1); - declare!(BDMA2_Channel0); - declare!(BDMA2_Channel1); - declare!(BDMA2_Channel2); - declare!(BDMA2_Channel3); - declare!(BDMA2_Channel4); - declare!(BDMA2_Channel5); - declare!(BDMA2_Channel6); - declare!(BDMA2_Channel7); - declare!(CEC); - declare!(CRS); - declare!(DAC2); - declare!(DCMI_PSSI); - declare!(DFSDM1_FLT4); - declare!(DFSDM1_FLT5); - declare!(DFSDM1_FLT6); - declare!(DFSDM1_FLT7); - declare!(DFSDM2); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(DTS); - declare!(ECC); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(GFXMMU); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(JPEG); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_PVM); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_TAMP_STAMP_CSS_LSE); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(UART9); - declare!(USART1); - declare!(USART10); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn BDMA1(); - fn BDMA2_Channel0(); - fn BDMA2_Channel1(); - fn BDMA2_Channel2(); - fn BDMA2_Channel3(); - fn BDMA2_Channel4(); - fn BDMA2_Channel5(); - fn BDMA2_Channel6(); - fn BDMA2_Channel7(); - fn CEC(); - fn CRS(); - fn DAC2(); - fn DCMI_PSSI(); - fn DFSDM1_FLT4(); - fn DFSDM1_FLT5(); - fn DFSDM1_FLT6(); - fn DFSDM1_FLT7(); - fn DFSDM2(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn DTS(); - fn ECC(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn GFXMMU(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn JPEG(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_PVM(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_TAMP_STAMP_CSS_LSE(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn UART9(); - fn USART1(); - fn USART10(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 155] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: RTC_TAMP_STAMP_CSS_LSE, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _handler: DFSDM2 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { - _handler: DFSDM1_FLT4, - }, - Vector { - _handler: DFSDM1_FLT5, - }, - Vector { - _handler: DFSDM1_FLT6, - }, - Vector { - _handler: DFSDM1_FLT7, - }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { - _handler: DCMI_PSSI, - }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _handler: JPEG }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: DAC2 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA2_Channel0, - }, - Vector { - _handler: BDMA2_Channel1, - }, - Vector { - _handler: BDMA2_Channel2, - }, - Vector { - _handler: BDMA2_Channel3, - }, - Vector { - _handler: BDMA2_Channel4, - }, - Vector { - _handler: BDMA2_Channel5, - }, - Vector { - _handler: BDMA2_Channel6, - }, - Vector { - _handler: BDMA2_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: UART9 }, - Vector { _handler: USART10 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _reserved: 0 }, - Vector { _handler: DTS }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - Vector { _handler: OCTOSPI2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: GFXMMU }, - Vector { _handler: BDMA1 }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -impl_rng!(0x48021800); -impl_sdmmc!(SDMMC1, 0x52007000); -impl_sdmmc_pin!(SDMMC1, D0Pin, PB13, 12); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -impl_sdmmc!(SDMMC2, 0x48022400); -impl_sdmmc_pin!(SDMMC2, CmdPin, PA0, 9); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D1Pin, PG10, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); -impl_sdmmc_pin!(SDMMC2, D3Pin, PG12, 10); -impl_sdmmc_pin!(SDMMC2, D6Pin, PG13, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PG14, 10); -impl_sdmmc_pin!(SDMMC2, D0Pin, PG9, 11); diff --git a/embassy-stm32/src/chip/stm32h7a3ii.rs b/embassy-stm32/src/chip/stm32h7a3ii.rs deleted file mode 100644 index 9496672f..00000000 --- a/embassy-stm32/src/chip/stm32h7a3ii.rs +++ /dev/null @@ -1,886 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, BDMA1, BDMA2, COMP1, COMP2, DAC1, DAC2, DCMI, DMA2D, DTS, - FDCAN1, FDCAN2, GFXMMU, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, - PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, - PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, - PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, - PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, - PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, - PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, - PI8, PI9, PI10, PI11, PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, - PJ10, PJ11, PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, - PK11, PK12, PK13, PK14, PK15, I2C1, I2C2, I2C3, I2C4, IWDG1, JPEG, LPTIM1, LPTIM2, LPTIM3, - LPUART1, LTDC, MDIOS, MDMA, OCTOSPI1, OCTOSPI2, OCTOSPIM, OPAMP1, OPAMP2, PSSI, PWR, RCC, RNG, - RTC, SAI1, SAI2, SDMMC1, SDMMC2, SPDIFRX, SPI1, SPI2, SPI3, SPI4, SPI5, SPI6, SWPMI1, SYSCFG, - TIM1, TIM12, TIM13, TIM14, TIM15, TIM16, TIM17, TIM2, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, - UART4, UART5, UART7, UART8, UART9, USART1, USART10, USART2, USART3, USART6, USB_OTG_HS, - VREFBUF, WWDG1 -); -pub const GPIO_BASE: usize = 0x58020000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC = 18, - BDMA1 = 154, - BDMA2_Channel0 = 129, - BDMA2_Channel1 = 130, - BDMA2_Channel2 = 131, - BDMA2_Channel3 = 132, - BDMA2_Channel4 = 133, - BDMA2_Channel5 = 134, - BDMA2_Channel6 = 135, - BDMA2_Channel7 = 136, - CEC = 94, - CRS = 144, - DAC2 = 127, - DCMI_PSSI = 78, - DFSDM1_FLT4 = 64, - DFSDM1_FLT5 = 65, - DFSDM1_FLT6 = 66, - DFSDM1_FLT7 = 67, - DFSDM2 = 42, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - DTS = 147, - ECC = 145, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - GFXMMU = 153, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - JPEG = 121, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OCTOSPI1 = 92, - OCTOSPI2 = 150, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_PVM = 1, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_TAMP_STAMP_CSS_LSE = 2, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - UART9 = 140, - USART1 = 37, - USART10 = 141, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(BDMA1); - declare!(BDMA2_Channel0); - declare!(BDMA2_Channel1); - declare!(BDMA2_Channel2); - declare!(BDMA2_Channel3); - declare!(BDMA2_Channel4); - declare!(BDMA2_Channel5); - declare!(BDMA2_Channel6); - declare!(BDMA2_Channel7); - declare!(CEC); - declare!(CRS); - declare!(DAC2); - declare!(DCMI_PSSI); - declare!(DFSDM1_FLT4); - declare!(DFSDM1_FLT5); - declare!(DFSDM1_FLT6); - declare!(DFSDM1_FLT7); - declare!(DFSDM2); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(DTS); - declare!(ECC); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(GFXMMU); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(JPEG); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_PVM); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_TAMP_STAMP_CSS_LSE); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(UART9); - declare!(USART1); - declare!(USART10); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn BDMA1(); - fn BDMA2_Channel0(); - fn BDMA2_Channel1(); - fn BDMA2_Channel2(); - fn BDMA2_Channel3(); - fn BDMA2_Channel4(); - fn BDMA2_Channel5(); - fn BDMA2_Channel6(); - fn BDMA2_Channel7(); - fn CEC(); - fn CRS(); - fn DAC2(); - fn DCMI_PSSI(); - fn DFSDM1_FLT4(); - fn DFSDM1_FLT5(); - fn DFSDM1_FLT6(); - fn DFSDM1_FLT7(); - fn DFSDM2(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn DTS(); - fn ECC(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn GFXMMU(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn JPEG(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_PVM(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_TAMP_STAMP_CSS_LSE(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn UART9(); - fn USART1(); - fn USART10(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 155] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: RTC_TAMP_STAMP_CSS_LSE, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _handler: DFSDM2 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { - _handler: DFSDM1_FLT4, - }, - Vector { - _handler: DFSDM1_FLT5, - }, - Vector { - _handler: DFSDM1_FLT6, - }, - Vector { - _handler: DFSDM1_FLT7, - }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { - _handler: DCMI_PSSI, - }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _handler: JPEG }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: DAC2 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA2_Channel0, - }, - Vector { - _handler: BDMA2_Channel1, - }, - Vector { - _handler: BDMA2_Channel2, - }, - Vector { - _handler: BDMA2_Channel3, - }, - Vector { - _handler: BDMA2_Channel4, - }, - Vector { - _handler: BDMA2_Channel5, - }, - Vector { - _handler: BDMA2_Channel6, - }, - Vector { - _handler: BDMA2_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: UART9 }, - Vector { _handler: USART10 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _reserved: 0 }, - Vector { _handler: DTS }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - Vector { _handler: OCTOSPI2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: GFXMMU }, - Vector { _handler: BDMA1 }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -impl_rng!(0x48021800); -impl_sdmmc!(SDMMC1, 0x52007000); -impl_sdmmc_pin!(SDMMC1, D0Pin, PB13, 12); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -impl_sdmmc!(SDMMC2, 0x48022400); -impl_sdmmc_pin!(SDMMC2, CmdPin, PA0, 9); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D1Pin, PG10, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); -impl_sdmmc_pin!(SDMMC2, D3Pin, PG12, 10); -impl_sdmmc_pin!(SDMMC2, D6Pin, PG13, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PG14, 10); -impl_sdmmc_pin!(SDMMC2, D0Pin, PG9, 11); diff --git a/embassy-stm32/src/chip/stm32h7a3lg.rs b/embassy-stm32/src/chip/stm32h7a3lg.rs deleted file mode 100644 index 9496672f..00000000 --- a/embassy-stm32/src/chip/stm32h7a3lg.rs +++ /dev/null @@ -1,886 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, BDMA1, BDMA2, COMP1, COMP2, DAC1, DAC2, DCMI, DMA2D, DTS, - FDCAN1, FDCAN2, GFXMMU, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, - PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, - PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, - PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, - PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, - PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, - PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, - PI8, PI9, PI10, PI11, PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, - PJ10, PJ11, PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, - PK11, PK12, PK13, PK14, PK15, I2C1, I2C2, I2C3, I2C4, IWDG1, JPEG, LPTIM1, LPTIM2, LPTIM3, - LPUART1, LTDC, MDIOS, MDMA, OCTOSPI1, OCTOSPI2, OCTOSPIM, OPAMP1, OPAMP2, PSSI, PWR, RCC, RNG, - RTC, SAI1, SAI2, SDMMC1, SDMMC2, SPDIFRX, SPI1, SPI2, SPI3, SPI4, SPI5, SPI6, SWPMI1, SYSCFG, - TIM1, TIM12, TIM13, TIM14, TIM15, TIM16, TIM17, TIM2, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, - UART4, UART5, UART7, UART8, UART9, USART1, USART10, USART2, USART3, USART6, USB_OTG_HS, - VREFBUF, WWDG1 -); -pub const GPIO_BASE: usize = 0x58020000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC = 18, - BDMA1 = 154, - BDMA2_Channel0 = 129, - BDMA2_Channel1 = 130, - BDMA2_Channel2 = 131, - BDMA2_Channel3 = 132, - BDMA2_Channel4 = 133, - BDMA2_Channel5 = 134, - BDMA2_Channel6 = 135, - BDMA2_Channel7 = 136, - CEC = 94, - CRS = 144, - DAC2 = 127, - DCMI_PSSI = 78, - DFSDM1_FLT4 = 64, - DFSDM1_FLT5 = 65, - DFSDM1_FLT6 = 66, - DFSDM1_FLT7 = 67, - DFSDM2 = 42, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - DTS = 147, - ECC = 145, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - GFXMMU = 153, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - JPEG = 121, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OCTOSPI1 = 92, - OCTOSPI2 = 150, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_PVM = 1, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_TAMP_STAMP_CSS_LSE = 2, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - UART9 = 140, - USART1 = 37, - USART10 = 141, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(BDMA1); - declare!(BDMA2_Channel0); - declare!(BDMA2_Channel1); - declare!(BDMA2_Channel2); - declare!(BDMA2_Channel3); - declare!(BDMA2_Channel4); - declare!(BDMA2_Channel5); - declare!(BDMA2_Channel6); - declare!(BDMA2_Channel7); - declare!(CEC); - declare!(CRS); - declare!(DAC2); - declare!(DCMI_PSSI); - declare!(DFSDM1_FLT4); - declare!(DFSDM1_FLT5); - declare!(DFSDM1_FLT6); - declare!(DFSDM1_FLT7); - declare!(DFSDM2); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(DTS); - declare!(ECC); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(GFXMMU); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(JPEG); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_PVM); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_TAMP_STAMP_CSS_LSE); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(UART9); - declare!(USART1); - declare!(USART10); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn BDMA1(); - fn BDMA2_Channel0(); - fn BDMA2_Channel1(); - fn BDMA2_Channel2(); - fn BDMA2_Channel3(); - fn BDMA2_Channel4(); - fn BDMA2_Channel5(); - fn BDMA2_Channel6(); - fn BDMA2_Channel7(); - fn CEC(); - fn CRS(); - fn DAC2(); - fn DCMI_PSSI(); - fn DFSDM1_FLT4(); - fn DFSDM1_FLT5(); - fn DFSDM1_FLT6(); - fn DFSDM1_FLT7(); - fn DFSDM2(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn DTS(); - fn ECC(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn GFXMMU(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn JPEG(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_PVM(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_TAMP_STAMP_CSS_LSE(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn UART9(); - fn USART1(); - fn USART10(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 155] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: RTC_TAMP_STAMP_CSS_LSE, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _handler: DFSDM2 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { - _handler: DFSDM1_FLT4, - }, - Vector { - _handler: DFSDM1_FLT5, - }, - Vector { - _handler: DFSDM1_FLT6, - }, - Vector { - _handler: DFSDM1_FLT7, - }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { - _handler: DCMI_PSSI, - }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _handler: JPEG }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: DAC2 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA2_Channel0, - }, - Vector { - _handler: BDMA2_Channel1, - }, - Vector { - _handler: BDMA2_Channel2, - }, - Vector { - _handler: BDMA2_Channel3, - }, - Vector { - _handler: BDMA2_Channel4, - }, - Vector { - _handler: BDMA2_Channel5, - }, - Vector { - _handler: BDMA2_Channel6, - }, - Vector { - _handler: BDMA2_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: UART9 }, - Vector { _handler: USART10 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _reserved: 0 }, - Vector { _handler: DTS }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - Vector { _handler: OCTOSPI2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: GFXMMU }, - Vector { _handler: BDMA1 }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -impl_rng!(0x48021800); -impl_sdmmc!(SDMMC1, 0x52007000); -impl_sdmmc_pin!(SDMMC1, D0Pin, PB13, 12); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -impl_sdmmc!(SDMMC2, 0x48022400); -impl_sdmmc_pin!(SDMMC2, CmdPin, PA0, 9); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D1Pin, PG10, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); -impl_sdmmc_pin!(SDMMC2, D3Pin, PG12, 10); -impl_sdmmc_pin!(SDMMC2, D6Pin, PG13, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PG14, 10); -impl_sdmmc_pin!(SDMMC2, D0Pin, PG9, 11); diff --git a/embassy-stm32/src/chip/stm32h7a3li.rs b/embassy-stm32/src/chip/stm32h7a3li.rs deleted file mode 100644 index 9496672f..00000000 --- a/embassy-stm32/src/chip/stm32h7a3li.rs +++ /dev/null @@ -1,886 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, BDMA1, BDMA2, COMP1, COMP2, DAC1, DAC2, DCMI, DMA2D, DTS, - FDCAN1, FDCAN2, GFXMMU, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, - PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, - PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, - PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, - PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, - PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, - PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, - PI8, PI9, PI10, PI11, PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, - PJ10, PJ11, PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, - PK11, PK12, PK13, PK14, PK15, I2C1, I2C2, I2C3, I2C4, IWDG1, JPEG, LPTIM1, LPTIM2, LPTIM3, - LPUART1, LTDC, MDIOS, MDMA, OCTOSPI1, OCTOSPI2, OCTOSPIM, OPAMP1, OPAMP2, PSSI, PWR, RCC, RNG, - RTC, SAI1, SAI2, SDMMC1, SDMMC2, SPDIFRX, SPI1, SPI2, SPI3, SPI4, SPI5, SPI6, SWPMI1, SYSCFG, - TIM1, TIM12, TIM13, TIM14, TIM15, TIM16, TIM17, TIM2, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, - UART4, UART5, UART7, UART8, UART9, USART1, USART10, USART2, USART3, USART6, USB_OTG_HS, - VREFBUF, WWDG1 -); -pub const GPIO_BASE: usize = 0x58020000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC = 18, - BDMA1 = 154, - BDMA2_Channel0 = 129, - BDMA2_Channel1 = 130, - BDMA2_Channel2 = 131, - BDMA2_Channel3 = 132, - BDMA2_Channel4 = 133, - BDMA2_Channel5 = 134, - BDMA2_Channel6 = 135, - BDMA2_Channel7 = 136, - CEC = 94, - CRS = 144, - DAC2 = 127, - DCMI_PSSI = 78, - DFSDM1_FLT4 = 64, - DFSDM1_FLT5 = 65, - DFSDM1_FLT6 = 66, - DFSDM1_FLT7 = 67, - DFSDM2 = 42, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - DTS = 147, - ECC = 145, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - GFXMMU = 153, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - JPEG = 121, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OCTOSPI1 = 92, - OCTOSPI2 = 150, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_PVM = 1, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_TAMP_STAMP_CSS_LSE = 2, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - UART9 = 140, - USART1 = 37, - USART10 = 141, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(BDMA1); - declare!(BDMA2_Channel0); - declare!(BDMA2_Channel1); - declare!(BDMA2_Channel2); - declare!(BDMA2_Channel3); - declare!(BDMA2_Channel4); - declare!(BDMA2_Channel5); - declare!(BDMA2_Channel6); - declare!(BDMA2_Channel7); - declare!(CEC); - declare!(CRS); - declare!(DAC2); - declare!(DCMI_PSSI); - declare!(DFSDM1_FLT4); - declare!(DFSDM1_FLT5); - declare!(DFSDM1_FLT6); - declare!(DFSDM1_FLT7); - declare!(DFSDM2); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(DTS); - declare!(ECC); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(GFXMMU); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(JPEG); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_PVM); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_TAMP_STAMP_CSS_LSE); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(UART9); - declare!(USART1); - declare!(USART10); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn BDMA1(); - fn BDMA2_Channel0(); - fn BDMA2_Channel1(); - fn BDMA2_Channel2(); - fn BDMA2_Channel3(); - fn BDMA2_Channel4(); - fn BDMA2_Channel5(); - fn BDMA2_Channel6(); - fn BDMA2_Channel7(); - fn CEC(); - fn CRS(); - fn DAC2(); - fn DCMI_PSSI(); - fn DFSDM1_FLT4(); - fn DFSDM1_FLT5(); - fn DFSDM1_FLT6(); - fn DFSDM1_FLT7(); - fn DFSDM2(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn DTS(); - fn ECC(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn GFXMMU(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn JPEG(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_PVM(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_TAMP_STAMP_CSS_LSE(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn UART9(); - fn USART1(); - fn USART10(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 155] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: RTC_TAMP_STAMP_CSS_LSE, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _handler: DFSDM2 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { - _handler: DFSDM1_FLT4, - }, - Vector { - _handler: DFSDM1_FLT5, - }, - Vector { - _handler: DFSDM1_FLT6, - }, - Vector { - _handler: DFSDM1_FLT7, - }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { - _handler: DCMI_PSSI, - }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _handler: JPEG }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: DAC2 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA2_Channel0, - }, - Vector { - _handler: BDMA2_Channel1, - }, - Vector { - _handler: BDMA2_Channel2, - }, - Vector { - _handler: BDMA2_Channel3, - }, - Vector { - _handler: BDMA2_Channel4, - }, - Vector { - _handler: BDMA2_Channel5, - }, - Vector { - _handler: BDMA2_Channel6, - }, - Vector { - _handler: BDMA2_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: UART9 }, - Vector { _handler: USART10 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _reserved: 0 }, - Vector { _handler: DTS }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - Vector { _handler: OCTOSPI2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: GFXMMU }, - Vector { _handler: BDMA1 }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -impl_rng!(0x48021800); -impl_sdmmc!(SDMMC1, 0x52007000); -impl_sdmmc_pin!(SDMMC1, D0Pin, PB13, 12); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -impl_sdmmc!(SDMMC2, 0x48022400); -impl_sdmmc_pin!(SDMMC2, CmdPin, PA0, 9); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D1Pin, PG10, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); -impl_sdmmc_pin!(SDMMC2, D3Pin, PG12, 10); -impl_sdmmc_pin!(SDMMC2, D6Pin, PG13, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PG14, 10); -impl_sdmmc_pin!(SDMMC2, D0Pin, PG9, 11); diff --git a/embassy-stm32/src/chip/stm32h7a3ng.rs b/embassy-stm32/src/chip/stm32h7a3ng.rs deleted file mode 100644 index 9496672f..00000000 --- a/embassy-stm32/src/chip/stm32h7a3ng.rs +++ /dev/null @@ -1,886 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, BDMA1, BDMA2, COMP1, COMP2, DAC1, DAC2, DCMI, DMA2D, DTS, - FDCAN1, FDCAN2, GFXMMU, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, - PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, - PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, - PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, - PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, - PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, - PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, - PI8, PI9, PI10, PI11, PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, - PJ10, PJ11, PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, - PK11, PK12, PK13, PK14, PK15, I2C1, I2C2, I2C3, I2C4, IWDG1, JPEG, LPTIM1, LPTIM2, LPTIM3, - LPUART1, LTDC, MDIOS, MDMA, OCTOSPI1, OCTOSPI2, OCTOSPIM, OPAMP1, OPAMP2, PSSI, PWR, RCC, RNG, - RTC, SAI1, SAI2, SDMMC1, SDMMC2, SPDIFRX, SPI1, SPI2, SPI3, SPI4, SPI5, SPI6, SWPMI1, SYSCFG, - TIM1, TIM12, TIM13, TIM14, TIM15, TIM16, TIM17, TIM2, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, - UART4, UART5, UART7, UART8, UART9, USART1, USART10, USART2, USART3, USART6, USB_OTG_HS, - VREFBUF, WWDG1 -); -pub const GPIO_BASE: usize = 0x58020000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC = 18, - BDMA1 = 154, - BDMA2_Channel0 = 129, - BDMA2_Channel1 = 130, - BDMA2_Channel2 = 131, - BDMA2_Channel3 = 132, - BDMA2_Channel4 = 133, - BDMA2_Channel5 = 134, - BDMA2_Channel6 = 135, - BDMA2_Channel7 = 136, - CEC = 94, - CRS = 144, - DAC2 = 127, - DCMI_PSSI = 78, - DFSDM1_FLT4 = 64, - DFSDM1_FLT5 = 65, - DFSDM1_FLT6 = 66, - DFSDM1_FLT7 = 67, - DFSDM2 = 42, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - DTS = 147, - ECC = 145, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - GFXMMU = 153, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - JPEG = 121, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OCTOSPI1 = 92, - OCTOSPI2 = 150, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_PVM = 1, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_TAMP_STAMP_CSS_LSE = 2, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - UART9 = 140, - USART1 = 37, - USART10 = 141, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(BDMA1); - declare!(BDMA2_Channel0); - declare!(BDMA2_Channel1); - declare!(BDMA2_Channel2); - declare!(BDMA2_Channel3); - declare!(BDMA2_Channel4); - declare!(BDMA2_Channel5); - declare!(BDMA2_Channel6); - declare!(BDMA2_Channel7); - declare!(CEC); - declare!(CRS); - declare!(DAC2); - declare!(DCMI_PSSI); - declare!(DFSDM1_FLT4); - declare!(DFSDM1_FLT5); - declare!(DFSDM1_FLT6); - declare!(DFSDM1_FLT7); - declare!(DFSDM2); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(DTS); - declare!(ECC); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(GFXMMU); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(JPEG); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_PVM); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_TAMP_STAMP_CSS_LSE); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(UART9); - declare!(USART1); - declare!(USART10); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn BDMA1(); - fn BDMA2_Channel0(); - fn BDMA2_Channel1(); - fn BDMA2_Channel2(); - fn BDMA2_Channel3(); - fn BDMA2_Channel4(); - fn BDMA2_Channel5(); - fn BDMA2_Channel6(); - fn BDMA2_Channel7(); - fn CEC(); - fn CRS(); - fn DAC2(); - fn DCMI_PSSI(); - fn DFSDM1_FLT4(); - fn DFSDM1_FLT5(); - fn DFSDM1_FLT6(); - fn DFSDM1_FLT7(); - fn DFSDM2(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn DTS(); - fn ECC(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn GFXMMU(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn JPEG(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_PVM(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_TAMP_STAMP_CSS_LSE(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn UART9(); - fn USART1(); - fn USART10(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 155] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: RTC_TAMP_STAMP_CSS_LSE, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _handler: DFSDM2 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { - _handler: DFSDM1_FLT4, - }, - Vector { - _handler: DFSDM1_FLT5, - }, - Vector { - _handler: DFSDM1_FLT6, - }, - Vector { - _handler: DFSDM1_FLT7, - }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { - _handler: DCMI_PSSI, - }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _handler: JPEG }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: DAC2 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA2_Channel0, - }, - Vector { - _handler: BDMA2_Channel1, - }, - Vector { - _handler: BDMA2_Channel2, - }, - Vector { - _handler: BDMA2_Channel3, - }, - Vector { - _handler: BDMA2_Channel4, - }, - Vector { - _handler: BDMA2_Channel5, - }, - Vector { - _handler: BDMA2_Channel6, - }, - Vector { - _handler: BDMA2_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: UART9 }, - Vector { _handler: USART10 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _reserved: 0 }, - Vector { _handler: DTS }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - Vector { _handler: OCTOSPI2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: GFXMMU }, - Vector { _handler: BDMA1 }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -impl_rng!(0x48021800); -impl_sdmmc!(SDMMC1, 0x52007000); -impl_sdmmc_pin!(SDMMC1, D0Pin, PB13, 12); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -impl_sdmmc!(SDMMC2, 0x48022400); -impl_sdmmc_pin!(SDMMC2, CmdPin, PA0, 9); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D1Pin, PG10, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); -impl_sdmmc_pin!(SDMMC2, D3Pin, PG12, 10); -impl_sdmmc_pin!(SDMMC2, D6Pin, PG13, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PG14, 10); -impl_sdmmc_pin!(SDMMC2, D0Pin, PG9, 11); diff --git a/embassy-stm32/src/chip/stm32h7a3ni.rs b/embassy-stm32/src/chip/stm32h7a3ni.rs deleted file mode 100644 index 9496672f..00000000 --- a/embassy-stm32/src/chip/stm32h7a3ni.rs +++ /dev/null @@ -1,886 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, BDMA1, BDMA2, COMP1, COMP2, DAC1, DAC2, DCMI, DMA2D, DTS, - FDCAN1, FDCAN2, GFXMMU, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, - PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, - PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, - PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, - PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, - PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, - PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, - PI8, PI9, PI10, PI11, PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, - PJ10, PJ11, PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, - PK11, PK12, PK13, PK14, PK15, I2C1, I2C2, I2C3, I2C4, IWDG1, JPEG, LPTIM1, LPTIM2, LPTIM3, - LPUART1, LTDC, MDIOS, MDMA, OCTOSPI1, OCTOSPI2, OCTOSPIM, OPAMP1, OPAMP2, PSSI, PWR, RCC, RNG, - RTC, SAI1, SAI2, SDMMC1, SDMMC2, SPDIFRX, SPI1, SPI2, SPI3, SPI4, SPI5, SPI6, SWPMI1, SYSCFG, - TIM1, TIM12, TIM13, TIM14, TIM15, TIM16, TIM17, TIM2, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, - UART4, UART5, UART7, UART8, UART9, USART1, USART10, USART2, USART3, USART6, USB_OTG_HS, - VREFBUF, WWDG1 -); -pub const GPIO_BASE: usize = 0x58020000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC = 18, - BDMA1 = 154, - BDMA2_Channel0 = 129, - BDMA2_Channel1 = 130, - BDMA2_Channel2 = 131, - BDMA2_Channel3 = 132, - BDMA2_Channel4 = 133, - BDMA2_Channel5 = 134, - BDMA2_Channel6 = 135, - BDMA2_Channel7 = 136, - CEC = 94, - CRS = 144, - DAC2 = 127, - DCMI_PSSI = 78, - DFSDM1_FLT4 = 64, - DFSDM1_FLT5 = 65, - DFSDM1_FLT6 = 66, - DFSDM1_FLT7 = 67, - DFSDM2 = 42, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - DTS = 147, - ECC = 145, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - GFXMMU = 153, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - JPEG = 121, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OCTOSPI1 = 92, - OCTOSPI2 = 150, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_PVM = 1, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_TAMP_STAMP_CSS_LSE = 2, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - UART9 = 140, - USART1 = 37, - USART10 = 141, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(BDMA1); - declare!(BDMA2_Channel0); - declare!(BDMA2_Channel1); - declare!(BDMA2_Channel2); - declare!(BDMA2_Channel3); - declare!(BDMA2_Channel4); - declare!(BDMA2_Channel5); - declare!(BDMA2_Channel6); - declare!(BDMA2_Channel7); - declare!(CEC); - declare!(CRS); - declare!(DAC2); - declare!(DCMI_PSSI); - declare!(DFSDM1_FLT4); - declare!(DFSDM1_FLT5); - declare!(DFSDM1_FLT6); - declare!(DFSDM1_FLT7); - declare!(DFSDM2); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(DTS); - declare!(ECC); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(GFXMMU); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(JPEG); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_PVM); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_TAMP_STAMP_CSS_LSE); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(UART9); - declare!(USART1); - declare!(USART10); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn BDMA1(); - fn BDMA2_Channel0(); - fn BDMA2_Channel1(); - fn BDMA2_Channel2(); - fn BDMA2_Channel3(); - fn BDMA2_Channel4(); - fn BDMA2_Channel5(); - fn BDMA2_Channel6(); - fn BDMA2_Channel7(); - fn CEC(); - fn CRS(); - fn DAC2(); - fn DCMI_PSSI(); - fn DFSDM1_FLT4(); - fn DFSDM1_FLT5(); - fn DFSDM1_FLT6(); - fn DFSDM1_FLT7(); - fn DFSDM2(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn DTS(); - fn ECC(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn GFXMMU(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn JPEG(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_PVM(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_TAMP_STAMP_CSS_LSE(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn UART9(); - fn USART1(); - fn USART10(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 155] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: RTC_TAMP_STAMP_CSS_LSE, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _handler: DFSDM2 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { - _handler: DFSDM1_FLT4, - }, - Vector { - _handler: DFSDM1_FLT5, - }, - Vector { - _handler: DFSDM1_FLT6, - }, - Vector { - _handler: DFSDM1_FLT7, - }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { - _handler: DCMI_PSSI, - }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _handler: JPEG }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: DAC2 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA2_Channel0, - }, - Vector { - _handler: BDMA2_Channel1, - }, - Vector { - _handler: BDMA2_Channel2, - }, - Vector { - _handler: BDMA2_Channel3, - }, - Vector { - _handler: BDMA2_Channel4, - }, - Vector { - _handler: BDMA2_Channel5, - }, - Vector { - _handler: BDMA2_Channel6, - }, - Vector { - _handler: BDMA2_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: UART9 }, - Vector { _handler: USART10 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _reserved: 0 }, - Vector { _handler: DTS }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - Vector { _handler: OCTOSPI2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: GFXMMU }, - Vector { _handler: BDMA1 }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -impl_rng!(0x48021800); -impl_sdmmc!(SDMMC1, 0x52007000); -impl_sdmmc_pin!(SDMMC1, D0Pin, PB13, 12); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -impl_sdmmc!(SDMMC2, 0x48022400); -impl_sdmmc_pin!(SDMMC2, CmdPin, PA0, 9); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D1Pin, PG10, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); -impl_sdmmc_pin!(SDMMC2, D3Pin, PG12, 10); -impl_sdmmc_pin!(SDMMC2, D6Pin, PG13, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PG14, 10); -impl_sdmmc_pin!(SDMMC2, D0Pin, PG9, 11); diff --git a/embassy-stm32/src/chip/stm32h7a3qi.rs b/embassy-stm32/src/chip/stm32h7a3qi.rs deleted file mode 100644 index 0a1a11d7..00000000 --- a/embassy-stm32/src/chip/stm32h7a3qi.rs +++ /dev/null @@ -1,886 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, BDMA1, BDMA2, COMP1, COMP2, DAC1, DAC2, DCMI, DMA2D, DTS, - FDCAN1, FDCAN2, GFXMMU, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, - PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, - PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, - PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, - PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, - PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, - PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, - PI8, PI9, PI10, PI11, PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, - PJ10, PJ11, PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, - PK11, PK12, PK13, PK14, PK15, I2C1, I2C2, I2C3, I2C4, IWDG1, JPEG, LPTIM1, LPTIM2, LPTIM3, - LPUART1, LTDC, MDIOS, MDMA, OCTOSPI1, OCTOSPI2, OCTOSPIM, OPAMP1, OPAMP2, PSSI, PWR, RCC, RNG, - RTC, SAI1, SAI2, SDMMC1, SDMMC2, SPDIFRX, SPI1, SPI2, SPI3, SPI4, SPI6, SWPMI1, SYSCFG, TIM1, - TIM12, TIM13, TIM14, TIM15, TIM16, TIM17, TIM2, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, UART4, - UART5, UART7, UART8, UART9, USART1, USART10, USART2, USART3, USART6, USB_OTG_HS, VREFBUF, - WWDG1 -); -pub const GPIO_BASE: usize = 0x58020000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC = 18, - BDMA1 = 154, - BDMA2_Channel0 = 129, - BDMA2_Channel1 = 130, - BDMA2_Channel2 = 131, - BDMA2_Channel3 = 132, - BDMA2_Channel4 = 133, - BDMA2_Channel5 = 134, - BDMA2_Channel6 = 135, - BDMA2_Channel7 = 136, - CEC = 94, - CRS = 144, - DAC2 = 127, - DCMI_PSSI = 78, - DFSDM1_FLT4 = 64, - DFSDM1_FLT5 = 65, - DFSDM1_FLT6 = 66, - DFSDM1_FLT7 = 67, - DFSDM2 = 42, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - DTS = 147, - ECC = 145, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - GFXMMU = 153, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - JPEG = 121, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OCTOSPI1 = 92, - OCTOSPI2 = 150, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_PVM = 1, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_TAMP_STAMP_CSS_LSE = 2, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - UART9 = 140, - USART1 = 37, - USART10 = 141, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(BDMA1); - declare!(BDMA2_Channel0); - declare!(BDMA2_Channel1); - declare!(BDMA2_Channel2); - declare!(BDMA2_Channel3); - declare!(BDMA2_Channel4); - declare!(BDMA2_Channel5); - declare!(BDMA2_Channel6); - declare!(BDMA2_Channel7); - declare!(CEC); - declare!(CRS); - declare!(DAC2); - declare!(DCMI_PSSI); - declare!(DFSDM1_FLT4); - declare!(DFSDM1_FLT5); - declare!(DFSDM1_FLT6); - declare!(DFSDM1_FLT7); - declare!(DFSDM2); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(DTS); - declare!(ECC); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(GFXMMU); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(JPEG); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_PVM); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_TAMP_STAMP_CSS_LSE); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(UART9); - declare!(USART1); - declare!(USART10); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn BDMA1(); - fn BDMA2_Channel0(); - fn BDMA2_Channel1(); - fn BDMA2_Channel2(); - fn BDMA2_Channel3(); - fn BDMA2_Channel4(); - fn BDMA2_Channel5(); - fn BDMA2_Channel6(); - fn BDMA2_Channel7(); - fn CEC(); - fn CRS(); - fn DAC2(); - fn DCMI_PSSI(); - fn DFSDM1_FLT4(); - fn DFSDM1_FLT5(); - fn DFSDM1_FLT6(); - fn DFSDM1_FLT7(); - fn DFSDM2(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn DTS(); - fn ECC(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn GFXMMU(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn JPEG(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_PVM(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_TAMP_STAMP_CSS_LSE(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn UART9(); - fn USART1(); - fn USART10(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 155] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: RTC_TAMP_STAMP_CSS_LSE, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _handler: DFSDM2 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { - _handler: DFSDM1_FLT4, - }, - Vector { - _handler: DFSDM1_FLT5, - }, - Vector { - _handler: DFSDM1_FLT6, - }, - Vector { - _handler: DFSDM1_FLT7, - }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { - _handler: DCMI_PSSI, - }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _handler: JPEG }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: DAC2 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA2_Channel0, - }, - Vector { - _handler: BDMA2_Channel1, - }, - Vector { - _handler: BDMA2_Channel2, - }, - Vector { - _handler: BDMA2_Channel3, - }, - Vector { - _handler: BDMA2_Channel4, - }, - Vector { - _handler: BDMA2_Channel5, - }, - Vector { - _handler: BDMA2_Channel6, - }, - Vector { - _handler: BDMA2_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: UART9 }, - Vector { _handler: USART10 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _reserved: 0 }, - Vector { _handler: DTS }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - Vector { _handler: OCTOSPI2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: GFXMMU }, - Vector { _handler: BDMA1 }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -impl_rng!(0x48021800); -impl_sdmmc!(SDMMC1, 0x52007000); -impl_sdmmc_pin!(SDMMC1, D0Pin, PB13, 12); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -impl_sdmmc!(SDMMC2, 0x48022400); -impl_sdmmc_pin!(SDMMC2, CmdPin, PA0, 9); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D1Pin, PG10, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); -impl_sdmmc_pin!(SDMMC2, D3Pin, PG12, 10); -impl_sdmmc_pin!(SDMMC2, D6Pin, PG13, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PG14, 10); -impl_sdmmc_pin!(SDMMC2, D0Pin, PG9, 11); diff --git a/embassy-stm32/src/chip/stm32h7a3rg.rs b/embassy-stm32/src/chip/stm32h7a3rg.rs deleted file mode 100644 index b9a317e4..00000000 --- a/embassy-stm32/src/chip/stm32h7a3rg.rs +++ /dev/null @@ -1,885 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, BDMA1, BDMA2, COMP1, DAC1, DAC2, DMA2D, DTS, FDCAN1, - FDCAN2, GFXMMU, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, - PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, - PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, - PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, - PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, - PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, - PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, - PH10, PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, - PI11, PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, PJ10, PJ11, - PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, PK11, PK12, - PK13, PK14, PK15, I2C1, I2C3, I2C4, IWDG1, JPEG, LPTIM1, LPTIM2, LPTIM3, LPUART1, LTDC, MDIOS, - MDMA, OCTOSPI1, OCTOSPI2, OCTOSPIM, OPAMP1, PWR, RCC, RNG, RTC, SAI2, SDMMC1, SDMMC2, SPDIFRX, - SPI1, SPI2, SPI3, SPI6, SWPMI1, SYSCFG, TIM1, TIM12, TIM13, TIM14, TIM15, TIM16, TIM17, TIM2, - TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, UART4, UART5, UART7, USART1, USART2, USART3, USART6, - USB_OTG_HS, VREFBUF, WWDG1 -); -pub const GPIO_BASE: usize = 0x58020000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC = 18, - BDMA1 = 154, - BDMA2_Channel0 = 129, - BDMA2_Channel1 = 130, - BDMA2_Channel2 = 131, - BDMA2_Channel3 = 132, - BDMA2_Channel4 = 133, - BDMA2_Channel5 = 134, - BDMA2_Channel6 = 135, - BDMA2_Channel7 = 136, - CEC = 94, - CRS = 144, - DAC2 = 127, - DCMI_PSSI = 78, - DFSDM1_FLT4 = 64, - DFSDM1_FLT5 = 65, - DFSDM1_FLT6 = 66, - DFSDM1_FLT7 = 67, - DFSDM2 = 42, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - DTS = 147, - ECC = 145, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - GFXMMU = 153, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - JPEG = 121, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OCTOSPI1 = 92, - OCTOSPI2 = 150, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_PVM = 1, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_TAMP_STAMP_CSS_LSE = 2, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - UART9 = 140, - USART1 = 37, - USART10 = 141, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(BDMA1); - declare!(BDMA2_Channel0); - declare!(BDMA2_Channel1); - declare!(BDMA2_Channel2); - declare!(BDMA2_Channel3); - declare!(BDMA2_Channel4); - declare!(BDMA2_Channel5); - declare!(BDMA2_Channel6); - declare!(BDMA2_Channel7); - declare!(CEC); - declare!(CRS); - declare!(DAC2); - declare!(DCMI_PSSI); - declare!(DFSDM1_FLT4); - declare!(DFSDM1_FLT5); - declare!(DFSDM1_FLT6); - declare!(DFSDM1_FLT7); - declare!(DFSDM2); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(DTS); - declare!(ECC); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(GFXMMU); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(JPEG); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_PVM); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_TAMP_STAMP_CSS_LSE); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(UART9); - declare!(USART1); - declare!(USART10); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn BDMA1(); - fn BDMA2_Channel0(); - fn BDMA2_Channel1(); - fn BDMA2_Channel2(); - fn BDMA2_Channel3(); - fn BDMA2_Channel4(); - fn BDMA2_Channel5(); - fn BDMA2_Channel6(); - fn BDMA2_Channel7(); - fn CEC(); - fn CRS(); - fn DAC2(); - fn DCMI_PSSI(); - fn DFSDM1_FLT4(); - fn DFSDM1_FLT5(); - fn DFSDM1_FLT6(); - fn DFSDM1_FLT7(); - fn DFSDM2(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn DTS(); - fn ECC(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn GFXMMU(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn JPEG(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_PVM(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_TAMP_STAMP_CSS_LSE(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn UART9(); - fn USART1(); - fn USART10(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 155] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: RTC_TAMP_STAMP_CSS_LSE, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _handler: DFSDM2 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { - _handler: DFSDM1_FLT4, - }, - Vector { - _handler: DFSDM1_FLT5, - }, - Vector { - _handler: DFSDM1_FLT6, - }, - Vector { - _handler: DFSDM1_FLT7, - }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { - _handler: DCMI_PSSI, - }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _handler: JPEG }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: DAC2 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA2_Channel0, - }, - Vector { - _handler: BDMA2_Channel1, - }, - Vector { - _handler: BDMA2_Channel2, - }, - Vector { - _handler: BDMA2_Channel3, - }, - Vector { - _handler: BDMA2_Channel4, - }, - Vector { - _handler: BDMA2_Channel5, - }, - Vector { - _handler: BDMA2_Channel6, - }, - Vector { - _handler: BDMA2_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: UART9 }, - Vector { _handler: USART10 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _reserved: 0 }, - Vector { _handler: DTS }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - Vector { _handler: OCTOSPI2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: GFXMMU }, - Vector { _handler: BDMA1 }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -impl_rng!(0x48021800); -impl_sdmmc!(SDMMC1, 0x52007000); -impl_sdmmc_pin!(SDMMC1, D0Pin, PB13, 12); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -impl_sdmmc!(SDMMC2, 0x48022400); -impl_sdmmc_pin!(SDMMC2, CmdPin, PA0, 9); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D1Pin, PG10, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); -impl_sdmmc_pin!(SDMMC2, D3Pin, PG12, 10); -impl_sdmmc_pin!(SDMMC2, D6Pin, PG13, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PG14, 10); -impl_sdmmc_pin!(SDMMC2, D0Pin, PG9, 11); diff --git a/embassy-stm32/src/chip/stm32h7a3ri.rs b/embassy-stm32/src/chip/stm32h7a3ri.rs deleted file mode 100644 index b9a317e4..00000000 --- a/embassy-stm32/src/chip/stm32h7a3ri.rs +++ /dev/null @@ -1,885 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, BDMA1, BDMA2, COMP1, DAC1, DAC2, DMA2D, DTS, FDCAN1, - FDCAN2, GFXMMU, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, - PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, - PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, - PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, - PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, - PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, - PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, - PH10, PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, - PI11, PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, PJ10, PJ11, - PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, PK11, PK12, - PK13, PK14, PK15, I2C1, I2C3, I2C4, IWDG1, JPEG, LPTIM1, LPTIM2, LPTIM3, LPUART1, LTDC, MDIOS, - MDMA, OCTOSPI1, OCTOSPI2, OCTOSPIM, OPAMP1, PWR, RCC, RNG, RTC, SAI2, SDMMC1, SDMMC2, SPDIFRX, - SPI1, SPI2, SPI3, SPI6, SWPMI1, SYSCFG, TIM1, TIM12, TIM13, TIM14, TIM15, TIM16, TIM17, TIM2, - TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, UART4, UART5, UART7, USART1, USART2, USART3, USART6, - USB_OTG_HS, VREFBUF, WWDG1 -); -pub const GPIO_BASE: usize = 0x58020000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC = 18, - BDMA1 = 154, - BDMA2_Channel0 = 129, - BDMA2_Channel1 = 130, - BDMA2_Channel2 = 131, - BDMA2_Channel3 = 132, - BDMA2_Channel4 = 133, - BDMA2_Channel5 = 134, - BDMA2_Channel6 = 135, - BDMA2_Channel7 = 136, - CEC = 94, - CRS = 144, - DAC2 = 127, - DCMI_PSSI = 78, - DFSDM1_FLT4 = 64, - DFSDM1_FLT5 = 65, - DFSDM1_FLT6 = 66, - DFSDM1_FLT7 = 67, - DFSDM2 = 42, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - DTS = 147, - ECC = 145, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - GFXMMU = 153, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - JPEG = 121, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OCTOSPI1 = 92, - OCTOSPI2 = 150, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_PVM = 1, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_TAMP_STAMP_CSS_LSE = 2, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - UART9 = 140, - USART1 = 37, - USART10 = 141, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(BDMA1); - declare!(BDMA2_Channel0); - declare!(BDMA2_Channel1); - declare!(BDMA2_Channel2); - declare!(BDMA2_Channel3); - declare!(BDMA2_Channel4); - declare!(BDMA2_Channel5); - declare!(BDMA2_Channel6); - declare!(BDMA2_Channel7); - declare!(CEC); - declare!(CRS); - declare!(DAC2); - declare!(DCMI_PSSI); - declare!(DFSDM1_FLT4); - declare!(DFSDM1_FLT5); - declare!(DFSDM1_FLT6); - declare!(DFSDM1_FLT7); - declare!(DFSDM2); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(DTS); - declare!(ECC); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(GFXMMU); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(JPEG); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_PVM); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_TAMP_STAMP_CSS_LSE); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(UART9); - declare!(USART1); - declare!(USART10); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn BDMA1(); - fn BDMA2_Channel0(); - fn BDMA2_Channel1(); - fn BDMA2_Channel2(); - fn BDMA2_Channel3(); - fn BDMA2_Channel4(); - fn BDMA2_Channel5(); - fn BDMA2_Channel6(); - fn BDMA2_Channel7(); - fn CEC(); - fn CRS(); - fn DAC2(); - fn DCMI_PSSI(); - fn DFSDM1_FLT4(); - fn DFSDM1_FLT5(); - fn DFSDM1_FLT6(); - fn DFSDM1_FLT7(); - fn DFSDM2(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn DTS(); - fn ECC(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn GFXMMU(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn JPEG(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_PVM(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_TAMP_STAMP_CSS_LSE(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn UART9(); - fn USART1(); - fn USART10(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 155] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: RTC_TAMP_STAMP_CSS_LSE, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _handler: DFSDM2 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { - _handler: DFSDM1_FLT4, - }, - Vector { - _handler: DFSDM1_FLT5, - }, - Vector { - _handler: DFSDM1_FLT6, - }, - Vector { - _handler: DFSDM1_FLT7, - }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { - _handler: DCMI_PSSI, - }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _handler: JPEG }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: DAC2 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA2_Channel0, - }, - Vector { - _handler: BDMA2_Channel1, - }, - Vector { - _handler: BDMA2_Channel2, - }, - Vector { - _handler: BDMA2_Channel3, - }, - Vector { - _handler: BDMA2_Channel4, - }, - Vector { - _handler: BDMA2_Channel5, - }, - Vector { - _handler: BDMA2_Channel6, - }, - Vector { - _handler: BDMA2_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: UART9 }, - Vector { _handler: USART10 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _reserved: 0 }, - Vector { _handler: DTS }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - Vector { _handler: OCTOSPI2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: GFXMMU }, - Vector { _handler: BDMA1 }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -impl_rng!(0x48021800); -impl_sdmmc!(SDMMC1, 0x52007000); -impl_sdmmc_pin!(SDMMC1, D0Pin, PB13, 12); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -impl_sdmmc!(SDMMC2, 0x48022400); -impl_sdmmc_pin!(SDMMC2, CmdPin, PA0, 9); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D1Pin, PG10, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); -impl_sdmmc_pin!(SDMMC2, D3Pin, PG12, 10); -impl_sdmmc_pin!(SDMMC2, D6Pin, PG13, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PG14, 10); -impl_sdmmc_pin!(SDMMC2, D0Pin, PG9, 11); diff --git a/embassy-stm32/src/chip/stm32h7a3vg.rs b/embassy-stm32/src/chip/stm32h7a3vg.rs deleted file mode 100644 index 0a1a11d7..00000000 --- a/embassy-stm32/src/chip/stm32h7a3vg.rs +++ /dev/null @@ -1,886 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, BDMA1, BDMA2, COMP1, COMP2, DAC1, DAC2, DCMI, DMA2D, DTS, - FDCAN1, FDCAN2, GFXMMU, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, - PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, - PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, - PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, - PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, - PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, - PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, - PI8, PI9, PI10, PI11, PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, - PJ10, PJ11, PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, - PK11, PK12, PK13, PK14, PK15, I2C1, I2C2, I2C3, I2C4, IWDG1, JPEG, LPTIM1, LPTIM2, LPTIM3, - LPUART1, LTDC, MDIOS, MDMA, OCTOSPI1, OCTOSPI2, OCTOSPIM, OPAMP1, OPAMP2, PSSI, PWR, RCC, RNG, - RTC, SAI1, SAI2, SDMMC1, SDMMC2, SPDIFRX, SPI1, SPI2, SPI3, SPI4, SPI6, SWPMI1, SYSCFG, TIM1, - TIM12, TIM13, TIM14, TIM15, TIM16, TIM17, TIM2, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, UART4, - UART5, UART7, UART8, UART9, USART1, USART10, USART2, USART3, USART6, USB_OTG_HS, VREFBUF, - WWDG1 -); -pub const GPIO_BASE: usize = 0x58020000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC = 18, - BDMA1 = 154, - BDMA2_Channel0 = 129, - BDMA2_Channel1 = 130, - BDMA2_Channel2 = 131, - BDMA2_Channel3 = 132, - BDMA2_Channel4 = 133, - BDMA2_Channel5 = 134, - BDMA2_Channel6 = 135, - BDMA2_Channel7 = 136, - CEC = 94, - CRS = 144, - DAC2 = 127, - DCMI_PSSI = 78, - DFSDM1_FLT4 = 64, - DFSDM1_FLT5 = 65, - DFSDM1_FLT6 = 66, - DFSDM1_FLT7 = 67, - DFSDM2 = 42, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - DTS = 147, - ECC = 145, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - GFXMMU = 153, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - JPEG = 121, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OCTOSPI1 = 92, - OCTOSPI2 = 150, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_PVM = 1, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_TAMP_STAMP_CSS_LSE = 2, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - UART9 = 140, - USART1 = 37, - USART10 = 141, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(BDMA1); - declare!(BDMA2_Channel0); - declare!(BDMA2_Channel1); - declare!(BDMA2_Channel2); - declare!(BDMA2_Channel3); - declare!(BDMA2_Channel4); - declare!(BDMA2_Channel5); - declare!(BDMA2_Channel6); - declare!(BDMA2_Channel7); - declare!(CEC); - declare!(CRS); - declare!(DAC2); - declare!(DCMI_PSSI); - declare!(DFSDM1_FLT4); - declare!(DFSDM1_FLT5); - declare!(DFSDM1_FLT6); - declare!(DFSDM1_FLT7); - declare!(DFSDM2); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(DTS); - declare!(ECC); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(GFXMMU); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(JPEG); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_PVM); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_TAMP_STAMP_CSS_LSE); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(UART9); - declare!(USART1); - declare!(USART10); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn BDMA1(); - fn BDMA2_Channel0(); - fn BDMA2_Channel1(); - fn BDMA2_Channel2(); - fn BDMA2_Channel3(); - fn BDMA2_Channel4(); - fn BDMA2_Channel5(); - fn BDMA2_Channel6(); - fn BDMA2_Channel7(); - fn CEC(); - fn CRS(); - fn DAC2(); - fn DCMI_PSSI(); - fn DFSDM1_FLT4(); - fn DFSDM1_FLT5(); - fn DFSDM1_FLT6(); - fn DFSDM1_FLT7(); - fn DFSDM2(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn DTS(); - fn ECC(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn GFXMMU(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn JPEG(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_PVM(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_TAMP_STAMP_CSS_LSE(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn UART9(); - fn USART1(); - fn USART10(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 155] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: RTC_TAMP_STAMP_CSS_LSE, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _handler: DFSDM2 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { - _handler: DFSDM1_FLT4, - }, - Vector { - _handler: DFSDM1_FLT5, - }, - Vector { - _handler: DFSDM1_FLT6, - }, - Vector { - _handler: DFSDM1_FLT7, - }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { - _handler: DCMI_PSSI, - }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _handler: JPEG }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: DAC2 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA2_Channel0, - }, - Vector { - _handler: BDMA2_Channel1, - }, - Vector { - _handler: BDMA2_Channel2, - }, - Vector { - _handler: BDMA2_Channel3, - }, - Vector { - _handler: BDMA2_Channel4, - }, - Vector { - _handler: BDMA2_Channel5, - }, - Vector { - _handler: BDMA2_Channel6, - }, - Vector { - _handler: BDMA2_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: UART9 }, - Vector { _handler: USART10 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _reserved: 0 }, - Vector { _handler: DTS }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - Vector { _handler: OCTOSPI2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: GFXMMU }, - Vector { _handler: BDMA1 }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -impl_rng!(0x48021800); -impl_sdmmc!(SDMMC1, 0x52007000); -impl_sdmmc_pin!(SDMMC1, D0Pin, PB13, 12); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -impl_sdmmc!(SDMMC2, 0x48022400); -impl_sdmmc_pin!(SDMMC2, CmdPin, PA0, 9); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D1Pin, PG10, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); -impl_sdmmc_pin!(SDMMC2, D3Pin, PG12, 10); -impl_sdmmc_pin!(SDMMC2, D6Pin, PG13, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PG14, 10); -impl_sdmmc_pin!(SDMMC2, D0Pin, PG9, 11); diff --git a/embassy-stm32/src/chip/stm32h7a3vi.rs b/embassy-stm32/src/chip/stm32h7a3vi.rs deleted file mode 100644 index 0a1a11d7..00000000 --- a/embassy-stm32/src/chip/stm32h7a3vi.rs +++ /dev/null @@ -1,886 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, BDMA1, BDMA2, COMP1, COMP2, DAC1, DAC2, DCMI, DMA2D, DTS, - FDCAN1, FDCAN2, GFXMMU, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, - PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, - PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, - PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, - PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, - PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, - PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, - PI8, PI9, PI10, PI11, PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, - PJ10, PJ11, PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, - PK11, PK12, PK13, PK14, PK15, I2C1, I2C2, I2C3, I2C4, IWDG1, JPEG, LPTIM1, LPTIM2, LPTIM3, - LPUART1, LTDC, MDIOS, MDMA, OCTOSPI1, OCTOSPI2, OCTOSPIM, OPAMP1, OPAMP2, PSSI, PWR, RCC, RNG, - RTC, SAI1, SAI2, SDMMC1, SDMMC2, SPDIFRX, SPI1, SPI2, SPI3, SPI4, SPI6, SWPMI1, SYSCFG, TIM1, - TIM12, TIM13, TIM14, TIM15, TIM16, TIM17, TIM2, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, UART4, - UART5, UART7, UART8, UART9, USART1, USART10, USART2, USART3, USART6, USB_OTG_HS, VREFBUF, - WWDG1 -); -pub const GPIO_BASE: usize = 0x58020000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC = 18, - BDMA1 = 154, - BDMA2_Channel0 = 129, - BDMA2_Channel1 = 130, - BDMA2_Channel2 = 131, - BDMA2_Channel3 = 132, - BDMA2_Channel4 = 133, - BDMA2_Channel5 = 134, - BDMA2_Channel6 = 135, - BDMA2_Channel7 = 136, - CEC = 94, - CRS = 144, - DAC2 = 127, - DCMI_PSSI = 78, - DFSDM1_FLT4 = 64, - DFSDM1_FLT5 = 65, - DFSDM1_FLT6 = 66, - DFSDM1_FLT7 = 67, - DFSDM2 = 42, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - DTS = 147, - ECC = 145, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - GFXMMU = 153, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - JPEG = 121, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OCTOSPI1 = 92, - OCTOSPI2 = 150, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_PVM = 1, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_TAMP_STAMP_CSS_LSE = 2, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - UART9 = 140, - USART1 = 37, - USART10 = 141, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(BDMA1); - declare!(BDMA2_Channel0); - declare!(BDMA2_Channel1); - declare!(BDMA2_Channel2); - declare!(BDMA2_Channel3); - declare!(BDMA2_Channel4); - declare!(BDMA2_Channel5); - declare!(BDMA2_Channel6); - declare!(BDMA2_Channel7); - declare!(CEC); - declare!(CRS); - declare!(DAC2); - declare!(DCMI_PSSI); - declare!(DFSDM1_FLT4); - declare!(DFSDM1_FLT5); - declare!(DFSDM1_FLT6); - declare!(DFSDM1_FLT7); - declare!(DFSDM2); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(DTS); - declare!(ECC); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(GFXMMU); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(JPEG); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_PVM); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_TAMP_STAMP_CSS_LSE); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(UART9); - declare!(USART1); - declare!(USART10); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn BDMA1(); - fn BDMA2_Channel0(); - fn BDMA2_Channel1(); - fn BDMA2_Channel2(); - fn BDMA2_Channel3(); - fn BDMA2_Channel4(); - fn BDMA2_Channel5(); - fn BDMA2_Channel6(); - fn BDMA2_Channel7(); - fn CEC(); - fn CRS(); - fn DAC2(); - fn DCMI_PSSI(); - fn DFSDM1_FLT4(); - fn DFSDM1_FLT5(); - fn DFSDM1_FLT6(); - fn DFSDM1_FLT7(); - fn DFSDM2(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn DTS(); - fn ECC(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn GFXMMU(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn JPEG(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_PVM(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_TAMP_STAMP_CSS_LSE(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn UART9(); - fn USART1(); - fn USART10(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 155] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: RTC_TAMP_STAMP_CSS_LSE, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _handler: DFSDM2 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { - _handler: DFSDM1_FLT4, - }, - Vector { - _handler: DFSDM1_FLT5, - }, - Vector { - _handler: DFSDM1_FLT6, - }, - Vector { - _handler: DFSDM1_FLT7, - }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { - _handler: DCMI_PSSI, - }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _handler: JPEG }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: DAC2 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA2_Channel0, - }, - Vector { - _handler: BDMA2_Channel1, - }, - Vector { - _handler: BDMA2_Channel2, - }, - Vector { - _handler: BDMA2_Channel3, - }, - Vector { - _handler: BDMA2_Channel4, - }, - Vector { - _handler: BDMA2_Channel5, - }, - Vector { - _handler: BDMA2_Channel6, - }, - Vector { - _handler: BDMA2_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: UART9 }, - Vector { _handler: USART10 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _reserved: 0 }, - Vector { _handler: DTS }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - Vector { _handler: OCTOSPI2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: GFXMMU }, - Vector { _handler: BDMA1 }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -impl_rng!(0x48021800); -impl_sdmmc!(SDMMC1, 0x52007000); -impl_sdmmc_pin!(SDMMC1, D0Pin, PB13, 12); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -impl_sdmmc!(SDMMC2, 0x48022400); -impl_sdmmc_pin!(SDMMC2, CmdPin, PA0, 9); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D1Pin, PG10, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); -impl_sdmmc_pin!(SDMMC2, D3Pin, PG12, 10); -impl_sdmmc_pin!(SDMMC2, D6Pin, PG13, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PG14, 10); -impl_sdmmc_pin!(SDMMC2, D0Pin, PG9, 11); diff --git a/embassy-stm32/src/chip/stm32h7a3zg.rs b/embassy-stm32/src/chip/stm32h7a3zg.rs deleted file mode 100644 index 9496672f..00000000 --- a/embassy-stm32/src/chip/stm32h7a3zg.rs +++ /dev/null @@ -1,886 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, BDMA1, BDMA2, COMP1, COMP2, DAC1, DAC2, DCMI, DMA2D, DTS, - FDCAN1, FDCAN2, GFXMMU, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, - PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, - PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, - PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, - PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, - PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, - PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, - PI8, PI9, PI10, PI11, PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, - PJ10, PJ11, PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, - PK11, PK12, PK13, PK14, PK15, I2C1, I2C2, I2C3, I2C4, IWDG1, JPEG, LPTIM1, LPTIM2, LPTIM3, - LPUART1, LTDC, MDIOS, MDMA, OCTOSPI1, OCTOSPI2, OCTOSPIM, OPAMP1, OPAMP2, PSSI, PWR, RCC, RNG, - RTC, SAI1, SAI2, SDMMC1, SDMMC2, SPDIFRX, SPI1, SPI2, SPI3, SPI4, SPI5, SPI6, SWPMI1, SYSCFG, - TIM1, TIM12, TIM13, TIM14, TIM15, TIM16, TIM17, TIM2, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, - UART4, UART5, UART7, UART8, UART9, USART1, USART10, USART2, USART3, USART6, USB_OTG_HS, - VREFBUF, WWDG1 -); -pub const GPIO_BASE: usize = 0x58020000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC = 18, - BDMA1 = 154, - BDMA2_Channel0 = 129, - BDMA2_Channel1 = 130, - BDMA2_Channel2 = 131, - BDMA2_Channel3 = 132, - BDMA2_Channel4 = 133, - BDMA2_Channel5 = 134, - BDMA2_Channel6 = 135, - BDMA2_Channel7 = 136, - CEC = 94, - CRS = 144, - DAC2 = 127, - DCMI_PSSI = 78, - DFSDM1_FLT4 = 64, - DFSDM1_FLT5 = 65, - DFSDM1_FLT6 = 66, - DFSDM1_FLT7 = 67, - DFSDM2 = 42, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - DTS = 147, - ECC = 145, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - GFXMMU = 153, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - JPEG = 121, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OCTOSPI1 = 92, - OCTOSPI2 = 150, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_PVM = 1, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_TAMP_STAMP_CSS_LSE = 2, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - UART9 = 140, - USART1 = 37, - USART10 = 141, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(BDMA1); - declare!(BDMA2_Channel0); - declare!(BDMA2_Channel1); - declare!(BDMA2_Channel2); - declare!(BDMA2_Channel3); - declare!(BDMA2_Channel4); - declare!(BDMA2_Channel5); - declare!(BDMA2_Channel6); - declare!(BDMA2_Channel7); - declare!(CEC); - declare!(CRS); - declare!(DAC2); - declare!(DCMI_PSSI); - declare!(DFSDM1_FLT4); - declare!(DFSDM1_FLT5); - declare!(DFSDM1_FLT6); - declare!(DFSDM1_FLT7); - declare!(DFSDM2); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(DTS); - declare!(ECC); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(GFXMMU); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(JPEG); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_PVM); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_TAMP_STAMP_CSS_LSE); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(UART9); - declare!(USART1); - declare!(USART10); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn BDMA1(); - fn BDMA2_Channel0(); - fn BDMA2_Channel1(); - fn BDMA2_Channel2(); - fn BDMA2_Channel3(); - fn BDMA2_Channel4(); - fn BDMA2_Channel5(); - fn BDMA2_Channel6(); - fn BDMA2_Channel7(); - fn CEC(); - fn CRS(); - fn DAC2(); - fn DCMI_PSSI(); - fn DFSDM1_FLT4(); - fn DFSDM1_FLT5(); - fn DFSDM1_FLT6(); - fn DFSDM1_FLT7(); - fn DFSDM2(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn DTS(); - fn ECC(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn GFXMMU(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn JPEG(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_PVM(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_TAMP_STAMP_CSS_LSE(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn UART9(); - fn USART1(); - fn USART10(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 155] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: RTC_TAMP_STAMP_CSS_LSE, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _handler: DFSDM2 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { - _handler: DFSDM1_FLT4, - }, - Vector { - _handler: DFSDM1_FLT5, - }, - Vector { - _handler: DFSDM1_FLT6, - }, - Vector { - _handler: DFSDM1_FLT7, - }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { - _handler: DCMI_PSSI, - }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _handler: JPEG }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: DAC2 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA2_Channel0, - }, - Vector { - _handler: BDMA2_Channel1, - }, - Vector { - _handler: BDMA2_Channel2, - }, - Vector { - _handler: BDMA2_Channel3, - }, - Vector { - _handler: BDMA2_Channel4, - }, - Vector { - _handler: BDMA2_Channel5, - }, - Vector { - _handler: BDMA2_Channel6, - }, - Vector { - _handler: BDMA2_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: UART9 }, - Vector { _handler: USART10 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _reserved: 0 }, - Vector { _handler: DTS }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - Vector { _handler: OCTOSPI2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: GFXMMU }, - Vector { _handler: BDMA1 }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -impl_rng!(0x48021800); -impl_sdmmc!(SDMMC1, 0x52007000); -impl_sdmmc_pin!(SDMMC1, D0Pin, PB13, 12); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -impl_sdmmc!(SDMMC2, 0x48022400); -impl_sdmmc_pin!(SDMMC2, CmdPin, PA0, 9); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D1Pin, PG10, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); -impl_sdmmc_pin!(SDMMC2, D3Pin, PG12, 10); -impl_sdmmc_pin!(SDMMC2, D6Pin, PG13, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PG14, 10); -impl_sdmmc_pin!(SDMMC2, D0Pin, PG9, 11); diff --git a/embassy-stm32/src/chip/stm32h7a3zi.rs b/embassy-stm32/src/chip/stm32h7a3zi.rs deleted file mode 100644 index 9496672f..00000000 --- a/embassy-stm32/src/chip/stm32h7a3zi.rs +++ /dev/null @@ -1,886 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, BDMA1, BDMA2, COMP1, COMP2, DAC1, DAC2, DCMI, DMA2D, DTS, - FDCAN1, FDCAN2, GFXMMU, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, - PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, - PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, - PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, - PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, - PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, - PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, - PI8, PI9, PI10, PI11, PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, - PJ10, PJ11, PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, - PK11, PK12, PK13, PK14, PK15, I2C1, I2C2, I2C3, I2C4, IWDG1, JPEG, LPTIM1, LPTIM2, LPTIM3, - LPUART1, LTDC, MDIOS, MDMA, OCTOSPI1, OCTOSPI2, OCTOSPIM, OPAMP1, OPAMP2, PSSI, PWR, RCC, RNG, - RTC, SAI1, SAI2, SDMMC1, SDMMC2, SPDIFRX, SPI1, SPI2, SPI3, SPI4, SPI5, SPI6, SWPMI1, SYSCFG, - TIM1, TIM12, TIM13, TIM14, TIM15, TIM16, TIM17, TIM2, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, - UART4, UART5, UART7, UART8, UART9, USART1, USART10, USART2, USART3, USART6, USB_OTG_HS, - VREFBUF, WWDG1 -); -pub const GPIO_BASE: usize = 0x58020000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC = 18, - BDMA1 = 154, - BDMA2_Channel0 = 129, - BDMA2_Channel1 = 130, - BDMA2_Channel2 = 131, - BDMA2_Channel3 = 132, - BDMA2_Channel4 = 133, - BDMA2_Channel5 = 134, - BDMA2_Channel6 = 135, - BDMA2_Channel7 = 136, - CEC = 94, - CRS = 144, - DAC2 = 127, - DCMI_PSSI = 78, - DFSDM1_FLT4 = 64, - DFSDM1_FLT5 = 65, - DFSDM1_FLT6 = 66, - DFSDM1_FLT7 = 67, - DFSDM2 = 42, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - DTS = 147, - ECC = 145, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - GFXMMU = 153, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - JPEG = 121, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OCTOSPI1 = 92, - OCTOSPI2 = 150, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_PVM = 1, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_TAMP_STAMP_CSS_LSE = 2, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - UART9 = 140, - USART1 = 37, - USART10 = 141, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(BDMA1); - declare!(BDMA2_Channel0); - declare!(BDMA2_Channel1); - declare!(BDMA2_Channel2); - declare!(BDMA2_Channel3); - declare!(BDMA2_Channel4); - declare!(BDMA2_Channel5); - declare!(BDMA2_Channel6); - declare!(BDMA2_Channel7); - declare!(CEC); - declare!(CRS); - declare!(DAC2); - declare!(DCMI_PSSI); - declare!(DFSDM1_FLT4); - declare!(DFSDM1_FLT5); - declare!(DFSDM1_FLT6); - declare!(DFSDM1_FLT7); - declare!(DFSDM2); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(DTS); - declare!(ECC); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(GFXMMU); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(JPEG); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_PVM); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_TAMP_STAMP_CSS_LSE); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(UART9); - declare!(USART1); - declare!(USART10); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn BDMA1(); - fn BDMA2_Channel0(); - fn BDMA2_Channel1(); - fn BDMA2_Channel2(); - fn BDMA2_Channel3(); - fn BDMA2_Channel4(); - fn BDMA2_Channel5(); - fn BDMA2_Channel6(); - fn BDMA2_Channel7(); - fn CEC(); - fn CRS(); - fn DAC2(); - fn DCMI_PSSI(); - fn DFSDM1_FLT4(); - fn DFSDM1_FLT5(); - fn DFSDM1_FLT6(); - fn DFSDM1_FLT7(); - fn DFSDM2(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn DTS(); - fn ECC(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn GFXMMU(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn JPEG(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_PVM(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_TAMP_STAMP_CSS_LSE(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn UART9(); - fn USART1(); - fn USART10(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 155] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: RTC_TAMP_STAMP_CSS_LSE, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _handler: DFSDM2 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { - _handler: DFSDM1_FLT4, - }, - Vector { - _handler: DFSDM1_FLT5, - }, - Vector { - _handler: DFSDM1_FLT6, - }, - Vector { - _handler: DFSDM1_FLT7, - }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { - _handler: DCMI_PSSI, - }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _handler: JPEG }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: DAC2 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA2_Channel0, - }, - Vector { - _handler: BDMA2_Channel1, - }, - Vector { - _handler: BDMA2_Channel2, - }, - Vector { - _handler: BDMA2_Channel3, - }, - Vector { - _handler: BDMA2_Channel4, - }, - Vector { - _handler: BDMA2_Channel5, - }, - Vector { - _handler: BDMA2_Channel6, - }, - Vector { - _handler: BDMA2_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: UART9 }, - Vector { _handler: USART10 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _reserved: 0 }, - Vector { _handler: DTS }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - Vector { _handler: OCTOSPI2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: GFXMMU }, - Vector { _handler: BDMA1 }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -impl_rng!(0x48021800); -impl_sdmmc!(SDMMC1, 0x52007000); -impl_sdmmc_pin!(SDMMC1, D0Pin, PB13, 12); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -impl_sdmmc!(SDMMC2, 0x48022400); -impl_sdmmc_pin!(SDMMC2, CmdPin, PA0, 9); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D1Pin, PG10, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); -impl_sdmmc_pin!(SDMMC2, D3Pin, PG12, 10); -impl_sdmmc_pin!(SDMMC2, D6Pin, PG13, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PG14, 10); -impl_sdmmc_pin!(SDMMC2, D0Pin, PG9, 11); diff --git a/embassy-stm32/src/chip/stm32h7b0ab.rs b/embassy-stm32/src/chip/stm32h7b0ab.rs deleted file mode 100644 index 279f688d..00000000 --- a/embassy-stm32/src/chip/stm32h7b0ab.rs +++ /dev/null @@ -1,895 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, BDMA1, BDMA2, COMP1, COMP2, CRYP, DAC1, DAC2, DCMI, DMA2D, - DTS, FDCAN1, FDCAN2, GFXMMU, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, - PA12, PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, - PB13, PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, - PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, - PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, - PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, - PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, - PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, - PI6, PI7, PI8, PI9, PI10, PI11, PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, - PJ8, PJ9, PJ10, PJ11, PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, - PK10, PK11, PK12, PK13, PK14, PK15, HASH, I2C1, I2C2, I2C3, I2C4, IWDG1, JPEG, LPTIM1, LPTIM2, - LPTIM3, LPUART1, LTDC, MDIOS, MDMA, OCTOSPI1, OCTOSPI2, OCTOSPIM, OPAMP1, OPAMP2, OTFDEC1, - OTFDEC2, PSSI, PWR, RCC, RNG, RTC, SAI1, SAI2, SDMMC1, SDMMC2, SPDIFRX, SPI1, SPI2, SPI3, SPI4, - SPI5, SPI6, SWPMI1, SYSCFG, TIM1, TIM12, TIM13, TIM14, TIM15, TIM16, TIM17, TIM2, TIM3, TIM4, - TIM5, TIM6, TIM7, TIM8, UART4, UART5, UART7, UART8, UART9, USART1, USART10, USART2, USART3, - USART6, USB_OTG_HS, VREFBUF, WWDG1 -); -pub const GPIO_BASE: usize = 0x58020000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC = 18, - BDMA1 = 154, - BDMA2_Channel0 = 129, - BDMA2_Channel1 = 130, - BDMA2_Channel2 = 131, - BDMA2_Channel3 = 132, - BDMA2_Channel4 = 133, - BDMA2_Channel5 = 134, - BDMA2_Channel6 = 135, - BDMA2_Channel7 = 136, - CEC = 94, - CRS = 144, - CRYP = 79, - DAC2 = 127, - DCMI_PSSI = 78, - DFSDM1_FLT4 = 64, - DFSDM1_FLT5 = 65, - DFSDM1_FLT6 = 66, - DFSDM1_FLT7 = 67, - DFSDM2 = 42, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - DTS = 147, - ECC = 145, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - GFXMMU = 153, - HASH_RNG = 80, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - JPEG = 121, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OCTOSPI1 = 92, - OCTOSPI2 = 150, - OTFDEC1 = 151, - OTFDEC2 = 152, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_PVM = 1, - RCC = 5, - RTC_Alarm = 41, - RTC_TAMP_STAMP_CSS_LSE = 2, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - UART9 = 140, - USART1 = 37, - USART10 = 141, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(BDMA1); - declare!(BDMA2_Channel0); - declare!(BDMA2_Channel1); - declare!(BDMA2_Channel2); - declare!(BDMA2_Channel3); - declare!(BDMA2_Channel4); - declare!(BDMA2_Channel5); - declare!(BDMA2_Channel6); - declare!(BDMA2_Channel7); - declare!(CEC); - declare!(CRS); - declare!(CRYP); - declare!(DAC2); - declare!(DCMI_PSSI); - declare!(DFSDM1_FLT4); - declare!(DFSDM1_FLT5); - declare!(DFSDM1_FLT6); - declare!(DFSDM1_FLT7); - declare!(DFSDM2); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(DTS); - declare!(ECC); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(GFXMMU); - declare!(HASH_RNG); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(JPEG); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTFDEC1); - declare!(OTFDEC2); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_PVM); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_TAMP_STAMP_CSS_LSE); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(UART9); - declare!(USART1); - declare!(USART10); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn BDMA1(); - fn BDMA2_Channel0(); - fn BDMA2_Channel1(); - fn BDMA2_Channel2(); - fn BDMA2_Channel3(); - fn BDMA2_Channel4(); - fn BDMA2_Channel5(); - fn BDMA2_Channel6(); - fn BDMA2_Channel7(); - fn CEC(); - fn CRS(); - fn CRYP(); - fn DAC2(); - fn DCMI_PSSI(); - fn DFSDM1_FLT4(); - fn DFSDM1_FLT5(); - fn DFSDM1_FLT6(); - fn DFSDM1_FLT7(); - fn DFSDM2(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn DTS(); - fn ECC(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn GFXMMU(); - fn HASH_RNG(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn JPEG(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTFDEC1(); - fn OTFDEC2(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_PVM(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_TAMP_STAMP_CSS_LSE(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn UART9(); - fn USART1(); - fn USART10(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 155] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: RTC_TAMP_STAMP_CSS_LSE, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _handler: DFSDM2 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { - _handler: DFSDM1_FLT4, - }, - Vector { - _handler: DFSDM1_FLT5, - }, - Vector { - _handler: DFSDM1_FLT6, - }, - Vector { - _handler: DFSDM1_FLT7, - }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { - _handler: DCMI_PSSI, - }, - Vector { _handler: CRYP }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _handler: JPEG }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: DAC2 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA2_Channel0, - }, - Vector { - _handler: BDMA2_Channel1, - }, - Vector { - _handler: BDMA2_Channel2, - }, - Vector { - _handler: BDMA2_Channel3, - }, - Vector { - _handler: BDMA2_Channel4, - }, - Vector { - _handler: BDMA2_Channel5, - }, - Vector { - _handler: BDMA2_Channel6, - }, - Vector { - _handler: BDMA2_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: UART9 }, - Vector { _handler: USART10 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _reserved: 0 }, - Vector { _handler: DTS }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - Vector { _handler: OCTOSPI2 }, - Vector { _handler: OTFDEC1 }, - Vector { _handler: OTFDEC2 }, - Vector { _handler: GFXMMU }, - Vector { _handler: BDMA1 }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -impl_rng!(0x48021800); -impl_sdmmc!(SDMMC1, 0x52007000); -impl_sdmmc_pin!(SDMMC1, D0Pin, PB13, 12); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -impl_sdmmc!(SDMMC2, 0x48022400); -impl_sdmmc_pin!(SDMMC2, CmdPin, PA0, 9); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D1Pin, PG10, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); -impl_sdmmc_pin!(SDMMC2, D3Pin, PG12, 10); -impl_sdmmc_pin!(SDMMC2, D6Pin, PG13, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PG14, 10); -impl_sdmmc_pin!(SDMMC2, D0Pin, PG9, 11); diff --git a/embassy-stm32/src/chip/stm32h7b0ib.rs b/embassy-stm32/src/chip/stm32h7b0ib.rs deleted file mode 100644 index 279f688d..00000000 --- a/embassy-stm32/src/chip/stm32h7b0ib.rs +++ /dev/null @@ -1,895 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, BDMA1, BDMA2, COMP1, COMP2, CRYP, DAC1, DAC2, DCMI, DMA2D, - DTS, FDCAN1, FDCAN2, GFXMMU, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, - PA12, PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, - PB13, PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, - PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, - PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, - PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, - PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, - PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, - PI6, PI7, PI8, PI9, PI10, PI11, PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, - PJ8, PJ9, PJ10, PJ11, PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, - PK10, PK11, PK12, PK13, PK14, PK15, HASH, I2C1, I2C2, I2C3, I2C4, IWDG1, JPEG, LPTIM1, LPTIM2, - LPTIM3, LPUART1, LTDC, MDIOS, MDMA, OCTOSPI1, OCTOSPI2, OCTOSPIM, OPAMP1, OPAMP2, OTFDEC1, - OTFDEC2, PSSI, PWR, RCC, RNG, RTC, SAI1, SAI2, SDMMC1, SDMMC2, SPDIFRX, SPI1, SPI2, SPI3, SPI4, - SPI5, SPI6, SWPMI1, SYSCFG, TIM1, TIM12, TIM13, TIM14, TIM15, TIM16, TIM17, TIM2, TIM3, TIM4, - TIM5, TIM6, TIM7, TIM8, UART4, UART5, UART7, UART8, UART9, USART1, USART10, USART2, USART3, - USART6, USB_OTG_HS, VREFBUF, WWDG1 -); -pub const GPIO_BASE: usize = 0x58020000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC = 18, - BDMA1 = 154, - BDMA2_Channel0 = 129, - BDMA2_Channel1 = 130, - BDMA2_Channel2 = 131, - BDMA2_Channel3 = 132, - BDMA2_Channel4 = 133, - BDMA2_Channel5 = 134, - BDMA2_Channel6 = 135, - BDMA2_Channel7 = 136, - CEC = 94, - CRS = 144, - CRYP = 79, - DAC2 = 127, - DCMI_PSSI = 78, - DFSDM1_FLT4 = 64, - DFSDM1_FLT5 = 65, - DFSDM1_FLT6 = 66, - DFSDM1_FLT7 = 67, - DFSDM2 = 42, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - DTS = 147, - ECC = 145, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - GFXMMU = 153, - HASH_RNG = 80, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - JPEG = 121, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OCTOSPI1 = 92, - OCTOSPI2 = 150, - OTFDEC1 = 151, - OTFDEC2 = 152, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_PVM = 1, - RCC = 5, - RTC_Alarm = 41, - RTC_TAMP_STAMP_CSS_LSE = 2, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - UART9 = 140, - USART1 = 37, - USART10 = 141, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(BDMA1); - declare!(BDMA2_Channel0); - declare!(BDMA2_Channel1); - declare!(BDMA2_Channel2); - declare!(BDMA2_Channel3); - declare!(BDMA2_Channel4); - declare!(BDMA2_Channel5); - declare!(BDMA2_Channel6); - declare!(BDMA2_Channel7); - declare!(CEC); - declare!(CRS); - declare!(CRYP); - declare!(DAC2); - declare!(DCMI_PSSI); - declare!(DFSDM1_FLT4); - declare!(DFSDM1_FLT5); - declare!(DFSDM1_FLT6); - declare!(DFSDM1_FLT7); - declare!(DFSDM2); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(DTS); - declare!(ECC); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(GFXMMU); - declare!(HASH_RNG); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(JPEG); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTFDEC1); - declare!(OTFDEC2); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_PVM); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_TAMP_STAMP_CSS_LSE); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(UART9); - declare!(USART1); - declare!(USART10); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn BDMA1(); - fn BDMA2_Channel0(); - fn BDMA2_Channel1(); - fn BDMA2_Channel2(); - fn BDMA2_Channel3(); - fn BDMA2_Channel4(); - fn BDMA2_Channel5(); - fn BDMA2_Channel6(); - fn BDMA2_Channel7(); - fn CEC(); - fn CRS(); - fn CRYP(); - fn DAC2(); - fn DCMI_PSSI(); - fn DFSDM1_FLT4(); - fn DFSDM1_FLT5(); - fn DFSDM1_FLT6(); - fn DFSDM1_FLT7(); - fn DFSDM2(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn DTS(); - fn ECC(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn GFXMMU(); - fn HASH_RNG(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn JPEG(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTFDEC1(); - fn OTFDEC2(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_PVM(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_TAMP_STAMP_CSS_LSE(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn UART9(); - fn USART1(); - fn USART10(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 155] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: RTC_TAMP_STAMP_CSS_LSE, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _handler: DFSDM2 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { - _handler: DFSDM1_FLT4, - }, - Vector { - _handler: DFSDM1_FLT5, - }, - Vector { - _handler: DFSDM1_FLT6, - }, - Vector { - _handler: DFSDM1_FLT7, - }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { - _handler: DCMI_PSSI, - }, - Vector { _handler: CRYP }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _handler: JPEG }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: DAC2 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA2_Channel0, - }, - Vector { - _handler: BDMA2_Channel1, - }, - Vector { - _handler: BDMA2_Channel2, - }, - Vector { - _handler: BDMA2_Channel3, - }, - Vector { - _handler: BDMA2_Channel4, - }, - Vector { - _handler: BDMA2_Channel5, - }, - Vector { - _handler: BDMA2_Channel6, - }, - Vector { - _handler: BDMA2_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: UART9 }, - Vector { _handler: USART10 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _reserved: 0 }, - Vector { _handler: DTS }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - Vector { _handler: OCTOSPI2 }, - Vector { _handler: OTFDEC1 }, - Vector { _handler: OTFDEC2 }, - Vector { _handler: GFXMMU }, - Vector { _handler: BDMA1 }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -impl_rng!(0x48021800); -impl_sdmmc!(SDMMC1, 0x52007000); -impl_sdmmc_pin!(SDMMC1, D0Pin, PB13, 12); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -impl_sdmmc!(SDMMC2, 0x48022400); -impl_sdmmc_pin!(SDMMC2, CmdPin, PA0, 9); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D1Pin, PG10, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); -impl_sdmmc_pin!(SDMMC2, D3Pin, PG12, 10); -impl_sdmmc_pin!(SDMMC2, D6Pin, PG13, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PG14, 10); -impl_sdmmc_pin!(SDMMC2, D0Pin, PG9, 11); diff --git a/embassy-stm32/src/chip/stm32h7b0rb.rs b/embassy-stm32/src/chip/stm32h7b0rb.rs deleted file mode 100644 index 2e945c3a..00000000 --- a/embassy-stm32/src/chip/stm32h7b0rb.rs +++ /dev/null @@ -1,894 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, BDMA1, BDMA2, COMP1, CRYP, DAC1, DAC2, DMA2D, DTS, FDCAN1, - FDCAN2, GFXMMU, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, - PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, - PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, - PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, - PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, - PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, - PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, - PH10, PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, - PI11, PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, PJ10, PJ11, - PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, PK11, PK12, - PK13, PK14, PK15, HASH, I2C1, I2C3, I2C4, IWDG1, JPEG, LPTIM1, LPTIM2, LPTIM3, LPUART1, LTDC, - MDIOS, MDMA, OCTOSPI1, OCTOSPI2, OCTOSPIM, OPAMP1, OTFDEC1, PWR, RCC, RNG, RTC, SAI2, SDMMC1, - SDMMC2, SPDIFRX, SPI1, SPI2, SPI3, SPI6, SWPMI1, SYSCFG, TIM1, TIM12, TIM13, TIM14, TIM15, - TIM16, TIM17, TIM2, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, UART4, UART5, UART7, USART1, USART2, - USART3, USART6, USB_OTG_HS, VREFBUF, WWDG1 -); -pub const GPIO_BASE: usize = 0x58020000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC = 18, - BDMA1 = 154, - BDMA2_Channel0 = 129, - BDMA2_Channel1 = 130, - BDMA2_Channel2 = 131, - BDMA2_Channel3 = 132, - BDMA2_Channel4 = 133, - BDMA2_Channel5 = 134, - BDMA2_Channel6 = 135, - BDMA2_Channel7 = 136, - CEC = 94, - CRS = 144, - CRYP = 79, - DAC2 = 127, - DCMI_PSSI = 78, - DFSDM1_FLT4 = 64, - DFSDM1_FLT5 = 65, - DFSDM1_FLT6 = 66, - DFSDM1_FLT7 = 67, - DFSDM2 = 42, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - DTS = 147, - ECC = 145, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - GFXMMU = 153, - HASH_RNG = 80, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - JPEG = 121, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OCTOSPI1 = 92, - OCTOSPI2 = 150, - OTFDEC1 = 151, - OTFDEC2 = 152, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_PVM = 1, - RCC = 5, - RTC_Alarm = 41, - RTC_TAMP_STAMP_CSS_LSE = 2, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - UART9 = 140, - USART1 = 37, - USART10 = 141, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(BDMA1); - declare!(BDMA2_Channel0); - declare!(BDMA2_Channel1); - declare!(BDMA2_Channel2); - declare!(BDMA2_Channel3); - declare!(BDMA2_Channel4); - declare!(BDMA2_Channel5); - declare!(BDMA2_Channel6); - declare!(BDMA2_Channel7); - declare!(CEC); - declare!(CRS); - declare!(CRYP); - declare!(DAC2); - declare!(DCMI_PSSI); - declare!(DFSDM1_FLT4); - declare!(DFSDM1_FLT5); - declare!(DFSDM1_FLT6); - declare!(DFSDM1_FLT7); - declare!(DFSDM2); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(DTS); - declare!(ECC); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(GFXMMU); - declare!(HASH_RNG); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(JPEG); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTFDEC1); - declare!(OTFDEC2); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_PVM); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_TAMP_STAMP_CSS_LSE); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(UART9); - declare!(USART1); - declare!(USART10); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn BDMA1(); - fn BDMA2_Channel0(); - fn BDMA2_Channel1(); - fn BDMA2_Channel2(); - fn BDMA2_Channel3(); - fn BDMA2_Channel4(); - fn BDMA2_Channel5(); - fn BDMA2_Channel6(); - fn BDMA2_Channel7(); - fn CEC(); - fn CRS(); - fn CRYP(); - fn DAC2(); - fn DCMI_PSSI(); - fn DFSDM1_FLT4(); - fn DFSDM1_FLT5(); - fn DFSDM1_FLT6(); - fn DFSDM1_FLT7(); - fn DFSDM2(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn DTS(); - fn ECC(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn GFXMMU(); - fn HASH_RNG(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn JPEG(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTFDEC1(); - fn OTFDEC2(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_PVM(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_TAMP_STAMP_CSS_LSE(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn UART9(); - fn USART1(); - fn USART10(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 155] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: RTC_TAMP_STAMP_CSS_LSE, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _handler: DFSDM2 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { - _handler: DFSDM1_FLT4, - }, - Vector { - _handler: DFSDM1_FLT5, - }, - Vector { - _handler: DFSDM1_FLT6, - }, - Vector { - _handler: DFSDM1_FLT7, - }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { - _handler: DCMI_PSSI, - }, - Vector { _handler: CRYP }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _handler: JPEG }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: DAC2 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA2_Channel0, - }, - Vector { - _handler: BDMA2_Channel1, - }, - Vector { - _handler: BDMA2_Channel2, - }, - Vector { - _handler: BDMA2_Channel3, - }, - Vector { - _handler: BDMA2_Channel4, - }, - Vector { - _handler: BDMA2_Channel5, - }, - Vector { - _handler: BDMA2_Channel6, - }, - Vector { - _handler: BDMA2_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: UART9 }, - Vector { _handler: USART10 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _reserved: 0 }, - Vector { _handler: DTS }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - Vector { _handler: OCTOSPI2 }, - Vector { _handler: OTFDEC1 }, - Vector { _handler: OTFDEC2 }, - Vector { _handler: GFXMMU }, - Vector { _handler: BDMA1 }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -impl_rng!(0x48021800); -impl_sdmmc!(SDMMC1, 0x52007000); -impl_sdmmc_pin!(SDMMC1, D0Pin, PB13, 12); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -impl_sdmmc!(SDMMC2, 0x48022400); -impl_sdmmc_pin!(SDMMC2, CmdPin, PA0, 9); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D1Pin, PG10, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); -impl_sdmmc_pin!(SDMMC2, D3Pin, PG12, 10); -impl_sdmmc_pin!(SDMMC2, D6Pin, PG13, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PG14, 10); -impl_sdmmc_pin!(SDMMC2, D0Pin, PG9, 11); diff --git a/embassy-stm32/src/chip/stm32h7b0vb.rs b/embassy-stm32/src/chip/stm32h7b0vb.rs deleted file mode 100644 index f283be64..00000000 --- a/embassy-stm32/src/chip/stm32h7b0vb.rs +++ /dev/null @@ -1,895 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, BDMA1, BDMA2, COMP1, COMP2, CRYP, DAC1, DAC2, DCMI, DMA2D, - DTS, FDCAN1, FDCAN2, GFXMMU, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, - PA12, PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, - PB13, PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, - PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, - PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, - PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, - PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, - PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, - PI6, PI7, PI8, PI9, PI10, PI11, PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, - PJ8, PJ9, PJ10, PJ11, PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, - PK10, PK11, PK12, PK13, PK14, PK15, HASH, I2C1, I2C2, I2C3, I2C4, IWDG1, JPEG, LPTIM1, LPTIM2, - LPTIM3, LPUART1, LTDC, MDIOS, MDMA, OCTOSPI1, OCTOSPI2, OCTOSPIM, OPAMP1, OPAMP2, OTFDEC1, - PSSI, PWR, RCC, RNG, RTC, SAI1, SAI2, SDMMC1, SDMMC2, SPDIFRX, SPI1, SPI2, SPI3, SPI4, SPI6, - SWPMI1, SYSCFG, TIM1, TIM12, TIM13, TIM14, TIM15, TIM16, TIM17, TIM2, TIM3, TIM4, TIM5, TIM6, - TIM7, TIM8, UART4, UART5, UART7, UART8, UART9, USART1, USART10, USART2, USART3, USART6, - USB_OTG_HS, VREFBUF, WWDG1 -); -pub const GPIO_BASE: usize = 0x58020000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC = 18, - BDMA1 = 154, - BDMA2_Channel0 = 129, - BDMA2_Channel1 = 130, - BDMA2_Channel2 = 131, - BDMA2_Channel3 = 132, - BDMA2_Channel4 = 133, - BDMA2_Channel5 = 134, - BDMA2_Channel6 = 135, - BDMA2_Channel7 = 136, - CEC = 94, - CRS = 144, - CRYP = 79, - DAC2 = 127, - DCMI_PSSI = 78, - DFSDM1_FLT4 = 64, - DFSDM1_FLT5 = 65, - DFSDM1_FLT6 = 66, - DFSDM1_FLT7 = 67, - DFSDM2 = 42, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - DTS = 147, - ECC = 145, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - GFXMMU = 153, - HASH_RNG = 80, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - JPEG = 121, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OCTOSPI1 = 92, - OCTOSPI2 = 150, - OTFDEC1 = 151, - OTFDEC2 = 152, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_PVM = 1, - RCC = 5, - RTC_Alarm = 41, - RTC_TAMP_STAMP_CSS_LSE = 2, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - UART9 = 140, - USART1 = 37, - USART10 = 141, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(BDMA1); - declare!(BDMA2_Channel0); - declare!(BDMA2_Channel1); - declare!(BDMA2_Channel2); - declare!(BDMA2_Channel3); - declare!(BDMA2_Channel4); - declare!(BDMA2_Channel5); - declare!(BDMA2_Channel6); - declare!(BDMA2_Channel7); - declare!(CEC); - declare!(CRS); - declare!(CRYP); - declare!(DAC2); - declare!(DCMI_PSSI); - declare!(DFSDM1_FLT4); - declare!(DFSDM1_FLT5); - declare!(DFSDM1_FLT6); - declare!(DFSDM1_FLT7); - declare!(DFSDM2); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(DTS); - declare!(ECC); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(GFXMMU); - declare!(HASH_RNG); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(JPEG); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTFDEC1); - declare!(OTFDEC2); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_PVM); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_TAMP_STAMP_CSS_LSE); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(UART9); - declare!(USART1); - declare!(USART10); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn BDMA1(); - fn BDMA2_Channel0(); - fn BDMA2_Channel1(); - fn BDMA2_Channel2(); - fn BDMA2_Channel3(); - fn BDMA2_Channel4(); - fn BDMA2_Channel5(); - fn BDMA2_Channel6(); - fn BDMA2_Channel7(); - fn CEC(); - fn CRS(); - fn CRYP(); - fn DAC2(); - fn DCMI_PSSI(); - fn DFSDM1_FLT4(); - fn DFSDM1_FLT5(); - fn DFSDM1_FLT6(); - fn DFSDM1_FLT7(); - fn DFSDM2(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn DTS(); - fn ECC(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn GFXMMU(); - fn HASH_RNG(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn JPEG(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTFDEC1(); - fn OTFDEC2(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_PVM(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_TAMP_STAMP_CSS_LSE(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn UART9(); - fn USART1(); - fn USART10(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 155] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: RTC_TAMP_STAMP_CSS_LSE, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _handler: DFSDM2 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { - _handler: DFSDM1_FLT4, - }, - Vector { - _handler: DFSDM1_FLT5, - }, - Vector { - _handler: DFSDM1_FLT6, - }, - Vector { - _handler: DFSDM1_FLT7, - }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { - _handler: DCMI_PSSI, - }, - Vector { _handler: CRYP }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _handler: JPEG }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: DAC2 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA2_Channel0, - }, - Vector { - _handler: BDMA2_Channel1, - }, - Vector { - _handler: BDMA2_Channel2, - }, - Vector { - _handler: BDMA2_Channel3, - }, - Vector { - _handler: BDMA2_Channel4, - }, - Vector { - _handler: BDMA2_Channel5, - }, - Vector { - _handler: BDMA2_Channel6, - }, - Vector { - _handler: BDMA2_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: UART9 }, - Vector { _handler: USART10 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _reserved: 0 }, - Vector { _handler: DTS }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - Vector { _handler: OCTOSPI2 }, - Vector { _handler: OTFDEC1 }, - Vector { _handler: OTFDEC2 }, - Vector { _handler: GFXMMU }, - Vector { _handler: BDMA1 }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -impl_rng!(0x48021800); -impl_sdmmc!(SDMMC1, 0x52007000); -impl_sdmmc_pin!(SDMMC1, D0Pin, PB13, 12); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -impl_sdmmc!(SDMMC2, 0x48022400); -impl_sdmmc_pin!(SDMMC2, CmdPin, PA0, 9); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D1Pin, PG10, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); -impl_sdmmc_pin!(SDMMC2, D3Pin, PG12, 10); -impl_sdmmc_pin!(SDMMC2, D6Pin, PG13, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PG14, 10); -impl_sdmmc_pin!(SDMMC2, D0Pin, PG9, 11); diff --git a/embassy-stm32/src/chip/stm32h7b0zb.rs b/embassy-stm32/src/chip/stm32h7b0zb.rs deleted file mode 100644 index 279f688d..00000000 --- a/embassy-stm32/src/chip/stm32h7b0zb.rs +++ /dev/null @@ -1,895 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, BDMA1, BDMA2, COMP1, COMP2, CRYP, DAC1, DAC2, DCMI, DMA2D, - DTS, FDCAN1, FDCAN2, GFXMMU, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, - PA12, PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, - PB13, PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, - PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, - PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, - PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, - PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, - PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, - PI6, PI7, PI8, PI9, PI10, PI11, PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, - PJ8, PJ9, PJ10, PJ11, PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, - PK10, PK11, PK12, PK13, PK14, PK15, HASH, I2C1, I2C2, I2C3, I2C4, IWDG1, JPEG, LPTIM1, LPTIM2, - LPTIM3, LPUART1, LTDC, MDIOS, MDMA, OCTOSPI1, OCTOSPI2, OCTOSPIM, OPAMP1, OPAMP2, OTFDEC1, - OTFDEC2, PSSI, PWR, RCC, RNG, RTC, SAI1, SAI2, SDMMC1, SDMMC2, SPDIFRX, SPI1, SPI2, SPI3, SPI4, - SPI5, SPI6, SWPMI1, SYSCFG, TIM1, TIM12, TIM13, TIM14, TIM15, TIM16, TIM17, TIM2, TIM3, TIM4, - TIM5, TIM6, TIM7, TIM8, UART4, UART5, UART7, UART8, UART9, USART1, USART10, USART2, USART3, - USART6, USB_OTG_HS, VREFBUF, WWDG1 -); -pub const GPIO_BASE: usize = 0x58020000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC = 18, - BDMA1 = 154, - BDMA2_Channel0 = 129, - BDMA2_Channel1 = 130, - BDMA2_Channel2 = 131, - BDMA2_Channel3 = 132, - BDMA2_Channel4 = 133, - BDMA2_Channel5 = 134, - BDMA2_Channel6 = 135, - BDMA2_Channel7 = 136, - CEC = 94, - CRS = 144, - CRYP = 79, - DAC2 = 127, - DCMI_PSSI = 78, - DFSDM1_FLT4 = 64, - DFSDM1_FLT5 = 65, - DFSDM1_FLT6 = 66, - DFSDM1_FLT7 = 67, - DFSDM2 = 42, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - DTS = 147, - ECC = 145, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - GFXMMU = 153, - HASH_RNG = 80, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - JPEG = 121, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OCTOSPI1 = 92, - OCTOSPI2 = 150, - OTFDEC1 = 151, - OTFDEC2 = 152, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_PVM = 1, - RCC = 5, - RTC_Alarm = 41, - RTC_TAMP_STAMP_CSS_LSE = 2, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - UART9 = 140, - USART1 = 37, - USART10 = 141, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(BDMA1); - declare!(BDMA2_Channel0); - declare!(BDMA2_Channel1); - declare!(BDMA2_Channel2); - declare!(BDMA2_Channel3); - declare!(BDMA2_Channel4); - declare!(BDMA2_Channel5); - declare!(BDMA2_Channel6); - declare!(BDMA2_Channel7); - declare!(CEC); - declare!(CRS); - declare!(CRYP); - declare!(DAC2); - declare!(DCMI_PSSI); - declare!(DFSDM1_FLT4); - declare!(DFSDM1_FLT5); - declare!(DFSDM1_FLT6); - declare!(DFSDM1_FLT7); - declare!(DFSDM2); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(DTS); - declare!(ECC); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(GFXMMU); - declare!(HASH_RNG); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(JPEG); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTFDEC1); - declare!(OTFDEC2); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_PVM); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_TAMP_STAMP_CSS_LSE); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(UART9); - declare!(USART1); - declare!(USART10); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn BDMA1(); - fn BDMA2_Channel0(); - fn BDMA2_Channel1(); - fn BDMA2_Channel2(); - fn BDMA2_Channel3(); - fn BDMA2_Channel4(); - fn BDMA2_Channel5(); - fn BDMA2_Channel6(); - fn BDMA2_Channel7(); - fn CEC(); - fn CRS(); - fn CRYP(); - fn DAC2(); - fn DCMI_PSSI(); - fn DFSDM1_FLT4(); - fn DFSDM1_FLT5(); - fn DFSDM1_FLT6(); - fn DFSDM1_FLT7(); - fn DFSDM2(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn DTS(); - fn ECC(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn GFXMMU(); - fn HASH_RNG(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn JPEG(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTFDEC1(); - fn OTFDEC2(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_PVM(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_TAMP_STAMP_CSS_LSE(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn UART9(); - fn USART1(); - fn USART10(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 155] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: RTC_TAMP_STAMP_CSS_LSE, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _handler: DFSDM2 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { - _handler: DFSDM1_FLT4, - }, - Vector { - _handler: DFSDM1_FLT5, - }, - Vector { - _handler: DFSDM1_FLT6, - }, - Vector { - _handler: DFSDM1_FLT7, - }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { - _handler: DCMI_PSSI, - }, - Vector { _handler: CRYP }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _handler: JPEG }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: DAC2 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA2_Channel0, - }, - Vector { - _handler: BDMA2_Channel1, - }, - Vector { - _handler: BDMA2_Channel2, - }, - Vector { - _handler: BDMA2_Channel3, - }, - Vector { - _handler: BDMA2_Channel4, - }, - Vector { - _handler: BDMA2_Channel5, - }, - Vector { - _handler: BDMA2_Channel6, - }, - Vector { - _handler: BDMA2_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: UART9 }, - Vector { _handler: USART10 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _reserved: 0 }, - Vector { _handler: DTS }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - Vector { _handler: OCTOSPI2 }, - Vector { _handler: OTFDEC1 }, - Vector { _handler: OTFDEC2 }, - Vector { _handler: GFXMMU }, - Vector { _handler: BDMA1 }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -impl_rng!(0x48021800); -impl_sdmmc!(SDMMC1, 0x52007000); -impl_sdmmc_pin!(SDMMC1, D0Pin, PB13, 12); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -impl_sdmmc!(SDMMC2, 0x48022400); -impl_sdmmc_pin!(SDMMC2, CmdPin, PA0, 9); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D1Pin, PG10, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); -impl_sdmmc_pin!(SDMMC2, D3Pin, PG12, 10); -impl_sdmmc_pin!(SDMMC2, D6Pin, PG13, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PG14, 10); -impl_sdmmc_pin!(SDMMC2, D0Pin, PG9, 11); diff --git a/embassy-stm32/src/chip/stm32h7b3ai.rs b/embassy-stm32/src/chip/stm32h7b3ai.rs deleted file mode 100644 index 279f688d..00000000 --- a/embassy-stm32/src/chip/stm32h7b3ai.rs +++ /dev/null @@ -1,895 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, BDMA1, BDMA2, COMP1, COMP2, CRYP, DAC1, DAC2, DCMI, DMA2D, - DTS, FDCAN1, FDCAN2, GFXMMU, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, - PA12, PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, - PB13, PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, - PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, - PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, - PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, - PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, - PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, - PI6, PI7, PI8, PI9, PI10, PI11, PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, - PJ8, PJ9, PJ10, PJ11, PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, - PK10, PK11, PK12, PK13, PK14, PK15, HASH, I2C1, I2C2, I2C3, I2C4, IWDG1, JPEG, LPTIM1, LPTIM2, - LPTIM3, LPUART1, LTDC, MDIOS, MDMA, OCTOSPI1, OCTOSPI2, OCTOSPIM, OPAMP1, OPAMP2, OTFDEC1, - OTFDEC2, PSSI, PWR, RCC, RNG, RTC, SAI1, SAI2, SDMMC1, SDMMC2, SPDIFRX, SPI1, SPI2, SPI3, SPI4, - SPI5, SPI6, SWPMI1, SYSCFG, TIM1, TIM12, TIM13, TIM14, TIM15, TIM16, TIM17, TIM2, TIM3, TIM4, - TIM5, TIM6, TIM7, TIM8, UART4, UART5, UART7, UART8, UART9, USART1, USART10, USART2, USART3, - USART6, USB_OTG_HS, VREFBUF, WWDG1 -); -pub const GPIO_BASE: usize = 0x58020000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC = 18, - BDMA1 = 154, - BDMA2_Channel0 = 129, - BDMA2_Channel1 = 130, - BDMA2_Channel2 = 131, - BDMA2_Channel3 = 132, - BDMA2_Channel4 = 133, - BDMA2_Channel5 = 134, - BDMA2_Channel6 = 135, - BDMA2_Channel7 = 136, - CEC = 94, - CRS = 144, - CRYP = 79, - DAC2 = 127, - DCMI_PSSI = 78, - DFSDM1_FLT4 = 64, - DFSDM1_FLT5 = 65, - DFSDM1_FLT6 = 66, - DFSDM1_FLT7 = 67, - DFSDM2 = 42, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - DTS = 147, - ECC = 145, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - GFXMMU = 153, - HASH_RNG = 80, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - JPEG = 121, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OCTOSPI1 = 92, - OCTOSPI2 = 150, - OTFDEC1 = 151, - OTFDEC2 = 152, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_PVM = 1, - RCC = 5, - RTC_Alarm = 41, - RTC_TAMP_STAMP_CSS_LSE = 2, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - UART9 = 140, - USART1 = 37, - USART10 = 141, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(BDMA1); - declare!(BDMA2_Channel0); - declare!(BDMA2_Channel1); - declare!(BDMA2_Channel2); - declare!(BDMA2_Channel3); - declare!(BDMA2_Channel4); - declare!(BDMA2_Channel5); - declare!(BDMA2_Channel6); - declare!(BDMA2_Channel7); - declare!(CEC); - declare!(CRS); - declare!(CRYP); - declare!(DAC2); - declare!(DCMI_PSSI); - declare!(DFSDM1_FLT4); - declare!(DFSDM1_FLT5); - declare!(DFSDM1_FLT6); - declare!(DFSDM1_FLT7); - declare!(DFSDM2); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(DTS); - declare!(ECC); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(GFXMMU); - declare!(HASH_RNG); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(JPEG); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTFDEC1); - declare!(OTFDEC2); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_PVM); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_TAMP_STAMP_CSS_LSE); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(UART9); - declare!(USART1); - declare!(USART10); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn BDMA1(); - fn BDMA2_Channel0(); - fn BDMA2_Channel1(); - fn BDMA2_Channel2(); - fn BDMA2_Channel3(); - fn BDMA2_Channel4(); - fn BDMA2_Channel5(); - fn BDMA2_Channel6(); - fn BDMA2_Channel7(); - fn CEC(); - fn CRS(); - fn CRYP(); - fn DAC2(); - fn DCMI_PSSI(); - fn DFSDM1_FLT4(); - fn DFSDM1_FLT5(); - fn DFSDM1_FLT6(); - fn DFSDM1_FLT7(); - fn DFSDM2(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn DTS(); - fn ECC(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn GFXMMU(); - fn HASH_RNG(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn JPEG(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTFDEC1(); - fn OTFDEC2(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_PVM(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_TAMP_STAMP_CSS_LSE(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn UART9(); - fn USART1(); - fn USART10(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 155] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: RTC_TAMP_STAMP_CSS_LSE, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _handler: DFSDM2 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { - _handler: DFSDM1_FLT4, - }, - Vector { - _handler: DFSDM1_FLT5, - }, - Vector { - _handler: DFSDM1_FLT6, - }, - Vector { - _handler: DFSDM1_FLT7, - }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { - _handler: DCMI_PSSI, - }, - Vector { _handler: CRYP }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _handler: JPEG }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: DAC2 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA2_Channel0, - }, - Vector { - _handler: BDMA2_Channel1, - }, - Vector { - _handler: BDMA2_Channel2, - }, - Vector { - _handler: BDMA2_Channel3, - }, - Vector { - _handler: BDMA2_Channel4, - }, - Vector { - _handler: BDMA2_Channel5, - }, - Vector { - _handler: BDMA2_Channel6, - }, - Vector { - _handler: BDMA2_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: UART9 }, - Vector { _handler: USART10 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _reserved: 0 }, - Vector { _handler: DTS }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - Vector { _handler: OCTOSPI2 }, - Vector { _handler: OTFDEC1 }, - Vector { _handler: OTFDEC2 }, - Vector { _handler: GFXMMU }, - Vector { _handler: BDMA1 }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -impl_rng!(0x48021800); -impl_sdmmc!(SDMMC1, 0x52007000); -impl_sdmmc_pin!(SDMMC1, D0Pin, PB13, 12); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -impl_sdmmc!(SDMMC2, 0x48022400); -impl_sdmmc_pin!(SDMMC2, CmdPin, PA0, 9); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D1Pin, PG10, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); -impl_sdmmc_pin!(SDMMC2, D3Pin, PG12, 10); -impl_sdmmc_pin!(SDMMC2, D6Pin, PG13, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PG14, 10); -impl_sdmmc_pin!(SDMMC2, D0Pin, PG9, 11); diff --git a/embassy-stm32/src/chip/stm32h7b3ii.rs b/embassy-stm32/src/chip/stm32h7b3ii.rs deleted file mode 100644 index 279f688d..00000000 --- a/embassy-stm32/src/chip/stm32h7b3ii.rs +++ /dev/null @@ -1,895 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, BDMA1, BDMA2, COMP1, COMP2, CRYP, DAC1, DAC2, DCMI, DMA2D, - DTS, FDCAN1, FDCAN2, GFXMMU, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, - PA12, PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, - PB13, PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, - PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, - PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, - PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, - PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, - PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, - PI6, PI7, PI8, PI9, PI10, PI11, PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, - PJ8, PJ9, PJ10, PJ11, PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, - PK10, PK11, PK12, PK13, PK14, PK15, HASH, I2C1, I2C2, I2C3, I2C4, IWDG1, JPEG, LPTIM1, LPTIM2, - LPTIM3, LPUART1, LTDC, MDIOS, MDMA, OCTOSPI1, OCTOSPI2, OCTOSPIM, OPAMP1, OPAMP2, OTFDEC1, - OTFDEC2, PSSI, PWR, RCC, RNG, RTC, SAI1, SAI2, SDMMC1, SDMMC2, SPDIFRX, SPI1, SPI2, SPI3, SPI4, - SPI5, SPI6, SWPMI1, SYSCFG, TIM1, TIM12, TIM13, TIM14, TIM15, TIM16, TIM17, TIM2, TIM3, TIM4, - TIM5, TIM6, TIM7, TIM8, UART4, UART5, UART7, UART8, UART9, USART1, USART10, USART2, USART3, - USART6, USB_OTG_HS, VREFBUF, WWDG1 -); -pub const GPIO_BASE: usize = 0x58020000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC = 18, - BDMA1 = 154, - BDMA2_Channel0 = 129, - BDMA2_Channel1 = 130, - BDMA2_Channel2 = 131, - BDMA2_Channel3 = 132, - BDMA2_Channel4 = 133, - BDMA2_Channel5 = 134, - BDMA2_Channel6 = 135, - BDMA2_Channel7 = 136, - CEC = 94, - CRS = 144, - CRYP = 79, - DAC2 = 127, - DCMI_PSSI = 78, - DFSDM1_FLT4 = 64, - DFSDM1_FLT5 = 65, - DFSDM1_FLT6 = 66, - DFSDM1_FLT7 = 67, - DFSDM2 = 42, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - DTS = 147, - ECC = 145, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - GFXMMU = 153, - HASH_RNG = 80, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - JPEG = 121, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OCTOSPI1 = 92, - OCTOSPI2 = 150, - OTFDEC1 = 151, - OTFDEC2 = 152, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_PVM = 1, - RCC = 5, - RTC_Alarm = 41, - RTC_TAMP_STAMP_CSS_LSE = 2, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - UART9 = 140, - USART1 = 37, - USART10 = 141, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(BDMA1); - declare!(BDMA2_Channel0); - declare!(BDMA2_Channel1); - declare!(BDMA2_Channel2); - declare!(BDMA2_Channel3); - declare!(BDMA2_Channel4); - declare!(BDMA2_Channel5); - declare!(BDMA2_Channel6); - declare!(BDMA2_Channel7); - declare!(CEC); - declare!(CRS); - declare!(CRYP); - declare!(DAC2); - declare!(DCMI_PSSI); - declare!(DFSDM1_FLT4); - declare!(DFSDM1_FLT5); - declare!(DFSDM1_FLT6); - declare!(DFSDM1_FLT7); - declare!(DFSDM2); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(DTS); - declare!(ECC); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(GFXMMU); - declare!(HASH_RNG); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(JPEG); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTFDEC1); - declare!(OTFDEC2); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_PVM); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_TAMP_STAMP_CSS_LSE); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(UART9); - declare!(USART1); - declare!(USART10); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn BDMA1(); - fn BDMA2_Channel0(); - fn BDMA2_Channel1(); - fn BDMA2_Channel2(); - fn BDMA2_Channel3(); - fn BDMA2_Channel4(); - fn BDMA2_Channel5(); - fn BDMA2_Channel6(); - fn BDMA2_Channel7(); - fn CEC(); - fn CRS(); - fn CRYP(); - fn DAC2(); - fn DCMI_PSSI(); - fn DFSDM1_FLT4(); - fn DFSDM1_FLT5(); - fn DFSDM1_FLT6(); - fn DFSDM1_FLT7(); - fn DFSDM2(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn DTS(); - fn ECC(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn GFXMMU(); - fn HASH_RNG(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn JPEG(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTFDEC1(); - fn OTFDEC2(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_PVM(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_TAMP_STAMP_CSS_LSE(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn UART9(); - fn USART1(); - fn USART10(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 155] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: RTC_TAMP_STAMP_CSS_LSE, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _handler: DFSDM2 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { - _handler: DFSDM1_FLT4, - }, - Vector { - _handler: DFSDM1_FLT5, - }, - Vector { - _handler: DFSDM1_FLT6, - }, - Vector { - _handler: DFSDM1_FLT7, - }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { - _handler: DCMI_PSSI, - }, - Vector { _handler: CRYP }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _handler: JPEG }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: DAC2 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA2_Channel0, - }, - Vector { - _handler: BDMA2_Channel1, - }, - Vector { - _handler: BDMA2_Channel2, - }, - Vector { - _handler: BDMA2_Channel3, - }, - Vector { - _handler: BDMA2_Channel4, - }, - Vector { - _handler: BDMA2_Channel5, - }, - Vector { - _handler: BDMA2_Channel6, - }, - Vector { - _handler: BDMA2_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: UART9 }, - Vector { _handler: USART10 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _reserved: 0 }, - Vector { _handler: DTS }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - Vector { _handler: OCTOSPI2 }, - Vector { _handler: OTFDEC1 }, - Vector { _handler: OTFDEC2 }, - Vector { _handler: GFXMMU }, - Vector { _handler: BDMA1 }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -impl_rng!(0x48021800); -impl_sdmmc!(SDMMC1, 0x52007000); -impl_sdmmc_pin!(SDMMC1, D0Pin, PB13, 12); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -impl_sdmmc!(SDMMC2, 0x48022400); -impl_sdmmc_pin!(SDMMC2, CmdPin, PA0, 9); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D1Pin, PG10, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); -impl_sdmmc_pin!(SDMMC2, D3Pin, PG12, 10); -impl_sdmmc_pin!(SDMMC2, D6Pin, PG13, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PG14, 10); -impl_sdmmc_pin!(SDMMC2, D0Pin, PG9, 11); diff --git a/embassy-stm32/src/chip/stm32h7b3li.rs b/embassy-stm32/src/chip/stm32h7b3li.rs deleted file mode 100644 index 279f688d..00000000 --- a/embassy-stm32/src/chip/stm32h7b3li.rs +++ /dev/null @@ -1,895 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, BDMA1, BDMA2, COMP1, COMP2, CRYP, DAC1, DAC2, DCMI, DMA2D, - DTS, FDCAN1, FDCAN2, GFXMMU, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, - PA12, PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, - PB13, PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, - PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, - PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, - PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, - PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, - PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, - PI6, PI7, PI8, PI9, PI10, PI11, PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, - PJ8, PJ9, PJ10, PJ11, PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, - PK10, PK11, PK12, PK13, PK14, PK15, HASH, I2C1, I2C2, I2C3, I2C4, IWDG1, JPEG, LPTIM1, LPTIM2, - LPTIM3, LPUART1, LTDC, MDIOS, MDMA, OCTOSPI1, OCTOSPI2, OCTOSPIM, OPAMP1, OPAMP2, OTFDEC1, - OTFDEC2, PSSI, PWR, RCC, RNG, RTC, SAI1, SAI2, SDMMC1, SDMMC2, SPDIFRX, SPI1, SPI2, SPI3, SPI4, - SPI5, SPI6, SWPMI1, SYSCFG, TIM1, TIM12, TIM13, TIM14, TIM15, TIM16, TIM17, TIM2, TIM3, TIM4, - TIM5, TIM6, TIM7, TIM8, UART4, UART5, UART7, UART8, UART9, USART1, USART10, USART2, USART3, - USART6, USB_OTG_HS, VREFBUF, WWDG1 -); -pub const GPIO_BASE: usize = 0x58020000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC = 18, - BDMA1 = 154, - BDMA2_Channel0 = 129, - BDMA2_Channel1 = 130, - BDMA2_Channel2 = 131, - BDMA2_Channel3 = 132, - BDMA2_Channel4 = 133, - BDMA2_Channel5 = 134, - BDMA2_Channel6 = 135, - BDMA2_Channel7 = 136, - CEC = 94, - CRS = 144, - CRYP = 79, - DAC2 = 127, - DCMI_PSSI = 78, - DFSDM1_FLT4 = 64, - DFSDM1_FLT5 = 65, - DFSDM1_FLT6 = 66, - DFSDM1_FLT7 = 67, - DFSDM2 = 42, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - DTS = 147, - ECC = 145, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - GFXMMU = 153, - HASH_RNG = 80, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - JPEG = 121, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OCTOSPI1 = 92, - OCTOSPI2 = 150, - OTFDEC1 = 151, - OTFDEC2 = 152, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_PVM = 1, - RCC = 5, - RTC_Alarm = 41, - RTC_TAMP_STAMP_CSS_LSE = 2, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - UART9 = 140, - USART1 = 37, - USART10 = 141, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(BDMA1); - declare!(BDMA2_Channel0); - declare!(BDMA2_Channel1); - declare!(BDMA2_Channel2); - declare!(BDMA2_Channel3); - declare!(BDMA2_Channel4); - declare!(BDMA2_Channel5); - declare!(BDMA2_Channel6); - declare!(BDMA2_Channel7); - declare!(CEC); - declare!(CRS); - declare!(CRYP); - declare!(DAC2); - declare!(DCMI_PSSI); - declare!(DFSDM1_FLT4); - declare!(DFSDM1_FLT5); - declare!(DFSDM1_FLT6); - declare!(DFSDM1_FLT7); - declare!(DFSDM2); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(DTS); - declare!(ECC); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(GFXMMU); - declare!(HASH_RNG); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(JPEG); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTFDEC1); - declare!(OTFDEC2); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_PVM); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_TAMP_STAMP_CSS_LSE); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(UART9); - declare!(USART1); - declare!(USART10); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn BDMA1(); - fn BDMA2_Channel0(); - fn BDMA2_Channel1(); - fn BDMA2_Channel2(); - fn BDMA2_Channel3(); - fn BDMA2_Channel4(); - fn BDMA2_Channel5(); - fn BDMA2_Channel6(); - fn BDMA2_Channel7(); - fn CEC(); - fn CRS(); - fn CRYP(); - fn DAC2(); - fn DCMI_PSSI(); - fn DFSDM1_FLT4(); - fn DFSDM1_FLT5(); - fn DFSDM1_FLT6(); - fn DFSDM1_FLT7(); - fn DFSDM2(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn DTS(); - fn ECC(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn GFXMMU(); - fn HASH_RNG(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn JPEG(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTFDEC1(); - fn OTFDEC2(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_PVM(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_TAMP_STAMP_CSS_LSE(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn UART9(); - fn USART1(); - fn USART10(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 155] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: RTC_TAMP_STAMP_CSS_LSE, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _handler: DFSDM2 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { - _handler: DFSDM1_FLT4, - }, - Vector { - _handler: DFSDM1_FLT5, - }, - Vector { - _handler: DFSDM1_FLT6, - }, - Vector { - _handler: DFSDM1_FLT7, - }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { - _handler: DCMI_PSSI, - }, - Vector { _handler: CRYP }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _handler: JPEG }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: DAC2 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA2_Channel0, - }, - Vector { - _handler: BDMA2_Channel1, - }, - Vector { - _handler: BDMA2_Channel2, - }, - Vector { - _handler: BDMA2_Channel3, - }, - Vector { - _handler: BDMA2_Channel4, - }, - Vector { - _handler: BDMA2_Channel5, - }, - Vector { - _handler: BDMA2_Channel6, - }, - Vector { - _handler: BDMA2_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: UART9 }, - Vector { _handler: USART10 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _reserved: 0 }, - Vector { _handler: DTS }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - Vector { _handler: OCTOSPI2 }, - Vector { _handler: OTFDEC1 }, - Vector { _handler: OTFDEC2 }, - Vector { _handler: GFXMMU }, - Vector { _handler: BDMA1 }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -impl_rng!(0x48021800); -impl_sdmmc!(SDMMC1, 0x52007000); -impl_sdmmc_pin!(SDMMC1, D0Pin, PB13, 12); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -impl_sdmmc!(SDMMC2, 0x48022400); -impl_sdmmc_pin!(SDMMC2, CmdPin, PA0, 9); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D1Pin, PG10, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); -impl_sdmmc_pin!(SDMMC2, D3Pin, PG12, 10); -impl_sdmmc_pin!(SDMMC2, D6Pin, PG13, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PG14, 10); -impl_sdmmc_pin!(SDMMC2, D0Pin, PG9, 11); diff --git a/embassy-stm32/src/chip/stm32h7b3ni.rs b/embassy-stm32/src/chip/stm32h7b3ni.rs deleted file mode 100644 index 279f688d..00000000 --- a/embassy-stm32/src/chip/stm32h7b3ni.rs +++ /dev/null @@ -1,895 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, BDMA1, BDMA2, COMP1, COMP2, CRYP, DAC1, DAC2, DCMI, DMA2D, - DTS, FDCAN1, FDCAN2, GFXMMU, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, - PA12, PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, - PB13, PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, - PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, - PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, - PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, - PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, - PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, - PI6, PI7, PI8, PI9, PI10, PI11, PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, - PJ8, PJ9, PJ10, PJ11, PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, - PK10, PK11, PK12, PK13, PK14, PK15, HASH, I2C1, I2C2, I2C3, I2C4, IWDG1, JPEG, LPTIM1, LPTIM2, - LPTIM3, LPUART1, LTDC, MDIOS, MDMA, OCTOSPI1, OCTOSPI2, OCTOSPIM, OPAMP1, OPAMP2, OTFDEC1, - OTFDEC2, PSSI, PWR, RCC, RNG, RTC, SAI1, SAI2, SDMMC1, SDMMC2, SPDIFRX, SPI1, SPI2, SPI3, SPI4, - SPI5, SPI6, SWPMI1, SYSCFG, TIM1, TIM12, TIM13, TIM14, TIM15, TIM16, TIM17, TIM2, TIM3, TIM4, - TIM5, TIM6, TIM7, TIM8, UART4, UART5, UART7, UART8, UART9, USART1, USART10, USART2, USART3, - USART6, USB_OTG_HS, VREFBUF, WWDG1 -); -pub const GPIO_BASE: usize = 0x58020000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC = 18, - BDMA1 = 154, - BDMA2_Channel0 = 129, - BDMA2_Channel1 = 130, - BDMA2_Channel2 = 131, - BDMA2_Channel3 = 132, - BDMA2_Channel4 = 133, - BDMA2_Channel5 = 134, - BDMA2_Channel6 = 135, - BDMA2_Channel7 = 136, - CEC = 94, - CRS = 144, - CRYP = 79, - DAC2 = 127, - DCMI_PSSI = 78, - DFSDM1_FLT4 = 64, - DFSDM1_FLT5 = 65, - DFSDM1_FLT6 = 66, - DFSDM1_FLT7 = 67, - DFSDM2 = 42, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - DTS = 147, - ECC = 145, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - GFXMMU = 153, - HASH_RNG = 80, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - JPEG = 121, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OCTOSPI1 = 92, - OCTOSPI2 = 150, - OTFDEC1 = 151, - OTFDEC2 = 152, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_PVM = 1, - RCC = 5, - RTC_Alarm = 41, - RTC_TAMP_STAMP_CSS_LSE = 2, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - UART9 = 140, - USART1 = 37, - USART10 = 141, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(BDMA1); - declare!(BDMA2_Channel0); - declare!(BDMA2_Channel1); - declare!(BDMA2_Channel2); - declare!(BDMA2_Channel3); - declare!(BDMA2_Channel4); - declare!(BDMA2_Channel5); - declare!(BDMA2_Channel6); - declare!(BDMA2_Channel7); - declare!(CEC); - declare!(CRS); - declare!(CRYP); - declare!(DAC2); - declare!(DCMI_PSSI); - declare!(DFSDM1_FLT4); - declare!(DFSDM1_FLT5); - declare!(DFSDM1_FLT6); - declare!(DFSDM1_FLT7); - declare!(DFSDM2); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(DTS); - declare!(ECC); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(GFXMMU); - declare!(HASH_RNG); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(JPEG); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTFDEC1); - declare!(OTFDEC2); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_PVM); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_TAMP_STAMP_CSS_LSE); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(UART9); - declare!(USART1); - declare!(USART10); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn BDMA1(); - fn BDMA2_Channel0(); - fn BDMA2_Channel1(); - fn BDMA2_Channel2(); - fn BDMA2_Channel3(); - fn BDMA2_Channel4(); - fn BDMA2_Channel5(); - fn BDMA2_Channel6(); - fn BDMA2_Channel7(); - fn CEC(); - fn CRS(); - fn CRYP(); - fn DAC2(); - fn DCMI_PSSI(); - fn DFSDM1_FLT4(); - fn DFSDM1_FLT5(); - fn DFSDM1_FLT6(); - fn DFSDM1_FLT7(); - fn DFSDM2(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn DTS(); - fn ECC(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn GFXMMU(); - fn HASH_RNG(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn JPEG(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTFDEC1(); - fn OTFDEC2(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_PVM(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_TAMP_STAMP_CSS_LSE(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn UART9(); - fn USART1(); - fn USART10(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 155] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: RTC_TAMP_STAMP_CSS_LSE, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _handler: DFSDM2 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { - _handler: DFSDM1_FLT4, - }, - Vector { - _handler: DFSDM1_FLT5, - }, - Vector { - _handler: DFSDM1_FLT6, - }, - Vector { - _handler: DFSDM1_FLT7, - }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { - _handler: DCMI_PSSI, - }, - Vector { _handler: CRYP }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _handler: JPEG }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: DAC2 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA2_Channel0, - }, - Vector { - _handler: BDMA2_Channel1, - }, - Vector { - _handler: BDMA2_Channel2, - }, - Vector { - _handler: BDMA2_Channel3, - }, - Vector { - _handler: BDMA2_Channel4, - }, - Vector { - _handler: BDMA2_Channel5, - }, - Vector { - _handler: BDMA2_Channel6, - }, - Vector { - _handler: BDMA2_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: UART9 }, - Vector { _handler: USART10 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _reserved: 0 }, - Vector { _handler: DTS }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - Vector { _handler: OCTOSPI2 }, - Vector { _handler: OTFDEC1 }, - Vector { _handler: OTFDEC2 }, - Vector { _handler: GFXMMU }, - Vector { _handler: BDMA1 }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -impl_rng!(0x48021800); -impl_sdmmc!(SDMMC1, 0x52007000); -impl_sdmmc_pin!(SDMMC1, D0Pin, PB13, 12); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -impl_sdmmc!(SDMMC2, 0x48022400); -impl_sdmmc_pin!(SDMMC2, CmdPin, PA0, 9); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D1Pin, PG10, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); -impl_sdmmc_pin!(SDMMC2, D3Pin, PG12, 10); -impl_sdmmc_pin!(SDMMC2, D6Pin, PG13, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PG14, 10); -impl_sdmmc_pin!(SDMMC2, D0Pin, PG9, 11); diff --git a/embassy-stm32/src/chip/stm32h7b3qi.rs b/embassy-stm32/src/chip/stm32h7b3qi.rs deleted file mode 100644 index f283be64..00000000 --- a/embassy-stm32/src/chip/stm32h7b3qi.rs +++ /dev/null @@ -1,895 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, BDMA1, BDMA2, COMP1, COMP2, CRYP, DAC1, DAC2, DCMI, DMA2D, - DTS, FDCAN1, FDCAN2, GFXMMU, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, - PA12, PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, - PB13, PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, - PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, - PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, - PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, - PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, - PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, - PI6, PI7, PI8, PI9, PI10, PI11, PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, - PJ8, PJ9, PJ10, PJ11, PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, - PK10, PK11, PK12, PK13, PK14, PK15, HASH, I2C1, I2C2, I2C3, I2C4, IWDG1, JPEG, LPTIM1, LPTIM2, - LPTIM3, LPUART1, LTDC, MDIOS, MDMA, OCTOSPI1, OCTOSPI2, OCTOSPIM, OPAMP1, OPAMP2, OTFDEC1, - PSSI, PWR, RCC, RNG, RTC, SAI1, SAI2, SDMMC1, SDMMC2, SPDIFRX, SPI1, SPI2, SPI3, SPI4, SPI6, - SWPMI1, SYSCFG, TIM1, TIM12, TIM13, TIM14, TIM15, TIM16, TIM17, TIM2, TIM3, TIM4, TIM5, TIM6, - TIM7, TIM8, UART4, UART5, UART7, UART8, UART9, USART1, USART10, USART2, USART3, USART6, - USB_OTG_HS, VREFBUF, WWDG1 -); -pub const GPIO_BASE: usize = 0x58020000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC = 18, - BDMA1 = 154, - BDMA2_Channel0 = 129, - BDMA2_Channel1 = 130, - BDMA2_Channel2 = 131, - BDMA2_Channel3 = 132, - BDMA2_Channel4 = 133, - BDMA2_Channel5 = 134, - BDMA2_Channel6 = 135, - BDMA2_Channel7 = 136, - CEC = 94, - CRS = 144, - CRYP = 79, - DAC2 = 127, - DCMI_PSSI = 78, - DFSDM1_FLT4 = 64, - DFSDM1_FLT5 = 65, - DFSDM1_FLT6 = 66, - DFSDM1_FLT7 = 67, - DFSDM2 = 42, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - DTS = 147, - ECC = 145, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - GFXMMU = 153, - HASH_RNG = 80, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - JPEG = 121, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OCTOSPI1 = 92, - OCTOSPI2 = 150, - OTFDEC1 = 151, - OTFDEC2 = 152, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_PVM = 1, - RCC = 5, - RTC_Alarm = 41, - RTC_TAMP_STAMP_CSS_LSE = 2, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - UART9 = 140, - USART1 = 37, - USART10 = 141, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(BDMA1); - declare!(BDMA2_Channel0); - declare!(BDMA2_Channel1); - declare!(BDMA2_Channel2); - declare!(BDMA2_Channel3); - declare!(BDMA2_Channel4); - declare!(BDMA2_Channel5); - declare!(BDMA2_Channel6); - declare!(BDMA2_Channel7); - declare!(CEC); - declare!(CRS); - declare!(CRYP); - declare!(DAC2); - declare!(DCMI_PSSI); - declare!(DFSDM1_FLT4); - declare!(DFSDM1_FLT5); - declare!(DFSDM1_FLT6); - declare!(DFSDM1_FLT7); - declare!(DFSDM2); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(DTS); - declare!(ECC); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(GFXMMU); - declare!(HASH_RNG); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(JPEG); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTFDEC1); - declare!(OTFDEC2); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_PVM); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_TAMP_STAMP_CSS_LSE); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(UART9); - declare!(USART1); - declare!(USART10); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn BDMA1(); - fn BDMA2_Channel0(); - fn BDMA2_Channel1(); - fn BDMA2_Channel2(); - fn BDMA2_Channel3(); - fn BDMA2_Channel4(); - fn BDMA2_Channel5(); - fn BDMA2_Channel6(); - fn BDMA2_Channel7(); - fn CEC(); - fn CRS(); - fn CRYP(); - fn DAC2(); - fn DCMI_PSSI(); - fn DFSDM1_FLT4(); - fn DFSDM1_FLT5(); - fn DFSDM1_FLT6(); - fn DFSDM1_FLT7(); - fn DFSDM2(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn DTS(); - fn ECC(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn GFXMMU(); - fn HASH_RNG(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn JPEG(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTFDEC1(); - fn OTFDEC2(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_PVM(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_TAMP_STAMP_CSS_LSE(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn UART9(); - fn USART1(); - fn USART10(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 155] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: RTC_TAMP_STAMP_CSS_LSE, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _handler: DFSDM2 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { - _handler: DFSDM1_FLT4, - }, - Vector { - _handler: DFSDM1_FLT5, - }, - Vector { - _handler: DFSDM1_FLT6, - }, - Vector { - _handler: DFSDM1_FLT7, - }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { - _handler: DCMI_PSSI, - }, - Vector { _handler: CRYP }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _handler: JPEG }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: DAC2 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA2_Channel0, - }, - Vector { - _handler: BDMA2_Channel1, - }, - Vector { - _handler: BDMA2_Channel2, - }, - Vector { - _handler: BDMA2_Channel3, - }, - Vector { - _handler: BDMA2_Channel4, - }, - Vector { - _handler: BDMA2_Channel5, - }, - Vector { - _handler: BDMA2_Channel6, - }, - Vector { - _handler: BDMA2_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: UART9 }, - Vector { _handler: USART10 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _reserved: 0 }, - Vector { _handler: DTS }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - Vector { _handler: OCTOSPI2 }, - Vector { _handler: OTFDEC1 }, - Vector { _handler: OTFDEC2 }, - Vector { _handler: GFXMMU }, - Vector { _handler: BDMA1 }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -impl_rng!(0x48021800); -impl_sdmmc!(SDMMC1, 0x52007000); -impl_sdmmc_pin!(SDMMC1, D0Pin, PB13, 12); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -impl_sdmmc!(SDMMC2, 0x48022400); -impl_sdmmc_pin!(SDMMC2, CmdPin, PA0, 9); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D1Pin, PG10, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); -impl_sdmmc_pin!(SDMMC2, D3Pin, PG12, 10); -impl_sdmmc_pin!(SDMMC2, D6Pin, PG13, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PG14, 10); -impl_sdmmc_pin!(SDMMC2, D0Pin, PG9, 11); diff --git a/embassy-stm32/src/chip/stm32h7b3ri.rs b/embassy-stm32/src/chip/stm32h7b3ri.rs deleted file mode 100644 index 2e945c3a..00000000 --- a/embassy-stm32/src/chip/stm32h7b3ri.rs +++ /dev/null @@ -1,894 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, BDMA1, BDMA2, COMP1, CRYP, DAC1, DAC2, DMA2D, DTS, FDCAN1, - FDCAN2, GFXMMU, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, - PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, - PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, - PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, - PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, - PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, - PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, - PH10, PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, - PI11, PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, PJ10, PJ11, - PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, PK11, PK12, - PK13, PK14, PK15, HASH, I2C1, I2C3, I2C4, IWDG1, JPEG, LPTIM1, LPTIM2, LPTIM3, LPUART1, LTDC, - MDIOS, MDMA, OCTOSPI1, OCTOSPI2, OCTOSPIM, OPAMP1, OTFDEC1, PWR, RCC, RNG, RTC, SAI2, SDMMC1, - SDMMC2, SPDIFRX, SPI1, SPI2, SPI3, SPI6, SWPMI1, SYSCFG, TIM1, TIM12, TIM13, TIM14, TIM15, - TIM16, TIM17, TIM2, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, UART4, UART5, UART7, USART1, USART2, - USART3, USART6, USB_OTG_HS, VREFBUF, WWDG1 -); -pub const GPIO_BASE: usize = 0x58020000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC = 18, - BDMA1 = 154, - BDMA2_Channel0 = 129, - BDMA2_Channel1 = 130, - BDMA2_Channel2 = 131, - BDMA2_Channel3 = 132, - BDMA2_Channel4 = 133, - BDMA2_Channel5 = 134, - BDMA2_Channel6 = 135, - BDMA2_Channel7 = 136, - CEC = 94, - CRS = 144, - CRYP = 79, - DAC2 = 127, - DCMI_PSSI = 78, - DFSDM1_FLT4 = 64, - DFSDM1_FLT5 = 65, - DFSDM1_FLT6 = 66, - DFSDM1_FLT7 = 67, - DFSDM2 = 42, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - DTS = 147, - ECC = 145, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - GFXMMU = 153, - HASH_RNG = 80, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - JPEG = 121, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OCTOSPI1 = 92, - OCTOSPI2 = 150, - OTFDEC1 = 151, - OTFDEC2 = 152, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_PVM = 1, - RCC = 5, - RTC_Alarm = 41, - RTC_TAMP_STAMP_CSS_LSE = 2, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - UART9 = 140, - USART1 = 37, - USART10 = 141, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(BDMA1); - declare!(BDMA2_Channel0); - declare!(BDMA2_Channel1); - declare!(BDMA2_Channel2); - declare!(BDMA2_Channel3); - declare!(BDMA2_Channel4); - declare!(BDMA2_Channel5); - declare!(BDMA2_Channel6); - declare!(BDMA2_Channel7); - declare!(CEC); - declare!(CRS); - declare!(CRYP); - declare!(DAC2); - declare!(DCMI_PSSI); - declare!(DFSDM1_FLT4); - declare!(DFSDM1_FLT5); - declare!(DFSDM1_FLT6); - declare!(DFSDM1_FLT7); - declare!(DFSDM2); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(DTS); - declare!(ECC); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(GFXMMU); - declare!(HASH_RNG); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(JPEG); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTFDEC1); - declare!(OTFDEC2); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_PVM); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_TAMP_STAMP_CSS_LSE); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(UART9); - declare!(USART1); - declare!(USART10); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn BDMA1(); - fn BDMA2_Channel0(); - fn BDMA2_Channel1(); - fn BDMA2_Channel2(); - fn BDMA2_Channel3(); - fn BDMA2_Channel4(); - fn BDMA2_Channel5(); - fn BDMA2_Channel6(); - fn BDMA2_Channel7(); - fn CEC(); - fn CRS(); - fn CRYP(); - fn DAC2(); - fn DCMI_PSSI(); - fn DFSDM1_FLT4(); - fn DFSDM1_FLT5(); - fn DFSDM1_FLT6(); - fn DFSDM1_FLT7(); - fn DFSDM2(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn DTS(); - fn ECC(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn GFXMMU(); - fn HASH_RNG(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn JPEG(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTFDEC1(); - fn OTFDEC2(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_PVM(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_TAMP_STAMP_CSS_LSE(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn UART9(); - fn USART1(); - fn USART10(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 155] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: RTC_TAMP_STAMP_CSS_LSE, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _handler: DFSDM2 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { - _handler: DFSDM1_FLT4, - }, - Vector { - _handler: DFSDM1_FLT5, - }, - Vector { - _handler: DFSDM1_FLT6, - }, - Vector { - _handler: DFSDM1_FLT7, - }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { - _handler: DCMI_PSSI, - }, - Vector { _handler: CRYP }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _handler: JPEG }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: DAC2 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA2_Channel0, - }, - Vector { - _handler: BDMA2_Channel1, - }, - Vector { - _handler: BDMA2_Channel2, - }, - Vector { - _handler: BDMA2_Channel3, - }, - Vector { - _handler: BDMA2_Channel4, - }, - Vector { - _handler: BDMA2_Channel5, - }, - Vector { - _handler: BDMA2_Channel6, - }, - Vector { - _handler: BDMA2_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: UART9 }, - Vector { _handler: USART10 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _reserved: 0 }, - Vector { _handler: DTS }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - Vector { _handler: OCTOSPI2 }, - Vector { _handler: OTFDEC1 }, - Vector { _handler: OTFDEC2 }, - Vector { _handler: GFXMMU }, - Vector { _handler: BDMA1 }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -impl_rng!(0x48021800); -impl_sdmmc!(SDMMC1, 0x52007000); -impl_sdmmc_pin!(SDMMC1, D0Pin, PB13, 12); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -impl_sdmmc!(SDMMC2, 0x48022400); -impl_sdmmc_pin!(SDMMC2, CmdPin, PA0, 9); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D1Pin, PG10, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); -impl_sdmmc_pin!(SDMMC2, D3Pin, PG12, 10); -impl_sdmmc_pin!(SDMMC2, D6Pin, PG13, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PG14, 10); -impl_sdmmc_pin!(SDMMC2, D0Pin, PG9, 11); diff --git a/embassy-stm32/src/chip/stm32h7b3vi.rs b/embassy-stm32/src/chip/stm32h7b3vi.rs deleted file mode 100644 index f283be64..00000000 --- a/embassy-stm32/src/chip/stm32h7b3vi.rs +++ /dev/null @@ -1,895 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, BDMA1, BDMA2, COMP1, COMP2, CRYP, DAC1, DAC2, DCMI, DMA2D, - DTS, FDCAN1, FDCAN2, GFXMMU, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, - PA12, PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, - PB13, PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, - PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, - PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, - PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, - PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, - PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, - PI6, PI7, PI8, PI9, PI10, PI11, PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, - PJ8, PJ9, PJ10, PJ11, PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, - PK10, PK11, PK12, PK13, PK14, PK15, HASH, I2C1, I2C2, I2C3, I2C4, IWDG1, JPEG, LPTIM1, LPTIM2, - LPTIM3, LPUART1, LTDC, MDIOS, MDMA, OCTOSPI1, OCTOSPI2, OCTOSPIM, OPAMP1, OPAMP2, OTFDEC1, - PSSI, PWR, RCC, RNG, RTC, SAI1, SAI2, SDMMC1, SDMMC2, SPDIFRX, SPI1, SPI2, SPI3, SPI4, SPI6, - SWPMI1, SYSCFG, TIM1, TIM12, TIM13, TIM14, TIM15, TIM16, TIM17, TIM2, TIM3, TIM4, TIM5, TIM6, - TIM7, TIM8, UART4, UART5, UART7, UART8, UART9, USART1, USART10, USART2, USART3, USART6, - USB_OTG_HS, VREFBUF, WWDG1 -); -pub const GPIO_BASE: usize = 0x58020000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC = 18, - BDMA1 = 154, - BDMA2_Channel0 = 129, - BDMA2_Channel1 = 130, - BDMA2_Channel2 = 131, - BDMA2_Channel3 = 132, - BDMA2_Channel4 = 133, - BDMA2_Channel5 = 134, - BDMA2_Channel6 = 135, - BDMA2_Channel7 = 136, - CEC = 94, - CRS = 144, - CRYP = 79, - DAC2 = 127, - DCMI_PSSI = 78, - DFSDM1_FLT4 = 64, - DFSDM1_FLT5 = 65, - DFSDM1_FLT6 = 66, - DFSDM1_FLT7 = 67, - DFSDM2 = 42, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - DTS = 147, - ECC = 145, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - GFXMMU = 153, - HASH_RNG = 80, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - JPEG = 121, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OCTOSPI1 = 92, - OCTOSPI2 = 150, - OTFDEC1 = 151, - OTFDEC2 = 152, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_PVM = 1, - RCC = 5, - RTC_Alarm = 41, - RTC_TAMP_STAMP_CSS_LSE = 2, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - UART9 = 140, - USART1 = 37, - USART10 = 141, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(BDMA1); - declare!(BDMA2_Channel0); - declare!(BDMA2_Channel1); - declare!(BDMA2_Channel2); - declare!(BDMA2_Channel3); - declare!(BDMA2_Channel4); - declare!(BDMA2_Channel5); - declare!(BDMA2_Channel6); - declare!(BDMA2_Channel7); - declare!(CEC); - declare!(CRS); - declare!(CRYP); - declare!(DAC2); - declare!(DCMI_PSSI); - declare!(DFSDM1_FLT4); - declare!(DFSDM1_FLT5); - declare!(DFSDM1_FLT6); - declare!(DFSDM1_FLT7); - declare!(DFSDM2); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(DTS); - declare!(ECC); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(GFXMMU); - declare!(HASH_RNG); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(JPEG); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTFDEC1); - declare!(OTFDEC2); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_PVM); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_TAMP_STAMP_CSS_LSE); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(UART9); - declare!(USART1); - declare!(USART10); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn BDMA1(); - fn BDMA2_Channel0(); - fn BDMA2_Channel1(); - fn BDMA2_Channel2(); - fn BDMA2_Channel3(); - fn BDMA2_Channel4(); - fn BDMA2_Channel5(); - fn BDMA2_Channel6(); - fn BDMA2_Channel7(); - fn CEC(); - fn CRS(); - fn CRYP(); - fn DAC2(); - fn DCMI_PSSI(); - fn DFSDM1_FLT4(); - fn DFSDM1_FLT5(); - fn DFSDM1_FLT6(); - fn DFSDM1_FLT7(); - fn DFSDM2(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn DTS(); - fn ECC(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn GFXMMU(); - fn HASH_RNG(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn JPEG(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTFDEC1(); - fn OTFDEC2(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_PVM(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_TAMP_STAMP_CSS_LSE(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn UART9(); - fn USART1(); - fn USART10(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 155] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: RTC_TAMP_STAMP_CSS_LSE, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _handler: DFSDM2 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { - _handler: DFSDM1_FLT4, - }, - Vector { - _handler: DFSDM1_FLT5, - }, - Vector { - _handler: DFSDM1_FLT6, - }, - Vector { - _handler: DFSDM1_FLT7, - }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { - _handler: DCMI_PSSI, - }, - Vector { _handler: CRYP }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _handler: JPEG }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: DAC2 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA2_Channel0, - }, - Vector { - _handler: BDMA2_Channel1, - }, - Vector { - _handler: BDMA2_Channel2, - }, - Vector { - _handler: BDMA2_Channel3, - }, - Vector { - _handler: BDMA2_Channel4, - }, - Vector { - _handler: BDMA2_Channel5, - }, - Vector { - _handler: BDMA2_Channel6, - }, - Vector { - _handler: BDMA2_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: UART9 }, - Vector { _handler: USART10 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _reserved: 0 }, - Vector { _handler: DTS }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - Vector { _handler: OCTOSPI2 }, - Vector { _handler: OTFDEC1 }, - Vector { _handler: OTFDEC2 }, - Vector { _handler: GFXMMU }, - Vector { _handler: BDMA1 }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -impl_rng!(0x48021800); -impl_sdmmc!(SDMMC1, 0x52007000); -impl_sdmmc_pin!(SDMMC1, D0Pin, PB13, 12); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -impl_sdmmc!(SDMMC2, 0x48022400); -impl_sdmmc_pin!(SDMMC2, CmdPin, PA0, 9); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D1Pin, PG10, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); -impl_sdmmc_pin!(SDMMC2, D3Pin, PG12, 10); -impl_sdmmc_pin!(SDMMC2, D6Pin, PG13, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PG14, 10); -impl_sdmmc_pin!(SDMMC2, D0Pin, PG9, 11); diff --git a/embassy-stm32/src/chip/stm32h7b3zi.rs b/embassy-stm32/src/chip/stm32h7b3zi.rs deleted file mode 100644 index 279f688d..00000000 --- a/embassy-stm32/src/chip/stm32h7b3zi.rs +++ /dev/null @@ -1,895 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, BDMA1, BDMA2, COMP1, COMP2, CRYP, DAC1, DAC2, DCMI, DMA2D, - DTS, FDCAN1, FDCAN2, GFXMMU, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, - PA12, PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, - PB13, PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, - PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, - PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, - PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, - PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, - PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, - PI6, PI7, PI8, PI9, PI10, PI11, PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, - PJ8, PJ9, PJ10, PJ11, PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, - PK10, PK11, PK12, PK13, PK14, PK15, HASH, I2C1, I2C2, I2C3, I2C4, IWDG1, JPEG, LPTIM1, LPTIM2, - LPTIM3, LPUART1, LTDC, MDIOS, MDMA, OCTOSPI1, OCTOSPI2, OCTOSPIM, OPAMP1, OPAMP2, OTFDEC1, - OTFDEC2, PSSI, PWR, RCC, RNG, RTC, SAI1, SAI2, SDMMC1, SDMMC2, SPDIFRX, SPI1, SPI2, SPI3, SPI4, - SPI5, SPI6, SWPMI1, SYSCFG, TIM1, TIM12, TIM13, TIM14, TIM15, TIM16, TIM17, TIM2, TIM3, TIM4, - TIM5, TIM6, TIM7, TIM8, UART4, UART5, UART7, UART8, UART9, USART1, USART10, USART2, USART3, - USART6, USB_OTG_HS, VREFBUF, WWDG1 -); -pub const GPIO_BASE: usize = 0x58020000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC = 18, - BDMA1 = 154, - BDMA2_Channel0 = 129, - BDMA2_Channel1 = 130, - BDMA2_Channel2 = 131, - BDMA2_Channel3 = 132, - BDMA2_Channel4 = 133, - BDMA2_Channel5 = 134, - BDMA2_Channel6 = 135, - BDMA2_Channel7 = 136, - CEC = 94, - CRS = 144, - CRYP = 79, - DAC2 = 127, - DCMI_PSSI = 78, - DFSDM1_FLT4 = 64, - DFSDM1_FLT5 = 65, - DFSDM1_FLT6 = 66, - DFSDM1_FLT7 = 67, - DFSDM2 = 42, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - DTS = 147, - ECC = 145, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - GFXMMU = 153, - HASH_RNG = 80, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - JPEG = 121, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OCTOSPI1 = 92, - OCTOSPI2 = 150, - OTFDEC1 = 151, - OTFDEC2 = 152, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_PVM = 1, - RCC = 5, - RTC_Alarm = 41, - RTC_TAMP_STAMP_CSS_LSE = 2, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - UART9 = 140, - USART1 = 37, - USART10 = 141, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(BDMA1); - declare!(BDMA2_Channel0); - declare!(BDMA2_Channel1); - declare!(BDMA2_Channel2); - declare!(BDMA2_Channel3); - declare!(BDMA2_Channel4); - declare!(BDMA2_Channel5); - declare!(BDMA2_Channel6); - declare!(BDMA2_Channel7); - declare!(CEC); - declare!(CRS); - declare!(CRYP); - declare!(DAC2); - declare!(DCMI_PSSI); - declare!(DFSDM1_FLT4); - declare!(DFSDM1_FLT5); - declare!(DFSDM1_FLT6); - declare!(DFSDM1_FLT7); - declare!(DFSDM2); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(DTS); - declare!(ECC); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(GFXMMU); - declare!(HASH_RNG); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(JPEG); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTFDEC1); - declare!(OTFDEC2); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_PVM); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_TAMP_STAMP_CSS_LSE); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(UART9); - declare!(USART1); - declare!(USART10); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn BDMA1(); - fn BDMA2_Channel0(); - fn BDMA2_Channel1(); - fn BDMA2_Channel2(); - fn BDMA2_Channel3(); - fn BDMA2_Channel4(); - fn BDMA2_Channel5(); - fn BDMA2_Channel6(); - fn BDMA2_Channel7(); - fn CEC(); - fn CRS(); - fn CRYP(); - fn DAC2(); - fn DCMI_PSSI(); - fn DFSDM1_FLT4(); - fn DFSDM1_FLT5(); - fn DFSDM1_FLT6(); - fn DFSDM1_FLT7(); - fn DFSDM2(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn DTS(); - fn ECC(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn GFXMMU(); - fn HASH_RNG(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn JPEG(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTFDEC1(); - fn OTFDEC2(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_PVM(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_TAMP_STAMP_CSS_LSE(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn UART9(); - fn USART1(); - fn USART10(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 155] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: RTC_TAMP_STAMP_CSS_LSE, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _handler: DFSDM2 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { - _handler: DFSDM1_FLT4, - }, - Vector { - _handler: DFSDM1_FLT5, - }, - Vector { - _handler: DFSDM1_FLT6, - }, - Vector { - _handler: DFSDM1_FLT7, - }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { - _handler: DCMI_PSSI, - }, - Vector { _handler: CRYP }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _handler: JPEG }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: DAC2 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA2_Channel0, - }, - Vector { - _handler: BDMA2_Channel1, - }, - Vector { - _handler: BDMA2_Channel2, - }, - Vector { - _handler: BDMA2_Channel3, - }, - Vector { - _handler: BDMA2_Channel4, - }, - Vector { - _handler: BDMA2_Channel5, - }, - Vector { - _handler: BDMA2_Channel6, - }, - Vector { - _handler: BDMA2_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: UART9 }, - Vector { _handler: USART10 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _reserved: 0 }, - Vector { _handler: DTS }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - Vector { _handler: OCTOSPI2 }, - Vector { _handler: OTFDEC1 }, - Vector { _handler: OTFDEC2 }, - Vector { _handler: GFXMMU }, - Vector { _handler: BDMA1 }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -impl_rng!(0x48021800); -impl_sdmmc!(SDMMC1, 0x52007000); -impl_sdmmc_pin!(SDMMC1, D0Pin, PB13, 12); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -impl_sdmmc!(SDMMC2, 0x48022400); -impl_sdmmc_pin!(SDMMC2, CmdPin, PA0, 9); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D1Pin, PG10, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); -impl_sdmmc_pin!(SDMMC2, D3Pin, PG12, 10); -impl_sdmmc_pin!(SDMMC2, D6Pin, PG13, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PG14, 10); -impl_sdmmc_pin!(SDMMC2, D0Pin, PG9, 11); diff --git a/embassy-stm32/src/chip/stm32l412c8.rs b/embassy-stm32/src/chip/stm32l412c8.rs deleted file mode 100644 index bac694b4..00000000 --- a/embassy-stm32/src/chip/stm32l412c8.rs +++ /dev/null @@ -1,415 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, COMP1, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, - PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, - PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, - PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, - PD13, PD14, PD15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, - PH14, PH15, I2C1, I2C2, I2C3, IWDG, LPTIM1, LPTIM2, LPUART1, OPAMP1, QUADSPI, RCC, RNG, RTC, - SPI1, SPI2, SYSCFG, TIM1, TIM15, TIM16, TIM2, TIM6, TSC, USART1, USART2, USART3, USB, WWDG -); -pub const GPIO_BASE: usize = 0x48000000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC1_2 = 18, - COMP = 64, - CRS = 82, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SPI1 = 35, - SPI2 = 36, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM6 = 54, - TSC = 77, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USB = 67, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_2); - declare!(COMP); - declare!(CRS); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SPI1); - declare!(SPI2); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM6); - declare!(TSC); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USB); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_2(); - fn COMP(); - fn CRS(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SPI1(); - fn SPI2(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM6(); - fn TSC(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USB(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 83] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1_2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM6 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: USB }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: CRS }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_rng!(0x50060800); diff --git a/embassy-stm32/src/chip/stm32l412cb.rs b/embassy-stm32/src/chip/stm32l412cb.rs deleted file mode 100644 index bac694b4..00000000 --- a/embassy-stm32/src/chip/stm32l412cb.rs +++ /dev/null @@ -1,415 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, COMP1, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, - PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, - PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, - PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, - PD13, PD14, PD15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, - PH14, PH15, I2C1, I2C2, I2C3, IWDG, LPTIM1, LPTIM2, LPUART1, OPAMP1, QUADSPI, RCC, RNG, RTC, - SPI1, SPI2, SYSCFG, TIM1, TIM15, TIM16, TIM2, TIM6, TSC, USART1, USART2, USART3, USB, WWDG -); -pub const GPIO_BASE: usize = 0x48000000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC1_2 = 18, - COMP = 64, - CRS = 82, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SPI1 = 35, - SPI2 = 36, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM6 = 54, - TSC = 77, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USB = 67, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_2); - declare!(COMP); - declare!(CRS); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SPI1); - declare!(SPI2); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM6); - declare!(TSC); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USB); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_2(); - fn COMP(); - fn CRS(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SPI1(); - fn SPI2(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM6(); - fn TSC(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USB(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 83] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1_2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM6 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: USB }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: CRS }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_rng!(0x50060800); diff --git a/embassy-stm32/src/chip/stm32l412k8.rs b/embassy-stm32/src/chip/stm32l412k8.rs deleted file mode 100644 index ca012748..00000000 --- a/embassy-stm32/src/chip/stm32l412k8.rs +++ /dev/null @@ -1,415 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, COMP1, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, - PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, - PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, - PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, - PD13, PD14, PD15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, - PH14, PH15, I2C1, I2C3, IWDG, LPTIM1, LPTIM2, LPUART1, OPAMP1, QUADSPI, RCC, RNG, RTC, SPI1, - SYSCFG, TIM1, TIM15, TIM16, TIM2, TIM6, TSC, USART1, USART2, USB, WWDG -); -pub const GPIO_BASE: usize = 0x48000000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC1_2 = 18, - COMP = 64, - CRS = 82, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SPI1 = 35, - SPI2 = 36, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM6 = 54, - TSC = 77, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USB = 67, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_2); - declare!(COMP); - declare!(CRS); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SPI1); - declare!(SPI2); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM6); - declare!(TSC); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USB); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_2(); - fn COMP(); - fn CRS(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SPI1(); - fn SPI2(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM6(); - fn TSC(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USB(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 83] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1_2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM6 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: USB }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: CRS }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_rng!(0x50060800); diff --git a/embassy-stm32/src/chip/stm32l412kb.rs b/embassy-stm32/src/chip/stm32l412kb.rs deleted file mode 100644 index ca012748..00000000 --- a/embassy-stm32/src/chip/stm32l412kb.rs +++ /dev/null @@ -1,415 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, COMP1, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, - PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, - PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, - PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, - PD13, PD14, PD15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, - PH14, PH15, I2C1, I2C3, IWDG, LPTIM1, LPTIM2, LPUART1, OPAMP1, QUADSPI, RCC, RNG, RTC, SPI1, - SYSCFG, TIM1, TIM15, TIM16, TIM2, TIM6, TSC, USART1, USART2, USB, WWDG -); -pub const GPIO_BASE: usize = 0x48000000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC1_2 = 18, - COMP = 64, - CRS = 82, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SPI1 = 35, - SPI2 = 36, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM6 = 54, - TSC = 77, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USB = 67, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_2); - declare!(COMP); - declare!(CRS); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SPI1); - declare!(SPI2); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM6); - declare!(TSC); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USB); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_2(); - fn COMP(); - fn CRS(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SPI1(); - fn SPI2(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM6(); - fn TSC(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USB(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 83] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1_2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM6 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: USB }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: CRS }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_rng!(0x50060800); diff --git a/embassy-stm32/src/chip/stm32l412r8.rs b/embassy-stm32/src/chip/stm32l412r8.rs deleted file mode 100644 index bac694b4..00000000 --- a/embassy-stm32/src/chip/stm32l412r8.rs +++ /dev/null @@ -1,415 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, COMP1, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, - PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, - PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, - PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, - PD13, PD14, PD15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, - PH14, PH15, I2C1, I2C2, I2C3, IWDG, LPTIM1, LPTIM2, LPUART1, OPAMP1, QUADSPI, RCC, RNG, RTC, - SPI1, SPI2, SYSCFG, TIM1, TIM15, TIM16, TIM2, TIM6, TSC, USART1, USART2, USART3, USB, WWDG -); -pub const GPIO_BASE: usize = 0x48000000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC1_2 = 18, - COMP = 64, - CRS = 82, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SPI1 = 35, - SPI2 = 36, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM6 = 54, - TSC = 77, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USB = 67, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_2); - declare!(COMP); - declare!(CRS); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SPI1); - declare!(SPI2); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM6); - declare!(TSC); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USB); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_2(); - fn COMP(); - fn CRS(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SPI1(); - fn SPI2(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM6(); - fn TSC(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USB(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 83] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1_2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM6 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: USB }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: CRS }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_rng!(0x50060800); diff --git a/embassy-stm32/src/chip/stm32l412rb.rs b/embassy-stm32/src/chip/stm32l412rb.rs deleted file mode 100644 index bac694b4..00000000 --- a/embassy-stm32/src/chip/stm32l412rb.rs +++ /dev/null @@ -1,415 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, COMP1, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, - PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, - PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, - PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, - PD13, PD14, PD15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, - PH14, PH15, I2C1, I2C2, I2C3, IWDG, LPTIM1, LPTIM2, LPUART1, OPAMP1, QUADSPI, RCC, RNG, RTC, - SPI1, SPI2, SYSCFG, TIM1, TIM15, TIM16, TIM2, TIM6, TSC, USART1, USART2, USART3, USB, WWDG -); -pub const GPIO_BASE: usize = 0x48000000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC1_2 = 18, - COMP = 64, - CRS = 82, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SPI1 = 35, - SPI2 = 36, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM6 = 54, - TSC = 77, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USB = 67, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_2); - declare!(COMP); - declare!(CRS); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SPI1); - declare!(SPI2); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM6); - declare!(TSC); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USB); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_2(); - fn COMP(); - fn CRS(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SPI1(); - fn SPI2(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM6(); - fn TSC(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USB(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 83] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1_2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM6 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: USB }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: CRS }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_rng!(0x50060800); diff --git a/embassy-stm32/src/chip/stm32l412t8.rs b/embassy-stm32/src/chip/stm32l412t8.rs deleted file mode 100644 index ca012748..00000000 --- a/embassy-stm32/src/chip/stm32l412t8.rs +++ /dev/null @@ -1,415 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, COMP1, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, - PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, - PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, - PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, - PD13, PD14, PD15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, - PH14, PH15, I2C1, I2C3, IWDG, LPTIM1, LPTIM2, LPUART1, OPAMP1, QUADSPI, RCC, RNG, RTC, SPI1, - SYSCFG, TIM1, TIM15, TIM16, TIM2, TIM6, TSC, USART1, USART2, USB, WWDG -); -pub const GPIO_BASE: usize = 0x48000000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC1_2 = 18, - COMP = 64, - CRS = 82, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SPI1 = 35, - SPI2 = 36, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM6 = 54, - TSC = 77, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USB = 67, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_2); - declare!(COMP); - declare!(CRS); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SPI1); - declare!(SPI2); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM6); - declare!(TSC); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USB); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_2(); - fn COMP(); - fn CRS(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SPI1(); - fn SPI2(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM6(); - fn TSC(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USB(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 83] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1_2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM6 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: USB }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: CRS }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_rng!(0x50060800); diff --git a/embassy-stm32/src/chip/stm32l412tb.rs b/embassy-stm32/src/chip/stm32l412tb.rs deleted file mode 100644 index ca012748..00000000 --- a/embassy-stm32/src/chip/stm32l412tb.rs +++ /dev/null @@ -1,415 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, COMP1, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, - PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, - PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, - PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, - PD13, PD14, PD15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, - PH14, PH15, I2C1, I2C3, IWDG, LPTIM1, LPTIM2, LPUART1, OPAMP1, QUADSPI, RCC, RNG, RTC, SPI1, - SYSCFG, TIM1, TIM15, TIM16, TIM2, TIM6, TSC, USART1, USART2, USB, WWDG -); -pub const GPIO_BASE: usize = 0x48000000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC1_2 = 18, - COMP = 64, - CRS = 82, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SPI1 = 35, - SPI2 = 36, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM6 = 54, - TSC = 77, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USB = 67, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_2); - declare!(COMP); - declare!(CRS); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SPI1); - declare!(SPI2); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM6); - declare!(TSC); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USB); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_2(); - fn COMP(); - fn CRS(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SPI1(); - fn SPI2(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM6(); - fn TSC(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USB(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 83] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1_2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM6 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: USB }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: CRS }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_rng!(0x50060800); diff --git a/embassy-stm32/src/chip/stm32l422cb.rs b/embassy-stm32/src/chip/stm32l422cb.rs deleted file mode 100644 index a6023e5e..00000000 --- a/embassy-stm32/src/chip/stm32l422cb.rs +++ /dev/null @@ -1,419 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, AES, COMP1, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, - PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, - PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, - PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, - PD12, PD13, PD14, PD15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, - PH13, PH14, PH15, I2C1, I2C2, I2C3, IWDG, LPTIM1, LPTIM2, LPUART1, OPAMP1, QUADSPI, RCC, RNG, - RTC, SPI1, SPI2, SYSCFG, TIM1, TIM15, TIM16, TIM2, TIM6, TSC, USART1, USART2, USART3, USB, - WWDG -); -pub const GPIO_BASE: usize = 0x48000000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC1_2 = 18, - AES = 79, - COMP = 64, - CRS = 82, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SPI1 = 35, - SPI2 = 36, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM6 = 54, - TSC = 77, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USB = 67, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_2); - declare!(AES); - declare!(COMP); - declare!(CRS); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SPI1); - declare!(SPI2); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM6); - declare!(TSC); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USB); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_2(); - fn AES(); - fn COMP(); - fn CRS(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SPI1(); - fn SPI2(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM6(); - fn TSC(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USB(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 83] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1_2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM6 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: USB }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _handler: AES }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: CRS }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_rng!(0x50060800); diff --git a/embassy-stm32/src/chip/stm32l422kb.rs b/embassy-stm32/src/chip/stm32l422kb.rs deleted file mode 100644 index 4d13988a..00000000 --- a/embassy-stm32/src/chip/stm32l422kb.rs +++ /dev/null @@ -1,418 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, AES, COMP1, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, - PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, - PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, - PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, - PD12, PD13, PD14, PD15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, - PH13, PH14, PH15, I2C1, I2C3, IWDG, LPTIM1, LPTIM2, LPUART1, OPAMP1, QUADSPI, RCC, RNG, RTC, - SPI1, SYSCFG, TIM1, TIM15, TIM16, TIM2, TIM6, TSC, USART1, USART2, USB, WWDG -); -pub const GPIO_BASE: usize = 0x48000000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC1_2 = 18, - AES = 79, - COMP = 64, - CRS = 82, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SPI1 = 35, - SPI2 = 36, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM6 = 54, - TSC = 77, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USB = 67, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_2); - declare!(AES); - declare!(COMP); - declare!(CRS); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SPI1); - declare!(SPI2); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM6); - declare!(TSC); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USB); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_2(); - fn AES(); - fn COMP(); - fn CRS(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SPI1(); - fn SPI2(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM6(); - fn TSC(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USB(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 83] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1_2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM6 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: USB }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _handler: AES }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: CRS }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_rng!(0x50060800); diff --git a/embassy-stm32/src/chip/stm32l422rb.rs b/embassy-stm32/src/chip/stm32l422rb.rs deleted file mode 100644 index a6023e5e..00000000 --- a/embassy-stm32/src/chip/stm32l422rb.rs +++ /dev/null @@ -1,419 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, AES, COMP1, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, - PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, - PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, - PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, - PD12, PD13, PD14, PD15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, - PH13, PH14, PH15, I2C1, I2C2, I2C3, IWDG, LPTIM1, LPTIM2, LPUART1, OPAMP1, QUADSPI, RCC, RNG, - RTC, SPI1, SPI2, SYSCFG, TIM1, TIM15, TIM16, TIM2, TIM6, TSC, USART1, USART2, USART3, USB, - WWDG -); -pub const GPIO_BASE: usize = 0x48000000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC1_2 = 18, - AES = 79, - COMP = 64, - CRS = 82, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SPI1 = 35, - SPI2 = 36, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM6 = 54, - TSC = 77, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USB = 67, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_2); - declare!(AES); - declare!(COMP); - declare!(CRS); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SPI1); - declare!(SPI2); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM6); - declare!(TSC); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USB); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_2(); - fn AES(); - fn COMP(); - fn CRS(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SPI1(); - fn SPI2(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM6(); - fn TSC(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USB(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 83] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1_2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM6 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: USB }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _handler: AES }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: CRS }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_rng!(0x50060800); diff --git a/embassy-stm32/src/chip/stm32l422tb.rs b/embassy-stm32/src/chip/stm32l422tb.rs deleted file mode 100644 index 4d13988a..00000000 --- a/embassy-stm32/src/chip/stm32l422tb.rs +++ /dev/null @@ -1,418 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, AES, COMP1, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, - PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, - PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, - PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, - PD12, PD13, PD14, PD15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, - PH13, PH14, PH15, I2C1, I2C3, IWDG, LPTIM1, LPTIM2, LPUART1, OPAMP1, QUADSPI, RCC, RNG, RTC, - SPI1, SYSCFG, TIM1, TIM15, TIM16, TIM2, TIM6, TSC, USART1, USART2, USB, WWDG -); -pub const GPIO_BASE: usize = 0x48000000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC1_2 = 18, - AES = 79, - COMP = 64, - CRS = 82, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SPI1 = 35, - SPI2 = 36, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM6 = 54, - TSC = 77, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USB = 67, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_2); - declare!(AES); - declare!(COMP); - declare!(CRS); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SPI1); - declare!(SPI2); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM6); - declare!(TSC); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USB); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_2(); - fn AES(); - fn COMP(); - fn CRS(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SPI1(); - fn SPI2(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM6(); - fn TSC(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USB(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 83] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1_2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM6 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: USB }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _handler: AES }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: CRS }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_rng!(0x50060800); diff --git a/embassy-stm32/src/chip/stm32l431cb.rs b/embassy-stm32/src/chip/stm32l431cb.rs deleted file mode 100644 index a0d5c2f0..00000000 --- a/embassy-stm32/src/chip/stm32l431cb.rs +++ /dev/null @@ -1,457 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, CAN1, COMP1, COMP2, DAC1, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, - PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, - PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, - PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, - PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, - PE13, PE14, PE15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, - PH14, PH15, I2C1, I2C2, I2C3, IWDG, LPTIM1, LPTIM2, LPUART1, OPAMP1, QUADSPI, RCC, RNG, RTC, - SAI1, SPI1, SPI2, SPI3, SWPMI1, SYSCFG, TIM1, TIM15, TIM16, TIM2, TIM6, TIM7, TSC, USART1, - USART2, USART3, WWDG -); -pub const GPIO_BASE: usize = 0x48000000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC1 = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - CRS = 82, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SWPMI1 = 76, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM6_DAC = 54, - TIM7 = 55, - TSC = 77, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(CRS); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TSC); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn CRS(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM6_DAC(); - fn TIM7(); - fn TSC(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 83] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC1 }, - Vector { _reserved: 0 }, - Vector { _handler: SPI3 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _reserved: 0 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: CRS }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_rng!(0x50060800); diff --git a/embassy-stm32/src/chip/stm32l431cc.rs b/embassy-stm32/src/chip/stm32l431cc.rs deleted file mode 100644 index a0d5c2f0..00000000 --- a/embassy-stm32/src/chip/stm32l431cc.rs +++ /dev/null @@ -1,457 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, CAN1, COMP1, COMP2, DAC1, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, - PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, - PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, - PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, - PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, - PE13, PE14, PE15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, - PH14, PH15, I2C1, I2C2, I2C3, IWDG, LPTIM1, LPTIM2, LPUART1, OPAMP1, QUADSPI, RCC, RNG, RTC, - SAI1, SPI1, SPI2, SPI3, SWPMI1, SYSCFG, TIM1, TIM15, TIM16, TIM2, TIM6, TIM7, TSC, USART1, - USART2, USART3, WWDG -); -pub const GPIO_BASE: usize = 0x48000000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC1 = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - CRS = 82, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SWPMI1 = 76, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM6_DAC = 54, - TIM7 = 55, - TSC = 77, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(CRS); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TSC); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn CRS(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM6_DAC(); - fn TIM7(); - fn TSC(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 83] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC1 }, - Vector { _reserved: 0 }, - Vector { _handler: SPI3 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _reserved: 0 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: CRS }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_rng!(0x50060800); diff --git a/embassy-stm32/src/chip/stm32l431kb.rs b/embassy-stm32/src/chip/stm32l431kb.rs deleted file mode 100644 index 4835b504..00000000 --- a/embassy-stm32/src/chip/stm32l431kb.rs +++ /dev/null @@ -1,456 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, CAN1, COMP1, COMP2, DAC1, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, - PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, - PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, - PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, - PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, - PE13, PE14, PE15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, - PH14, PH15, I2C1, I2C3, IWDG, LPTIM1, LPTIM2, LPUART1, OPAMP1, QUADSPI, RCC, RNG, RTC, SAI1, - SPI1, SPI3, SWPMI1, SYSCFG, TIM1, TIM15, TIM16, TIM2, TIM6, TIM7, TSC, USART1, USART2, WWDG -); -pub const GPIO_BASE: usize = 0x48000000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC1 = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - CRS = 82, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SWPMI1 = 76, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM6_DAC = 54, - TIM7 = 55, - TSC = 77, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(CRS); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TSC); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn CRS(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM6_DAC(); - fn TIM7(); - fn TSC(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 83] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC1 }, - Vector { _reserved: 0 }, - Vector { _handler: SPI3 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _reserved: 0 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: CRS }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_rng!(0x50060800); diff --git a/embassy-stm32/src/chip/stm32l431kc.rs b/embassy-stm32/src/chip/stm32l431kc.rs deleted file mode 100644 index 4835b504..00000000 --- a/embassy-stm32/src/chip/stm32l431kc.rs +++ /dev/null @@ -1,456 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, CAN1, COMP1, COMP2, DAC1, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, - PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, - PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, - PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, - PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, - PE13, PE14, PE15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, - PH14, PH15, I2C1, I2C3, IWDG, LPTIM1, LPTIM2, LPUART1, OPAMP1, QUADSPI, RCC, RNG, RTC, SAI1, - SPI1, SPI3, SWPMI1, SYSCFG, TIM1, TIM15, TIM16, TIM2, TIM6, TIM7, TSC, USART1, USART2, WWDG -); -pub const GPIO_BASE: usize = 0x48000000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC1 = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - CRS = 82, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SWPMI1 = 76, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM6_DAC = 54, - TIM7 = 55, - TSC = 77, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(CRS); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TSC); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn CRS(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM6_DAC(); - fn TIM7(); - fn TSC(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 83] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC1 }, - Vector { _reserved: 0 }, - Vector { _handler: SPI3 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _reserved: 0 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: CRS }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_rng!(0x50060800); diff --git a/embassy-stm32/src/chip/stm32l431rb.rs b/embassy-stm32/src/chip/stm32l431rb.rs deleted file mode 100644 index 40229c74..00000000 --- a/embassy-stm32/src/chip/stm32l431rb.rs +++ /dev/null @@ -1,457 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, CAN1, COMP1, COMP2, DAC1, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, - PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, - PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, - PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, - PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, - PE13, PE14, PE15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, - PH14, PH15, I2C1, I2C2, I2C3, IWDG, LPTIM1, LPTIM2, LPUART1, OPAMP1, QUADSPI, RCC, RNG, RTC, - SAI1, SDMMC1, SPI1, SPI2, SPI3, SWPMI1, SYSCFG, TIM1, TIM15, TIM16, TIM2, TIM6, TIM7, TSC, - USART1, USART2, USART3, WWDG -); -pub const GPIO_BASE: usize = 0x48000000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC1 = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - CRS = 82, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SWPMI1 = 76, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM6_DAC = 54, - TIM7 = 55, - TSC = 77, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(CRS); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TSC); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn CRS(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM6_DAC(); - fn TIM7(); - fn TSC(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 83] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC1 }, - Vector { _reserved: 0 }, - Vector { _handler: SPI3 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _reserved: 0 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: CRS }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_rng!(0x50060800); diff --git a/embassy-stm32/src/chip/stm32l431rc.rs b/embassy-stm32/src/chip/stm32l431rc.rs deleted file mode 100644 index 40229c74..00000000 --- a/embassy-stm32/src/chip/stm32l431rc.rs +++ /dev/null @@ -1,457 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, CAN1, COMP1, COMP2, DAC1, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, - PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, - PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, - PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, - PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, - PE13, PE14, PE15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, - PH14, PH15, I2C1, I2C2, I2C3, IWDG, LPTIM1, LPTIM2, LPUART1, OPAMP1, QUADSPI, RCC, RNG, RTC, - SAI1, SDMMC1, SPI1, SPI2, SPI3, SWPMI1, SYSCFG, TIM1, TIM15, TIM16, TIM2, TIM6, TIM7, TSC, - USART1, USART2, USART3, WWDG -); -pub const GPIO_BASE: usize = 0x48000000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC1 = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - CRS = 82, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SWPMI1 = 76, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM6_DAC = 54, - TIM7 = 55, - TSC = 77, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(CRS); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TSC); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn CRS(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM6_DAC(); - fn TIM7(); - fn TSC(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 83] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC1 }, - Vector { _reserved: 0 }, - Vector { _handler: SPI3 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _reserved: 0 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: CRS }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_rng!(0x50060800); diff --git a/embassy-stm32/src/chip/stm32l431vc.rs b/embassy-stm32/src/chip/stm32l431vc.rs deleted file mode 100644 index 40229c74..00000000 --- a/embassy-stm32/src/chip/stm32l431vc.rs +++ /dev/null @@ -1,457 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, CAN1, COMP1, COMP2, DAC1, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, - PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, - PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, - PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, - PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, - PE13, PE14, PE15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, - PH14, PH15, I2C1, I2C2, I2C3, IWDG, LPTIM1, LPTIM2, LPUART1, OPAMP1, QUADSPI, RCC, RNG, RTC, - SAI1, SDMMC1, SPI1, SPI2, SPI3, SWPMI1, SYSCFG, TIM1, TIM15, TIM16, TIM2, TIM6, TIM7, TSC, - USART1, USART2, USART3, WWDG -); -pub const GPIO_BASE: usize = 0x48000000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC1 = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - CRS = 82, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SWPMI1 = 76, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM6_DAC = 54, - TIM7 = 55, - TSC = 77, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(CRS); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TSC); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn CRS(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM6_DAC(); - fn TIM7(); - fn TSC(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 83] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC1 }, - Vector { _reserved: 0 }, - Vector { _handler: SPI3 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _reserved: 0 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: CRS }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_rng!(0x50060800); diff --git a/embassy-stm32/src/chip/stm32l432kb.rs b/embassy-stm32/src/chip/stm32l432kb.rs deleted file mode 100644 index 5fb08a73..00000000 --- a/embassy-stm32/src/chip/stm32l432kb.rs +++ /dev/null @@ -1,411 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, CAN1, COMP1, COMP2, DAC1, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, - PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, - PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, - PC11, PC12, PC13, PC14, PC15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, I2C1, I2C3, IWDG, LPTIM1, LPTIM2, LPUART1, OPAMP1, QUADSPI, RCC, RNG, - RTC, SAI1, SPI1, SPI3, SWPMI1, SYSCFG, TIM1, TIM15, TIM16, TIM2, TIM6, TIM7, TSC, USART1, - USART2, USB, WWDG -); -pub const GPIO_BASE: usize = 0x48000000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC1 = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - CRS = 82, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C3_ER = 73, - I2C3_EV = 72, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SPI1 = 35, - SPI3 = 51, - SWPMI1 = 76, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM6_DAC = 54, - TIM7 = 55, - TSC = 77, - USART1 = 37, - USART2 = 38, - USB = 67, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(CRS); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SPI1); - declare!(SPI3); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TSC); - declare!(USART1); - declare!(USART2); - declare!(USB); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn CRS(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SPI1(); - fn SPI3(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM6_DAC(); - fn TIM7(); - fn TSC(); - fn USART1(); - fn USART2(); - fn USB(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 83] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SPI1 }, - Vector { _reserved: 0 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _reserved: 0 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SPI3 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: USB }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _reserved: 0 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: CRS }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_rng!(0x50060800); diff --git a/embassy-stm32/src/chip/stm32l432kc.rs b/embassy-stm32/src/chip/stm32l432kc.rs deleted file mode 100644 index 5fb08a73..00000000 --- a/embassy-stm32/src/chip/stm32l432kc.rs +++ /dev/null @@ -1,411 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, CAN1, COMP1, COMP2, DAC1, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, - PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, - PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, - PC11, PC12, PC13, PC14, PC15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, I2C1, I2C3, IWDG, LPTIM1, LPTIM2, LPUART1, OPAMP1, QUADSPI, RCC, RNG, - RTC, SAI1, SPI1, SPI3, SWPMI1, SYSCFG, TIM1, TIM15, TIM16, TIM2, TIM6, TIM7, TSC, USART1, - USART2, USB, WWDG -); -pub const GPIO_BASE: usize = 0x48000000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC1 = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - CRS = 82, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C3_ER = 73, - I2C3_EV = 72, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SPI1 = 35, - SPI3 = 51, - SWPMI1 = 76, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM6_DAC = 54, - TIM7 = 55, - TSC = 77, - USART1 = 37, - USART2 = 38, - USB = 67, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(CRS); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SPI1); - declare!(SPI3); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TSC); - declare!(USART1); - declare!(USART2); - declare!(USB); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn CRS(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SPI1(); - fn SPI3(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM6_DAC(); - fn TIM7(); - fn TSC(); - fn USART1(); - fn USART2(); - fn USB(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 83] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SPI1 }, - Vector { _reserved: 0 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _reserved: 0 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SPI3 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: USB }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _reserved: 0 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: CRS }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_rng!(0x50060800); diff --git a/embassy-stm32/src/chip/stm32l433cb.rs b/embassy-stm32/src/chip/stm32l433cb.rs deleted file mode 100644 index 4e18e5f2..00000000 --- a/embassy-stm32/src/chip/stm32l433cb.rs +++ /dev/null @@ -1,463 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, CAN1, COMP1, COMP2, DAC1, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, - PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, - PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, - PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, - PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, - PE13, PE14, PE15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, - PH14, PH15, I2C1, I2C2, I2C3, IWDG, LCD, LPTIM1, LPTIM2, LPUART1, OPAMP1, QUADSPI, RCC, RNG, - RTC, SAI1, SPI1, SPI2, SPI3, SWPMI1, SYSCFG, TIM1, TIM15, TIM16, TIM2, TIM6, TIM7, TSC, USART1, - USART2, USART3, USB, WWDG -); -pub const GPIO_BASE: usize = 0x48000000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC1 = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - CRS = 82, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LCD = 78, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SWPMI1 = 76, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM6_DAC = 54, - TIM7 = 55, - TSC = 77, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USB = 67, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(CRS); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LCD); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TSC); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USB); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn CRS(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LCD(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM6_DAC(); - fn TIM7(); - fn TSC(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USB(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 83] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC1 }, - Vector { _reserved: 0 }, - Vector { _handler: SPI3 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: USB }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _reserved: 0 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TSC }, - Vector { _handler: LCD }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: CRS }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_rng!(0x50060800); diff --git a/embassy-stm32/src/chip/stm32l433cc.rs b/embassy-stm32/src/chip/stm32l433cc.rs deleted file mode 100644 index 4e18e5f2..00000000 --- a/embassy-stm32/src/chip/stm32l433cc.rs +++ /dev/null @@ -1,463 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, CAN1, COMP1, COMP2, DAC1, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, - PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, - PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, - PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, - PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, - PE13, PE14, PE15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, - PH14, PH15, I2C1, I2C2, I2C3, IWDG, LCD, LPTIM1, LPTIM2, LPUART1, OPAMP1, QUADSPI, RCC, RNG, - RTC, SAI1, SPI1, SPI2, SPI3, SWPMI1, SYSCFG, TIM1, TIM15, TIM16, TIM2, TIM6, TIM7, TSC, USART1, - USART2, USART3, USB, WWDG -); -pub const GPIO_BASE: usize = 0x48000000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC1 = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - CRS = 82, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LCD = 78, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SWPMI1 = 76, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM6_DAC = 54, - TIM7 = 55, - TSC = 77, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USB = 67, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(CRS); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LCD); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TSC); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USB); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn CRS(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LCD(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM6_DAC(); - fn TIM7(); - fn TSC(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USB(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 83] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC1 }, - Vector { _reserved: 0 }, - Vector { _handler: SPI3 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: USB }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _reserved: 0 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TSC }, - Vector { _handler: LCD }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: CRS }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_rng!(0x50060800); diff --git a/embassy-stm32/src/chip/stm32l433rb.rs b/embassy-stm32/src/chip/stm32l433rb.rs deleted file mode 100644 index c6e6c1cd..00000000 --- a/embassy-stm32/src/chip/stm32l433rb.rs +++ /dev/null @@ -1,463 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, CAN1, COMP1, COMP2, DAC1, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, - PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, - PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, - PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, - PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, - PE13, PE14, PE15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, - PH14, PH15, I2C1, I2C2, I2C3, IWDG, LCD, LPTIM1, LPTIM2, LPUART1, OPAMP1, QUADSPI, RCC, RNG, - RTC, SAI1, SDMMC1, SPI1, SPI2, SPI3, SWPMI1, SYSCFG, TIM1, TIM15, TIM16, TIM2, TIM6, TIM7, TSC, - USART1, USART2, USART3, USB, WWDG -); -pub const GPIO_BASE: usize = 0x48000000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC1 = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - CRS = 82, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LCD = 78, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SWPMI1 = 76, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM6_DAC = 54, - TIM7 = 55, - TSC = 77, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USB = 67, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(CRS); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LCD); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TSC); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USB); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn CRS(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LCD(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM6_DAC(); - fn TIM7(); - fn TSC(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USB(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 83] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC1 }, - Vector { _reserved: 0 }, - Vector { _handler: SPI3 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: USB }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _reserved: 0 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TSC }, - Vector { _handler: LCD }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: CRS }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_rng!(0x50060800); diff --git a/embassy-stm32/src/chip/stm32l433rc.rs b/embassy-stm32/src/chip/stm32l433rc.rs deleted file mode 100644 index c6e6c1cd..00000000 --- a/embassy-stm32/src/chip/stm32l433rc.rs +++ /dev/null @@ -1,463 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, CAN1, COMP1, COMP2, DAC1, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, - PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, - PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, - PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, - PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, - PE13, PE14, PE15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, - PH14, PH15, I2C1, I2C2, I2C3, IWDG, LCD, LPTIM1, LPTIM2, LPUART1, OPAMP1, QUADSPI, RCC, RNG, - RTC, SAI1, SDMMC1, SPI1, SPI2, SPI3, SWPMI1, SYSCFG, TIM1, TIM15, TIM16, TIM2, TIM6, TIM7, TSC, - USART1, USART2, USART3, USB, WWDG -); -pub const GPIO_BASE: usize = 0x48000000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC1 = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - CRS = 82, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LCD = 78, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SWPMI1 = 76, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM6_DAC = 54, - TIM7 = 55, - TSC = 77, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USB = 67, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(CRS); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LCD); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TSC); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USB); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn CRS(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LCD(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM6_DAC(); - fn TIM7(); - fn TSC(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USB(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 83] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC1 }, - Vector { _reserved: 0 }, - Vector { _handler: SPI3 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: USB }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _reserved: 0 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TSC }, - Vector { _handler: LCD }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: CRS }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_rng!(0x50060800); diff --git a/embassy-stm32/src/chip/stm32l433vc.rs b/embassy-stm32/src/chip/stm32l433vc.rs deleted file mode 100644 index c6e6c1cd..00000000 --- a/embassy-stm32/src/chip/stm32l433vc.rs +++ /dev/null @@ -1,463 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, CAN1, COMP1, COMP2, DAC1, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, - PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, - PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, - PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, - PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, - PE13, PE14, PE15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, - PH14, PH15, I2C1, I2C2, I2C3, IWDG, LCD, LPTIM1, LPTIM2, LPUART1, OPAMP1, QUADSPI, RCC, RNG, - RTC, SAI1, SDMMC1, SPI1, SPI2, SPI3, SWPMI1, SYSCFG, TIM1, TIM15, TIM16, TIM2, TIM6, TIM7, TSC, - USART1, USART2, USART3, USB, WWDG -); -pub const GPIO_BASE: usize = 0x48000000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC1 = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - CRS = 82, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LCD = 78, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SWPMI1 = 76, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM6_DAC = 54, - TIM7 = 55, - TSC = 77, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USB = 67, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(CRS); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LCD); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TSC); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USB); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn CRS(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LCD(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM6_DAC(); - fn TIM7(); - fn TSC(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USB(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 83] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC1 }, - Vector { _reserved: 0 }, - Vector { _handler: SPI3 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: USB }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _reserved: 0 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TSC }, - Vector { _handler: LCD }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: CRS }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_rng!(0x50060800); diff --git a/embassy-stm32/src/chip/stm32l442kc.rs b/embassy-stm32/src/chip/stm32l442kc.rs deleted file mode 100644 index b3360d12..00000000 --- a/embassy-stm32/src/chip/stm32l442kc.rs +++ /dev/null @@ -1,414 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, AES, CAN1, COMP1, COMP2, DAC1, PA0, PA1, PA2, PA3, PA4, PA5, PA6, - PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, - PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, - PC10, PC11, PC12, PC13, PC14, PC15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, - PH11, PH12, PH13, PH14, PH15, I2C1, I2C3, IWDG, LPTIM1, LPTIM2, LPUART1, OPAMP1, QUADSPI, RCC, - RNG, RTC, SAI1, SPI1, SPI3, SWPMI1, SYSCFG, TIM1, TIM15, TIM16, TIM2, TIM6, TIM7, TSC, USART1, - USART2, USB, WWDG -); -pub const GPIO_BASE: usize = 0x48000000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC1 = 18, - AES = 79, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - CRS = 82, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C3_ER = 73, - I2C3_EV = 72, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SPI1 = 35, - SPI3 = 51, - SWPMI1 = 76, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM6_DAC = 54, - TIM7 = 55, - TSC = 77, - USART1 = 37, - USART2 = 38, - USB = 67, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1); - declare!(AES); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(CRS); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SPI1); - declare!(SPI3); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TSC); - declare!(USART1); - declare!(USART2); - declare!(USB); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1(); - fn AES(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn CRS(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SPI1(); - fn SPI3(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM6_DAC(); - fn TIM7(); - fn TSC(); - fn USART1(); - fn USART2(); - fn USB(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 83] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SPI1 }, - Vector { _reserved: 0 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _reserved: 0 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SPI3 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: USB }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _reserved: 0 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _handler: AES }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: CRS }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_rng!(0x50060800); diff --git a/embassy-stm32/src/chip/stm32l443cc.rs b/embassy-stm32/src/chip/stm32l443cc.rs deleted file mode 100644 index cc9fa363..00000000 --- a/embassy-stm32/src/chip/stm32l443cc.rs +++ /dev/null @@ -1,466 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, AES, CAN1, COMP1, COMP2, DAC1, PA0, PA1, PA2, PA3, PA4, PA5, PA6, - PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, - PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, - PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, - PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, - PE12, PE13, PE14, PE15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, - PH13, PH14, PH15, I2C1, I2C2, I2C3, IWDG, LCD, LPTIM1, LPTIM2, LPUART1, OPAMP1, QUADSPI, RCC, - RNG, RTC, SAI1, SPI1, SPI2, SPI3, SWPMI1, SYSCFG, TIM1, TIM15, TIM16, TIM2, TIM6, TIM7, TSC, - USART1, USART2, USART3, USB, WWDG -); -pub const GPIO_BASE: usize = 0x48000000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC1 = 18, - AES = 79, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - CRS = 82, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LCD = 78, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SWPMI1 = 76, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM6_DAC = 54, - TIM7 = 55, - TSC = 77, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USB = 67, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1); - declare!(AES); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(CRS); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LCD); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TSC); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USB); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1(); - fn AES(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn CRS(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LCD(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM6_DAC(); - fn TIM7(); - fn TSC(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USB(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 83] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC1 }, - Vector { _reserved: 0 }, - Vector { _handler: SPI3 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: USB }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _reserved: 0 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TSC }, - Vector { _handler: LCD }, - Vector { _handler: AES }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: CRS }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_rng!(0x50060800); diff --git a/embassy-stm32/src/chip/stm32l443rc.rs b/embassy-stm32/src/chip/stm32l443rc.rs deleted file mode 100644 index b0cf88ca..00000000 --- a/embassy-stm32/src/chip/stm32l443rc.rs +++ /dev/null @@ -1,466 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, AES, CAN1, COMP1, COMP2, DAC1, PA0, PA1, PA2, PA3, PA4, PA5, PA6, - PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, - PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, - PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, - PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, - PE12, PE13, PE14, PE15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, - PH13, PH14, PH15, I2C1, I2C2, I2C3, IWDG, LCD, LPTIM1, LPTIM2, LPUART1, OPAMP1, QUADSPI, RCC, - RNG, RTC, SAI1, SDMMC1, SPI1, SPI2, SPI3, SWPMI1, SYSCFG, TIM1, TIM15, TIM16, TIM2, TIM6, TIM7, - TSC, USART1, USART2, USART3, USB, WWDG -); -pub const GPIO_BASE: usize = 0x48000000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC1 = 18, - AES = 79, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - CRS = 82, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LCD = 78, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SWPMI1 = 76, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM6_DAC = 54, - TIM7 = 55, - TSC = 77, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USB = 67, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1); - declare!(AES); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(CRS); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LCD); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TSC); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USB); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1(); - fn AES(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn CRS(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LCD(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM6_DAC(); - fn TIM7(); - fn TSC(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USB(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 83] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC1 }, - Vector { _reserved: 0 }, - Vector { _handler: SPI3 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: USB }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _reserved: 0 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TSC }, - Vector { _handler: LCD }, - Vector { _handler: AES }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: CRS }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_rng!(0x50060800); diff --git a/embassy-stm32/src/chip/stm32l443vc.rs b/embassy-stm32/src/chip/stm32l443vc.rs deleted file mode 100644 index b0cf88ca..00000000 --- a/embassy-stm32/src/chip/stm32l443vc.rs +++ /dev/null @@ -1,466 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, AES, CAN1, COMP1, COMP2, DAC1, PA0, PA1, PA2, PA3, PA4, PA5, PA6, - PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, - PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, - PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, - PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, - PE12, PE13, PE14, PE15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, - PH13, PH14, PH15, I2C1, I2C2, I2C3, IWDG, LCD, LPTIM1, LPTIM2, LPUART1, OPAMP1, QUADSPI, RCC, - RNG, RTC, SAI1, SDMMC1, SPI1, SPI2, SPI3, SWPMI1, SYSCFG, TIM1, TIM15, TIM16, TIM2, TIM6, TIM7, - TSC, USART1, USART2, USART3, USB, WWDG -); -pub const GPIO_BASE: usize = 0x48000000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC1 = 18, - AES = 79, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - CRS = 82, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LCD = 78, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SWPMI1 = 76, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM6_DAC = 54, - TIM7 = 55, - TSC = 77, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USB = 67, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1); - declare!(AES); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(CRS); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LCD); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TSC); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USB); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1(); - fn AES(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn CRS(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LCD(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM6_DAC(); - fn TIM7(); - fn TSC(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USB(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 83] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC1 }, - Vector { _reserved: 0 }, - Vector { _handler: SPI3 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: USB }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _reserved: 0 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TSC }, - Vector { _handler: LCD }, - Vector { _handler: AES }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: CRS }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_rng!(0x50060800); diff --git a/embassy-stm32/src/chip/stm32l451cc.rs b/embassy-stm32/src/chip/stm32l451cc.rs deleted file mode 100644 index 803f18cc..00000000 --- a/embassy-stm32/src/chip/stm32l451cc.rs +++ /dev/null @@ -1,475 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, CAN1, COMP1, COMP2, DAC1, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, - PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, - PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, - PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, - PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, - PE13, PE14, PE15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, - PH14, PH15, I2C1, I2C2, I2C3, I2C4, IWDG, LPTIM1, LPTIM2, LPUART1, OPAMP1, QUADSPI, RCC, RNG, - RTC, SAI1, SPI1, SPI2, SPI3, SYSCFG, TIM1, TIM15, TIM16, TIM2, TIM3, TIM6, TSC, UART4, USART1, - USART2, USART3, WWDG -); -pub const GPIO_BASE: usize = 0x48000000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC1 = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - CRS = 82, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 84, - I2C4_EV = 83, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM6_DAC = 54, - TSC = 77, - UART4 = 52, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(CRS); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM6_DAC); - declare!(TSC); - declare!(UART4); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn CRS(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM6_DAC(); - fn TSC(); - fn UART4(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 85] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _reserved: 0 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC1 }, - Vector { _reserved: 0 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM6_DAC }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { _reserved: 0 }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: CRS }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_rng!(0x50060800); diff --git a/embassy-stm32/src/chip/stm32l451ce.rs b/embassy-stm32/src/chip/stm32l451ce.rs deleted file mode 100644 index 803f18cc..00000000 --- a/embassy-stm32/src/chip/stm32l451ce.rs +++ /dev/null @@ -1,475 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, CAN1, COMP1, COMP2, DAC1, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, - PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, - PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, - PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, - PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, - PE13, PE14, PE15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, - PH14, PH15, I2C1, I2C2, I2C3, I2C4, IWDG, LPTIM1, LPTIM2, LPUART1, OPAMP1, QUADSPI, RCC, RNG, - RTC, SAI1, SPI1, SPI2, SPI3, SYSCFG, TIM1, TIM15, TIM16, TIM2, TIM3, TIM6, TSC, UART4, USART1, - USART2, USART3, WWDG -); -pub const GPIO_BASE: usize = 0x48000000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC1 = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - CRS = 82, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 84, - I2C4_EV = 83, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM6_DAC = 54, - TSC = 77, - UART4 = 52, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(CRS); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM6_DAC); - declare!(TSC); - declare!(UART4); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn CRS(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM6_DAC(); - fn TSC(); - fn UART4(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 85] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _reserved: 0 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC1 }, - Vector { _reserved: 0 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM6_DAC }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { _reserved: 0 }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: CRS }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_rng!(0x50060800); diff --git a/embassy-stm32/src/chip/stm32l451rc.rs b/embassy-stm32/src/chip/stm32l451rc.rs deleted file mode 100644 index 0cbd5d0c..00000000 --- a/embassy-stm32/src/chip/stm32l451rc.rs +++ /dev/null @@ -1,475 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, CAN1, COMP1, COMP2, DAC1, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, - PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, - PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, - PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, - PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, - PE13, PE14, PE15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, - PH14, PH15, I2C1, I2C2, I2C3, I2C4, IWDG, LPTIM1, LPTIM2, LPUART1, OPAMP1, QUADSPI, RCC, RNG, - RTC, SAI1, SDMMC1, SPI1, SPI2, SPI3, SYSCFG, TIM1, TIM15, TIM16, TIM2, TIM3, TIM6, TSC, UART4, - USART1, USART2, USART3, WWDG -); -pub const GPIO_BASE: usize = 0x48000000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC1 = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - CRS = 82, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 84, - I2C4_EV = 83, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM6_DAC = 54, - TSC = 77, - UART4 = 52, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(CRS); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM6_DAC); - declare!(TSC); - declare!(UART4); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn CRS(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM6_DAC(); - fn TSC(); - fn UART4(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 85] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _reserved: 0 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC1 }, - Vector { _reserved: 0 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM6_DAC }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { _reserved: 0 }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: CRS }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_rng!(0x50060800); diff --git a/embassy-stm32/src/chip/stm32l451re.rs b/embassy-stm32/src/chip/stm32l451re.rs deleted file mode 100644 index 0cbd5d0c..00000000 --- a/embassy-stm32/src/chip/stm32l451re.rs +++ /dev/null @@ -1,475 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, CAN1, COMP1, COMP2, DAC1, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, - PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, - PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, - PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, - PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, - PE13, PE14, PE15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, - PH14, PH15, I2C1, I2C2, I2C3, I2C4, IWDG, LPTIM1, LPTIM2, LPUART1, OPAMP1, QUADSPI, RCC, RNG, - RTC, SAI1, SDMMC1, SPI1, SPI2, SPI3, SYSCFG, TIM1, TIM15, TIM16, TIM2, TIM3, TIM6, TSC, UART4, - USART1, USART2, USART3, WWDG -); -pub const GPIO_BASE: usize = 0x48000000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC1 = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - CRS = 82, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 84, - I2C4_EV = 83, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM6_DAC = 54, - TSC = 77, - UART4 = 52, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(CRS); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM6_DAC); - declare!(TSC); - declare!(UART4); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn CRS(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM6_DAC(); - fn TSC(); - fn UART4(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 85] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _reserved: 0 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC1 }, - Vector { _reserved: 0 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM6_DAC }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { _reserved: 0 }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: CRS }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_rng!(0x50060800); diff --git a/embassy-stm32/src/chip/stm32l451vc.rs b/embassy-stm32/src/chip/stm32l451vc.rs deleted file mode 100644 index 0cbd5d0c..00000000 --- a/embassy-stm32/src/chip/stm32l451vc.rs +++ /dev/null @@ -1,475 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, CAN1, COMP1, COMP2, DAC1, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, - PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, - PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, - PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, - PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, - PE13, PE14, PE15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, - PH14, PH15, I2C1, I2C2, I2C3, I2C4, IWDG, LPTIM1, LPTIM2, LPUART1, OPAMP1, QUADSPI, RCC, RNG, - RTC, SAI1, SDMMC1, SPI1, SPI2, SPI3, SYSCFG, TIM1, TIM15, TIM16, TIM2, TIM3, TIM6, TSC, UART4, - USART1, USART2, USART3, WWDG -); -pub const GPIO_BASE: usize = 0x48000000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC1 = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - CRS = 82, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 84, - I2C4_EV = 83, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM6_DAC = 54, - TSC = 77, - UART4 = 52, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(CRS); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM6_DAC); - declare!(TSC); - declare!(UART4); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn CRS(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM6_DAC(); - fn TSC(); - fn UART4(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 85] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _reserved: 0 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC1 }, - Vector { _reserved: 0 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM6_DAC }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { _reserved: 0 }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: CRS }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_rng!(0x50060800); diff --git a/embassy-stm32/src/chip/stm32l451ve.rs b/embassy-stm32/src/chip/stm32l451ve.rs deleted file mode 100644 index 0cbd5d0c..00000000 --- a/embassy-stm32/src/chip/stm32l451ve.rs +++ /dev/null @@ -1,475 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, CAN1, COMP1, COMP2, DAC1, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, - PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, - PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, - PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, - PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, - PE13, PE14, PE15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, - PH14, PH15, I2C1, I2C2, I2C3, I2C4, IWDG, LPTIM1, LPTIM2, LPUART1, OPAMP1, QUADSPI, RCC, RNG, - RTC, SAI1, SDMMC1, SPI1, SPI2, SPI3, SYSCFG, TIM1, TIM15, TIM16, TIM2, TIM3, TIM6, TSC, UART4, - USART1, USART2, USART3, WWDG -); -pub const GPIO_BASE: usize = 0x48000000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC1 = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - CRS = 82, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 84, - I2C4_EV = 83, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM6_DAC = 54, - TSC = 77, - UART4 = 52, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(CRS); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM6_DAC); - declare!(TSC); - declare!(UART4); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn CRS(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM6_DAC(); - fn TSC(); - fn UART4(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 85] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _reserved: 0 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC1 }, - Vector { _reserved: 0 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM6_DAC }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { _reserved: 0 }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: CRS }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_rng!(0x50060800); diff --git a/embassy-stm32/src/chip/stm32l452cc.rs b/embassy-stm32/src/chip/stm32l452cc.rs deleted file mode 100644 index 8e24b096..00000000 --- a/embassy-stm32/src/chip/stm32l452cc.rs +++ /dev/null @@ -1,478 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, CAN1, COMP1, COMP2, DAC1, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, - PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, - PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, - PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, - PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, - PE13, PE14, PE15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, - PH14, PH15, I2C1, I2C2, I2C3, I2C4, IWDG, LPTIM1, LPTIM2, LPUART1, OPAMP1, QUADSPI, RCC, RNG, - RTC, SAI1, SPI1, SPI2, SPI3, SYSCFG, TIM1, TIM15, TIM16, TIM2, TIM3, TIM6, TSC, UART4, USART1, - USART2, USART3, USB, WWDG -); -pub const GPIO_BASE: usize = 0x48000000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC1 = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - CRS = 82, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 84, - I2C4_EV = 83, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM6_DAC = 54, - TSC = 77, - UART4 = 52, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USB = 67, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(CRS); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM6_DAC); - declare!(TSC); - declare!(UART4); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USB); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn CRS(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM6_DAC(); - fn TSC(); - fn UART4(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USB(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 85] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _reserved: 0 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC1 }, - Vector { _reserved: 0 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM6_DAC }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { _reserved: 0 }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: USB }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: CRS }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_rng!(0x50060800); diff --git a/embassy-stm32/src/chip/stm32l452ce.rs b/embassy-stm32/src/chip/stm32l452ce.rs deleted file mode 100644 index 8e24b096..00000000 --- a/embassy-stm32/src/chip/stm32l452ce.rs +++ /dev/null @@ -1,478 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, CAN1, COMP1, COMP2, DAC1, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, - PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, - PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, - PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, - PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, - PE13, PE14, PE15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, - PH14, PH15, I2C1, I2C2, I2C3, I2C4, IWDG, LPTIM1, LPTIM2, LPUART1, OPAMP1, QUADSPI, RCC, RNG, - RTC, SAI1, SPI1, SPI2, SPI3, SYSCFG, TIM1, TIM15, TIM16, TIM2, TIM3, TIM6, TSC, UART4, USART1, - USART2, USART3, USB, WWDG -); -pub const GPIO_BASE: usize = 0x48000000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC1 = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - CRS = 82, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 84, - I2C4_EV = 83, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM6_DAC = 54, - TSC = 77, - UART4 = 52, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USB = 67, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(CRS); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM6_DAC); - declare!(TSC); - declare!(UART4); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USB); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn CRS(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM6_DAC(); - fn TSC(); - fn UART4(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USB(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 85] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _reserved: 0 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC1 }, - Vector { _reserved: 0 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM6_DAC }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { _reserved: 0 }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: USB }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: CRS }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_rng!(0x50060800); diff --git a/embassy-stm32/src/chip/stm32l452rc.rs b/embassy-stm32/src/chip/stm32l452rc.rs deleted file mode 100644 index d5387b34..00000000 --- a/embassy-stm32/src/chip/stm32l452rc.rs +++ /dev/null @@ -1,478 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, CAN1, COMP1, COMP2, DAC1, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, - PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, - PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, - PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, - PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, - PE13, PE14, PE15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, - PH14, PH15, I2C1, I2C2, I2C3, I2C4, IWDG, LPTIM1, LPTIM2, LPUART1, OPAMP1, QUADSPI, RCC, RNG, - RTC, SAI1, SDMMC1, SPI1, SPI2, SPI3, SYSCFG, TIM1, TIM15, TIM16, TIM2, TIM3, TIM6, TSC, UART4, - USART1, USART2, USART3, USB, WWDG -); -pub const GPIO_BASE: usize = 0x48000000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC1 = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - CRS = 82, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 84, - I2C4_EV = 83, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM6_DAC = 54, - TSC = 77, - UART4 = 52, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USB = 67, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(CRS); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM6_DAC); - declare!(TSC); - declare!(UART4); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USB); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn CRS(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM6_DAC(); - fn TSC(); - fn UART4(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USB(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 85] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _reserved: 0 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC1 }, - Vector { _reserved: 0 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM6_DAC }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { _reserved: 0 }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: USB }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: CRS }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_rng!(0x50060800); diff --git a/embassy-stm32/src/chip/stm32l452re.rs b/embassy-stm32/src/chip/stm32l452re.rs deleted file mode 100644 index d5387b34..00000000 --- a/embassy-stm32/src/chip/stm32l452re.rs +++ /dev/null @@ -1,478 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, CAN1, COMP1, COMP2, DAC1, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, - PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, - PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, - PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, - PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, - PE13, PE14, PE15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, - PH14, PH15, I2C1, I2C2, I2C3, I2C4, IWDG, LPTIM1, LPTIM2, LPUART1, OPAMP1, QUADSPI, RCC, RNG, - RTC, SAI1, SDMMC1, SPI1, SPI2, SPI3, SYSCFG, TIM1, TIM15, TIM16, TIM2, TIM3, TIM6, TSC, UART4, - USART1, USART2, USART3, USB, WWDG -); -pub const GPIO_BASE: usize = 0x48000000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC1 = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - CRS = 82, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 84, - I2C4_EV = 83, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM6_DAC = 54, - TSC = 77, - UART4 = 52, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USB = 67, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(CRS); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM6_DAC); - declare!(TSC); - declare!(UART4); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USB); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn CRS(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM6_DAC(); - fn TSC(); - fn UART4(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USB(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 85] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _reserved: 0 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC1 }, - Vector { _reserved: 0 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM6_DAC }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { _reserved: 0 }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: USB }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: CRS }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_rng!(0x50060800); diff --git a/embassy-stm32/src/chip/stm32l452vc.rs b/embassy-stm32/src/chip/stm32l452vc.rs deleted file mode 100644 index d5387b34..00000000 --- a/embassy-stm32/src/chip/stm32l452vc.rs +++ /dev/null @@ -1,478 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, CAN1, COMP1, COMP2, DAC1, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, - PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, - PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, - PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, - PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, - PE13, PE14, PE15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, - PH14, PH15, I2C1, I2C2, I2C3, I2C4, IWDG, LPTIM1, LPTIM2, LPUART1, OPAMP1, QUADSPI, RCC, RNG, - RTC, SAI1, SDMMC1, SPI1, SPI2, SPI3, SYSCFG, TIM1, TIM15, TIM16, TIM2, TIM3, TIM6, TSC, UART4, - USART1, USART2, USART3, USB, WWDG -); -pub const GPIO_BASE: usize = 0x48000000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC1 = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - CRS = 82, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 84, - I2C4_EV = 83, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM6_DAC = 54, - TSC = 77, - UART4 = 52, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USB = 67, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(CRS); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM6_DAC); - declare!(TSC); - declare!(UART4); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USB); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn CRS(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM6_DAC(); - fn TSC(); - fn UART4(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USB(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 85] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _reserved: 0 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC1 }, - Vector { _reserved: 0 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM6_DAC }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { _reserved: 0 }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: USB }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: CRS }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_rng!(0x50060800); diff --git a/embassy-stm32/src/chip/stm32l452ve.rs b/embassy-stm32/src/chip/stm32l452ve.rs deleted file mode 100644 index d5387b34..00000000 --- a/embassy-stm32/src/chip/stm32l452ve.rs +++ /dev/null @@ -1,478 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, CAN1, COMP1, COMP2, DAC1, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, - PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, - PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, - PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, - PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, - PE13, PE14, PE15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, - PH14, PH15, I2C1, I2C2, I2C3, I2C4, IWDG, LPTIM1, LPTIM2, LPUART1, OPAMP1, QUADSPI, RCC, RNG, - RTC, SAI1, SDMMC1, SPI1, SPI2, SPI3, SYSCFG, TIM1, TIM15, TIM16, TIM2, TIM3, TIM6, TSC, UART4, - USART1, USART2, USART3, USB, WWDG -); -pub const GPIO_BASE: usize = 0x48000000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC1 = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - CRS = 82, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 84, - I2C4_EV = 83, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM6_DAC = 54, - TSC = 77, - UART4 = 52, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USB = 67, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(CRS); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM6_DAC); - declare!(TSC); - declare!(UART4); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USB); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn CRS(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM6_DAC(); - fn TSC(); - fn UART4(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USB(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 85] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _reserved: 0 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC1 }, - Vector { _reserved: 0 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM6_DAC }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { _reserved: 0 }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: USB }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: CRS }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_rng!(0x50060800); diff --git a/embassy-stm32/src/chip/stm32l462ce.rs b/embassy-stm32/src/chip/stm32l462ce.rs deleted file mode 100644 index 98710177..00000000 --- a/embassy-stm32/src/chip/stm32l462ce.rs +++ /dev/null @@ -1,481 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, AES, CAN1, COMP1, COMP2, DAC1, PA0, PA1, PA2, PA3, PA4, PA5, PA6, - PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, - PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, - PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, - PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, - PE12, PE13, PE14, PE15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, - PH13, PH14, PH15, I2C1, I2C2, I2C3, I2C4, IWDG, LPTIM1, LPTIM2, LPUART1, OPAMP1, QUADSPI, RCC, - RNG, RTC, SAI1, SPI1, SPI2, SPI3, SYSCFG, TIM1, TIM15, TIM16, TIM2, TIM3, TIM6, TSC, UART4, - USART1, USART2, USART3, USB, WWDG -); -pub const GPIO_BASE: usize = 0x48000000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC1 = 18, - AES = 79, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - CRS = 82, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 84, - I2C4_EV = 83, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM6_DAC = 54, - TSC = 77, - UART4 = 52, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USB = 67, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1); - declare!(AES); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(CRS); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM6_DAC); - declare!(TSC); - declare!(UART4); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USB); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1(); - fn AES(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn CRS(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM6_DAC(); - fn TSC(); - fn UART4(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USB(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 85] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _reserved: 0 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC1 }, - Vector { _reserved: 0 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM6_DAC }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { _reserved: 0 }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: USB }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _handler: AES }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: CRS }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_rng!(0x50060800); diff --git a/embassy-stm32/src/chip/stm32l462re.rs b/embassy-stm32/src/chip/stm32l462re.rs deleted file mode 100644 index fbf4b119..00000000 --- a/embassy-stm32/src/chip/stm32l462re.rs +++ /dev/null @@ -1,481 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, AES, CAN1, COMP1, COMP2, DAC1, PA0, PA1, PA2, PA3, PA4, PA5, PA6, - PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, - PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, - PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, - PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, - PE12, PE13, PE14, PE15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, - PH13, PH14, PH15, I2C1, I2C2, I2C3, I2C4, IWDG, LPTIM1, LPTIM2, LPUART1, OPAMP1, QUADSPI, RCC, - RNG, RTC, SAI1, SDMMC1, SPI1, SPI2, SPI3, SYSCFG, TIM1, TIM15, TIM16, TIM2, TIM3, TIM6, TSC, - UART4, USART1, USART2, USART3, USB, WWDG -); -pub const GPIO_BASE: usize = 0x48000000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC1 = 18, - AES = 79, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - CRS = 82, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 84, - I2C4_EV = 83, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM6_DAC = 54, - TSC = 77, - UART4 = 52, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USB = 67, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1); - declare!(AES); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(CRS); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM6_DAC); - declare!(TSC); - declare!(UART4); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USB); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1(); - fn AES(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn CRS(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM6_DAC(); - fn TSC(); - fn UART4(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USB(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 85] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _reserved: 0 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC1 }, - Vector { _reserved: 0 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM6_DAC }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { _reserved: 0 }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: USB }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _handler: AES }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: CRS }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_rng!(0x50060800); diff --git a/embassy-stm32/src/chip/stm32l462ve.rs b/embassy-stm32/src/chip/stm32l462ve.rs deleted file mode 100644 index fbf4b119..00000000 --- a/embassy-stm32/src/chip/stm32l462ve.rs +++ /dev/null @@ -1,481 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, AES, CAN1, COMP1, COMP2, DAC1, PA0, PA1, PA2, PA3, PA4, PA5, PA6, - PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, - PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, - PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, - PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, - PE12, PE13, PE14, PE15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, - PH13, PH14, PH15, I2C1, I2C2, I2C3, I2C4, IWDG, LPTIM1, LPTIM2, LPUART1, OPAMP1, QUADSPI, RCC, - RNG, RTC, SAI1, SDMMC1, SPI1, SPI2, SPI3, SYSCFG, TIM1, TIM15, TIM16, TIM2, TIM3, TIM6, TSC, - UART4, USART1, USART2, USART3, USB, WWDG -); -pub const GPIO_BASE: usize = 0x48000000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC1 = 18, - AES = 79, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - CRS = 82, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 84, - I2C4_EV = 83, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM6_DAC = 54, - TSC = 77, - UART4 = 52, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USB = 67, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1); - declare!(AES); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(CRS); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM6_DAC); - declare!(TSC); - declare!(UART4); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USB); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1(); - fn AES(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn CRS(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM6_DAC(); - fn TSC(); - fn UART4(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USB(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 85] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _reserved: 0 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC1 }, - Vector { _reserved: 0 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM6_DAC }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { _reserved: 0 }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: USB }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _handler: AES }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: CRS }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_rng!(0x50060800); diff --git a/embassy-stm32/src/chip/stm32l471qe.rs b/embassy-stm32/src/chip/stm32l471qe.rs deleted file mode 100644 index c2ed491d..00000000 --- a/embassy-stm32/src/chip/stm32l471qe.rs +++ /dev/null @@ -1,545 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, ADC3, CAN1, COMP1, COMP2, DAC1, PA0, PA1, PA2, PA3, PA4, - PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, - PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, - PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, - PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, - PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, - PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, - PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, - PH14, PH15, I2C1, I2C2, I2C3, IWDG, LPTIM1, LPTIM2, LPUART1, OPAMP1, OPAMP2, QUADSPI, RCC, RNG, - RTC, SAI1, SAI2, SDMMC1, SPI1, SPI2, SPI3, SWPMI1, SYSCFG, TIM1, TIM15, TIM16, TIM17, TIM2, - TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, TSC, UART4, UART5, USART1, USART2, USART3, WWDG -); -pub const GPIO_BASE: usize = 0x48000000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC1_2 = 18, - ADC3 = 47, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DFSDM1_FLT2 = 63, - DFSDM1_FLT3 = 42, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SWPMI1 = 76, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_2); - declare!(ADC3); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DFSDM1_FLT2); - declare!(DFSDM1_FLT3); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_2(); - fn ADC3(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DFSDM1_FLT2(); - fn DFSDM1_FLT3(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 82] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1_2 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: DFSDM1_FLT3, - }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _handler: ADC3 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { - _handler: DFSDM1_FLT2, - }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_rng!(0x50060800); diff --git a/embassy-stm32/src/chip/stm32l471qg.rs b/embassy-stm32/src/chip/stm32l471qg.rs deleted file mode 100644 index c2ed491d..00000000 --- a/embassy-stm32/src/chip/stm32l471qg.rs +++ /dev/null @@ -1,545 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, ADC3, CAN1, COMP1, COMP2, DAC1, PA0, PA1, PA2, PA3, PA4, - PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, - PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, - PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, - PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, - PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, - PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, - PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, - PH14, PH15, I2C1, I2C2, I2C3, IWDG, LPTIM1, LPTIM2, LPUART1, OPAMP1, OPAMP2, QUADSPI, RCC, RNG, - RTC, SAI1, SAI2, SDMMC1, SPI1, SPI2, SPI3, SWPMI1, SYSCFG, TIM1, TIM15, TIM16, TIM17, TIM2, - TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, TSC, UART4, UART5, USART1, USART2, USART3, WWDG -); -pub const GPIO_BASE: usize = 0x48000000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC1_2 = 18, - ADC3 = 47, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DFSDM1_FLT2 = 63, - DFSDM1_FLT3 = 42, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SWPMI1 = 76, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_2); - declare!(ADC3); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DFSDM1_FLT2); - declare!(DFSDM1_FLT3); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_2(); - fn ADC3(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DFSDM1_FLT2(); - fn DFSDM1_FLT3(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 82] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1_2 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: DFSDM1_FLT3, - }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _handler: ADC3 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { - _handler: DFSDM1_FLT2, - }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_rng!(0x50060800); diff --git a/embassy-stm32/src/chip/stm32l471re.rs b/embassy-stm32/src/chip/stm32l471re.rs deleted file mode 100644 index c2ed491d..00000000 --- a/embassy-stm32/src/chip/stm32l471re.rs +++ /dev/null @@ -1,545 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, ADC3, CAN1, COMP1, COMP2, DAC1, PA0, PA1, PA2, PA3, PA4, - PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, - PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, - PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, - PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, - PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, - PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, - PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, - PH14, PH15, I2C1, I2C2, I2C3, IWDG, LPTIM1, LPTIM2, LPUART1, OPAMP1, OPAMP2, QUADSPI, RCC, RNG, - RTC, SAI1, SAI2, SDMMC1, SPI1, SPI2, SPI3, SWPMI1, SYSCFG, TIM1, TIM15, TIM16, TIM17, TIM2, - TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, TSC, UART4, UART5, USART1, USART2, USART3, WWDG -); -pub const GPIO_BASE: usize = 0x48000000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC1_2 = 18, - ADC3 = 47, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DFSDM1_FLT2 = 63, - DFSDM1_FLT3 = 42, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SWPMI1 = 76, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_2); - declare!(ADC3); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DFSDM1_FLT2); - declare!(DFSDM1_FLT3); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_2(); - fn ADC3(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DFSDM1_FLT2(); - fn DFSDM1_FLT3(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 82] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1_2 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: DFSDM1_FLT3, - }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _handler: ADC3 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { - _handler: DFSDM1_FLT2, - }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_rng!(0x50060800); diff --git a/embassy-stm32/src/chip/stm32l471rg.rs b/embassy-stm32/src/chip/stm32l471rg.rs deleted file mode 100644 index c2ed491d..00000000 --- a/embassy-stm32/src/chip/stm32l471rg.rs +++ /dev/null @@ -1,545 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, ADC3, CAN1, COMP1, COMP2, DAC1, PA0, PA1, PA2, PA3, PA4, - PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, - PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, - PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, - PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, - PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, - PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, - PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, - PH14, PH15, I2C1, I2C2, I2C3, IWDG, LPTIM1, LPTIM2, LPUART1, OPAMP1, OPAMP2, QUADSPI, RCC, RNG, - RTC, SAI1, SAI2, SDMMC1, SPI1, SPI2, SPI3, SWPMI1, SYSCFG, TIM1, TIM15, TIM16, TIM17, TIM2, - TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, TSC, UART4, UART5, USART1, USART2, USART3, WWDG -); -pub const GPIO_BASE: usize = 0x48000000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC1_2 = 18, - ADC3 = 47, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DFSDM1_FLT2 = 63, - DFSDM1_FLT3 = 42, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SWPMI1 = 76, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_2); - declare!(ADC3); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DFSDM1_FLT2); - declare!(DFSDM1_FLT3); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_2(); - fn ADC3(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DFSDM1_FLT2(); - fn DFSDM1_FLT3(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 82] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1_2 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: DFSDM1_FLT3, - }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _handler: ADC3 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { - _handler: DFSDM1_FLT2, - }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_rng!(0x50060800); diff --git a/embassy-stm32/src/chip/stm32l471ve.rs b/embassy-stm32/src/chip/stm32l471ve.rs deleted file mode 100644 index c2ed491d..00000000 --- a/embassy-stm32/src/chip/stm32l471ve.rs +++ /dev/null @@ -1,545 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, ADC3, CAN1, COMP1, COMP2, DAC1, PA0, PA1, PA2, PA3, PA4, - PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, - PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, - PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, - PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, - PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, - PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, - PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, - PH14, PH15, I2C1, I2C2, I2C3, IWDG, LPTIM1, LPTIM2, LPUART1, OPAMP1, OPAMP2, QUADSPI, RCC, RNG, - RTC, SAI1, SAI2, SDMMC1, SPI1, SPI2, SPI3, SWPMI1, SYSCFG, TIM1, TIM15, TIM16, TIM17, TIM2, - TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, TSC, UART4, UART5, USART1, USART2, USART3, WWDG -); -pub const GPIO_BASE: usize = 0x48000000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC1_2 = 18, - ADC3 = 47, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DFSDM1_FLT2 = 63, - DFSDM1_FLT3 = 42, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SWPMI1 = 76, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_2); - declare!(ADC3); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DFSDM1_FLT2); - declare!(DFSDM1_FLT3); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_2(); - fn ADC3(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DFSDM1_FLT2(); - fn DFSDM1_FLT3(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 82] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1_2 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: DFSDM1_FLT3, - }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _handler: ADC3 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { - _handler: DFSDM1_FLT2, - }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_rng!(0x50060800); diff --git a/embassy-stm32/src/chip/stm32l471vg.rs b/embassy-stm32/src/chip/stm32l471vg.rs deleted file mode 100644 index c2ed491d..00000000 --- a/embassy-stm32/src/chip/stm32l471vg.rs +++ /dev/null @@ -1,545 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, ADC3, CAN1, COMP1, COMP2, DAC1, PA0, PA1, PA2, PA3, PA4, - PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, - PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, - PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, - PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, - PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, - PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, - PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, - PH14, PH15, I2C1, I2C2, I2C3, IWDG, LPTIM1, LPTIM2, LPUART1, OPAMP1, OPAMP2, QUADSPI, RCC, RNG, - RTC, SAI1, SAI2, SDMMC1, SPI1, SPI2, SPI3, SWPMI1, SYSCFG, TIM1, TIM15, TIM16, TIM17, TIM2, - TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, TSC, UART4, UART5, USART1, USART2, USART3, WWDG -); -pub const GPIO_BASE: usize = 0x48000000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC1_2 = 18, - ADC3 = 47, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DFSDM1_FLT2 = 63, - DFSDM1_FLT3 = 42, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SWPMI1 = 76, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_2); - declare!(ADC3); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DFSDM1_FLT2); - declare!(DFSDM1_FLT3); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_2(); - fn ADC3(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DFSDM1_FLT2(); - fn DFSDM1_FLT3(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 82] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1_2 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: DFSDM1_FLT3, - }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _handler: ADC3 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { - _handler: DFSDM1_FLT2, - }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_rng!(0x50060800); diff --git a/embassy-stm32/src/chip/stm32l471ze.rs b/embassy-stm32/src/chip/stm32l471ze.rs deleted file mode 100644 index c2ed491d..00000000 --- a/embassy-stm32/src/chip/stm32l471ze.rs +++ /dev/null @@ -1,545 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, ADC3, CAN1, COMP1, COMP2, DAC1, PA0, PA1, PA2, PA3, PA4, - PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, - PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, - PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, - PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, - PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, - PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, - PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, - PH14, PH15, I2C1, I2C2, I2C3, IWDG, LPTIM1, LPTIM2, LPUART1, OPAMP1, OPAMP2, QUADSPI, RCC, RNG, - RTC, SAI1, SAI2, SDMMC1, SPI1, SPI2, SPI3, SWPMI1, SYSCFG, TIM1, TIM15, TIM16, TIM17, TIM2, - TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, TSC, UART4, UART5, USART1, USART2, USART3, WWDG -); -pub const GPIO_BASE: usize = 0x48000000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC1_2 = 18, - ADC3 = 47, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DFSDM1_FLT2 = 63, - DFSDM1_FLT3 = 42, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SWPMI1 = 76, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_2); - declare!(ADC3); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DFSDM1_FLT2); - declare!(DFSDM1_FLT3); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_2(); - fn ADC3(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DFSDM1_FLT2(); - fn DFSDM1_FLT3(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 82] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1_2 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: DFSDM1_FLT3, - }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _handler: ADC3 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { - _handler: DFSDM1_FLT2, - }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_rng!(0x50060800); diff --git a/embassy-stm32/src/chip/stm32l471zg.rs b/embassy-stm32/src/chip/stm32l471zg.rs deleted file mode 100644 index c2ed491d..00000000 --- a/embassy-stm32/src/chip/stm32l471zg.rs +++ /dev/null @@ -1,545 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, ADC3, CAN1, COMP1, COMP2, DAC1, PA0, PA1, PA2, PA3, PA4, - PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, - PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, - PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, - PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, - PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, - PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, - PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, - PH14, PH15, I2C1, I2C2, I2C3, IWDG, LPTIM1, LPTIM2, LPUART1, OPAMP1, OPAMP2, QUADSPI, RCC, RNG, - RTC, SAI1, SAI2, SDMMC1, SPI1, SPI2, SPI3, SWPMI1, SYSCFG, TIM1, TIM15, TIM16, TIM17, TIM2, - TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, TSC, UART4, UART5, USART1, USART2, USART3, WWDG -); -pub const GPIO_BASE: usize = 0x48000000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC1_2 = 18, - ADC3 = 47, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DFSDM1_FLT2 = 63, - DFSDM1_FLT3 = 42, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SWPMI1 = 76, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_2); - declare!(ADC3); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DFSDM1_FLT2); - declare!(DFSDM1_FLT3); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_2(); - fn ADC3(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DFSDM1_FLT2(); - fn DFSDM1_FLT3(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 82] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1_2 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: DFSDM1_FLT3, - }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _handler: ADC3 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { - _handler: DFSDM1_FLT2, - }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_rng!(0x50060800); diff --git a/embassy-stm32/src/chip/stm32l475rc.rs b/embassy-stm32/src/chip/stm32l475rc.rs deleted file mode 100644 index 8c33d13d..00000000 --- a/embassy-stm32/src/chip/stm32l475rc.rs +++ /dev/null @@ -1,549 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, ADC3, CAN1, COMP1, COMP2, DAC1, PA0, PA1, PA2, PA3, PA4, - PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, - PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, - PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, - PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, - PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, - PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, - PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, - PH14, PH15, I2C1, I2C2, I2C3, IWDG, LPTIM1, LPTIM2, LPUART1, OPAMP1, OPAMP2, QUADSPI, RCC, RNG, - RTC, SAI1, SAI2, SDMMC1, SPI1, SPI2, SPI3, SWPMI1, SYSCFG, TIM1, TIM15, TIM16, TIM17, TIM2, - TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, TSC, UART4, UART5, USART1, USART2, USART3, USB_OTG_FS, - WWDG -); -pub const GPIO_BASE: usize = 0x48000000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC1_2 = 18, - ADC3 = 47, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DFSDM1_FLT2 = 63, - DFSDM1_FLT3 = 42, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - OTG_FS = 67, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SWPMI1 = 76, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_2); - declare!(ADC3); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DFSDM1_FLT2); - declare!(DFSDM1_FLT3); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(OTG_FS); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_2(); - fn ADC3(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DFSDM1_FLT2(); - fn DFSDM1_FLT3(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn OTG_FS(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 82] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1_2 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: DFSDM1_FLT3, - }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _handler: ADC3 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { - _handler: DFSDM1_FLT2, - }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_rng!(0x50060800); diff --git a/embassy-stm32/src/chip/stm32l475re.rs b/embassy-stm32/src/chip/stm32l475re.rs deleted file mode 100644 index 8c33d13d..00000000 --- a/embassy-stm32/src/chip/stm32l475re.rs +++ /dev/null @@ -1,549 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, ADC3, CAN1, COMP1, COMP2, DAC1, PA0, PA1, PA2, PA3, PA4, - PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, - PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, - PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, - PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, - PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, - PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, - PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, - PH14, PH15, I2C1, I2C2, I2C3, IWDG, LPTIM1, LPTIM2, LPUART1, OPAMP1, OPAMP2, QUADSPI, RCC, RNG, - RTC, SAI1, SAI2, SDMMC1, SPI1, SPI2, SPI3, SWPMI1, SYSCFG, TIM1, TIM15, TIM16, TIM17, TIM2, - TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, TSC, UART4, UART5, USART1, USART2, USART3, USB_OTG_FS, - WWDG -); -pub const GPIO_BASE: usize = 0x48000000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC1_2 = 18, - ADC3 = 47, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DFSDM1_FLT2 = 63, - DFSDM1_FLT3 = 42, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - OTG_FS = 67, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SWPMI1 = 76, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_2); - declare!(ADC3); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DFSDM1_FLT2); - declare!(DFSDM1_FLT3); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(OTG_FS); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_2(); - fn ADC3(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DFSDM1_FLT2(); - fn DFSDM1_FLT3(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn OTG_FS(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 82] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1_2 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: DFSDM1_FLT3, - }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _handler: ADC3 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { - _handler: DFSDM1_FLT2, - }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_rng!(0x50060800); diff --git a/embassy-stm32/src/chip/stm32l475rg.rs b/embassy-stm32/src/chip/stm32l475rg.rs deleted file mode 100644 index 8c33d13d..00000000 --- a/embassy-stm32/src/chip/stm32l475rg.rs +++ /dev/null @@ -1,549 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, ADC3, CAN1, COMP1, COMP2, DAC1, PA0, PA1, PA2, PA3, PA4, - PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, - PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, - PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, - PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, - PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, - PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, - PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, - PH14, PH15, I2C1, I2C2, I2C3, IWDG, LPTIM1, LPTIM2, LPUART1, OPAMP1, OPAMP2, QUADSPI, RCC, RNG, - RTC, SAI1, SAI2, SDMMC1, SPI1, SPI2, SPI3, SWPMI1, SYSCFG, TIM1, TIM15, TIM16, TIM17, TIM2, - TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, TSC, UART4, UART5, USART1, USART2, USART3, USB_OTG_FS, - WWDG -); -pub const GPIO_BASE: usize = 0x48000000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC1_2 = 18, - ADC3 = 47, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DFSDM1_FLT2 = 63, - DFSDM1_FLT3 = 42, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - OTG_FS = 67, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SWPMI1 = 76, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_2); - declare!(ADC3); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DFSDM1_FLT2); - declare!(DFSDM1_FLT3); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(OTG_FS); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_2(); - fn ADC3(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DFSDM1_FLT2(); - fn DFSDM1_FLT3(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn OTG_FS(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 82] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1_2 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: DFSDM1_FLT3, - }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _handler: ADC3 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { - _handler: DFSDM1_FLT2, - }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_rng!(0x50060800); diff --git a/embassy-stm32/src/chip/stm32l475vc.rs b/embassy-stm32/src/chip/stm32l475vc.rs deleted file mode 100644 index 8c33d13d..00000000 --- a/embassy-stm32/src/chip/stm32l475vc.rs +++ /dev/null @@ -1,549 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, ADC3, CAN1, COMP1, COMP2, DAC1, PA0, PA1, PA2, PA3, PA4, - PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, - PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, - PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, - PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, - PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, - PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, - PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, - PH14, PH15, I2C1, I2C2, I2C3, IWDG, LPTIM1, LPTIM2, LPUART1, OPAMP1, OPAMP2, QUADSPI, RCC, RNG, - RTC, SAI1, SAI2, SDMMC1, SPI1, SPI2, SPI3, SWPMI1, SYSCFG, TIM1, TIM15, TIM16, TIM17, TIM2, - TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, TSC, UART4, UART5, USART1, USART2, USART3, USB_OTG_FS, - WWDG -); -pub const GPIO_BASE: usize = 0x48000000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC1_2 = 18, - ADC3 = 47, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DFSDM1_FLT2 = 63, - DFSDM1_FLT3 = 42, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - OTG_FS = 67, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SWPMI1 = 76, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_2); - declare!(ADC3); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DFSDM1_FLT2); - declare!(DFSDM1_FLT3); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(OTG_FS); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_2(); - fn ADC3(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DFSDM1_FLT2(); - fn DFSDM1_FLT3(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn OTG_FS(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 82] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1_2 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: DFSDM1_FLT3, - }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _handler: ADC3 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { - _handler: DFSDM1_FLT2, - }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_rng!(0x50060800); diff --git a/embassy-stm32/src/chip/stm32l475ve.rs b/embassy-stm32/src/chip/stm32l475ve.rs deleted file mode 100644 index 8c33d13d..00000000 --- a/embassy-stm32/src/chip/stm32l475ve.rs +++ /dev/null @@ -1,549 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, ADC3, CAN1, COMP1, COMP2, DAC1, PA0, PA1, PA2, PA3, PA4, - PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, - PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, - PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, - PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, - PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, - PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, - PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, - PH14, PH15, I2C1, I2C2, I2C3, IWDG, LPTIM1, LPTIM2, LPUART1, OPAMP1, OPAMP2, QUADSPI, RCC, RNG, - RTC, SAI1, SAI2, SDMMC1, SPI1, SPI2, SPI3, SWPMI1, SYSCFG, TIM1, TIM15, TIM16, TIM17, TIM2, - TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, TSC, UART4, UART5, USART1, USART2, USART3, USB_OTG_FS, - WWDG -); -pub const GPIO_BASE: usize = 0x48000000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC1_2 = 18, - ADC3 = 47, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DFSDM1_FLT2 = 63, - DFSDM1_FLT3 = 42, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - OTG_FS = 67, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SWPMI1 = 76, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_2); - declare!(ADC3); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DFSDM1_FLT2); - declare!(DFSDM1_FLT3); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(OTG_FS); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_2(); - fn ADC3(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DFSDM1_FLT2(); - fn DFSDM1_FLT3(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn OTG_FS(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 82] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1_2 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: DFSDM1_FLT3, - }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _handler: ADC3 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { - _handler: DFSDM1_FLT2, - }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_rng!(0x50060800); diff --git a/embassy-stm32/src/chip/stm32l475vg.rs b/embassy-stm32/src/chip/stm32l475vg.rs deleted file mode 100644 index 8c33d13d..00000000 --- a/embassy-stm32/src/chip/stm32l475vg.rs +++ /dev/null @@ -1,549 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, ADC3, CAN1, COMP1, COMP2, DAC1, PA0, PA1, PA2, PA3, PA4, - PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, - PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, - PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, - PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, - PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, - PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, - PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, - PH14, PH15, I2C1, I2C2, I2C3, IWDG, LPTIM1, LPTIM2, LPUART1, OPAMP1, OPAMP2, QUADSPI, RCC, RNG, - RTC, SAI1, SAI2, SDMMC1, SPI1, SPI2, SPI3, SWPMI1, SYSCFG, TIM1, TIM15, TIM16, TIM17, TIM2, - TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, TSC, UART4, UART5, USART1, USART2, USART3, USB_OTG_FS, - WWDG -); -pub const GPIO_BASE: usize = 0x48000000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC1_2 = 18, - ADC3 = 47, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DFSDM1_FLT2 = 63, - DFSDM1_FLT3 = 42, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - OTG_FS = 67, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SWPMI1 = 76, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_2); - declare!(ADC3); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DFSDM1_FLT2); - declare!(DFSDM1_FLT3); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(OTG_FS); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_2(); - fn ADC3(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DFSDM1_FLT2(); - fn DFSDM1_FLT3(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn OTG_FS(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 82] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1_2 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: DFSDM1_FLT3, - }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _handler: ADC3 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { - _handler: DFSDM1_FLT2, - }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_rng!(0x50060800); diff --git a/embassy-stm32/src/chip/stm32l476je.rs b/embassy-stm32/src/chip/stm32l476je.rs deleted file mode 100644 index 8e468038..00000000 --- a/embassy-stm32/src/chip/stm32l476je.rs +++ /dev/null @@ -1,552 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, ADC3, CAN1, COMP1, COMP2, DAC1, PA0, PA1, PA2, PA3, PA4, - PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, - PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, - PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, - PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, - PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, - PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, - PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, - PH14, PH15, I2C1, I2C2, I2C3, IWDG, LCD, LPTIM1, LPTIM2, LPUART1, OPAMP1, OPAMP2, QUADSPI, RCC, - RNG, RTC, SAI1, SAI2, SDMMC1, SPI1, SPI2, SPI3, SWPMI1, SYSCFG, TIM1, TIM15, TIM16, TIM17, - TIM2, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, TSC, UART4, UART5, USART1, USART2, USART3, - USB_OTG_FS, WWDG -); -pub const GPIO_BASE: usize = 0x48000000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC1_2 = 18, - ADC3 = 47, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DFSDM1_FLT2 = 63, - DFSDM1_FLT3 = 42, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LCD = 78, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - OTG_FS = 67, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SWPMI1 = 76, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_2); - declare!(ADC3); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DFSDM1_FLT2); - declare!(DFSDM1_FLT3); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LCD); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(OTG_FS); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_2(); - fn ADC3(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DFSDM1_FLT2(); - fn DFSDM1_FLT3(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LCD(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn OTG_FS(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 82] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1_2 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: DFSDM1_FLT3, - }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _handler: ADC3 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { - _handler: DFSDM1_FLT2, - }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TSC }, - Vector { _handler: LCD }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_rng!(0x50060800); diff --git a/embassy-stm32/src/chip/stm32l476jg.rs b/embassy-stm32/src/chip/stm32l476jg.rs deleted file mode 100644 index 8e468038..00000000 --- a/embassy-stm32/src/chip/stm32l476jg.rs +++ /dev/null @@ -1,552 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, ADC3, CAN1, COMP1, COMP2, DAC1, PA0, PA1, PA2, PA3, PA4, - PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, - PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, - PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, - PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, - PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, - PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, - PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, - PH14, PH15, I2C1, I2C2, I2C3, IWDG, LCD, LPTIM1, LPTIM2, LPUART1, OPAMP1, OPAMP2, QUADSPI, RCC, - RNG, RTC, SAI1, SAI2, SDMMC1, SPI1, SPI2, SPI3, SWPMI1, SYSCFG, TIM1, TIM15, TIM16, TIM17, - TIM2, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, TSC, UART4, UART5, USART1, USART2, USART3, - USB_OTG_FS, WWDG -); -pub const GPIO_BASE: usize = 0x48000000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC1_2 = 18, - ADC3 = 47, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DFSDM1_FLT2 = 63, - DFSDM1_FLT3 = 42, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LCD = 78, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - OTG_FS = 67, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SWPMI1 = 76, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_2); - declare!(ADC3); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DFSDM1_FLT2); - declare!(DFSDM1_FLT3); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LCD); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(OTG_FS); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_2(); - fn ADC3(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DFSDM1_FLT2(); - fn DFSDM1_FLT3(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LCD(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn OTG_FS(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 82] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1_2 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: DFSDM1_FLT3, - }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _handler: ADC3 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { - _handler: DFSDM1_FLT2, - }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TSC }, - Vector { _handler: LCD }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_rng!(0x50060800); diff --git a/embassy-stm32/src/chip/stm32l476me.rs b/embassy-stm32/src/chip/stm32l476me.rs deleted file mode 100644 index 8e468038..00000000 --- a/embassy-stm32/src/chip/stm32l476me.rs +++ /dev/null @@ -1,552 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, ADC3, CAN1, COMP1, COMP2, DAC1, PA0, PA1, PA2, PA3, PA4, - PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, - PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, - PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, - PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, - PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, - PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, - PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, - PH14, PH15, I2C1, I2C2, I2C3, IWDG, LCD, LPTIM1, LPTIM2, LPUART1, OPAMP1, OPAMP2, QUADSPI, RCC, - RNG, RTC, SAI1, SAI2, SDMMC1, SPI1, SPI2, SPI3, SWPMI1, SYSCFG, TIM1, TIM15, TIM16, TIM17, - TIM2, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, TSC, UART4, UART5, USART1, USART2, USART3, - USB_OTG_FS, WWDG -); -pub const GPIO_BASE: usize = 0x48000000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC1_2 = 18, - ADC3 = 47, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DFSDM1_FLT2 = 63, - DFSDM1_FLT3 = 42, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LCD = 78, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - OTG_FS = 67, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SWPMI1 = 76, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_2); - declare!(ADC3); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DFSDM1_FLT2); - declare!(DFSDM1_FLT3); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LCD); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(OTG_FS); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_2(); - fn ADC3(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DFSDM1_FLT2(); - fn DFSDM1_FLT3(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LCD(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn OTG_FS(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 82] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1_2 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: DFSDM1_FLT3, - }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _handler: ADC3 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { - _handler: DFSDM1_FLT2, - }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TSC }, - Vector { _handler: LCD }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_rng!(0x50060800); diff --git a/embassy-stm32/src/chip/stm32l476mg.rs b/embassy-stm32/src/chip/stm32l476mg.rs deleted file mode 100644 index 8e468038..00000000 --- a/embassy-stm32/src/chip/stm32l476mg.rs +++ /dev/null @@ -1,552 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, ADC3, CAN1, COMP1, COMP2, DAC1, PA0, PA1, PA2, PA3, PA4, - PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, - PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, - PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, - PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, - PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, - PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, - PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, - PH14, PH15, I2C1, I2C2, I2C3, IWDG, LCD, LPTIM1, LPTIM2, LPUART1, OPAMP1, OPAMP2, QUADSPI, RCC, - RNG, RTC, SAI1, SAI2, SDMMC1, SPI1, SPI2, SPI3, SWPMI1, SYSCFG, TIM1, TIM15, TIM16, TIM17, - TIM2, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, TSC, UART4, UART5, USART1, USART2, USART3, - USB_OTG_FS, WWDG -); -pub const GPIO_BASE: usize = 0x48000000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC1_2 = 18, - ADC3 = 47, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DFSDM1_FLT2 = 63, - DFSDM1_FLT3 = 42, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LCD = 78, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - OTG_FS = 67, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SWPMI1 = 76, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_2); - declare!(ADC3); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DFSDM1_FLT2); - declare!(DFSDM1_FLT3); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LCD); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(OTG_FS); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_2(); - fn ADC3(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DFSDM1_FLT2(); - fn DFSDM1_FLT3(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LCD(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn OTG_FS(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 82] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1_2 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: DFSDM1_FLT3, - }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _handler: ADC3 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { - _handler: DFSDM1_FLT2, - }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TSC }, - Vector { _handler: LCD }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_rng!(0x50060800); diff --git a/embassy-stm32/src/chip/stm32l476qe.rs b/embassy-stm32/src/chip/stm32l476qe.rs deleted file mode 100644 index 8e468038..00000000 --- a/embassy-stm32/src/chip/stm32l476qe.rs +++ /dev/null @@ -1,552 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, ADC3, CAN1, COMP1, COMP2, DAC1, PA0, PA1, PA2, PA3, PA4, - PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, - PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, - PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, - PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, - PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, - PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, - PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, - PH14, PH15, I2C1, I2C2, I2C3, IWDG, LCD, LPTIM1, LPTIM2, LPUART1, OPAMP1, OPAMP2, QUADSPI, RCC, - RNG, RTC, SAI1, SAI2, SDMMC1, SPI1, SPI2, SPI3, SWPMI1, SYSCFG, TIM1, TIM15, TIM16, TIM17, - TIM2, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, TSC, UART4, UART5, USART1, USART2, USART3, - USB_OTG_FS, WWDG -); -pub const GPIO_BASE: usize = 0x48000000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC1_2 = 18, - ADC3 = 47, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DFSDM1_FLT2 = 63, - DFSDM1_FLT3 = 42, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LCD = 78, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - OTG_FS = 67, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SWPMI1 = 76, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_2); - declare!(ADC3); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DFSDM1_FLT2); - declare!(DFSDM1_FLT3); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LCD); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(OTG_FS); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_2(); - fn ADC3(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DFSDM1_FLT2(); - fn DFSDM1_FLT3(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LCD(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn OTG_FS(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 82] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1_2 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: DFSDM1_FLT3, - }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _handler: ADC3 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { - _handler: DFSDM1_FLT2, - }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TSC }, - Vector { _handler: LCD }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_rng!(0x50060800); diff --git a/embassy-stm32/src/chip/stm32l476qg.rs b/embassy-stm32/src/chip/stm32l476qg.rs deleted file mode 100644 index 8e468038..00000000 --- a/embassy-stm32/src/chip/stm32l476qg.rs +++ /dev/null @@ -1,552 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, ADC3, CAN1, COMP1, COMP2, DAC1, PA0, PA1, PA2, PA3, PA4, - PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, - PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, - PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, - PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, - PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, - PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, - PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, - PH14, PH15, I2C1, I2C2, I2C3, IWDG, LCD, LPTIM1, LPTIM2, LPUART1, OPAMP1, OPAMP2, QUADSPI, RCC, - RNG, RTC, SAI1, SAI2, SDMMC1, SPI1, SPI2, SPI3, SWPMI1, SYSCFG, TIM1, TIM15, TIM16, TIM17, - TIM2, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, TSC, UART4, UART5, USART1, USART2, USART3, - USB_OTG_FS, WWDG -); -pub const GPIO_BASE: usize = 0x48000000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC1_2 = 18, - ADC3 = 47, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DFSDM1_FLT2 = 63, - DFSDM1_FLT3 = 42, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LCD = 78, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - OTG_FS = 67, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SWPMI1 = 76, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_2); - declare!(ADC3); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DFSDM1_FLT2); - declare!(DFSDM1_FLT3); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LCD); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(OTG_FS); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_2(); - fn ADC3(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DFSDM1_FLT2(); - fn DFSDM1_FLT3(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LCD(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn OTG_FS(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 82] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1_2 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: DFSDM1_FLT3, - }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _handler: ADC3 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { - _handler: DFSDM1_FLT2, - }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TSC }, - Vector { _handler: LCD }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_rng!(0x50060800); diff --git a/embassy-stm32/src/chip/stm32l476rc.rs b/embassy-stm32/src/chip/stm32l476rc.rs deleted file mode 100644 index 8e468038..00000000 --- a/embassy-stm32/src/chip/stm32l476rc.rs +++ /dev/null @@ -1,552 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, ADC3, CAN1, COMP1, COMP2, DAC1, PA0, PA1, PA2, PA3, PA4, - PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, - PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, - PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, - PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, - PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, - PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, - PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, - PH14, PH15, I2C1, I2C2, I2C3, IWDG, LCD, LPTIM1, LPTIM2, LPUART1, OPAMP1, OPAMP2, QUADSPI, RCC, - RNG, RTC, SAI1, SAI2, SDMMC1, SPI1, SPI2, SPI3, SWPMI1, SYSCFG, TIM1, TIM15, TIM16, TIM17, - TIM2, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, TSC, UART4, UART5, USART1, USART2, USART3, - USB_OTG_FS, WWDG -); -pub const GPIO_BASE: usize = 0x48000000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC1_2 = 18, - ADC3 = 47, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DFSDM1_FLT2 = 63, - DFSDM1_FLT3 = 42, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LCD = 78, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - OTG_FS = 67, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SWPMI1 = 76, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_2); - declare!(ADC3); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DFSDM1_FLT2); - declare!(DFSDM1_FLT3); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LCD); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(OTG_FS); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_2(); - fn ADC3(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DFSDM1_FLT2(); - fn DFSDM1_FLT3(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LCD(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn OTG_FS(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 82] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1_2 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: DFSDM1_FLT3, - }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _handler: ADC3 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { - _handler: DFSDM1_FLT2, - }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TSC }, - Vector { _handler: LCD }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_rng!(0x50060800); diff --git a/embassy-stm32/src/chip/stm32l476re.rs b/embassy-stm32/src/chip/stm32l476re.rs deleted file mode 100644 index 8e468038..00000000 --- a/embassy-stm32/src/chip/stm32l476re.rs +++ /dev/null @@ -1,552 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, ADC3, CAN1, COMP1, COMP2, DAC1, PA0, PA1, PA2, PA3, PA4, - PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, - PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, - PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, - PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, - PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, - PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, - PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, - PH14, PH15, I2C1, I2C2, I2C3, IWDG, LCD, LPTIM1, LPTIM2, LPUART1, OPAMP1, OPAMP2, QUADSPI, RCC, - RNG, RTC, SAI1, SAI2, SDMMC1, SPI1, SPI2, SPI3, SWPMI1, SYSCFG, TIM1, TIM15, TIM16, TIM17, - TIM2, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, TSC, UART4, UART5, USART1, USART2, USART3, - USB_OTG_FS, WWDG -); -pub const GPIO_BASE: usize = 0x48000000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC1_2 = 18, - ADC3 = 47, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DFSDM1_FLT2 = 63, - DFSDM1_FLT3 = 42, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LCD = 78, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - OTG_FS = 67, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SWPMI1 = 76, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_2); - declare!(ADC3); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DFSDM1_FLT2); - declare!(DFSDM1_FLT3); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LCD); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(OTG_FS); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_2(); - fn ADC3(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DFSDM1_FLT2(); - fn DFSDM1_FLT3(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LCD(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn OTG_FS(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 82] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1_2 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: DFSDM1_FLT3, - }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _handler: ADC3 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { - _handler: DFSDM1_FLT2, - }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TSC }, - Vector { _handler: LCD }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_rng!(0x50060800); diff --git a/embassy-stm32/src/chip/stm32l476rg.rs b/embassy-stm32/src/chip/stm32l476rg.rs deleted file mode 100644 index 8e468038..00000000 --- a/embassy-stm32/src/chip/stm32l476rg.rs +++ /dev/null @@ -1,552 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, ADC3, CAN1, COMP1, COMP2, DAC1, PA0, PA1, PA2, PA3, PA4, - PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, - PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, - PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, - PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, - PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, - PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, - PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, - PH14, PH15, I2C1, I2C2, I2C3, IWDG, LCD, LPTIM1, LPTIM2, LPUART1, OPAMP1, OPAMP2, QUADSPI, RCC, - RNG, RTC, SAI1, SAI2, SDMMC1, SPI1, SPI2, SPI3, SWPMI1, SYSCFG, TIM1, TIM15, TIM16, TIM17, - TIM2, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, TSC, UART4, UART5, USART1, USART2, USART3, - USB_OTG_FS, WWDG -); -pub const GPIO_BASE: usize = 0x48000000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC1_2 = 18, - ADC3 = 47, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DFSDM1_FLT2 = 63, - DFSDM1_FLT3 = 42, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LCD = 78, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - OTG_FS = 67, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SWPMI1 = 76, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_2); - declare!(ADC3); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DFSDM1_FLT2); - declare!(DFSDM1_FLT3); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LCD); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(OTG_FS); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_2(); - fn ADC3(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DFSDM1_FLT2(); - fn DFSDM1_FLT3(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LCD(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn OTG_FS(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 82] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1_2 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: DFSDM1_FLT3, - }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _handler: ADC3 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { - _handler: DFSDM1_FLT2, - }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TSC }, - Vector { _handler: LCD }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_rng!(0x50060800); diff --git a/embassy-stm32/src/chip/stm32l476vc.rs b/embassy-stm32/src/chip/stm32l476vc.rs deleted file mode 100644 index 8e468038..00000000 --- a/embassy-stm32/src/chip/stm32l476vc.rs +++ /dev/null @@ -1,552 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, ADC3, CAN1, COMP1, COMP2, DAC1, PA0, PA1, PA2, PA3, PA4, - PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, - PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, - PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, - PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, - PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, - PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, - PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, - PH14, PH15, I2C1, I2C2, I2C3, IWDG, LCD, LPTIM1, LPTIM2, LPUART1, OPAMP1, OPAMP2, QUADSPI, RCC, - RNG, RTC, SAI1, SAI2, SDMMC1, SPI1, SPI2, SPI3, SWPMI1, SYSCFG, TIM1, TIM15, TIM16, TIM17, - TIM2, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, TSC, UART4, UART5, USART1, USART2, USART3, - USB_OTG_FS, WWDG -); -pub const GPIO_BASE: usize = 0x48000000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC1_2 = 18, - ADC3 = 47, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DFSDM1_FLT2 = 63, - DFSDM1_FLT3 = 42, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LCD = 78, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - OTG_FS = 67, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SWPMI1 = 76, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_2); - declare!(ADC3); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DFSDM1_FLT2); - declare!(DFSDM1_FLT3); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LCD); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(OTG_FS); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_2(); - fn ADC3(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DFSDM1_FLT2(); - fn DFSDM1_FLT3(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LCD(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn OTG_FS(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 82] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1_2 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: DFSDM1_FLT3, - }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _handler: ADC3 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { - _handler: DFSDM1_FLT2, - }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TSC }, - Vector { _handler: LCD }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_rng!(0x50060800); diff --git a/embassy-stm32/src/chip/stm32l476ve.rs b/embassy-stm32/src/chip/stm32l476ve.rs deleted file mode 100644 index 8e468038..00000000 --- a/embassy-stm32/src/chip/stm32l476ve.rs +++ /dev/null @@ -1,552 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, ADC3, CAN1, COMP1, COMP2, DAC1, PA0, PA1, PA2, PA3, PA4, - PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, - PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, - PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, - PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, - PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, - PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, - PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, - PH14, PH15, I2C1, I2C2, I2C3, IWDG, LCD, LPTIM1, LPTIM2, LPUART1, OPAMP1, OPAMP2, QUADSPI, RCC, - RNG, RTC, SAI1, SAI2, SDMMC1, SPI1, SPI2, SPI3, SWPMI1, SYSCFG, TIM1, TIM15, TIM16, TIM17, - TIM2, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, TSC, UART4, UART5, USART1, USART2, USART3, - USB_OTG_FS, WWDG -); -pub const GPIO_BASE: usize = 0x48000000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC1_2 = 18, - ADC3 = 47, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DFSDM1_FLT2 = 63, - DFSDM1_FLT3 = 42, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LCD = 78, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - OTG_FS = 67, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SWPMI1 = 76, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_2); - declare!(ADC3); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DFSDM1_FLT2); - declare!(DFSDM1_FLT3); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LCD); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(OTG_FS); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_2(); - fn ADC3(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DFSDM1_FLT2(); - fn DFSDM1_FLT3(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LCD(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn OTG_FS(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 82] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1_2 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: DFSDM1_FLT3, - }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _handler: ADC3 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { - _handler: DFSDM1_FLT2, - }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TSC }, - Vector { _handler: LCD }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_rng!(0x50060800); diff --git a/embassy-stm32/src/chip/stm32l476vg.rs b/embassy-stm32/src/chip/stm32l476vg.rs deleted file mode 100644 index 8e468038..00000000 --- a/embassy-stm32/src/chip/stm32l476vg.rs +++ /dev/null @@ -1,552 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, ADC3, CAN1, COMP1, COMP2, DAC1, PA0, PA1, PA2, PA3, PA4, - PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, - PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, - PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, - PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, - PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, - PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, - PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, - PH14, PH15, I2C1, I2C2, I2C3, IWDG, LCD, LPTIM1, LPTIM2, LPUART1, OPAMP1, OPAMP2, QUADSPI, RCC, - RNG, RTC, SAI1, SAI2, SDMMC1, SPI1, SPI2, SPI3, SWPMI1, SYSCFG, TIM1, TIM15, TIM16, TIM17, - TIM2, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, TSC, UART4, UART5, USART1, USART2, USART3, - USB_OTG_FS, WWDG -); -pub const GPIO_BASE: usize = 0x48000000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC1_2 = 18, - ADC3 = 47, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DFSDM1_FLT2 = 63, - DFSDM1_FLT3 = 42, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LCD = 78, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - OTG_FS = 67, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SWPMI1 = 76, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_2); - declare!(ADC3); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DFSDM1_FLT2); - declare!(DFSDM1_FLT3); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LCD); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(OTG_FS); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_2(); - fn ADC3(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DFSDM1_FLT2(); - fn DFSDM1_FLT3(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LCD(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn OTG_FS(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 82] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1_2 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: DFSDM1_FLT3, - }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _handler: ADC3 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { - _handler: DFSDM1_FLT2, - }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TSC }, - Vector { _handler: LCD }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_rng!(0x50060800); diff --git a/embassy-stm32/src/chip/stm32l476ze.rs b/embassy-stm32/src/chip/stm32l476ze.rs deleted file mode 100644 index 8e468038..00000000 --- a/embassy-stm32/src/chip/stm32l476ze.rs +++ /dev/null @@ -1,552 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, ADC3, CAN1, COMP1, COMP2, DAC1, PA0, PA1, PA2, PA3, PA4, - PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, - PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, - PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, - PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, - PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, - PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, - PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, - PH14, PH15, I2C1, I2C2, I2C3, IWDG, LCD, LPTIM1, LPTIM2, LPUART1, OPAMP1, OPAMP2, QUADSPI, RCC, - RNG, RTC, SAI1, SAI2, SDMMC1, SPI1, SPI2, SPI3, SWPMI1, SYSCFG, TIM1, TIM15, TIM16, TIM17, - TIM2, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, TSC, UART4, UART5, USART1, USART2, USART3, - USB_OTG_FS, WWDG -); -pub const GPIO_BASE: usize = 0x48000000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC1_2 = 18, - ADC3 = 47, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DFSDM1_FLT2 = 63, - DFSDM1_FLT3 = 42, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LCD = 78, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - OTG_FS = 67, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SWPMI1 = 76, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_2); - declare!(ADC3); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DFSDM1_FLT2); - declare!(DFSDM1_FLT3); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LCD); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(OTG_FS); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_2(); - fn ADC3(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DFSDM1_FLT2(); - fn DFSDM1_FLT3(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LCD(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn OTG_FS(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 82] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1_2 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: DFSDM1_FLT3, - }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _handler: ADC3 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { - _handler: DFSDM1_FLT2, - }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TSC }, - Vector { _handler: LCD }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_rng!(0x50060800); diff --git a/embassy-stm32/src/chip/stm32l476zg.rs b/embassy-stm32/src/chip/stm32l476zg.rs deleted file mode 100644 index 8e468038..00000000 --- a/embassy-stm32/src/chip/stm32l476zg.rs +++ /dev/null @@ -1,552 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, ADC3, CAN1, COMP1, COMP2, DAC1, PA0, PA1, PA2, PA3, PA4, - PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, - PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, - PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, - PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, - PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, - PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, - PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, - PH14, PH15, I2C1, I2C2, I2C3, IWDG, LCD, LPTIM1, LPTIM2, LPUART1, OPAMP1, OPAMP2, QUADSPI, RCC, - RNG, RTC, SAI1, SAI2, SDMMC1, SPI1, SPI2, SPI3, SWPMI1, SYSCFG, TIM1, TIM15, TIM16, TIM17, - TIM2, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, TSC, UART4, UART5, USART1, USART2, USART3, - USB_OTG_FS, WWDG -); -pub const GPIO_BASE: usize = 0x48000000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC1_2 = 18, - ADC3 = 47, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DFSDM1_FLT2 = 63, - DFSDM1_FLT3 = 42, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LCD = 78, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - OTG_FS = 67, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SWPMI1 = 76, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_2); - declare!(ADC3); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DFSDM1_FLT2); - declare!(DFSDM1_FLT3); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LCD); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(OTG_FS); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_2(); - fn ADC3(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DFSDM1_FLT2(); - fn DFSDM1_FLT3(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LCD(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn OTG_FS(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 82] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1_2 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: DFSDM1_FLT3, - }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _handler: ADC3 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { - _handler: DFSDM1_FLT2, - }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TSC }, - Vector { _handler: LCD }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_rng!(0x50060800); diff --git a/embassy-stm32/src/chip/stm32l485jc.rs b/embassy-stm32/src/chip/stm32l485jc.rs deleted file mode 100644 index 6172b0d5..00000000 --- a/embassy-stm32/src/chip/stm32l485jc.rs +++ /dev/null @@ -1,552 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, ADC3, AES, CAN1, COMP1, COMP2, DAC1, PA0, PA1, PA2, PA3, - PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, - PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, - PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, - PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, - PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, - PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, - PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, - PH14, PH15, I2C1, I2C2, I2C3, IWDG, LPTIM1, LPTIM2, LPUART1, OPAMP1, OPAMP2, QUADSPI, RCC, RNG, - RTC, SAI1, SAI2, SDMMC1, SPI1, SPI2, SPI3, SWPMI1, SYSCFG, TIM1, TIM15, TIM16, TIM17, TIM2, - TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, TSC, UART4, UART5, USART1, USART2, USART3, USB_OTG_FS, - WWDG -); -pub const GPIO_BASE: usize = 0x48000000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC1_2 = 18, - ADC3 = 47, - AES = 79, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DFSDM1_FLT2 = 63, - DFSDM1_FLT3 = 42, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - OTG_FS = 67, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SWPMI1 = 76, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_2); - declare!(ADC3); - declare!(AES); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DFSDM1_FLT2); - declare!(DFSDM1_FLT3); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(OTG_FS); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_2(); - fn ADC3(); - fn AES(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DFSDM1_FLT2(); - fn DFSDM1_FLT3(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn OTG_FS(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 82] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1_2 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: DFSDM1_FLT3, - }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _handler: ADC3 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { - _handler: DFSDM1_FLT2, - }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _handler: AES }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_rng!(0x50060800); diff --git a/embassy-stm32/src/chip/stm32l485je.rs b/embassy-stm32/src/chip/stm32l485je.rs deleted file mode 100644 index 6172b0d5..00000000 --- a/embassy-stm32/src/chip/stm32l485je.rs +++ /dev/null @@ -1,552 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, ADC3, AES, CAN1, COMP1, COMP2, DAC1, PA0, PA1, PA2, PA3, - PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, - PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, - PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, - PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, - PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, - PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, - PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, - PH14, PH15, I2C1, I2C2, I2C3, IWDG, LPTIM1, LPTIM2, LPUART1, OPAMP1, OPAMP2, QUADSPI, RCC, RNG, - RTC, SAI1, SAI2, SDMMC1, SPI1, SPI2, SPI3, SWPMI1, SYSCFG, TIM1, TIM15, TIM16, TIM17, TIM2, - TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, TSC, UART4, UART5, USART1, USART2, USART3, USB_OTG_FS, - WWDG -); -pub const GPIO_BASE: usize = 0x48000000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC1_2 = 18, - ADC3 = 47, - AES = 79, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DFSDM1_FLT2 = 63, - DFSDM1_FLT3 = 42, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - OTG_FS = 67, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SWPMI1 = 76, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_2); - declare!(ADC3); - declare!(AES); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DFSDM1_FLT2); - declare!(DFSDM1_FLT3); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(OTG_FS); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_2(); - fn ADC3(); - fn AES(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DFSDM1_FLT2(); - fn DFSDM1_FLT3(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn OTG_FS(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 82] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1_2 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: DFSDM1_FLT3, - }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _handler: ADC3 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { - _handler: DFSDM1_FLT2, - }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _handler: AES }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_rng!(0x50060800); diff --git a/embassy-stm32/src/chip/stm32l486jg.rs b/embassy-stm32/src/chip/stm32l486jg.rs deleted file mode 100644 index 84a63dc8..00000000 --- a/embassy-stm32/src/chip/stm32l486jg.rs +++ /dev/null @@ -1,555 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, ADC3, AES, CAN1, COMP1, COMP2, DAC1, PA0, PA1, PA2, PA3, - PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, - PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, - PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, - PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, - PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, - PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, - PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, - PH14, PH15, I2C1, I2C2, I2C3, IWDG, LCD, LPTIM1, LPTIM2, LPUART1, OPAMP1, OPAMP2, QUADSPI, RCC, - RNG, RTC, SAI1, SAI2, SDMMC1, SPI1, SPI2, SPI3, SWPMI1, SYSCFG, TIM1, TIM15, TIM16, TIM17, - TIM2, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, TSC, UART4, UART5, USART1, USART2, USART3, - USB_OTG_FS, WWDG -); -pub const GPIO_BASE: usize = 0x48000000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC1_2 = 18, - ADC3 = 47, - AES = 79, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DFSDM1_FLT2 = 63, - DFSDM1_FLT3 = 42, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LCD = 78, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - OTG_FS = 67, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SWPMI1 = 76, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_2); - declare!(ADC3); - declare!(AES); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DFSDM1_FLT2); - declare!(DFSDM1_FLT3); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LCD); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(OTG_FS); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_2(); - fn ADC3(); - fn AES(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DFSDM1_FLT2(); - fn DFSDM1_FLT3(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LCD(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn OTG_FS(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 82] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1_2 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: DFSDM1_FLT3, - }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _handler: ADC3 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { - _handler: DFSDM1_FLT2, - }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TSC }, - Vector { _handler: LCD }, - Vector { _handler: AES }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_rng!(0x50060800); diff --git a/embassy-stm32/src/chip/stm32l486qg.rs b/embassy-stm32/src/chip/stm32l486qg.rs deleted file mode 100644 index 84a63dc8..00000000 --- a/embassy-stm32/src/chip/stm32l486qg.rs +++ /dev/null @@ -1,555 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, ADC3, AES, CAN1, COMP1, COMP2, DAC1, PA0, PA1, PA2, PA3, - PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, - PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, - PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, - PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, - PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, - PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, - PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, - PH14, PH15, I2C1, I2C2, I2C3, IWDG, LCD, LPTIM1, LPTIM2, LPUART1, OPAMP1, OPAMP2, QUADSPI, RCC, - RNG, RTC, SAI1, SAI2, SDMMC1, SPI1, SPI2, SPI3, SWPMI1, SYSCFG, TIM1, TIM15, TIM16, TIM17, - TIM2, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, TSC, UART4, UART5, USART1, USART2, USART3, - USB_OTG_FS, WWDG -); -pub const GPIO_BASE: usize = 0x48000000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC1_2 = 18, - ADC3 = 47, - AES = 79, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DFSDM1_FLT2 = 63, - DFSDM1_FLT3 = 42, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LCD = 78, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - OTG_FS = 67, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SWPMI1 = 76, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_2); - declare!(ADC3); - declare!(AES); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DFSDM1_FLT2); - declare!(DFSDM1_FLT3); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LCD); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(OTG_FS); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_2(); - fn ADC3(); - fn AES(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DFSDM1_FLT2(); - fn DFSDM1_FLT3(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LCD(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn OTG_FS(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 82] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1_2 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: DFSDM1_FLT3, - }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _handler: ADC3 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { - _handler: DFSDM1_FLT2, - }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TSC }, - Vector { _handler: LCD }, - Vector { _handler: AES }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_rng!(0x50060800); diff --git a/embassy-stm32/src/chip/stm32l486rg.rs b/embassy-stm32/src/chip/stm32l486rg.rs deleted file mode 100644 index 84a63dc8..00000000 --- a/embassy-stm32/src/chip/stm32l486rg.rs +++ /dev/null @@ -1,555 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, ADC3, AES, CAN1, COMP1, COMP2, DAC1, PA0, PA1, PA2, PA3, - PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, - PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, - PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, - PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, - PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, - PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, - PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, - PH14, PH15, I2C1, I2C2, I2C3, IWDG, LCD, LPTIM1, LPTIM2, LPUART1, OPAMP1, OPAMP2, QUADSPI, RCC, - RNG, RTC, SAI1, SAI2, SDMMC1, SPI1, SPI2, SPI3, SWPMI1, SYSCFG, TIM1, TIM15, TIM16, TIM17, - TIM2, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, TSC, UART4, UART5, USART1, USART2, USART3, - USB_OTG_FS, WWDG -); -pub const GPIO_BASE: usize = 0x48000000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC1_2 = 18, - ADC3 = 47, - AES = 79, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DFSDM1_FLT2 = 63, - DFSDM1_FLT3 = 42, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LCD = 78, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - OTG_FS = 67, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SWPMI1 = 76, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_2); - declare!(ADC3); - declare!(AES); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DFSDM1_FLT2); - declare!(DFSDM1_FLT3); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LCD); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(OTG_FS); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_2(); - fn ADC3(); - fn AES(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DFSDM1_FLT2(); - fn DFSDM1_FLT3(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LCD(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn OTG_FS(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 82] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1_2 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: DFSDM1_FLT3, - }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _handler: ADC3 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { - _handler: DFSDM1_FLT2, - }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TSC }, - Vector { _handler: LCD }, - Vector { _handler: AES }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_rng!(0x50060800); diff --git a/embassy-stm32/src/chip/stm32l486vg.rs b/embassy-stm32/src/chip/stm32l486vg.rs deleted file mode 100644 index 84a63dc8..00000000 --- a/embassy-stm32/src/chip/stm32l486vg.rs +++ /dev/null @@ -1,555 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, ADC3, AES, CAN1, COMP1, COMP2, DAC1, PA0, PA1, PA2, PA3, - PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, - PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, - PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, - PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, - PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, - PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, - PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, - PH14, PH15, I2C1, I2C2, I2C3, IWDG, LCD, LPTIM1, LPTIM2, LPUART1, OPAMP1, OPAMP2, QUADSPI, RCC, - RNG, RTC, SAI1, SAI2, SDMMC1, SPI1, SPI2, SPI3, SWPMI1, SYSCFG, TIM1, TIM15, TIM16, TIM17, - TIM2, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, TSC, UART4, UART5, USART1, USART2, USART3, - USB_OTG_FS, WWDG -); -pub const GPIO_BASE: usize = 0x48000000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC1_2 = 18, - ADC3 = 47, - AES = 79, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DFSDM1_FLT2 = 63, - DFSDM1_FLT3 = 42, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LCD = 78, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - OTG_FS = 67, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SWPMI1 = 76, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_2); - declare!(ADC3); - declare!(AES); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DFSDM1_FLT2); - declare!(DFSDM1_FLT3); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LCD); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(OTG_FS); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_2(); - fn ADC3(); - fn AES(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DFSDM1_FLT2(); - fn DFSDM1_FLT3(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LCD(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn OTG_FS(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 82] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1_2 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: DFSDM1_FLT3, - }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _handler: ADC3 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { - _handler: DFSDM1_FLT2, - }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TSC }, - Vector { _handler: LCD }, - Vector { _handler: AES }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_rng!(0x50060800); diff --git a/embassy-stm32/src/chip/stm32l486zg.rs b/embassy-stm32/src/chip/stm32l486zg.rs deleted file mode 100644 index 84a63dc8..00000000 --- a/embassy-stm32/src/chip/stm32l486zg.rs +++ /dev/null @@ -1,555 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, ADC3, AES, CAN1, COMP1, COMP2, DAC1, PA0, PA1, PA2, PA3, - PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, - PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, - PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, - PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, - PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, - PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, - PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, - PH14, PH15, I2C1, I2C2, I2C3, IWDG, LCD, LPTIM1, LPTIM2, LPUART1, OPAMP1, OPAMP2, QUADSPI, RCC, - RNG, RTC, SAI1, SAI2, SDMMC1, SPI1, SPI2, SPI3, SWPMI1, SYSCFG, TIM1, TIM15, TIM16, TIM17, - TIM2, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, TSC, UART4, UART5, USART1, USART2, USART3, - USB_OTG_FS, WWDG -); -pub const GPIO_BASE: usize = 0x48000000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC1_2 = 18, - ADC3 = 47, - AES = 79, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DFSDM1_FLT2 = 63, - DFSDM1_FLT3 = 42, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LCD = 78, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - OTG_FS = 67, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SWPMI1 = 76, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_2); - declare!(ADC3); - declare!(AES); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DFSDM1_FLT2); - declare!(DFSDM1_FLT3); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LCD); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(OTG_FS); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_2(); - fn ADC3(); - fn AES(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DFSDM1_FLT2(); - fn DFSDM1_FLT3(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LCD(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn OTG_FS(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 82] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1_2 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: DFSDM1_FLT3, - }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _handler: ADC3 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { - _handler: DFSDM1_FLT2, - }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TSC }, - Vector { _handler: LCD }, - Vector { _handler: AES }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_rng!(0x50060800); diff --git a/embassy-stm32/src/chip/stm32l496ae.rs b/embassy-stm32/src/chip/stm32l496ae.rs deleted file mode 100644 index bb4ecfae..00000000 --- a/embassy-stm32/src/chip/stm32l496ae.rs +++ /dev/null @@ -1,605 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, ADC3, CAN1, CAN2, COMP1, COMP2, DAC1, DCMI, DMA2D, PA0, - PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, PB2, - PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, PC4, - PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, - PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, - PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, - PI13, PI14, PI15, I2C1, I2C2, I2C3, I2C4, IWDG, LCD, LPTIM1, LPTIM2, LPUART1, OPAMP1, OPAMP2, - QUADSPI, RCC, RNG, RTC, SAI1, SAI2, SDMMC1, SPI1, SPI2, SPI3, SWPMI1, SYSCFG, TIM1, TIM15, - TIM16, TIM17, TIM2, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, TSC, UART4, UART5, USART1, USART2, - USART3, USB_OTG_FS, WWDG -); -pub const GPIO_BASE: usize = 0x48000000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC1_2 = 18, - ADC3 = 47, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - CAN2_RX0 = 87, - CAN2_RX1 = 88, - CAN2_SCE = 89, - CAN2_TX = 86, - COMP = 64, - CRS = 82, - DCMI = 85, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DFSDM1_FLT2 = 63, - DFSDM1_FLT3 = 42, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2D = 90, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 84, - I2C4_EV = 83, - LCD = 78, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - OTG_FS = 67, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SWPMI1 = 76, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_2); - declare!(ADC3); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(CAN2_RX0); - declare!(CAN2_RX1); - declare!(CAN2_SCE); - declare!(CAN2_TX); - declare!(COMP); - declare!(CRS); - declare!(DCMI); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DFSDM1_FLT2); - declare!(DFSDM1_FLT3); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2D); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LCD); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(OTG_FS); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_2(); - fn ADC3(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn CAN2_RX0(); - fn CAN2_RX1(); - fn CAN2_SCE(); - fn CAN2_TX(); - fn COMP(); - fn CRS(); - fn DCMI(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DFSDM1_FLT2(); - fn DFSDM1_FLT3(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2D(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LCD(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn OTG_FS(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 91] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1_2 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: DFSDM1_FLT3, - }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _handler: ADC3 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { - _handler: DFSDM1_FLT2, - }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TSC }, - Vector { _handler: LCD }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: CRS }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: DCMI }, - Vector { _handler: CAN2_TX }, - Vector { _handler: CAN2_RX0 }, - Vector { _handler: CAN2_RX1 }, - Vector { _handler: CAN2_SCE }, - Vector { _handler: DMA2D }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -impl_rng!(0x50060800); diff --git a/embassy-stm32/src/chip/stm32l496ag.rs b/embassy-stm32/src/chip/stm32l496ag.rs deleted file mode 100644 index bb4ecfae..00000000 --- a/embassy-stm32/src/chip/stm32l496ag.rs +++ /dev/null @@ -1,605 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, ADC3, CAN1, CAN2, COMP1, COMP2, DAC1, DCMI, DMA2D, PA0, - PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, PB2, - PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, PC4, - PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, - PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, - PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, - PI13, PI14, PI15, I2C1, I2C2, I2C3, I2C4, IWDG, LCD, LPTIM1, LPTIM2, LPUART1, OPAMP1, OPAMP2, - QUADSPI, RCC, RNG, RTC, SAI1, SAI2, SDMMC1, SPI1, SPI2, SPI3, SWPMI1, SYSCFG, TIM1, TIM15, - TIM16, TIM17, TIM2, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, TSC, UART4, UART5, USART1, USART2, - USART3, USB_OTG_FS, WWDG -); -pub const GPIO_BASE: usize = 0x48000000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC1_2 = 18, - ADC3 = 47, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - CAN2_RX0 = 87, - CAN2_RX1 = 88, - CAN2_SCE = 89, - CAN2_TX = 86, - COMP = 64, - CRS = 82, - DCMI = 85, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DFSDM1_FLT2 = 63, - DFSDM1_FLT3 = 42, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2D = 90, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 84, - I2C4_EV = 83, - LCD = 78, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - OTG_FS = 67, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SWPMI1 = 76, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_2); - declare!(ADC3); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(CAN2_RX0); - declare!(CAN2_RX1); - declare!(CAN2_SCE); - declare!(CAN2_TX); - declare!(COMP); - declare!(CRS); - declare!(DCMI); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DFSDM1_FLT2); - declare!(DFSDM1_FLT3); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2D); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LCD); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(OTG_FS); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_2(); - fn ADC3(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn CAN2_RX0(); - fn CAN2_RX1(); - fn CAN2_SCE(); - fn CAN2_TX(); - fn COMP(); - fn CRS(); - fn DCMI(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DFSDM1_FLT2(); - fn DFSDM1_FLT3(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2D(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LCD(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn OTG_FS(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 91] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1_2 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: DFSDM1_FLT3, - }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _handler: ADC3 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { - _handler: DFSDM1_FLT2, - }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TSC }, - Vector { _handler: LCD }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: CRS }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: DCMI }, - Vector { _handler: CAN2_TX }, - Vector { _handler: CAN2_RX0 }, - Vector { _handler: CAN2_RX1 }, - Vector { _handler: CAN2_SCE }, - Vector { _handler: DMA2D }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -impl_rng!(0x50060800); diff --git a/embassy-stm32/src/chip/stm32l496qe.rs b/embassy-stm32/src/chip/stm32l496qe.rs deleted file mode 100644 index bb4ecfae..00000000 --- a/embassy-stm32/src/chip/stm32l496qe.rs +++ /dev/null @@ -1,605 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, ADC3, CAN1, CAN2, COMP1, COMP2, DAC1, DCMI, DMA2D, PA0, - PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, PB2, - PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, PC4, - PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, - PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, - PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, - PI13, PI14, PI15, I2C1, I2C2, I2C3, I2C4, IWDG, LCD, LPTIM1, LPTIM2, LPUART1, OPAMP1, OPAMP2, - QUADSPI, RCC, RNG, RTC, SAI1, SAI2, SDMMC1, SPI1, SPI2, SPI3, SWPMI1, SYSCFG, TIM1, TIM15, - TIM16, TIM17, TIM2, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, TSC, UART4, UART5, USART1, USART2, - USART3, USB_OTG_FS, WWDG -); -pub const GPIO_BASE: usize = 0x48000000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC1_2 = 18, - ADC3 = 47, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - CAN2_RX0 = 87, - CAN2_RX1 = 88, - CAN2_SCE = 89, - CAN2_TX = 86, - COMP = 64, - CRS = 82, - DCMI = 85, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DFSDM1_FLT2 = 63, - DFSDM1_FLT3 = 42, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2D = 90, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 84, - I2C4_EV = 83, - LCD = 78, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - OTG_FS = 67, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SWPMI1 = 76, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_2); - declare!(ADC3); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(CAN2_RX0); - declare!(CAN2_RX1); - declare!(CAN2_SCE); - declare!(CAN2_TX); - declare!(COMP); - declare!(CRS); - declare!(DCMI); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DFSDM1_FLT2); - declare!(DFSDM1_FLT3); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2D); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LCD); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(OTG_FS); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_2(); - fn ADC3(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn CAN2_RX0(); - fn CAN2_RX1(); - fn CAN2_SCE(); - fn CAN2_TX(); - fn COMP(); - fn CRS(); - fn DCMI(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DFSDM1_FLT2(); - fn DFSDM1_FLT3(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2D(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LCD(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn OTG_FS(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 91] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1_2 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: DFSDM1_FLT3, - }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _handler: ADC3 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { - _handler: DFSDM1_FLT2, - }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TSC }, - Vector { _handler: LCD }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: CRS }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: DCMI }, - Vector { _handler: CAN2_TX }, - Vector { _handler: CAN2_RX0 }, - Vector { _handler: CAN2_RX1 }, - Vector { _handler: CAN2_SCE }, - Vector { _handler: DMA2D }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -impl_rng!(0x50060800); diff --git a/embassy-stm32/src/chip/stm32l496qg.rs b/embassy-stm32/src/chip/stm32l496qg.rs deleted file mode 100644 index bb4ecfae..00000000 --- a/embassy-stm32/src/chip/stm32l496qg.rs +++ /dev/null @@ -1,605 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, ADC3, CAN1, CAN2, COMP1, COMP2, DAC1, DCMI, DMA2D, PA0, - PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, PB2, - PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, PC4, - PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, - PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, - PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, - PI13, PI14, PI15, I2C1, I2C2, I2C3, I2C4, IWDG, LCD, LPTIM1, LPTIM2, LPUART1, OPAMP1, OPAMP2, - QUADSPI, RCC, RNG, RTC, SAI1, SAI2, SDMMC1, SPI1, SPI2, SPI3, SWPMI1, SYSCFG, TIM1, TIM15, - TIM16, TIM17, TIM2, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, TSC, UART4, UART5, USART1, USART2, - USART3, USB_OTG_FS, WWDG -); -pub const GPIO_BASE: usize = 0x48000000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC1_2 = 18, - ADC3 = 47, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - CAN2_RX0 = 87, - CAN2_RX1 = 88, - CAN2_SCE = 89, - CAN2_TX = 86, - COMP = 64, - CRS = 82, - DCMI = 85, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DFSDM1_FLT2 = 63, - DFSDM1_FLT3 = 42, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2D = 90, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 84, - I2C4_EV = 83, - LCD = 78, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - OTG_FS = 67, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SWPMI1 = 76, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_2); - declare!(ADC3); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(CAN2_RX0); - declare!(CAN2_RX1); - declare!(CAN2_SCE); - declare!(CAN2_TX); - declare!(COMP); - declare!(CRS); - declare!(DCMI); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DFSDM1_FLT2); - declare!(DFSDM1_FLT3); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2D); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LCD); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(OTG_FS); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_2(); - fn ADC3(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn CAN2_RX0(); - fn CAN2_RX1(); - fn CAN2_SCE(); - fn CAN2_TX(); - fn COMP(); - fn CRS(); - fn DCMI(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DFSDM1_FLT2(); - fn DFSDM1_FLT3(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2D(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LCD(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn OTG_FS(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 91] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1_2 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: DFSDM1_FLT3, - }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _handler: ADC3 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { - _handler: DFSDM1_FLT2, - }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TSC }, - Vector { _handler: LCD }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: CRS }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: DCMI }, - Vector { _handler: CAN2_TX }, - Vector { _handler: CAN2_RX0 }, - Vector { _handler: CAN2_RX1 }, - Vector { _handler: CAN2_SCE }, - Vector { _handler: DMA2D }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -impl_rng!(0x50060800); diff --git a/embassy-stm32/src/chip/stm32l496re.rs b/embassy-stm32/src/chip/stm32l496re.rs deleted file mode 100644 index bb4ecfae..00000000 --- a/embassy-stm32/src/chip/stm32l496re.rs +++ /dev/null @@ -1,605 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, ADC3, CAN1, CAN2, COMP1, COMP2, DAC1, DCMI, DMA2D, PA0, - PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, PB2, - PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, PC4, - PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, - PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, - PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, - PI13, PI14, PI15, I2C1, I2C2, I2C3, I2C4, IWDG, LCD, LPTIM1, LPTIM2, LPUART1, OPAMP1, OPAMP2, - QUADSPI, RCC, RNG, RTC, SAI1, SAI2, SDMMC1, SPI1, SPI2, SPI3, SWPMI1, SYSCFG, TIM1, TIM15, - TIM16, TIM17, TIM2, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, TSC, UART4, UART5, USART1, USART2, - USART3, USB_OTG_FS, WWDG -); -pub const GPIO_BASE: usize = 0x48000000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC1_2 = 18, - ADC3 = 47, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - CAN2_RX0 = 87, - CAN2_RX1 = 88, - CAN2_SCE = 89, - CAN2_TX = 86, - COMP = 64, - CRS = 82, - DCMI = 85, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DFSDM1_FLT2 = 63, - DFSDM1_FLT3 = 42, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2D = 90, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 84, - I2C4_EV = 83, - LCD = 78, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - OTG_FS = 67, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SWPMI1 = 76, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_2); - declare!(ADC3); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(CAN2_RX0); - declare!(CAN2_RX1); - declare!(CAN2_SCE); - declare!(CAN2_TX); - declare!(COMP); - declare!(CRS); - declare!(DCMI); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DFSDM1_FLT2); - declare!(DFSDM1_FLT3); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2D); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LCD); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(OTG_FS); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_2(); - fn ADC3(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn CAN2_RX0(); - fn CAN2_RX1(); - fn CAN2_SCE(); - fn CAN2_TX(); - fn COMP(); - fn CRS(); - fn DCMI(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DFSDM1_FLT2(); - fn DFSDM1_FLT3(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2D(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LCD(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn OTG_FS(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 91] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1_2 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: DFSDM1_FLT3, - }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _handler: ADC3 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { - _handler: DFSDM1_FLT2, - }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TSC }, - Vector { _handler: LCD }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: CRS }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: DCMI }, - Vector { _handler: CAN2_TX }, - Vector { _handler: CAN2_RX0 }, - Vector { _handler: CAN2_RX1 }, - Vector { _handler: CAN2_SCE }, - Vector { _handler: DMA2D }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -impl_rng!(0x50060800); diff --git a/embassy-stm32/src/chip/stm32l496rg.rs b/embassy-stm32/src/chip/stm32l496rg.rs deleted file mode 100644 index bb4ecfae..00000000 --- a/embassy-stm32/src/chip/stm32l496rg.rs +++ /dev/null @@ -1,605 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, ADC3, CAN1, CAN2, COMP1, COMP2, DAC1, DCMI, DMA2D, PA0, - PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, PB2, - PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, PC4, - PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, - PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, - PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, - PI13, PI14, PI15, I2C1, I2C2, I2C3, I2C4, IWDG, LCD, LPTIM1, LPTIM2, LPUART1, OPAMP1, OPAMP2, - QUADSPI, RCC, RNG, RTC, SAI1, SAI2, SDMMC1, SPI1, SPI2, SPI3, SWPMI1, SYSCFG, TIM1, TIM15, - TIM16, TIM17, TIM2, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, TSC, UART4, UART5, USART1, USART2, - USART3, USB_OTG_FS, WWDG -); -pub const GPIO_BASE: usize = 0x48000000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC1_2 = 18, - ADC3 = 47, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - CAN2_RX0 = 87, - CAN2_RX1 = 88, - CAN2_SCE = 89, - CAN2_TX = 86, - COMP = 64, - CRS = 82, - DCMI = 85, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DFSDM1_FLT2 = 63, - DFSDM1_FLT3 = 42, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2D = 90, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 84, - I2C4_EV = 83, - LCD = 78, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - OTG_FS = 67, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SWPMI1 = 76, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_2); - declare!(ADC3); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(CAN2_RX0); - declare!(CAN2_RX1); - declare!(CAN2_SCE); - declare!(CAN2_TX); - declare!(COMP); - declare!(CRS); - declare!(DCMI); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DFSDM1_FLT2); - declare!(DFSDM1_FLT3); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2D); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LCD); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(OTG_FS); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_2(); - fn ADC3(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn CAN2_RX0(); - fn CAN2_RX1(); - fn CAN2_SCE(); - fn CAN2_TX(); - fn COMP(); - fn CRS(); - fn DCMI(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DFSDM1_FLT2(); - fn DFSDM1_FLT3(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2D(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LCD(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn OTG_FS(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 91] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1_2 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: DFSDM1_FLT3, - }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _handler: ADC3 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { - _handler: DFSDM1_FLT2, - }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TSC }, - Vector { _handler: LCD }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: CRS }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: DCMI }, - Vector { _handler: CAN2_TX }, - Vector { _handler: CAN2_RX0 }, - Vector { _handler: CAN2_RX1 }, - Vector { _handler: CAN2_SCE }, - Vector { _handler: DMA2D }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -impl_rng!(0x50060800); diff --git a/embassy-stm32/src/chip/stm32l496ve.rs b/embassy-stm32/src/chip/stm32l496ve.rs deleted file mode 100644 index bb4ecfae..00000000 --- a/embassy-stm32/src/chip/stm32l496ve.rs +++ /dev/null @@ -1,605 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, ADC3, CAN1, CAN2, COMP1, COMP2, DAC1, DCMI, DMA2D, PA0, - PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, PB2, - PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, PC4, - PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, - PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, - PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, - PI13, PI14, PI15, I2C1, I2C2, I2C3, I2C4, IWDG, LCD, LPTIM1, LPTIM2, LPUART1, OPAMP1, OPAMP2, - QUADSPI, RCC, RNG, RTC, SAI1, SAI2, SDMMC1, SPI1, SPI2, SPI3, SWPMI1, SYSCFG, TIM1, TIM15, - TIM16, TIM17, TIM2, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, TSC, UART4, UART5, USART1, USART2, - USART3, USB_OTG_FS, WWDG -); -pub const GPIO_BASE: usize = 0x48000000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC1_2 = 18, - ADC3 = 47, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - CAN2_RX0 = 87, - CAN2_RX1 = 88, - CAN2_SCE = 89, - CAN2_TX = 86, - COMP = 64, - CRS = 82, - DCMI = 85, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DFSDM1_FLT2 = 63, - DFSDM1_FLT3 = 42, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2D = 90, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 84, - I2C4_EV = 83, - LCD = 78, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - OTG_FS = 67, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SWPMI1 = 76, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_2); - declare!(ADC3); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(CAN2_RX0); - declare!(CAN2_RX1); - declare!(CAN2_SCE); - declare!(CAN2_TX); - declare!(COMP); - declare!(CRS); - declare!(DCMI); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DFSDM1_FLT2); - declare!(DFSDM1_FLT3); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2D); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LCD); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(OTG_FS); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_2(); - fn ADC3(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn CAN2_RX0(); - fn CAN2_RX1(); - fn CAN2_SCE(); - fn CAN2_TX(); - fn COMP(); - fn CRS(); - fn DCMI(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DFSDM1_FLT2(); - fn DFSDM1_FLT3(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2D(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LCD(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn OTG_FS(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 91] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1_2 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: DFSDM1_FLT3, - }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _handler: ADC3 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { - _handler: DFSDM1_FLT2, - }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TSC }, - Vector { _handler: LCD }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: CRS }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: DCMI }, - Vector { _handler: CAN2_TX }, - Vector { _handler: CAN2_RX0 }, - Vector { _handler: CAN2_RX1 }, - Vector { _handler: CAN2_SCE }, - Vector { _handler: DMA2D }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -impl_rng!(0x50060800); diff --git a/embassy-stm32/src/chip/stm32l496vg.rs b/embassy-stm32/src/chip/stm32l496vg.rs deleted file mode 100644 index bb4ecfae..00000000 --- a/embassy-stm32/src/chip/stm32l496vg.rs +++ /dev/null @@ -1,605 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, ADC3, CAN1, CAN2, COMP1, COMP2, DAC1, DCMI, DMA2D, PA0, - PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, PB2, - PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, PC4, - PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, - PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, - PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, - PI13, PI14, PI15, I2C1, I2C2, I2C3, I2C4, IWDG, LCD, LPTIM1, LPTIM2, LPUART1, OPAMP1, OPAMP2, - QUADSPI, RCC, RNG, RTC, SAI1, SAI2, SDMMC1, SPI1, SPI2, SPI3, SWPMI1, SYSCFG, TIM1, TIM15, - TIM16, TIM17, TIM2, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, TSC, UART4, UART5, USART1, USART2, - USART3, USB_OTG_FS, WWDG -); -pub const GPIO_BASE: usize = 0x48000000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC1_2 = 18, - ADC3 = 47, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - CAN2_RX0 = 87, - CAN2_RX1 = 88, - CAN2_SCE = 89, - CAN2_TX = 86, - COMP = 64, - CRS = 82, - DCMI = 85, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DFSDM1_FLT2 = 63, - DFSDM1_FLT3 = 42, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2D = 90, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 84, - I2C4_EV = 83, - LCD = 78, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - OTG_FS = 67, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SWPMI1 = 76, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_2); - declare!(ADC3); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(CAN2_RX0); - declare!(CAN2_RX1); - declare!(CAN2_SCE); - declare!(CAN2_TX); - declare!(COMP); - declare!(CRS); - declare!(DCMI); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DFSDM1_FLT2); - declare!(DFSDM1_FLT3); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2D); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LCD); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(OTG_FS); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_2(); - fn ADC3(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn CAN2_RX0(); - fn CAN2_RX1(); - fn CAN2_SCE(); - fn CAN2_TX(); - fn COMP(); - fn CRS(); - fn DCMI(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DFSDM1_FLT2(); - fn DFSDM1_FLT3(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2D(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LCD(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn OTG_FS(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 91] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1_2 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: DFSDM1_FLT3, - }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _handler: ADC3 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { - _handler: DFSDM1_FLT2, - }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TSC }, - Vector { _handler: LCD }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: CRS }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: DCMI }, - Vector { _handler: CAN2_TX }, - Vector { _handler: CAN2_RX0 }, - Vector { _handler: CAN2_RX1 }, - Vector { _handler: CAN2_SCE }, - Vector { _handler: DMA2D }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -impl_rng!(0x50060800); diff --git a/embassy-stm32/src/chip/stm32l496wg.rs b/embassy-stm32/src/chip/stm32l496wg.rs deleted file mode 100644 index bb4ecfae..00000000 --- a/embassy-stm32/src/chip/stm32l496wg.rs +++ /dev/null @@ -1,605 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, ADC3, CAN1, CAN2, COMP1, COMP2, DAC1, DCMI, DMA2D, PA0, - PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, PB2, - PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, PC4, - PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, - PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, - PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, - PI13, PI14, PI15, I2C1, I2C2, I2C3, I2C4, IWDG, LCD, LPTIM1, LPTIM2, LPUART1, OPAMP1, OPAMP2, - QUADSPI, RCC, RNG, RTC, SAI1, SAI2, SDMMC1, SPI1, SPI2, SPI3, SWPMI1, SYSCFG, TIM1, TIM15, - TIM16, TIM17, TIM2, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, TSC, UART4, UART5, USART1, USART2, - USART3, USB_OTG_FS, WWDG -); -pub const GPIO_BASE: usize = 0x48000000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC1_2 = 18, - ADC3 = 47, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - CAN2_RX0 = 87, - CAN2_RX1 = 88, - CAN2_SCE = 89, - CAN2_TX = 86, - COMP = 64, - CRS = 82, - DCMI = 85, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DFSDM1_FLT2 = 63, - DFSDM1_FLT3 = 42, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2D = 90, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 84, - I2C4_EV = 83, - LCD = 78, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - OTG_FS = 67, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SWPMI1 = 76, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_2); - declare!(ADC3); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(CAN2_RX0); - declare!(CAN2_RX1); - declare!(CAN2_SCE); - declare!(CAN2_TX); - declare!(COMP); - declare!(CRS); - declare!(DCMI); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DFSDM1_FLT2); - declare!(DFSDM1_FLT3); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2D); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LCD); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(OTG_FS); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_2(); - fn ADC3(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn CAN2_RX0(); - fn CAN2_RX1(); - fn CAN2_SCE(); - fn CAN2_TX(); - fn COMP(); - fn CRS(); - fn DCMI(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DFSDM1_FLT2(); - fn DFSDM1_FLT3(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2D(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LCD(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn OTG_FS(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 91] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1_2 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: DFSDM1_FLT3, - }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _handler: ADC3 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { - _handler: DFSDM1_FLT2, - }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TSC }, - Vector { _handler: LCD }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: CRS }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: DCMI }, - Vector { _handler: CAN2_TX }, - Vector { _handler: CAN2_RX0 }, - Vector { _handler: CAN2_RX1 }, - Vector { _handler: CAN2_SCE }, - Vector { _handler: DMA2D }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -impl_rng!(0x50060800); diff --git a/embassy-stm32/src/chip/stm32l496ze.rs b/embassy-stm32/src/chip/stm32l496ze.rs deleted file mode 100644 index bb4ecfae..00000000 --- a/embassy-stm32/src/chip/stm32l496ze.rs +++ /dev/null @@ -1,605 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, ADC3, CAN1, CAN2, COMP1, COMP2, DAC1, DCMI, DMA2D, PA0, - PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, PB2, - PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, PC4, - PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, - PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, - PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, - PI13, PI14, PI15, I2C1, I2C2, I2C3, I2C4, IWDG, LCD, LPTIM1, LPTIM2, LPUART1, OPAMP1, OPAMP2, - QUADSPI, RCC, RNG, RTC, SAI1, SAI2, SDMMC1, SPI1, SPI2, SPI3, SWPMI1, SYSCFG, TIM1, TIM15, - TIM16, TIM17, TIM2, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, TSC, UART4, UART5, USART1, USART2, - USART3, USB_OTG_FS, WWDG -); -pub const GPIO_BASE: usize = 0x48000000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC1_2 = 18, - ADC3 = 47, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - CAN2_RX0 = 87, - CAN2_RX1 = 88, - CAN2_SCE = 89, - CAN2_TX = 86, - COMP = 64, - CRS = 82, - DCMI = 85, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DFSDM1_FLT2 = 63, - DFSDM1_FLT3 = 42, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2D = 90, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 84, - I2C4_EV = 83, - LCD = 78, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - OTG_FS = 67, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SWPMI1 = 76, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_2); - declare!(ADC3); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(CAN2_RX0); - declare!(CAN2_RX1); - declare!(CAN2_SCE); - declare!(CAN2_TX); - declare!(COMP); - declare!(CRS); - declare!(DCMI); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DFSDM1_FLT2); - declare!(DFSDM1_FLT3); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2D); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LCD); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(OTG_FS); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_2(); - fn ADC3(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn CAN2_RX0(); - fn CAN2_RX1(); - fn CAN2_SCE(); - fn CAN2_TX(); - fn COMP(); - fn CRS(); - fn DCMI(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DFSDM1_FLT2(); - fn DFSDM1_FLT3(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2D(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LCD(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn OTG_FS(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 91] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1_2 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: DFSDM1_FLT3, - }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _handler: ADC3 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { - _handler: DFSDM1_FLT2, - }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TSC }, - Vector { _handler: LCD }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: CRS }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: DCMI }, - Vector { _handler: CAN2_TX }, - Vector { _handler: CAN2_RX0 }, - Vector { _handler: CAN2_RX1 }, - Vector { _handler: CAN2_SCE }, - Vector { _handler: DMA2D }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -impl_rng!(0x50060800); diff --git a/embassy-stm32/src/chip/stm32l496zg.rs b/embassy-stm32/src/chip/stm32l496zg.rs deleted file mode 100644 index bb4ecfae..00000000 --- a/embassy-stm32/src/chip/stm32l496zg.rs +++ /dev/null @@ -1,605 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, ADC3, CAN1, CAN2, COMP1, COMP2, DAC1, DCMI, DMA2D, PA0, - PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, PB2, - PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, PC4, - PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, - PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, - PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, - PI13, PI14, PI15, I2C1, I2C2, I2C3, I2C4, IWDG, LCD, LPTIM1, LPTIM2, LPUART1, OPAMP1, OPAMP2, - QUADSPI, RCC, RNG, RTC, SAI1, SAI2, SDMMC1, SPI1, SPI2, SPI3, SWPMI1, SYSCFG, TIM1, TIM15, - TIM16, TIM17, TIM2, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, TSC, UART4, UART5, USART1, USART2, - USART3, USB_OTG_FS, WWDG -); -pub const GPIO_BASE: usize = 0x48000000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC1_2 = 18, - ADC3 = 47, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - CAN2_RX0 = 87, - CAN2_RX1 = 88, - CAN2_SCE = 89, - CAN2_TX = 86, - COMP = 64, - CRS = 82, - DCMI = 85, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DFSDM1_FLT2 = 63, - DFSDM1_FLT3 = 42, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2D = 90, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 84, - I2C4_EV = 83, - LCD = 78, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - OTG_FS = 67, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SWPMI1 = 76, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_2); - declare!(ADC3); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(CAN2_RX0); - declare!(CAN2_RX1); - declare!(CAN2_SCE); - declare!(CAN2_TX); - declare!(COMP); - declare!(CRS); - declare!(DCMI); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DFSDM1_FLT2); - declare!(DFSDM1_FLT3); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2D); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LCD); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(OTG_FS); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_2(); - fn ADC3(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn CAN2_RX0(); - fn CAN2_RX1(); - fn CAN2_SCE(); - fn CAN2_TX(); - fn COMP(); - fn CRS(); - fn DCMI(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DFSDM1_FLT2(); - fn DFSDM1_FLT3(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2D(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LCD(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn OTG_FS(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 91] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1_2 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: DFSDM1_FLT3, - }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _handler: ADC3 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { - _handler: DFSDM1_FLT2, - }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TSC }, - Vector { _handler: LCD }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: CRS }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: DCMI }, - Vector { _handler: CAN2_TX }, - Vector { _handler: CAN2_RX0 }, - Vector { _handler: CAN2_RX1 }, - Vector { _handler: CAN2_SCE }, - Vector { _handler: DMA2D }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -impl_rng!(0x50060800); diff --git a/embassy-stm32/src/chip/stm32l4a6ag.rs b/embassy-stm32/src/chip/stm32l4a6ag.rs deleted file mode 100644 index e4bc4756..00000000 --- a/embassy-stm32/src/chip/stm32l4a6ag.rs +++ /dev/null @@ -1,608 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, ADC3, AES, CAN1, CAN2, COMP1, COMP2, DAC1, DCMI, DMA2D, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, - PI13, PI14, PI15, HASH, I2C1, I2C2, I2C3, I2C4, IWDG, LCD, LPTIM1, LPTIM2, LPUART1, OPAMP1, - OPAMP2, QUADSPI, RCC, RNG, RTC, SAI1, SAI2, SDMMC1, SPI1, SPI2, SPI3, SWPMI1, SYSCFG, TIM1, - TIM15, TIM16, TIM17, TIM2, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, TSC, UART4, UART5, USART1, - USART2, USART3, USB_OTG_FS, WWDG -); -pub const GPIO_BASE: usize = 0x48000000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC1_2 = 18, - ADC3 = 47, - AES = 79, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - CAN2_RX0 = 87, - CAN2_RX1 = 88, - CAN2_SCE = 89, - CAN2_TX = 86, - COMP = 64, - CRS = 82, - DCMI = 85, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DFSDM1_FLT2 = 63, - DFSDM1_FLT3 = 42, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2D = 90, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - HASH_RNG = 80, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 84, - I2C4_EV = 83, - LCD = 78, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - OTG_FS = 67, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SWPMI1 = 76, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_2); - declare!(ADC3); - declare!(AES); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(CAN2_RX0); - declare!(CAN2_RX1); - declare!(CAN2_SCE); - declare!(CAN2_TX); - declare!(COMP); - declare!(CRS); - declare!(DCMI); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DFSDM1_FLT2); - declare!(DFSDM1_FLT3); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2D); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HASH_RNG); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LCD); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(OTG_FS); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_2(); - fn ADC3(); - fn AES(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn CAN2_RX0(); - fn CAN2_RX1(); - fn CAN2_SCE(); - fn CAN2_TX(); - fn COMP(); - fn CRS(); - fn DCMI(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DFSDM1_FLT2(); - fn DFSDM1_FLT3(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2D(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HASH_RNG(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LCD(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn OTG_FS(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 91] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1_2 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: DFSDM1_FLT3, - }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _handler: ADC3 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { - _handler: DFSDM1_FLT2, - }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TSC }, - Vector { _handler: LCD }, - Vector { _handler: AES }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - Vector { _handler: CRS }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: DCMI }, - Vector { _handler: CAN2_TX }, - Vector { _handler: CAN2_RX0 }, - Vector { _handler: CAN2_RX1 }, - Vector { _handler: CAN2_SCE }, - Vector { _handler: DMA2D }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -impl_rng!(0x50060800); diff --git a/embassy-stm32/src/chip/stm32l4a6qg.rs b/embassy-stm32/src/chip/stm32l4a6qg.rs deleted file mode 100644 index e4bc4756..00000000 --- a/embassy-stm32/src/chip/stm32l4a6qg.rs +++ /dev/null @@ -1,608 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, ADC3, AES, CAN1, CAN2, COMP1, COMP2, DAC1, DCMI, DMA2D, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, - PI13, PI14, PI15, HASH, I2C1, I2C2, I2C3, I2C4, IWDG, LCD, LPTIM1, LPTIM2, LPUART1, OPAMP1, - OPAMP2, QUADSPI, RCC, RNG, RTC, SAI1, SAI2, SDMMC1, SPI1, SPI2, SPI3, SWPMI1, SYSCFG, TIM1, - TIM15, TIM16, TIM17, TIM2, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, TSC, UART4, UART5, USART1, - USART2, USART3, USB_OTG_FS, WWDG -); -pub const GPIO_BASE: usize = 0x48000000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC1_2 = 18, - ADC3 = 47, - AES = 79, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - CAN2_RX0 = 87, - CAN2_RX1 = 88, - CAN2_SCE = 89, - CAN2_TX = 86, - COMP = 64, - CRS = 82, - DCMI = 85, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DFSDM1_FLT2 = 63, - DFSDM1_FLT3 = 42, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2D = 90, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - HASH_RNG = 80, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 84, - I2C4_EV = 83, - LCD = 78, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - OTG_FS = 67, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SWPMI1 = 76, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_2); - declare!(ADC3); - declare!(AES); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(CAN2_RX0); - declare!(CAN2_RX1); - declare!(CAN2_SCE); - declare!(CAN2_TX); - declare!(COMP); - declare!(CRS); - declare!(DCMI); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DFSDM1_FLT2); - declare!(DFSDM1_FLT3); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2D); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HASH_RNG); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LCD); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(OTG_FS); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_2(); - fn ADC3(); - fn AES(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn CAN2_RX0(); - fn CAN2_RX1(); - fn CAN2_SCE(); - fn CAN2_TX(); - fn COMP(); - fn CRS(); - fn DCMI(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DFSDM1_FLT2(); - fn DFSDM1_FLT3(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2D(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HASH_RNG(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LCD(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn OTG_FS(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 91] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1_2 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: DFSDM1_FLT3, - }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _handler: ADC3 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { - _handler: DFSDM1_FLT2, - }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TSC }, - Vector { _handler: LCD }, - Vector { _handler: AES }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - Vector { _handler: CRS }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: DCMI }, - Vector { _handler: CAN2_TX }, - Vector { _handler: CAN2_RX0 }, - Vector { _handler: CAN2_RX1 }, - Vector { _handler: CAN2_SCE }, - Vector { _handler: DMA2D }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -impl_rng!(0x50060800); diff --git a/embassy-stm32/src/chip/stm32l4a6rg.rs b/embassy-stm32/src/chip/stm32l4a6rg.rs deleted file mode 100644 index e4bc4756..00000000 --- a/embassy-stm32/src/chip/stm32l4a6rg.rs +++ /dev/null @@ -1,608 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, ADC3, AES, CAN1, CAN2, COMP1, COMP2, DAC1, DCMI, DMA2D, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, - PI13, PI14, PI15, HASH, I2C1, I2C2, I2C3, I2C4, IWDG, LCD, LPTIM1, LPTIM2, LPUART1, OPAMP1, - OPAMP2, QUADSPI, RCC, RNG, RTC, SAI1, SAI2, SDMMC1, SPI1, SPI2, SPI3, SWPMI1, SYSCFG, TIM1, - TIM15, TIM16, TIM17, TIM2, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, TSC, UART4, UART5, USART1, - USART2, USART3, USB_OTG_FS, WWDG -); -pub const GPIO_BASE: usize = 0x48000000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC1_2 = 18, - ADC3 = 47, - AES = 79, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - CAN2_RX0 = 87, - CAN2_RX1 = 88, - CAN2_SCE = 89, - CAN2_TX = 86, - COMP = 64, - CRS = 82, - DCMI = 85, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DFSDM1_FLT2 = 63, - DFSDM1_FLT3 = 42, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2D = 90, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - HASH_RNG = 80, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 84, - I2C4_EV = 83, - LCD = 78, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - OTG_FS = 67, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SWPMI1 = 76, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_2); - declare!(ADC3); - declare!(AES); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(CAN2_RX0); - declare!(CAN2_RX1); - declare!(CAN2_SCE); - declare!(CAN2_TX); - declare!(COMP); - declare!(CRS); - declare!(DCMI); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DFSDM1_FLT2); - declare!(DFSDM1_FLT3); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2D); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HASH_RNG); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LCD); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(OTG_FS); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_2(); - fn ADC3(); - fn AES(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn CAN2_RX0(); - fn CAN2_RX1(); - fn CAN2_SCE(); - fn CAN2_TX(); - fn COMP(); - fn CRS(); - fn DCMI(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DFSDM1_FLT2(); - fn DFSDM1_FLT3(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2D(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HASH_RNG(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LCD(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn OTG_FS(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 91] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1_2 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: DFSDM1_FLT3, - }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _handler: ADC3 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { - _handler: DFSDM1_FLT2, - }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TSC }, - Vector { _handler: LCD }, - Vector { _handler: AES }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - Vector { _handler: CRS }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: DCMI }, - Vector { _handler: CAN2_TX }, - Vector { _handler: CAN2_RX0 }, - Vector { _handler: CAN2_RX1 }, - Vector { _handler: CAN2_SCE }, - Vector { _handler: DMA2D }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -impl_rng!(0x50060800); diff --git a/embassy-stm32/src/chip/stm32l4a6vg.rs b/embassy-stm32/src/chip/stm32l4a6vg.rs deleted file mode 100644 index e4bc4756..00000000 --- a/embassy-stm32/src/chip/stm32l4a6vg.rs +++ /dev/null @@ -1,608 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, ADC3, AES, CAN1, CAN2, COMP1, COMP2, DAC1, DCMI, DMA2D, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, - PI13, PI14, PI15, HASH, I2C1, I2C2, I2C3, I2C4, IWDG, LCD, LPTIM1, LPTIM2, LPUART1, OPAMP1, - OPAMP2, QUADSPI, RCC, RNG, RTC, SAI1, SAI2, SDMMC1, SPI1, SPI2, SPI3, SWPMI1, SYSCFG, TIM1, - TIM15, TIM16, TIM17, TIM2, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, TSC, UART4, UART5, USART1, - USART2, USART3, USB_OTG_FS, WWDG -); -pub const GPIO_BASE: usize = 0x48000000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC1_2 = 18, - ADC3 = 47, - AES = 79, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - CAN2_RX0 = 87, - CAN2_RX1 = 88, - CAN2_SCE = 89, - CAN2_TX = 86, - COMP = 64, - CRS = 82, - DCMI = 85, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DFSDM1_FLT2 = 63, - DFSDM1_FLT3 = 42, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2D = 90, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - HASH_RNG = 80, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 84, - I2C4_EV = 83, - LCD = 78, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - OTG_FS = 67, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SWPMI1 = 76, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_2); - declare!(ADC3); - declare!(AES); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(CAN2_RX0); - declare!(CAN2_RX1); - declare!(CAN2_SCE); - declare!(CAN2_TX); - declare!(COMP); - declare!(CRS); - declare!(DCMI); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DFSDM1_FLT2); - declare!(DFSDM1_FLT3); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2D); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HASH_RNG); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LCD); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(OTG_FS); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_2(); - fn ADC3(); - fn AES(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn CAN2_RX0(); - fn CAN2_RX1(); - fn CAN2_SCE(); - fn CAN2_TX(); - fn COMP(); - fn CRS(); - fn DCMI(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DFSDM1_FLT2(); - fn DFSDM1_FLT3(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2D(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HASH_RNG(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LCD(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn OTG_FS(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 91] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1_2 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: DFSDM1_FLT3, - }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _handler: ADC3 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { - _handler: DFSDM1_FLT2, - }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TSC }, - Vector { _handler: LCD }, - Vector { _handler: AES }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - Vector { _handler: CRS }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: DCMI }, - Vector { _handler: CAN2_TX }, - Vector { _handler: CAN2_RX0 }, - Vector { _handler: CAN2_RX1 }, - Vector { _handler: CAN2_SCE }, - Vector { _handler: DMA2D }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -impl_rng!(0x50060800); diff --git a/embassy-stm32/src/chip/stm32l4a6zg.rs b/embassy-stm32/src/chip/stm32l4a6zg.rs deleted file mode 100644 index e4bc4756..00000000 --- a/embassy-stm32/src/chip/stm32l4a6zg.rs +++ /dev/null @@ -1,608 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, ADC3, AES, CAN1, CAN2, COMP1, COMP2, DAC1, DCMI, DMA2D, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, - PI13, PI14, PI15, HASH, I2C1, I2C2, I2C3, I2C4, IWDG, LCD, LPTIM1, LPTIM2, LPUART1, OPAMP1, - OPAMP2, QUADSPI, RCC, RNG, RTC, SAI1, SAI2, SDMMC1, SPI1, SPI2, SPI3, SWPMI1, SYSCFG, TIM1, - TIM15, TIM16, TIM17, TIM2, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, TSC, UART4, UART5, USART1, - USART2, USART3, USB_OTG_FS, WWDG -); -pub const GPIO_BASE: usize = 0x48000000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC1_2 = 18, - ADC3 = 47, - AES = 79, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - CAN2_RX0 = 87, - CAN2_RX1 = 88, - CAN2_SCE = 89, - CAN2_TX = 86, - COMP = 64, - CRS = 82, - DCMI = 85, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DFSDM1_FLT2 = 63, - DFSDM1_FLT3 = 42, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2D = 90, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - HASH_RNG = 80, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 84, - I2C4_EV = 83, - LCD = 78, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - OTG_FS = 67, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SWPMI1 = 76, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_2); - declare!(ADC3); - declare!(AES); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(CAN2_RX0); - declare!(CAN2_RX1); - declare!(CAN2_SCE); - declare!(CAN2_TX); - declare!(COMP); - declare!(CRS); - declare!(DCMI); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DFSDM1_FLT2); - declare!(DFSDM1_FLT3); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2D); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HASH_RNG); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LCD); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(OTG_FS); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_2(); - fn ADC3(); - fn AES(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn CAN2_RX0(); - fn CAN2_RX1(); - fn CAN2_SCE(); - fn CAN2_TX(); - fn COMP(); - fn CRS(); - fn DCMI(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DFSDM1_FLT2(); - fn DFSDM1_FLT3(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2D(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HASH_RNG(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LCD(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn OTG_FS(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 91] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1_2 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: DFSDM1_FLT3, - }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _handler: ADC3 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { - _handler: DFSDM1_FLT2, - }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TSC }, - Vector { _handler: LCD }, - Vector { _handler: AES }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - Vector { _handler: CRS }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: DCMI }, - Vector { _handler: CAN2_TX }, - Vector { _handler: CAN2_RX0 }, - Vector { _handler: CAN2_RX1 }, - Vector { _handler: CAN2_SCE }, - Vector { _handler: DMA2D }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -impl_rng!(0x50060800); diff --git a/embassy-stm32/src/chip/stm32l4p5ae.rs b/embassy-stm32/src/chip/stm32l4p5ae.rs deleted file mode 100644 index e2867eca..00000000 --- a/embassy-stm32/src/chip/stm32l4p5ae.rs +++ /dev/null @@ -1,597 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, CAN1, COMP1, COMP2, DAC1, DCMI, DMA2D, PA0, PA1, PA2, PA3, - PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, - PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, - PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, - PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, - PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, - PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, - PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, - PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, PI13, PI14, - PI15, HASH, I2C1, I2C2, I2C3, I2C4, IWDG, LPTIM1, LPTIM2, LPUART1, LTDC, OCTOSPI1, OCTOSPI2, - OCTOSPIM, OPAMP1, OPAMP2, PSSI, RCC, RNG, RTC, SAI1, SAI2, SDMMC1, SDMMC2, SPI1, SPI2, SPI3, - SYSCFG, TIM1, TIM15, TIM16, TIM17, TIM2, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, TSC, UART4, UART5, - USART1, USART2, USART3, USB_OTG_FS, WWDG -); -pub const GPIO_BASE: usize = 0x48000000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC1_2 = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - DCMI_PSSI = 85, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2D = 90, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - DMAMUX1_OVR = 94, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - HASH_CRS = 82, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 83, - I2C4_EV = 84, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - LTDC = 91, - LTDC_ER = 92, - OCTOSPI1 = 71, - OCTOSPI2 = 76, - OTG_FS = 67, - PVD_PVM = 1, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SDMMC2 = 47, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_2); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(DCMI_PSSI); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2D); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(DMAMUX1_OVR); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HASH_CRS); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTG_FS); - declare!(PVD_PVM); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_2(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn DCMI_PSSI(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2D(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn DMAMUX1_OVR(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HASH_CRS(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTG_FS(); - fn PVD_PVM(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SDMMC2(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 95] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1_2 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _handler: SDMMC2 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { _reserved: 0 }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: OCTOSPI2 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: HASH_CRS }, - Vector { _handler: I2C4_ER }, - Vector { _handler: I2C4_EV }, - Vector { - _handler: DCMI_PSSI, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: DMA2D }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _reserved: 0 }, - Vector { - _handler: DMAMUX1_OVR, - }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -impl_rng!(0x50060800); diff --git a/embassy-stm32/src/chip/stm32l4p5ag.rs b/embassy-stm32/src/chip/stm32l4p5ag.rs deleted file mode 100644 index e2867eca..00000000 --- a/embassy-stm32/src/chip/stm32l4p5ag.rs +++ /dev/null @@ -1,597 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, CAN1, COMP1, COMP2, DAC1, DCMI, DMA2D, PA0, PA1, PA2, PA3, - PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, - PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, - PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, - PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, - PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, - PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, - PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, - PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, PI13, PI14, - PI15, HASH, I2C1, I2C2, I2C3, I2C4, IWDG, LPTIM1, LPTIM2, LPUART1, LTDC, OCTOSPI1, OCTOSPI2, - OCTOSPIM, OPAMP1, OPAMP2, PSSI, RCC, RNG, RTC, SAI1, SAI2, SDMMC1, SDMMC2, SPI1, SPI2, SPI3, - SYSCFG, TIM1, TIM15, TIM16, TIM17, TIM2, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, TSC, UART4, UART5, - USART1, USART2, USART3, USB_OTG_FS, WWDG -); -pub const GPIO_BASE: usize = 0x48000000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC1_2 = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - DCMI_PSSI = 85, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2D = 90, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - DMAMUX1_OVR = 94, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - HASH_CRS = 82, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 83, - I2C4_EV = 84, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - LTDC = 91, - LTDC_ER = 92, - OCTOSPI1 = 71, - OCTOSPI2 = 76, - OTG_FS = 67, - PVD_PVM = 1, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SDMMC2 = 47, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_2); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(DCMI_PSSI); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2D); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(DMAMUX1_OVR); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HASH_CRS); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTG_FS); - declare!(PVD_PVM); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_2(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn DCMI_PSSI(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2D(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn DMAMUX1_OVR(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HASH_CRS(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTG_FS(); - fn PVD_PVM(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SDMMC2(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 95] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1_2 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _handler: SDMMC2 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { _reserved: 0 }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: OCTOSPI2 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: HASH_CRS }, - Vector { _handler: I2C4_ER }, - Vector { _handler: I2C4_EV }, - Vector { - _handler: DCMI_PSSI, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: DMA2D }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _reserved: 0 }, - Vector { - _handler: DMAMUX1_OVR, - }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -impl_rng!(0x50060800); diff --git a/embassy-stm32/src/chip/stm32l4p5ce.rs b/embassy-stm32/src/chip/stm32l4p5ce.rs deleted file mode 100644 index f2e7c308..00000000 --- a/embassy-stm32/src/chip/stm32l4p5ce.rs +++ /dev/null @@ -1,597 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, CAN1, COMP1, COMP2, DAC1, DMA2D, PA0, PA1, PA2, PA3, PA4, - PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, - PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, - PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, - PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, - PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, - PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, - PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, - PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, PI13, PI14, - PI15, HASH, I2C1, I2C2, I2C3, I2C4, IWDG, LPTIM1, LPTIM2, LPUART1, LTDC, OCTOSPI1, OCTOSPI2, - OCTOSPIM, OPAMP1, OPAMP2, RCC, RNG, RTC, SAI1, SAI2, SDMMC2, SPI1, SPI2, SPI3, SYSCFG, TIM1, - TIM15, TIM16, TIM17, TIM2, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, TSC, UART4, USART1, USART2, - USART3, USB_OTG_FS, WWDG -); -pub const GPIO_BASE: usize = 0x48000000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC1_2 = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - DCMI_PSSI = 85, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2D = 90, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - DMAMUX1_OVR = 94, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - HASH_CRS = 82, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 83, - I2C4_EV = 84, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - LTDC = 91, - LTDC_ER = 92, - OCTOSPI1 = 71, - OCTOSPI2 = 76, - OTG_FS = 67, - PVD_PVM = 1, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SDMMC2 = 47, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_2); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(DCMI_PSSI); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2D); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(DMAMUX1_OVR); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HASH_CRS); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTG_FS); - declare!(PVD_PVM); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_2(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn DCMI_PSSI(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2D(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn DMAMUX1_OVR(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HASH_CRS(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTG_FS(); - fn PVD_PVM(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SDMMC2(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 95] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1_2 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _handler: SDMMC2 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { _reserved: 0 }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: OCTOSPI2 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: HASH_CRS }, - Vector { _handler: I2C4_ER }, - Vector { _handler: I2C4_EV }, - Vector { - _handler: DCMI_PSSI, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: DMA2D }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _reserved: 0 }, - Vector { - _handler: DMAMUX1_OVR, - }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -impl_rng!(0x50060800); diff --git a/embassy-stm32/src/chip/stm32l4p5cg.rs b/embassy-stm32/src/chip/stm32l4p5cg.rs deleted file mode 100644 index f2e7c308..00000000 --- a/embassy-stm32/src/chip/stm32l4p5cg.rs +++ /dev/null @@ -1,597 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, CAN1, COMP1, COMP2, DAC1, DMA2D, PA0, PA1, PA2, PA3, PA4, - PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, - PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, - PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, - PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, - PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, - PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, - PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, - PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, PI13, PI14, - PI15, HASH, I2C1, I2C2, I2C3, I2C4, IWDG, LPTIM1, LPTIM2, LPUART1, LTDC, OCTOSPI1, OCTOSPI2, - OCTOSPIM, OPAMP1, OPAMP2, RCC, RNG, RTC, SAI1, SAI2, SDMMC2, SPI1, SPI2, SPI3, SYSCFG, TIM1, - TIM15, TIM16, TIM17, TIM2, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, TSC, UART4, USART1, USART2, - USART3, USB_OTG_FS, WWDG -); -pub const GPIO_BASE: usize = 0x48000000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC1_2 = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - DCMI_PSSI = 85, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2D = 90, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - DMAMUX1_OVR = 94, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - HASH_CRS = 82, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 83, - I2C4_EV = 84, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - LTDC = 91, - LTDC_ER = 92, - OCTOSPI1 = 71, - OCTOSPI2 = 76, - OTG_FS = 67, - PVD_PVM = 1, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SDMMC2 = 47, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_2); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(DCMI_PSSI); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2D); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(DMAMUX1_OVR); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HASH_CRS); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTG_FS); - declare!(PVD_PVM); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_2(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn DCMI_PSSI(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2D(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn DMAMUX1_OVR(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HASH_CRS(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTG_FS(); - fn PVD_PVM(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SDMMC2(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 95] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1_2 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _handler: SDMMC2 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { _reserved: 0 }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: OCTOSPI2 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: HASH_CRS }, - Vector { _handler: I2C4_ER }, - Vector { _handler: I2C4_EV }, - Vector { - _handler: DCMI_PSSI, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: DMA2D }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _reserved: 0 }, - Vector { - _handler: DMAMUX1_OVR, - }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -impl_rng!(0x50060800); diff --git a/embassy-stm32/src/chip/stm32l4p5qe.rs b/embassy-stm32/src/chip/stm32l4p5qe.rs deleted file mode 100644 index e2867eca..00000000 --- a/embassy-stm32/src/chip/stm32l4p5qe.rs +++ /dev/null @@ -1,597 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, CAN1, COMP1, COMP2, DAC1, DCMI, DMA2D, PA0, PA1, PA2, PA3, - PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, - PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, - PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, - PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, - PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, - PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, - PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, - PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, PI13, PI14, - PI15, HASH, I2C1, I2C2, I2C3, I2C4, IWDG, LPTIM1, LPTIM2, LPUART1, LTDC, OCTOSPI1, OCTOSPI2, - OCTOSPIM, OPAMP1, OPAMP2, PSSI, RCC, RNG, RTC, SAI1, SAI2, SDMMC1, SDMMC2, SPI1, SPI2, SPI3, - SYSCFG, TIM1, TIM15, TIM16, TIM17, TIM2, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, TSC, UART4, UART5, - USART1, USART2, USART3, USB_OTG_FS, WWDG -); -pub const GPIO_BASE: usize = 0x48000000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC1_2 = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - DCMI_PSSI = 85, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2D = 90, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - DMAMUX1_OVR = 94, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - HASH_CRS = 82, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 83, - I2C4_EV = 84, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - LTDC = 91, - LTDC_ER = 92, - OCTOSPI1 = 71, - OCTOSPI2 = 76, - OTG_FS = 67, - PVD_PVM = 1, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SDMMC2 = 47, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_2); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(DCMI_PSSI); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2D); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(DMAMUX1_OVR); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HASH_CRS); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTG_FS); - declare!(PVD_PVM); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_2(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn DCMI_PSSI(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2D(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn DMAMUX1_OVR(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HASH_CRS(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTG_FS(); - fn PVD_PVM(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SDMMC2(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 95] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1_2 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _handler: SDMMC2 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { _reserved: 0 }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: OCTOSPI2 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: HASH_CRS }, - Vector { _handler: I2C4_ER }, - Vector { _handler: I2C4_EV }, - Vector { - _handler: DCMI_PSSI, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: DMA2D }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _reserved: 0 }, - Vector { - _handler: DMAMUX1_OVR, - }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -impl_rng!(0x50060800); diff --git a/embassy-stm32/src/chip/stm32l4p5qg.rs b/embassy-stm32/src/chip/stm32l4p5qg.rs deleted file mode 100644 index e2867eca..00000000 --- a/embassy-stm32/src/chip/stm32l4p5qg.rs +++ /dev/null @@ -1,597 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, CAN1, COMP1, COMP2, DAC1, DCMI, DMA2D, PA0, PA1, PA2, PA3, - PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, - PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, - PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, - PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, - PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, - PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, - PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, - PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, PI13, PI14, - PI15, HASH, I2C1, I2C2, I2C3, I2C4, IWDG, LPTIM1, LPTIM2, LPUART1, LTDC, OCTOSPI1, OCTOSPI2, - OCTOSPIM, OPAMP1, OPAMP2, PSSI, RCC, RNG, RTC, SAI1, SAI2, SDMMC1, SDMMC2, SPI1, SPI2, SPI3, - SYSCFG, TIM1, TIM15, TIM16, TIM17, TIM2, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, TSC, UART4, UART5, - USART1, USART2, USART3, USB_OTG_FS, WWDG -); -pub const GPIO_BASE: usize = 0x48000000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC1_2 = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - DCMI_PSSI = 85, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2D = 90, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - DMAMUX1_OVR = 94, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - HASH_CRS = 82, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 83, - I2C4_EV = 84, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - LTDC = 91, - LTDC_ER = 92, - OCTOSPI1 = 71, - OCTOSPI2 = 76, - OTG_FS = 67, - PVD_PVM = 1, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SDMMC2 = 47, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_2); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(DCMI_PSSI); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2D); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(DMAMUX1_OVR); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HASH_CRS); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTG_FS); - declare!(PVD_PVM); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_2(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn DCMI_PSSI(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2D(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn DMAMUX1_OVR(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HASH_CRS(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTG_FS(); - fn PVD_PVM(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SDMMC2(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 95] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1_2 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _handler: SDMMC2 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { _reserved: 0 }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: OCTOSPI2 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: HASH_CRS }, - Vector { _handler: I2C4_ER }, - Vector { _handler: I2C4_EV }, - Vector { - _handler: DCMI_PSSI, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: DMA2D }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _reserved: 0 }, - Vector { - _handler: DMAMUX1_OVR, - }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -impl_rng!(0x50060800); diff --git a/embassy-stm32/src/chip/stm32l4p5re.rs b/embassy-stm32/src/chip/stm32l4p5re.rs deleted file mode 100644 index 9b27401b..00000000 --- a/embassy-stm32/src/chip/stm32l4p5re.rs +++ /dev/null @@ -1,597 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, CAN1, COMP1, COMP2, DAC1, DCMI, DMA2D, PA0, PA1, PA2, PA3, - PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, - PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, - PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, - PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, - PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, - PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, - PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, - PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, PI13, PI14, - PI15, HASH, I2C1, I2C2, I2C3, I2C4, IWDG, LPTIM1, LPTIM2, LPUART1, LTDC, OCTOSPI1, OCTOSPI2, - OCTOSPIM, OPAMP1, OPAMP2, PSSI, RCC, RNG, RTC, SAI1, SAI2, SDMMC1, SDMMC2, SPI1, SPI2, SPI3, - SYSCFG, TIM1, TIM15, TIM16, TIM17, TIM2, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, TSC, UART4, - USART1, USART2, USART3, USB_OTG_FS, WWDG -); -pub const GPIO_BASE: usize = 0x48000000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC1_2 = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - DCMI_PSSI = 85, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2D = 90, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - DMAMUX1_OVR = 94, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - HASH_CRS = 82, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 83, - I2C4_EV = 84, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - LTDC = 91, - LTDC_ER = 92, - OCTOSPI1 = 71, - OCTOSPI2 = 76, - OTG_FS = 67, - PVD_PVM = 1, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SDMMC2 = 47, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_2); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(DCMI_PSSI); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2D); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(DMAMUX1_OVR); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HASH_CRS); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTG_FS); - declare!(PVD_PVM); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_2(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn DCMI_PSSI(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2D(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn DMAMUX1_OVR(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HASH_CRS(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTG_FS(); - fn PVD_PVM(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SDMMC2(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 95] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1_2 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _handler: SDMMC2 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { _reserved: 0 }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: OCTOSPI2 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: HASH_CRS }, - Vector { _handler: I2C4_ER }, - Vector { _handler: I2C4_EV }, - Vector { - _handler: DCMI_PSSI, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: DMA2D }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _reserved: 0 }, - Vector { - _handler: DMAMUX1_OVR, - }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -impl_rng!(0x50060800); diff --git a/embassy-stm32/src/chip/stm32l4p5rg.rs b/embassy-stm32/src/chip/stm32l4p5rg.rs deleted file mode 100644 index 9b27401b..00000000 --- a/embassy-stm32/src/chip/stm32l4p5rg.rs +++ /dev/null @@ -1,597 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, CAN1, COMP1, COMP2, DAC1, DCMI, DMA2D, PA0, PA1, PA2, PA3, - PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, - PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, - PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, - PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, - PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, - PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, - PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, - PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, PI13, PI14, - PI15, HASH, I2C1, I2C2, I2C3, I2C4, IWDG, LPTIM1, LPTIM2, LPUART1, LTDC, OCTOSPI1, OCTOSPI2, - OCTOSPIM, OPAMP1, OPAMP2, PSSI, RCC, RNG, RTC, SAI1, SAI2, SDMMC1, SDMMC2, SPI1, SPI2, SPI3, - SYSCFG, TIM1, TIM15, TIM16, TIM17, TIM2, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, TSC, UART4, - USART1, USART2, USART3, USB_OTG_FS, WWDG -); -pub const GPIO_BASE: usize = 0x48000000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC1_2 = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - DCMI_PSSI = 85, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2D = 90, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - DMAMUX1_OVR = 94, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - HASH_CRS = 82, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 83, - I2C4_EV = 84, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - LTDC = 91, - LTDC_ER = 92, - OCTOSPI1 = 71, - OCTOSPI2 = 76, - OTG_FS = 67, - PVD_PVM = 1, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SDMMC2 = 47, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_2); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(DCMI_PSSI); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2D); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(DMAMUX1_OVR); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HASH_CRS); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTG_FS); - declare!(PVD_PVM); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_2(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn DCMI_PSSI(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2D(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn DMAMUX1_OVR(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HASH_CRS(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTG_FS(); - fn PVD_PVM(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SDMMC2(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 95] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1_2 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _handler: SDMMC2 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { _reserved: 0 }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: OCTOSPI2 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: HASH_CRS }, - Vector { _handler: I2C4_ER }, - Vector { _handler: I2C4_EV }, - Vector { - _handler: DCMI_PSSI, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: DMA2D }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _reserved: 0 }, - Vector { - _handler: DMAMUX1_OVR, - }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -impl_rng!(0x50060800); diff --git a/embassy-stm32/src/chip/stm32l4p5ve.rs b/embassy-stm32/src/chip/stm32l4p5ve.rs deleted file mode 100644 index e2867eca..00000000 --- a/embassy-stm32/src/chip/stm32l4p5ve.rs +++ /dev/null @@ -1,597 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, CAN1, COMP1, COMP2, DAC1, DCMI, DMA2D, PA0, PA1, PA2, PA3, - PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, - PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, - PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, - PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, - PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, - PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, - PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, - PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, PI13, PI14, - PI15, HASH, I2C1, I2C2, I2C3, I2C4, IWDG, LPTIM1, LPTIM2, LPUART1, LTDC, OCTOSPI1, OCTOSPI2, - OCTOSPIM, OPAMP1, OPAMP2, PSSI, RCC, RNG, RTC, SAI1, SAI2, SDMMC1, SDMMC2, SPI1, SPI2, SPI3, - SYSCFG, TIM1, TIM15, TIM16, TIM17, TIM2, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, TSC, UART4, UART5, - USART1, USART2, USART3, USB_OTG_FS, WWDG -); -pub const GPIO_BASE: usize = 0x48000000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC1_2 = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - DCMI_PSSI = 85, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2D = 90, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - DMAMUX1_OVR = 94, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - HASH_CRS = 82, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 83, - I2C4_EV = 84, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - LTDC = 91, - LTDC_ER = 92, - OCTOSPI1 = 71, - OCTOSPI2 = 76, - OTG_FS = 67, - PVD_PVM = 1, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SDMMC2 = 47, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_2); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(DCMI_PSSI); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2D); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(DMAMUX1_OVR); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HASH_CRS); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTG_FS); - declare!(PVD_PVM); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_2(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn DCMI_PSSI(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2D(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn DMAMUX1_OVR(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HASH_CRS(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTG_FS(); - fn PVD_PVM(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SDMMC2(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 95] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1_2 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _handler: SDMMC2 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { _reserved: 0 }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: OCTOSPI2 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: HASH_CRS }, - Vector { _handler: I2C4_ER }, - Vector { _handler: I2C4_EV }, - Vector { - _handler: DCMI_PSSI, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: DMA2D }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _reserved: 0 }, - Vector { - _handler: DMAMUX1_OVR, - }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -impl_rng!(0x50060800); diff --git a/embassy-stm32/src/chip/stm32l4p5vg.rs b/embassy-stm32/src/chip/stm32l4p5vg.rs deleted file mode 100644 index e2867eca..00000000 --- a/embassy-stm32/src/chip/stm32l4p5vg.rs +++ /dev/null @@ -1,597 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, CAN1, COMP1, COMP2, DAC1, DCMI, DMA2D, PA0, PA1, PA2, PA3, - PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, - PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, - PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, - PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, - PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, - PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, - PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, - PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, PI13, PI14, - PI15, HASH, I2C1, I2C2, I2C3, I2C4, IWDG, LPTIM1, LPTIM2, LPUART1, LTDC, OCTOSPI1, OCTOSPI2, - OCTOSPIM, OPAMP1, OPAMP2, PSSI, RCC, RNG, RTC, SAI1, SAI2, SDMMC1, SDMMC2, SPI1, SPI2, SPI3, - SYSCFG, TIM1, TIM15, TIM16, TIM17, TIM2, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, TSC, UART4, UART5, - USART1, USART2, USART3, USB_OTG_FS, WWDG -); -pub const GPIO_BASE: usize = 0x48000000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC1_2 = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - DCMI_PSSI = 85, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2D = 90, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - DMAMUX1_OVR = 94, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - HASH_CRS = 82, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 83, - I2C4_EV = 84, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - LTDC = 91, - LTDC_ER = 92, - OCTOSPI1 = 71, - OCTOSPI2 = 76, - OTG_FS = 67, - PVD_PVM = 1, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SDMMC2 = 47, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_2); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(DCMI_PSSI); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2D); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(DMAMUX1_OVR); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HASH_CRS); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTG_FS); - declare!(PVD_PVM); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_2(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn DCMI_PSSI(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2D(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn DMAMUX1_OVR(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HASH_CRS(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTG_FS(); - fn PVD_PVM(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SDMMC2(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 95] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1_2 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _handler: SDMMC2 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { _reserved: 0 }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: OCTOSPI2 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: HASH_CRS }, - Vector { _handler: I2C4_ER }, - Vector { _handler: I2C4_EV }, - Vector { - _handler: DCMI_PSSI, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: DMA2D }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _reserved: 0 }, - Vector { - _handler: DMAMUX1_OVR, - }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -impl_rng!(0x50060800); diff --git a/embassy-stm32/src/chip/stm32l4p5ze.rs b/embassy-stm32/src/chip/stm32l4p5ze.rs deleted file mode 100644 index e2867eca..00000000 --- a/embassy-stm32/src/chip/stm32l4p5ze.rs +++ /dev/null @@ -1,597 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, CAN1, COMP1, COMP2, DAC1, DCMI, DMA2D, PA0, PA1, PA2, PA3, - PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, - PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, - PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, - PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, - PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, - PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, - PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, - PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, PI13, PI14, - PI15, HASH, I2C1, I2C2, I2C3, I2C4, IWDG, LPTIM1, LPTIM2, LPUART1, LTDC, OCTOSPI1, OCTOSPI2, - OCTOSPIM, OPAMP1, OPAMP2, PSSI, RCC, RNG, RTC, SAI1, SAI2, SDMMC1, SDMMC2, SPI1, SPI2, SPI3, - SYSCFG, TIM1, TIM15, TIM16, TIM17, TIM2, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, TSC, UART4, UART5, - USART1, USART2, USART3, USB_OTG_FS, WWDG -); -pub const GPIO_BASE: usize = 0x48000000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC1_2 = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - DCMI_PSSI = 85, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2D = 90, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - DMAMUX1_OVR = 94, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - HASH_CRS = 82, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 83, - I2C4_EV = 84, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - LTDC = 91, - LTDC_ER = 92, - OCTOSPI1 = 71, - OCTOSPI2 = 76, - OTG_FS = 67, - PVD_PVM = 1, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SDMMC2 = 47, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_2); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(DCMI_PSSI); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2D); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(DMAMUX1_OVR); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HASH_CRS); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTG_FS); - declare!(PVD_PVM); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_2(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn DCMI_PSSI(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2D(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn DMAMUX1_OVR(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HASH_CRS(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTG_FS(); - fn PVD_PVM(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SDMMC2(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 95] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1_2 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _handler: SDMMC2 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { _reserved: 0 }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: OCTOSPI2 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: HASH_CRS }, - Vector { _handler: I2C4_ER }, - Vector { _handler: I2C4_EV }, - Vector { - _handler: DCMI_PSSI, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: DMA2D }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _reserved: 0 }, - Vector { - _handler: DMAMUX1_OVR, - }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -impl_rng!(0x50060800); diff --git a/embassy-stm32/src/chip/stm32l4p5zg.rs b/embassy-stm32/src/chip/stm32l4p5zg.rs deleted file mode 100644 index e2867eca..00000000 --- a/embassy-stm32/src/chip/stm32l4p5zg.rs +++ /dev/null @@ -1,597 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, CAN1, COMP1, COMP2, DAC1, DCMI, DMA2D, PA0, PA1, PA2, PA3, - PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, - PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, - PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, - PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, - PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, - PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, - PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, - PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, PI13, PI14, - PI15, HASH, I2C1, I2C2, I2C3, I2C4, IWDG, LPTIM1, LPTIM2, LPUART1, LTDC, OCTOSPI1, OCTOSPI2, - OCTOSPIM, OPAMP1, OPAMP2, PSSI, RCC, RNG, RTC, SAI1, SAI2, SDMMC1, SDMMC2, SPI1, SPI2, SPI3, - SYSCFG, TIM1, TIM15, TIM16, TIM17, TIM2, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, TSC, UART4, UART5, - USART1, USART2, USART3, USB_OTG_FS, WWDG -); -pub const GPIO_BASE: usize = 0x48000000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC1_2 = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - DCMI_PSSI = 85, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2D = 90, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - DMAMUX1_OVR = 94, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - HASH_CRS = 82, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 83, - I2C4_EV = 84, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - LTDC = 91, - LTDC_ER = 92, - OCTOSPI1 = 71, - OCTOSPI2 = 76, - OTG_FS = 67, - PVD_PVM = 1, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SDMMC2 = 47, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_2); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(DCMI_PSSI); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2D); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(DMAMUX1_OVR); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HASH_CRS); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTG_FS); - declare!(PVD_PVM); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_2(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn DCMI_PSSI(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2D(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn DMAMUX1_OVR(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HASH_CRS(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTG_FS(); - fn PVD_PVM(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SDMMC2(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 95] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1_2 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _handler: SDMMC2 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { _reserved: 0 }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: OCTOSPI2 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: HASH_CRS }, - Vector { _handler: I2C4_ER }, - Vector { _handler: I2C4_EV }, - Vector { - _handler: DCMI_PSSI, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: DMA2D }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _reserved: 0 }, - Vector { - _handler: DMAMUX1_OVR, - }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -impl_rng!(0x50060800); diff --git a/embassy-stm32/src/chip/stm32l4q5ag.rs b/embassy-stm32/src/chip/stm32l4q5ag.rs deleted file mode 100644 index 9bc33dee..00000000 --- a/embassy-stm32/src/chip/stm32l4q5ag.rs +++ /dev/null @@ -1,603 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, AES, CAN1, COMP1, COMP2, DAC1, DCMI, DMA2D, PA0, PA1, PA2, - PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, - PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, - PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, - PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, - PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, - PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, - PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, - PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, PI13, - PI14, PI15, HASH, I2C1, I2C2, I2C3, I2C4, IWDG, LPTIM1, LPTIM2, LPUART1, LTDC, OCTOSPI1, - OCTOSPI2, OCTOSPIM, OPAMP1, OPAMP2, PKA, PSSI, RCC, RNG, RTC, SAI1, SAI2, SDMMC1, SDMMC2, SPI1, - SPI2, SPI3, SYSCFG, TIM1, TIM15, TIM16, TIM17, TIM2, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, TSC, - UART4, UART5, USART1, USART2, USART3, USB_OTG_FS, WWDG -); -pub const GPIO_BASE: usize = 0x48000000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC1_2 = 18, - AES = 79, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - DCMI_PSSI = 85, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2D = 90, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - DMAMUX1_OVR = 94, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - HASH_CRS = 82, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 83, - I2C4_EV = 84, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - LTDC = 91, - LTDC_ER = 92, - OCTOSPI1 = 71, - OCTOSPI2 = 76, - OTG_FS = 67, - PKA = 86, - PVD_PVM = 1, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SDMMC2 = 47, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_2); - declare!(AES); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(DCMI_PSSI); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2D); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(DMAMUX1_OVR); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HASH_CRS); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTG_FS); - declare!(PKA); - declare!(PVD_PVM); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_2(); - fn AES(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn DCMI_PSSI(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2D(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn DMAMUX1_OVR(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HASH_CRS(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTG_FS(); - fn PKA(); - fn PVD_PVM(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SDMMC2(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 95] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1_2 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _handler: SDMMC2 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { _reserved: 0 }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: OCTOSPI2 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _handler: AES }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: HASH_CRS }, - Vector { _handler: I2C4_ER }, - Vector { _handler: I2C4_EV }, - Vector { - _handler: DCMI_PSSI, - }, - Vector { _handler: PKA }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: DMA2D }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _reserved: 0 }, - Vector { - _handler: DMAMUX1_OVR, - }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -impl_rng!(0x50060800); diff --git a/embassy-stm32/src/chip/stm32l4q5cg.rs b/embassy-stm32/src/chip/stm32l4q5cg.rs deleted file mode 100644 index b5d3cfc4..00000000 --- a/embassy-stm32/src/chip/stm32l4q5cg.rs +++ /dev/null @@ -1,603 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, AES, CAN1, COMP1, COMP2, DAC1, DMA2D, PA0, PA1, PA2, PA3, - PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, - PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, - PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, - PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, - PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, - PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, - PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, - PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, PI13, PI14, - PI15, HASH, I2C1, I2C2, I2C3, I2C4, IWDG, LPTIM1, LPTIM2, LPUART1, LTDC, OCTOSPI1, OCTOSPI2, - OCTOSPIM, OPAMP1, OPAMP2, PKA, RCC, RNG, RTC, SAI1, SAI2, SDMMC2, SPI1, SPI2, SPI3, SYSCFG, - TIM1, TIM15, TIM16, TIM17, TIM2, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, TSC, UART4, USART1, - USART2, USART3, USB_OTG_FS, WWDG -); -pub const GPIO_BASE: usize = 0x48000000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC1_2 = 18, - AES = 79, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - DCMI_PSSI = 85, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2D = 90, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - DMAMUX1_OVR = 94, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - HASH_CRS = 82, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 83, - I2C4_EV = 84, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - LTDC = 91, - LTDC_ER = 92, - OCTOSPI1 = 71, - OCTOSPI2 = 76, - OTG_FS = 67, - PKA = 86, - PVD_PVM = 1, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SDMMC2 = 47, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_2); - declare!(AES); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(DCMI_PSSI); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2D); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(DMAMUX1_OVR); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HASH_CRS); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTG_FS); - declare!(PKA); - declare!(PVD_PVM); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_2(); - fn AES(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn DCMI_PSSI(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2D(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn DMAMUX1_OVR(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HASH_CRS(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTG_FS(); - fn PKA(); - fn PVD_PVM(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SDMMC2(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 95] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1_2 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _handler: SDMMC2 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { _reserved: 0 }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: OCTOSPI2 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _handler: AES }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: HASH_CRS }, - Vector { _handler: I2C4_ER }, - Vector { _handler: I2C4_EV }, - Vector { - _handler: DCMI_PSSI, - }, - Vector { _handler: PKA }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: DMA2D }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _reserved: 0 }, - Vector { - _handler: DMAMUX1_OVR, - }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -impl_rng!(0x50060800); diff --git a/embassy-stm32/src/chip/stm32l4q5qg.rs b/embassy-stm32/src/chip/stm32l4q5qg.rs deleted file mode 100644 index 9bc33dee..00000000 --- a/embassy-stm32/src/chip/stm32l4q5qg.rs +++ /dev/null @@ -1,603 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, AES, CAN1, COMP1, COMP2, DAC1, DCMI, DMA2D, PA0, PA1, PA2, - PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, - PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, - PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, - PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, - PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, - PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, - PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, - PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, PI13, - PI14, PI15, HASH, I2C1, I2C2, I2C3, I2C4, IWDG, LPTIM1, LPTIM2, LPUART1, LTDC, OCTOSPI1, - OCTOSPI2, OCTOSPIM, OPAMP1, OPAMP2, PKA, PSSI, RCC, RNG, RTC, SAI1, SAI2, SDMMC1, SDMMC2, SPI1, - SPI2, SPI3, SYSCFG, TIM1, TIM15, TIM16, TIM17, TIM2, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, TSC, - UART4, UART5, USART1, USART2, USART3, USB_OTG_FS, WWDG -); -pub const GPIO_BASE: usize = 0x48000000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC1_2 = 18, - AES = 79, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - DCMI_PSSI = 85, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2D = 90, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - DMAMUX1_OVR = 94, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - HASH_CRS = 82, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 83, - I2C4_EV = 84, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - LTDC = 91, - LTDC_ER = 92, - OCTOSPI1 = 71, - OCTOSPI2 = 76, - OTG_FS = 67, - PKA = 86, - PVD_PVM = 1, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SDMMC2 = 47, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_2); - declare!(AES); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(DCMI_PSSI); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2D); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(DMAMUX1_OVR); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HASH_CRS); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTG_FS); - declare!(PKA); - declare!(PVD_PVM); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_2(); - fn AES(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn DCMI_PSSI(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2D(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn DMAMUX1_OVR(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HASH_CRS(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTG_FS(); - fn PKA(); - fn PVD_PVM(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SDMMC2(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 95] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1_2 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _handler: SDMMC2 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { _reserved: 0 }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: OCTOSPI2 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _handler: AES }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: HASH_CRS }, - Vector { _handler: I2C4_ER }, - Vector { _handler: I2C4_EV }, - Vector { - _handler: DCMI_PSSI, - }, - Vector { _handler: PKA }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: DMA2D }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _reserved: 0 }, - Vector { - _handler: DMAMUX1_OVR, - }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -impl_rng!(0x50060800); diff --git a/embassy-stm32/src/chip/stm32l4q5rg.rs b/embassy-stm32/src/chip/stm32l4q5rg.rs deleted file mode 100644 index 6f532676..00000000 --- a/embassy-stm32/src/chip/stm32l4q5rg.rs +++ /dev/null @@ -1,603 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, AES, CAN1, COMP1, COMP2, DAC1, DCMI, DMA2D, PA0, PA1, PA2, - PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, - PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, - PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, - PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, - PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, - PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, - PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, - PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, PI13, - PI14, PI15, HASH, I2C1, I2C2, I2C3, I2C4, IWDG, LPTIM1, LPTIM2, LPUART1, LTDC, OCTOSPI1, - OCTOSPI2, OCTOSPIM, OPAMP1, OPAMP2, PKA, PSSI, RCC, RNG, RTC, SAI1, SAI2, SDMMC1, SDMMC2, SPI1, - SPI2, SPI3, SYSCFG, TIM1, TIM15, TIM16, TIM17, TIM2, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, TSC, - UART4, USART1, USART2, USART3, USB_OTG_FS, WWDG -); -pub const GPIO_BASE: usize = 0x48000000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC1_2 = 18, - AES = 79, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - DCMI_PSSI = 85, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2D = 90, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - DMAMUX1_OVR = 94, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - HASH_CRS = 82, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 83, - I2C4_EV = 84, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - LTDC = 91, - LTDC_ER = 92, - OCTOSPI1 = 71, - OCTOSPI2 = 76, - OTG_FS = 67, - PKA = 86, - PVD_PVM = 1, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SDMMC2 = 47, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_2); - declare!(AES); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(DCMI_PSSI); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2D); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(DMAMUX1_OVR); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HASH_CRS); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTG_FS); - declare!(PKA); - declare!(PVD_PVM); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_2(); - fn AES(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn DCMI_PSSI(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2D(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn DMAMUX1_OVR(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HASH_CRS(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTG_FS(); - fn PKA(); - fn PVD_PVM(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SDMMC2(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 95] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1_2 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _handler: SDMMC2 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { _reserved: 0 }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: OCTOSPI2 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _handler: AES }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: HASH_CRS }, - Vector { _handler: I2C4_ER }, - Vector { _handler: I2C4_EV }, - Vector { - _handler: DCMI_PSSI, - }, - Vector { _handler: PKA }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: DMA2D }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _reserved: 0 }, - Vector { - _handler: DMAMUX1_OVR, - }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -impl_rng!(0x50060800); diff --git a/embassy-stm32/src/chip/stm32l4q5vg.rs b/embassy-stm32/src/chip/stm32l4q5vg.rs deleted file mode 100644 index 9bc33dee..00000000 --- a/embassy-stm32/src/chip/stm32l4q5vg.rs +++ /dev/null @@ -1,603 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, AES, CAN1, COMP1, COMP2, DAC1, DCMI, DMA2D, PA0, PA1, PA2, - PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, - PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, - PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, - PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, - PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, - PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, - PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, - PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, PI13, - PI14, PI15, HASH, I2C1, I2C2, I2C3, I2C4, IWDG, LPTIM1, LPTIM2, LPUART1, LTDC, OCTOSPI1, - OCTOSPI2, OCTOSPIM, OPAMP1, OPAMP2, PKA, PSSI, RCC, RNG, RTC, SAI1, SAI2, SDMMC1, SDMMC2, SPI1, - SPI2, SPI3, SYSCFG, TIM1, TIM15, TIM16, TIM17, TIM2, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, TSC, - UART4, UART5, USART1, USART2, USART3, USB_OTG_FS, WWDG -); -pub const GPIO_BASE: usize = 0x48000000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC1_2 = 18, - AES = 79, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - DCMI_PSSI = 85, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2D = 90, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - DMAMUX1_OVR = 94, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - HASH_CRS = 82, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 83, - I2C4_EV = 84, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - LTDC = 91, - LTDC_ER = 92, - OCTOSPI1 = 71, - OCTOSPI2 = 76, - OTG_FS = 67, - PKA = 86, - PVD_PVM = 1, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SDMMC2 = 47, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_2); - declare!(AES); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(DCMI_PSSI); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2D); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(DMAMUX1_OVR); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HASH_CRS); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTG_FS); - declare!(PKA); - declare!(PVD_PVM); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_2(); - fn AES(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn DCMI_PSSI(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2D(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn DMAMUX1_OVR(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HASH_CRS(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTG_FS(); - fn PKA(); - fn PVD_PVM(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SDMMC2(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 95] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1_2 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _handler: SDMMC2 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { _reserved: 0 }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: OCTOSPI2 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _handler: AES }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: HASH_CRS }, - Vector { _handler: I2C4_ER }, - Vector { _handler: I2C4_EV }, - Vector { - _handler: DCMI_PSSI, - }, - Vector { _handler: PKA }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: DMA2D }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _reserved: 0 }, - Vector { - _handler: DMAMUX1_OVR, - }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -impl_rng!(0x50060800); diff --git a/embassy-stm32/src/chip/stm32l4q5zg.rs b/embassy-stm32/src/chip/stm32l4q5zg.rs deleted file mode 100644 index 9bc33dee..00000000 --- a/embassy-stm32/src/chip/stm32l4q5zg.rs +++ /dev/null @@ -1,603 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, ADC2, AES, CAN1, COMP1, COMP2, DAC1, DCMI, DMA2D, PA0, PA1, PA2, - PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, - PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, - PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, - PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, - PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, - PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, - PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, - PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, PI13, - PI14, PI15, HASH, I2C1, I2C2, I2C3, I2C4, IWDG, LPTIM1, LPTIM2, LPUART1, LTDC, OCTOSPI1, - OCTOSPI2, OCTOSPIM, OPAMP1, OPAMP2, PKA, PSSI, RCC, RNG, RTC, SAI1, SAI2, SDMMC1, SDMMC2, SPI1, - SPI2, SPI3, SYSCFG, TIM1, TIM15, TIM16, TIM17, TIM2, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, TSC, - UART4, UART5, USART1, USART2, USART3, USB_OTG_FS, WWDG -); -pub const GPIO_BASE: usize = 0x48000000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC1_2 = 18, - AES = 79, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - DCMI_PSSI = 85, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2D = 90, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - DMAMUX1_OVR = 94, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - HASH_CRS = 82, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 83, - I2C4_EV = 84, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - LTDC = 91, - LTDC_ER = 92, - OCTOSPI1 = 71, - OCTOSPI2 = 76, - OTG_FS = 67, - PKA = 86, - PVD_PVM = 1, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SDMMC2 = 47, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_2); - declare!(AES); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(DCMI_PSSI); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2D); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(DMAMUX1_OVR); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HASH_CRS); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTG_FS); - declare!(PKA); - declare!(PVD_PVM); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_2(); - fn AES(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn DCMI_PSSI(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2D(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn DMAMUX1_OVR(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HASH_CRS(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTG_FS(); - fn PKA(); - fn PVD_PVM(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SDMMC2(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 95] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1_2 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _handler: SDMMC2 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { _reserved: 0 }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: OCTOSPI2 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _handler: AES }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: HASH_CRS }, - Vector { _handler: I2C4_ER }, - Vector { _handler: I2C4_EV }, - Vector { - _handler: DCMI_PSSI, - }, - Vector { _handler: PKA }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: DMA2D }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _reserved: 0 }, - Vector { - _handler: DMAMUX1_OVR, - }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -impl_rng!(0x50060800); diff --git a/embassy-stm32/src/chip/stm32l4r5ag.rs b/embassy-stm32/src/chip/stm32l4r5ag.rs deleted file mode 100644 index d3300817..00000000 --- a/embassy-stm32/src/chip/stm32l4r5ag.rs +++ /dev/null @@ -1,596 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, CAN1, COMP1, COMP2, DAC1, DCMI, DMA2D, PA0, PA1, PA2, PA3, PA4, - PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, - PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, - PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, - PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, - PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, - PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, - PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, - PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, PI13, PI14, - PI15, I2C1, I2C2, I2C3, I2C4, IWDG, LPTIM1, LPTIM2, LPUART1, OCTOSPI1, OCTOSPI2, OCTOSPIM, - OPAMP1, OPAMP2, RCC, RNG, RTC, SAI1, SAI2, SDMMC1, SPI1, SPI2, SPI3, SYSCFG, TIM1, TIM15, - TIM16, TIM17, TIM2, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, TSC, UART4, UART5, USART1, USART2, - USART3, USB_OTG_FS, WWDG -); -pub const GPIO_BASE: usize = 0x48000000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC1 = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - CRS = 82, - DCMI = 85, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DFSDM1_FLT2 = 63, - DFSDM1_FLT3 = 42, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2D = 90, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - DMAMUX1_OVR = 94, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 83, - I2C4_EV = 84, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - OCTOSPI1 = 71, - OCTOSPI2 = 76, - OTG_FS = 67, - PVD_PVM = 1, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(CRS); - declare!(DCMI); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DFSDM1_FLT2); - declare!(DFSDM1_FLT3); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2D); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(DMAMUX1_OVR); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTG_FS); - declare!(PVD_PVM); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn CRS(); - fn DCMI(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DFSDM1_FLT2(); - fn DFSDM1_FLT3(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2D(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn DMAMUX1_OVR(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTG_FS(); - fn PVD_PVM(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 95] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: DFSDM1_FLT3, - }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _reserved: 0 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { - _handler: DFSDM1_FLT2, - }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: OCTOSPI2 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: CRS }, - Vector { _handler: I2C4_ER }, - Vector { _handler: I2C4_EV }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: DMA2D }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMAMUX1_OVR, - }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -impl_rng!(0x50060800); diff --git a/embassy-stm32/src/chip/stm32l4r5ai.rs b/embassy-stm32/src/chip/stm32l4r5ai.rs deleted file mode 100644 index d3300817..00000000 --- a/embassy-stm32/src/chip/stm32l4r5ai.rs +++ /dev/null @@ -1,596 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, CAN1, COMP1, COMP2, DAC1, DCMI, DMA2D, PA0, PA1, PA2, PA3, PA4, - PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, - PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, - PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, - PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, - PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, - PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, - PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, - PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, PI13, PI14, - PI15, I2C1, I2C2, I2C3, I2C4, IWDG, LPTIM1, LPTIM2, LPUART1, OCTOSPI1, OCTOSPI2, OCTOSPIM, - OPAMP1, OPAMP2, RCC, RNG, RTC, SAI1, SAI2, SDMMC1, SPI1, SPI2, SPI3, SYSCFG, TIM1, TIM15, - TIM16, TIM17, TIM2, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, TSC, UART4, UART5, USART1, USART2, - USART3, USB_OTG_FS, WWDG -); -pub const GPIO_BASE: usize = 0x48000000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC1 = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - CRS = 82, - DCMI = 85, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DFSDM1_FLT2 = 63, - DFSDM1_FLT3 = 42, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2D = 90, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - DMAMUX1_OVR = 94, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 83, - I2C4_EV = 84, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - OCTOSPI1 = 71, - OCTOSPI2 = 76, - OTG_FS = 67, - PVD_PVM = 1, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(CRS); - declare!(DCMI); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DFSDM1_FLT2); - declare!(DFSDM1_FLT3); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2D); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(DMAMUX1_OVR); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTG_FS); - declare!(PVD_PVM); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn CRS(); - fn DCMI(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DFSDM1_FLT2(); - fn DFSDM1_FLT3(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2D(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn DMAMUX1_OVR(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTG_FS(); - fn PVD_PVM(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 95] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: DFSDM1_FLT3, - }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _reserved: 0 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { - _handler: DFSDM1_FLT2, - }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: OCTOSPI2 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: CRS }, - Vector { _handler: I2C4_ER }, - Vector { _handler: I2C4_EV }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: DMA2D }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMAMUX1_OVR, - }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -impl_rng!(0x50060800); diff --git a/embassy-stm32/src/chip/stm32l4r5qg.rs b/embassy-stm32/src/chip/stm32l4r5qg.rs deleted file mode 100644 index d3300817..00000000 --- a/embassy-stm32/src/chip/stm32l4r5qg.rs +++ /dev/null @@ -1,596 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, CAN1, COMP1, COMP2, DAC1, DCMI, DMA2D, PA0, PA1, PA2, PA3, PA4, - PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, - PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, - PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, - PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, - PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, - PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, - PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, - PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, PI13, PI14, - PI15, I2C1, I2C2, I2C3, I2C4, IWDG, LPTIM1, LPTIM2, LPUART1, OCTOSPI1, OCTOSPI2, OCTOSPIM, - OPAMP1, OPAMP2, RCC, RNG, RTC, SAI1, SAI2, SDMMC1, SPI1, SPI2, SPI3, SYSCFG, TIM1, TIM15, - TIM16, TIM17, TIM2, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, TSC, UART4, UART5, USART1, USART2, - USART3, USB_OTG_FS, WWDG -); -pub const GPIO_BASE: usize = 0x48000000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC1 = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - CRS = 82, - DCMI = 85, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DFSDM1_FLT2 = 63, - DFSDM1_FLT3 = 42, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2D = 90, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - DMAMUX1_OVR = 94, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 83, - I2C4_EV = 84, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - OCTOSPI1 = 71, - OCTOSPI2 = 76, - OTG_FS = 67, - PVD_PVM = 1, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(CRS); - declare!(DCMI); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DFSDM1_FLT2); - declare!(DFSDM1_FLT3); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2D); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(DMAMUX1_OVR); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTG_FS); - declare!(PVD_PVM); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn CRS(); - fn DCMI(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DFSDM1_FLT2(); - fn DFSDM1_FLT3(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2D(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn DMAMUX1_OVR(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTG_FS(); - fn PVD_PVM(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 95] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: DFSDM1_FLT3, - }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _reserved: 0 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { - _handler: DFSDM1_FLT2, - }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: OCTOSPI2 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: CRS }, - Vector { _handler: I2C4_ER }, - Vector { _handler: I2C4_EV }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: DMA2D }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMAMUX1_OVR, - }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -impl_rng!(0x50060800); diff --git a/embassy-stm32/src/chip/stm32l4r5qi.rs b/embassy-stm32/src/chip/stm32l4r5qi.rs deleted file mode 100644 index d3300817..00000000 --- a/embassy-stm32/src/chip/stm32l4r5qi.rs +++ /dev/null @@ -1,596 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, CAN1, COMP1, COMP2, DAC1, DCMI, DMA2D, PA0, PA1, PA2, PA3, PA4, - PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, - PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, - PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, - PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, - PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, - PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, - PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, - PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, PI13, PI14, - PI15, I2C1, I2C2, I2C3, I2C4, IWDG, LPTIM1, LPTIM2, LPUART1, OCTOSPI1, OCTOSPI2, OCTOSPIM, - OPAMP1, OPAMP2, RCC, RNG, RTC, SAI1, SAI2, SDMMC1, SPI1, SPI2, SPI3, SYSCFG, TIM1, TIM15, - TIM16, TIM17, TIM2, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, TSC, UART4, UART5, USART1, USART2, - USART3, USB_OTG_FS, WWDG -); -pub const GPIO_BASE: usize = 0x48000000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC1 = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - CRS = 82, - DCMI = 85, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DFSDM1_FLT2 = 63, - DFSDM1_FLT3 = 42, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2D = 90, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - DMAMUX1_OVR = 94, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 83, - I2C4_EV = 84, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - OCTOSPI1 = 71, - OCTOSPI2 = 76, - OTG_FS = 67, - PVD_PVM = 1, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(CRS); - declare!(DCMI); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DFSDM1_FLT2); - declare!(DFSDM1_FLT3); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2D); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(DMAMUX1_OVR); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTG_FS); - declare!(PVD_PVM); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn CRS(); - fn DCMI(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DFSDM1_FLT2(); - fn DFSDM1_FLT3(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2D(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn DMAMUX1_OVR(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTG_FS(); - fn PVD_PVM(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 95] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: DFSDM1_FLT3, - }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _reserved: 0 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { - _handler: DFSDM1_FLT2, - }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: OCTOSPI2 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: CRS }, - Vector { _handler: I2C4_ER }, - Vector { _handler: I2C4_EV }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: DMA2D }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMAMUX1_OVR, - }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -impl_rng!(0x50060800); diff --git a/embassy-stm32/src/chip/stm32l4r5vg.rs b/embassy-stm32/src/chip/stm32l4r5vg.rs deleted file mode 100644 index d3300817..00000000 --- a/embassy-stm32/src/chip/stm32l4r5vg.rs +++ /dev/null @@ -1,596 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, CAN1, COMP1, COMP2, DAC1, DCMI, DMA2D, PA0, PA1, PA2, PA3, PA4, - PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, - PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, - PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, - PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, - PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, - PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, - PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, - PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, PI13, PI14, - PI15, I2C1, I2C2, I2C3, I2C4, IWDG, LPTIM1, LPTIM2, LPUART1, OCTOSPI1, OCTOSPI2, OCTOSPIM, - OPAMP1, OPAMP2, RCC, RNG, RTC, SAI1, SAI2, SDMMC1, SPI1, SPI2, SPI3, SYSCFG, TIM1, TIM15, - TIM16, TIM17, TIM2, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, TSC, UART4, UART5, USART1, USART2, - USART3, USB_OTG_FS, WWDG -); -pub const GPIO_BASE: usize = 0x48000000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC1 = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - CRS = 82, - DCMI = 85, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DFSDM1_FLT2 = 63, - DFSDM1_FLT3 = 42, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2D = 90, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - DMAMUX1_OVR = 94, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 83, - I2C4_EV = 84, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - OCTOSPI1 = 71, - OCTOSPI2 = 76, - OTG_FS = 67, - PVD_PVM = 1, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(CRS); - declare!(DCMI); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DFSDM1_FLT2); - declare!(DFSDM1_FLT3); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2D); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(DMAMUX1_OVR); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTG_FS); - declare!(PVD_PVM); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn CRS(); - fn DCMI(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DFSDM1_FLT2(); - fn DFSDM1_FLT3(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2D(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn DMAMUX1_OVR(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTG_FS(); - fn PVD_PVM(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 95] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: DFSDM1_FLT3, - }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _reserved: 0 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { - _handler: DFSDM1_FLT2, - }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: OCTOSPI2 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: CRS }, - Vector { _handler: I2C4_ER }, - Vector { _handler: I2C4_EV }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: DMA2D }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMAMUX1_OVR, - }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -impl_rng!(0x50060800); diff --git a/embassy-stm32/src/chip/stm32l4r5vi.rs b/embassy-stm32/src/chip/stm32l4r5vi.rs deleted file mode 100644 index d3300817..00000000 --- a/embassy-stm32/src/chip/stm32l4r5vi.rs +++ /dev/null @@ -1,596 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, CAN1, COMP1, COMP2, DAC1, DCMI, DMA2D, PA0, PA1, PA2, PA3, PA4, - PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, - PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, - PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, - PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, - PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, - PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, - PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, - PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, PI13, PI14, - PI15, I2C1, I2C2, I2C3, I2C4, IWDG, LPTIM1, LPTIM2, LPUART1, OCTOSPI1, OCTOSPI2, OCTOSPIM, - OPAMP1, OPAMP2, RCC, RNG, RTC, SAI1, SAI2, SDMMC1, SPI1, SPI2, SPI3, SYSCFG, TIM1, TIM15, - TIM16, TIM17, TIM2, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, TSC, UART4, UART5, USART1, USART2, - USART3, USB_OTG_FS, WWDG -); -pub const GPIO_BASE: usize = 0x48000000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC1 = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - CRS = 82, - DCMI = 85, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DFSDM1_FLT2 = 63, - DFSDM1_FLT3 = 42, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2D = 90, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - DMAMUX1_OVR = 94, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 83, - I2C4_EV = 84, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - OCTOSPI1 = 71, - OCTOSPI2 = 76, - OTG_FS = 67, - PVD_PVM = 1, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(CRS); - declare!(DCMI); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DFSDM1_FLT2); - declare!(DFSDM1_FLT3); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2D); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(DMAMUX1_OVR); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTG_FS); - declare!(PVD_PVM); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn CRS(); - fn DCMI(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DFSDM1_FLT2(); - fn DFSDM1_FLT3(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2D(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn DMAMUX1_OVR(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTG_FS(); - fn PVD_PVM(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 95] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: DFSDM1_FLT3, - }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _reserved: 0 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { - _handler: DFSDM1_FLT2, - }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: OCTOSPI2 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: CRS }, - Vector { _handler: I2C4_ER }, - Vector { _handler: I2C4_EV }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: DMA2D }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMAMUX1_OVR, - }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -impl_rng!(0x50060800); diff --git a/embassy-stm32/src/chip/stm32l4r5zg.rs b/embassy-stm32/src/chip/stm32l4r5zg.rs deleted file mode 100644 index d3300817..00000000 --- a/embassy-stm32/src/chip/stm32l4r5zg.rs +++ /dev/null @@ -1,596 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, CAN1, COMP1, COMP2, DAC1, DCMI, DMA2D, PA0, PA1, PA2, PA3, PA4, - PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, - PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, - PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, - PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, - PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, - PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, - PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, - PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, PI13, PI14, - PI15, I2C1, I2C2, I2C3, I2C4, IWDG, LPTIM1, LPTIM2, LPUART1, OCTOSPI1, OCTOSPI2, OCTOSPIM, - OPAMP1, OPAMP2, RCC, RNG, RTC, SAI1, SAI2, SDMMC1, SPI1, SPI2, SPI3, SYSCFG, TIM1, TIM15, - TIM16, TIM17, TIM2, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, TSC, UART4, UART5, USART1, USART2, - USART3, USB_OTG_FS, WWDG -); -pub const GPIO_BASE: usize = 0x48000000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC1 = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - CRS = 82, - DCMI = 85, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DFSDM1_FLT2 = 63, - DFSDM1_FLT3 = 42, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2D = 90, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - DMAMUX1_OVR = 94, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 83, - I2C4_EV = 84, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - OCTOSPI1 = 71, - OCTOSPI2 = 76, - OTG_FS = 67, - PVD_PVM = 1, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(CRS); - declare!(DCMI); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DFSDM1_FLT2); - declare!(DFSDM1_FLT3); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2D); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(DMAMUX1_OVR); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTG_FS); - declare!(PVD_PVM); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn CRS(); - fn DCMI(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DFSDM1_FLT2(); - fn DFSDM1_FLT3(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2D(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn DMAMUX1_OVR(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTG_FS(); - fn PVD_PVM(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 95] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: DFSDM1_FLT3, - }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _reserved: 0 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { - _handler: DFSDM1_FLT2, - }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: OCTOSPI2 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: CRS }, - Vector { _handler: I2C4_ER }, - Vector { _handler: I2C4_EV }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: DMA2D }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMAMUX1_OVR, - }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -impl_rng!(0x50060800); diff --git a/embassy-stm32/src/chip/stm32l4r5zi.rs b/embassy-stm32/src/chip/stm32l4r5zi.rs deleted file mode 100644 index d3300817..00000000 --- a/embassy-stm32/src/chip/stm32l4r5zi.rs +++ /dev/null @@ -1,596 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, CAN1, COMP1, COMP2, DAC1, DCMI, DMA2D, PA0, PA1, PA2, PA3, PA4, - PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, - PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, - PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, - PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, - PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, - PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, - PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, - PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, PI13, PI14, - PI15, I2C1, I2C2, I2C3, I2C4, IWDG, LPTIM1, LPTIM2, LPUART1, OCTOSPI1, OCTOSPI2, OCTOSPIM, - OPAMP1, OPAMP2, RCC, RNG, RTC, SAI1, SAI2, SDMMC1, SPI1, SPI2, SPI3, SYSCFG, TIM1, TIM15, - TIM16, TIM17, TIM2, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, TSC, UART4, UART5, USART1, USART2, - USART3, USB_OTG_FS, WWDG -); -pub const GPIO_BASE: usize = 0x48000000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC1 = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - CRS = 82, - DCMI = 85, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DFSDM1_FLT2 = 63, - DFSDM1_FLT3 = 42, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2D = 90, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - DMAMUX1_OVR = 94, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 83, - I2C4_EV = 84, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - OCTOSPI1 = 71, - OCTOSPI2 = 76, - OTG_FS = 67, - PVD_PVM = 1, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(CRS); - declare!(DCMI); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DFSDM1_FLT2); - declare!(DFSDM1_FLT3); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2D); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(DMAMUX1_OVR); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTG_FS); - declare!(PVD_PVM); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn CRS(); - fn DCMI(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DFSDM1_FLT2(); - fn DFSDM1_FLT3(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2D(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn DMAMUX1_OVR(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTG_FS(); - fn PVD_PVM(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 95] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: DFSDM1_FLT3, - }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _reserved: 0 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { - _handler: DFSDM1_FLT2, - }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: OCTOSPI2 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: CRS }, - Vector { _handler: I2C4_ER }, - Vector { _handler: I2C4_EV }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: DMA2D }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMAMUX1_OVR, - }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -impl_rng!(0x50060800); diff --git a/embassy-stm32/src/chip/stm32l4r7ai.rs b/embassy-stm32/src/chip/stm32l4r7ai.rs deleted file mode 100644 index bdb3be97..00000000 --- a/embassy-stm32/src/chip/stm32l4r7ai.rs +++ /dev/null @@ -1,605 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, CAN1, COMP1, COMP2, DAC1, DCMI, DMA2D, GFXMMU, PA0, PA1, PA2, - PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, - PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, - PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, - PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, - PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, - PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, - PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, - PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, PI13, - PI14, PI15, I2C1, I2C2, I2C3, I2C4, IWDG, LPTIM1, LPTIM2, LPUART1, LTDC, OCTOSPI1, OCTOSPI2, - OCTOSPIM, OPAMP1, OPAMP2, RCC, RNG, RTC, SAI1, SAI2, SDMMC1, SPI1, SPI2, SPI3, SYSCFG, TIM1, - TIM15, TIM16, TIM17, TIM2, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, TSC, UART4, UART5, USART1, - USART2, USART3, USB_OTG_FS, WWDG -); -pub const GPIO_BASE: usize = 0x48000000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC1 = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - CRS = 82, - DCMI = 85, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DFSDM1_FLT2 = 63, - DFSDM1_FLT3 = 42, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2D = 90, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - DMAMUX1_OVR = 94, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - GFXMMU = 93, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 83, - I2C4_EV = 84, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - LTDC = 91, - LTDC_ER = 92, - OCTOSPI1 = 71, - OCTOSPI2 = 76, - OTG_FS = 67, - PVD_PVM = 1, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(CRS); - declare!(DCMI); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DFSDM1_FLT2); - declare!(DFSDM1_FLT3); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2D); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(DMAMUX1_OVR); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(GFXMMU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTG_FS); - declare!(PVD_PVM); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn CRS(); - fn DCMI(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DFSDM1_FLT2(); - fn DFSDM1_FLT3(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2D(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn DMAMUX1_OVR(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn GFXMMU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTG_FS(); - fn PVD_PVM(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 95] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: DFSDM1_FLT3, - }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _reserved: 0 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { - _handler: DFSDM1_FLT2, - }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: OCTOSPI2 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: CRS }, - Vector { _handler: I2C4_ER }, - Vector { _handler: I2C4_EV }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: DMA2D }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: GFXMMU }, - Vector { - _handler: DMAMUX1_OVR, - }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -impl_rng!(0x50060800); diff --git a/embassy-stm32/src/chip/stm32l4r7vi.rs b/embassy-stm32/src/chip/stm32l4r7vi.rs deleted file mode 100644 index bdb3be97..00000000 --- a/embassy-stm32/src/chip/stm32l4r7vi.rs +++ /dev/null @@ -1,605 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, CAN1, COMP1, COMP2, DAC1, DCMI, DMA2D, GFXMMU, PA0, PA1, PA2, - PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, - PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, - PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, - PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, - PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, - PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, - PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, - PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, PI13, - PI14, PI15, I2C1, I2C2, I2C3, I2C4, IWDG, LPTIM1, LPTIM2, LPUART1, LTDC, OCTOSPI1, OCTOSPI2, - OCTOSPIM, OPAMP1, OPAMP2, RCC, RNG, RTC, SAI1, SAI2, SDMMC1, SPI1, SPI2, SPI3, SYSCFG, TIM1, - TIM15, TIM16, TIM17, TIM2, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, TSC, UART4, UART5, USART1, - USART2, USART3, USB_OTG_FS, WWDG -); -pub const GPIO_BASE: usize = 0x48000000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC1 = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - CRS = 82, - DCMI = 85, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DFSDM1_FLT2 = 63, - DFSDM1_FLT3 = 42, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2D = 90, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - DMAMUX1_OVR = 94, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - GFXMMU = 93, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 83, - I2C4_EV = 84, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - LTDC = 91, - LTDC_ER = 92, - OCTOSPI1 = 71, - OCTOSPI2 = 76, - OTG_FS = 67, - PVD_PVM = 1, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(CRS); - declare!(DCMI); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DFSDM1_FLT2); - declare!(DFSDM1_FLT3); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2D); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(DMAMUX1_OVR); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(GFXMMU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTG_FS); - declare!(PVD_PVM); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn CRS(); - fn DCMI(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DFSDM1_FLT2(); - fn DFSDM1_FLT3(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2D(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn DMAMUX1_OVR(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn GFXMMU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTG_FS(); - fn PVD_PVM(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 95] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: DFSDM1_FLT3, - }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _reserved: 0 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { - _handler: DFSDM1_FLT2, - }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: OCTOSPI2 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: CRS }, - Vector { _handler: I2C4_ER }, - Vector { _handler: I2C4_EV }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: DMA2D }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: GFXMMU }, - Vector { - _handler: DMAMUX1_OVR, - }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -impl_rng!(0x50060800); diff --git a/embassy-stm32/src/chip/stm32l4r7zi.rs b/embassy-stm32/src/chip/stm32l4r7zi.rs deleted file mode 100644 index bdb3be97..00000000 --- a/embassy-stm32/src/chip/stm32l4r7zi.rs +++ /dev/null @@ -1,605 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, CAN1, COMP1, COMP2, DAC1, DCMI, DMA2D, GFXMMU, PA0, PA1, PA2, - PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, - PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, - PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, - PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, - PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, - PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, - PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, - PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, PI13, - PI14, PI15, I2C1, I2C2, I2C3, I2C4, IWDG, LPTIM1, LPTIM2, LPUART1, LTDC, OCTOSPI1, OCTOSPI2, - OCTOSPIM, OPAMP1, OPAMP2, RCC, RNG, RTC, SAI1, SAI2, SDMMC1, SPI1, SPI2, SPI3, SYSCFG, TIM1, - TIM15, TIM16, TIM17, TIM2, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, TSC, UART4, UART5, USART1, - USART2, USART3, USB_OTG_FS, WWDG -); -pub const GPIO_BASE: usize = 0x48000000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC1 = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - CRS = 82, - DCMI = 85, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DFSDM1_FLT2 = 63, - DFSDM1_FLT3 = 42, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2D = 90, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - DMAMUX1_OVR = 94, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - GFXMMU = 93, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 83, - I2C4_EV = 84, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - LTDC = 91, - LTDC_ER = 92, - OCTOSPI1 = 71, - OCTOSPI2 = 76, - OTG_FS = 67, - PVD_PVM = 1, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(CRS); - declare!(DCMI); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DFSDM1_FLT2); - declare!(DFSDM1_FLT3); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2D); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(DMAMUX1_OVR); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(GFXMMU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTG_FS); - declare!(PVD_PVM); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn CRS(); - fn DCMI(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DFSDM1_FLT2(); - fn DFSDM1_FLT3(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2D(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn DMAMUX1_OVR(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn GFXMMU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTG_FS(); - fn PVD_PVM(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 95] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: DFSDM1_FLT3, - }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _reserved: 0 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { - _handler: DFSDM1_FLT2, - }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: OCTOSPI2 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: CRS }, - Vector { _handler: I2C4_ER }, - Vector { _handler: I2C4_EV }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: DMA2D }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: GFXMMU }, - Vector { - _handler: DMAMUX1_OVR, - }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -impl_rng!(0x50060800); diff --git a/embassy-stm32/src/chip/stm32l4r9ag.rs b/embassy-stm32/src/chip/stm32l4r9ag.rs deleted file mode 100644 index d04c323b..00000000 --- a/embassy-stm32/src/chip/stm32l4r9ag.rs +++ /dev/null @@ -1,608 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, CAN1, COMP1, COMP2, DAC1, DCMI, DMA2D, GFXMMU, PA0, PA1, PA2, - PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, - PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, - PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, - PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, - PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, - PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, - PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, - PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, PI13, - PI14, PI15, I2C1, I2C2, I2C3, I2C4, IWDG, LPTIM1, LPTIM2, LPUART1, LTDC, OCTOSPI1, OCTOSPI2, - OCTOSPIM, OPAMP1, OPAMP2, RCC, RNG, RTC, SAI1, SAI2, SDMMC1, SPI1, SPI2, SPI3, SYSCFG, TIM1, - TIM15, TIM16, TIM17, TIM2, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, TSC, UART4, UART5, USART1, - USART2, USART3, USB_OTG_FS, WWDG -); -pub const GPIO_BASE: usize = 0x48000000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC1 = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - CRS = 82, - DCMI = 85, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DFSDM1_FLT2 = 63, - DFSDM1_FLT3 = 42, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2D = 90, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - DMAMUX1_OVR = 94, - DSI = 78, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - GFXMMU = 93, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 83, - I2C4_EV = 84, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - LTDC = 91, - LTDC_ER = 92, - OCTOSPI1 = 71, - OCTOSPI2 = 76, - OTG_FS = 67, - PVD_PVM = 1, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(CRS); - declare!(DCMI); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DFSDM1_FLT2); - declare!(DFSDM1_FLT3); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2D); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(DMAMUX1_OVR); - declare!(DSI); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(GFXMMU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTG_FS); - declare!(PVD_PVM); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn CRS(); - fn DCMI(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DFSDM1_FLT2(); - fn DFSDM1_FLT3(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2D(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn DMAMUX1_OVR(); - fn DSI(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn GFXMMU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTG_FS(); - fn PVD_PVM(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 95] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: DFSDM1_FLT3, - }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _reserved: 0 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { - _handler: DFSDM1_FLT2, - }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: OCTOSPI2 }, - Vector { _handler: TSC }, - Vector { _handler: DSI }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: CRS }, - Vector { _handler: I2C4_ER }, - Vector { _handler: I2C4_EV }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: DMA2D }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: GFXMMU }, - Vector { - _handler: DMAMUX1_OVR, - }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -impl_rng!(0x50060800); diff --git a/embassy-stm32/src/chip/stm32l4r9ai.rs b/embassy-stm32/src/chip/stm32l4r9ai.rs deleted file mode 100644 index d04c323b..00000000 --- a/embassy-stm32/src/chip/stm32l4r9ai.rs +++ /dev/null @@ -1,608 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, CAN1, COMP1, COMP2, DAC1, DCMI, DMA2D, GFXMMU, PA0, PA1, PA2, - PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, - PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, - PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, - PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, - PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, - PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, - PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, - PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, PI13, - PI14, PI15, I2C1, I2C2, I2C3, I2C4, IWDG, LPTIM1, LPTIM2, LPUART1, LTDC, OCTOSPI1, OCTOSPI2, - OCTOSPIM, OPAMP1, OPAMP2, RCC, RNG, RTC, SAI1, SAI2, SDMMC1, SPI1, SPI2, SPI3, SYSCFG, TIM1, - TIM15, TIM16, TIM17, TIM2, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, TSC, UART4, UART5, USART1, - USART2, USART3, USB_OTG_FS, WWDG -); -pub const GPIO_BASE: usize = 0x48000000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC1 = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - CRS = 82, - DCMI = 85, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DFSDM1_FLT2 = 63, - DFSDM1_FLT3 = 42, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2D = 90, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - DMAMUX1_OVR = 94, - DSI = 78, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - GFXMMU = 93, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 83, - I2C4_EV = 84, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - LTDC = 91, - LTDC_ER = 92, - OCTOSPI1 = 71, - OCTOSPI2 = 76, - OTG_FS = 67, - PVD_PVM = 1, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(CRS); - declare!(DCMI); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DFSDM1_FLT2); - declare!(DFSDM1_FLT3); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2D); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(DMAMUX1_OVR); - declare!(DSI); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(GFXMMU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTG_FS); - declare!(PVD_PVM); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn CRS(); - fn DCMI(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DFSDM1_FLT2(); - fn DFSDM1_FLT3(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2D(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn DMAMUX1_OVR(); - fn DSI(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn GFXMMU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTG_FS(); - fn PVD_PVM(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 95] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: DFSDM1_FLT3, - }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _reserved: 0 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { - _handler: DFSDM1_FLT2, - }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: OCTOSPI2 }, - Vector { _handler: TSC }, - Vector { _handler: DSI }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: CRS }, - Vector { _handler: I2C4_ER }, - Vector { _handler: I2C4_EV }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: DMA2D }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: GFXMMU }, - Vector { - _handler: DMAMUX1_OVR, - }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -impl_rng!(0x50060800); diff --git a/embassy-stm32/src/chip/stm32l4r9vg.rs b/embassy-stm32/src/chip/stm32l4r9vg.rs deleted file mode 100644 index d04c323b..00000000 --- a/embassy-stm32/src/chip/stm32l4r9vg.rs +++ /dev/null @@ -1,608 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, CAN1, COMP1, COMP2, DAC1, DCMI, DMA2D, GFXMMU, PA0, PA1, PA2, - PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, - PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, - PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, - PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, - PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, - PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, - PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, - PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, PI13, - PI14, PI15, I2C1, I2C2, I2C3, I2C4, IWDG, LPTIM1, LPTIM2, LPUART1, LTDC, OCTOSPI1, OCTOSPI2, - OCTOSPIM, OPAMP1, OPAMP2, RCC, RNG, RTC, SAI1, SAI2, SDMMC1, SPI1, SPI2, SPI3, SYSCFG, TIM1, - TIM15, TIM16, TIM17, TIM2, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, TSC, UART4, UART5, USART1, - USART2, USART3, USB_OTG_FS, WWDG -); -pub const GPIO_BASE: usize = 0x48000000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC1 = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - CRS = 82, - DCMI = 85, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DFSDM1_FLT2 = 63, - DFSDM1_FLT3 = 42, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2D = 90, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - DMAMUX1_OVR = 94, - DSI = 78, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - GFXMMU = 93, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 83, - I2C4_EV = 84, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - LTDC = 91, - LTDC_ER = 92, - OCTOSPI1 = 71, - OCTOSPI2 = 76, - OTG_FS = 67, - PVD_PVM = 1, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(CRS); - declare!(DCMI); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DFSDM1_FLT2); - declare!(DFSDM1_FLT3); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2D); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(DMAMUX1_OVR); - declare!(DSI); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(GFXMMU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTG_FS); - declare!(PVD_PVM); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn CRS(); - fn DCMI(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DFSDM1_FLT2(); - fn DFSDM1_FLT3(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2D(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn DMAMUX1_OVR(); - fn DSI(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn GFXMMU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTG_FS(); - fn PVD_PVM(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 95] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: DFSDM1_FLT3, - }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _reserved: 0 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { - _handler: DFSDM1_FLT2, - }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: OCTOSPI2 }, - Vector { _handler: TSC }, - Vector { _handler: DSI }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: CRS }, - Vector { _handler: I2C4_ER }, - Vector { _handler: I2C4_EV }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: DMA2D }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: GFXMMU }, - Vector { - _handler: DMAMUX1_OVR, - }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -impl_rng!(0x50060800); diff --git a/embassy-stm32/src/chip/stm32l4r9vi.rs b/embassy-stm32/src/chip/stm32l4r9vi.rs deleted file mode 100644 index d04c323b..00000000 --- a/embassy-stm32/src/chip/stm32l4r9vi.rs +++ /dev/null @@ -1,608 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, CAN1, COMP1, COMP2, DAC1, DCMI, DMA2D, GFXMMU, PA0, PA1, PA2, - PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, - PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, - PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, - PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, - PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, - PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, - PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, - PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, PI13, - PI14, PI15, I2C1, I2C2, I2C3, I2C4, IWDG, LPTIM1, LPTIM2, LPUART1, LTDC, OCTOSPI1, OCTOSPI2, - OCTOSPIM, OPAMP1, OPAMP2, RCC, RNG, RTC, SAI1, SAI2, SDMMC1, SPI1, SPI2, SPI3, SYSCFG, TIM1, - TIM15, TIM16, TIM17, TIM2, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, TSC, UART4, UART5, USART1, - USART2, USART3, USB_OTG_FS, WWDG -); -pub const GPIO_BASE: usize = 0x48000000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC1 = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - CRS = 82, - DCMI = 85, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DFSDM1_FLT2 = 63, - DFSDM1_FLT3 = 42, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2D = 90, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - DMAMUX1_OVR = 94, - DSI = 78, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - GFXMMU = 93, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 83, - I2C4_EV = 84, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - LTDC = 91, - LTDC_ER = 92, - OCTOSPI1 = 71, - OCTOSPI2 = 76, - OTG_FS = 67, - PVD_PVM = 1, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(CRS); - declare!(DCMI); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DFSDM1_FLT2); - declare!(DFSDM1_FLT3); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2D); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(DMAMUX1_OVR); - declare!(DSI); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(GFXMMU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTG_FS); - declare!(PVD_PVM); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn CRS(); - fn DCMI(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DFSDM1_FLT2(); - fn DFSDM1_FLT3(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2D(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn DMAMUX1_OVR(); - fn DSI(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn GFXMMU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTG_FS(); - fn PVD_PVM(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 95] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: DFSDM1_FLT3, - }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _reserved: 0 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { - _handler: DFSDM1_FLT2, - }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: OCTOSPI2 }, - Vector { _handler: TSC }, - Vector { _handler: DSI }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: CRS }, - Vector { _handler: I2C4_ER }, - Vector { _handler: I2C4_EV }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: DMA2D }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: GFXMMU }, - Vector { - _handler: DMAMUX1_OVR, - }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -impl_rng!(0x50060800); diff --git a/embassy-stm32/src/chip/stm32l4r9zg.rs b/embassy-stm32/src/chip/stm32l4r9zg.rs deleted file mode 100644 index d04c323b..00000000 --- a/embassy-stm32/src/chip/stm32l4r9zg.rs +++ /dev/null @@ -1,608 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, CAN1, COMP1, COMP2, DAC1, DCMI, DMA2D, GFXMMU, PA0, PA1, PA2, - PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, - PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, - PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, - PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, - PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, - PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, - PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, - PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, PI13, - PI14, PI15, I2C1, I2C2, I2C3, I2C4, IWDG, LPTIM1, LPTIM2, LPUART1, LTDC, OCTOSPI1, OCTOSPI2, - OCTOSPIM, OPAMP1, OPAMP2, RCC, RNG, RTC, SAI1, SAI2, SDMMC1, SPI1, SPI2, SPI3, SYSCFG, TIM1, - TIM15, TIM16, TIM17, TIM2, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, TSC, UART4, UART5, USART1, - USART2, USART3, USB_OTG_FS, WWDG -); -pub const GPIO_BASE: usize = 0x48000000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC1 = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - CRS = 82, - DCMI = 85, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DFSDM1_FLT2 = 63, - DFSDM1_FLT3 = 42, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2D = 90, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - DMAMUX1_OVR = 94, - DSI = 78, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - GFXMMU = 93, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 83, - I2C4_EV = 84, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - LTDC = 91, - LTDC_ER = 92, - OCTOSPI1 = 71, - OCTOSPI2 = 76, - OTG_FS = 67, - PVD_PVM = 1, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(CRS); - declare!(DCMI); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DFSDM1_FLT2); - declare!(DFSDM1_FLT3); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2D); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(DMAMUX1_OVR); - declare!(DSI); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(GFXMMU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTG_FS); - declare!(PVD_PVM); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn CRS(); - fn DCMI(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DFSDM1_FLT2(); - fn DFSDM1_FLT3(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2D(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn DMAMUX1_OVR(); - fn DSI(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn GFXMMU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTG_FS(); - fn PVD_PVM(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 95] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: DFSDM1_FLT3, - }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _reserved: 0 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { - _handler: DFSDM1_FLT2, - }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: OCTOSPI2 }, - Vector { _handler: TSC }, - Vector { _handler: DSI }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: CRS }, - Vector { _handler: I2C4_ER }, - Vector { _handler: I2C4_EV }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: DMA2D }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: GFXMMU }, - Vector { - _handler: DMAMUX1_OVR, - }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -impl_rng!(0x50060800); diff --git a/embassy-stm32/src/chip/stm32l4r9zi.rs b/embassy-stm32/src/chip/stm32l4r9zi.rs deleted file mode 100644 index d04c323b..00000000 --- a/embassy-stm32/src/chip/stm32l4r9zi.rs +++ /dev/null @@ -1,608 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, CAN1, COMP1, COMP2, DAC1, DCMI, DMA2D, GFXMMU, PA0, PA1, PA2, - PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, - PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, - PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, - PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, - PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, - PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, - PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, - PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, PI13, - PI14, PI15, I2C1, I2C2, I2C3, I2C4, IWDG, LPTIM1, LPTIM2, LPUART1, LTDC, OCTOSPI1, OCTOSPI2, - OCTOSPIM, OPAMP1, OPAMP2, RCC, RNG, RTC, SAI1, SAI2, SDMMC1, SPI1, SPI2, SPI3, SYSCFG, TIM1, - TIM15, TIM16, TIM17, TIM2, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, TSC, UART4, UART5, USART1, - USART2, USART3, USB_OTG_FS, WWDG -); -pub const GPIO_BASE: usize = 0x48000000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC1 = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - CRS = 82, - DCMI = 85, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DFSDM1_FLT2 = 63, - DFSDM1_FLT3 = 42, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2D = 90, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - DMAMUX1_OVR = 94, - DSI = 78, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - GFXMMU = 93, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 83, - I2C4_EV = 84, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - LTDC = 91, - LTDC_ER = 92, - OCTOSPI1 = 71, - OCTOSPI2 = 76, - OTG_FS = 67, - PVD_PVM = 1, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(CRS); - declare!(DCMI); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DFSDM1_FLT2); - declare!(DFSDM1_FLT3); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2D); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(DMAMUX1_OVR); - declare!(DSI); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(GFXMMU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTG_FS); - declare!(PVD_PVM); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn CRS(); - fn DCMI(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DFSDM1_FLT2(); - fn DFSDM1_FLT3(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2D(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn DMAMUX1_OVR(); - fn DSI(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn GFXMMU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTG_FS(); - fn PVD_PVM(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 95] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: DFSDM1_FLT3, - }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _reserved: 0 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { - _handler: DFSDM1_FLT2, - }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: OCTOSPI2 }, - Vector { _handler: TSC }, - Vector { _handler: DSI }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: CRS }, - Vector { _handler: I2C4_ER }, - Vector { _handler: I2C4_EV }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: DMA2D }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: GFXMMU }, - Vector { - _handler: DMAMUX1_OVR, - }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -impl_rng!(0x50060800); diff --git a/embassy-stm32/src/chip/stm32l4s5ai.rs b/embassy-stm32/src/chip/stm32l4s5ai.rs deleted file mode 100644 index 502294f2..00000000 --- a/embassy-stm32/src/chip/stm32l4s5ai.rs +++ /dev/null @@ -1,599 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, AES, CAN1, COMP1, COMP2, DAC1, DCMI, DMA2D, PA0, PA1, PA2, PA3, - PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, - PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, - PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, - PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, - PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, - PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, - PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, - PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, PI13, PI14, - PI15, HASH, I2C1, I2C2, I2C3, I2C4, IWDG, LPTIM1, LPTIM2, LPUART1, OCTOSPI1, OCTOSPI2, - OCTOSPIM, OPAMP1, OPAMP2, RCC, RNG, RTC, SAI1, SAI2, SDMMC1, SPI1, SPI2, SPI3, SYSCFG, TIM1, - TIM15, TIM16, TIM17, TIM2, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, TSC, UART4, UART5, USART1, - USART2, USART3, USB_OTG_FS, WWDG -); -pub const GPIO_BASE: usize = 0x48000000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC1 = 18, - AES = 79, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - DCMI = 85, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DFSDM1_FLT2 = 63, - DFSDM1_FLT3 = 42, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2D = 90, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - DMAMUX1_OVR = 94, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - HASH_CRS = 82, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 83, - I2C4_EV = 84, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - OCTOSPI1 = 71, - OCTOSPI2 = 76, - OTG_FS = 67, - PVD_PVM = 1, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1); - declare!(AES); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(DCMI); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DFSDM1_FLT2); - declare!(DFSDM1_FLT3); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2D); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(DMAMUX1_OVR); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HASH_CRS); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTG_FS); - declare!(PVD_PVM); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1(); - fn AES(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn DCMI(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DFSDM1_FLT2(); - fn DFSDM1_FLT3(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2D(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn DMAMUX1_OVR(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HASH_CRS(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTG_FS(); - fn PVD_PVM(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 95] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: DFSDM1_FLT3, - }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _reserved: 0 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { - _handler: DFSDM1_FLT2, - }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: OCTOSPI2 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _handler: AES }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: HASH_CRS }, - Vector { _handler: I2C4_ER }, - Vector { _handler: I2C4_EV }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: DMA2D }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMAMUX1_OVR, - }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -impl_rng!(0x50060800); diff --git a/embassy-stm32/src/chip/stm32l4s5qi.rs b/embassy-stm32/src/chip/stm32l4s5qi.rs deleted file mode 100644 index 502294f2..00000000 --- a/embassy-stm32/src/chip/stm32l4s5qi.rs +++ /dev/null @@ -1,599 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, AES, CAN1, COMP1, COMP2, DAC1, DCMI, DMA2D, PA0, PA1, PA2, PA3, - PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, - PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, - PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, - PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, - PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, - PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, - PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, - PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, PI13, PI14, - PI15, HASH, I2C1, I2C2, I2C3, I2C4, IWDG, LPTIM1, LPTIM2, LPUART1, OCTOSPI1, OCTOSPI2, - OCTOSPIM, OPAMP1, OPAMP2, RCC, RNG, RTC, SAI1, SAI2, SDMMC1, SPI1, SPI2, SPI3, SYSCFG, TIM1, - TIM15, TIM16, TIM17, TIM2, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, TSC, UART4, UART5, USART1, - USART2, USART3, USB_OTG_FS, WWDG -); -pub const GPIO_BASE: usize = 0x48000000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC1 = 18, - AES = 79, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - DCMI = 85, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DFSDM1_FLT2 = 63, - DFSDM1_FLT3 = 42, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2D = 90, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - DMAMUX1_OVR = 94, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - HASH_CRS = 82, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 83, - I2C4_EV = 84, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - OCTOSPI1 = 71, - OCTOSPI2 = 76, - OTG_FS = 67, - PVD_PVM = 1, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1); - declare!(AES); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(DCMI); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DFSDM1_FLT2); - declare!(DFSDM1_FLT3); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2D); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(DMAMUX1_OVR); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HASH_CRS); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTG_FS); - declare!(PVD_PVM); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1(); - fn AES(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn DCMI(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DFSDM1_FLT2(); - fn DFSDM1_FLT3(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2D(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn DMAMUX1_OVR(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HASH_CRS(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTG_FS(); - fn PVD_PVM(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 95] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: DFSDM1_FLT3, - }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _reserved: 0 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { - _handler: DFSDM1_FLT2, - }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: OCTOSPI2 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _handler: AES }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: HASH_CRS }, - Vector { _handler: I2C4_ER }, - Vector { _handler: I2C4_EV }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: DMA2D }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMAMUX1_OVR, - }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -impl_rng!(0x50060800); diff --git a/embassy-stm32/src/chip/stm32l4s5vi.rs b/embassy-stm32/src/chip/stm32l4s5vi.rs deleted file mode 100644 index 502294f2..00000000 --- a/embassy-stm32/src/chip/stm32l4s5vi.rs +++ /dev/null @@ -1,599 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, AES, CAN1, COMP1, COMP2, DAC1, DCMI, DMA2D, PA0, PA1, PA2, PA3, - PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, - PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, - PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, - PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, - PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, - PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, - PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, - PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, PI13, PI14, - PI15, HASH, I2C1, I2C2, I2C3, I2C4, IWDG, LPTIM1, LPTIM2, LPUART1, OCTOSPI1, OCTOSPI2, - OCTOSPIM, OPAMP1, OPAMP2, RCC, RNG, RTC, SAI1, SAI2, SDMMC1, SPI1, SPI2, SPI3, SYSCFG, TIM1, - TIM15, TIM16, TIM17, TIM2, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, TSC, UART4, UART5, USART1, - USART2, USART3, USB_OTG_FS, WWDG -); -pub const GPIO_BASE: usize = 0x48000000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC1 = 18, - AES = 79, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - DCMI = 85, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DFSDM1_FLT2 = 63, - DFSDM1_FLT3 = 42, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2D = 90, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - DMAMUX1_OVR = 94, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - HASH_CRS = 82, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 83, - I2C4_EV = 84, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - OCTOSPI1 = 71, - OCTOSPI2 = 76, - OTG_FS = 67, - PVD_PVM = 1, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1); - declare!(AES); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(DCMI); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DFSDM1_FLT2); - declare!(DFSDM1_FLT3); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2D); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(DMAMUX1_OVR); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HASH_CRS); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTG_FS); - declare!(PVD_PVM); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1(); - fn AES(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn DCMI(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DFSDM1_FLT2(); - fn DFSDM1_FLT3(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2D(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn DMAMUX1_OVR(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HASH_CRS(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTG_FS(); - fn PVD_PVM(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 95] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: DFSDM1_FLT3, - }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _reserved: 0 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { - _handler: DFSDM1_FLT2, - }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: OCTOSPI2 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _handler: AES }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: HASH_CRS }, - Vector { _handler: I2C4_ER }, - Vector { _handler: I2C4_EV }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: DMA2D }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMAMUX1_OVR, - }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -impl_rng!(0x50060800); diff --git a/embassy-stm32/src/chip/stm32l4s5zi.rs b/embassy-stm32/src/chip/stm32l4s5zi.rs deleted file mode 100644 index 502294f2..00000000 --- a/embassy-stm32/src/chip/stm32l4s5zi.rs +++ /dev/null @@ -1,599 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, AES, CAN1, COMP1, COMP2, DAC1, DCMI, DMA2D, PA0, PA1, PA2, PA3, - PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, - PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, - PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, - PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, - PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, - PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, - PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, - PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, PI13, PI14, - PI15, HASH, I2C1, I2C2, I2C3, I2C4, IWDG, LPTIM1, LPTIM2, LPUART1, OCTOSPI1, OCTOSPI2, - OCTOSPIM, OPAMP1, OPAMP2, RCC, RNG, RTC, SAI1, SAI2, SDMMC1, SPI1, SPI2, SPI3, SYSCFG, TIM1, - TIM15, TIM16, TIM17, TIM2, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, TSC, UART4, UART5, USART1, - USART2, USART3, USB_OTG_FS, WWDG -); -pub const GPIO_BASE: usize = 0x48000000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC1 = 18, - AES = 79, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - DCMI = 85, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DFSDM1_FLT2 = 63, - DFSDM1_FLT3 = 42, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2D = 90, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - DMAMUX1_OVR = 94, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - HASH_CRS = 82, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 83, - I2C4_EV = 84, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - OCTOSPI1 = 71, - OCTOSPI2 = 76, - OTG_FS = 67, - PVD_PVM = 1, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1); - declare!(AES); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(DCMI); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DFSDM1_FLT2); - declare!(DFSDM1_FLT3); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2D); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(DMAMUX1_OVR); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HASH_CRS); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTG_FS); - declare!(PVD_PVM); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1(); - fn AES(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn DCMI(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DFSDM1_FLT2(); - fn DFSDM1_FLT3(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2D(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn DMAMUX1_OVR(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HASH_CRS(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTG_FS(); - fn PVD_PVM(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 95] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: DFSDM1_FLT3, - }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _reserved: 0 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { - _handler: DFSDM1_FLT2, - }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: OCTOSPI2 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _handler: AES }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: HASH_CRS }, - Vector { _handler: I2C4_ER }, - Vector { _handler: I2C4_EV }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: DMA2D }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMAMUX1_OVR, - }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -impl_rng!(0x50060800); diff --git a/embassy-stm32/src/chip/stm32l4s7ai.rs b/embassy-stm32/src/chip/stm32l4s7ai.rs deleted file mode 100644 index 502c2789..00000000 --- a/embassy-stm32/src/chip/stm32l4s7ai.rs +++ /dev/null @@ -1,608 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, AES, CAN1, COMP1, COMP2, DAC1, DCMI, DMA2D, GFXMMU, PA0, PA1, - PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, PB2, PB3, - PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, - PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, - PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, - PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, - PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, - PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, - PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, PI13, - PI14, PI15, HASH, I2C1, I2C2, I2C3, I2C4, IWDG, LPTIM1, LPTIM2, LPUART1, LTDC, OCTOSPI1, - OCTOSPI2, OCTOSPIM, OPAMP1, OPAMP2, RCC, RNG, RTC, SAI1, SAI2, SDMMC1, SPI1, SPI2, SPI3, - SYSCFG, TIM1, TIM15, TIM16, TIM17, TIM2, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, TSC, UART4, UART5, - USART1, USART2, USART3, USB_OTG_FS, WWDG -); -pub const GPIO_BASE: usize = 0x48000000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC1 = 18, - AES = 79, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - DCMI = 85, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DFSDM1_FLT2 = 63, - DFSDM1_FLT3 = 42, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2D = 90, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - DMAMUX1_OVR = 94, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - GFXMMU = 93, - HASH_CRS = 82, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 83, - I2C4_EV = 84, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - LTDC = 91, - LTDC_ER = 92, - OCTOSPI1 = 71, - OCTOSPI2 = 76, - OTG_FS = 67, - PVD_PVM = 1, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1); - declare!(AES); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(DCMI); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DFSDM1_FLT2); - declare!(DFSDM1_FLT3); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2D); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(DMAMUX1_OVR); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(GFXMMU); - declare!(HASH_CRS); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTG_FS); - declare!(PVD_PVM); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1(); - fn AES(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn DCMI(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DFSDM1_FLT2(); - fn DFSDM1_FLT3(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2D(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn DMAMUX1_OVR(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn GFXMMU(); - fn HASH_CRS(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTG_FS(); - fn PVD_PVM(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 95] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: DFSDM1_FLT3, - }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _reserved: 0 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { - _handler: DFSDM1_FLT2, - }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: OCTOSPI2 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _handler: AES }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: HASH_CRS }, - Vector { _handler: I2C4_ER }, - Vector { _handler: I2C4_EV }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: DMA2D }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: GFXMMU }, - Vector { - _handler: DMAMUX1_OVR, - }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -impl_rng!(0x50060800); diff --git a/embassy-stm32/src/chip/stm32l4s7vi.rs b/embassy-stm32/src/chip/stm32l4s7vi.rs deleted file mode 100644 index 502c2789..00000000 --- a/embassy-stm32/src/chip/stm32l4s7vi.rs +++ /dev/null @@ -1,608 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, AES, CAN1, COMP1, COMP2, DAC1, DCMI, DMA2D, GFXMMU, PA0, PA1, - PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, PB2, PB3, - PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, - PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, - PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, - PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, - PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, - PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, - PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, PI13, - PI14, PI15, HASH, I2C1, I2C2, I2C3, I2C4, IWDG, LPTIM1, LPTIM2, LPUART1, LTDC, OCTOSPI1, - OCTOSPI2, OCTOSPIM, OPAMP1, OPAMP2, RCC, RNG, RTC, SAI1, SAI2, SDMMC1, SPI1, SPI2, SPI3, - SYSCFG, TIM1, TIM15, TIM16, TIM17, TIM2, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, TSC, UART4, UART5, - USART1, USART2, USART3, USB_OTG_FS, WWDG -); -pub const GPIO_BASE: usize = 0x48000000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC1 = 18, - AES = 79, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - DCMI = 85, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DFSDM1_FLT2 = 63, - DFSDM1_FLT3 = 42, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2D = 90, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - DMAMUX1_OVR = 94, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - GFXMMU = 93, - HASH_CRS = 82, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 83, - I2C4_EV = 84, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - LTDC = 91, - LTDC_ER = 92, - OCTOSPI1 = 71, - OCTOSPI2 = 76, - OTG_FS = 67, - PVD_PVM = 1, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1); - declare!(AES); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(DCMI); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DFSDM1_FLT2); - declare!(DFSDM1_FLT3); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2D); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(DMAMUX1_OVR); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(GFXMMU); - declare!(HASH_CRS); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTG_FS); - declare!(PVD_PVM); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1(); - fn AES(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn DCMI(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DFSDM1_FLT2(); - fn DFSDM1_FLT3(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2D(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn DMAMUX1_OVR(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn GFXMMU(); - fn HASH_CRS(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTG_FS(); - fn PVD_PVM(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 95] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: DFSDM1_FLT3, - }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _reserved: 0 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { - _handler: DFSDM1_FLT2, - }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: OCTOSPI2 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _handler: AES }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: HASH_CRS }, - Vector { _handler: I2C4_ER }, - Vector { _handler: I2C4_EV }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: DMA2D }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: GFXMMU }, - Vector { - _handler: DMAMUX1_OVR, - }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -impl_rng!(0x50060800); diff --git a/embassy-stm32/src/chip/stm32l4s7zi.rs b/embassy-stm32/src/chip/stm32l4s7zi.rs deleted file mode 100644 index 502c2789..00000000 --- a/embassy-stm32/src/chip/stm32l4s7zi.rs +++ /dev/null @@ -1,608 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, AES, CAN1, COMP1, COMP2, DAC1, DCMI, DMA2D, GFXMMU, PA0, PA1, - PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, PB2, PB3, - PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, - PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, - PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, - PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, - PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, - PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, - PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, PI13, - PI14, PI15, HASH, I2C1, I2C2, I2C3, I2C4, IWDG, LPTIM1, LPTIM2, LPUART1, LTDC, OCTOSPI1, - OCTOSPI2, OCTOSPIM, OPAMP1, OPAMP2, RCC, RNG, RTC, SAI1, SAI2, SDMMC1, SPI1, SPI2, SPI3, - SYSCFG, TIM1, TIM15, TIM16, TIM17, TIM2, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, TSC, UART4, UART5, - USART1, USART2, USART3, USB_OTG_FS, WWDG -); -pub const GPIO_BASE: usize = 0x48000000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC1 = 18, - AES = 79, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - DCMI = 85, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DFSDM1_FLT2 = 63, - DFSDM1_FLT3 = 42, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2D = 90, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - DMAMUX1_OVR = 94, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - GFXMMU = 93, - HASH_CRS = 82, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 83, - I2C4_EV = 84, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - LTDC = 91, - LTDC_ER = 92, - OCTOSPI1 = 71, - OCTOSPI2 = 76, - OTG_FS = 67, - PVD_PVM = 1, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1); - declare!(AES); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(DCMI); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DFSDM1_FLT2); - declare!(DFSDM1_FLT3); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2D); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(DMAMUX1_OVR); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(GFXMMU); - declare!(HASH_CRS); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTG_FS); - declare!(PVD_PVM); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1(); - fn AES(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn DCMI(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DFSDM1_FLT2(); - fn DFSDM1_FLT3(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2D(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn DMAMUX1_OVR(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn GFXMMU(); - fn HASH_CRS(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTG_FS(); - fn PVD_PVM(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 95] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: DFSDM1_FLT3, - }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _reserved: 0 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { - _handler: DFSDM1_FLT2, - }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: OCTOSPI2 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _handler: AES }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: HASH_CRS }, - Vector { _handler: I2C4_ER }, - Vector { _handler: I2C4_EV }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: DMA2D }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: GFXMMU }, - Vector { - _handler: DMAMUX1_OVR, - }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -impl_rng!(0x50060800); diff --git a/embassy-stm32/src/chip/stm32l4s9ai.rs b/embassy-stm32/src/chip/stm32l4s9ai.rs deleted file mode 100644 index e2f7294c..00000000 --- a/embassy-stm32/src/chip/stm32l4s9ai.rs +++ /dev/null @@ -1,611 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, AES, CAN1, COMP1, COMP2, DAC1, DCMI, DMA2D, GFXMMU, PA0, PA1, - PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, PB2, PB3, - PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, - PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, - PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, - PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, - PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, - PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, - PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, PI13, - PI14, PI15, HASH, I2C1, I2C2, I2C3, I2C4, IWDG, LPTIM1, LPTIM2, LPUART1, LTDC, OCTOSPI1, - OCTOSPI2, OCTOSPIM, OPAMP1, OPAMP2, RCC, RNG, RTC, SAI1, SAI2, SDMMC1, SPI1, SPI2, SPI3, - SYSCFG, TIM1, TIM15, TIM16, TIM17, TIM2, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, TSC, UART4, UART5, - USART1, USART2, USART3, USB_OTG_FS, WWDG -); -pub const GPIO_BASE: usize = 0x48000000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC1 = 18, - AES = 79, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - DCMI = 85, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DFSDM1_FLT2 = 63, - DFSDM1_FLT3 = 42, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2D = 90, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - DMAMUX1_OVR = 94, - DSI = 78, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - GFXMMU = 93, - HASH_CRS = 82, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 83, - I2C4_EV = 84, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - LTDC = 91, - LTDC_ER = 92, - OCTOSPI1 = 71, - OCTOSPI2 = 76, - OTG_FS = 67, - PVD_PVM = 1, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1); - declare!(AES); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(DCMI); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DFSDM1_FLT2); - declare!(DFSDM1_FLT3); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2D); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(DMAMUX1_OVR); - declare!(DSI); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(GFXMMU); - declare!(HASH_CRS); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTG_FS); - declare!(PVD_PVM); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1(); - fn AES(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn DCMI(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DFSDM1_FLT2(); - fn DFSDM1_FLT3(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2D(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn DMAMUX1_OVR(); - fn DSI(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn GFXMMU(); - fn HASH_CRS(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTG_FS(); - fn PVD_PVM(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 95] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: DFSDM1_FLT3, - }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _reserved: 0 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { - _handler: DFSDM1_FLT2, - }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: OCTOSPI2 }, - Vector { _handler: TSC }, - Vector { _handler: DSI }, - Vector { _handler: AES }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: HASH_CRS }, - Vector { _handler: I2C4_ER }, - Vector { _handler: I2C4_EV }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: DMA2D }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: GFXMMU }, - Vector { - _handler: DMAMUX1_OVR, - }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -impl_rng!(0x50060800); diff --git a/embassy-stm32/src/chip/stm32l4s9vi.rs b/embassy-stm32/src/chip/stm32l4s9vi.rs deleted file mode 100644 index e2f7294c..00000000 --- a/embassy-stm32/src/chip/stm32l4s9vi.rs +++ /dev/null @@ -1,611 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, AES, CAN1, COMP1, COMP2, DAC1, DCMI, DMA2D, GFXMMU, PA0, PA1, - PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, PB2, PB3, - PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, - PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, - PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, - PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, - PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, - PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, - PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, PI13, - PI14, PI15, HASH, I2C1, I2C2, I2C3, I2C4, IWDG, LPTIM1, LPTIM2, LPUART1, LTDC, OCTOSPI1, - OCTOSPI2, OCTOSPIM, OPAMP1, OPAMP2, RCC, RNG, RTC, SAI1, SAI2, SDMMC1, SPI1, SPI2, SPI3, - SYSCFG, TIM1, TIM15, TIM16, TIM17, TIM2, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, TSC, UART4, UART5, - USART1, USART2, USART3, USB_OTG_FS, WWDG -); -pub const GPIO_BASE: usize = 0x48000000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC1 = 18, - AES = 79, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - DCMI = 85, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DFSDM1_FLT2 = 63, - DFSDM1_FLT3 = 42, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2D = 90, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - DMAMUX1_OVR = 94, - DSI = 78, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - GFXMMU = 93, - HASH_CRS = 82, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 83, - I2C4_EV = 84, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - LTDC = 91, - LTDC_ER = 92, - OCTOSPI1 = 71, - OCTOSPI2 = 76, - OTG_FS = 67, - PVD_PVM = 1, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1); - declare!(AES); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(DCMI); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DFSDM1_FLT2); - declare!(DFSDM1_FLT3); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2D); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(DMAMUX1_OVR); - declare!(DSI); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(GFXMMU); - declare!(HASH_CRS); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTG_FS); - declare!(PVD_PVM); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1(); - fn AES(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn DCMI(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DFSDM1_FLT2(); - fn DFSDM1_FLT3(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2D(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn DMAMUX1_OVR(); - fn DSI(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn GFXMMU(); - fn HASH_CRS(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTG_FS(); - fn PVD_PVM(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 95] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: DFSDM1_FLT3, - }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _reserved: 0 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { - _handler: DFSDM1_FLT2, - }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: OCTOSPI2 }, - Vector { _handler: TSC }, - Vector { _handler: DSI }, - Vector { _handler: AES }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: HASH_CRS }, - Vector { _handler: I2C4_ER }, - Vector { _handler: I2C4_EV }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: DMA2D }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: GFXMMU }, - Vector { - _handler: DMAMUX1_OVR, - }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -impl_rng!(0x50060800); diff --git a/embassy-stm32/src/chip/stm32l4s9zi.rs b/embassy-stm32/src/chip/stm32l4s9zi.rs deleted file mode 100644 index e2f7294c..00000000 --- a/embassy-stm32/src/chip/stm32l4s9zi.rs +++ /dev/null @@ -1,611 +0,0 @@ -use embassy_extras::peripherals; -peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, ADC1, AES, CAN1, COMP1, COMP2, DAC1, DCMI, DMA2D, GFXMMU, PA0, PA1, - PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, PB2, PB3, - PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, - PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, - PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, - PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, - PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, - PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, - PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, PI13, - PI14, PI15, HASH, I2C1, I2C2, I2C3, I2C4, IWDG, LPTIM1, LPTIM2, LPUART1, LTDC, OCTOSPI1, - OCTOSPI2, OCTOSPIM, OPAMP1, OPAMP2, RCC, RNG, RTC, SAI1, SAI2, SDMMC1, SPI1, SPI2, SPI3, - SYSCFG, TIM1, TIM15, TIM16, TIM17, TIM2, TIM3, TIM4, TIM5, TIM6, TIM7, TIM8, TSC, UART4, UART5, - USART1, USART2, USART3, USB_OTG_FS, WWDG -); -pub const GPIO_BASE: usize = 0x48000000; -pub const GPIO_STRIDE: usize = 0x400; - -pub mod interrupt { - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - enum InterruptEnum { - ADC1 = 18, - AES = 79, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - DCMI = 85, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DFSDM1_FLT2 = 63, - DFSDM1_FLT3 = 42, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2D = 90, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - DMAMUX1_OVR = 94, - DSI = 78, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - GFXMMU = 93, - HASH_CRS = 82, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 83, - I2C4_EV = 84, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - LTDC = 91, - LTDC_ER = 92, - OCTOSPI1 = 71, - OCTOSPI2 = 76, - OTG_FS = 67, - PVD_PVM = 1, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1); - declare!(AES); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(DCMI); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DFSDM1_FLT2); - declare!(DFSDM1_FLT3); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2D); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(DMAMUX1_OVR); - declare!(DSI); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(GFXMMU); - declare!(HASH_CRS); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTG_FS); - declare!(PVD_PVM); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1(); - fn AES(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn DCMI(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DFSDM1_FLT2(); - fn DFSDM1_FLT3(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2D(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn DMAMUX1_OVR(); - fn DSI(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn GFXMMU(); - fn HASH_CRS(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTG_FS(); - fn PVD_PVM(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 95] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: DFSDM1_FLT3, - }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _reserved: 0 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { - _handler: DFSDM1_FLT2, - }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: OCTOSPI2 }, - Vector { _handler: TSC }, - Vector { _handler: DSI }, - Vector { _handler: AES }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: HASH_CRS }, - Vector { _handler: I2C4_ER }, - Vector { _handler: I2C4_EV }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: DMA2D }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: GFXMMU }, - Vector { - _handler: DMAMUX1_OVR, - }, - ]; -} -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -impl_rng!(0x50060800); diff --git a/embassy-stm32/src/dma/mod.rs b/embassy-stm32/src/dma/mod.rs index c0bc497f..feec4a91 100644 --- a/embassy-stm32/src/dma/mod.rs +++ b/embassy-stm32/src/dma/mod.rs @@ -1,7 +1,7 @@ #![macro_use] -#[cfg_attr(feature = "_dma_v1", path = "dma_v1.rs")] -#[cfg_attr(feature = "_dma_v2", path = "dma_v2.rs")] +#[cfg_attr(feature = "_dma_v1", path = "v1.rs")] +#[cfg_attr(feature = "_dma_v2", path = "v2.rs")] mod _version; pub use _version::*; diff --git a/embassy-stm32/src/dma/v1.rs b/embassy-stm32/src/dma/v1.rs new file mode 100644 index 00000000..4544108e --- /dev/null +++ b/embassy-stm32/src/dma/v1.rs @@ -0,0 +1,2 @@ +/// safety: must be called only once +pub(crate) unsafe fn init() {} diff --git a/embassy-stm32/src/dma/dma_v2.rs b/embassy-stm32/src/dma/v2.rs similarity index 80% rename from embassy-stm32/src/dma/dma_v2.rs rename to embassy-stm32/src/dma/v2.rs index 5228195e..63d0586f 100644 --- a/embassy-stm32/src/dma/dma_v2.rs +++ b/embassy-stm32/src/dma/v2.rs @@ -1,6 +1,6 @@ use core::sync::atomic::{AtomicU8, Ordering}; use core::task::Poll; - +use embassy::interrupt::{Interrupt, InterruptExt}; use embassy::util::AtomicWaker; use futures::future::poll_fn; @@ -165,3 +165,23 @@ unsafe fn DMA2_Stream6() { unsafe fn DMA2_Stream7() { on_irq() } + +/// safety: must be called only once +pub(crate) unsafe fn init() { + interrupt::DMA1_Stream0::steal().enable(); + interrupt::DMA1_Stream1::steal().enable(); + interrupt::DMA1_Stream2::steal().enable(); + interrupt::DMA1_Stream3::steal().enable(); + interrupt::DMA1_Stream4::steal().enable(); + interrupt::DMA1_Stream5::steal().enable(); + interrupt::DMA1_Stream6::steal().enable(); + interrupt::DMA1_Stream7::steal().enable(); + interrupt::DMA2_Stream0::steal().enable(); + interrupt::DMA2_Stream1::steal().enable(); + interrupt::DMA2_Stream2::steal().enable(); + interrupt::DMA2_Stream3::steal().enable(); + interrupt::DMA2_Stream4::steal().enable(); + interrupt::DMA2_Stream5::steal().enable(); + interrupt::DMA2_Stream6::steal().enable(); + interrupt::DMA2_Stream7::steal().enable(); +} \ No newline at end of file diff --git a/embassy-stm32/src/exti.rs b/embassy-stm32/src/exti.rs index 250f801d..fb1c6cd3 100644 --- a/embassy-stm32/src/exti.rs +++ b/embassy-stm32/src/exti.rs @@ -4,6 +4,7 @@ use core::future::Future; use core::marker::PhantomData; use core::pin::Pin; use core::task::{Context, Poll}; +use embassy::interrupt::{Interrupt, InterruptExt}; use embassy::traits::gpio::{WaitForAnyEdge, WaitForFallingEdge, WaitForRisingEdge}; use embassy::util::{AtomicWaker, Unborrow}; use embassy_extras::impl_unborrow; @@ -248,3 +249,15 @@ impl_exti!(EXTI12, 12); impl_exti!(EXTI13, 13); impl_exti!(EXTI14, 14); impl_exti!(EXTI15, 15); + +/// safety: must be called only once +pub(crate) unsafe fn init() { + interrupt::EXTI0::steal().enable(); + interrupt::EXTI1::steal().enable(); + interrupt::EXTI2::steal().enable(); + interrupt::EXTI3::steal().enable(); + interrupt::EXTI4::steal().enable(); + interrupt::EXTI9_5::steal().enable(); + interrupt::EXTI15_10::steal().enable(); + interrupt::EXTI15_10::steal().enable(); +} diff --git a/embassy-stm32/src/lib.rs b/embassy-stm32/src/lib.rs index 0f34edac..8f11c2f8 100644 --- a/embassy-stm32/src/lib.rs +++ b/embassy-stm32/src/lib.rs @@ -17,24 +17,19 @@ pub mod exti; pub mod gpio; #[cfg(feature = "_rng")] pub mod rng; +#[cfg(feature = "_sdmmc")] +pub mod sdmmc; #[cfg(feature = "_spi")] pub mod spi; #[cfg(feature = "_usart")] pub mod usart; -#[macro_use] -pub mod sdmmc_v2; - -#[cfg(feature = "_sdmmc_v2")] -pub use sdmmc_v2 as sdmmc; - // This must go LAST so that it sees the `impl_foo!` macros mod pac; + pub mod time; -pub use embassy_macros; pub use embassy_macros::interrupt; -pub use embassy_macros::interrupt as irq; pub use pac::{interrupt, peripherals, Peripherals}; // workaround for svd2rust-generated code using `use crate::generic::*;` @@ -56,31 +51,8 @@ pub fn init(_config: Config) -> Peripherals { let p = Peripherals::take(); unsafe { - interrupt::EXTI0::steal().enable(); - interrupt::EXTI1::steal().enable(); - interrupt::EXTI2::steal().enable(); - interrupt::EXTI3::steal().enable(); - interrupt::EXTI4::steal().enable(); - interrupt::EXTI9_5::steal().enable(); - interrupt::EXTI15_10::steal().enable(); - interrupt::EXTI15_10::steal().enable(); - - interrupt::DMA1_Stream0::steal().enable(); - interrupt::DMA1_Stream1::steal().enable(); - interrupt::DMA1_Stream2::steal().enable(); - interrupt::DMA1_Stream3::steal().enable(); - interrupt::DMA1_Stream4::steal().enable(); - interrupt::DMA1_Stream5::steal().enable(); - interrupt::DMA1_Stream6::steal().enable(); - interrupt::DMA1_Stream7::steal().enable(); - interrupt::DMA2_Stream0::steal().enable(); - interrupt::DMA2_Stream1::steal().enable(); - interrupt::DMA2_Stream2::steal().enable(); - interrupt::DMA2_Stream3::steal().enable(); - interrupt::DMA2_Stream4::steal().enable(); - interrupt::DMA2_Stream5::steal().enable(); - interrupt::DMA2_Stream6::steal().enable(); - interrupt::DMA2_Stream7::steal().enable(); + exti::init(); + dma::init(); } p diff --git a/embassy-stm32/src/pac/regs.rs b/embassy-stm32/src/pac/regs.rs index 96b69253..42af348d 100644 --- a/embassy-stm32/src/pac/regs.rs +++ b/embassy-stm32/src/pac/regs.rs @@ -1,2403 +1,5 @@ #![no_std] #![doc = "Peripheral access API (generated using svd2rust v0.17.0 (22741fa 2021-04-20))"] -pub mod syscfg_l4 { - use crate::generic::*; - #[doc = "System configuration controller"] - #[derive(Copy, Clone)] - pub struct Syscfg(pub *mut u8); - unsafe impl Send for Syscfg {} - unsafe impl Sync for Syscfg {} - impl Syscfg { - #[doc = "memory remap register"] - pub fn memrmp(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(0usize)) } - } - #[doc = "configuration register 1"] - pub fn cfgr1(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(4usize)) } - } - #[doc = "external interrupt configuration register 1"] - pub fn exticr(self, n: usize) -> Reg { - assert!(n < 4usize); - unsafe { Reg::from_ptr(self.0.add(8usize + n * 4usize)) } - } - #[doc = "SCSR"] - pub fn scsr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(24usize)) } - } - #[doc = "CFGR2"] - pub fn cfgr2(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(28usize)) } - } - #[doc = "SWPR"] - pub fn swpr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(32usize)) } - } - #[doc = "SKR"] - pub fn skr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(36usize)) } - } - } - pub mod regs { - use crate::generic::*; - #[doc = "external interrupt configuration register 4"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Exticr(pub u32); - impl Exticr { - #[doc = "EXTI12 configuration bits"] - pub fn exti(&self, n: usize) -> u8 { - assert!(n < 4usize); - let offs = 0usize + n * 4usize; - let val = (self.0 >> offs) & 0x0f; - val as u8 - } - #[doc = "EXTI12 configuration bits"] - pub fn set_exti(&mut self, n: usize, val: u8) { - assert!(n < 4usize); - let offs = 0usize + n * 4usize; - self.0 = (self.0 & !(0x0f << offs)) | (((val as u32) & 0x0f) << offs); - } - } - impl Default for Exticr { - fn default() -> Exticr { - Exticr(0) - } - } - #[doc = "memory remap register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Memrmp(pub u32); - impl Memrmp { - #[doc = "Memory mapping selection"] - pub const fn mem_mode(&self) -> u8 { - let val = (self.0 >> 0usize) & 0x07; - val as u8 - } - #[doc = "Memory mapping selection"] - pub fn set_mem_mode(&mut self, val: u8) { - self.0 = (self.0 & !(0x07 << 0usize)) | (((val as u32) & 0x07) << 0usize); - } - #[doc = "QUADSPI memory mapping swap"] - pub const fn qfs(&self) -> bool { - let val = (self.0 >> 3usize) & 0x01; - val != 0 - } - #[doc = "QUADSPI memory mapping swap"] - pub fn set_qfs(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 3usize)) | (((val as u32) & 0x01) << 3usize); - } - #[doc = "Flash Bank mode selection"] - pub const fn fb_mode(&self) -> bool { - let val = (self.0 >> 8usize) & 0x01; - val != 0 - } - #[doc = "Flash Bank mode selection"] - pub fn set_fb_mode(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 8usize)) | (((val as u32) & 0x01) << 8usize); - } - } - impl Default for Memrmp { - fn default() -> Memrmp { - Memrmp(0) - } - } - #[doc = "SWPR"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Swpr(pub u32); - impl Swpr { - #[doc = "SRAWM2 write protection."] - pub fn pwp(&self, n: usize) -> bool { - assert!(n < 32usize); - let offs = 0usize + n * 1usize; - let val = (self.0 >> offs) & 0x01; - val != 0 - } - #[doc = "SRAWM2 write protection."] - pub fn set_pwp(&mut self, n: usize, val: bool) { - assert!(n < 32usize); - let offs = 0usize + n * 1usize; - self.0 = (self.0 & !(0x01 << offs)) | (((val as u32) & 0x01) << offs); - } - } - impl Default for Swpr { - fn default() -> Swpr { - Swpr(0) - } - } - #[doc = "SKR"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Skr(pub u32); - impl Skr { - #[doc = "SRAM2 write protection key for software erase"] - pub const fn key(&self) -> u8 { - let val = (self.0 >> 0usize) & 0xff; - val as u8 - } - #[doc = "SRAM2 write protection key for software erase"] - pub fn set_key(&mut self, val: u8) { - self.0 = (self.0 & !(0xff << 0usize)) | (((val as u32) & 0xff) << 0usize); - } - } - impl Default for Skr { - fn default() -> Skr { - Skr(0) - } - } - #[doc = "CFGR2"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Cfgr2(pub u32); - impl Cfgr2 { - #[doc = "Cortex LOCKUP (Hardfault) output enable bit"] - pub const fn cll(&self) -> bool { - let val = (self.0 >> 0usize) & 0x01; - val != 0 - } - #[doc = "Cortex LOCKUP (Hardfault) output enable bit"] - pub fn set_cll(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize); - } - #[doc = "SRAM2 parity lock bit"] - pub const fn spl(&self) -> bool { - let val = (self.0 >> 1usize) & 0x01; - val != 0 - } - #[doc = "SRAM2 parity lock bit"] - pub fn set_spl(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 1usize)) | (((val as u32) & 0x01) << 1usize); - } - #[doc = "PVD lock enable bit"] - pub const fn pvdl(&self) -> bool { - let val = (self.0 >> 2usize) & 0x01; - val != 0 - } - #[doc = "PVD lock enable bit"] - pub fn set_pvdl(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 2usize)) | (((val as u32) & 0x01) << 2usize); - } - #[doc = "ECC Lock"] - pub const fn eccl(&self) -> bool { - let val = (self.0 >> 3usize) & 0x01; - val != 0 - } - #[doc = "ECC Lock"] - pub fn set_eccl(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 3usize)) | (((val as u32) & 0x01) << 3usize); - } - #[doc = "SRAM2 parity error flag"] - pub const fn spf(&self) -> bool { - let val = (self.0 >> 8usize) & 0x01; - val != 0 - } - #[doc = "SRAM2 parity error flag"] - pub fn set_spf(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 8usize)) | (((val as u32) & 0x01) << 8usize); - } - } - impl Default for Cfgr2 { - fn default() -> Cfgr2 { - Cfgr2(0) - } - } - #[doc = "SCSR"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Scsr(pub u32); - impl Scsr { - #[doc = "SRAM2 Erase"] - pub const fn sram2er(&self) -> bool { - let val = (self.0 >> 0usize) & 0x01; - val != 0 - } - #[doc = "SRAM2 Erase"] - pub fn set_sram2er(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize); - } - #[doc = "SRAM2 busy by erase operation"] - pub const fn sram2bsy(&self) -> bool { - let val = (self.0 >> 1usize) & 0x01; - val != 0 - } - #[doc = "SRAM2 busy by erase operation"] - pub fn set_sram2bsy(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 1usize)) | (((val as u32) & 0x01) << 1usize); - } - } - impl Default for Scsr { - fn default() -> Scsr { - Scsr(0) - } - } - #[doc = "configuration register 1"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Cfgr1(pub u32); - impl Cfgr1 { - #[doc = "Firewall disable"] - pub const fn fwdis(&self) -> bool { - let val = (self.0 >> 0usize) & 0x01; - val != 0 - } - #[doc = "Firewall disable"] - pub fn set_fwdis(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize); - } - #[doc = "I/O analog switch voltage booster enable"] - pub const fn boosten(&self) -> bool { - let val = (self.0 >> 8usize) & 0x01; - val != 0 - } - #[doc = "I/O analog switch voltage booster enable"] - pub fn set_boosten(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 8usize)) | (((val as u32) & 0x01) << 8usize); - } - #[doc = "Fast-mode Plus (Fm+) driving capability activation on PB6"] - pub const fn i2c_pb6_fmp(&self) -> bool { - let val = (self.0 >> 16usize) & 0x01; - val != 0 - } - #[doc = "Fast-mode Plus (Fm+) driving capability activation on PB6"] - pub fn set_i2c_pb6_fmp(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 16usize)) | (((val as u32) & 0x01) << 16usize); - } - #[doc = "Fast-mode Plus (Fm+) driving capability activation on PB7"] - pub const fn i2c_pb7_fmp(&self) -> bool { - let val = (self.0 >> 17usize) & 0x01; - val != 0 - } - #[doc = "Fast-mode Plus (Fm+) driving capability activation on PB7"] - pub fn set_i2c_pb7_fmp(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 17usize)) | (((val as u32) & 0x01) << 17usize); - } - #[doc = "Fast-mode Plus (Fm+) driving capability activation on PB8"] - pub const fn i2c_pb8_fmp(&self) -> bool { - let val = (self.0 >> 18usize) & 0x01; - val != 0 - } - #[doc = "Fast-mode Plus (Fm+) driving capability activation on PB8"] - pub fn set_i2c_pb8_fmp(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 18usize)) | (((val as u32) & 0x01) << 18usize); - } - #[doc = "Fast-mode Plus (Fm+) driving capability activation on PB9"] - pub const fn i2c_pb9_fmp(&self) -> bool { - let val = (self.0 >> 19usize) & 0x01; - val != 0 - } - #[doc = "Fast-mode Plus (Fm+) driving capability activation on PB9"] - pub fn set_i2c_pb9_fmp(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 19usize)) | (((val as u32) & 0x01) << 19usize); - } - #[doc = "I2C1 Fast-mode Plus driving capability activation"] - pub const fn i2c1_fmp(&self) -> bool { - let val = (self.0 >> 20usize) & 0x01; - val != 0 - } - #[doc = "I2C1 Fast-mode Plus driving capability activation"] - pub fn set_i2c1_fmp(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 20usize)) | (((val as u32) & 0x01) << 20usize); - } - #[doc = "I2C2 Fast-mode Plus driving capability activation"] - pub const fn i2c2_fmp(&self) -> bool { - let val = (self.0 >> 21usize) & 0x01; - val != 0 - } - #[doc = "I2C2 Fast-mode Plus driving capability activation"] - pub fn set_i2c2_fmp(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 21usize)) | (((val as u32) & 0x01) << 21usize); - } - #[doc = "I2C3 Fast-mode Plus driving capability activation"] - pub const fn i2c3_fmp(&self) -> bool { - let val = (self.0 >> 22usize) & 0x01; - val != 0 - } - #[doc = "I2C3 Fast-mode Plus driving capability activation"] - pub fn set_i2c3_fmp(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 22usize)) | (((val as u32) & 0x01) << 22usize); - } - #[doc = "Floating Point Unit interrupts enable bits"] - pub const fn fpu_ie(&self) -> u8 { - let val = (self.0 >> 26usize) & 0x3f; - val as u8 - } - #[doc = "Floating Point Unit interrupts enable bits"] - pub fn set_fpu_ie(&mut self, val: u8) { - self.0 = (self.0 & !(0x3f << 26usize)) | (((val as u32) & 0x3f) << 26usize); - } - } - impl Default for Cfgr1 { - fn default() -> Cfgr1 { - Cfgr1(0) - } - } - } -} -pub mod generic { - use core::marker::PhantomData; - #[derive(Copy, Clone)] - pub struct RW; - #[derive(Copy, Clone)] - pub struct R; - #[derive(Copy, Clone)] - pub struct W; - mod sealed { - use super::*; - pub trait Access {} - impl Access for R {} - impl Access for W {} - impl Access for RW {} - } - pub trait Access: sealed::Access + Copy {} - impl Access for R {} - impl Access for W {} - impl Access for RW {} - pub trait Read: Access {} - impl Read for RW {} - impl Read for R {} - pub trait Write: Access {} - impl Write for RW {} - impl Write for W {} - #[derive(Copy, Clone)] - pub struct Reg { - ptr: *mut u8, - phantom: PhantomData<*mut (T, A)>, - } - unsafe impl Send for Reg {} - unsafe impl Sync for Reg {} - impl Reg { - pub fn from_ptr(ptr: *mut u8) -> Self { - Self { - ptr, - phantom: PhantomData, - } - } - pub fn ptr(&self) -> *mut T { - self.ptr as _ - } - } - impl Reg { - pub unsafe fn read(&self) -> T { - (self.ptr as *mut T).read_volatile() - } - } - impl Reg { - pub unsafe fn write_value(&self, val: T) { - (self.ptr as *mut T).write_volatile(val) - } - } - impl Reg { - pub unsafe fn write(&self, f: impl FnOnce(&mut T) -> R) -> R { - let mut val = Default::default(); - let res = f(&mut val); - self.write_value(val); - res - } - } - impl Reg { - pub unsafe fn modify(&self, f: impl FnOnce(&mut T) -> R) -> R { - let mut val = self.read(); - let res = f(&mut val); - self.write_value(val); - res - } - } -} -pub mod timer_v1 { - use crate::generic::*; - #[doc = "General purpose 16-bit timer"] - #[derive(Copy, Clone)] - pub struct TimGp16(pub *mut u8); - unsafe impl Send for TimGp16 {} - unsafe impl Sync for TimGp16 {} - impl TimGp16 { - #[doc = "control register 1"] - pub fn cr1(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(0usize)) } - } - #[doc = "control register 2"] - pub fn cr2(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(4usize)) } - } - #[doc = "slave mode control register"] - pub fn smcr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(8usize)) } - } - #[doc = "DMA/Interrupt enable register"] - pub fn dier(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(12usize)) } - } - #[doc = "status register"] - pub fn sr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(16usize)) } - } - #[doc = "event generation register"] - pub fn egr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(20usize)) } - } - #[doc = "capture/compare mode register 1 (input mode)"] - pub fn ccmr_input(self, n: usize) -> Reg { - assert!(n < 2usize); - unsafe { Reg::from_ptr(self.0.add(24usize + n * 4usize)) } - } - #[doc = "capture/compare mode register 1 (output mode)"] - pub fn ccmr_output(self, n: usize) -> Reg { - assert!(n < 2usize); - unsafe { Reg::from_ptr(self.0.add(24usize + n * 4usize)) } - } - #[doc = "capture/compare enable register"] - pub fn ccer(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(32usize)) } - } - #[doc = "counter"] - pub fn cnt(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(36usize)) } - } - #[doc = "prescaler"] - pub fn psc(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(40usize)) } - } - #[doc = "auto-reload register"] - pub fn arr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(44usize)) } - } - #[doc = "capture/compare register"] - pub fn ccr(self, n: usize) -> Reg { - assert!(n < 4usize); - unsafe { Reg::from_ptr(self.0.add(52usize + n * 4usize)) } - } - #[doc = "DMA control register"] - pub fn dcr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(72usize)) } - } - #[doc = "DMA address for full transfer"] - pub fn dmar(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(76usize)) } - } - } - #[doc = "Advanced-timers"] - #[derive(Copy, Clone)] - pub struct TimAdv(pub *mut u8); - unsafe impl Send for TimAdv {} - unsafe impl Sync for TimAdv {} - impl TimAdv { - #[doc = "control register 1"] - pub fn cr1(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(0usize)) } - } - #[doc = "control register 2"] - pub fn cr2(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(4usize)) } - } - #[doc = "slave mode control register"] - pub fn smcr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(8usize)) } - } - #[doc = "DMA/Interrupt enable register"] - pub fn dier(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(12usize)) } - } - #[doc = "status register"] - pub fn sr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(16usize)) } - } - #[doc = "event generation register"] - pub fn egr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(20usize)) } - } - #[doc = "capture/compare mode register 1 (input mode)"] - pub fn ccmr_input(self, n: usize) -> Reg { - assert!(n < 2usize); - unsafe { Reg::from_ptr(self.0.add(24usize + n * 4usize)) } - } - #[doc = "capture/compare mode register 1 (output mode)"] - pub fn ccmr_output(self, n: usize) -> Reg { - assert!(n < 2usize); - unsafe { Reg::from_ptr(self.0.add(24usize + n * 4usize)) } - } - #[doc = "capture/compare enable register"] - pub fn ccer(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(32usize)) } - } - #[doc = "counter"] - pub fn cnt(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(36usize)) } - } - #[doc = "prescaler"] - pub fn psc(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(40usize)) } - } - #[doc = "auto-reload register"] - pub fn arr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(44usize)) } - } - #[doc = "repetition counter register"] - pub fn rcr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(48usize)) } - } - #[doc = "capture/compare register"] - pub fn ccr(self, n: usize) -> Reg { - assert!(n < 4usize); - unsafe { Reg::from_ptr(self.0.add(52usize + n * 4usize)) } - } - #[doc = "break and dead-time register"] - pub fn bdtr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(68usize)) } - } - #[doc = "DMA control register"] - pub fn dcr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(72usize)) } - } - #[doc = "DMA address for full transfer"] - pub fn dmar(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(76usize)) } - } - } - #[doc = "General purpose 32-bit timer"] - #[derive(Copy, Clone)] - pub struct TimGp32(pub *mut u8); - unsafe impl Send for TimGp32 {} - unsafe impl Sync for TimGp32 {} - impl TimGp32 { - #[doc = "control register 1"] - pub fn cr1(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(0usize)) } - } - #[doc = "control register 2"] - pub fn cr2(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(4usize)) } - } - #[doc = "slave mode control register"] - pub fn smcr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(8usize)) } - } - #[doc = "DMA/Interrupt enable register"] - pub fn dier(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(12usize)) } - } - #[doc = "status register"] - pub fn sr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(16usize)) } - } - #[doc = "event generation register"] - pub fn egr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(20usize)) } - } - #[doc = "capture/compare mode register 1 (input mode)"] - pub fn ccmr_input(self, n: usize) -> Reg { - assert!(n < 2usize); - unsafe { Reg::from_ptr(self.0.add(24usize + n * 4usize)) } - } - #[doc = "capture/compare mode register 1 (output mode)"] - pub fn ccmr_output(self, n: usize) -> Reg { - assert!(n < 2usize); - unsafe { Reg::from_ptr(self.0.add(24usize + n * 4usize)) } - } - #[doc = "capture/compare enable register"] - pub fn ccer(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(32usize)) } - } - #[doc = "counter"] - pub fn cnt(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(36usize)) } - } - #[doc = "prescaler"] - pub fn psc(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(40usize)) } - } - #[doc = "auto-reload register"] - pub fn arr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(44usize)) } - } - #[doc = "capture/compare register"] - pub fn ccr(self, n: usize) -> Reg { - assert!(n < 4usize); - unsafe { Reg::from_ptr(self.0.add(52usize + n * 4usize)) } - } - #[doc = "DMA control register"] - pub fn dcr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(72usize)) } - } - #[doc = "DMA address for full transfer"] - pub fn dmar(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(76usize)) } - } - } - #[doc = "Basic timer"] - #[derive(Copy, Clone)] - pub struct TimBasic(pub *mut u8); - unsafe impl Send for TimBasic {} - unsafe impl Sync for TimBasic {} - impl TimBasic { - #[doc = "control register 1"] - pub fn cr1(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(0usize)) } - } - #[doc = "control register 2"] - pub fn cr2(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(4usize)) } - } - #[doc = "DMA/Interrupt enable register"] - pub fn dier(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(12usize)) } - } - #[doc = "status register"] - pub fn sr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(16usize)) } - } - #[doc = "event generation register"] - pub fn egr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(20usize)) } - } - #[doc = "counter"] - pub fn cnt(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(36usize)) } - } - #[doc = "prescaler"] - pub fn psc(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(40usize)) } - } - #[doc = "auto-reload register"] - pub fn arr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(44usize)) } - } - } - pub mod regs { - use crate::generic::*; - #[doc = "control register 1"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Cr1Basic(pub u32); - impl Cr1Basic { - #[doc = "Counter enable"] - pub const fn cen(&self) -> bool { - let val = (self.0 >> 0usize) & 0x01; - val != 0 - } - #[doc = "Counter enable"] - pub fn set_cen(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize); - } - #[doc = "Update disable"] - pub const fn udis(&self) -> bool { - let val = (self.0 >> 1usize) & 0x01; - val != 0 - } - #[doc = "Update disable"] - pub fn set_udis(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 1usize)) | (((val as u32) & 0x01) << 1usize); - } - #[doc = "Update request source"] - pub const fn urs(&self) -> super::vals::Urs { - let val = (self.0 >> 2usize) & 0x01; - super::vals::Urs(val as u8) - } - #[doc = "Update request source"] - pub fn set_urs(&mut self, val: super::vals::Urs) { - self.0 = (self.0 & !(0x01 << 2usize)) | (((val.0 as u32) & 0x01) << 2usize); - } - #[doc = "One-pulse mode"] - pub const fn opm(&self) -> super::vals::Opm { - let val = (self.0 >> 3usize) & 0x01; - super::vals::Opm(val as u8) - } - #[doc = "One-pulse mode"] - pub fn set_opm(&mut self, val: super::vals::Opm) { - self.0 = (self.0 & !(0x01 << 3usize)) | (((val.0 as u32) & 0x01) << 3usize); - } - #[doc = "Auto-reload preload enable"] - pub const fn arpe(&self) -> super::vals::Arpe { - let val = (self.0 >> 7usize) & 0x01; - super::vals::Arpe(val as u8) - } - #[doc = "Auto-reload preload enable"] - pub fn set_arpe(&mut self, val: super::vals::Arpe) { - self.0 = (self.0 & !(0x01 << 7usize)) | (((val.0 as u32) & 0x01) << 7usize); - } - } - impl Default for Cr1Basic { - fn default() -> Cr1Basic { - Cr1Basic(0) - } - } - #[doc = "DMA/Interrupt enable register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct DierBasic(pub u32); - impl DierBasic { - #[doc = "Update interrupt enable"] - pub const fn uie(&self) -> bool { - let val = (self.0 >> 0usize) & 0x01; - val != 0 - } - #[doc = "Update interrupt enable"] - pub fn set_uie(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize); - } - #[doc = "Update DMA request enable"] - pub const fn ude(&self) -> bool { - let val = (self.0 >> 8usize) & 0x01; - val != 0 - } - #[doc = "Update DMA request enable"] - pub fn set_ude(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 8usize)) | (((val as u32) & 0x01) << 8usize); - } - } - impl Default for DierBasic { - fn default() -> DierBasic { - DierBasic(0) - } - } - #[doc = "status register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct SrBasic(pub u32); - impl SrBasic { - #[doc = "Update interrupt flag"] - pub const fn uif(&self) -> bool { - let val = (self.0 >> 0usize) & 0x01; - val != 0 - } - #[doc = "Update interrupt flag"] - pub fn set_uif(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize); - } - } - impl Default for SrBasic { - fn default() -> SrBasic { - SrBasic(0) - } - } - #[doc = "break and dead-time register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Bdtr(pub u32); - impl Bdtr { - #[doc = "Dead-time generator setup"] - pub const fn dtg(&self) -> u8 { - let val = (self.0 >> 0usize) & 0xff; - val as u8 - } - #[doc = "Dead-time generator setup"] - pub fn set_dtg(&mut self, val: u8) { - self.0 = (self.0 & !(0xff << 0usize)) | (((val as u32) & 0xff) << 0usize); - } - #[doc = "Lock configuration"] - pub const fn lock(&self) -> u8 { - let val = (self.0 >> 8usize) & 0x03; - val as u8 - } - #[doc = "Lock configuration"] - pub fn set_lock(&mut self, val: u8) { - self.0 = (self.0 & !(0x03 << 8usize)) | (((val as u32) & 0x03) << 8usize); - } - #[doc = "Off-state selection for Idle mode"] - pub const fn ossi(&self) -> super::vals::Ossi { - let val = (self.0 >> 10usize) & 0x01; - super::vals::Ossi(val as u8) - } - #[doc = "Off-state selection for Idle mode"] - pub fn set_ossi(&mut self, val: super::vals::Ossi) { - self.0 = (self.0 & !(0x01 << 10usize)) | (((val.0 as u32) & 0x01) << 10usize); - } - #[doc = "Off-state selection for Run mode"] - pub const fn ossr(&self) -> super::vals::Ossr { - let val = (self.0 >> 11usize) & 0x01; - super::vals::Ossr(val as u8) - } - #[doc = "Off-state selection for Run mode"] - pub fn set_ossr(&mut self, val: super::vals::Ossr) { - self.0 = (self.0 & !(0x01 << 11usize)) | (((val.0 as u32) & 0x01) << 11usize); - } - #[doc = "Break enable"] - pub const fn bke(&self) -> bool { - let val = (self.0 >> 12usize) & 0x01; - val != 0 - } - #[doc = "Break enable"] - pub fn set_bke(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 12usize)) | (((val as u32) & 0x01) << 12usize); - } - #[doc = "Break polarity"] - pub const fn bkp(&self) -> bool { - let val = (self.0 >> 13usize) & 0x01; - val != 0 - } - #[doc = "Break polarity"] - pub fn set_bkp(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 13usize)) | (((val as u32) & 0x01) << 13usize); - } - #[doc = "Automatic output enable"] - pub const fn aoe(&self) -> bool { - let val = (self.0 >> 14usize) & 0x01; - val != 0 - } - #[doc = "Automatic output enable"] - pub fn set_aoe(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 14usize)) | (((val as u32) & 0x01) << 14usize); - } - #[doc = "Main output enable"] - pub const fn moe(&self) -> bool { - let val = (self.0 >> 15usize) & 0x01; - val != 0 - } - #[doc = "Main output enable"] - pub fn set_moe(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 15usize)) | (((val as u32) & 0x01) << 15usize); - } - } - impl Default for Bdtr { - fn default() -> Bdtr { - Bdtr(0) - } - } - #[doc = "control register 2"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Cr2Gp(pub u32); - impl Cr2Gp { - #[doc = "Capture/compare DMA selection"] - pub const fn ccds(&self) -> super::vals::Ccds { - let val = (self.0 >> 3usize) & 0x01; - super::vals::Ccds(val as u8) - } - #[doc = "Capture/compare DMA selection"] - pub fn set_ccds(&mut self, val: super::vals::Ccds) { - self.0 = (self.0 & !(0x01 << 3usize)) | (((val.0 as u32) & 0x01) << 3usize); - } - #[doc = "Master mode selection"] - pub const fn mms(&self) -> super::vals::Mms { - let val = (self.0 >> 4usize) & 0x07; - super::vals::Mms(val as u8) - } - #[doc = "Master mode selection"] - pub fn set_mms(&mut self, val: super::vals::Mms) { - self.0 = (self.0 & !(0x07 << 4usize)) | (((val.0 as u32) & 0x07) << 4usize); - } - #[doc = "TI1 selection"] - pub const fn ti1s(&self) -> super::vals::Tis { - let val = (self.0 >> 7usize) & 0x01; - super::vals::Tis(val as u8) - } - #[doc = "TI1 selection"] - pub fn set_ti1s(&mut self, val: super::vals::Tis) { - self.0 = (self.0 & !(0x01 << 7usize)) | (((val.0 as u32) & 0x01) << 7usize); - } - } - impl Default for Cr2Gp { - fn default() -> Cr2Gp { - Cr2Gp(0) - } - } - #[doc = "DMA address for full transfer"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Dmar(pub u32); - impl Dmar { - #[doc = "DMA register for burst accesses"] - pub const fn dmab(&self) -> u16 { - let val = (self.0 >> 0usize) & 0xffff; - val as u16 - } - #[doc = "DMA register for burst accesses"] - pub fn set_dmab(&mut self, val: u16) { - self.0 = (self.0 & !(0xffff << 0usize)) | (((val as u32) & 0xffff) << 0usize); - } - } - impl Default for Dmar { - fn default() -> Dmar { - Dmar(0) - } - } - #[doc = "capture/compare mode register 2 (output mode)"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct CcmrOutput(pub u32); - impl CcmrOutput { - #[doc = "Capture/Compare 3 selection"] - pub fn ccs(&self, n: usize) -> super::vals::CcmrOutputCcs { - assert!(n < 2usize); - let offs = 0usize + n * 8usize; - let val = (self.0 >> offs) & 0x03; - super::vals::CcmrOutputCcs(val as u8) - } - #[doc = "Capture/Compare 3 selection"] - pub fn set_ccs(&mut self, n: usize, val: super::vals::CcmrOutputCcs) { - assert!(n < 2usize); - let offs = 0usize + n * 8usize; - self.0 = (self.0 & !(0x03 << offs)) | (((val.0 as u32) & 0x03) << offs); - } - #[doc = "Output compare 3 fast enable"] - pub fn ocfe(&self, n: usize) -> bool { - assert!(n < 2usize); - let offs = 2usize + n * 8usize; - let val = (self.0 >> offs) & 0x01; - val != 0 - } - #[doc = "Output compare 3 fast enable"] - pub fn set_ocfe(&mut self, n: usize, val: bool) { - assert!(n < 2usize); - let offs = 2usize + n * 8usize; - self.0 = (self.0 & !(0x01 << offs)) | (((val as u32) & 0x01) << offs); - } - #[doc = "Output compare 3 preload enable"] - pub fn ocpe(&self, n: usize) -> super::vals::Ocpe { - assert!(n < 2usize); - let offs = 3usize + n * 8usize; - let val = (self.0 >> offs) & 0x01; - super::vals::Ocpe(val as u8) - } - #[doc = "Output compare 3 preload enable"] - pub fn set_ocpe(&mut self, n: usize, val: super::vals::Ocpe) { - assert!(n < 2usize); - let offs = 3usize + n * 8usize; - self.0 = (self.0 & !(0x01 << offs)) | (((val.0 as u32) & 0x01) << offs); - } - #[doc = "Output compare 3 mode"] - pub fn ocm(&self, n: usize) -> super::vals::Ocm { - assert!(n < 2usize); - let offs = 4usize + n * 8usize; - let val = (self.0 >> offs) & 0x07; - super::vals::Ocm(val as u8) - } - #[doc = "Output compare 3 mode"] - pub fn set_ocm(&mut self, n: usize, val: super::vals::Ocm) { - assert!(n < 2usize); - let offs = 4usize + n * 8usize; - self.0 = (self.0 & !(0x07 << offs)) | (((val.0 as u32) & 0x07) << offs); - } - #[doc = "Output compare 3 clear enable"] - pub fn occe(&self, n: usize) -> bool { - assert!(n < 2usize); - let offs = 7usize + n * 8usize; - let val = (self.0 >> offs) & 0x01; - val != 0 - } - #[doc = "Output compare 3 clear enable"] - pub fn set_occe(&mut self, n: usize, val: bool) { - assert!(n < 2usize); - let offs = 7usize + n * 8usize; - self.0 = (self.0 & !(0x01 << offs)) | (((val as u32) & 0x01) << offs); - } - } - impl Default for CcmrOutput { - fn default() -> CcmrOutput { - CcmrOutput(0) - } - } - #[doc = "prescaler"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Psc(pub u32); - impl Psc { - #[doc = "Prescaler value"] - pub const fn psc(&self) -> u16 { - let val = (self.0 >> 0usize) & 0xffff; - val as u16 - } - #[doc = "Prescaler value"] - pub fn set_psc(&mut self, val: u16) { - self.0 = (self.0 & !(0xffff << 0usize)) | (((val as u32) & 0xffff) << 0usize); - } - } - impl Default for Psc { - fn default() -> Psc { - Psc(0) - } - } - #[doc = "DMA/Interrupt enable register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct DierGp(pub u32); - impl DierGp { - #[doc = "Update interrupt enable"] - pub const fn uie(&self) -> bool { - let val = (self.0 >> 0usize) & 0x01; - val != 0 - } - #[doc = "Update interrupt enable"] - pub fn set_uie(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize); - } - #[doc = "Capture/Compare 1 interrupt enable"] - pub fn ccie(&self, n: usize) -> bool { - assert!(n < 4usize); - let offs = 1usize + n * 1usize; - let val = (self.0 >> offs) & 0x01; - val != 0 - } - #[doc = "Capture/Compare 1 interrupt enable"] - pub fn set_ccie(&mut self, n: usize, val: bool) { - assert!(n < 4usize); - let offs = 1usize + n * 1usize; - self.0 = (self.0 & !(0x01 << offs)) | (((val as u32) & 0x01) << offs); - } - #[doc = "Trigger interrupt enable"] - pub const fn tie(&self) -> bool { - let val = (self.0 >> 6usize) & 0x01; - val != 0 - } - #[doc = "Trigger interrupt enable"] - pub fn set_tie(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 6usize)) | (((val as u32) & 0x01) << 6usize); - } - #[doc = "Update DMA request enable"] - pub const fn ude(&self) -> bool { - let val = (self.0 >> 8usize) & 0x01; - val != 0 - } - #[doc = "Update DMA request enable"] - pub fn set_ude(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 8usize)) | (((val as u32) & 0x01) << 8usize); - } - #[doc = "Capture/Compare 1 DMA request enable"] - pub fn ccde(&self, n: usize) -> bool { - assert!(n < 4usize); - let offs = 9usize + n * 1usize; - let val = (self.0 >> offs) & 0x01; - val != 0 - } - #[doc = "Capture/Compare 1 DMA request enable"] - pub fn set_ccde(&mut self, n: usize, val: bool) { - assert!(n < 4usize); - let offs = 9usize + n * 1usize; - self.0 = (self.0 & !(0x01 << offs)) | (((val as u32) & 0x01) << offs); - } - #[doc = "Trigger DMA request enable"] - pub const fn tde(&self) -> bool { - let val = (self.0 >> 14usize) & 0x01; - val != 0 - } - #[doc = "Trigger DMA request enable"] - pub fn set_tde(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 14usize)) | (((val as u32) & 0x01) << 14usize); - } - } - impl Default for DierGp { - fn default() -> DierGp { - DierGp(0) - } - } - #[doc = "capture/compare enable register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct CcerGp(pub u32); - impl CcerGp { - #[doc = "Capture/Compare 1 output enable"] - pub fn cce(&self, n: usize) -> bool { - assert!(n < 4usize); - let offs = 0usize + n * 4usize; - let val = (self.0 >> offs) & 0x01; - val != 0 - } - #[doc = "Capture/Compare 1 output enable"] - pub fn set_cce(&mut self, n: usize, val: bool) { - assert!(n < 4usize); - let offs = 0usize + n * 4usize; - self.0 = (self.0 & !(0x01 << offs)) | (((val as u32) & 0x01) << offs); - } - #[doc = "Capture/Compare 1 output Polarity"] - pub fn ccp(&self, n: usize) -> bool { - assert!(n < 4usize); - let offs = 1usize + n * 4usize; - let val = (self.0 >> offs) & 0x01; - val != 0 - } - #[doc = "Capture/Compare 1 output Polarity"] - pub fn set_ccp(&mut self, n: usize, val: bool) { - assert!(n < 4usize); - let offs = 1usize + n * 4usize; - self.0 = (self.0 & !(0x01 << offs)) | (((val as u32) & 0x01) << offs); - } - #[doc = "Capture/Compare 1 output Polarity"] - pub fn ccnp(&self, n: usize) -> bool { - assert!(n < 4usize); - let offs = 3usize + n * 4usize; - let val = (self.0 >> offs) & 0x01; - val != 0 - } - #[doc = "Capture/Compare 1 output Polarity"] - pub fn set_ccnp(&mut self, n: usize, val: bool) { - assert!(n < 4usize); - let offs = 3usize + n * 4usize; - self.0 = (self.0 & !(0x01 << offs)) | (((val as u32) & 0x01) << offs); - } - } - impl Default for CcerGp { - fn default() -> CcerGp { - CcerGp(0) - } - } - #[doc = "event generation register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct EgrBasic(pub u32); - impl EgrBasic { - #[doc = "Update generation"] - pub const fn ug(&self) -> bool { - let val = (self.0 >> 0usize) & 0x01; - val != 0 - } - #[doc = "Update generation"] - pub fn set_ug(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize); - } - } - impl Default for EgrBasic { - fn default() -> EgrBasic { - EgrBasic(0) - } - } - #[doc = "control register 1"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Cr1Gp(pub u32); - impl Cr1Gp { - #[doc = "Counter enable"] - pub const fn cen(&self) -> bool { - let val = (self.0 >> 0usize) & 0x01; - val != 0 - } - #[doc = "Counter enable"] - pub fn set_cen(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize); - } - #[doc = "Update disable"] - pub const fn udis(&self) -> bool { - let val = (self.0 >> 1usize) & 0x01; - val != 0 - } - #[doc = "Update disable"] - pub fn set_udis(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 1usize)) | (((val as u32) & 0x01) << 1usize); - } - #[doc = "Update request source"] - pub const fn urs(&self) -> super::vals::Urs { - let val = (self.0 >> 2usize) & 0x01; - super::vals::Urs(val as u8) - } - #[doc = "Update request source"] - pub fn set_urs(&mut self, val: super::vals::Urs) { - self.0 = (self.0 & !(0x01 << 2usize)) | (((val.0 as u32) & 0x01) << 2usize); - } - #[doc = "One-pulse mode"] - pub const fn opm(&self) -> super::vals::Opm { - let val = (self.0 >> 3usize) & 0x01; - super::vals::Opm(val as u8) - } - #[doc = "One-pulse mode"] - pub fn set_opm(&mut self, val: super::vals::Opm) { - self.0 = (self.0 & !(0x01 << 3usize)) | (((val.0 as u32) & 0x01) << 3usize); - } - #[doc = "Direction"] - pub const fn dir(&self) -> super::vals::Dir { - let val = (self.0 >> 4usize) & 0x01; - super::vals::Dir(val as u8) - } - #[doc = "Direction"] - pub fn set_dir(&mut self, val: super::vals::Dir) { - self.0 = (self.0 & !(0x01 << 4usize)) | (((val.0 as u32) & 0x01) << 4usize); - } - #[doc = "Center-aligned mode selection"] - pub const fn cms(&self) -> super::vals::Cms { - let val = (self.0 >> 5usize) & 0x03; - super::vals::Cms(val as u8) - } - #[doc = "Center-aligned mode selection"] - pub fn set_cms(&mut self, val: super::vals::Cms) { - self.0 = (self.0 & !(0x03 << 5usize)) | (((val.0 as u32) & 0x03) << 5usize); - } - #[doc = "Auto-reload preload enable"] - pub const fn arpe(&self) -> super::vals::Arpe { - let val = (self.0 >> 7usize) & 0x01; - super::vals::Arpe(val as u8) - } - #[doc = "Auto-reload preload enable"] - pub fn set_arpe(&mut self, val: super::vals::Arpe) { - self.0 = (self.0 & !(0x01 << 7usize)) | (((val.0 as u32) & 0x01) << 7usize); - } - #[doc = "Clock division"] - pub const fn ckd(&self) -> super::vals::Ckd { - let val = (self.0 >> 8usize) & 0x03; - super::vals::Ckd(val as u8) - } - #[doc = "Clock division"] - pub fn set_ckd(&mut self, val: super::vals::Ckd) { - self.0 = (self.0 & !(0x03 << 8usize)) | (((val.0 as u32) & 0x03) << 8usize); - } - } - impl Default for Cr1Gp { - fn default() -> Cr1Gp { - Cr1Gp(0) - } - } - #[doc = "counter"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Cnt16(pub u32); - impl Cnt16 { - #[doc = "counter value"] - pub const fn cnt(&self) -> u16 { - let val = (self.0 >> 0usize) & 0xffff; - val as u16 - } - #[doc = "counter value"] - pub fn set_cnt(&mut self, val: u16) { - self.0 = (self.0 & !(0xffff << 0usize)) | (((val as u32) & 0xffff) << 0usize); - } - } - impl Default for Cnt16 { - fn default() -> Cnt16 { - Cnt16(0) - } - } - #[doc = "status register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct SrAdv(pub u32); - impl SrAdv { - #[doc = "Update interrupt flag"] - pub const fn uif(&self) -> bool { - let val = (self.0 >> 0usize) & 0x01; - val != 0 - } - #[doc = "Update interrupt flag"] - pub fn set_uif(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize); - } - #[doc = "Capture/compare 1 interrupt flag"] - pub fn ccif(&self, n: usize) -> bool { - assert!(n < 4usize); - let offs = 1usize + n * 1usize; - let val = (self.0 >> offs) & 0x01; - val != 0 - } - #[doc = "Capture/compare 1 interrupt flag"] - pub fn set_ccif(&mut self, n: usize, val: bool) { - assert!(n < 4usize); - let offs = 1usize + n * 1usize; - self.0 = (self.0 & !(0x01 << offs)) | (((val as u32) & 0x01) << offs); - } - #[doc = "COM interrupt flag"] - pub const fn comif(&self) -> bool { - let val = (self.0 >> 5usize) & 0x01; - val != 0 - } - #[doc = "COM interrupt flag"] - pub fn set_comif(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 5usize)) | (((val as u32) & 0x01) << 5usize); - } - #[doc = "Trigger interrupt flag"] - pub const fn tif(&self) -> bool { - let val = (self.0 >> 6usize) & 0x01; - val != 0 - } - #[doc = "Trigger interrupt flag"] - pub fn set_tif(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 6usize)) | (((val as u32) & 0x01) << 6usize); - } - #[doc = "Break interrupt flag"] - pub const fn bif(&self) -> bool { - let val = (self.0 >> 7usize) & 0x01; - val != 0 - } - #[doc = "Break interrupt flag"] - pub fn set_bif(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 7usize)) | (((val as u32) & 0x01) << 7usize); - } - #[doc = "Capture/Compare 1 overcapture flag"] - pub fn ccof(&self, n: usize) -> bool { - assert!(n < 4usize); - let offs = 9usize + n * 1usize; - let val = (self.0 >> offs) & 0x01; - val != 0 - } - #[doc = "Capture/Compare 1 overcapture flag"] - pub fn set_ccof(&mut self, n: usize, val: bool) { - assert!(n < 4usize); - let offs = 9usize + n * 1usize; - self.0 = (self.0 & !(0x01 << offs)) | (((val as u32) & 0x01) << offs); - } - } - impl Default for SrAdv { - fn default() -> SrAdv { - SrAdv(0) - } - } - #[doc = "counter"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Cnt32(pub u32); - impl Cnt32 { - #[doc = "counter value"] - pub const fn cnt(&self) -> u32 { - let val = (self.0 >> 0usize) & 0xffff_ffff; - val as u32 - } - #[doc = "counter value"] - pub fn set_cnt(&mut self, val: u32) { - self.0 = - (self.0 & !(0xffff_ffff << 0usize)) | (((val as u32) & 0xffff_ffff) << 0usize); - } - } - impl Default for Cnt32 { - fn default() -> Cnt32 { - Cnt32(0) - } - } - #[doc = "slave mode control register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Smcr(pub u32); - impl Smcr { - #[doc = "Slave mode selection"] - pub const fn sms(&self) -> super::vals::Sms { - let val = (self.0 >> 0usize) & 0x07; - super::vals::Sms(val as u8) - } - #[doc = "Slave mode selection"] - pub fn set_sms(&mut self, val: super::vals::Sms) { - self.0 = (self.0 & !(0x07 << 0usize)) | (((val.0 as u32) & 0x07) << 0usize); - } - #[doc = "Trigger selection"] - pub const fn ts(&self) -> super::vals::Ts { - let val = (self.0 >> 4usize) & 0x07; - super::vals::Ts(val as u8) - } - #[doc = "Trigger selection"] - pub fn set_ts(&mut self, val: super::vals::Ts) { - self.0 = (self.0 & !(0x07 << 4usize)) | (((val.0 as u32) & 0x07) << 4usize); - } - #[doc = "Master/Slave mode"] - pub const fn msm(&self) -> super::vals::Msm { - let val = (self.0 >> 7usize) & 0x01; - super::vals::Msm(val as u8) - } - #[doc = "Master/Slave mode"] - pub fn set_msm(&mut self, val: super::vals::Msm) { - self.0 = (self.0 & !(0x01 << 7usize)) | (((val.0 as u32) & 0x01) << 7usize); - } - #[doc = "External trigger filter"] - pub const fn etf(&self) -> super::vals::Etf { - let val = (self.0 >> 8usize) & 0x0f; - super::vals::Etf(val as u8) - } - #[doc = "External trigger filter"] - pub fn set_etf(&mut self, val: super::vals::Etf) { - self.0 = (self.0 & !(0x0f << 8usize)) | (((val.0 as u32) & 0x0f) << 8usize); - } - #[doc = "External trigger prescaler"] - pub const fn etps(&self) -> super::vals::Etps { - let val = (self.0 >> 12usize) & 0x03; - super::vals::Etps(val as u8) - } - #[doc = "External trigger prescaler"] - pub fn set_etps(&mut self, val: super::vals::Etps) { - self.0 = (self.0 & !(0x03 << 12usize)) | (((val.0 as u32) & 0x03) << 12usize); - } - #[doc = "External clock enable"] - pub const fn ece(&self) -> super::vals::Ece { - let val = (self.0 >> 14usize) & 0x01; - super::vals::Ece(val as u8) - } - #[doc = "External clock enable"] - pub fn set_ece(&mut self, val: super::vals::Ece) { - self.0 = (self.0 & !(0x01 << 14usize)) | (((val.0 as u32) & 0x01) << 14usize); - } - #[doc = "External trigger polarity"] - pub const fn etp(&self) -> super::vals::Etp { - let val = (self.0 >> 15usize) & 0x01; - super::vals::Etp(val as u8) - } - #[doc = "External trigger polarity"] - pub fn set_etp(&mut self, val: super::vals::Etp) { - self.0 = (self.0 & !(0x01 << 15usize)) | (((val.0 as u32) & 0x01) << 15usize); - } - } - impl Default for Smcr { - fn default() -> Smcr { - Smcr(0) - } - } - #[doc = "control register 2"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Cr2Adv(pub u32); - impl Cr2Adv { - #[doc = "Capture/compare preloaded control"] - pub const fn ccpc(&self) -> bool { - let val = (self.0 >> 0usize) & 0x01; - val != 0 - } - #[doc = "Capture/compare preloaded control"] - pub fn set_ccpc(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize); - } - #[doc = "Capture/compare control update selection"] - pub const fn ccus(&self) -> bool { - let val = (self.0 >> 2usize) & 0x01; - val != 0 - } - #[doc = "Capture/compare control update selection"] - pub fn set_ccus(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 2usize)) | (((val as u32) & 0x01) << 2usize); - } - #[doc = "Capture/compare DMA selection"] - pub const fn ccds(&self) -> super::vals::Ccds { - let val = (self.0 >> 3usize) & 0x01; - super::vals::Ccds(val as u8) - } - #[doc = "Capture/compare DMA selection"] - pub fn set_ccds(&mut self, val: super::vals::Ccds) { - self.0 = (self.0 & !(0x01 << 3usize)) | (((val.0 as u32) & 0x01) << 3usize); - } - #[doc = "Master mode selection"] - pub const fn mms(&self) -> super::vals::Mms { - let val = (self.0 >> 4usize) & 0x07; - super::vals::Mms(val as u8) - } - #[doc = "Master mode selection"] - pub fn set_mms(&mut self, val: super::vals::Mms) { - self.0 = (self.0 & !(0x07 << 4usize)) | (((val.0 as u32) & 0x07) << 4usize); - } - #[doc = "TI1 selection"] - pub const fn ti1s(&self) -> super::vals::Tis { - let val = (self.0 >> 7usize) & 0x01; - super::vals::Tis(val as u8) - } - #[doc = "TI1 selection"] - pub fn set_ti1s(&mut self, val: super::vals::Tis) { - self.0 = (self.0 & !(0x01 << 7usize)) | (((val.0 as u32) & 0x01) << 7usize); - } - #[doc = "Output Idle state 1"] - pub fn ois(&self, n: usize) -> bool { - assert!(n < 4usize); - let offs = 8usize + n * 2usize; - let val = (self.0 >> offs) & 0x01; - val != 0 - } - #[doc = "Output Idle state 1"] - pub fn set_ois(&mut self, n: usize, val: bool) { - assert!(n < 4usize); - let offs = 8usize + n * 2usize; - self.0 = (self.0 & !(0x01 << offs)) | (((val as u32) & 0x01) << offs); - } - #[doc = "Output Idle state 1"] - pub const fn ois1n(&self) -> bool { - let val = (self.0 >> 9usize) & 0x01; - val != 0 - } - #[doc = "Output Idle state 1"] - pub fn set_ois1n(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 9usize)) | (((val as u32) & 0x01) << 9usize); - } - #[doc = "Output Idle state 2"] - pub const fn ois2n(&self) -> bool { - let val = (self.0 >> 11usize) & 0x01; - val != 0 - } - #[doc = "Output Idle state 2"] - pub fn set_ois2n(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 11usize)) | (((val as u32) & 0x01) << 11usize); - } - #[doc = "Output Idle state 3"] - pub const fn ois3n(&self) -> bool { - let val = (self.0 >> 13usize) & 0x01; - val != 0 - } - #[doc = "Output Idle state 3"] - pub fn set_ois3n(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 13usize)) | (((val as u32) & 0x01) << 13usize); - } - } - impl Default for Cr2Adv { - fn default() -> Cr2Adv { - Cr2Adv(0) - } - } - #[doc = "DMA control register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Dcr(pub u32); - impl Dcr { - #[doc = "DMA base address"] - pub const fn dba(&self) -> u8 { - let val = (self.0 >> 0usize) & 0x1f; - val as u8 - } - #[doc = "DMA base address"] - pub fn set_dba(&mut self, val: u8) { - self.0 = (self.0 & !(0x1f << 0usize)) | (((val as u32) & 0x1f) << 0usize); - } - #[doc = "DMA burst length"] - pub const fn dbl(&self) -> u8 { - let val = (self.0 >> 8usize) & 0x1f; - val as u8 - } - #[doc = "DMA burst length"] - pub fn set_dbl(&mut self, val: u8) { - self.0 = (self.0 & !(0x1f << 8usize)) | (((val as u32) & 0x1f) << 8usize); - } - } - impl Default for Dcr { - fn default() -> Dcr { - Dcr(0) - } - } - #[doc = "capture/compare mode register 1 (input mode)"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct CcmrInput(pub u32); - impl CcmrInput { - #[doc = "Capture/Compare 1 selection"] - pub fn ccs(&self, n: usize) -> super::vals::CcmrInputCcs { - assert!(n < 2usize); - let offs = 0usize + n * 8usize; - let val = (self.0 >> offs) & 0x03; - super::vals::CcmrInputCcs(val as u8) - } - #[doc = "Capture/Compare 1 selection"] - pub fn set_ccs(&mut self, n: usize, val: super::vals::CcmrInputCcs) { - assert!(n < 2usize); - let offs = 0usize + n * 8usize; - self.0 = (self.0 & !(0x03 << offs)) | (((val.0 as u32) & 0x03) << offs); - } - #[doc = "Input capture 1 prescaler"] - pub fn icpsc(&self, n: usize) -> u8 { - assert!(n < 2usize); - let offs = 2usize + n * 8usize; - let val = (self.0 >> offs) & 0x03; - val as u8 - } - #[doc = "Input capture 1 prescaler"] - pub fn set_icpsc(&mut self, n: usize, val: u8) { - assert!(n < 2usize); - let offs = 2usize + n * 8usize; - self.0 = (self.0 & !(0x03 << offs)) | (((val as u32) & 0x03) << offs); - } - #[doc = "Input capture 1 filter"] - pub fn icf(&self, n: usize) -> super::vals::Icf { - assert!(n < 2usize); - let offs = 4usize + n * 8usize; - let val = (self.0 >> offs) & 0x0f; - super::vals::Icf(val as u8) - } - #[doc = "Input capture 1 filter"] - pub fn set_icf(&mut self, n: usize, val: super::vals::Icf) { - assert!(n < 2usize); - let offs = 4usize + n * 8usize; - self.0 = (self.0 & !(0x0f << offs)) | (((val.0 as u32) & 0x0f) << offs); - } - } - impl Default for CcmrInput { - fn default() -> CcmrInput { - CcmrInput(0) - } - } - #[doc = "status register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct SrGp(pub u32); - impl SrGp { - #[doc = "Update interrupt flag"] - pub const fn uif(&self) -> bool { - let val = (self.0 >> 0usize) & 0x01; - val != 0 - } - #[doc = "Update interrupt flag"] - pub fn set_uif(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize); - } - #[doc = "Capture/compare 1 interrupt flag"] - pub fn ccif(&self, n: usize) -> bool { - assert!(n < 4usize); - let offs = 1usize + n * 1usize; - let val = (self.0 >> offs) & 0x01; - val != 0 - } - #[doc = "Capture/compare 1 interrupt flag"] - pub fn set_ccif(&mut self, n: usize, val: bool) { - assert!(n < 4usize); - let offs = 1usize + n * 1usize; - self.0 = (self.0 & !(0x01 << offs)) | (((val as u32) & 0x01) << offs); - } - #[doc = "COM interrupt flag"] - pub const fn comif(&self) -> bool { - let val = (self.0 >> 5usize) & 0x01; - val != 0 - } - #[doc = "COM interrupt flag"] - pub fn set_comif(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 5usize)) | (((val as u32) & 0x01) << 5usize); - } - #[doc = "Trigger interrupt flag"] - pub const fn tif(&self) -> bool { - let val = (self.0 >> 6usize) & 0x01; - val != 0 - } - #[doc = "Trigger interrupt flag"] - pub fn set_tif(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 6usize)) | (((val as u32) & 0x01) << 6usize); - } - #[doc = "Break interrupt flag"] - pub const fn bif(&self) -> bool { - let val = (self.0 >> 7usize) & 0x01; - val != 0 - } - #[doc = "Break interrupt flag"] - pub fn set_bif(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 7usize)) | (((val as u32) & 0x01) << 7usize); - } - #[doc = "Capture/Compare 1 overcapture flag"] - pub fn ccof(&self, n: usize) -> bool { - assert!(n < 4usize); - let offs = 9usize + n * 1usize; - let val = (self.0 >> offs) & 0x01; - val != 0 - } - #[doc = "Capture/Compare 1 overcapture flag"] - pub fn set_ccof(&mut self, n: usize, val: bool) { - assert!(n < 4usize); - let offs = 9usize + n * 1usize; - self.0 = (self.0 & !(0x01 << offs)) | (((val as u32) & 0x01) << offs); - } - } - impl Default for SrGp { - fn default() -> SrGp { - SrGp(0) - } - } - #[doc = "event generation register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct EgrGp(pub u32); - impl EgrGp { - #[doc = "Update generation"] - pub const fn ug(&self) -> bool { - let val = (self.0 >> 0usize) & 0x01; - val != 0 - } - #[doc = "Update generation"] - pub fn set_ug(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize); - } - #[doc = "Capture/compare 1 generation"] - pub fn ccg(&self, n: usize) -> bool { - assert!(n < 4usize); - let offs = 1usize + n * 1usize; - let val = (self.0 >> offs) & 0x01; - val != 0 - } - #[doc = "Capture/compare 1 generation"] - pub fn set_ccg(&mut self, n: usize, val: bool) { - assert!(n < 4usize); - let offs = 1usize + n * 1usize; - self.0 = (self.0 & !(0x01 << offs)) | (((val as u32) & 0x01) << offs); - } - #[doc = "Capture/Compare control update generation"] - pub const fn comg(&self) -> bool { - let val = (self.0 >> 5usize) & 0x01; - val != 0 - } - #[doc = "Capture/Compare control update generation"] - pub fn set_comg(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 5usize)) | (((val as u32) & 0x01) << 5usize); - } - #[doc = "Trigger generation"] - pub const fn tg(&self) -> bool { - let val = (self.0 >> 6usize) & 0x01; - val != 0 - } - #[doc = "Trigger generation"] - pub fn set_tg(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 6usize)) | (((val as u32) & 0x01) << 6usize); - } - #[doc = "Break generation"] - pub const fn bg(&self) -> bool { - let val = (self.0 >> 7usize) & 0x01; - val != 0 - } - #[doc = "Break generation"] - pub fn set_bg(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 7usize)) | (((val as u32) & 0x01) << 7usize); - } - } - impl Default for EgrGp { - fn default() -> EgrGp { - EgrGp(0) - } - } - #[doc = "capture/compare register 1"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Ccr16(pub u32); - impl Ccr16 { - #[doc = "Capture/Compare 1 value"] - pub const fn ccr(&self) -> u16 { - let val = (self.0 >> 0usize) & 0xffff; - val as u16 - } - #[doc = "Capture/Compare 1 value"] - pub fn set_ccr(&mut self, val: u16) { - self.0 = (self.0 & !(0xffff << 0usize)) | (((val as u32) & 0xffff) << 0usize); - } - } - impl Default for Ccr16 { - fn default() -> Ccr16 { - Ccr16(0) - } - } - #[doc = "auto-reload register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Arr32(pub u32); - impl Arr32 { - #[doc = "Auto-reload value"] - pub const fn arr(&self) -> u32 { - let val = (self.0 >> 0usize) & 0xffff_ffff; - val as u32 - } - #[doc = "Auto-reload value"] - pub fn set_arr(&mut self, val: u32) { - self.0 = - (self.0 & !(0xffff_ffff << 0usize)) | (((val as u32) & 0xffff_ffff) << 0usize); - } - } - impl Default for Arr32 { - fn default() -> Arr32 { - Arr32(0) - } - } - #[doc = "control register 2"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Cr2Basic(pub u32); - impl Cr2Basic { - #[doc = "Master mode selection"] - pub const fn mms(&self) -> super::vals::Mms { - let val = (self.0 >> 4usize) & 0x07; - super::vals::Mms(val as u8) - } - #[doc = "Master mode selection"] - pub fn set_mms(&mut self, val: super::vals::Mms) { - self.0 = (self.0 & !(0x07 << 4usize)) | (((val.0 as u32) & 0x07) << 4usize); - } - } - impl Default for Cr2Basic { - fn default() -> Cr2Basic { - Cr2Basic(0) - } - } - #[doc = "auto-reload register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Arr16(pub u32); - impl Arr16 { - #[doc = "Auto-reload value"] - pub const fn arr(&self) -> u16 { - let val = (self.0 >> 0usize) & 0xffff; - val as u16 - } - #[doc = "Auto-reload value"] - pub fn set_arr(&mut self, val: u16) { - self.0 = (self.0 & !(0xffff << 0usize)) | (((val as u32) & 0xffff) << 0usize); - } - } - impl Default for Arr16 { - fn default() -> Arr16 { - Arr16(0) - } - } - #[doc = "repetition counter register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Rcr(pub u32); - impl Rcr { - #[doc = "Repetition counter value"] - pub const fn rep(&self) -> u8 { - let val = (self.0 >> 0usize) & 0xff; - val as u8 - } - #[doc = "Repetition counter value"] - pub fn set_rep(&mut self, val: u8) { - self.0 = (self.0 & !(0xff << 0usize)) | (((val as u32) & 0xff) << 0usize); - } - } - impl Default for Rcr { - fn default() -> Rcr { - Rcr(0) - } - } - #[doc = "capture/compare enable register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct CcerAdv(pub u32); - impl CcerAdv { - #[doc = "Capture/Compare 1 output enable"] - pub fn cce(&self, n: usize) -> bool { - assert!(n < 4usize); - let offs = 0usize + n * 4usize; - let val = (self.0 >> offs) & 0x01; - val != 0 - } - #[doc = "Capture/Compare 1 output enable"] - pub fn set_cce(&mut self, n: usize, val: bool) { - assert!(n < 4usize); - let offs = 0usize + n * 4usize; - self.0 = (self.0 & !(0x01 << offs)) | (((val as u32) & 0x01) << offs); - } - #[doc = "Capture/Compare 1 output Polarity"] - pub fn ccp(&self, n: usize) -> bool { - assert!(n < 4usize); - let offs = 1usize + n * 4usize; - let val = (self.0 >> offs) & 0x01; - val != 0 - } - #[doc = "Capture/Compare 1 output Polarity"] - pub fn set_ccp(&mut self, n: usize, val: bool) { - assert!(n < 4usize); - let offs = 1usize + n * 4usize; - self.0 = (self.0 & !(0x01 << offs)) | (((val as u32) & 0x01) << offs); - } - #[doc = "Capture/Compare 1 complementary output enable"] - pub fn ccne(&self, n: usize) -> bool { - assert!(n < 4usize); - let offs = 2usize + n * 4usize; - let val = (self.0 >> offs) & 0x01; - val != 0 - } - #[doc = "Capture/Compare 1 complementary output enable"] - pub fn set_ccne(&mut self, n: usize, val: bool) { - assert!(n < 4usize); - let offs = 2usize + n * 4usize; - self.0 = (self.0 & !(0x01 << offs)) | (((val as u32) & 0x01) << offs); - } - #[doc = "Capture/Compare 1 output Polarity"] - pub fn ccnp(&self, n: usize) -> bool { - assert!(n < 4usize); - let offs = 3usize + n * 4usize; - let val = (self.0 >> offs) & 0x01; - val != 0 - } - #[doc = "Capture/Compare 1 output Polarity"] - pub fn set_ccnp(&mut self, n: usize, val: bool) { - assert!(n < 4usize); - let offs = 3usize + n * 4usize; - self.0 = (self.0 & !(0x01 << offs)) | (((val as u32) & 0x01) << offs); - } - } - impl Default for CcerAdv { - fn default() -> CcerAdv { - CcerAdv(0) - } - } - #[doc = "capture/compare register 1"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Ccr32(pub u32); - impl Ccr32 { - #[doc = "Capture/Compare 1 value"] - pub const fn ccr(&self) -> u32 { - let val = (self.0 >> 0usize) & 0xffff_ffff; - val as u32 - } - #[doc = "Capture/Compare 1 value"] - pub fn set_ccr(&mut self, val: u32) { - self.0 = - (self.0 & !(0xffff_ffff << 0usize)) | (((val as u32) & 0xffff_ffff) << 0usize); - } - } - impl Default for Ccr32 { - fn default() -> Ccr32 { - Ccr32(0) - } - } - #[doc = "DMA/Interrupt enable register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct DierAdv(pub u32); - impl DierAdv { - #[doc = "Update interrupt enable"] - pub const fn uie(&self) -> bool { - let val = (self.0 >> 0usize) & 0x01; - val != 0 - } - #[doc = "Update interrupt enable"] - pub fn set_uie(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize); - } - #[doc = "Capture/Compare 1 interrupt enable"] - pub fn ccie(&self, n: usize) -> bool { - assert!(n < 4usize); - let offs = 1usize + n * 1usize; - let val = (self.0 >> offs) & 0x01; - val != 0 - } - #[doc = "Capture/Compare 1 interrupt enable"] - pub fn set_ccie(&mut self, n: usize, val: bool) { - assert!(n < 4usize); - let offs = 1usize + n * 1usize; - self.0 = (self.0 & !(0x01 << offs)) | (((val as u32) & 0x01) << offs); - } - #[doc = "COM interrupt enable"] - pub const fn comie(&self) -> bool { - let val = (self.0 >> 5usize) & 0x01; - val != 0 - } - #[doc = "COM interrupt enable"] - pub fn set_comie(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 5usize)) | (((val as u32) & 0x01) << 5usize); - } - #[doc = "Trigger interrupt enable"] - pub const fn tie(&self) -> bool { - let val = (self.0 >> 6usize) & 0x01; - val != 0 - } - #[doc = "Trigger interrupt enable"] - pub fn set_tie(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 6usize)) | (((val as u32) & 0x01) << 6usize); - } - #[doc = "Break interrupt enable"] - pub const fn bie(&self) -> bool { - let val = (self.0 >> 7usize) & 0x01; - val != 0 - } - #[doc = "Break interrupt enable"] - pub fn set_bie(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 7usize)) | (((val as u32) & 0x01) << 7usize); - } - #[doc = "Update DMA request enable"] - pub const fn ude(&self) -> bool { - let val = (self.0 >> 8usize) & 0x01; - val != 0 - } - #[doc = "Update DMA request enable"] - pub fn set_ude(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 8usize)) | (((val as u32) & 0x01) << 8usize); - } - #[doc = "Capture/Compare 1 DMA request enable"] - pub fn ccde(&self, n: usize) -> bool { - assert!(n < 4usize); - let offs = 9usize + n * 1usize; - let val = (self.0 >> offs) & 0x01; - val != 0 - } - #[doc = "Capture/Compare 1 DMA request enable"] - pub fn set_ccde(&mut self, n: usize, val: bool) { - assert!(n < 4usize); - let offs = 9usize + n * 1usize; - self.0 = (self.0 & !(0x01 << offs)) | (((val as u32) & 0x01) << offs); - } - #[doc = "COM DMA request enable"] - pub const fn comde(&self) -> bool { - let val = (self.0 >> 13usize) & 0x01; - val != 0 - } - #[doc = "COM DMA request enable"] - pub fn set_comde(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 13usize)) | (((val as u32) & 0x01) << 13usize); - } - #[doc = "Trigger DMA request enable"] - pub const fn tde(&self) -> bool { - let val = (self.0 >> 14usize) & 0x01; - val != 0 - } - #[doc = "Trigger DMA request enable"] - pub fn set_tde(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 14usize)) | (((val as u32) & 0x01) << 14usize); - } - } - impl Default for DierAdv { - fn default() -> DierAdv { - DierAdv(0) - } - } - #[doc = "event generation register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct EgrAdv(pub u32); - impl EgrAdv { - #[doc = "Update generation"] - pub const fn ug(&self) -> bool { - let val = (self.0 >> 0usize) & 0x01; - val != 0 - } - #[doc = "Update generation"] - pub fn set_ug(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize); - } - #[doc = "Capture/compare 1 generation"] - pub fn ccg(&self, n: usize) -> bool { - assert!(n < 4usize); - let offs = 1usize + n * 1usize; - let val = (self.0 >> offs) & 0x01; - val != 0 - } - #[doc = "Capture/compare 1 generation"] - pub fn set_ccg(&mut self, n: usize, val: bool) { - assert!(n < 4usize); - let offs = 1usize + n * 1usize; - self.0 = (self.0 & !(0x01 << offs)) | (((val as u32) & 0x01) << offs); - } - #[doc = "Capture/Compare control update generation"] - pub const fn comg(&self) -> bool { - let val = (self.0 >> 5usize) & 0x01; - val != 0 - } - #[doc = "Capture/Compare control update generation"] - pub fn set_comg(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 5usize)) | (((val as u32) & 0x01) << 5usize); - } - #[doc = "Trigger generation"] - pub const fn tg(&self) -> bool { - let val = (self.0 >> 6usize) & 0x01; - val != 0 - } - #[doc = "Trigger generation"] - pub fn set_tg(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 6usize)) | (((val as u32) & 0x01) << 6usize); - } - #[doc = "Break generation"] - pub const fn bg(&self) -> bool { - let val = (self.0 >> 7usize) & 0x01; - val != 0 - } - #[doc = "Break generation"] - pub fn set_bg(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 7usize)) | (((val as u32) & 0x01) << 7usize); - } - } - impl Default for EgrAdv { - fn default() -> EgrAdv { - EgrAdv(0) - } - } - } - pub mod vals { - use crate::generic::*; - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Sms(pub u8); - impl Sms { - #[doc = "Slave mode disabled - if CEN = ‘1 then the prescaler is clocked directly by the internal clock."] - pub const DISABLED: Self = Self(0); - #[doc = "Encoder mode 1 - Counter counts up/down on TI2FP1 edge depending on TI1FP2 level."] - pub const ENCODER_MODE_1: Self = Self(0x01); - #[doc = "Encoder mode 2 - Counter counts up/down on TI1FP2 edge depending on TI2FP1 level."] - pub const ENCODER_MODE_2: Self = Self(0x02); - #[doc = "Encoder mode 3 - Counter counts up/down on both TI1FP1 and TI2FP2 edges depending on the level of the other input."] - pub const ENCODER_MODE_3: Self = Self(0x03); - #[doc = "Reset Mode - Rising edge of the selected trigger input (TRGI) reinitializes the counter and generates an update of the registers."] - pub const RESET_MODE: Self = Self(0x04); - #[doc = "Gated Mode - The counter clock is enabled when the trigger input (TRGI) is high. The counter stops (but is not reset) as soon as the trigger becomes low. Both start and stop of the counter are controlled."] - pub const GATED_MODE: Self = Self(0x05); - #[doc = "Trigger Mode - The counter starts at a rising edge of the trigger TRGI (but it is not reset). Only the start of the counter is controlled."] - pub const TRIGGER_MODE: Self = Self(0x06); - #[doc = "External Clock Mode 1 - Rising edges of the selected trigger (TRGI) clock the counter."] - pub const EXT_CLOCK_MODE: Self = Self(0x07); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Ece(pub u8); - impl Ece { - #[doc = "External clock mode 2 disabled"] - pub const DISABLED: Self = Self(0); - #[doc = "External clock mode 2 enabled. The counter is clocked by any active edge on the ETRF signal."] - pub const ENABLED: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Ocm(pub u8); - impl Ocm { - #[doc = "The comparison between the output compare register TIMx_CCRy and the counter TIMx_CNT has no effect on the outputs"] - pub const FROZEN: Self = Self(0); - #[doc = "Set channel to active level on match. OCyREF signal is forced high when the counter matches the capture/compare register"] - pub const ACTIVEONMATCH: Self = Self(0x01); - #[doc = "Set channel to inactive level on match. OCyREF signal is forced low when the counter matches the capture/compare register"] - pub const INACTIVEONMATCH: Self = Self(0x02); - #[doc = "OCyREF toggles when TIMx_CNT=TIMx_CCRy"] - pub const TOGGLE: Self = Self(0x03); - #[doc = "OCyREF is forced low"] - pub const FORCEINACTIVE: Self = Self(0x04); - #[doc = "OCyREF is forced high"] - pub const FORCEACTIVE: Self = Self(0x05); - #[doc = "In upcounting, channel is active as long as TIMx_CNTTIMx_CCRy else active"] - pub const PWMMODE1: Self = Self(0x06); - #[doc = "Inversely to PwmMode1"] - pub const PWMMODE2: Self = Self(0x07); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Ckd(pub u8); - impl Ckd { - #[doc = "t_DTS = t_CK_INT"] - pub const DIV1: Self = Self(0); - #[doc = "t_DTS = 2 × t_CK_INT"] - pub const DIV2: Self = Self(0x01); - #[doc = "t_DTS = 4 × t_CK_INT"] - pub const DIV4: Self = Self(0x02); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Ccds(pub u8); - impl Ccds { - #[doc = "CCx DMA request sent when CCx event occurs"] - pub const ONCOMPARE: Self = Self(0); - #[doc = "CCx DMA request sent when update event occurs"] - pub const ONUPDATE: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Msm(pub u8); - impl Msm { - #[doc = "No action"] - pub const NOSYNC: Self = Self(0); - #[doc = "The effect of an event on the trigger input (TRGI) is delayed to allow a perfect synchronization between the current timer and its slaves (through TRGO). It is useful if we want to synchronize several timers on a single external event."] - pub const SYNC: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Etps(pub u8); - impl Etps { - #[doc = "Prescaler OFF"] - pub const DIV1: Self = Self(0); - #[doc = "ETRP frequency divided by 2"] - pub const DIV2: Self = Self(0x01); - #[doc = "ETRP frequency divided by 4"] - pub const DIV4: Self = Self(0x02); - #[doc = "ETRP frequency divided by 8"] - pub const DIV8: Self = Self(0x03); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Arpe(pub u8); - impl Arpe { - #[doc = "TIMx_APRR register is not buffered"] - pub const DISABLED: Self = Self(0); - #[doc = "TIMx_APRR register is buffered"] - pub const ENABLED: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct CcmrOutputCcs(pub u8); - impl CcmrOutputCcs { - #[doc = "CCx channel is configured as output"] - pub const OUTPUT: Self = Self(0); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Ossr(pub u8); - impl Ossr { - #[doc = "When inactive, OC/OCN outputs are disabled"] - pub const DISABLED: Self = Self(0); - #[doc = "When inactive, OC/OCN outputs are enabled with their inactive level"] - pub const IDLELEVEL: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Dir(pub u8); - impl Dir { - #[doc = "Counter used as upcounter"] - pub const UP: Self = Self(0); - #[doc = "Counter used as downcounter"] - pub const DOWN: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Etp(pub u8); - impl Etp { - #[doc = "ETR is noninverted, active at high level or rising edge"] - pub const NOTINVERTED: Self = Self(0); - #[doc = "ETR is inverted, active at low level or falling edge"] - pub const INVERTED: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Ocpe(pub u8); - impl Ocpe { - #[doc = "Preload register on CCR2 disabled. New values written to CCR2 are taken into account immediately"] - pub const DISABLED: Self = Self(0); - #[doc = "Preload register on CCR2 enabled. Preload value is loaded into active register on each update event"] - pub const ENABLED: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Urs(pub u8); - impl Urs { - #[doc = "Any of counter overflow/underflow, setting UG, or update through slave mode, generates an update interrupt or DMA request"] - pub const ANYEVENT: Self = Self(0); - #[doc = "Only counter overflow/underflow generates an update interrupt or DMA request"] - pub const COUNTERONLY: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Etf(pub u8); - impl Etf { - #[doc = "No filter, sampling is done at fDTS"] - pub const NOFILTER: Self = Self(0); - #[doc = "fSAMPLING=fCK_INT, N=2"] - pub const FCK_INT_N2: Self = Self(0x01); - #[doc = "fSAMPLING=fCK_INT, N=4"] - pub const FCK_INT_N4: Self = Self(0x02); - #[doc = "fSAMPLING=fCK_INT, N=8"] - pub const FCK_INT_N8: Self = Self(0x03); - #[doc = "fSAMPLING=fDTS/2, N=6"] - pub const FDTS_DIV2_N6: Self = Self(0x04); - #[doc = "fSAMPLING=fDTS/2, N=8"] - pub const FDTS_DIV2_N8: Self = Self(0x05); - #[doc = "fSAMPLING=fDTS/4, N=6"] - pub const FDTS_DIV4_N6: Self = Self(0x06); - #[doc = "fSAMPLING=fDTS/4, N=8"] - pub const FDTS_DIV4_N8: Self = Self(0x07); - #[doc = "fSAMPLING=fDTS/8, N=6"] - pub const FDTS_DIV8_N6: Self = Self(0x08); - #[doc = "fSAMPLING=fDTS/8, N=8"] - pub const FDTS_DIV8_N8: Self = Self(0x09); - #[doc = "fSAMPLING=fDTS/16, N=5"] - pub const FDTS_DIV16_N5: Self = Self(0x0a); - #[doc = "fSAMPLING=fDTS/16, N=6"] - pub const FDTS_DIV16_N6: Self = Self(0x0b); - #[doc = "fSAMPLING=fDTS/16, N=8"] - pub const FDTS_DIV16_N8: Self = Self(0x0c); - #[doc = "fSAMPLING=fDTS/32, N=5"] - pub const FDTS_DIV32_N5: Self = Self(0x0d); - #[doc = "fSAMPLING=fDTS/32, N=6"] - pub const FDTS_DIV32_N6: Self = Self(0x0e); - #[doc = "fSAMPLING=fDTS/32, N=8"] - pub const FDTS_DIV32_N8: Self = Self(0x0f); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Mms(pub u8); - impl Mms { - #[doc = "The UG bit from the TIMx_EGR register is used as trigger output"] - pub const RESET: Self = Self(0); - #[doc = "The counter enable signal, CNT_EN, is used as trigger output"] - pub const ENABLE: Self = Self(0x01); - #[doc = "The update event is selected as trigger output"] - pub const UPDATE: Self = Self(0x02); - #[doc = "The trigger output send a positive pulse when the CC1IF flag it to be set, as soon as a capture or a compare match occurred"] - pub const COMPAREPULSE: Self = Self(0x03); - #[doc = "OC1REF signal is used as trigger output"] - pub const COMPAREOC1: Self = Self(0x04); - #[doc = "OC2REF signal is used as trigger output"] - pub const COMPAREOC2: Self = Self(0x05); - #[doc = "OC3REF signal is used as trigger output"] - pub const COMPAREOC3: Self = Self(0x06); - #[doc = "OC4REF signal is used as trigger output"] - pub const COMPAREOC4: Self = Self(0x07); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Ts(pub u8); - impl Ts { - #[doc = "Internal Trigger 0 (ITR0)"] - pub const ITR0: Self = Self(0); - #[doc = "Internal Trigger 1 (ITR1)"] - pub const ITR1: Self = Self(0x01); - #[doc = "Internal Trigger 2 (ITR2)"] - pub const ITR2: Self = Self(0x02); - #[doc = "TI1 Edge Detector (TI1F_ED)"] - pub const TI1F_ED: Self = Self(0x04); - #[doc = "Filtered Timer Input 1 (TI1FP1)"] - pub const TI1FP1: Self = Self(0x05); - #[doc = "Filtered Timer Input 2 (TI2FP2)"] - pub const TI2FP2: Self = Self(0x06); - #[doc = "External Trigger input (ETRF)"] - pub const ETRF: Self = Self(0x07); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Cms(pub u8); - impl Cms { - #[doc = "The counter counts up or down depending on the direction bit"] - pub const EDGEALIGNED: Self = Self(0); - #[doc = "The counter counts up and down alternatively. Output compare interrupt flags are set only when the counter is counting down."] - pub const CENTERALIGNED1: Self = Self(0x01); - #[doc = "The counter counts up and down alternatively. Output compare interrupt flags are set only when the counter is counting up."] - pub const CENTERALIGNED2: Self = Self(0x02); - #[doc = "The counter counts up and down alternatively. Output compare interrupt flags are set both when the counter is counting up or down."] - pub const CENTERALIGNED3: Self = Self(0x03); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Ossi(pub u8); - impl Ossi { - #[doc = "When inactive, OC/OCN outputs are disabled"] - pub const DISABLED: Self = Self(0); - #[doc = "When inactive, OC/OCN outputs are forced to idle level"] - pub const IDLELEVEL: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Opm(pub u8); - impl Opm { - #[doc = "Counter is not stopped at update event"] - pub const DISABLED: Self = Self(0); - #[doc = "Counter stops counting at the next update event (clearing the CEN bit)"] - pub const ENABLED: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Icf(pub u8); - impl Icf { - #[doc = "No filter, sampling is done at fDTS"] - pub const NOFILTER: Self = Self(0); - #[doc = "fSAMPLING=fCK_INT, N=2"] - pub const FCK_INT_N2: Self = Self(0x01); - #[doc = "fSAMPLING=fCK_INT, N=4"] - pub const FCK_INT_N4: Self = Self(0x02); - #[doc = "fSAMPLING=fCK_INT, N=8"] - pub const FCK_INT_N8: Self = Self(0x03); - #[doc = "fSAMPLING=fDTS/2, N=6"] - pub const FDTS_DIV2_N6: Self = Self(0x04); - #[doc = "fSAMPLING=fDTS/2, N=8"] - pub const FDTS_DIV2_N8: Self = Self(0x05); - #[doc = "fSAMPLING=fDTS/4, N=6"] - pub const FDTS_DIV4_N6: Self = Self(0x06); - #[doc = "fSAMPLING=fDTS/4, N=8"] - pub const FDTS_DIV4_N8: Self = Self(0x07); - #[doc = "fSAMPLING=fDTS/8, N=6"] - pub const FDTS_DIV8_N6: Self = Self(0x08); - #[doc = "fSAMPLING=fDTS/8, N=8"] - pub const FDTS_DIV8_N8: Self = Self(0x09); - #[doc = "fSAMPLING=fDTS/16, N=5"] - pub const FDTS_DIV16_N5: Self = Self(0x0a); - #[doc = "fSAMPLING=fDTS/16, N=6"] - pub const FDTS_DIV16_N6: Self = Self(0x0b); - #[doc = "fSAMPLING=fDTS/16, N=8"] - pub const FDTS_DIV16_N8: Self = Self(0x0c); - #[doc = "fSAMPLING=fDTS/32, N=5"] - pub const FDTS_DIV32_N5: Self = Self(0x0d); - #[doc = "fSAMPLING=fDTS/32, N=6"] - pub const FDTS_DIV32_N6: Self = Self(0x0e); - #[doc = "fSAMPLING=fDTS/32, N=8"] - pub const FDTS_DIV32_N8: Self = Self(0x0f); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct CcmrInputCcs(pub u8); - impl CcmrInputCcs { - #[doc = "CCx channel is configured as input, normal mapping: ICx mapped to TIx"] - pub const TI4: Self = Self(0x01); - #[doc = "CCx channel is configured as input, alternate mapping (switches 1 with 2, 3 with 4)"] - pub const TI3: Self = Self(0x02); - #[doc = "CCx channel is configured as input, ICx is mapped on TRC"] - pub const TRC: Self = Self(0x03); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Tis(pub u8); - impl Tis { - #[doc = "The TIMx_CH1 pin is connected to TI1 input"] - pub const NORMAL: Self = Self(0); - #[doc = "The TIMx_CH1, CH2, CH3 pins are connected to TI1 input"] - pub const XOR: Self = Self(0x01); - } - } -} pub mod syscfg_h7 { use crate::generic::*; #[doc = "System configuration controller"] @@ -2506,53 +108,53 @@ pub mod syscfg_h7 { } pub mod regs { use crate::generic::*; - #[doc = "SYSCFG user register 15"] + #[doc = "SYSCFG user register 12"] #[repr(transparent)] #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Ur15(pub u32); - impl Ur15 { - #[doc = "Freeze independent watchdog in Standby mode"] - pub const fn fziwdgstb(&self) -> bool { + pub struct Ur12(pub u32); + impl Ur12 { + #[doc = "Secure mode"] + pub const fn secure(&self) -> bool { let val = (self.0 >> 16usize) & 0x01; val != 0 } - #[doc = "Freeze independent watchdog in Standby mode"] - pub fn set_fziwdgstb(&mut self, val: bool) { + #[doc = "Secure mode"] + pub fn set_secure(&mut self, val: bool) { self.0 = (self.0 & !(0x01 << 16usize)) | (((val as u32) & 0x01) << 16usize); } } - impl Default for Ur15 { - fn default() -> Ur15 { - Ur15(0) + impl Default for Ur12 { + fn default() -> Ur12 { + Ur12(0) } } - #[doc = "SYSCFG user register 5"] + #[doc = "SYSCFG user register 6"] #[repr(transparent)] #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Ur5(pub u32); - impl Ur5 { - #[doc = "Mass erase secured area disabled for bank 1"] - pub const fn mesad_1(&self) -> bool { - let val = (self.0 >> 0usize) & 0x01; - val != 0 + pub struct Ur6(pub u32); + impl Ur6 { + #[doc = "Protected area start address for bank 1"] + pub const fn pa_beg_1(&self) -> u16 { + let val = (self.0 >> 0usize) & 0x0fff; + val as u16 } - #[doc = "Mass erase secured area disabled for bank 1"] - pub fn set_mesad_1(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize); + #[doc = "Protected area start address for bank 1"] + pub fn set_pa_beg_1(&mut self, val: u16) { + self.0 = (self.0 & !(0x0fff << 0usize)) | (((val as u32) & 0x0fff) << 0usize); } - #[doc = "Write protection for flash bank 1"] - pub const fn wrpn_1(&self) -> u8 { - let val = (self.0 >> 16usize) & 0xff; - val as u8 + #[doc = "Protected area end address for bank 1"] + pub const fn pa_end_1(&self) -> u16 { + let val = (self.0 >> 16usize) & 0x0fff; + val as u16 } - #[doc = "Write protection for flash bank 1"] - pub fn set_wrpn_1(&mut self, val: u8) { - self.0 = (self.0 & !(0xff << 16usize)) | (((val as u32) & 0xff) << 16usize); + #[doc = "Protected area end address for bank 1"] + pub fn set_pa_end_1(&mut self, val: u16) { + self.0 = (self.0 & !(0x0fff << 16usize)) | (((val as u32) & 0x0fff) << 16usize); } } - impl Default for Ur5 { - fn default() -> Ur5 { - Ur5(0) + impl Default for Ur6 { + fn default() -> Ur6 { + Ur6(0) } } #[doc = "SYSCFG user register 16"] @@ -2584,151 +186,53 @@ pub mod syscfg_h7 { Ur16(0) } } - #[doc = "SYSCFG user register 13"] + #[doc = "SYSCFG user register 3"] #[repr(transparent)] #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Ur13(pub u32); - impl Ur13 { - #[doc = "Secured DTCM RAM Size"] - pub const fn sdrs(&self) -> u8 { - let val = (self.0 >> 0usize) & 0x03; - val as u8 + pub struct Ur3(pub u32); + impl Ur3 { + #[doc = "Boot Address 1"] + pub const fn boot_add1(&self) -> u16 { + let val = (self.0 >> 16usize) & 0xffff; + val as u16 } - #[doc = "Secured DTCM RAM Size"] - pub fn set_sdrs(&mut self, val: u8) { - self.0 = (self.0 & !(0x03 << 0usize)) | (((val as u32) & 0x03) << 0usize); - } - #[doc = "D1 Standby reset"] - pub const fn d1sbrst(&self) -> bool { - let val = (self.0 >> 16usize) & 0x01; - val != 0 - } - #[doc = "D1 Standby reset"] - pub fn set_d1sbrst(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 16usize)) | (((val as u32) & 0x01) << 16usize); + #[doc = "Boot Address 1"] + pub fn set_boot_add1(&mut self, val: u16) { + self.0 = (self.0 & !(0xffff << 16usize)) | (((val as u32) & 0xffff) << 16usize); } } - impl Default for Ur13 { - fn default() -> Ur13 { - Ur13(0) + impl Default for Ur3 { + fn default() -> Ur3 { + Ur3(0) } } - #[doc = "SYSCFG user register 17"] + #[doc = "SYSCFG user register 8"] #[repr(transparent)] #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Ur17(pub u32); - impl Ur17 { - #[doc = "I/O high speed / low voltage"] - pub const fn io_hslv(&self) -> bool { + pub struct Ur8(pub u32); + impl Ur8 { + #[doc = "Mass erase protected area disabled for bank 2"] + pub const fn mepad_2(&self) -> bool { let val = (self.0 >> 0usize) & 0x01; val != 0 } - #[doc = "I/O high speed / low voltage"] - pub fn set_io_hslv(&mut self, val: bool) { + #[doc = "Mass erase protected area disabled for bank 2"] + pub fn set_mepad_2(&mut self, val: bool) { self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize); } - } - impl Default for Ur17 { - fn default() -> Ur17 { - Ur17(0) - } - } - #[doc = "SYSCFG user register 9"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Ur9(pub u32); - impl Ur9 { - #[doc = "Write protection for flash bank 2"] - pub const fn wrpn_2(&self) -> u8 { - let val = (self.0 >> 0usize) & 0xff; - val as u8 - } - #[doc = "Write protection for flash bank 2"] - pub fn set_wrpn_2(&mut self, val: u8) { - self.0 = (self.0 & !(0xff << 0usize)) | (((val as u32) & 0xff) << 0usize); - } - #[doc = "Protected area start address for bank 2"] - pub const fn pa_beg_2(&self) -> u16 { - let val = (self.0 >> 16usize) & 0x0fff; - val as u16 - } - #[doc = "Protected area start address for bank 2"] - pub fn set_pa_beg_2(&mut self, val: u16) { - self.0 = (self.0 & !(0x0fff << 16usize)) | (((val as u32) & 0x0fff) << 16usize); - } - } - impl Default for Ur9 { - fn default() -> Ur9 { - Ur9(0) - } - } - #[doc = "SYSCFG user register 10"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Ur10(pub u32); - impl Ur10 { - #[doc = "Protected area end address for bank 2"] - pub const fn pa_end_2(&self) -> u16 { - let val = (self.0 >> 0usize) & 0x0fff; - val as u16 - } - #[doc = "Protected area end address for bank 2"] - pub fn set_pa_end_2(&mut self, val: u16) { - self.0 = (self.0 & !(0x0fff << 0usize)) | (((val as u32) & 0x0fff) << 0usize); - } - #[doc = "Secured area start address for bank 2"] - pub const fn sa_beg_2(&self) -> u16 { - let val = (self.0 >> 16usize) & 0x0fff; - val as u16 - } - #[doc = "Secured area start address for bank 2"] - pub fn set_sa_beg_2(&mut self, val: u16) { - self.0 = (self.0 & !(0x0fff << 16usize)) | (((val as u32) & 0x0fff) << 16usize); - } - } - impl Default for Ur10 { - fn default() -> Ur10 { - Ur10(0) - } - } - #[doc = "SYSCFG package register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Pkgr(pub u32); - impl Pkgr { - #[doc = "Package"] - pub const fn pkg(&self) -> u8 { - let val = (self.0 >> 0usize) & 0x0f; - val as u8 - } - #[doc = "Package"] - pub fn set_pkg(&mut self, val: u8) { - self.0 = (self.0 & !(0x0f << 0usize)) | (((val as u32) & 0x0f) << 0usize); - } - } - impl Default for Pkgr { - fn default() -> Pkgr { - Pkgr(0) - } - } - #[doc = "SYSCFG user register 4"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Ur4(pub u32); - impl Ur4 { - #[doc = "Mass Erase Protected Area Disabled for bank 1"] - pub const fn mepad_1(&self) -> bool { + #[doc = "Mass erase secured area disabled for bank 2"] + pub const fn mesad_2(&self) -> bool { let val = (self.0 >> 16usize) & 0x01; val != 0 } - #[doc = "Mass Erase Protected Area Disabled for bank 1"] - pub fn set_mepad_1(&mut self, val: bool) { + #[doc = "Mass erase secured area disabled for bank 2"] + pub fn set_mesad_2(&mut self, val: bool) { self.0 = (self.0 & !(0x01 << 16usize)) | (((val as u32) & 0x01) << 16usize); } } - impl Default for Ur4 { - fn default() -> Ur4 { - Ur4(0) + impl Default for Ur8 { + fn default() -> Ur8 { + Ur8(0) } } #[doc = "SYSCFG compensation cell value register"] @@ -2789,51 +293,131 @@ pub mod syscfg_h7 { Ur11(0) } } - #[doc = "compensation cell control/status register"] + #[doc = "SYSCFG user register 9"] #[repr(transparent)] #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Cccsr(pub u32); - impl Cccsr { - #[doc = "enable"] - pub const fn en(&self) -> bool { - let val = (self.0 >> 0usize) & 0x01; - val != 0 + pub struct Ur9(pub u32); + impl Ur9 { + #[doc = "Write protection for flash bank 2"] + pub const fn wrpn_2(&self) -> u8 { + let val = (self.0 >> 0usize) & 0xff; + val as u8 } - #[doc = "enable"] - pub fn set_en(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize); + #[doc = "Write protection for flash bank 2"] + pub fn set_wrpn_2(&mut self, val: u8) { + self.0 = (self.0 & !(0xff << 0usize)) | (((val as u32) & 0xff) << 0usize); } - #[doc = "Code selection"] - pub const fn cs(&self) -> bool { - let val = (self.0 >> 1usize) & 0x01; - val != 0 + #[doc = "Protected area start address for bank 2"] + pub const fn pa_beg_2(&self) -> u16 { + let val = (self.0 >> 16usize) & 0x0fff; + val as u16 } - #[doc = "Code selection"] - pub fn set_cs(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 1usize)) | (((val as u32) & 0x01) << 1usize); + #[doc = "Protected area start address for bank 2"] + pub fn set_pa_beg_2(&mut self, val: u16) { + self.0 = (self.0 & !(0x0fff << 16usize)) | (((val as u32) & 0x0fff) << 16usize); } - #[doc = "Compensation cell ready flag"] - pub const fn ready(&self) -> bool { - let val = (self.0 >> 8usize) & 0x01; - val != 0 + } + impl Default for Ur9 { + fn default() -> Ur9 { + Ur9(0) } - #[doc = "Compensation cell ready flag"] - pub fn set_ready(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 8usize)) | (((val as u32) & 0x01) << 8usize); + } + #[doc = "SYSCFG power control register"] + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq)] + pub struct Pwrcr(pub u32); + impl Pwrcr { + #[doc = "Overdrive enable"] + pub const fn oden(&self) -> u8 { + let val = (self.0 >> 0usize) & 0x0f; + val as u8 } - #[doc = "High-speed at low-voltage"] - pub const fn hslv(&self) -> bool { + #[doc = "Overdrive enable"] + pub fn set_oden(&mut self, val: u8) { + self.0 = (self.0 & !(0x0f << 0usize)) | (((val as u32) & 0x0f) << 0usize); + } + } + impl Default for Pwrcr { + fn default() -> Pwrcr { + Pwrcr(0) + } + } + #[doc = "SYSCFG user register 15"] + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq)] + pub struct Ur15(pub u32); + impl Ur15 { + #[doc = "Freeze independent watchdog in Standby mode"] + pub const fn fziwdgstb(&self) -> bool { let val = (self.0 >> 16usize) & 0x01; val != 0 } - #[doc = "High-speed at low-voltage"] - pub fn set_hslv(&mut self, val: bool) { + #[doc = "Freeze independent watchdog in Standby mode"] + pub fn set_fziwdgstb(&mut self, val: bool) { self.0 = (self.0 & !(0x01 << 16usize)) | (((val as u32) & 0x01) << 16usize); } } - impl Default for Cccsr { - fn default() -> Cccsr { - Cccsr(0) + impl Default for Ur15 { + fn default() -> Ur15 { + Ur15(0) + } + } + #[doc = "SYSCFG compensation cell code register"] + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq)] + pub struct Cccr(pub u32); + impl Cccr { + #[doc = "NMOS compensation code"] + pub const fn ncc(&self) -> u8 { + let val = (self.0 >> 0usize) & 0x0f; + val as u8 + } + #[doc = "NMOS compensation code"] + pub fn set_ncc(&mut self, val: u8) { + self.0 = (self.0 & !(0x0f << 0usize)) | (((val as u32) & 0x0f) << 0usize); + } + #[doc = "PMOS compensation code"] + pub const fn pcc(&self) -> u8 { + let val = (self.0 >> 4usize) & 0x0f; + val as u8 + } + #[doc = "PMOS compensation code"] + pub fn set_pcc(&mut self, val: u8) { + self.0 = (self.0 & !(0x0f << 4usize)) | (((val as u32) & 0x0f) << 4usize); + } + } + impl Default for Cccr { + fn default() -> Cccr { + Cccr(0) + } + } + #[doc = "SYSCFG user register 2"] + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq)] + pub struct Ur2(pub u32); + impl Ur2 { + #[doc = "BOR_LVL Brownout Reset Threshold Level"] + pub const fn borh(&self) -> u8 { + let val = (self.0 >> 0usize) & 0x03; + val as u8 + } + #[doc = "BOR_LVL Brownout Reset Threshold Level"] + pub fn set_borh(&mut self, val: u8) { + self.0 = (self.0 & !(0x03 << 0usize)) | (((val as u32) & 0x03) << 0usize); + } + #[doc = "Boot Address 0"] + pub const fn boot_add0(&self) -> u16 { + let val = (self.0 >> 16usize) & 0xffff; + val as u16 + } + #[doc = "Boot Address 0"] + pub fn set_boot_add0(&mut self, val: u16) { + self.0 = (self.0 & !(0xffff << 16usize)) | (((val as u32) & 0xffff) << 16usize); + } + } + impl Default for Ur2 { + fn default() -> Ur2 { + Ur2(0) } } #[doc = "SYSCFG user register 14"] @@ -2885,35 +469,6 @@ pub mod syscfg_h7 { Ur0(0) } } - #[doc = "SYSCFG user register 2"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Ur2(pub u32); - impl Ur2 { - #[doc = "BOR_LVL Brownout Reset Threshold Level"] - pub const fn borh(&self) -> u8 { - let val = (self.0 >> 0usize) & 0x03; - val as u8 - } - #[doc = "BOR_LVL Brownout Reset Threshold Level"] - pub fn set_borh(&mut self, val: u8) { - self.0 = (self.0 & !(0x03 << 0usize)) | (((val as u32) & 0x03) << 0usize); - } - #[doc = "Boot Address 0"] - pub const fn boot_add0(&self) -> u16 { - let val = (self.0 >> 16usize) & 0xffff; - val as u16 - } - #[doc = "Boot Address 0"] - pub fn set_boot_add0(&mut self, val: u16) { - self.0 = (self.0 & !(0xffff << 16usize)) | (((val as u32) & 0xffff) << 16usize); - } - } - impl Default for Ur2 { - fn default() -> Ur2 { - Ur2(0) - } - } #[doc = "external interrupt configuration register 2"] #[repr(transparent)] #[derive(Copy, Clone, Eq, PartialEq)] @@ -2938,133 +493,6 @@ pub mod syscfg_h7 { Exticr(0) } } - #[doc = "SYSCFG user register 6"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Ur6(pub u32); - impl Ur6 { - #[doc = "Protected area start address for bank 1"] - pub const fn pa_beg_1(&self) -> u16 { - let val = (self.0 >> 0usize) & 0x0fff; - val as u16 - } - #[doc = "Protected area start address for bank 1"] - pub fn set_pa_beg_1(&mut self, val: u16) { - self.0 = (self.0 & !(0x0fff << 0usize)) | (((val as u32) & 0x0fff) << 0usize); - } - #[doc = "Protected area end address for bank 1"] - pub const fn pa_end_1(&self) -> u16 { - let val = (self.0 >> 16usize) & 0x0fff; - val as u16 - } - #[doc = "Protected area end address for bank 1"] - pub fn set_pa_end_1(&mut self, val: u16) { - self.0 = (self.0 & !(0x0fff << 16usize)) | (((val as u32) & 0x0fff) << 16usize); - } - } - impl Default for Ur6 { - fn default() -> Ur6 { - Ur6(0) - } - } - #[doc = "SYSCFG compensation cell code register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Cccr(pub u32); - impl Cccr { - #[doc = "NMOS compensation code"] - pub const fn ncc(&self) -> u8 { - let val = (self.0 >> 0usize) & 0x0f; - val as u8 - } - #[doc = "NMOS compensation code"] - pub fn set_ncc(&mut self, val: u8) { - self.0 = (self.0 & !(0x0f << 0usize)) | (((val as u32) & 0x0f) << 0usize); - } - #[doc = "PMOS compensation code"] - pub const fn pcc(&self) -> u8 { - let val = (self.0 >> 4usize) & 0x0f; - val as u8 - } - #[doc = "PMOS compensation code"] - pub fn set_pcc(&mut self, val: u8) { - self.0 = (self.0 & !(0x0f << 4usize)) | (((val as u32) & 0x0f) << 4usize); - } - } - impl Default for Cccr { - fn default() -> Cccr { - Cccr(0) - } - } - #[doc = "SYSCFG user register 7"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Ur7(pub u32); - impl Ur7 { - #[doc = "Secured area start address for bank 1"] - pub const fn sa_beg_1(&self) -> u16 { - let val = (self.0 >> 0usize) & 0x0fff; - val as u16 - } - #[doc = "Secured area start address for bank 1"] - pub fn set_sa_beg_1(&mut self, val: u16) { - self.0 = (self.0 & !(0x0fff << 0usize)) | (((val as u32) & 0x0fff) << 0usize); - } - #[doc = "Secured area end address for bank 1"] - pub const fn sa_end_1(&self) -> u16 { - let val = (self.0 >> 16usize) & 0x0fff; - val as u16 - } - #[doc = "Secured area end address for bank 1"] - pub fn set_sa_end_1(&mut self, val: u16) { - self.0 = (self.0 & !(0x0fff << 16usize)) | (((val as u32) & 0x0fff) << 16usize); - } - } - impl Default for Ur7 { - fn default() -> Ur7 { - Ur7(0) - } - } - #[doc = "SYSCFG user register 3"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Ur3(pub u32); - impl Ur3 { - #[doc = "Boot Address 1"] - pub const fn boot_add1(&self) -> u16 { - let val = (self.0 >> 16usize) & 0xffff; - val as u16 - } - #[doc = "Boot Address 1"] - pub fn set_boot_add1(&mut self, val: u16) { - self.0 = (self.0 & !(0xffff << 16usize)) | (((val as u32) & 0xffff) << 16usize); - } - } - impl Default for Ur3 { - fn default() -> Ur3 { - Ur3(0) - } - } - #[doc = "SYSCFG user register 12"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Ur12(pub u32); - impl Ur12 { - #[doc = "Secure mode"] - pub const fn secure(&self) -> bool { - let val = (self.0 >> 16usize) & 0x01; - val != 0 - } - #[doc = "Secure mode"] - pub fn set_secure(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 16usize)) | (((val as u32) & 0x01) << 16usize); - } - } - impl Default for Ur12 { - fn default() -> Ur12 { - Ur12(0) - } - } #[doc = "peripheral mode configuration register"] #[repr(transparent)] #[derive(Copy, Clone, Eq, PartialEq)] @@ -3211,2332 +639,227 @@ pub mod syscfg_h7 { Pmcr(0) } } - #[doc = "SYSCFG user register 8"] + #[doc = "SYSCFG user register 5"] #[repr(transparent)] #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Ur8(pub u32); - impl Ur8 { - #[doc = "Mass erase protected area disabled for bank 2"] - pub const fn mepad_2(&self) -> bool { + pub struct Ur5(pub u32); + impl Ur5 { + #[doc = "Mass erase secured area disabled for bank 1"] + pub const fn mesad_1(&self) -> bool { let val = (self.0 >> 0usize) & 0x01; val != 0 } - #[doc = "Mass erase protected area disabled for bank 2"] - pub fn set_mepad_2(&mut self, val: bool) { + #[doc = "Mass erase secured area disabled for bank 1"] + pub fn set_mesad_1(&mut self, val: bool) { self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize); } - #[doc = "Mass erase secured area disabled for bank 2"] - pub const fn mesad_2(&self) -> bool { + #[doc = "Write protection for flash bank 1"] + pub const fn wrpn_1(&self) -> u8 { + let val = (self.0 >> 16usize) & 0xff; + val as u8 + } + #[doc = "Write protection for flash bank 1"] + pub fn set_wrpn_1(&mut self, val: u8) { + self.0 = (self.0 & !(0xff << 16usize)) | (((val as u32) & 0xff) << 16usize); + } + } + impl Default for Ur5 { + fn default() -> Ur5 { + Ur5(0) + } + } + #[doc = "SYSCFG user register 7"] + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq)] + pub struct Ur7(pub u32); + impl Ur7 { + #[doc = "Secured area start address for bank 1"] + pub const fn sa_beg_1(&self) -> u16 { + let val = (self.0 >> 0usize) & 0x0fff; + val as u16 + } + #[doc = "Secured area start address for bank 1"] + pub fn set_sa_beg_1(&mut self, val: u16) { + self.0 = (self.0 & !(0x0fff << 0usize)) | (((val as u32) & 0x0fff) << 0usize); + } + #[doc = "Secured area end address for bank 1"] + pub const fn sa_end_1(&self) -> u16 { + let val = (self.0 >> 16usize) & 0x0fff; + val as u16 + } + #[doc = "Secured area end address for bank 1"] + pub fn set_sa_end_1(&mut self, val: u16) { + self.0 = (self.0 & !(0x0fff << 16usize)) | (((val as u32) & 0x0fff) << 16usize); + } + } + impl Default for Ur7 { + fn default() -> Ur7 { + Ur7(0) + } + } + #[doc = "SYSCFG user register 13"] + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq)] + pub struct Ur13(pub u32); + impl Ur13 { + #[doc = "Secured DTCM RAM Size"] + pub const fn sdrs(&self) -> u8 { + let val = (self.0 >> 0usize) & 0x03; + val as u8 + } + #[doc = "Secured DTCM RAM Size"] + pub fn set_sdrs(&mut self, val: u8) { + self.0 = (self.0 & !(0x03 << 0usize)) | (((val as u32) & 0x03) << 0usize); + } + #[doc = "D1 Standby reset"] + pub const fn d1sbrst(&self) -> bool { let val = (self.0 >> 16usize) & 0x01; val != 0 } - #[doc = "Mass erase secured area disabled for bank 2"] - pub fn set_mesad_2(&mut self, val: bool) { + #[doc = "D1 Standby reset"] + pub fn set_d1sbrst(&mut self, val: bool) { self.0 = (self.0 & !(0x01 << 16usize)) | (((val as u32) & 0x01) << 16usize); } } - impl Default for Ur8 { - fn default() -> Ur8 { - Ur8(0) + impl Default for Ur13 { + fn default() -> Ur13 { + Ur13(0) } } - #[doc = "SYSCFG power control register"] + #[doc = "SYSCFG user register 4"] #[repr(transparent)] #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Pwrcr(pub u32); - impl Pwrcr { - #[doc = "Overdrive enable"] - pub const fn oden(&self) -> u8 { + pub struct Ur4(pub u32); + impl Ur4 { + #[doc = "Mass Erase Protected Area Disabled for bank 1"] + pub const fn mepad_1(&self) -> bool { + let val = (self.0 >> 16usize) & 0x01; + val != 0 + } + #[doc = "Mass Erase Protected Area Disabled for bank 1"] + pub fn set_mepad_1(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 16usize)) | (((val as u32) & 0x01) << 16usize); + } + } + impl Default for Ur4 { + fn default() -> Ur4 { + Ur4(0) + } + } + #[doc = "SYSCFG user register 10"] + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq)] + pub struct Ur10(pub u32); + impl Ur10 { + #[doc = "Protected area end address for bank 2"] + pub const fn pa_end_2(&self) -> u16 { + let val = (self.0 >> 0usize) & 0x0fff; + val as u16 + } + #[doc = "Protected area end address for bank 2"] + pub fn set_pa_end_2(&mut self, val: u16) { + self.0 = (self.0 & !(0x0fff << 0usize)) | (((val as u32) & 0x0fff) << 0usize); + } + #[doc = "Secured area start address for bank 2"] + pub const fn sa_beg_2(&self) -> u16 { + let val = (self.0 >> 16usize) & 0x0fff; + val as u16 + } + #[doc = "Secured area start address for bank 2"] + pub fn set_sa_beg_2(&mut self, val: u16) { + self.0 = (self.0 & !(0x0fff << 16usize)) | (((val as u32) & 0x0fff) << 16usize); + } + } + impl Default for Ur10 { + fn default() -> Ur10 { + Ur10(0) + } + } + #[doc = "SYSCFG user register 17"] + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq)] + pub struct Ur17(pub u32); + impl Ur17 { + #[doc = "I/O high speed / low voltage"] + pub const fn io_hslv(&self) -> bool { + let val = (self.0 >> 0usize) & 0x01; + val != 0 + } + #[doc = "I/O high speed / low voltage"] + pub fn set_io_hslv(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize); + } + } + impl Default for Ur17 { + fn default() -> Ur17 { + Ur17(0) + } + } + #[doc = "SYSCFG package register"] + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq)] + pub struct Pkgr(pub u32); + impl Pkgr { + #[doc = "Package"] + pub const fn pkg(&self) -> u8 { let val = (self.0 >> 0usize) & 0x0f; val as u8 } - #[doc = "Overdrive enable"] - pub fn set_oden(&mut self, val: u8) { + #[doc = "Package"] + pub fn set_pkg(&mut self, val: u8) { self.0 = (self.0 & !(0x0f << 0usize)) | (((val as u32) & 0x0f) << 0usize); } } - impl Default for Pwrcr { - fn default() -> Pwrcr { - Pwrcr(0) + impl Default for Pkgr { + fn default() -> Pkgr { + Pkgr(0) } } - } -} -pub mod dma_v2 { - use crate::generic::*; - #[doc = "DMA controller"] - #[derive(Copy, Clone)] - pub struct Dma(pub *mut u8); - unsafe impl Send for Dma {} - unsafe impl Sync for Dma {} - impl Dma { - #[doc = "low interrupt status register"] - pub fn isr(self, n: usize) -> Reg { - assert!(n < 2usize); - unsafe { Reg::from_ptr(self.0.add(0usize + n * 4usize)) } - } - #[doc = "low interrupt flag clear register"] - pub fn ifcr(self, n: usize) -> Reg { - assert!(n < 2usize); - unsafe { Reg::from_ptr(self.0.add(8usize + n * 4usize)) } - } - #[doc = "Stream cluster: S?CR, S?NDTR, S?M0AR, S?M1AR and S?FCR registers"] - pub fn st(self, n: usize) -> St { - assert!(n < 8usize); - unsafe { St(self.0.add(16usize + n * 24usize)) } - } - } - #[doc = "Stream cluster: S?CR, S?NDTR, S?M0AR, S?M1AR and S?FCR registers"] - #[derive(Copy, Clone)] - pub struct St(pub *mut u8); - unsafe impl Send for St {} - unsafe impl Sync for St {} - impl St { - #[doc = "stream x configuration register"] - pub fn cr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(0usize)) } - } - #[doc = "stream x number of data register"] - pub fn ndtr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(4usize)) } - } - #[doc = "stream x peripheral address register"] - pub fn par(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(8usize)) } - } - #[doc = "stream x memory 0 address register"] - pub fn m0ar(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(12usize)) } - } - #[doc = "stream x memory 1 address register"] - pub fn m1ar(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(16usize)) } - } - #[doc = "stream x FIFO control register"] - pub fn fcr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(20usize)) } - } - } - pub mod regs { - use crate::generic::*; - #[doc = "stream x configuration register"] + #[doc = "compensation cell control/status register"] #[repr(transparent)] #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Cr(pub u32); - impl Cr { - #[doc = "Stream enable / flag stream ready when read low"] + pub struct Cccsr(pub u32); + impl Cccsr { + #[doc = "enable"] pub const fn en(&self) -> bool { let val = (self.0 >> 0usize) & 0x01; val != 0 } - #[doc = "Stream enable / flag stream ready when read low"] + #[doc = "enable"] pub fn set_en(&mut self, val: bool) { self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize); } - #[doc = "Direct mode error interrupt enable"] - pub const fn dmeie(&self) -> bool { + #[doc = "Code selection"] + pub const fn cs(&self) -> bool { let val = (self.0 >> 1usize) & 0x01; val != 0 } - #[doc = "Direct mode error interrupt enable"] - pub fn set_dmeie(&mut self, val: bool) { + #[doc = "Code selection"] + pub fn set_cs(&mut self, val: bool) { self.0 = (self.0 & !(0x01 << 1usize)) | (((val as u32) & 0x01) << 1usize); } - #[doc = "Transfer error interrupt enable"] - pub const fn teie(&self) -> bool { - let val = (self.0 >> 2usize) & 0x01; - val != 0 - } - #[doc = "Transfer error interrupt enable"] - pub fn set_teie(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 2usize)) | (((val as u32) & 0x01) << 2usize); - } - #[doc = "Half transfer interrupt enable"] - pub const fn htie(&self) -> bool { - let val = (self.0 >> 3usize) & 0x01; - val != 0 - } - #[doc = "Half transfer interrupt enable"] - pub fn set_htie(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 3usize)) | (((val as u32) & 0x01) << 3usize); - } - #[doc = "Transfer complete interrupt enable"] - pub const fn tcie(&self) -> bool { - let val = (self.0 >> 4usize) & 0x01; - val != 0 - } - #[doc = "Transfer complete interrupt enable"] - pub fn set_tcie(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 4usize)) | (((val as u32) & 0x01) << 4usize); - } - #[doc = "Peripheral flow controller"] - pub const fn pfctrl(&self) -> super::vals::Pfctrl { - let val = (self.0 >> 5usize) & 0x01; - super::vals::Pfctrl(val as u8) - } - #[doc = "Peripheral flow controller"] - pub fn set_pfctrl(&mut self, val: super::vals::Pfctrl) { - self.0 = (self.0 & !(0x01 << 5usize)) | (((val.0 as u32) & 0x01) << 5usize); - } - #[doc = "Data transfer direction"] - pub const fn dir(&self) -> super::vals::Dir { - let val = (self.0 >> 6usize) & 0x03; - super::vals::Dir(val as u8) - } - #[doc = "Data transfer direction"] - pub fn set_dir(&mut self, val: super::vals::Dir) { - self.0 = (self.0 & !(0x03 << 6usize)) | (((val.0 as u32) & 0x03) << 6usize); - } - #[doc = "Circular mode"] - pub const fn circ(&self) -> super::vals::Circ { + #[doc = "Compensation cell ready flag"] + pub const fn ready(&self) -> bool { let val = (self.0 >> 8usize) & 0x01; - super::vals::Circ(val as u8) - } - #[doc = "Circular mode"] - pub fn set_circ(&mut self, val: super::vals::Circ) { - self.0 = (self.0 & !(0x01 << 8usize)) | (((val.0 as u32) & 0x01) << 8usize); - } - #[doc = "Peripheral increment mode"] - pub const fn pinc(&self) -> super::vals::Inc { - let val = (self.0 >> 9usize) & 0x01; - super::vals::Inc(val as u8) - } - #[doc = "Peripheral increment mode"] - pub fn set_pinc(&mut self, val: super::vals::Inc) { - self.0 = (self.0 & !(0x01 << 9usize)) | (((val.0 as u32) & 0x01) << 9usize); - } - #[doc = "Memory increment mode"] - pub const fn minc(&self) -> super::vals::Inc { - let val = (self.0 >> 10usize) & 0x01; - super::vals::Inc(val as u8) - } - #[doc = "Memory increment mode"] - pub fn set_minc(&mut self, val: super::vals::Inc) { - self.0 = (self.0 & !(0x01 << 10usize)) | (((val.0 as u32) & 0x01) << 10usize); - } - #[doc = "Peripheral data size"] - pub const fn psize(&self) -> super::vals::Size { - let val = (self.0 >> 11usize) & 0x03; - super::vals::Size(val as u8) - } - #[doc = "Peripheral data size"] - pub fn set_psize(&mut self, val: super::vals::Size) { - self.0 = (self.0 & !(0x03 << 11usize)) | (((val.0 as u32) & 0x03) << 11usize); - } - #[doc = "Memory data size"] - pub const fn msize(&self) -> super::vals::Size { - let val = (self.0 >> 13usize) & 0x03; - super::vals::Size(val as u8) - } - #[doc = "Memory data size"] - pub fn set_msize(&mut self, val: super::vals::Size) { - self.0 = (self.0 & !(0x03 << 13usize)) | (((val.0 as u32) & 0x03) << 13usize); - } - #[doc = "Peripheral increment offset size"] - pub const fn pincos(&self) -> super::vals::Pincos { - let val = (self.0 >> 15usize) & 0x01; - super::vals::Pincos(val as u8) - } - #[doc = "Peripheral increment offset size"] - pub fn set_pincos(&mut self, val: super::vals::Pincos) { - self.0 = (self.0 & !(0x01 << 15usize)) | (((val.0 as u32) & 0x01) << 15usize); - } - #[doc = "Priority level"] - pub const fn pl(&self) -> super::vals::Pl { - let val = (self.0 >> 16usize) & 0x03; - super::vals::Pl(val as u8) - } - #[doc = "Priority level"] - pub fn set_pl(&mut self, val: super::vals::Pl) { - self.0 = (self.0 & !(0x03 << 16usize)) | (((val.0 as u32) & 0x03) << 16usize); - } - #[doc = "Double buffer mode"] - pub const fn dbm(&self) -> super::vals::Dbm { - let val = (self.0 >> 18usize) & 0x01; - super::vals::Dbm(val as u8) - } - #[doc = "Double buffer mode"] - pub fn set_dbm(&mut self, val: super::vals::Dbm) { - self.0 = (self.0 & !(0x01 << 18usize)) | (((val.0 as u32) & 0x01) << 18usize); - } - #[doc = "Current target (only in double buffer mode)"] - pub const fn ct(&self) -> super::vals::Ct { - let val = (self.0 >> 19usize) & 0x01; - super::vals::Ct(val as u8) - } - #[doc = "Current target (only in double buffer mode)"] - pub fn set_ct(&mut self, val: super::vals::Ct) { - self.0 = (self.0 & !(0x01 << 19usize)) | (((val.0 as u32) & 0x01) << 19usize); - } - #[doc = "Peripheral burst transfer configuration"] - pub const fn pburst(&self) -> super::vals::Burst { - let val = (self.0 >> 21usize) & 0x03; - super::vals::Burst(val as u8) - } - #[doc = "Peripheral burst transfer configuration"] - pub fn set_pburst(&mut self, val: super::vals::Burst) { - self.0 = (self.0 & !(0x03 << 21usize)) | (((val.0 as u32) & 0x03) << 21usize); - } - #[doc = "Memory burst transfer configuration"] - pub const fn mburst(&self) -> super::vals::Burst { - let val = (self.0 >> 23usize) & 0x03; - super::vals::Burst(val as u8) - } - #[doc = "Memory burst transfer configuration"] - pub fn set_mburst(&mut self, val: super::vals::Burst) { - self.0 = (self.0 & !(0x03 << 23usize)) | (((val.0 as u32) & 0x03) << 23usize); - } - #[doc = "Channel selection"] - pub const fn chsel(&self) -> u8 { - let val = (self.0 >> 25usize) & 0x0f; - val as u8 - } - #[doc = "Channel selection"] - pub fn set_chsel(&mut self, val: u8) { - self.0 = (self.0 & !(0x0f << 25usize)) | (((val as u32) & 0x0f) << 25usize); - } - } - impl Default for Cr { - fn default() -> Cr { - Cr(0) - } - } - #[doc = "stream x FIFO control register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Fcr(pub u32); - impl Fcr { - #[doc = "FIFO threshold selection"] - pub const fn fth(&self) -> super::vals::Fth { - let val = (self.0 >> 0usize) & 0x03; - super::vals::Fth(val as u8) - } - #[doc = "FIFO threshold selection"] - pub fn set_fth(&mut self, val: super::vals::Fth) { - self.0 = (self.0 & !(0x03 << 0usize)) | (((val.0 as u32) & 0x03) << 0usize); - } - #[doc = "Direct mode disable"] - pub const fn dmdis(&self) -> super::vals::Dmdis { - let val = (self.0 >> 2usize) & 0x01; - super::vals::Dmdis(val as u8) - } - #[doc = "Direct mode disable"] - pub fn set_dmdis(&mut self, val: super::vals::Dmdis) { - self.0 = (self.0 & !(0x01 << 2usize)) | (((val.0 as u32) & 0x01) << 2usize); - } - #[doc = "FIFO status"] - pub const fn fs(&self) -> super::vals::Fs { - let val = (self.0 >> 3usize) & 0x07; - super::vals::Fs(val as u8) - } - #[doc = "FIFO status"] - pub fn set_fs(&mut self, val: super::vals::Fs) { - self.0 = (self.0 & !(0x07 << 3usize)) | (((val.0 as u32) & 0x07) << 3usize); - } - #[doc = "FIFO error interrupt enable"] - pub const fn feie(&self) -> bool { - let val = (self.0 >> 7usize) & 0x01; val != 0 } - #[doc = "FIFO error interrupt enable"] - pub fn set_feie(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 7usize)) | (((val as u32) & 0x01) << 7usize); + #[doc = "Compensation cell ready flag"] + pub fn set_ready(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 8usize)) | (((val as u32) & 0x01) << 8usize); } - } - impl Default for Fcr { - fn default() -> Fcr { - Fcr(0) - } - } - #[doc = "interrupt register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Ixr(pub u32); - impl Ixr { - #[doc = "Stream x FIFO error interrupt flag (x=3..0)"] - pub fn feif(&self, n: usize) -> bool { - assert!(n < 4usize); - let offs = 0usize + ([0usize, 6usize, 16usize, 22usize][n] as usize); - let val = (self.0 >> offs) & 0x01; - val != 0 - } - #[doc = "Stream x FIFO error interrupt flag (x=3..0)"] - pub fn set_feif(&mut self, n: usize, val: bool) { - assert!(n < 4usize); - let offs = 0usize + ([0usize, 6usize, 16usize, 22usize][n] as usize); - self.0 = (self.0 & !(0x01 << offs)) | (((val as u32) & 0x01) << offs); - } - #[doc = "Stream x direct mode error interrupt flag (x=3..0)"] - pub fn dmeif(&self, n: usize) -> bool { - assert!(n < 4usize); - let offs = 2usize + ([0usize, 6usize, 16usize, 22usize][n] as usize); - let val = (self.0 >> offs) & 0x01; - val != 0 - } - #[doc = "Stream x direct mode error interrupt flag (x=3..0)"] - pub fn set_dmeif(&mut self, n: usize, val: bool) { - assert!(n < 4usize); - let offs = 2usize + ([0usize, 6usize, 16usize, 22usize][n] as usize); - self.0 = (self.0 & !(0x01 << offs)) | (((val as u32) & 0x01) << offs); - } - #[doc = "Stream x transfer error interrupt flag (x=3..0)"] - pub fn teif(&self, n: usize) -> bool { - assert!(n < 4usize); - let offs = 3usize + ([0usize, 6usize, 16usize, 22usize][n] as usize); - let val = (self.0 >> offs) & 0x01; - val != 0 - } - #[doc = "Stream x transfer error interrupt flag (x=3..0)"] - pub fn set_teif(&mut self, n: usize, val: bool) { - assert!(n < 4usize); - let offs = 3usize + ([0usize, 6usize, 16usize, 22usize][n] as usize); - self.0 = (self.0 & !(0x01 << offs)) | (((val as u32) & 0x01) << offs); - } - #[doc = "Stream x half transfer interrupt flag (x=3..0)"] - pub fn htif(&self, n: usize) -> bool { - assert!(n < 4usize); - let offs = 4usize + ([0usize, 6usize, 16usize, 22usize][n] as usize); - let val = (self.0 >> offs) & 0x01; - val != 0 - } - #[doc = "Stream x half transfer interrupt flag (x=3..0)"] - pub fn set_htif(&mut self, n: usize, val: bool) { - assert!(n < 4usize); - let offs = 4usize + ([0usize, 6usize, 16usize, 22usize][n] as usize); - self.0 = (self.0 & !(0x01 << offs)) | (((val as u32) & 0x01) << offs); - } - #[doc = "Stream x transfer complete interrupt flag (x = 3..0)"] - pub fn tcif(&self, n: usize) -> bool { - assert!(n < 4usize); - let offs = 5usize + ([0usize, 6usize, 16usize, 22usize][n] as usize); - let val = (self.0 >> offs) & 0x01; - val != 0 - } - #[doc = "Stream x transfer complete interrupt flag (x = 3..0)"] - pub fn set_tcif(&mut self, n: usize, val: bool) { - assert!(n < 4usize); - let offs = 5usize + ([0usize, 6usize, 16usize, 22usize][n] as usize); - self.0 = (self.0 & !(0x01 << offs)) | (((val as u32) & 0x01) << offs); - } - } - impl Default for Ixr { - fn default() -> Ixr { - Ixr(0) - } - } - #[doc = "stream x number of data register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Ndtr(pub u32); - impl Ndtr { - #[doc = "Number of data items to transfer"] - pub const fn ndt(&self) -> u16 { - let val = (self.0 >> 0usize) & 0xffff; - val as u16 - } - #[doc = "Number of data items to transfer"] - pub fn set_ndt(&mut self, val: u16) { - self.0 = (self.0 & !(0xffff << 0usize)) | (((val as u32) & 0xffff) << 0usize); - } - } - impl Default for Ndtr { - fn default() -> Ndtr { - Ndtr(0) - } - } - } - pub mod vals { - use crate::generic::*; - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Pfctrl(pub u8); - impl Pfctrl { - #[doc = "The DMA is the flow controller"] - pub const DMA: Self = Self(0); - #[doc = "The peripheral is the flow controller"] - pub const PERIPHERAL: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Circ(pub u8); - impl Circ { - #[doc = "Circular mode disabled"] - pub const DISABLED: Self = Self(0); - #[doc = "Circular mode enabled"] - pub const ENABLED: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Ct(pub u8); - impl Ct { - #[doc = "The current target memory is Memory 0"] - pub const MEMORY0: Self = Self(0); - #[doc = "The current target memory is Memory 1"] - pub const MEMORY1: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Size(pub u8); - impl Size { - #[doc = "Byte (8-bit)"] - pub const BITS8: Self = Self(0); - #[doc = "Half-word (16-bit)"] - pub const BITS16: Self = Self(0x01); - #[doc = "Word (32-bit)"] - pub const BITS32: Self = Self(0x02); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Inc(pub u8); - impl Inc { - #[doc = "Address pointer is fixed"] - pub const FIXED: Self = Self(0); - #[doc = "Address pointer is incremented after each data transfer"] - pub const INCREMENTED: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Burst(pub u8); - impl Burst { - #[doc = "Single transfer"] - pub const SINGLE: Self = Self(0); - #[doc = "Incremental burst of 4 beats"] - pub const INCR4: Self = Self(0x01); - #[doc = "Incremental burst of 8 beats"] - pub const INCR8: Self = Self(0x02); - #[doc = "Incremental burst of 16 beats"] - pub const INCR16: Self = Self(0x03); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Fth(pub u8); - impl Fth { - #[doc = "1/4 full FIFO"] - pub const QUARTER: Self = Self(0); - #[doc = "1/2 full FIFO"] - pub const HALF: Self = Self(0x01); - #[doc = "3/4 full FIFO"] - pub const THREEQUARTERS: Self = Self(0x02); - #[doc = "Full FIFO"] - pub const FULL: Self = Self(0x03); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Pincos(pub u8); - impl Pincos { - #[doc = "The offset size for the peripheral address calculation is linked to the PSIZE"] - pub const PSIZE: Self = Self(0); - #[doc = "The offset size for the peripheral address calculation is fixed to 4 (32-bit alignment)"] - pub const FIXED4: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Dbm(pub u8); - impl Dbm { - #[doc = "No buffer switching at the end of transfer"] - pub const DISABLED: Self = Self(0); - #[doc = "Memory target switched at the end of the DMA transfer"] - pub const ENABLED: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Pl(pub u8); - impl Pl { - #[doc = "Low"] - pub const LOW: Self = Self(0); - #[doc = "Medium"] - pub const MEDIUM: Self = Self(0x01); - #[doc = "High"] - pub const HIGH: Self = Self(0x02); - #[doc = "Very high"] - pub const VERYHIGH: Self = Self(0x03); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Fs(pub u8); - impl Fs { - #[doc = "0 < fifo_level < 1/4"] - pub const QUARTER1: Self = Self(0); - #[doc = "1/4 <= fifo_level < 1/2"] - pub const QUARTER2: Self = Self(0x01); - #[doc = "1/2 <= fifo_level < 3/4"] - pub const QUARTER3: Self = Self(0x02); - #[doc = "3/4 <= fifo_level < full"] - pub const QUARTER4: Self = Self(0x03); - #[doc = "FIFO is empty"] - pub const EMPTY: Self = Self(0x04); - #[doc = "FIFO is full"] - pub const FULL: Self = Self(0x05); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Dir(pub u8); - impl Dir { - #[doc = "Peripheral-to-memory"] - pub const PERIPHERALTOMEMORY: Self = Self(0); - #[doc = "Memory-to-peripheral"] - pub const MEMORYTOPERIPHERAL: Self = Self(0x01); - #[doc = "Memory-to-memory"] - pub const MEMORYTOMEMORY: Self = Self(0x02); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Dmdis(pub u8); - impl Dmdis { - #[doc = "Direct mode is enabled"] - pub const ENABLED: Self = Self(0); - #[doc = "Direct mode is disabled"] - pub const DISABLED: Self = Self(0x01); - } - } -} -pub mod gpio_v1 { - use crate::generic::*; - #[doc = "General purpose I/O"] - #[derive(Copy, Clone)] - pub struct Gpio(pub *mut u8); - unsafe impl Send for Gpio {} - unsafe impl Sync for Gpio {} - impl Gpio { - #[doc = "Port configuration register low (GPIOn_CRL)"] - pub fn cr(self, n: usize) -> Reg { - assert!(n < 2usize); - unsafe { Reg::from_ptr(self.0.add(0usize + n * 4usize)) } - } - #[doc = "Port input data register (GPIOn_IDR)"] - pub fn idr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(8usize)) } - } - #[doc = "Port output data register (GPIOn_ODR)"] - pub fn odr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(12usize)) } - } - #[doc = "Port bit set/reset register (GPIOn_BSRR)"] - pub fn bsrr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(16usize)) } - } - #[doc = "Port bit reset register (GPIOn_BRR)"] - pub fn brr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(20usize)) } - } - #[doc = "Port configuration lock register"] - pub fn lckr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(24usize)) } - } - } - pub mod regs { - use crate::generic::*; - #[doc = "Port input data register (GPIOn_IDR)"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Idr(pub u32); - impl Idr { - #[doc = "Port input data"] - pub fn idr(&self, n: usize) -> super::vals::Idr { - assert!(n < 16usize); - let offs = 0usize + n * 1usize; - let val = (self.0 >> offs) & 0x01; - super::vals::Idr(val as u8) - } - #[doc = "Port input data"] - pub fn set_idr(&mut self, n: usize, val: super::vals::Idr) { - assert!(n < 16usize); - let offs = 0usize + n * 1usize; - self.0 = (self.0 & !(0x01 << offs)) | (((val.0 as u32) & 0x01) << offs); - } - } - impl Default for Idr { - fn default() -> Idr { - Idr(0) - } - } - #[doc = "Port output data register (GPIOn_ODR)"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Odr(pub u32); - impl Odr { - #[doc = "Port output data"] - pub fn odr(&self, n: usize) -> super::vals::Odr { - assert!(n < 16usize); - let offs = 0usize + n * 1usize; - let val = (self.0 >> offs) & 0x01; - super::vals::Odr(val as u8) - } - #[doc = "Port output data"] - pub fn set_odr(&mut self, n: usize, val: super::vals::Odr) { - assert!(n < 16usize); - let offs = 0usize + n * 1usize; - self.0 = (self.0 & !(0x01 << offs)) | (((val.0 as u32) & 0x01) << offs); - } - } - impl Default for Odr { - fn default() -> Odr { - Odr(0) - } - } - #[doc = "Port bit reset register (GPIOn_BRR)"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Brr(pub u32); - impl Brr { - #[doc = "Reset bit"] - pub fn br(&self, n: usize) -> bool { - assert!(n < 16usize); - let offs = 0usize + n * 1usize; - let val = (self.0 >> offs) & 0x01; - val != 0 - } - #[doc = "Reset bit"] - pub fn set_br(&mut self, n: usize, val: bool) { - assert!(n < 16usize); - let offs = 0usize + n * 1usize; - self.0 = (self.0 & !(0x01 << offs)) | (((val as u32) & 0x01) << offs); - } - } - impl Default for Brr { - fn default() -> Brr { - Brr(0) - } - } - #[doc = "Port bit set/reset register (GPIOn_BSRR)"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Bsrr(pub u32); - impl Bsrr { - #[doc = "Set bit"] - pub fn bs(&self, n: usize) -> bool { - assert!(n < 16usize); - let offs = 0usize + n * 1usize; - let val = (self.0 >> offs) & 0x01; - val != 0 - } - #[doc = "Set bit"] - pub fn set_bs(&mut self, n: usize, val: bool) { - assert!(n < 16usize); - let offs = 0usize + n * 1usize; - self.0 = (self.0 & !(0x01 << offs)) | (((val as u32) & 0x01) << offs); - } - #[doc = "Reset bit"] - pub fn br(&self, n: usize) -> bool { - assert!(n < 16usize); - let offs = 16usize + n * 1usize; - let val = (self.0 >> offs) & 0x01; - val != 0 - } - #[doc = "Reset bit"] - pub fn set_br(&mut self, n: usize, val: bool) { - assert!(n < 16usize); - let offs = 16usize + n * 1usize; - self.0 = (self.0 & !(0x01 << offs)) | (((val as u32) & 0x01) << offs); - } - } - impl Default for Bsrr { - fn default() -> Bsrr { - Bsrr(0) - } - } - #[doc = "Port configuration register (GPIOn_CRx)"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Cr(pub u32); - impl Cr { - #[doc = "Port n mode bits"] - pub fn mode(&self, n: usize) -> super::vals::Mode { - assert!(n < 8usize); - let offs = 0usize + n * 4usize; - let val = (self.0 >> offs) & 0x03; - super::vals::Mode(val as u8) - } - #[doc = "Port n mode bits"] - pub fn set_mode(&mut self, n: usize, val: super::vals::Mode) { - assert!(n < 8usize); - let offs = 0usize + n * 4usize; - self.0 = (self.0 & !(0x03 << offs)) | (((val.0 as u32) & 0x03) << offs); - } - #[doc = "Port n configuration bits"] - pub fn cnf(&self, n: usize) -> super::vals::Cnf { - assert!(n < 8usize); - let offs = 2usize + n * 4usize; - let val = (self.0 >> offs) & 0x03; - super::vals::Cnf(val as u8) - } - #[doc = "Port n configuration bits"] - pub fn set_cnf(&mut self, n: usize, val: super::vals::Cnf) { - assert!(n < 8usize); - let offs = 2usize + n * 4usize; - self.0 = (self.0 & !(0x03 << offs)) | (((val.0 as u32) & 0x03) << offs); - } - } - impl Default for Cr { - fn default() -> Cr { - Cr(0) - } - } - #[doc = "Port configuration lock register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Lckr(pub u32); - impl Lckr { - #[doc = "Port A Lock bit"] - pub fn lck(&self, n: usize) -> super::vals::Lck { - assert!(n < 16usize); - let offs = 0usize + n * 1usize; - let val = (self.0 >> offs) & 0x01; - super::vals::Lck(val as u8) - } - #[doc = "Port A Lock bit"] - pub fn set_lck(&mut self, n: usize, val: super::vals::Lck) { - assert!(n < 16usize); - let offs = 0usize + n * 1usize; - self.0 = (self.0 & !(0x01 << offs)) | (((val.0 as u32) & 0x01) << offs); - } - #[doc = "Lock key"] - pub const fn lckk(&self) -> super::vals::Lckk { + #[doc = "High-speed at low-voltage"] + pub const fn hslv(&self) -> bool { let val = (self.0 >> 16usize) & 0x01; - super::vals::Lckk(val as u8) - } - #[doc = "Lock key"] - pub fn set_lckk(&mut self, val: super::vals::Lckk) { - self.0 = (self.0 & !(0x01 << 16usize)) | (((val.0 as u32) & 0x01) << 16usize); - } - } - impl Default for Lckr { - fn default() -> Lckr { - Lckr(0) - } - } - } - pub mod vals { - use crate::generic::*; - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Lck(pub u8); - impl Lck { - #[doc = "Port configuration not locked"] - pub const UNLOCKED: Self = Self(0); - #[doc = "Port configuration locked"] - pub const LOCKED: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Idr(pub u8); - impl Idr { - #[doc = "Input is logic low"] - pub const LOW: Self = Self(0); - #[doc = "Input is logic high"] - pub const HIGH: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Mode(pub u8); - impl Mode { - #[doc = "Input mode (reset state)"] - pub const INPUT: Self = Self(0); - #[doc = "Output mode 10 MHz"] - pub const OUTPUT: Self = Self(0x01); - #[doc = "Output mode 2 MHz"] - pub const OUTPUT2: Self = Self(0x02); - #[doc = "Output mode 50 MHz"] - pub const OUTPUT50: Self = Self(0x03); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Lckk(pub u8); - impl Lckk { - #[doc = "Port configuration lock key not active"] - pub const NOTACTIVE: Self = Self(0); - #[doc = "Port configuration lock key active"] - pub const ACTIVE: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Bsw(pub u8); - impl Bsw { - #[doc = "No action on the corresponding ODx bit"] - pub const NOACTION: Self = Self(0); - #[doc = "Sets the corresponding ODRx bit"] - pub const SET: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Odr(pub u8); - impl Odr { - #[doc = "Set output to logic low"] - pub const LOW: Self = Self(0); - #[doc = "Set output to logic high"] - pub const HIGH: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Brw(pub u8); - impl Brw { - #[doc = "No action on the corresponding ODx bit"] - pub const NOACTION: Self = Self(0); - #[doc = "Reset the ODx bit"] - pub const RESET: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Cnf(pub u8); - impl Cnf { - #[doc = "Analog mode / Push-Pull mode"] - pub const PUSHPULL: Self = Self(0); - #[doc = "Floating input (reset state) / Open Drain-Mode"] - pub const OPENDRAIN: Self = Self(0x01); - #[doc = "Input with pull-up/pull-down / Alternate Function Push-Pull Mode"] - pub const ALTPUSHPULL: Self = Self(0x02); - #[doc = "Alternate Function Open-Drain Mode"] - pub const ALTOPENDRAIN: Self = Self(0x03); - } - } -} -pub mod usart_v1 { - use crate::generic::*; - #[doc = "Universal synchronous asynchronous receiver transmitter"] - #[derive(Copy, Clone)] - pub struct Usart(pub *mut u8); - unsafe impl Send for Usart {} - unsafe impl Sync for Usart {} - impl Usart { - #[doc = "Status register"] - pub fn sr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(0usize)) } - } - #[doc = "Data register"] - pub fn dr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(4usize)) } - } - #[doc = "Baud rate register"] - pub fn brr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(8usize)) } - } - #[doc = "Control register 1"] - pub fn cr1(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(12usize)) } - } - #[doc = "Control register 2"] - pub fn cr2(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(16usize)) } - } - #[doc = "Control register 3"] - pub fn cr3(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(20usize)) } - } - #[doc = "Guard time and prescaler register"] - pub fn gtpr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(24usize)) } - } - } - #[doc = "Universal asynchronous receiver transmitter"] - #[derive(Copy, Clone)] - pub struct Uart(pub *mut u8); - unsafe impl Send for Uart {} - unsafe impl Sync for Uart {} - impl Uart { - #[doc = "Status register"] - pub fn sr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(0usize)) } - } - #[doc = "Data register"] - pub fn dr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(4usize)) } - } - #[doc = "Baud rate register"] - pub fn brr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(8usize)) } - } - #[doc = "Control register 1"] - pub fn cr1(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(12usize)) } - } - #[doc = "Control register 2"] - pub fn cr2(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(16usize)) } - } - #[doc = "Control register 3"] - pub fn cr3(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(20usize)) } - } - } - pub mod regs { - use crate::generic::*; - #[doc = "Status register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct SrUsart(pub u32); - impl SrUsart { - #[doc = "Parity error"] - pub const fn pe(&self) -> bool { - let val = (self.0 >> 0usize) & 0x01; val != 0 } - #[doc = "Parity error"] - pub fn set_pe(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize); - } - #[doc = "Framing error"] - pub const fn fe(&self) -> bool { - let val = (self.0 >> 1usize) & 0x01; - val != 0 - } - #[doc = "Framing error"] - pub fn set_fe(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 1usize)) | (((val as u32) & 0x01) << 1usize); - } - #[doc = "Noise error flag"] - pub const fn ne(&self) -> bool { - let val = (self.0 >> 2usize) & 0x01; - val != 0 - } - #[doc = "Noise error flag"] - pub fn set_ne(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 2usize)) | (((val as u32) & 0x01) << 2usize); - } - #[doc = "Overrun error"] - pub const fn ore(&self) -> bool { - let val = (self.0 >> 3usize) & 0x01; - val != 0 - } - #[doc = "Overrun error"] - pub fn set_ore(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 3usize)) | (((val as u32) & 0x01) << 3usize); - } - #[doc = "IDLE line detected"] - pub const fn idle(&self) -> bool { - let val = (self.0 >> 4usize) & 0x01; - val != 0 - } - #[doc = "IDLE line detected"] - pub fn set_idle(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 4usize)) | (((val as u32) & 0x01) << 4usize); - } - #[doc = "Read data register not empty"] - pub const fn rxne(&self) -> bool { - let val = (self.0 >> 5usize) & 0x01; - val != 0 - } - #[doc = "Read data register not empty"] - pub fn set_rxne(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 5usize)) | (((val as u32) & 0x01) << 5usize); - } - #[doc = "Transmission complete"] - pub const fn tc(&self) -> bool { - let val = (self.0 >> 6usize) & 0x01; - val != 0 - } - #[doc = "Transmission complete"] - pub fn set_tc(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 6usize)) | (((val as u32) & 0x01) << 6usize); - } - #[doc = "Transmit data register empty"] - pub const fn txe(&self) -> bool { - let val = (self.0 >> 7usize) & 0x01; - val != 0 - } - #[doc = "Transmit data register empty"] - pub fn set_txe(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 7usize)) | (((val as u32) & 0x01) << 7usize); - } - #[doc = "LIN break detection flag"] - pub const fn lbd(&self) -> bool { - let val = (self.0 >> 8usize) & 0x01; - val != 0 - } - #[doc = "LIN break detection flag"] - pub fn set_lbd(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 8usize)) | (((val as u32) & 0x01) << 8usize); - } - #[doc = "CTS flag"] - pub const fn cts(&self) -> bool { - let val = (self.0 >> 9usize) & 0x01; - val != 0 - } - #[doc = "CTS flag"] - pub fn set_cts(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 9usize)) | (((val as u32) & 0x01) << 9usize); + #[doc = "High-speed at low-voltage"] + pub fn set_hslv(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 16usize)) | (((val as u32) & 0x01) << 16usize); } } - impl Default for SrUsart { - fn default() -> SrUsart { - SrUsart(0) - } - } - #[doc = "Data register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Dr(pub u32); - impl Dr { - #[doc = "Data value"] - pub const fn dr(&self) -> u16 { - let val = (self.0 >> 0usize) & 0x01ff; - val as u16 - } - #[doc = "Data value"] - pub fn set_dr(&mut self, val: u16) { - self.0 = (self.0 & !(0x01ff << 0usize)) | (((val as u32) & 0x01ff) << 0usize); - } - } - impl Default for Dr { - fn default() -> Dr { - Dr(0) - } - } - #[doc = "Control register 3"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Cr3(pub u32); - impl Cr3 { - #[doc = "Error interrupt enable"] - pub const fn eie(&self) -> bool { - let val = (self.0 >> 0usize) & 0x01; - val != 0 - } - #[doc = "Error interrupt enable"] - pub fn set_eie(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize); - } - #[doc = "IrDA mode enable"] - pub const fn iren(&self) -> bool { - let val = (self.0 >> 1usize) & 0x01; - val != 0 - } - #[doc = "IrDA mode enable"] - pub fn set_iren(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 1usize)) | (((val as u32) & 0x01) << 1usize); - } - #[doc = "IrDA low-power"] - pub const fn irlp(&self) -> super::vals::Irlp { - let val = (self.0 >> 2usize) & 0x01; - super::vals::Irlp(val as u8) - } - #[doc = "IrDA low-power"] - pub fn set_irlp(&mut self, val: super::vals::Irlp) { - self.0 = (self.0 & !(0x01 << 2usize)) | (((val.0 as u32) & 0x01) << 2usize); - } - #[doc = "Half-duplex selection"] - pub const fn hdsel(&self) -> super::vals::Hdsel { - let val = (self.0 >> 3usize) & 0x01; - super::vals::Hdsel(val as u8) - } - #[doc = "Half-duplex selection"] - pub fn set_hdsel(&mut self, val: super::vals::Hdsel) { - self.0 = (self.0 & !(0x01 << 3usize)) | (((val.0 as u32) & 0x01) << 3usize); - } - #[doc = "DMA enable receiver"] - pub const fn dmar(&self) -> bool { - let val = (self.0 >> 6usize) & 0x01; - val != 0 - } - #[doc = "DMA enable receiver"] - pub fn set_dmar(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 6usize)) | (((val as u32) & 0x01) << 6usize); - } - #[doc = "DMA enable transmitter"] - pub const fn dmat(&self) -> bool { - let val = (self.0 >> 7usize) & 0x01; - val != 0 - } - #[doc = "DMA enable transmitter"] - pub fn set_dmat(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 7usize)) | (((val as u32) & 0x01) << 7usize); - } - } - impl Default for Cr3 { - fn default() -> Cr3 { - Cr3(0) - } - } - #[doc = "Guard time and prescaler register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Gtpr(pub u32); - impl Gtpr { - #[doc = "Prescaler value"] - pub const fn psc(&self) -> u8 { - let val = (self.0 >> 0usize) & 0xff; - val as u8 - } - #[doc = "Prescaler value"] - pub fn set_psc(&mut self, val: u8) { - self.0 = (self.0 & !(0xff << 0usize)) | (((val as u32) & 0xff) << 0usize); - } - #[doc = "Guard time value"] - pub const fn gt(&self) -> u8 { - let val = (self.0 >> 8usize) & 0xff; - val as u8 - } - #[doc = "Guard time value"] - pub fn set_gt(&mut self, val: u8) { - self.0 = (self.0 & !(0xff << 8usize)) | (((val as u32) & 0xff) << 8usize); - } - } - impl Default for Gtpr { - fn default() -> Gtpr { - Gtpr(0) - } - } - #[doc = "Control register 2"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Cr2Usart(pub u32); - impl Cr2Usart { - #[doc = "Address of the USART node"] - pub const fn add(&self) -> u8 { - let val = (self.0 >> 0usize) & 0x0f; - val as u8 - } - #[doc = "Address of the USART node"] - pub fn set_add(&mut self, val: u8) { - self.0 = (self.0 & !(0x0f << 0usize)) | (((val as u32) & 0x0f) << 0usize); - } - #[doc = "lin break detection length"] - pub const fn lbdl(&self) -> super::vals::Lbdl { - let val = (self.0 >> 5usize) & 0x01; - super::vals::Lbdl(val as u8) - } - #[doc = "lin break detection length"] - pub fn set_lbdl(&mut self, val: super::vals::Lbdl) { - self.0 = (self.0 & !(0x01 << 5usize)) | (((val.0 as u32) & 0x01) << 5usize); - } - #[doc = "LIN break detection interrupt enable"] - pub const fn lbdie(&self) -> bool { - let val = (self.0 >> 6usize) & 0x01; - val != 0 - } - #[doc = "LIN break detection interrupt enable"] - pub fn set_lbdie(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 6usize)) | (((val as u32) & 0x01) << 6usize); - } - #[doc = "Last bit clock pulse"] - pub const fn lbcl(&self) -> bool { - let val = (self.0 >> 8usize) & 0x01; - val != 0 - } - #[doc = "Last bit clock pulse"] - pub fn set_lbcl(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 8usize)) | (((val as u32) & 0x01) << 8usize); - } - #[doc = "Clock phase"] - pub const fn cpha(&self) -> super::vals::Cpha { - let val = (self.0 >> 9usize) & 0x01; - super::vals::Cpha(val as u8) - } - #[doc = "Clock phase"] - pub fn set_cpha(&mut self, val: super::vals::Cpha) { - self.0 = (self.0 & !(0x01 << 9usize)) | (((val.0 as u32) & 0x01) << 9usize); - } - #[doc = "Clock polarity"] - pub const fn cpol(&self) -> super::vals::Cpol { - let val = (self.0 >> 10usize) & 0x01; - super::vals::Cpol(val as u8) - } - #[doc = "Clock polarity"] - pub fn set_cpol(&mut self, val: super::vals::Cpol) { - self.0 = (self.0 & !(0x01 << 10usize)) | (((val.0 as u32) & 0x01) << 10usize); - } - #[doc = "Clock enable"] - pub const fn clken(&self) -> bool { - let val = (self.0 >> 11usize) & 0x01; - val != 0 - } - #[doc = "Clock enable"] - pub fn set_clken(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 11usize)) | (((val as u32) & 0x01) << 11usize); - } - #[doc = "STOP bits"] - pub const fn stop(&self) -> super::vals::Stop { - let val = (self.0 >> 12usize) & 0x03; - super::vals::Stop(val as u8) - } - #[doc = "STOP bits"] - pub fn set_stop(&mut self, val: super::vals::Stop) { - self.0 = (self.0 & !(0x03 << 12usize)) | (((val.0 as u32) & 0x03) << 12usize); - } - #[doc = "LIN mode enable"] - pub const fn linen(&self) -> bool { - let val = (self.0 >> 14usize) & 0x01; - val != 0 - } - #[doc = "LIN mode enable"] - pub fn set_linen(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 14usize)) | (((val as u32) & 0x01) << 14usize); - } - } - impl Default for Cr2Usart { - fn default() -> Cr2Usart { - Cr2Usart(0) - } - } - #[doc = "Control register 2"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Cr2(pub u32); - impl Cr2 { - #[doc = "Address of the USART node"] - pub const fn add(&self) -> u8 { - let val = (self.0 >> 0usize) & 0x0f; - val as u8 - } - #[doc = "Address of the USART node"] - pub fn set_add(&mut self, val: u8) { - self.0 = (self.0 & !(0x0f << 0usize)) | (((val as u32) & 0x0f) << 0usize); - } - #[doc = "lin break detection length"] - pub const fn lbdl(&self) -> super::vals::Lbdl { - let val = (self.0 >> 5usize) & 0x01; - super::vals::Lbdl(val as u8) - } - #[doc = "lin break detection length"] - pub fn set_lbdl(&mut self, val: super::vals::Lbdl) { - self.0 = (self.0 & !(0x01 << 5usize)) | (((val.0 as u32) & 0x01) << 5usize); - } - #[doc = "LIN break detection interrupt enable"] - pub const fn lbdie(&self) -> bool { - let val = (self.0 >> 6usize) & 0x01; - val != 0 - } - #[doc = "LIN break detection interrupt enable"] - pub fn set_lbdie(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 6usize)) | (((val as u32) & 0x01) << 6usize); - } - #[doc = "STOP bits"] - pub const fn stop(&self) -> super::vals::Stop { - let val = (self.0 >> 12usize) & 0x03; - super::vals::Stop(val as u8) - } - #[doc = "STOP bits"] - pub fn set_stop(&mut self, val: super::vals::Stop) { - self.0 = (self.0 & !(0x03 << 12usize)) | (((val.0 as u32) & 0x03) << 12usize); - } - #[doc = "LIN mode enable"] - pub const fn linen(&self) -> bool { - let val = (self.0 >> 14usize) & 0x01; - val != 0 - } - #[doc = "LIN mode enable"] - pub fn set_linen(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 14usize)) | (((val as u32) & 0x01) << 14usize); - } - } - impl Default for Cr2 { - fn default() -> Cr2 { - Cr2(0) - } - } - #[doc = "Status register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Sr(pub u32); - impl Sr { - #[doc = "Parity error"] - pub const fn pe(&self) -> bool { - let val = (self.0 >> 0usize) & 0x01; - val != 0 - } - #[doc = "Parity error"] - pub fn set_pe(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize); - } - #[doc = "Framing error"] - pub const fn fe(&self) -> bool { - let val = (self.0 >> 1usize) & 0x01; - val != 0 - } - #[doc = "Framing error"] - pub fn set_fe(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 1usize)) | (((val as u32) & 0x01) << 1usize); - } - #[doc = "Noise error flag"] - pub const fn ne(&self) -> bool { - let val = (self.0 >> 2usize) & 0x01; - val != 0 - } - #[doc = "Noise error flag"] - pub fn set_ne(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 2usize)) | (((val as u32) & 0x01) << 2usize); - } - #[doc = "Overrun error"] - pub const fn ore(&self) -> bool { - let val = (self.0 >> 3usize) & 0x01; - val != 0 - } - #[doc = "Overrun error"] - pub fn set_ore(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 3usize)) | (((val as u32) & 0x01) << 3usize); - } - #[doc = "IDLE line detected"] - pub const fn idle(&self) -> bool { - let val = (self.0 >> 4usize) & 0x01; - val != 0 - } - #[doc = "IDLE line detected"] - pub fn set_idle(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 4usize)) | (((val as u32) & 0x01) << 4usize); - } - #[doc = "Read data register not empty"] - pub const fn rxne(&self) -> bool { - let val = (self.0 >> 5usize) & 0x01; - val != 0 - } - #[doc = "Read data register not empty"] - pub fn set_rxne(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 5usize)) | (((val as u32) & 0x01) << 5usize); - } - #[doc = "Transmission complete"] - pub const fn tc(&self) -> bool { - let val = (self.0 >> 6usize) & 0x01; - val != 0 - } - #[doc = "Transmission complete"] - pub fn set_tc(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 6usize)) | (((val as u32) & 0x01) << 6usize); - } - #[doc = "Transmit data register empty"] - pub const fn txe(&self) -> bool { - let val = (self.0 >> 7usize) & 0x01; - val != 0 - } - #[doc = "Transmit data register empty"] - pub fn set_txe(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 7usize)) | (((val as u32) & 0x01) << 7usize); - } - #[doc = "LIN break detection flag"] - pub const fn lbd(&self) -> bool { - let val = (self.0 >> 8usize) & 0x01; - val != 0 - } - #[doc = "LIN break detection flag"] - pub fn set_lbd(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 8usize)) | (((val as u32) & 0x01) << 8usize); - } - } - impl Default for Sr { - fn default() -> Sr { - Sr(0) - } - } - #[doc = "Baud rate register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Brr(pub u32); - impl Brr { - #[doc = "fraction of USARTDIV"] - pub const fn div_fraction(&self) -> u8 { - let val = (self.0 >> 0usize) & 0x0f; - val as u8 - } - #[doc = "fraction of USARTDIV"] - pub fn set_div_fraction(&mut self, val: u8) { - self.0 = (self.0 & !(0x0f << 0usize)) | (((val as u32) & 0x0f) << 0usize); - } - #[doc = "mantissa of USARTDIV"] - pub const fn div_mantissa(&self) -> u16 { - let val = (self.0 >> 4usize) & 0x0fff; - val as u16 - } - #[doc = "mantissa of USARTDIV"] - pub fn set_div_mantissa(&mut self, val: u16) { - self.0 = (self.0 & !(0x0fff << 4usize)) | (((val as u32) & 0x0fff) << 4usize); - } - } - impl Default for Brr { - fn default() -> Brr { - Brr(0) - } - } - #[doc = "Control register 3"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Cr3Usart(pub u32); - impl Cr3Usart { - #[doc = "Error interrupt enable"] - pub const fn eie(&self) -> bool { - let val = (self.0 >> 0usize) & 0x01; - val != 0 - } - #[doc = "Error interrupt enable"] - pub fn set_eie(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize); - } - #[doc = "IrDA mode enable"] - pub const fn iren(&self) -> bool { - let val = (self.0 >> 1usize) & 0x01; - val != 0 - } - #[doc = "IrDA mode enable"] - pub fn set_iren(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 1usize)) | (((val as u32) & 0x01) << 1usize); - } - #[doc = "IrDA low-power"] - pub const fn irlp(&self) -> super::vals::Irlp { - let val = (self.0 >> 2usize) & 0x01; - super::vals::Irlp(val as u8) - } - #[doc = "IrDA low-power"] - pub fn set_irlp(&mut self, val: super::vals::Irlp) { - self.0 = (self.0 & !(0x01 << 2usize)) | (((val.0 as u32) & 0x01) << 2usize); - } - #[doc = "Half-duplex selection"] - pub const fn hdsel(&self) -> super::vals::Hdsel { - let val = (self.0 >> 3usize) & 0x01; - super::vals::Hdsel(val as u8) - } - #[doc = "Half-duplex selection"] - pub fn set_hdsel(&mut self, val: super::vals::Hdsel) { - self.0 = (self.0 & !(0x01 << 3usize)) | (((val.0 as u32) & 0x01) << 3usize); - } - #[doc = "Smartcard NACK enable"] - pub const fn nack(&self) -> bool { - let val = (self.0 >> 4usize) & 0x01; - val != 0 - } - #[doc = "Smartcard NACK enable"] - pub fn set_nack(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 4usize)) | (((val as u32) & 0x01) << 4usize); - } - #[doc = "Smartcard mode enable"] - pub const fn scen(&self) -> bool { - let val = (self.0 >> 5usize) & 0x01; - val != 0 - } - #[doc = "Smartcard mode enable"] - pub fn set_scen(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 5usize)) | (((val as u32) & 0x01) << 5usize); - } - #[doc = "DMA enable receiver"] - pub const fn dmar(&self) -> bool { - let val = (self.0 >> 6usize) & 0x01; - val != 0 - } - #[doc = "DMA enable receiver"] - pub fn set_dmar(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 6usize)) | (((val as u32) & 0x01) << 6usize); - } - #[doc = "DMA enable transmitter"] - pub const fn dmat(&self) -> bool { - let val = (self.0 >> 7usize) & 0x01; - val != 0 - } - #[doc = "DMA enable transmitter"] - pub fn set_dmat(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 7usize)) | (((val as u32) & 0x01) << 7usize); - } - #[doc = "RTS enable"] - pub const fn rtse(&self) -> bool { - let val = (self.0 >> 8usize) & 0x01; - val != 0 - } - #[doc = "RTS enable"] - pub fn set_rtse(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 8usize)) | (((val as u32) & 0x01) << 8usize); - } - #[doc = "CTS enable"] - pub const fn ctse(&self) -> bool { - let val = (self.0 >> 9usize) & 0x01; - val != 0 - } - #[doc = "CTS enable"] - pub fn set_ctse(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 9usize)) | (((val as u32) & 0x01) << 9usize); - } - #[doc = "CTS interrupt enable"] - pub const fn ctsie(&self) -> bool { - let val = (self.0 >> 10usize) & 0x01; - val != 0 - } - #[doc = "CTS interrupt enable"] - pub fn set_ctsie(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 10usize)) | (((val as u32) & 0x01) << 10usize); - } - } - impl Default for Cr3Usart { - fn default() -> Cr3Usart { - Cr3Usart(0) - } - } - #[doc = "Control register 1"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Cr1(pub u32); - impl Cr1 { - #[doc = "Send break"] - pub const fn sbk(&self) -> super::vals::Sbk { - let val = (self.0 >> 0usize) & 0x01; - super::vals::Sbk(val as u8) - } - #[doc = "Send break"] - pub fn set_sbk(&mut self, val: super::vals::Sbk) { - self.0 = (self.0 & !(0x01 << 0usize)) | (((val.0 as u32) & 0x01) << 0usize); - } - #[doc = "Receiver wakeup"] - pub const fn rwu(&self) -> super::vals::Rwu { - let val = (self.0 >> 1usize) & 0x01; - super::vals::Rwu(val as u8) - } - #[doc = "Receiver wakeup"] - pub fn set_rwu(&mut self, val: super::vals::Rwu) { - self.0 = (self.0 & !(0x01 << 1usize)) | (((val.0 as u32) & 0x01) << 1usize); - } - #[doc = "Receiver enable"] - pub const fn re(&self) -> bool { - let val = (self.0 >> 2usize) & 0x01; - val != 0 - } - #[doc = "Receiver enable"] - pub fn set_re(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 2usize)) | (((val as u32) & 0x01) << 2usize); - } - #[doc = "Transmitter enable"] - pub const fn te(&self) -> bool { - let val = (self.0 >> 3usize) & 0x01; - val != 0 - } - #[doc = "Transmitter enable"] - pub fn set_te(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 3usize)) | (((val as u32) & 0x01) << 3usize); - } - #[doc = "IDLE interrupt enable"] - pub const fn idleie(&self) -> bool { - let val = (self.0 >> 4usize) & 0x01; - val != 0 - } - #[doc = "IDLE interrupt enable"] - pub fn set_idleie(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 4usize)) | (((val as u32) & 0x01) << 4usize); - } - #[doc = "RXNE interrupt enable"] - pub const fn rxneie(&self) -> bool { - let val = (self.0 >> 5usize) & 0x01; - val != 0 - } - #[doc = "RXNE interrupt enable"] - pub fn set_rxneie(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 5usize)) | (((val as u32) & 0x01) << 5usize); - } - #[doc = "Transmission complete interrupt enable"] - pub const fn tcie(&self) -> bool { - let val = (self.0 >> 6usize) & 0x01; - val != 0 - } - #[doc = "Transmission complete interrupt enable"] - pub fn set_tcie(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 6usize)) | (((val as u32) & 0x01) << 6usize); - } - #[doc = "TXE interrupt enable"] - pub const fn txeie(&self) -> bool { - let val = (self.0 >> 7usize) & 0x01; - val != 0 - } - #[doc = "TXE interrupt enable"] - pub fn set_txeie(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 7usize)) | (((val as u32) & 0x01) << 7usize); - } - #[doc = "PE interrupt enable"] - pub const fn peie(&self) -> bool { - let val = (self.0 >> 8usize) & 0x01; - val != 0 - } - #[doc = "PE interrupt enable"] - pub fn set_peie(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 8usize)) | (((val as u32) & 0x01) << 8usize); - } - #[doc = "Parity selection"] - pub const fn ps(&self) -> super::vals::Ps { - let val = (self.0 >> 9usize) & 0x01; - super::vals::Ps(val as u8) - } - #[doc = "Parity selection"] - pub fn set_ps(&mut self, val: super::vals::Ps) { - self.0 = (self.0 & !(0x01 << 9usize)) | (((val.0 as u32) & 0x01) << 9usize); - } - #[doc = "Parity control enable"] - pub const fn pce(&self) -> bool { - let val = (self.0 >> 10usize) & 0x01; - val != 0 - } - #[doc = "Parity control enable"] - pub fn set_pce(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 10usize)) | (((val as u32) & 0x01) << 10usize); - } - #[doc = "Wakeup method"] - pub const fn wake(&self) -> super::vals::Wake { - let val = (self.0 >> 11usize) & 0x01; - super::vals::Wake(val as u8) - } - #[doc = "Wakeup method"] - pub fn set_wake(&mut self, val: super::vals::Wake) { - self.0 = (self.0 & !(0x01 << 11usize)) | (((val.0 as u32) & 0x01) << 11usize); - } - #[doc = "Word length"] - pub const fn m(&self) -> super::vals::M { - let val = (self.0 >> 12usize) & 0x01; - super::vals::M(val as u8) - } - #[doc = "Word length"] - pub fn set_m(&mut self, val: super::vals::M) { - self.0 = (self.0 & !(0x01 << 12usize)) | (((val.0 as u32) & 0x01) << 12usize); - } - #[doc = "USART enable"] - pub const fn ue(&self) -> bool { - let val = (self.0 >> 13usize) & 0x01; - val != 0 - } - #[doc = "USART enable"] - pub fn set_ue(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 13usize)) | (((val as u32) & 0x01) << 13usize); - } - } - impl Default for Cr1 { - fn default() -> Cr1 { - Cr1(0) - } - } - } - pub mod vals { - use crate::generic::*; - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Wake(pub u8); - impl Wake { - #[doc = "USART wakeup on idle line"] - pub const IDLELINE: Self = Self(0); - #[doc = "USART wakeup on address mark"] - pub const ADDRESSMARK: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Rwu(pub u8); - impl Rwu { - #[doc = "Receiver in active mode"] - pub const ACTIVE: Self = Self(0); - #[doc = "Receiver in mute mode"] - pub const MUTE: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct M(pub u8); - impl M { - #[doc = "8 data bits"] - pub const M8: Self = Self(0); - #[doc = "9 data bits"] - pub const M9: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Stop(pub u8); - impl Stop { - #[doc = "1 stop bit"] - pub const STOP1: Self = Self(0); - #[doc = "0.5 stop bits"] - pub const STOP0P5: Self = Self(0x01); - #[doc = "2 stop bits"] - pub const STOP2: Self = Self(0x02); - #[doc = "1.5 stop bits"] - pub const STOP1P5: Self = Self(0x03); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Cpha(pub u8); - impl Cpha { - #[doc = "The first clock transition is the first data capture edge"] - pub const FIRST: Self = Self(0); - #[doc = "The second clock transition is the first data capture edge"] - pub const SECOND: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Lbdl(pub u8); - impl Lbdl { - #[doc = "10-bit break detection"] - pub const LBDL10: Self = Self(0); - #[doc = "11-bit break detection"] - pub const LBDL11: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Sbk(pub u8); - impl Sbk { - #[doc = "No break character is transmitted"] - pub const NOBREAK: Self = Self(0); - #[doc = "Break character transmitted"] - pub const BREAK: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Cpol(pub u8); - impl Cpol { - #[doc = "Steady low value on CK pin outside transmission window"] - pub const LOW: Self = Self(0); - #[doc = "Steady high value on CK pin outside transmission window"] - pub const HIGH: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Hdsel(pub u8); - impl Hdsel { - #[doc = "Half duplex mode is not selected"] - pub const FULLDUPLEX: Self = Self(0); - #[doc = "Half duplex mode is selected"] - pub const HALFDUPLEX: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Irlp(pub u8); - impl Irlp { - #[doc = "Normal mode"] - pub const NORMAL: Self = Self(0); - #[doc = "Low-power mode"] - pub const LOWPOWER: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Ps(pub u8); - impl Ps { - #[doc = "Even parity"] - pub const EVEN: Self = Self(0); - #[doc = "Odd parity"] - pub const ODD: Self = Self(0x01); - } - } -} -pub mod spi_v1 { - use crate::generic::*; - #[doc = "Serial peripheral interface"] - #[derive(Copy, Clone)] - pub struct Spi(pub *mut u8); - unsafe impl Send for Spi {} - unsafe impl Sync for Spi {} - impl Spi { - #[doc = "control register 1"] - pub fn cr1(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(0usize)) } - } - #[doc = "control register 2"] - pub fn cr2(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(4usize)) } - } - #[doc = "status register"] - pub fn sr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(8usize)) } - } - #[doc = "data register"] - pub fn dr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(12usize)) } - } - #[doc = "CRC polynomial register"] - pub fn crcpr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(16usize)) } - } - #[doc = "RX CRC register"] - pub fn rxcrcr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(20usize)) } - } - #[doc = "TX CRC register"] - pub fn txcrcr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(24usize)) } - } - } - pub mod vals { - use crate::generic::*; - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Frer(pub u8); - impl Frer { - #[doc = "No frame format error"] - pub const NOERROR: Self = Self(0); - #[doc = "A frame format error occurred"] - pub const ERROR: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Iscfg(pub u8); - impl Iscfg { - #[doc = "Slave - transmit"] - pub const SLAVETX: Self = Self(0); - #[doc = "Slave - receive"] - pub const SLAVERX: Self = Self(0x01); - #[doc = "Master - transmit"] - pub const MASTERTX: Self = Self(0x02); - #[doc = "Master - receive"] - pub const MASTERRX: Self = Self(0x03); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Frf(pub u8); - impl Frf { - #[doc = "SPI Motorola mode"] - pub const MOTOROLA: Self = Self(0); - #[doc = "SPI TI mode"] - pub const TI: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Rxonly(pub u8); - impl Rxonly { - #[doc = "Full duplex (Transmit and receive)"] - pub const FULLDUPLEX: Self = Self(0); - #[doc = "Output disabled (Receive-only mode)"] - pub const OUTPUTDISABLED: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Cpol(pub u8); - impl Cpol { - #[doc = "CK to 0 when idle"] - pub const IDLELOW: Self = Self(0); - #[doc = "CK to 1 when idle"] - pub const IDLEHIGH: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Mstr(pub u8); - impl Mstr { - #[doc = "Slave configuration"] - pub const SLAVE: Self = Self(0); - #[doc = "Master configuration"] - pub const MASTER: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Lsbfirst(pub u8); - impl Lsbfirst { - #[doc = "Data is transmitted/received with the MSB first"] - pub const MSBFIRST: Self = Self(0); - #[doc = "Data is transmitted/received with the LSB first"] - pub const LSBFIRST: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Bidimode(pub u8); - impl Bidimode { - #[doc = "2-line unidirectional data mode selected"] - pub const UNIDIRECTIONAL: Self = Self(0); - #[doc = "1-line bidirectional data mode selected"] - pub const BIDIRECTIONAL: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Bidioe(pub u8); - impl Bidioe { - #[doc = "Output disabled (receive-only mode)"] - pub const OUTPUTDISABLED: Self = Self(0); - #[doc = "Output enabled (transmit-only mode)"] - pub const OUTPUTENABLED: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Crcnext(pub u8); - impl Crcnext { - #[doc = "Next transmit value is from Tx buffer"] - pub const TXBUFFER: Self = Self(0); - #[doc = "Next transmit value is from Tx CRC register"] - pub const CRC: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Cpha(pub u8); - impl Cpha { - #[doc = "The first clock transition is the first data capture edge"] - pub const FIRSTEDGE: Self = Self(0); - #[doc = "The second clock transition is the first data capture edge"] - pub const SECONDEDGE: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Br(pub u8); - impl Br { - #[doc = "f_PCLK / 2"] - pub const DIV2: Self = Self(0); - #[doc = "f_PCLK / 4"] - pub const DIV4: Self = Self(0x01); - #[doc = "f_PCLK / 8"] - pub const DIV8: Self = Self(0x02); - #[doc = "f_PCLK / 16"] - pub const DIV16: Self = Self(0x03); - #[doc = "f_PCLK / 32"] - pub const DIV32: Self = Self(0x04); - #[doc = "f_PCLK / 64"] - pub const DIV64: Self = Self(0x05); - #[doc = "f_PCLK / 128"] - pub const DIV128: Self = Self(0x06); - #[doc = "f_PCLK / 256"] - pub const DIV256: Self = Self(0x07); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Dff(pub u8); - impl Dff { - #[doc = "8-bit data frame format is selected for transmission/reception"] - pub const EIGHTBIT: Self = Self(0); - #[doc = "16-bit data frame format is selected for transmission/reception"] - pub const SIXTEENBIT: Self = Self(0x01); - } - } - pub mod regs { - use crate::generic::*; - #[doc = "status register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Sr(pub u32); - impl Sr { - #[doc = "Receive buffer not empty"] - pub const fn rxne(&self) -> bool { - let val = (self.0 >> 0usize) & 0x01; - val != 0 - } - #[doc = "Receive buffer not empty"] - pub fn set_rxne(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize); - } - #[doc = "Transmit buffer empty"] - pub const fn txe(&self) -> bool { - let val = (self.0 >> 1usize) & 0x01; - val != 0 - } - #[doc = "Transmit buffer empty"] - pub fn set_txe(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 1usize)) | (((val as u32) & 0x01) << 1usize); - } - #[doc = "CRC error flag"] - pub const fn crcerr(&self) -> bool { - let val = (self.0 >> 4usize) & 0x01; - val != 0 - } - #[doc = "CRC error flag"] - pub fn set_crcerr(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 4usize)) | (((val as u32) & 0x01) << 4usize); - } - #[doc = "Mode fault"] - pub const fn modf(&self) -> bool { - let val = (self.0 >> 5usize) & 0x01; - val != 0 - } - #[doc = "Mode fault"] - pub fn set_modf(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 5usize)) | (((val as u32) & 0x01) << 5usize); - } - #[doc = "Overrun flag"] - pub const fn ovr(&self) -> bool { - let val = (self.0 >> 6usize) & 0x01; - val != 0 - } - #[doc = "Overrun flag"] - pub fn set_ovr(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 6usize)) | (((val as u32) & 0x01) << 6usize); - } - #[doc = "Busy flag"] - pub const fn bsy(&self) -> bool { - let val = (self.0 >> 7usize) & 0x01; - val != 0 - } - #[doc = "Busy flag"] - pub fn set_bsy(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 7usize)) | (((val as u32) & 0x01) << 7usize); - } - #[doc = "TI frame format error"] - pub const fn fre(&self) -> bool { - let val = (self.0 >> 8usize) & 0x01; - val != 0 - } - #[doc = "TI frame format error"] - pub fn set_fre(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 8usize)) | (((val as u32) & 0x01) << 8usize); - } - } - impl Default for Sr { - fn default() -> Sr { - Sr(0) - } - } - #[doc = "TX CRC register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Txcrcr(pub u32); - impl Txcrcr { - #[doc = "Tx CRC register"] - pub const fn tx_crc(&self) -> u16 { - let val = (self.0 >> 0usize) & 0xffff; - val as u16 - } - #[doc = "Tx CRC register"] - pub fn set_tx_crc(&mut self, val: u16) { - self.0 = (self.0 & !(0xffff << 0usize)) | (((val as u32) & 0xffff) << 0usize); - } - } - impl Default for Txcrcr { - fn default() -> Txcrcr { - Txcrcr(0) - } - } - #[doc = "RX CRC register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Rxcrcr(pub u32); - impl Rxcrcr { - #[doc = "Rx CRC register"] - pub const fn rx_crc(&self) -> u16 { - let val = (self.0 >> 0usize) & 0xffff; - val as u16 - } - #[doc = "Rx CRC register"] - pub fn set_rx_crc(&mut self, val: u16) { - self.0 = (self.0 & !(0xffff << 0usize)) | (((val as u32) & 0xffff) << 0usize); - } - } - impl Default for Rxcrcr { - fn default() -> Rxcrcr { - Rxcrcr(0) - } - } - #[doc = "control register 1"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Cr1(pub u32); - impl Cr1 { - #[doc = "Clock phase"] - pub const fn cpha(&self) -> super::vals::Cpha { - let val = (self.0 >> 0usize) & 0x01; - super::vals::Cpha(val as u8) - } - #[doc = "Clock phase"] - pub fn set_cpha(&mut self, val: super::vals::Cpha) { - self.0 = (self.0 & !(0x01 << 0usize)) | (((val.0 as u32) & 0x01) << 0usize); - } - #[doc = "Clock polarity"] - pub const fn cpol(&self) -> super::vals::Cpol { - let val = (self.0 >> 1usize) & 0x01; - super::vals::Cpol(val as u8) - } - #[doc = "Clock polarity"] - pub fn set_cpol(&mut self, val: super::vals::Cpol) { - self.0 = (self.0 & !(0x01 << 1usize)) | (((val.0 as u32) & 0x01) << 1usize); - } - #[doc = "Master selection"] - pub const fn mstr(&self) -> super::vals::Mstr { - let val = (self.0 >> 2usize) & 0x01; - super::vals::Mstr(val as u8) - } - #[doc = "Master selection"] - pub fn set_mstr(&mut self, val: super::vals::Mstr) { - self.0 = (self.0 & !(0x01 << 2usize)) | (((val.0 as u32) & 0x01) << 2usize); - } - #[doc = "Baud rate control"] - pub const fn br(&self) -> super::vals::Br { - let val = (self.0 >> 3usize) & 0x07; - super::vals::Br(val as u8) - } - #[doc = "Baud rate control"] - pub fn set_br(&mut self, val: super::vals::Br) { - self.0 = (self.0 & !(0x07 << 3usize)) | (((val.0 as u32) & 0x07) << 3usize); - } - #[doc = "SPI enable"] - pub const fn spe(&self) -> bool { - let val = (self.0 >> 6usize) & 0x01; - val != 0 - } - #[doc = "SPI enable"] - pub fn set_spe(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 6usize)) | (((val as u32) & 0x01) << 6usize); - } - #[doc = "Frame format"] - pub const fn lsbfirst(&self) -> super::vals::Lsbfirst { - let val = (self.0 >> 7usize) & 0x01; - super::vals::Lsbfirst(val as u8) - } - #[doc = "Frame format"] - pub fn set_lsbfirst(&mut self, val: super::vals::Lsbfirst) { - self.0 = (self.0 & !(0x01 << 7usize)) | (((val.0 as u32) & 0x01) << 7usize); - } - #[doc = "Internal slave select"] - pub const fn ssi(&self) -> bool { - let val = (self.0 >> 8usize) & 0x01; - val != 0 - } - #[doc = "Internal slave select"] - pub fn set_ssi(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 8usize)) | (((val as u32) & 0x01) << 8usize); - } - #[doc = "Software slave management"] - pub const fn ssm(&self) -> bool { - let val = (self.0 >> 9usize) & 0x01; - val != 0 - } - #[doc = "Software slave management"] - pub fn set_ssm(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 9usize)) | (((val as u32) & 0x01) << 9usize); - } - #[doc = "Receive only"] - pub const fn rxonly(&self) -> super::vals::Rxonly { - let val = (self.0 >> 10usize) & 0x01; - super::vals::Rxonly(val as u8) - } - #[doc = "Receive only"] - pub fn set_rxonly(&mut self, val: super::vals::Rxonly) { - self.0 = (self.0 & !(0x01 << 10usize)) | (((val.0 as u32) & 0x01) << 10usize); - } - #[doc = "Data frame format"] - pub const fn dff(&self) -> super::vals::Dff { - let val = (self.0 >> 11usize) & 0x01; - super::vals::Dff(val as u8) - } - #[doc = "Data frame format"] - pub fn set_dff(&mut self, val: super::vals::Dff) { - self.0 = (self.0 & !(0x01 << 11usize)) | (((val.0 as u32) & 0x01) << 11usize); - } - #[doc = "CRC transfer next"] - pub const fn crcnext(&self) -> super::vals::Crcnext { - let val = (self.0 >> 12usize) & 0x01; - super::vals::Crcnext(val as u8) - } - #[doc = "CRC transfer next"] - pub fn set_crcnext(&mut self, val: super::vals::Crcnext) { - self.0 = (self.0 & !(0x01 << 12usize)) | (((val.0 as u32) & 0x01) << 12usize); - } - #[doc = "Hardware CRC calculation enable"] - pub const fn crcen(&self) -> bool { - let val = (self.0 >> 13usize) & 0x01; - val != 0 - } - #[doc = "Hardware CRC calculation enable"] - pub fn set_crcen(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 13usize)) | (((val as u32) & 0x01) << 13usize); - } - #[doc = "Output enable in bidirectional mode"] - pub const fn bidioe(&self) -> super::vals::Bidioe { - let val = (self.0 >> 14usize) & 0x01; - super::vals::Bidioe(val as u8) - } - #[doc = "Output enable in bidirectional mode"] - pub fn set_bidioe(&mut self, val: super::vals::Bidioe) { - self.0 = (self.0 & !(0x01 << 14usize)) | (((val.0 as u32) & 0x01) << 14usize); - } - #[doc = "Bidirectional data mode enable"] - pub const fn bidimode(&self) -> super::vals::Bidimode { - let val = (self.0 >> 15usize) & 0x01; - super::vals::Bidimode(val as u8) - } - #[doc = "Bidirectional data mode enable"] - pub fn set_bidimode(&mut self, val: super::vals::Bidimode) { - self.0 = (self.0 & !(0x01 << 15usize)) | (((val.0 as u32) & 0x01) << 15usize); - } - } - impl Default for Cr1 { - fn default() -> Cr1 { - Cr1(0) - } - } - #[doc = "data register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Dr(pub u32); - impl Dr { - #[doc = "Data register"] - pub const fn dr(&self) -> u16 { - let val = (self.0 >> 0usize) & 0xffff; - val as u16 - } - #[doc = "Data register"] - pub fn set_dr(&mut self, val: u16) { - self.0 = (self.0 & !(0xffff << 0usize)) | (((val as u32) & 0xffff) << 0usize); - } - } - impl Default for Dr { - fn default() -> Dr { - Dr(0) - } - } - #[doc = "control register 2"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Cr2(pub u32); - impl Cr2 { - #[doc = "Rx buffer DMA enable"] - pub const fn rxdmaen(&self) -> bool { - let val = (self.0 >> 0usize) & 0x01; - val != 0 - } - #[doc = "Rx buffer DMA enable"] - pub fn set_rxdmaen(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize); - } - #[doc = "Tx buffer DMA enable"] - pub const fn txdmaen(&self) -> bool { - let val = (self.0 >> 1usize) & 0x01; - val != 0 - } - #[doc = "Tx buffer DMA enable"] - pub fn set_txdmaen(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 1usize)) | (((val as u32) & 0x01) << 1usize); - } - #[doc = "SS output enable"] - pub const fn ssoe(&self) -> bool { - let val = (self.0 >> 2usize) & 0x01; - val != 0 - } - #[doc = "SS output enable"] - pub fn set_ssoe(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 2usize)) | (((val as u32) & 0x01) << 2usize); - } - #[doc = "Frame format"] - pub const fn frf(&self) -> super::vals::Frf { - let val = (self.0 >> 4usize) & 0x01; - super::vals::Frf(val as u8) - } - #[doc = "Frame format"] - pub fn set_frf(&mut self, val: super::vals::Frf) { - self.0 = (self.0 & !(0x01 << 4usize)) | (((val.0 as u32) & 0x01) << 4usize); - } - #[doc = "Error interrupt enable"] - pub const fn errie(&self) -> bool { - let val = (self.0 >> 5usize) & 0x01; - val != 0 - } - #[doc = "Error interrupt enable"] - pub fn set_errie(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 5usize)) | (((val as u32) & 0x01) << 5usize); - } - #[doc = "RX buffer not empty interrupt enable"] - pub const fn rxneie(&self) -> bool { - let val = (self.0 >> 6usize) & 0x01; - val != 0 - } - #[doc = "RX buffer not empty interrupt enable"] - pub fn set_rxneie(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 6usize)) | (((val as u32) & 0x01) << 6usize); - } - #[doc = "Tx buffer empty interrupt enable"] - pub const fn txeie(&self) -> bool { - let val = (self.0 >> 7usize) & 0x01; - val != 0 - } - #[doc = "Tx buffer empty interrupt enable"] - pub fn set_txeie(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 7usize)) | (((val as u32) & 0x01) << 7usize); - } - } - impl Default for Cr2 { - fn default() -> Cr2 { - Cr2(0) - } - } - #[doc = "CRC polynomial register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Crcpr(pub u32); - impl Crcpr { - #[doc = "CRC polynomial register"] - pub const fn crcpoly(&self) -> u16 { - let val = (self.0 >> 0usize) & 0xffff; - val as u16 - } - #[doc = "CRC polynomial register"] - pub fn set_crcpoly(&mut self, val: u16) { - self.0 = (self.0 & !(0xffff << 0usize)) | (((val as u32) & 0xffff) << 0usize); - } - } - impl Default for Crcpr { - fn default() -> Crcpr { - Crcpr(0) + impl Default for Cccsr { + fn default() -> Cccsr { + Cccsr(0) } } } @@ -5637,190 +960,6 @@ pub mod sdmmc_v2 { } pub mod regs { use crate::generic::*; - #[doc = "The SDMMC_DCTRL register control the data path state machine (DPSM)."] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Dctrl(pub u32); - impl Dctrl { - #[doc = "Data transfer enable bit This bit can only be written by firmware when DPSM is inactive (DPSMACT = 0). This bit is cleared by Hardware when data transfer completes. This bit shall only be used to transfer data when no associated data transfer command is used, i.e. shall not be used with SD or eMMC cards."] - pub const fn dten(&self) -> bool { - let val = (self.0 >> 0usize) & 0x01; - val != 0 - } - #[doc = "Data transfer enable bit This bit can only be written by firmware when DPSM is inactive (DPSMACT = 0). This bit is cleared by Hardware when data transfer completes. This bit shall only be used to transfer data when no associated data transfer command is used, i.e. shall not be used with SD or eMMC cards."] - pub fn set_dten(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize); - } - #[doc = "Data transfer direction selection This bit can only be written by firmware when DPSM is inactive (DPSMACT = 0)."] - pub const fn dtdir(&self) -> bool { - let val = (self.0 >> 1usize) & 0x01; - val != 0 - } - #[doc = "Data transfer direction selection This bit can only be written by firmware when DPSM is inactive (DPSMACT = 0)."] - pub fn set_dtdir(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 1usize)) | (((val as u32) & 0x01) << 1usize); - } - #[doc = "Data transfer mode selection. This bit can only be written by firmware when DPSM is inactive (DPSMACT = 0)."] - pub const fn dtmode(&self) -> u8 { - let val = (self.0 >> 2usize) & 0x03; - val as u8 - } - #[doc = "Data transfer mode selection. This bit can only be written by firmware when DPSM is inactive (DPSMACT = 0)."] - pub fn set_dtmode(&mut self, val: u8) { - self.0 = (self.0 & !(0x03 << 2usize)) | (((val as u32) & 0x03) << 2usize); - } - #[doc = "Data block size This bit can only be written by firmware when DPSM is inactive (DPSMACT = 0). Define the data block length when the block data transfer mode is selected: When DATALENGTH is not a multiple of DBLOCKSIZE, the transfered data is truncated at a multiple of DBLOCKSIZE. (Any remain data will not be transfered.) When DDR = 1, DBLOCKSIZE = 0000 shall not be used. (No data will be transfered)"] - pub const fn dblocksize(&self) -> u8 { - let val = (self.0 >> 4usize) & 0x0f; - val as u8 - } - #[doc = "Data block size This bit can only be written by firmware when DPSM is inactive (DPSMACT = 0). Define the data block length when the block data transfer mode is selected: When DATALENGTH is not a multiple of DBLOCKSIZE, the transfered data is truncated at a multiple of DBLOCKSIZE. (Any remain data will not be transfered.) When DDR = 1, DBLOCKSIZE = 0000 shall not be used. (No data will be transfered)"] - pub fn set_dblocksize(&mut self, val: u8) { - self.0 = (self.0 & !(0x0f << 4usize)) | (((val as u32) & 0x0f) << 4usize); - } - #[doc = "Read wait start. If this bit is set, read wait operation starts."] - pub const fn rwstart(&self) -> bool { - let val = (self.0 >> 8usize) & 0x01; - val != 0 - } - #[doc = "Read wait start. If this bit is set, read wait operation starts."] - pub fn set_rwstart(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 8usize)) | (((val as u32) & 0x01) << 8usize); - } - #[doc = "Read wait stop This bit is written by firmware and auto cleared by hardware when the DPSM moves from the READ_WAIT state to the WAIT_R or IDLE state."] - pub const fn rwstop(&self) -> bool { - let val = (self.0 >> 9usize) & 0x01; - val != 0 - } - #[doc = "Read wait stop This bit is written by firmware and auto cleared by hardware when the DPSM moves from the READ_WAIT state to the WAIT_R or IDLE state."] - pub fn set_rwstop(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 9usize)) | (((val as u32) & 0x01) << 9usize); - } - #[doc = "Read wait mode. This bit can only be written by firmware when DPSM is inactive (DPSMACT = 0)."] - pub const fn rwmod(&self) -> bool { - let val = (self.0 >> 10usize) & 0x01; - val != 0 - } - #[doc = "Read wait mode. This bit can only be written by firmware when DPSM is inactive (DPSMACT = 0)."] - pub fn set_rwmod(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 10usize)) | (((val as u32) & 0x01) << 10usize); - } - #[doc = "SD I/O interrupt enable functions This bit can only be written by firmware when DPSM is inactive (DPSMACT = 0). If this bit is set, the DPSM enables the SD I/O card specific interrupt operation."] - pub const fn sdioen(&self) -> bool { - let val = (self.0 >> 11usize) & 0x01; - val != 0 - } - #[doc = "SD I/O interrupt enable functions This bit can only be written by firmware when DPSM is inactive (DPSMACT = 0). If this bit is set, the DPSM enables the SD I/O card specific interrupt operation."] - pub fn set_sdioen(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 11usize)) | (((val as u32) & 0x01) << 11usize); - } - #[doc = "Enable the reception of the boot acknowledgment. This bit can only be written by firmware when DPSM is inactive (DPSMACT = 0)."] - pub const fn bootacken(&self) -> bool { - let val = (self.0 >> 12usize) & 0x01; - val != 0 - } - #[doc = "Enable the reception of the boot acknowledgment. This bit can only be written by firmware when DPSM is inactive (DPSMACT = 0)."] - pub fn set_bootacken(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 12usize)) | (((val as u32) & 0x01) << 12usize); - } - #[doc = "FIFO reset, will flush any remaining data. This bit can only be written by firmware when IDMAEN= 0 and DPSM is active (DPSMACT = 1). This bit will only take effect when a transfer error or transfer hold occurs."] - pub const fn fiforst(&self) -> bool { - let val = (self.0 >> 13usize) & 0x01; - val != 0 - } - #[doc = "FIFO reset, will flush any remaining data. This bit can only be written by firmware when IDMAEN= 0 and DPSM is active (DPSMACT = 1). This bit will only take effect when a transfer error or transfer hold occurs."] - pub fn set_fiforst(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 13usize)) | (((val as u32) & 0x01) << 13usize); - } - } - impl Default for Dctrl { - fn default() -> Dctrl { - Dctrl(0) - } - } - #[doc = "The SDMMC_CLKCR register controls the SDMMC_CK output clock, the SDMMC_RX_CLK receive clock, and the bus width."] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Clkcr(pub u32); - impl Clkcr { - #[doc = "Clock divide factor This bit can only be written when the CPSM and DPSM are not active (CPSMACT = 0 and DPSMACT = 0). This field defines the divide factor between the input clock (SDMMCCLK) and the output clock (SDMMC_CK): SDMMC_CK frequency = SDMMCCLK / [2 * CLKDIV]. 0xx: etc.. xxx: etc.."] - pub const fn clkdiv(&self) -> u16 { - let val = (self.0 >> 0usize) & 0x03ff; - val as u16 - } - #[doc = "Clock divide factor This bit can only be written when the CPSM and DPSM are not active (CPSMACT = 0 and DPSMACT = 0). This field defines the divide factor between the input clock (SDMMCCLK) and the output clock (SDMMC_CK): SDMMC_CK frequency = SDMMCCLK / [2 * CLKDIV]. 0xx: etc.. xxx: etc.."] - pub fn set_clkdiv(&mut self, val: u16) { - self.0 = (self.0 & !(0x03ff << 0usize)) | (((val as u32) & 0x03ff) << 0usize); - } - #[doc = "Power saving configuration bit This bit can only be written when the CPSM and DPSM are not active (CPSMACT = 0 and DPSMACT = 0) For power saving, the SDMMC_CK clock output can be disabled when the bus is idle by setting PWRSAV:"] - pub const fn pwrsav(&self) -> bool { - let val = (self.0 >> 12usize) & 0x01; - val != 0 - } - #[doc = "Power saving configuration bit This bit can only be written when the CPSM and DPSM are not active (CPSMACT = 0 and DPSMACT = 0) For power saving, the SDMMC_CK clock output can be disabled when the bus is idle by setting PWRSAV:"] - pub fn set_pwrsav(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 12usize)) | (((val as u32) & 0x01) << 12usize); - } - #[doc = "Wide bus mode enable bit This bit can only be written when the CPSM and DPSM are not active (CPSMACT = 0 and DPSMACT = 0)"] - pub const fn widbus(&self) -> u8 { - let val = (self.0 >> 14usize) & 0x03; - val as u8 - } - #[doc = "Wide bus mode enable bit This bit can only be written when the CPSM and DPSM are not active (CPSMACT = 0 and DPSMACT = 0)"] - pub fn set_widbus(&mut self, val: u8) { - self.0 = (self.0 & !(0x03 << 14usize)) | (((val as u32) & 0x03) << 14usize); - } - #[doc = "SDMMC_CK dephasing selection bit for data and Command. This bit can only be written when the CPSM and DPSM are not active (CPSMACT = 0 and DPSMACT = 0). When clock division = 1 (CLKDIV = 0), this bit has no effect. Data and Command change on SDMMC_CK falling edge. When clock division >1 (CLKDIV > 0) & DDR = 0: - SDMMC_CK edge occurs on SDMMCCLK rising edge. When clock division >1 (CLKDIV > 0) & DDR = 1: - Data changed on the SDMMCCLK falling edge succeeding a SDMMC_CK edge. - SDMMC_CK edge occurs on SDMMCCLK rising edge. - Data changed on the SDMMC_CK falling edge succeeding a SDMMC_CK edge. - SDMMC_CK edge occurs on SDMMCCLK rising edge."] - pub const fn negedge(&self) -> bool { - let val = (self.0 >> 16usize) & 0x01; - val != 0 - } - #[doc = "SDMMC_CK dephasing selection bit for data and Command. This bit can only be written when the CPSM and DPSM are not active (CPSMACT = 0 and DPSMACT = 0). When clock division = 1 (CLKDIV = 0), this bit has no effect. Data and Command change on SDMMC_CK falling edge. When clock division >1 (CLKDIV > 0) & DDR = 0: - SDMMC_CK edge occurs on SDMMCCLK rising edge. When clock division >1 (CLKDIV > 0) & DDR = 1: - Data changed on the SDMMCCLK falling edge succeeding a SDMMC_CK edge. - SDMMC_CK edge occurs on SDMMCCLK rising edge. - Data changed on the SDMMC_CK falling edge succeeding a SDMMC_CK edge. - SDMMC_CK edge occurs on SDMMCCLK rising edge."] - pub fn set_negedge(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 16usize)) | (((val as u32) & 0x01) << 16usize); - } - #[doc = "Hardware flow control enable This bit can only be written when the CPSM and DPSM are not active (CPSMACT = 0 and DPSMACT = 0) When Hardware flow control is enabled, the meaning of the TXFIFOE and RXFIFOF flags change, please see SDMMC status register definition in Section56.8.11."] - pub const fn hwfc_en(&self) -> bool { - let val = (self.0 >> 17usize) & 0x01; - val != 0 - } - #[doc = "Hardware flow control enable This bit can only be written when the CPSM and DPSM are not active (CPSMACT = 0 and DPSMACT = 0) When Hardware flow control is enabled, the meaning of the TXFIFOE and RXFIFOF flags change, please see SDMMC status register definition in Section56.8.11."] - pub fn set_hwfc_en(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 17usize)) | (((val as u32) & 0x01) << 17usize); - } - #[doc = "Data rate signaling selection This bit can only be written when the CPSM and DPSM are not active (CPSMACT = 0 and DPSMACT = 0) DDR rate shall only be selected with 4-bit or 8-bit wide bus mode. (WIDBUS > 00). DDR = 1 has no effect when WIDBUS = 00 (1-bit wide bus). DDR rate shall only be selected with clock division >1. (CLKDIV > 0)"] - pub const fn ddr(&self) -> bool { - let val = (self.0 >> 18usize) & 0x01; - val != 0 - } - #[doc = "Data rate signaling selection This bit can only be written when the CPSM and DPSM are not active (CPSMACT = 0 and DPSMACT = 0) DDR rate shall only be selected with 4-bit or 8-bit wide bus mode. (WIDBUS > 00). DDR = 1 has no effect when WIDBUS = 00 (1-bit wide bus). DDR rate shall only be selected with clock division >1. (CLKDIV > 0)"] - pub fn set_ddr(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 18usize)) | (((val as u32) & 0x01) << 18usize); - } - #[doc = "Bus speed mode selection between DS, HS, SDR12, SDR25 and SDR50, DDR50, SDR104. This bit can only be written when the CPSM and DPSM are not active (CPSMACT = 0 and DPSMACT = 0)"] - pub const fn busspeed(&self) -> bool { - let val = (self.0 >> 19usize) & 0x01; - val != 0 - } - #[doc = "Bus speed mode selection between DS, HS, SDR12, SDR25 and SDR50, DDR50, SDR104. This bit can only be written when the CPSM and DPSM are not active (CPSMACT = 0 and DPSMACT = 0)"] - pub fn set_busspeed(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 19usize)) | (((val as u32) & 0x01) << 19usize); - } - #[doc = "Receive clock selection. These bits can only be written when the CPSM and DPSM are not active (CPSMACT = 0 and DPSMACT = 0)"] - pub const fn selclkrx(&self) -> u8 { - let val = (self.0 >> 20usize) & 0x03; - val as u8 - } - #[doc = "Receive clock selection. These bits can only be written when the CPSM and DPSM are not active (CPSMACT = 0 and DPSMACT = 0)"] - pub fn set_selclkrx(&mut self, val: u8) { - self.0 = (self.0 & !(0x03 << 20usize)) | (((val as u32) & 0x03) << 20usize); - } - } - impl Default for Clkcr { - fn default() -> Clkcr { - Clkcr(0) - } - } #[doc = "The SDMMC_RESP1/2/3/4R registers contain the status of a card, which is part of the received response."] #[repr(transparent)] #[derive(Copy, Clone, Eq, PartialEq)] @@ -5842,27 +981,6 @@ pub mod sdmmc_v2 { Resp4r(0) } } - #[doc = "The SDMMC_DLENR register contains the number of data bytes to be transferred. The value is loaded into the data counter when data transfer starts."] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Dlenr(pub u32); - impl Dlenr { - #[doc = "Data length value This register can only be written by firmware when DPSM is inactive (DPSMACT = 0). Number of data bytes to be transferred. When DDR = 1 DATALENGTH is truncated to a multiple of 2. (The last odd byte is not transfered) When DATALENGTH = 0 no data will be transfered, when requested by a CPSMEN and CMDTRANS = 1 also no command will be transfered. DTEN and CPSMEN are cleared to 0."] - pub const fn datalength(&self) -> u32 { - let val = (self.0 >> 0usize) & 0x01ff_ffff; - val as u32 - } - #[doc = "Data length value This register can only be written by firmware when DPSM is inactive (DPSMACT = 0). Number of data bytes to be transferred. When DDR = 1 DATALENGTH is truncated to a multiple of 2. (The last odd byte is not transfered) When DATALENGTH = 0 no data will be transfered, when requested by a CPSMEN and CMDTRANS = 1 also no command will be transfered. DTEN and CPSMEN are cleared to 0."] - pub fn set_datalength(&mut self, val: u32) { - self.0 = - (self.0 & !(0x01ff_ffff << 0usize)) | (((val as u32) & 0x01ff_ffff) << 0usize); - } - } - impl Default for Dlenr { - fn default() -> Dlenr { - Dlenr(0) - } - } #[doc = "The SDMMC_STAR register is a read-only register. It contains two types of flag:Static flags (bits [29,21,11:0]): these bits remain asserted until they are cleared by writing to the SDMMC interrupt Clear register (see SDMMC_ICR)Dynamic flags (bits [20:12]): these bits change state depending on the state of the underlying logic (for example, FIFO full and empty flags are asserted and de-asserted as data while written to the FIFO)"] #[repr(transparent)] #[derive(Copy, Clone, Eq, PartialEq)] @@ -6135,27 +1253,51 @@ pub mod sdmmc_v2 { Star(0) } } - #[doc = "The SDMMC_IDMABASE0R register contains the memory buffer base address in single buffer configuration and the buffer 0 base address in double buffer configuration."] + #[doc = "SDMMC power control register"] #[repr(transparent)] #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Idmabase0r(pub u32); - impl Idmabase0r { - #[doc = "Buffer 0 memory base address bits [31:2], shall be word aligned (bit [1:0] -are always 0 and read only). This register can be written by firmware when DPSM is inactive (DPSMACT = 0), and can dynamically be written by firmware when DPSM active (DPSMACT = 1) and memory buffer 0 is inactive (IDMABACT = 1)."] - pub const fn idmabase0(&self) -> u32 { - let val = (self.0 >> 0usize) & 0xffff_ffff; - val as u32 + pub struct Power(pub u32); + impl Power { + #[doc = "SDMMC state control bits. These bits can only be written when the SDMMC is not in the power-on state (PWRCTRL?11). These bits are used to define the functional state of the SDMMC signals: Any further write will be ignored, PWRCTRL value will keep 11."] + pub const fn pwrctrl(&self) -> u8 { + let val = (self.0 >> 0usize) & 0x03; + val as u8 } - #[doc = "Buffer 0 memory base address bits [31:2], shall be word aligned (bit [1:0] -are always 0 and read only). This register can be written by firmware when DPSM is inactive (DPSMACT = 0), and can dynamically be written by firmware when DPSM active (DPSMACT = 1) and memory buffer 0 is inactive (IDMABACT = 1)."] - pub fn set_idmabase0(&mut self, val: u32) { - self.0 = - (self.0 & !(0xffff_ffff << 0usize)) | (((val as u32) & 0xffff_ffff) << 0usize); + #[doc = "SDMMC state control bits. These bits can only be written when the SDMMC is not in the power-on state (PWRCTRL?11). These bits are used to define the functional state of the SDMMC signals: Any further write will be ignored, PWRCTRL value will keep 11."] + pub fn set_pwrctrl(&mut self, val: u8) { + self.0 = (self.0 & !(0x03 << 0usize)) | (((val as u32) & 0x03) << 0usize); + } + #[doc = "Voltage switch sequence start. This bit is used to start the timing critical section of the voltage switch sequence:"] + pub const fn vswitch(&self) -> bool { + let val = (self.0 >> 2usize) & 0x01; + val != 0 + } + #[doc = "Voltage switch sequence start. This bit is used to start the timing critical section of the voltage switch sequence:"] + pub fn set_vswitch(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 2usize)) | (((val as u32) & 0x01) << 2usize); + } + #[doc = "Voltage switch procedure enable. This bit can only be written by firmware when CPSM is disabled (CPSMEN = 0). This bit is used to stop the SDMMC_CK after the voltage switch command response:"] + pub const fn vswitchen(&self) -> bool { + let val = (self.0 >> 3usize) & 0x01; + val != 0 + } + #[doc = "Voltage switch procedure enable. This bit can only be written by firmware when CPSM is disabled (CPSMEN = 0). This bit is used to stop the SDMMC_CK after the voltage switch command response:"] + pub fn set_vswitchen(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 3usize)) | (((val as u32) & 0x01) << 3usize); + } + #[doc = "Data and command direction signals polarity selection. This bit can only be written when the SDMMC is in the power-off state (PWRCTRL = 00)."] + pub const fn dirpol(&self) -> bool { + let val = (self.0 >> 4usize) & 0x01; + val != 0 + } + #[doc = "Data and command direction signals polarity selection. This bit can only be written when the SDMMC is in the power-off state (PWRCTRL = 00)."] + pub fn set_dirpol(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 4usize)) | (((val as u32) & 0x01) << 4usize); } } - impl Default for Idmabase0r { - fn default() -> Idmabase0r { - Idmabase0r(0) + impl Default for Power { + fn default() -> Power { + Power(0) } } #[doc = "The SDMMC_RESP1/2/3/4R registers contain the status of a card, which is part of the received response."] @@ -6179,236 +1321,27 @@ are always 0 and read only). This register can be written by firmware when DPSM Resp1r(0) } } - #[doc = "SDMMC command response register"] + #[doc = "The SDMMC_IDMABASE0R register contains the memory buffer base address in single buffer configuration and the buffer 0 base address in double buffer configuration."] #[repr(transparent)] #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Respcmdr(pub u32); - impl Respcmdr { - #[doc = "Response command index"] - pub const fn respcmd(&self) -> u8 { - let val = (self.0 >> 0usize) & 0x3f; - val as u8 - } - #[doc = "Response command index"] - pub fn set_respcmd(&mut self, val: u8) { - self.0 = (self.0 & !(0x3f << 0usize)) | (((val as u32) & 0x3f) << 0usize); - } - } - impl Default for Respcmdr { - fn default() -> Respcmdr { - Respcmdr(0) - } - } - #[doc = "The SDMMC_DTIMER register contains the data timeout period, in card bus clock periods. A counter loads the value from the SDMMC_DTIMER register, and starts decrementing when the data path state machine (DPSM) enters the Wait_R or Busy state. If the timer reaches 0 while the DPSM is in either of these states, the timeout status flag is set."] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Dtimer(pub u32); - impl Dtimer { - #[doc = "Data and R1b busy timeout period This bit can only be written when the CPSM and DPSM are not active (CPSMACT = 0 and DPSMACT = 0). Data and R1b busy timeout period expressed in card bus clock periods."] - pub const fn datatime(&self) -> u32 { + pub struct Idmabase0r(pub u32); + impl Idmabase0r { + #[doc = "Buffer 0 memory base address bits [31:2], shall be word aligned (bit [1:0] +are always 0 and read only). This register can be written by firmware when DPSM is inactive (DPSMACT = 0), and can dynamically be written by firmware when DPSM active (DPSMACT = 1) and memory buffer 0 is inactive (IDMABACT = 1)."] + pub const fn idmabase0(&self) -> u32 { let val = (self.0 >> 0usize) & 0xffff_ffff; val as u32 } - #[doc = "Data and R1b busy timeout period This bit can only be written when the CPSM and DPSM are not active (CPSMACT = 0 and DPSMACT = 0). Data and R1b busy timeout period expressed in card bus clock periods."] - pub fn set_datatime(&mut self, val: u32) { + #[doc = "Buffer 0 memory base address bits [31:2], shall be word aligned (bit [1:0] +are always 0 and read only). This register can be written by firmware when DPSM is inactive (DPSMACT = 0), and can dynamically be written by firmware when DPSM active (DPSMACT = 1) and memory buffer 0 is inactive (IDMABACT = 1)."] + pub fn set_idmabase0(&mut self, val: u32) { self.0 = (self.0 & !(0xffff_ffff << 0usize)) | (((val as u32) & 0xffff_ffff) << 0usize); } } - impl Default for Dtimer { - fn default() -> Dtimer { - Dtimer(0) - } - } - #[doc = "The SDMMC_ICR register is a write-only register. Writing a bit with 1 clears the corresponding bit in the SDMMC_STAR status register."] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Icr(pub u32); - impl Icr { - #[doc = "CCRCFAIL flag clear bit Set by software to clear the CCRCFAIL flag."] - pub const fn ccrcfailc(&self) -> bool { - let val = (self.0 >> 0usize) & 0x01; - val != 0 - } - #[doc = "CCRCFAIL flag clear bit Set by software to clear the CCRCFAIL flag."] - pub fn set_ccrcfailc(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize); - } - #[doc = "DCRCFAIL flag clear bit Set by software to clear the DCRCFAIL flag."] - pub const fn dcrcfailc(&self) -> bool { - let val = (self.0 >> 1usize) & 0x01; - val != 0 - } - #[doc = "DCRCFAIL flag clear bit Set by software to clear the DCRCFAIL flag."] - pub fn set_dcrcfailc(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 1usize)) | (((val as u32) & 0x01) << 1usize); - } - #[doc = "CTIMEOUT flag clear bit Set by software to clear the CTIMEOUT flag."] - pub const fn ctimeoutc(&self) -> bool { - let val = (self.0 >> 2usize) & 0x01; - val != 0 - } - #[doc = "CTIMEOUT flag clear bit Set by software to clear the CTIMEOUT flag."] - pub fn set_ctimeoutc(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 2usize)) | (((val as u32) & 0x01) << 2usize); - } - #[doc = "DTIMEOUT flag clear bit Set by software to clear the DTIMEOUT flag."] - pub const fn dtimeoutc(&self) -> bool { - let val = (self.0 >> 3usize) & 0x01; - val != 0 - } - #[doc = "DTIMEOUT flag clear bit Set by software to clear the DTIMEOUT flag."] - pub fn set_dtimeoutc(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 3usize)) | (((val as u32) & 0x01) << 3usize); - } - #[doc = "TXUNDERR flag clear bit Set by software to clear TXUNDERR flag."] - pub const fn txunderrc(&self) -> bool { - let val = (self.0 >> 4usize) & 0x01; - val != 0 - } - #[doc = "TXUNDERR flag clear bit Set by software to clear TXUNDERR flag."] - pub fn set_txunderrc(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 4usize)) | (((val as u32) & 0x01) << 4usize); - } - #[doc = "RXOVERR flag clear bit Set by software to clear the RXOVERR flag."] - pub const fn rxoverrc(&self) -> bool { - let val = (self.0 >> 5usize) & 0x01; - val != 0 - } - #[doc = "RXOVERR flag clear bit Set by software to clear the RXOVERR flag."] - pub fn set_rxoverrc(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 5usize)) | (((val as u32) & 0x01) << 5usize); - } - #[doc = "CMDREND flag clear bit Set by software to clear the CMDREND flag."] - pub const fn cmdrendc(&self) -> bool { - let val = (self.0 >> 6usize) & 0x01; - val != 0 - } - #[doc = "CMDREND flag clear bit Set by software to clear the CMDREND flag."] - pub fn set_cmdrendc(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 6usize)) | (((val as u32) & 0x01) << 6usize); - } - #[doc = "CMDSENT flag clear bit Set by software to clear the CMDSENT flag."] - pub const fn cmdsentc(&self) -> bool { - let val = (self.0 >> 7usize) & 0x01; - val != 0 - } - #[doc = "CMDSENT flag clear bit Set by software to clear the CMDSENT flag."] - pub fn set_cmdsentc(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 7usize)) | (((val as u32) & 0x01) << 7usize); - } - #[doc = "DATAEND flag clear bit Set by software to clear the DATAEND flag."] - pub const fn dataendc(&self) -> bool { - let val = (self.0 >> 8usize) & 0x01; - val != 0 - } - #[doc = "DATAEND flag clear bit Set by software to clear the DATAEND flag."] - pub fn set_dataendc(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 8usize)) | (((val as u32) & 0x01) << 8usize); - } - #[doc = "DHOLD flag clear bit Set by software to clear the DHOLD flag."] - pub const fn dholdc(&self) -> bool { - let val = (self.0 >> 9usize) & 0x01; - val != 0 - } - #[doc = "DHOLD flag clear bit Set by software to clear the DHOLD flag."] - pub fn set_dholdc(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 9usize)) | (((val as u32) & 0x01) << 9usize); - } - #[doc = "DBCKEND flag clear bit Set by software to clear the DBCKEND flag."] - pub const fn dbckendc(&self) -> bool { - let val = (self.0 >> 10usize) & 0x01; - val != 0 - } - #[doc = "DBCKEND flag clear bit Set by software to clear the DBCKEND flag."] - pub fn set_dbckendc(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 10usize)) | (((val as u32) & 0x01) << 10usize); - } - #[doc = "DABORT flag clear bit Set by software to clear the DABORT flag."] - pub const fn dabortc(&self) -> bool { - let val = (self.0 >> 11usize) & 0x01; - val != 0 - } - #[doc = "DABORT flag clear bit Set by software to clear the DABORT flag."] - pub fn set_dabortc(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 11usize)) | (((val as u32) & 0x01) << 11usize); - } - #[doc = "BUSYD0END flag clear bit Set by software to clear the BUSYD0END flag."] - pub const fn busyd0endc(&self) -> bool { - let val = (self.0 >> 21usize) & 0x01; - val != 0 - } - #[doc = "BUSYD0END flag clear bit Set by software to clear the BUSYD0END flag."] - pub fn set_busyd0endc(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 21usize)) | (((val as u32) & 0x01) << 21usize); - } - #[doc = "SDIOIT flag clear bit Set by software to clear the SDIOIT flag."] - pub const fn sdioitc(&self) -> bool { - let val = (self.0 >> 22usize) & 0x01; - val != 0 - } - #[doc = "SDIOIT flag clear bit Set by software to clear the SDIOIT flag."] - pub fn set_sdioitc(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 22usize)) | (((val as u32) & 0x01) << 22usize); - } - #[doc = "ACKFAIL flag clear bit Set by software to clear the ACKFAIL flag."] - pub const fn ackfailc(&self) -> bool { - let val = (self.0 >> 23usize) & 0x01; - val != 0 - } - #[doc = "ACKFAIL flag clear bit Set by software to clear the ACKFAIL flag."] - pub fn set_ackfailc(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 23usize)) | (((val as u32) & 0x01) << 23usize); - } - #[doc = "ACKTIMEOUT flag clear bit Set by software to clear the ACKTIMEOUT flag."] - pub const fn acktimeoutc(&self) -> bool { - let val = (self.0 >> 24usize) & 0x01; - val != 0 - } - #[doc = "ACKTIMEOUT flag clear bit Set by software to clear the ACKTIMEOUT flag."] - pub fn set_acktimeoutc(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 24usize)) | (((val as u32) & 0x01) << 24usize); - } - #[doc = "VSWEND flag clear bit Set by software to clear the VSWEND flag."] - pub const fn vswendc(&self) -> bool { - let val = (self.0 >> 25usize) & 0x01; - val != 0 - } - #[doc = "VSWEND flag clear bit Set by software to clear the VSWEND flag."] - pub fn set_vswendc(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 25usize)) | (((val as u32) & 0x01) << 25usize); - } - #[doc = "CKSTOP flag clear bit Set by software to clear the CKSTOP flag."] - pub const fn ckstopc(&self) -> bool { - let val = (self.0 >> 26usize) & 0x01; - val != 0 - } - #[doc = "CKSTOP flag clear bit Set by software to clear the CKSTOP flag."] - pub fn set_ckstopc(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 26usize)) | (((val as u32) & 0x01) << 26usize); - } - #[doc = "IDMA transfer error clear bit Set by software to clear the IDMATE flag."] - pub const fn idmatec(&self) -> bool { - let val = (self.0 >> 27usize) & 0x01; - val != 0 - } - #[doc = "IDMA transfer error clear bit Set by software to clear the IDMATE flag."] - pub fn set_idmatec(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 27usize)) | (((val as u32) & 0x01) << 27usize); - } - #[doc = "IDMA buffer transfer complete clear bit Set by software to clear the IDMABTC flag."] - pub const fn idmabtcc(&self) -> bool { - let val = (self.0 >> 28usize) & 0x01; - val != 0 - } - #[doc = "IDMA buffer transfer complete clear bit Set by software to clear the IDMABTC flag."] - pub fn set_idmabtcc(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 28usize)) | (((val as u32) & 0x01) << 28usize); - } - } - impl Default for Icr { - fn default() -> Icr { - Icr(0) + impl Default for Idmabase0r { + fn default() -> Idmabase0r { + Idmabase0r(0) } } #[doc = "The SDMMC_DCNTR register loads the value from the data length register (see SDMMC_DLENR) when the DPSM moves from the Idle state to the Wait_R or Wait_S state. As data is transferred, the counter decrements the value until it reaches 0. The DPSM then moves to the Idle state and when there has been no error, the data status end flag (DATAEND) is set."] @@ -6432,6 +1365,26 @@ are always 0 and read only). This register can be written by firmware when DPSM Dcntr(0) } } + #[doc = "SDMMC command response register"] + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq)] + pub struct Respcmdr(pub u32); + impl Respcmdr { + #[doc = "Response command index"] + pub const fn respcmd(&self) -> u8 { + let val = (self.0 >> 0usize) & 0x3f; + val as u8 + } + #[doc = "Response command index"] + pub fn set_respcmd(&mut self, val: u8) { + self.0 = (self.0 & !(0x3f << 0usize)) | (((val as u32) & 0x3f) << 0usize); + } + } + impl Default for Respcmdr { + fn default() -> Respcmdr { + Respcmdr(0) + } + } #[doc = "The SDMMC_IDMABSIZER register contains the buffers size when in double buffer configuration."] #[repr(transparent)] #[derive(Copy, Clone, Eq, PartialEq)] @@ -6452,25 +1405,135 @@ are always 0 and read only). This register can be written by firmware when DPSM Idmabsizer(0) } } - #[doc = "SDMMC IP identification register"] + #[doc = "The SDMMC_ARGR register contains a 32-bit command argument, which is sent to a card as part of a command message."] #[repr(transparent)] #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Id(pub u32); - impl Id { - #[doc = "SDMMC IP identification."] - pub const fn ip_id(&self) -> u32 { + pub struct Argr(pub u32); + impl Argr { + #[doc = "Command argument. These bits can only be written by firmware when CPSM is disabled (CPSMEN = 0). Command argument sent to a card as part of a command message. If a command contains an argument, it must be loaded into this register before writing a command to the command register."] + pub const fn cmdarg(&self) -> u32 { let val = (self.0 >> 0usize) & 0xffff_ffff; val as u32 } - #[doc = "SDMMC IP identification."] - pub fn set_ip_id(&mut self, val: u32) { + #[doc = "Command argument. These bits can only be written by firmware when CPSM is disabled (CPSMEN = 0). Command argument sent to a card as part of a command message. If a command contains an argument, it must be loaded into this register before writing a command to the command register."] + pub fn set_cmdarg(&mut self, val: u32) { self.0 = (self.0 & !(0xffff_ffff << 0usize)) | (((val as u32) & 0xffff_ffff) << 0usize); } } - impl Default for Id { - fn default() -> Id { - Id(0) + impl Default for Argr { + fn default() -> Argr { + Argr(0) + } + } + #[doc = "The SDMMC_CMDR register contains the command index and command type bits. The command index is sent to a card as part of a command message. The command type bits control the command path state machine (CPSM)."] + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq)] + pub struct Cmdr(pub u32); + impl Cmdr { + #[doc = "Command index. This bit can only be written by firmware when CPSM is disabled (CPSMEN = 0). The command index is sent to the card as part of a command message."] + pub const fn cmdindex(&self) -> u8 { + let val = (self.0 >> 0usize) & 0x3f; + val as u8 + } + #[doc = "Command index. This bit can only be written by firmware when CPSM is disabled (CPSMEN = 0). The command index is sent to the card as part of a command message."] + pub fn set_cmdindex(&mut self, val: u8) { + self.0 = (self.0 & !(0x3f << 0usize)) | (((val as u32) & 0x3f) << 0usize); + } + #[doc = "The CPSM treats the command as a data transfer command, stops the interrupt period, and signals DataEnable to the DPSM This bit can only be written by firmware when CPSM is disabled (CPSMEN = 0). If this bit is set, the CPSM issues an end of interrupt period and issues DataEnable signal to the DPSM when the command is sent."] + pub const fn cmdtrans(&self) -> bool { + let val = (self.0 >> 6usize) & 0x01; + val != 0 + } + #[doc = "The CPSM treats the command as a data transfer command, stops the interrupt period, and signals DataEnable to the DPSM This bit can only be written by firmware when CPSM is disabled (CPSMEN = 0). If this bit is set, the CPSM issues an end of interrupt period and issues DataEnable signal to the DPSM when the command is sent."] + pub fn set_cmdtrans(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 6usize)) | (((val as u32) & 0x01) << 6usize); + } + #[doc = "The CPSM treats the command as a Stop Transmission command and signals Abort to the DPSM. This bit can only be written by firmware when CPSM is disabled (CPSMEN = 0). If this bit is set, the CPSM issues the Abort signal to the DPSM when the command is sent."] + pub const fn cmdstop(&self) -> bool { + let val = (self.0 >> 7usize) & 0x01; + val != 0 + } + #[doc = "The CPSM treats the command as a Stop Transmission command and signals Abort to the DPSM. This bit can only be written by firmware when CPSM is disabled (CPSMEN = 0). If this bit is set, the CPSM issues the Abort signal to the DPSM when the command is sent."] + pub fn set_cmdstop(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 7usize)) | (((val as u32) & 0x01) << 7usize); + } + #[doc = "Wait for response bits. This bit can only be written by firmware when CPSM is disabled (CPSMEN = 0). They are used to configure whether the CPSM is to wait for a response, and if yes, which kind of response."] + pub const fn waitresp(&self) -> u8 { + let val = (self.0 >> 8usize) & 0x03; + val as u8 + } + #[doc = "Wait for response bits. This bit can only be written by firmware when CPSM is disabled (CPSMEN = 0). They are used to configure whether the CPSM is to wait for a response, and if yes, which kind of response."] + pub fn set_waitresp(&mut self, val: u8) { + self.0 = (self.0 & !(0x03 << 8usize)) | (((val as u32) & 0x03) << 8usize); + } + #[doc = "CPSM waits for interrupt request. If this bit is set, the CPSM disables command timeout and waits for an card interrupt request (Response). If this bit is cleared in the CPSM Wait state, will cause the abort of the interrupt mode."] + pub const fn waitint(&self) -> bool { + let val = (self.0 >> 10usize) & 0x01; + val != 0 + } + #[doc = "CPSM waits for interrupt request. If this bit is set, the CPSM disables command timeout and waits for an card interrupt request (Response). If this bit is cleared in the CPSM Wait state, will cause the abort of the interrupt mode."] + pub fn set_waitint(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 10usize)) | (((val as u32) & 0x01) << 10usize); + } + #[doc = "CPSM Waits for end of data transfer (CmdPend internal signal) from DPSM. This bit when set, the CPSM waits for the end of data transfer trigger before it starts sending a command. WAITPEND is only taken into account when DTMODE = MMC stream data transfer, WIDBUS = 1-bit wide bus mode, DPSMACT = 1 and DTDIR = from host to card."] + pub const fn waitpend(&self) -> bool { + let val = (self.0 >> 11usize) & 0x01; + val != 0 + } + #[doc = "CPSM Waits for end of data transfer (CmdPend internal signal) from DPSM. This bit when set, the CPSM waits for the end of data transfer trigger before it starts sending a command. WAITPEND is only taken into account when DTMODE = MMC stream data transfer, WIDBUS = 1-bit wide bus mode, DPSMACT = 1 and DTDIR = from host to card."] + pub fn set_waitpend(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 11usize)) | (((val as u32) & 0x01) << 11usize); + } + #[doc = "Command path state machine (CPSM) Enable bit This bit is written 1 by firmware, and cleared by hardware when the CPSM enters the Idle state. If this bit is set, the CPSM is enabled. When DTEN = 1, no command will be transfered nor boot procedure will be started. CPSMEN is cleared to 0."] + pub const fn cpsmen(&self) -> bool { + let val = (self.0 >> 12usize) & 0x01; + val != 0 + } + #[doc = "Command path state machine (CPSM) Enable bit This bit is written 1 by firmware, and cleared by hardware when the CPSM enters the Idle state. If this bit is set, the CPSM is enabled. When DTEN = 1, no command will be transfered nor boot procedure will be started. CPSMEN is cleared to 0."] + pub fn set_cpsmen(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 12usize)) | (((val as u32) & 0x01) << 12usize); + } + #[doc = "Hold new data block transmission and reception in the DPSM. If this bit is set, the DPSM will not move from the Wait_S state to the Send state or from the Wait_R state to the Receive state."] + pub const fn dthold(&self) -> bool { + let val = (self.0 >> 13usize) & 0x01; + val != 0 + } + #[doc = "Hold new data block transmission and reception in the DPSM. If this bit is set, the DPSM will not move from the Wait_S state to the Send state or from the Wait_R state to the Receive state."] + pub fn set_dthold(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 13usize)) | (((val as u32) & 0x01) << 13usize); + } + #[doc = "Select the boot mode procedure to be used. This bit can only be written by firmware when CPSM is disabled (CPSMEN = 0)"] + pub const fn bootmode(&self) -> bool { + let val = (self.0 >> 14usize) & 0x01; + val != 0 + } + #[doc = "Select the boot mode procedure to be used. This bit can only be written by firmware when CPSM is disabled (CPSMEN = 0)"] + pub fn set_bootmode(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 14usize)) | (((val as u32) & 0x01) << 14usize); + } + #[doc = "Enable boot mode procedure."] + pub const fn booten(&self) -> bool { + let val = (self.0 >> 15usize) & 0x01; + val != 0 + } + #[doc = "Enable boot mode procedure."] + pub fn set_booten(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 15usize)) | (((val as u32) & 0x01) << 15usize); + } + #[doc = "The CPSM treats the command as a Suspend or Resume command and signals interrupt period start/end. This bit can only be written by firmware when CPSM is disabled (CPSMEN = 0). CMDSUSPEND = 1 and CMDTRANS = 0 Suspend command, start interrupt period when response bit BS=0. CMDSUSPEND = 1 and CMDTRANS = 1 Resume command with data, end interrupt period when response bit DF=1."] + pub const fn cmdsuspend(&self) -> bool { + let val = (self.0 >> 16usize) & 0x01; + val != 0 + } + #[doc = "The CPSM treats the command as a Suspend or Resume command and signals interrupt period start/end. This bit can only be written by firmware when CPSM is disabled (CPSMEN = 0). CMDSUSPEND = 1 and CMDTRANS = 0 Suspend command, start interrupt period when response bit BS=0. CMDSUSPEND = 1 and CMDTRANS = 1 Resume command with data, end interrupt period when response bit DF=1."] + pub fn set_cmdsuspend(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 16usize)) | (((val as u32) & 0x01) << 16usize); + } + } + impl Default for Cmdr { + fn default() -> Cmdr { + Cmdr(0) } } #[doc = "The SDMMC_IDMABASE1R register contains the double buffer configuration second buffer memory base address."] @@ -6496,6 +1559,303 @@ are always 0 and read only). This register can be written by firmware when DPSM Idmabase1r(0) } } + #[doc = "SDMMC IP identification register"] + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq)] + pub struct Id(pub u32); + impl Id { + #[doc = "SDMMC IP identification."] + pub const fn ip_id(&self) -> u32 { + let val = (self.0 >> 0usize) & 0xffff_ffff; + val as u32 + } + #[doc = "SDMMC IP identification."] + pub fn set_ip_id(&mut self, val: u32) { + self.0 = + (self.0 & !(0xffff_ffff << 0usize)) | (((val as u32) & 0xffff_ffff) << 0usize); + } + } + impl Default for Id { + fn default() -> Id { + Id(0) + } + } + #[doc = "The SDMMC_DCTRL register control the data path state machine (DPSM)."] + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq)] + pub struct Dctrl(pub u32); + impl Dctrl { + #[doc = "Data transfer enable bit This bit can only be written by firmware when DPSM is inactive (DPSMACT = 0). This bit is cleared by Hardware when data transfer completes. This bit shall only be used to transfer data when no associated data transfer command is used, i.e. shall not be used with SD or eMMC cards."] + pub const fn dten(&self) -> bool { + let val = (self.0 >> 0usize) & 0x01; + val != 0 + } + #[doc = "Data transfer enable bit This bit can only be written by firmware when DPSM is inactive (DPSMACT = 0). This bit is cleared by Hardware when data transfer completes. This bit shall only be used to transfer data when no associated data transfer command is used, i.e. shall not be used with SD or eMMC cards."] + pub fn set_dten(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize); + } + #[doc = "Data transfer direction selection This bit can only be written by firmware when DPSM is inactive (DPSMACT = 0)."] + pub const fn dtdir(&self) -> bool { + let val = (self.0 >> 1usize) & 0x01; + val != 0 + } + #[doc = "Data transfer direction selection This bit can only be written by firmware when DPSM is inactive (DPSMACT = 0)."] + pub fn set_dtdir(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 1usize)) | (((val as u32) & 0x01) << 1usize); + } + #[doc = "Data transfer mode selection. This bit can only be written by firmware when DPSM is inactive (DPSMACT = 0)."] + pub const fn dtmode(&self) -> u8 { + let val = (self.0 >> 2usize) & 0x03; + val as u8 + } + #[doc = "Data transfer mode selection. This bit can only be written by firmware when DPSM is inactive (DPSMACT = 0)."] + pub fn set_dtmode(&mut self, val: u8) { + self.0 = (self.0 & !(0x03 << 2usize)) | (((val as u32) & 0x03) << 2usize); + } + #[doc = "Data block size This bit can only be written by firmware when DPSM is inactive (DPSMACT = 0). Define the data block length when the block data transfer mode is selected: When DATALENGTH is not a multiple of DBLOCKSIZE, the transfered data is truncated at a multiple of DBLOCKSIZE. (Any remain data will not be transfered.) When DDR = 1, DBLOCKSIZE = 0000 shall not be used. (No data will be transfered)"] + pub const fn dblocksize(&self) -> u8 { + let val = (self.0 >> 4usize) & 0x0f; + val as u8 + } + #[doc = "Data block size This bit can only be written by firmware when DPSM is inactive (DPSMACT = 0). Define the data block length when the block data transfer mode is selected: When DATALENGTH is not a multiple of DBLOCKSIZE, the transfered data is truncated at a multiple of DBLOCKSIZE. (Any remain data will not be transfered.) When DDR = 1, DBLOCKSIZE = 0000 shall not be used. (No data will be transfered)"] + pub fn set_dblocksize(&mut self, val: u8) { + self.0 = (self.0 & !(0x0f << 4usize)) | (((val as u32) & 0x0f) << 4usize); + } + #[doc = "Read wait start. If this bit is set, read wait operation starts."] + pub const fn rwstart(&self) -> bool { + let val = (self.0 >> 8usize) & 0x01; + val != 0 + } + #[doc = "Read wait start. If this bit is set, read wait operation starts."] + pub fn set_rwstart(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 8usize)) | (((val as u32) & 0x01) << 8usize); + } + #[doc = "Read wait stop This bit is written by firmware and auto cleared by hardware when the DPSM moves from the READ_WAIT state to the WAIT_R or IDLE state."] + pub const fn rwstop(&self) -> bool { + let val = (self.0 >> 9usize) & 0x01; + val != 0 + } + #[doc = "Read wait stop This bit is written by firmware and auto cleared by hardware when the DPSM moves from the READ_WAIT state to the WAIT_R or IDLE state."] + pub fn set_rwstop(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 9usize)) | (((val as u32) & 0x01) << 9usize); + } + #[doc = "Read wait mode. This bit can only be written by firmware when DPSM is inactive (DPSMACT = 0)."] + pub const fn rwmod(&self) -> bool { + let val = (self.0 >> 10usize) & 0x01; + val != 0 + } + #[doc = "Read wait mode. This bit can only be written by firmware when DPSM is inactive (DPSMACT = 0)."] + pub fn set_rwmod(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 10usize)) | (((val as u32) & 0x01) << 10usize); + } + #[doc = "SD I/O interrupt enable functions This bit can only be written by firmware when DPSM is inactive (DPSMACT = 0). If this bit is set, the DPSM enables the SD I/O card specific interrupt operation."] + pub const fn sdioen(&self) -> bool { + let val = (self.0 >> 11usize) & 0x01; + val != 0 + } + #[doc = "SD I/O interrupt enable functions This bit can only be written by firmware when DPSM is inactive (DPSMACT = 0). If this bit is set, the DPSM enables the SD I/O card specific interrupt operation."] + pub fn set_sdioen(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 11usize)) | (((val as u32) & 0x01) << 11usize); + } + #[doc = "Enable the reception of the boot acknowledgment. This bit can only be written by firmware when DPSM is inactive (DPSMACT = 0)."] + pub const fn bootacken(&self) -> bool { + let val = (self.0 >> 12usize) & 0x01; + val != 0 + } + #[doc = "Enable the reception of the boot acknowledgment. This bit can only be written by firmware when DPSM is inactive (DPSMACT = 0)."] + pub fn set_bootacken(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 12usize)) | (((val as u32) & 0x01) << 12usize); + } + #[doc = "FIFO reset, will flush any remaining data. This bit can only be written by firmware when IDMAEN= 0 and DPSM is active (DPSMACT = 1). This bit will only take effect when a transfer error or transfer hold occurs."] + pub const fn fiforst(&self) -> bool { + let val = (self.0 >> 13usize) & 0x01; + val != 0 + } + #[doc = "FIFO reset, will flush any remaining data. This bit can only be written by firmware when IDMAEN= 0 and DPSM is active (DPSMACT = 1). This bit will only take effect when a transfer error or transfer hold occurs."] + pub fn set_fiforst(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 13usize)) | (((val as u32) & 0x01) << 13usize); + } + } + impl Default for Dctrl { + fn default() -> Dctrl { + Dctrl(0) + } + } + #[doc = "The SDMMC_DLENR register contains the number of data bytes to be transferred. The value is loaded into the data counter when data transfer starts."] + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq)] + pub struct Dlenr(pub u32); + impl Dlenr { + #[doc = "Data length value This register can only be written by firmware when DPSM is inactive (DPSMACT = 0). Number of data bytes to be transferred. When DDR = 1 DATALENGTH is truncated to a multiple of 2. (The last odd byte is not transfered) When DATALENGTH = 0 no data will be transfered, when requested by a CPSMEN and CMDTRANS = 1 also no command will be transfered. DTEN and CPSMEN are cleared to 0."] + pub const fn datalength(&self) -> u32 { + let val = (self.0 >> 0usize) & 0x01ff_ffff; + val as u32 + } + #[doc = "Data length value This register can only be written by firmware when DPSM is inactive (DPSMACT = 0). Number of data bytes to be transferred. When DDR = 1 DATALENGTH is truncated to a multiple of 2. (The last odd byte is not transfered) When DATALENGTH = 0 no data will be transfered, when requested by a CPSMEN and CMDTRANS = 1 also no command will be transfered. DTEN and CPSMEN are cleared to 0."] + pub fn set_datalength(&mut self, val: u32) { + self.0 = + (self.0 & !(0x01ff_ffff << 0usize)) | (((val as u32) & 0x01ff_ffff) << 0usize); + } + } + impl Default for Dlenr { + fn default() -> Dlenr { + Dlenr(0) + } + } + #[doc = "The SDMMC_CLKCR register controls the SDMMC_CK output clock, the SDMMC_RX_CLK receive clock, and the bus width."] + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq)] + pub struct Clkcr(pub u32); + impl Clkcr { + #[doc = "Clock divide factor This bit can only be written when the CPSM and DPSM are not active (CPSMACT = 0 and DPSMACT = 0). This field defines the divide factor between the input clock (SDMMCCLK) and the output clock (SDMMC_CK): SDMMC_CK frequency = SDMMCCLK / [2 * CLKDIV]. 0xx: etc.. xxx: etc.."] + pub const fn clkdiv(&self) -> u16 { + let val = (self.0 >> 0usize) & 0x03ff; + val as u16 + } + #[doc = "Clock divide factor This bit can only be written when the CPSM and DPSM are not active (CPSMACT = 0 and DPSMACT = 0). This field defines the divide factor between the input clock (SDMMCCLK) and the output clock (SDMMC_CK): SDMMC_CK frequency = SDMMCCLK / [2 * CLKDIV]. 0xx: etc.. xxx: etc.."] + pub fn set_clkdiv(&mut self, val: u16) { + self.0 = (self.0 & !(0x03ff << 0usize)) | (((val as u32) & 0x03ff) << 0usize); + } + #[doc = "Power saving configuration bit This bit can only be written when the CPSM and DPSM are not active (CPSMACT = 0 and DPSMACT = 0) For power saving, the SDMMC_CK clock output can be disabled when the bus is idle by setting PWRSAV:"] + pub const fn pwrsav(&self) -> bool { + let val = (self.0 >> 12usize) & 0x01; + val != 0 + } + #[doc = "Power saving configuration bit This bit can only be written when the CPSM and DPSM are not active (CPSMACT = 0 and DPSMACT = 0) For power saving, the SDMMC_CK clock output can be disabled when the bus is idle by setting PWRSAV:"] + pub fn set_pwrsav(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 12usize)) | (((val as u32) & 0x01) << 12usize); + } + #[doc = "Wide bus mode enable bit This bit can only be written when the CPSM and DPSM are not active (CPSMACT = 0 and DPSMACT = 0)"] + pub const fn widbus(&self) -> u8 { + let val = (self.0 >> 14usize) & 0x03; + val as u8 + } + #[doc = "Wide bus mode enable bit This bit can only be written when the CPSM and DPSM are not active (CPSMACT = 0 and DPSMACT = 0)"] + pub fn set_widbus(&mut self, val: u8) { + self.0 = (self.0 & !(0x03 << 14usize)) | (((val as u32) & 0x03) << 14usize); + } + #[doc = "SDMMC_CK dephasing selection bit for data and Command. This bit can only be written when the CPSM and DPSM are not active (CPSMACT = 0 and DPSMACT = 0). When clock division = 1 (CLKDIV = 0), this bit has no effect. Data and Command change on SDMMC_CK falling edge. When clock division >1 (CLKDIV > 0) & DDR = 0: - SDMMC_CK edge occurs on SDMMCCLK rising edge. When clock division >1 (CLKDIV > 0) & DDR = 1: - Data changed on the SDMMCCLK falling edge succeeding a SDMMC_CK edge. - SDMMC_CK edge occurs on SDMMCCLK rising edge. - Data changed on the SDMMC_CK falling edge succeeding a SDMMC_CK edge. - SDMMC_CK edge occurs on SDMMCCLK rising edge."] + pub const fn negedge(&self) -> bool { + let val = (self.0 >> 16usize) & 0x01; + val != 0 + } + #[doc = "SDMMC_CK dephasing selection bit for data and Command. This bit can only be written when the CPSM and DPSM are not active (CPSMACT = 0 and DPSMACT = 0). When clock division = 1 (CLKDIV = 0), this bit has no effect. Data and Command change on SDMMC_CK falling edge. When clock division >1 (CLKDIV > 0) & DDR = 0: - SDMMC_CK edge occurs on SDMMCCLK rising edge. When clock division >1 (CLKDIV > 0) & DDR = 1: - Data changed on the SDMMCCLK falling edge succeeding a SDMMC_CK edge. - SDMMC_CK edge occurs on SDMMCCLK rising edge. - Data changed on the SDMMC_CK falling edge succeeding a SDMMC_CK edge. - SDMMC_CK edge occurs on SDMMCCLK rising edge."] + pub fn set_negedge(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 16usize)) | (((val as u32) & 0x01) << 16usize); + } + #[doc = "Hardware flow control enable This bit can only be written when the CPSM and DPSM are not active (CPSMACT = 0 and DPSMACT = 0) When Hardware flow control is enabled, the meaning of the TXFIFOE and RXFIFOF flags change, please see SDMMC status register definition in Section56.8.11."] + pub const fn hwfc_en(&self) -> bool { + let val = (self.0 >> 17usize) & 0x01; + val != 0 + } + #[doc = "Hardware flow control enable This bit can only be written when the CPSM and DPSM are not active (CPSMACT = 0 and DPSMACT = 0) When Hardware flow control is enabled, the meaning of the TXFIFOE and RXFIFOF flags change, please see SDMMC status register definition in Section56.8.11."] + pub fn set_hwfc_en(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 17usize)) | (((val as u32) & 0x01) << 17usize); + } + #[doc = "Data rate signaling selection This bit can only be written when the CPSM and DPSM are not active (CPSMACT = 0 and DPSMACT = 0) DDR rate shall only be selected with 4-bit or 8-bit wide bus mode. (WIDBUS > 00). DDR = 1 has no effect when WIDBUS = 00 (1-bit wide bus). DDR rate shall only be selected with clock division >1. (CLKDIV > 0)"] + pub const fn ddr(&self) -> bool { + let val = (self.0 >> 18usize) & 0x01; + val != 0 + } + #[doc = "Data rate signaling selection This bit can only be written when the CPSM and DPSM are not active (CPSMACT = 0 and DPSMACT = 0) DDR rate shall only be selected with 4-bit or 8-bit wide bus mode. (WIDBUS > 00). DDR = 1 has no effect when WIDBUS = 00 (1-bit wide bus). DDR rate shall only be selected with clock division >1. (CLKDIV > 0)"] + pub fn set_ddr(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 18usize)) | (((val as u32) & 0x01) << 18usize); + } + #[doc = "Bus speed mode selection between DS, HS, SDR12, SDR25 and SDR50, DDR50, SDR104. This bit can only be written when the CPSM and DPSM are not active (CPSMACT = 0 and DPSMACT = 0)"] + pub const fn busspeed(&self) -> bool { + let val = (self.0 >> 19usize) & 0x01; + val != 0 + } + #[doc = "Bus speed mode selection between DS, HS, SDR12, SDR25 and SDR50, DDR50, SDR104. This bit can only be written when the CPSM and DPSM are not active (CPSMACT = 0 and DPSMACT = 0)"] + pub fn set_busspeed(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 19usize)) | (((val as u32) & 0x01) << 19usize); + } + #[doc = "Receive clock selection. These bits can only be written when the CPSM and DPSM are not active (CPSMACT = 0 and DPSMACT = 0)"] + pub const fn selclkrx(&self) -> u8 { + let val = (self.0 >> 20usize) & 0x03; + val as u8 + } + #[doc = "Receive clock selection. These bits can only be written when the CPSM and DPSM are not active (CPSMACT = 0 and DPSMACT = 0)"] + pub fn set_selclkrx(&mut self, val: u8) { + self.0 = (self.0 & !(0x03 << 20usize)) | (((val as u32) & 0x03) << 20usize); + } + } + impl Default for Clkcr { + fn default() -> Clkcr { + Clkcr(0) + } + } + #[doc = "SDMMC IP version register"] + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq)] + pub struct Ver(pub u32); + impl Ver { + #[doc = "IP minor revision number."] + pub const fn minrev(&self) -> u8 { + let val = (self.0 >> 0usize) & 0x0f; + val as u8 + } + #[doc = "IP minor revision number."] + pub fn set_minrev(&mut self, val: u8) { + self.0 = (self.0 & !(0x0f << 0usize)) | (((val as u32) & 0x0f) << 0usize); + } + #[doc = "IP major revision number."] + pub const fn majrev(&self) -> u8 { + let val = (self.0 >> 4usize) & 0x0f; + val as u8 + } + #[doc = "IP major revision number."] + pub fn set_majrev(&mut self, val: u8) { + self.0 = (self.0 & !(0x0f << 4usize)) | (((val as u32) & 0x0f) << 4usize); + } + } + impl Default for Ver { + fn default() -> Ver { + Ver(0) + } + } + #[doc = "The SDMMC_RESP1/2/3/4R registers contain the status of a card, which is part of the received response."] + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq)] + pub struct Resp3r(pub u32); + impl Resp3r { + #[doc = "see Table404."] + pub const fn cardstatus3(&self) -> u32 { + let val = (self.0 >> 0usize) & 0xffff_ffff; + val as u32 + } + #[doc = "see Table404."] + pub fn set_cardstatus3(&mut self, val: u32) { + self.0 = + (self.0 & !(0xffff_ffff << 0usize)) | (((val as u32) & 0xffff_ffff) << 0usize); + } + } + impl Default for Resp3r { + fn default() -> Resp3r { + Resp3r(0) + } + } + #[doc = "The SDMMC_ACKTIMER register contains the acknowledgment timeout period, in SDMMC_CK bus clock periods. A counter loads the value from the SDMMC_ACKTIMER register, and starts decrementing when the data path state machine (DPSM) enters the Wait_Ack state. If the timer reaches 0 while the DPSM is in this states, the acknowledgment timeout status flag is set."] + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq)] + pub struct Acktimer(pub u32); + impl Acktimer { + #[doc = "Boot acknowledgment timeout period This bit can only be written by firmware when CPSM is disabled (CPSMEN = 0). Boot acknowledgment timeout period expressed in card bus clock periods."] + pub const fn acktime(&self) -> u32 { + let val = (self.0 >> 0usize) & 0x01ff_ffff; + val as u32 + } + #[doc = "Boot acknowledgment timeout period This bit can only be written by firmware when CPSM is disabled (CPSMEN = 0). Boot acknowledgment timeout period expressed in card bus clock periods."] + pub fn set_acktime(&mut self, val: u32) { + self.0 = + (self.0 & !(0x01ff_ffff << 0usize)) | (((val as u32) & 0x01ff_ffff) << 0usize); + } + } + impl Default for Acktimer { + fn default() -> Acktimer { + Acktimer(0) + } + } #[doc = "The interrupt mask register determines which status flags generate an interrupt request by setting the corresponding bit to 1."] #[repr(transparent)] #[derive(Copy, Clone, Eq, PartialEq)] @@ -6714,77 +2074,6 @@ are always 0 and read only). This register can be written by firmware when DPSM Maskr(0) } } - #[doc = "SDMMC IP version register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Ver(pub u32); - impl Ver { - #[doc = "IP minor revision number."] - pub const fn minrev(&self) -> u8 { - let val = (self.0 >> 0usize) & 0x0f; - val as u8 - } - #[doc = "IP minor revision number."] - pub fn set_minrev(&mut self, val: u8) { - self.0 = (self.0 & !(0x0f << 0usize)) | (((val as u32) & 0x0f) << 0usize); - } - #[doc = "IP major revision number."] - pub const fn majrev(&self) -> u8 { - let val = (self.0 >> 4usize) & 0x0f; - val as u8 - } - #[doc = "IP major revision number."] - pub fn set_majrev(&mut self, val: u8) { - self.0 = (self.0 & !(0x0f << 4usize)) | (((val as u32) & 0x0f) << 4usize); - } - } - impl Default for Ver { - fn default() -> Ver { - Ver(0) - } - } - #[doc = "The SDMMC_ARGR register contains a 32-bit command argument, which is sent to a card as part of a command message."] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Argr(pub u32); - impl Argr { - #[doc = "Command argument. These bits can only be written by firmware when CPSM is disabled (CPSMEN = 0). Command argument sent to a card as part of a command message. If a command contains an argument, it must be loaded into this register before writing a command to the command register."] - pub const fn cmdarg(&self) -> u32 { - let val = (self.0 >> 0usize) & 0xffff_ffff; - val as u32 - } - #[doc = "Command argument. These bits can only be written by firmware when CPSM is disabled (CPSMEN = 0). Command argument sent to a card as part of a command message. If a command contains an argument, it must be loaded into this register before writing a command to the command register."] - pub fn set_cmdarg(&mut self, val: u32) { - self.0 = - (self.0 & !(0xffff_ffff << 0usize)) | (((val as u32) & 0xffff_ffff) << 0usize); - } - } - impl Default for Argr { - fn default() -> Argr { - Argr(0) - } - } - #[doc = "The SDMMC_ACKTIMER register contains the acknowledgment timeout period, in SDMMC_CK bus clock periods. A counter loads the value from the SDMMC_ACKTIMER register, and starts decrementing when the data path state machine (DPSM) enters the Wait_Ack state. If the timer reaches 0 while the DPSM is in this states, the acknowledgment timeout status flag is set."] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Acktimer(pub u32); - impl Acktimer { - #[doc = "Boot acknowledgment timeout period This bit can only be written by firmware when CPSM is disabled (CPSMEN = 0). Boot acknowledgment timeout period expressed in card bus clock periods."] - pub const fn acktime(&self) -> u32 { - let val = (self.0 >> 0usize) & 0x01ff_ffff; - val as u32 - } - #[doc = "Boot acknowledgment timeout period This bit can only be written by firmware when CPSM is disabled (CPSMEN = 0). Boot acknowledgment timeout period expressed in card bus clock periods."] - pub fn set_acktime(&mut self, val: u32) { - self.0 = - (self.0 & !(0x01ff_ffff << 0usize)) | (((val as u32) & 0x01ff_ffff) << 0usize); - } - } - impl Default for Acktimer { - fn default() -> Acktimer { - Acktimer(0) - } - } #[doc = "The receive and transmit FIFOs can be only read or written as word (32-bit) wide registers. The FIFOs contain 16 entries on sequential addresses. This allows the CPU to use its load and store multiple operands to read from/write to the FIFO.When accessing SDMMC_FIFOR with half word or byte access an AHB bus fault is generated."] #[repr(transparent)] #[derive(Copy, Clone, Eq, PartialEq)] @@ -6806,114 +2095,25 @@ are always 0 and read only). This register can be written by firmware when DPSM Fifor(0) } } - #[doc = "The SDMMC_CMDR register contains the command index and command type bits. The command index is sent to a card as part of a command message. The command type bits control the command path state machine (CPSM)."] + #[doc = "The SDMMC_RESP1/2/3/4R registers contain the status of a card, which is part of the received response."] #[repr(transparent)] #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Cmdr(pub u32); - impl Cmdr { - #[doc = "Command index. This bit can only be written by firmware when CPSM is disabled (CPSMEN = 0). The command index is sent to the card as part of a command message."] - pub const fn cmdindex(&self) -> u8 { - let val = (self.0 >> 0usize) & 0x3f; - val as u8 + pub struct Resp2r(pub u32); + impl Resp2r { + #[doc = "see Table404."] + pub const fn cardstatus2(&self) -> u32 { + let val = (self.0 >> 0usize) & 0xffff_ffff; + val as u32 } - #[doc = "Command index. This bit can only be written by firmware when CPSM is disabled (CPSMEN = 0). The command index is sent to the card as part of a command message."] - pub fn set_cmdindex(&mut self, val: u8) { - self.0 = (self.0 & !(0x3f << 0usize)) | (((val as u32) & 0x3f) << 0usize); - } - #[doc = "The CPSM treats the command as a data transfer command, stops the interrupt period, and signals DataEnable to the DPSM This bit can only be written by firmware when CPSM is disabled (CPSMEN = 0). If this bit is set, the CPSM issues an end of interrupt period and issues DataEnable signal to the DPSM when the command is sent."] - pub const fn cmdtrans(&self) -> bool { - let val = (self.0 >> 6usize) & 0x01; - val != 0 - } - #[doc = "The CPSM treats the command as a data transfer command, stops the interrupt period, and signals DataEnable to the DPSM This bit can only be written by firmware when CPSM is disabled (CPSMEN = 0). If this bit is set, the CPSM issues an end of interrupt period and issues DataEnable signal to the DPSM when the command is sent."] - pub fn set_cmdtrans(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 6usize)) | (((val as u32) & 0x01) << 6usize); - } - #[doc = "The CPSM treats the command as a Stop Transmission command and signals Abort to the DPSM. This bit can only be written by firmware when CPSM is disabled (CPSMEN = 0). If this bit is set, the CPSM issues the Abort signal to the DPSM when the command is sent."] - pub const fn cmdstop(&self) -> bool { - let val = (self.0 >> 7usize) & 0x01; - val != 0 - } - #[doc = "The CPSM treats the command as a Stop Transmission command and signals Abort to the DPSM. This bit can only be written by firmware when CPSM is disabled (CPSMEN = 0). If this bit is set, the CPSM issues the Abort signal to the DPSM when the command is sent."] - pub fn set_cmdstop(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 7usize)) | (((val as u32) & 0x01) << 7usize); - } - #[doc = "Wait for response bits. This bit can only be written by firmware when CPSM is disabled (CPSMEN = 0). They are used to configure whether the CPSM is to wait for a response, and if yes, which kind of response."] - pub const fn waitresp(&self) -> u8 { - let val = (self.0 >> 8usize) & 0x03; - val as u8 - } - #[doc = "Wait for response bits. This bit can only be written by firmware when CPSM is disabled (CPSMEN = 0). They are used to configure whether the CPSM is to wait for a response, and if yes, which kind of response."] - pub fn set_waitresp(&mut self, val: u8) { - self.0 = (self.0 & !(0x03 << 8usize)) | (((val as u32) & 0x03) << 8usize); - } - #[doc = "CPSM waits for interrupt request. If this bit is set, the CPSM disables command timeout and waits for an card interrupt request (Response). If this bit is cleared in the CPSM Wait state, will cause the abort of the interrupt mode."] - pub const fn waitint(&self) -> bool { - let val = (self.0 >> 10usize) & 0x01; - val != 0 - } - #[doc = "CPSM waits for interrupt request. If this bit is set, the CPSM disables command timeout and waits for an card interrupt request (Response). If this bit is cleared in the CPSM Wait state, will cause the abort of the interrupt mode."] - pub fn set_waitint(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 10usize)) | (((val as u32) & 0x01) << 10usize); - } - #[doc = "CPSM Waits for end of data transfer (CmdPend internal signal) from DPSM. This bit when set, the CPSM waits for the end of data transfer trigger before it starts sending a command. WAITPEND is only taken into account when DTMODE = MMC stream data transfer, WIDBUS = 1-bit wide bus mode, DPSMACT = 1 and DTDIR = from host to card."] - pub const fn waitpend(&self) -> bool { - let val = (self.0 >> 11usize) & 0x01; - val != 0 - } - #[doc = "CPSM Waits for end of data transfer (CmdPend internal signal) from DPSM. This bit when set, the CPSM waits for the end of data transfer trigger before it starts sending a command. WAITPEND is only taken into account when DTMODE = MMC stream data transfer, WIDBUS = 1-bit wide bus mode, DPSMACT = 1 and DTDIR = from host to card."] - pub fn set_waitpend(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 11usize)) | (((val as u32) & 0x01) << 11usize); - } - #[doc = "Command path state machine (CPSM) Enable bit This bit is written 1 by firmware, and cleared by hardware when the CPSM enters the Idle state. If this bit is set, the CPSM is enabled. When DTEN = 1, no command will be transfered nor boot procedure will be started. CPSMEN is cleared to 0."] - pub const fn cpsmen(&self) -> bool { - let val = (self.0 >> 12usize) & 0x01; - val != 0 - } - #[doc = "Command path state machine (CPSM) Enable bit This bit is written 1 by firmware, and cleared by hardware when the CPSM enters the Idle state. If this bit is set, the CPSM is enabled. When DTEN = 1, no command will be transfered nor boot procedure will be started. CPSMEN is cleared to 0."] - pub fn set_cpsmen(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 12usize)) | (((val as u32) & 0x01) << 12usize); - } - #[doc = "Hold new data block transmission and reception in the DPSM. If this bit is set, the DPSM will not move from the Wait_S state to the Send state or from the Wait_R state to the Receive state."] - pub const fn dthold(&self) -> bool { - let val = (self.0 >> 13usize) & 0x01; - val != 0 - } - #[doc = "Hold new data block transmission and reception in the DPSM. If this bit is set, the DPSM will not move from the Wait_S state to the Send state or from the Wait_R state to the Receive state."] - pub fn set_dthold(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 13usize)) | (((val as u32) & 0x01) << 13usize); - } - #[doc = "Select the boot mode procedure to be used. This bit can only be written by firmware when CPSM is disabled (CPSMEN = 0)"] - pub const fn bootmode(&self) -> bool { - let val = (self.0 >> 14usize) & 0x01; - val != 0 - } - #[doc = "Select the boot mode procedure to be used. This bit can only be written by firmware when CPSM is disabled (CPSMEN = 0)"] - pub fn set_bootmode(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 14usize)) | (((val as u32) & 0x01) << 14usize); - } - #[doc = "Enable boot mode procedure."] - pub const fn booten(&self) -> bool { - let val = (self.0 >> 15usize) & 0x01; - val != 0 - } - #[doc = "Enable boot mode procedure."] - pub fn set_booten(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 15usize)) | (((val as u32) & 0x01) << 15usize); - } - #[doc = "The CPSM treats the command as a Suspend or Resume command and signals interrupt period start/end. This bit can only be written by firmware when CPSM is disabled (CPSMEN = 0). CMDSUSPEND = 1 and CMDTRANS = 0 Suspend command, start interrupt period when response bit BS=0. CMDSUSPEND = 1 and CMDTRANS = 1 Resume command with data, end interrupt period when response bit DF=1."] - pub const fn cmdsuspend(&self) -> bool { - let val = (self.0 >> 16usize) & 0x01; - val != 0 - } - #[doc = "The CPSM treats the command as a Suspend or Resume command and signals interrupt period start/end. This bit can only be written by firmware when CPSM is disabled (CPSMEN = 0). CMDSUSPEND = 1 and CMDTRANS = 0 Suspend command, start interrupt period when response bit BS=0. CMDSUSPEND = 1 and CMDTRANS = 1 Resume command with data, end interrupt period when response bit DF=1."] - pub fn set_cmdsuspend(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 16usize)) | (((val as u32) & 0x01) << 16usize); + #[doc = "see Table404."] + pub fn set_cardstatus2(&mut self, val: u32) { + self.0 = + (self.0 & !(0xffff_ffff << 0usize)) | (((val as u32) & 0xffff_ffff) << 0usize); } } - impl Default for Cmdr { - fn default() -> Cmdr { - Cmdr(0) + impl Default for Resp2r { + fn default() -> Resp2r { + Resp2r(0) } } #[doc = "The receive and transmit FIFOs can be read or written as 32-bit wide registers. The FIFOs contain 32 entries on 32 sequential addresses. This allows the CPU to use its load and store multiple operands to read from/write to the FIFO."] @@ -6954,99 +2154,2774 @@ are always 0 and read only). This register can be written by firmware when DPSM Idmactrlr(0) } } - #[doc = "SDMMC power control register"] + #[doc = "The SDMMC_ICR register is a write-only register. Writing a bit with 1 clears the corresponding bit in the SDMMC_STAR status register."] #[repr(transparent)] #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Power(pub u32); - impl Power { - #[doc = "SDMMC state control bits. These bits can only be written when the SDMMC is not in the power-on state (PWRCTRL?11). These bits are used to define the functional state of the SDMMC signals: Any further write will be ignored, PWRCTRL value will keep 11."] - pub const fn pwrctrl(&self) -> u8 { - let val = (self.0 >> 0usize) & 0x03; - val as u8 + pub struct Icr(pub u32); + impl Icr { + #[doc = "CCRCFAIL flag clear bit Set by software to clear the CCRCFAIL flag."] + pub const fn ccrcfailc(&self) -> bool { + let val = (self.0 >> 0usize) & 0x01; + val != 0 } - #[doc = "SDMMC state control bits. These bits can only be written when the SDMMC is not in the power-on state (PWRCTRL?11). These bits are used to define the functional state of the SDMMC signals: Any further write will be ignored, PWRCTRL value will keep 11."] - pub fn set_pwrctrl(&mut self, val: u8) { - self.0 = (self.0 & !(0x03 << 0usize)) | (((val as u32) & 0x03) << 0usize); + #[doc = "CCRCFAIL flag clear bit Set by software to clear the CCRCFAIL flag."] + pub fn set_ccrcfailc(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize); } - #[doc = "Voltage switch sequence start. This bit is used to start the timing critical section of the voltage switch sequence:"] - pub const fn vswitch(&self) -> bool { + #[doc = "DCRCFAIL flag clear bit Set by software to clear the DCRCFAIL flag."] + pub const fn dcrcfailc(&self) -> bool { + let val = (self.0 >> 1usize) & 0x01; + val != 0 + } + #[doc = "DCRCFAIL flag clear bit Set by software to clear the DCRCFAIL flag."] + pub fn set_dcrcfailc(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 1usize)) | (((val as u32) & 0x01) << 1usize); + } + #[doc = "CTIMEOUT flag clear bit Set by software to clear the CTIMEOUT flag."] + pub const fn ctimeoutc(&self) -> bool { let val = (self.0 >> 2usize) & 0x01; val != 0 } - #[doc = "Voltage switch sequence start. This bit is used to start the timing critical section of the voltage switch sequence:"] - pub fn set_vswitch(&mut self, val: bool) { + #[doc = "CTIMEOUT flag clear bit Set by software to clear the CTIMEOUT flag."] + pub fn set_ctimeoutc(&mut self, val: bool) { self.0 = (self.0 & !(0x01 << 2usize)) | (((val as u32) & 0x01) << 2usize); } - #[doc = "Voltage switch procedure enable. This bit can only be written by firmware when CPSM is disabled (CPSMEN = 0). This bit is used to stop the SDMMC_CK after the voltage switch command response:"] - pub const fn vswitchen(&self) -> bool { + #[doc = "DTIMEOUT flag clear bit Set by software to clear the DTIMEOUT flag."] + pub const fn dtimeoutc(&self) -> bool { let val = (self.0 >> 3usize) & 0x01; val != 0 } - #[doc = "Voltage switch procedure enable. This bit can only be written by firmware when CPSM is disabled (CPSMEN = 0). This bit is used to stop the SDMMC_CK after the voltage switch command response:"] - pub fn set_vswitchen(&mut self, val: bool) { + #[doc = "DTIMEOUT flag clear bit Set by software to clear the DTIMEOUT flag."] + pub fn set_dtimeoutc(&mut self, val: bool) { self.0 = (self.0 & !(0x01 << 3usize)) | (((val as u32) & 0x01) << 3usize); } - #[doc = "Data and command direction signals polarity selection. This bit can only be written when the SDMMC is in the power-off state (PWRCTRL = 00)."] - pub const fn dirpol(&self) -> bool { + #[doc = "TXUNDERR flag clear bit Set by software to clear TXUNDERR flag."] + pub const fn txunderrc(&self) -> bool { let val = (self.0 >> 4usize) & 0x01; val != 0 } - #[doc = "Data and command direction signals polarity selection. This bit can only be written when the SDMMC is in the power-off state (PWRCTRL = 00)."] - pub fn set_dirpol(&mut self, val: bool) { + #[doc = "TXUNDERR flag clear bit Set by software to clear TXUNDERR flag."] + pub fn set_txunderrc(&mut self, val: bool) { self.0 = (self.0 & !(0x01 << 4usize)) | (((val as u32) & 0x01) << 4usize); } - } - impl Default for Power { - fn default() -> Power { - Power(0) + #[doc = "RXOVERR flag clear bit Set by software to clear the RXOVERR flag."] + pub const fn rxoverrc(&self) -> bool { + let val = (self.0 >> 5usize) & 0x01; + val != 0 + } + #[doc = "RXOVERR flag clear bit Set by software to clear the RXOVERR flag."] + pub fn set_rxoverrc(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 5usize)) | (((val as u32) & 0x01) << 5usize); + } + #[doc = "CMDREND flag clear bit Set by software to clear the CMDREND flag."] + pub const fn cmdrendc(&self) -> bool { + let val = (self.0 >> 6usize) & 0x01; + val != 0 + } + #[doc = "CMDREND flag clear bit Set by software to clear the CMDREND flag."] + pub fn set_cmdrendc(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 6usize)) | (((val as u32) & 0x01) << 6usize); + } + #[doc = "CMDSENT flag clear bit Set by software to clear the CMDSENT flag."] + pub const fn cmdsentc(&self) -> bool { + let val = (self.0 >> 7usize) & 0x01; + val != 0 + } + #[doc = "CMDSENT flag clear bit Set by software to clear the CMDSENT flag."] + pub fn set_cmdsentc(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 7usize)) | (((val as u32) & 0x01) << 7usize); + } + #[doc = "DATAEND flag clear bit Set by software to clear the DATAEND flag."] + pub const fn dataendc(&self) -> bool { + let val = (self.0 >> 8usize) & 0x01; + val != 0 + } + #[doc = "DATAEND flag clear bit Set by software to clear the DATAEND flag."] + pub fn set_dataendc(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 8usize)) | (((val as u32) & 0x01) << 8usize); + } + #[doc = "DHOLD flag clear bit Set by software to clear the DHOLD flag."] + pub const fn dholdc(&self) -> bool { + let val = (self.0 >> 9usize) & 0x01; + val != 0 + } + #[doc = "DHOLD flag clear bit Set by software to clear the DHOLD flag."] + pub fn set_dholdc(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 9usize)) | (((val as u32) & 0x01) << 9usize); + } + #[doc = "DBCKEND flag clear bit Set by software to clear the DBCKEND flag."] + pub const fn dbckendc(&self) -> bool { + let val = (self.0 >> 10usize) & 0x01; + val != 0 + } + #[doc = "DBCKEND flag clear bit Set by software to clear the DBCKEND flag."] + pub fn set_dbckendc(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 10usize)) | (((val as u32) & 0x01) << 10usize); + } + #[doc = "DABORT flag clear bit Set by software to clear the DABORT flag."] + pub const fn dabortc(&self) -> bool { + let val = (self.0 >> 11usize) & 0x01; + val != 0 + } + #[doc = "DABORT flag clear bit Set by software to clear the DABORT flag."] + pub fn set_dabortc(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 11usize)) | (((val as u32) & 0x01) << 11usize); + } + #[doc = "BUSYD0END flag clear bit Set by software to clear the BUSYD0END flag."] + pub const fn busyd0endc(&self) -> bool { + let val = (self.0 >> 21usize) & 0x01; + val != 0 + } + #[doc = "BUSYD0END flag clear bit Set by software to clear the BUSYD0END flag."] + pub fn set_busyd0endc(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 21usize)) | (((val as u32) & 0x01) << 21usize); + } + #[doc = "SDIOIT flag clear bit Set by software to clear the SDIOIT flag."] + pub const fn sdioitc(&self) -> bool { + let val = (self.0 >> 22usize) & 0x01; + val != 0 + } + #[doc = "SDIOIT flag clear bit Set by software to clear the SDIOIT flag."] + pub fn set_sdioitc(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 22usize)) | (((val as u32) & 0x01) << 22usize); + } + #[doc = "ACKFAIL flag clear bit Set by software to clear the ACKFAIL flag."] + pub const fn ackfailc(&self) -> bool { + let val = (self.0 >> 23usize) & 0x01; + val != 0 + } + #[doc = "ACKFAIL flag clear bit Set by software to clear the ACKFAIL flag."] + pub fn set_ackfailc(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 23usize)) | (((val as u32) & 0x01) << 23usize); + } + #[doc = "ACKTIMEOUT flag clear bit Set by software to clear the ACKTIMEOUT flag."] + pub const fn acktimeoutc(&self) -> bool { + let val = (self.0 >> 24usize) & 0x01; + val != 0 + } + #[doc = "ACKTIMEOUT flag clear bit Set by software to clear the ACKTIMEOUT flag."] + pub fn set_acktimeoutc(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 24usize)) | (((val as u32) & 0x01) << 24usize); + } + #[doc = "VSWEND flag clear bit Set by software to clear the VSWEND flag."] + pub const fn vswendc(&self) -> bool { + let val = (self.0 >> 25usize) & 0x01; + val != 0 + } + #[doc = "VSWEND flag clear bit Set by software to clear the VSWEND flag."] + pub fn set_vswendc(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 25usize)) | (((val as u32) & 0x01) << 25usize); + } + #[doc = "CKSTOP flag clear bit Set by software to clear the CKSTOP flag."] + pub const fn ckstopc(&self) -> bool { + let val = (self.0 >> 26usize) & 0x01; + val != 0 + } + #[doc = "CKSTOP flag clear bit Set by software to clear the CKSTOP flag."] + pub fn set_ckstopc(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 26usize)) | (((val as u32) & 0x01) << 26usize); + } + #[doc = "IDMA transfer error clear bit Set by software to clear the IDMATE flag."] + pub const fn idmatec(&self) -> bool { + let val = (self.0 >> 27usize) & 0x01; + val != 0 + } + #[doc = "IDMA transfer error clear bit Set by software to clear the IDMATE flag."] + pub fn set_idmatec(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 27usize)) | (((val as u32) & 0x01) << 27usize); + } + #[doc = "IDMA buffer transfer complete clear bit Set by software to clear the IDMABTC flag."] + pub const fn idmabtcc(&self) -> bool { + let val = (self.0 >> 28usize) & 0x01; + val != 0 + } + #[doc = "IDMA buffer transfer complete clear bit Set by software to clear the IDMABTC flag."] + pub fn set_idmabtcc(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 28usize)) | (((val as u32) & 0x01) << 28usize); } } - #[doc = "The SDMMC_RESP1/2/3/4R registers contain the status of a card, which is part of the received response."] + impl Default for Icr { + fn default() -> Icr { + Icr(0) + } + } + #[doc = "The SDMMC_DTIMER register contains the data timeout period, in card bus clock periods. A counter loads the value from the SDMMC_DTIMER register, and starts decrementing when the data path state machine (DPSM) enters the Wait_R or Busy state. If the timer reaches 0 while the DPSM is in either of these states, the timeout status flag is set."] #[repr(transparent)] #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Resp2r(pub u32); - impl Resp2r { - #[doc = "see Table404."] - pub const fn cardstatus2(&self) -> u32 { + pub struct Dtimer(pub u32); + impl Dtimer { + #[doc = "Data and R1b busy timeout period This bit can only be written when the CPSM and DPSM are not active (CPSMACT = 0 and DPSMACT = 0). Data and R1b busy timeout period expressed in card bus clock periods."] + pub const fn datatime(&self) -> u32 { let val = (self.0 >> 0usize) & 0xffff_ffff; val as u32 } - #[doc = "see Table404."] - pub fn set_cardstatus2(&mut self, val: u32) { + #[doc = "Data and R1b busy timeout period This bit can only be written when the CPSM and DPSM are not active (CPSMACT = 0 and DPSMACT = 0). Data and R1b busy timeout period expressed in card bus clock periods."] + pub fn set_datatime(&mut self, val: u32) { self.0 = (self.0 & !(0xffff_ffff << 0usize)) | (((val as u32) & 0xffff_ffff) << 0usize); } } - impl Default for Resp2r { - fn default() -> Resp2r { - Resp2r(0) + impl Default for Dtimer { + fn default() -> Dtimer { + Dtimer(0) } } - #[doc = "The SDMMC_RESP1/2/3/4R registers contain the status of a card, which is part of the received response."] + } +} +pub mod syscfg_f4 { + use crate::generic::*; + #[doc = "System configuration controller"] + #[derive(Copy, Clone)] + pub struct Syscfg(pub *mut u8); + unsafe impl Send for Syscfg {} + unsafe impl Sync for Syscfg {} + impl Syscfg { + #[doc = "memory remap register"] + pub fn memrm(self) -> Reg { + unsafe { Reg::from_ptr(self.0.add(0usize)) } + } + #[doc = "peripheral mode configuration register"] + pub fn pmc(self) -> Reg { + unsafe { Reg::from_ptr(self.0.add(4usize)) } + } + #[doc = "external interrupt configuration register"] + pub fn exticr(self, n: usize) -> Reg { + assert!(n < 4usize); + unsafe { Reg::from_ptr(self.0.add(8usize + n * 4usize)) } + } + #[doc = "Compensation cell control register"] + pub fn cmpcr(self) -> Reg { + unsafe { Reg::from_ptr(self.0.add(32usize)) } + } + } + pub mod regs { + use crate::generic::*; + #[doc = "peripheral mode configuration register"] #[repr(transparent)] #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Resp3r(pub u32); - impl Resp3r { - #[doc = "see Table404."] - pub const fn cardstatus3(&self) -> u32 { + pub struct Pmc(pub u32); + impl Pmc { + #[doc = "ADC1DC2"] + pub const fn adc1dc2(&self) -> bool { + let val = (self.0 >> 16usize) & 0x01; + val != 0 + } + #[doc = "ADC1DC2"] + pub fn set_adc1dc2(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 16usize)) | (((val as u32) & 0x01) << 16usize); + } + #[doc = "ADC2DC2"] + pub const fn adc2dc2(&self) -> bool { + let val = (self.0 >> 17usize) & 0x01; + val != 0 + } + #[doc = "ADC2DC2"] + pub fn set_adc2dc2(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 17usize)) | (((val as u32) & 0x01) << 17usize); + } + #[doc = "ADC3DC2"] + pub const fn adc3dc2(&self) -> bool { + let val = (self.0 >> 18usize) & 0x01; + val != 0 + } + #[doc = "ADC3DC2"] + pub fn set_adc3dc2(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 18usize)) | (((val as u32) & 0x01) << 18usize); + } + #[doc = "Ethernet PHY interface selection"] + pub const fn mii_rmii_sel(&self) -> bool { + let val = (self.0 >> 23usize) & 0x01; + val != 0 + } + #[doc = "Ethernet PHY interface selection"] + pub fn set_mii_rmii_sel(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 23usize)) | (((val as u32) & 0x01) << 23usize); + } + } + impl Default for Pmc { + fn default() -> Pmc { + Pmc(0) + } + } + #[doc = "memory remap register"] + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq)] + pub struct Memrm(pub u32); + impl Memrm { + #[doc = "Memory mapping selection"] + pub const fn mem_mode(&self) -> u8 { + let val = (self.0 >> 0usize) & 0x07; + val as u8 + } + #[doc = "Memory mapping selection"] + pub fn set_mem_mode(&mut self, val: u8) { + self.0 = (self.0 & !(0x07 << 0usize)) | (((val as u32) & 0x07) << 0usize); + } + #[doc = "Flash bank mode selection"] + pub const fn fb_mode(&self) -> bool { + let val = (self.0 >> 8usize) & 0x01; + val != 0 + } + #[doc = "Flash bank mode selection"] + pub fn set_fb_mode(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 8usize)) | (((val as u32) & 0x01) << 8usize); + } + #[doc = "FMC memory mapping swap"] + pub const fn swp_fmc(&self) -> u8 { + let val = (self.0 >> 10usize) & 0x03; + val as u8 + } + #[doc = "FMC memory mapping swap"] + pub fn set_swp_fmc(&mut self, val: u8) { + self.0 = (self.0 & !(0x03 << 10usize)) | (((val as u32) & 0x03) << 10usize); + } + } + impl Default for Memrm { + fn default() -> Memrm { + Memrm(0) + } + } + #[doc = "Compensation cell control register"] + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq)] + pub struct Cmpcr(pub u32); + impl Cmpcr { + #[doc = "Compensation cell power-down"] + pub const fn cmp_pd(&self) -> bool { + let val = (self.0 >> 0usize) & 0x01; + val != 0 + } + #[doc = "Compensation cell power-down"] + pub fn set_cmp_pd(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize); + } + #[doc = "READY"] + pub const fn ready(&self) -> bool { + let val = (self.0 >> 8usize) & 0x01; + val != 0 + } + #[doc = "READY"] + pub fn set_ready(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 8usize)) | (((val as u32) & 0x01) << 8usize); + } + } + impl Default for Cmpcr { + fn default() -> Cmpcr { + Cmpcr(0) + } + } + #[doc = "external interrupt configuration register"] + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq)] + pub struct Exticr(pub u32); + impl Exticr { + #[doc = "EXTI x configuration"] + pub fn exti(&self, n: usize) -> u8 { + assert!(n < 4usize); + let offs = 0usize + n * 4usize; + let val = (self.0 >> offs) & 0x0f; + val as u8 + } + #[doc = "EXTI x configuration"] + pub fn set_exti(&mut self, n: usize, val: u8) { + assert!(n < 4usize); + let offs = 0usize + n * 4usize; + self.0 = (self.0 & !(0x0f << offs)) | (((val as u32) & 0x0f) << offs); + } + } + impl Default for Exticr { + fn default() -> Exticr { + Exticr(0) + } + } + } +} +pub mod timer_v1 { + use crate::generic::*; + #[doc = "Advanced-timers"] + #[derive(Copy, Clone)] + pub struct TimAdv(pub *mut u8); + unsafe impl Send for TimAdv {} + unsafe impl Sync for TimAdv {} + impl TimAdv { + #[doc = "control register 1"] + pub fn cr1(self) -> Reg { + unsafe { Reg::from_ptr(self.0.add(0usize)) } + } + #[doc = "control register 2"] + pub fn cr2(self) -> Reg { + unsafe { Reg::from_ptr(self.0.add(4usize)) } + } + #[doc = "slave mode control register"] + pub fn smcr(self) -> Reg { + unsafe { Reg::from_ptr(self.0.add(8usize)) } + } + #[doc = "DMA/Interrupt enable register"] + pub fn dier(self) -> Reg { + unsafe { Reg::from_ptr(self.0.add(12usize)) } + } + #[doc = "status register"] + pub fn sr(self) -> Reg { + unsafe { Reg::from_ptr(self.0.add(16usize)) } + } + #[doc = "event generation register"] + pub fn egr(self) -> Reg { + unsafe { Reg::from_ptr(self.0.add(20usize)) } + } + #[doc = "capture/compare mode register 1 (input mode)"] + pub fn ccmr_input(self, n: usize) -> Reg { + assert!(n < 2usize); + unsafe { Reg::from_ptr(self.0.add(24usize + n * 4usize)) } + } + #[doc = "capture/compare mode register 1 (output mode)"] + pub fn ccmr_output(self, n: usize) -> Reg { + assert!(n < 2usize); + unsafe { Reg::from_ptr(self.0.add(24usize + n * 4usize)) } + } + #[doc = "capture/compare enable register"] + pub fn ccer(self) -> Reg { + unsafe { Reg::from_ptr(self.0.add(32usize)) } + } + #[doc = "counter"] + pub fn cnt(self) -> Reg { + unsafe { Reg::from_ptr(self.0.add(36usize)) } + } + #[doc = "prescaler"] + pub fn psc(self) -> Reg { + unsafe { Reg::from_ptr(self.0.add(40usize)) } + } + #[doc = "auto-reload register"] + pub fn arr(self) -> Reg { + unsafe { Reg::from_ptr(self.0.add(44usize)) } + } + #[doc = "repetition counter register"] + pub fn rcr(self) -> Reg { + unsafe { Reg::from_ptr(self.0.add(48usize)) } + } + #[doc = "capture/compare register"] + pub fn ccr(self, n: usize) -> Reg { + assert!(n < 4usize); + unsafe { Reg::from_ptr(self.0.add(52usize + n * 4usize)) } + } + #[doc = "break and dead-time register"] + pub fn bdtr(self) -> Reg { + unsafe { Reg::from_ptr(self.0.add(68usize)) } + } + #[doc = "DMA control register"] + pub fn dcr(self) -> Reg { + unsafe { Reg::from_ptr(self.0.add(72usize)) } + } + #[doc = "DMA address for full transfer"] + pub fn dmar(self) -> Reg { + unsafe { Reg::from_ptr(self.0.add(76usize)) } + } + } + #[doc = "General purpose 16-bit timer"] + #[derive(Copy, Clone)] + pub struct TimGp16(pub *mut u8); + unsafe impl Send for TimGp16 {} + unsafe impl Sync for TimGp16 {} + impl TimGp16 { + #[doc = "control register 1"] + pub fn cr1(self) -> Reg { + unsafe { Reg::from_ptr(self.0.add(0usize)) } + } + #[doc = "control register 2"] + pub fn cr2(self) -> Reg { + unsafe { Reg::from_ptr(self.0.add(4usize)) } + } + #[doc = "slave mode control register"] + pub fn smcr(self) -> Reg { + unsafe { Reg::from_ptr(self.0.add(8usize)) } + } + #[doc = "DMA/Interrupt enable register"] + pub fn dier(self) -> Reg { + unsafe { Reg::from_ptr(self.0.add(12usize)) } + } + #[doc = "status register"] + pub fn sr(self) -> Reg { + unsafe { Reg::from_ptr(self.0.add(16usize)) } + } + #[doc = "event generation register"] + pub fn egr(self) -> Reg { + unsafe { Reg::from_ptr(self.0.add(20usize)) } + } + #[doc = "capture/compare mode register 1 (input mode)"] + pub fn ccmr_input(self, n: usize) -> Reg { + assert!(n < 2usize); + unsafe { Reg::from_ptr(self.0.add(24usize + n * 4usize)) } + } + #[doc = "capture/compare mode register 1 (output mode)"] + pub fn ccmr_output(self, n: usize) -> Reg { + assert!(n < 2usize); + unsafe { Reg::from_ptr(self.0.add(24usize + n * 4usize)) } + } + #[doc = "capture/compare enable register"] + pub fn ccer(self) -> Reg { + unsafe { Reg::from_ptr(self.0.add(32usize)) } + } + #[doc = "counter"] + pub fn cnt(self) -> Reg { + unsafe { Reg::from_ptr(self.0.add(36usize)) } + } + #[doc = "prescaler"] + pub fn psc(self) -> Reg { + unsafe { Reg::from_ptr(self.0.add(40usize)) } + } + #[doc = "auto-reload register"] + pub fn arr(self) -> Reg { + unsafe { Reg::from_ptr(self.0.add(44usize)) } + } + #[doc = "capture/compare register"] + pub fn ccr(self, n: usize) -> Reg { + assert!(n < 4usize); + unsafe { Reg::from_ptr(self.0.add(52usize + n * 4usize)) } + } + #[doc = "DMA control register"] + pub fn dcr(self) -> Reg { + unsafe { Reg::from_ptr(self.0.add(72usize)) } + } + #[doc = "DMA address for full transfer"] + pub fn dmar(self) -> Reg { + unsafe { Reg::from_ptr(self.0.add(76usize)) } + } + } + #[doc = "Basic timer"] + #[derive(Copy, Clone)] + pub struct TimBasic(pub *mut u8); + unsafe impl Send for TimBasic {} + unsafe impl Sync for TimBasic {} + impl TimBasic { + #[doc = "control register 1"] + pub fn cr1(self) -> Reg { + unsafe { Reg::from_ptr(self.0.add(0usize)) } + } + #[doc = "control register 2"] + pub fn cr2(self) -> Reg { + unsafe { Reg::from_ptr(self.0.add(4usize)) } + } + #[doc = "DMA/Interrupt enable register"] + pub fn dier(self) -> Reg { + unsafe { Reg::from_ptr(self.0.add(12usize)) } + } + #[doc = "status register"] + pub fn sr(self) -> Reg { + unsafe { Reg::from_ptr(self.0.add(16usize)) } + } + #[doc = "event generation register"] + pub fn egr(self) -> Reg { + unsafe { Reg::from_ptr(self.0.add(20usize)) } + } + #[doc = "counter"] + pub fn cnt(self) -> Reg { + unsafe { Reg::from_ptr(self.0.add(36usize)) } + } + #[doc = "prescaler"] + pub fn psc(self) -> Reg { + unsafe { Reg::from_ptr(self.0.add(40usize)) } + } + #[doc = "auto-reload register"] + pub fn arr(self) -> Reg { + unsafe { Reg::from_ptr(self.0.add(44usize)) } + } + } + #[doc = "General purpose 32-bit timer"] + #[derive(Copy, Clone)] + pub struct TimGp32(pub *mut u8); + unsafe impl Send for TimGp32 {} + unsafe impl Sync for TimGp32 {} + impl TimGp32 { + #[doc = "control register 1"] + pub fn cr1(self) -> Reg { + unsafe { Reg::from_ptr(self.0.add(0usize)) } + } + #[doc = "control register 2"] + pub fn cr2(self) -> Reg { + unsafe { Reg::from_ptr(self.0.add(4usize)) } + } + #[doc = "slave mode control register"] + pub fn smcr(self) -> Reg { + unsafe { Reg::from_ptr(self.0.add(8usize)) } + } + #[doc = "DMA/Interrupt enable register"] + pub fn dier(self) -> Reg { + unsafe { Reg::from_ptr(self.0.add(12usize)) } + } + #[doc = "status register"] + pub fn sr(self) -> Reg { + unsafe { Reg::from_ptr(self.0.add(16usize)) } + } + #[doc = "event generation register"] + pub fn egr(self) -> Reg { + unsafe { Reg::from_ptr(self.0.add(20usize)) } + } + #[doc = "capture/compare mode register 1 (input mode)"] + pub fn ccmr_input(self, n: usize) -> Reg { + assert!(n < 2usize); + unsafe { Reg::from_ptr(self.0.add(24usize + n * 4usize)) } + } + #[doc = "capture/compare mode register 1 (output mode)"] + pub fn ccmr_output(self, n: usize) -> Reg { + assert!(n < 2usize); + unsafe { Reg::from_ptr(self.0.add(24usize + n * 4usize)) } + } + #[doc = "capture/compare enable register"] + pub fn ccer(self) -> Reg { + unsafe { Reg::from_ptr(self.0.add(32usize)) } + } + #[doc = "counter"] + pub fn cnt(self) -> Reg { + unsafe { Reg::from_ptr(self.0.add(36usize)) } + } + #[doc = "prescaler"] + pub fn psc(self) -> Reg { + unsafe { Reg::from_ptr(self.0.add(40usize)) } + } + #[doc = "auto-reload register"] + pub fn arr(self) -> Reg { + unsafe { Reg::from_ptr(self.0.add(44usize)) } + } + #[doc = "capture/compare register"] + pub fn ccr(self, n: usize) -> Reg { + assert!(n < 4usize); + unsafe { Reg::from_ptr(self.0.add(52usize + n * 4usize)) } + } + #[doc = "DMA control register"] + pub fn dcr(self) -> Reg { + unsafe { Reg::from_ptr(self.0.add(72usize)) } + } + #[doc = "DMA address for full transfer"] + pub fn dmar(self) -> Reg { + unsafe { Reg::from_ptr(self.0.add(76usize)) } + } + } + pub mod vals { + use crate::generic::*; + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] + pub struct Ocpe(pub u8); + impl Ocpe { + #[doc = "Preload register on CCR2 disabled. New values written to CCR2 are taken into account immediately"] + pub const DISABLED: Self = Self(0); + #[doc = "Preload register on CCR2 enabled. Preload value is loaded into active register on each update event"] + pub const ENABLED: Self = Self(0x01); + } + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] + pub struct Msm(pub u8); + impl Msm { + #[doc = "No action"] + pub const NOSYNC: Self = Self(0); + #[doc = "The effect of an event on the trigger input (TRGI) is delayed to allow a perfect synchronization between the current timer and its slaves (through TRGO). It is useful if we want to synchronize several timers on a single external event."] + pub const SYNC: Self = Self(0x01); + } + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] + pub struct Ocm(pub u8); + impl Ocm { + #[doc = "The comparison between the output compare register TIMx_CCRy and the counter TIMx_CNT has no effect on the outputs"] + pub const FROZEN: Self = Self(0); + #[doc = "Set channel to active level on match. OCyREF signal is forced high when the counter matches the capture/compare register"] + pub const ACTIVEONMATCH: Self = Self(0x01); + #[doc = "Set channel to inactive level on match. OCyREF signal is forced low when the counter matches the capture/compare register"] + pub const INACTIVEONMATCH: Self = Self(0x02); + #[doc = "OCyREF toggles when TIMx_CNT=TIMx_CCRy"] + pub const TOGGLE: Self = Self(0x03); + #[doc = "OCyREF is forced low"] + pub const FORCEINACTIVE: Self = Self(0x04); + #[doc = "OCyREF is forced high"] + pub const FORCEACTIVE: Self = Self(0x05); + #[doc = "In upcounting, channel is active as long as TIMx_CNTTIMx_CCRy else active"] + pub const PWMMODE1: Self = Self(0x06); + #[doc = "Inversely to PwmMode1"] + pub const PWMMODE2: Self = Self(0x07); + } + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] + pub struct Mms(pub u8); + impl Mms { + #[doc = "The UG bit from the TIMx_EGR register is used as trigger output"] + pub const RESET: Self = Self(0); + #[doc = "The counter enable signal, CNT_EN, is used as trigger output"] + pub const ENABLE: Self = Self(0x01); + #[doc = "The update event is selected as trigger output"] + pub const UPDATE: Self = Self(0x02); + #[doc = "The trigger output send a positive pulse when the CC1IF flag it to be set, as soon as a capture or a compare match occurred"] + pub const COMPAREPULSE: Self = Self(0x03); + #[doc = "OC1REF signal is used as trigger output"] + pub const COMPAREOC1: Self = Self(0x04); + #[doc = "OC2REF signal is used as trigger output"] + pub const COMPAREOC2: Self = Self(0x05); + #[doc = "OC3REF signal is used as trigger output"] + pub const COMPAREOC3: Self = Self(0x06); + #[doc = "OC4REF signal is used as trigger output"] + pub const COMPAREOC4: Self = Self(0x07); + } + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] + pub struct Arpe(pub u8); + impl Arpe { + #[doc = "TIMx_APRR register is not buffered"] + pub const DISABLED: Self = Self(0); + #[doc = "TIMx_APRR register is buffered"] + pub const ENABLED: Self = Self(0x01); + } + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] + pub struct CcmrOutputCcs(pub u8); + impl CcmrOutputCcs { + #[doc = "CCx channel is configured as output"] + pub const OUTPUT: Self = Self(0); + } + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] + pub struct Ckd(pub u8); + impl Ckd { + #[doc = "t_DTS = t_CK_INT"] + pub const DIV1: Self = Self(0); + #[doc = "t_DTS = 2 × t_CK_INT"] + pub const DIV2: Self = Self(0x01); + #[doc = "t_DTS = 4 × t_CK_INT"] + pub const DIV4: Self = Self(0x02); + } + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] + pub struct Urs(pub u8); + impl Urs { + #[doc = "Any of counter overflow/underflow, setting UG, or update through slave mode, generates an update interrupt or DMA request"] + pub const ANYEVENT: Self = Self(0); + #[doc = "Only counter overflow/underflow generates an update interrupt or DMA request"] + pub const COUNTERONLY: Self = Self(0x01); + } + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] + pub struct Etps(pub u8); + impl Etps { + #[doc = "Prescaler OFF"] + pub const DIV1: Self = Self(0); + #[doc = "ETRP frequency divided by 2"] + pub const DIV2: Self = Self(0x01); + #[doc = "ETRP frequency divided by 4"] + pub const DIV4: Self = Self(0x02); + #[doc = "ETRP frequency divided by 8"] + pub const DIV8: Self = Self(0x03); + } + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] + pub struct Ece(pub u8); + impl Ece { + #[doc = "External clock mode 2 disabled"] + pub const DISABLED: Self = Self(0); + #[doc = "External clock mode 2 enabled. The counter is clocked by any active edge on the ETRF signal."] + pub const ENABLED: Self = Self(0x01); + } + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] + pub struct Dir(pub u8); + impl Dir { + #[doc = "Counter used as upcounter"] + pub const UP: Self = Self(0); + #[doc = "Counter used as downcounter"] + pub const DOWN: Self = Self(0x01); + } + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] + pub struct Sms(pub u8); + impl Sms { + #[doc = "Slave mode disabled - if CEN = ‘1 then the prescaler is clocked directly by the internal clock."] + pub const DISABLED: Self = Self(0); + #[doc = "Encoder mode 1 - Counter counts up/down on TI2FP1 edge depending on TI1FP2 level."] + pub const ENCODER_MODE_1: Self = Self(0x01); + #[doc = "Encoder mode 2 - Counter counts up/down on TI1FP2 edge depending on TI2FP1 level."] + pub const ENCODER_MODE_2: Self = Self(0x02); + #[doc = "Encoder mode 3 - Counter counts up/down on both TI1FP1 and TI2FP2 edges depending on the level of the other input."] + pub const ENCODER_MODE_3: Self = Self(0x03); + #[doc = "Reset Mode - Rising edge of the selected trigger input (TRGI) reinitializes the counter and generates an update of the registers."] + pub const RESET_MODE: Self = Self(0x04); + #[doc = "Gated Mode - The counter clock is enabled when the trigger input (TRGI) is high. The counter stops (but is not reset) as soon as the trigger becomes low. Both start and stop of the counter are controlled."] + pub const GATED_MODE: Self = Self(0x05); + #[doc = "Trigger Mode - The counter starts at a rising edge of the trigger TRGI (but it is not reset). Only the start of the counter is controlled."] + pub const TRIGGER_MODE: Self = Self(0x06); + #[doc = "External Clock Mode 1 - Rising edges of the selected trigger (TRGI) clock the counter."] + pub const EXT_CLOCK_MODE: Self = Self(0x07); + } + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] + pub struct Ossi(pub u8); + impl Ossi { + #[doc = "When inactive, OC/OCN outputs are disabled"] + pub const DISABLED: Self = Self(0); + #[doc = "When inactive, OC/OCN outputs are forced to idle level"] + pub const IDLELEVEL: Self = Self(0x01); + } + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] + pub struct Etp(pub u8); + impl Etp { + #[doc = "ETR is noninverted, active at high level or rising edge"] + pub const NOTINVERTED: Self = Self(0); + #[doc = "ETR is inverted, active at low level or falling edge"] + pub const INVERTED: Self = Self(0x01); + } + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] + pub struct Ts(pub u8); + impl Ts { + #[doc = "Internal Trigger 0 (ITR0)"] + pub const ITR0: Self = Self(0); + #[doc = "Internal Trigger 1 (ITR1)"] + pub const ITR1: Self = Self(0x01); + #[doc = "Internal Trigger 2 (ITR2)"] + pub const ITR2: Self = Self(0x02); + #[doc = "TI1 Edge Detector (TI1F_ED)"] + pub const TI1F_ED: Self = Self(0x04); + #[doc = "Filtered Timer Input 1 (TI1FP1)"] + pub const TI1FP1: Self = Self(0x05); + #[doc = "Filtered Timer Input 2 (TI2FP2)"] + pub const TI2FP2: Self = Self(0x06); + #[doc = "External Trigger input (ETRF)"] + pub const ETRF: Self = Self(0x07); + } + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] + pub struct Ccds(pub u8); + impl Ccds { + #[doc = "CCx DMA request sent when CCx event occurs"] + pub const ONCOMPARE: Self = Self(0); + #[doc = "CCx DMA request sent when update event occurs"] + pub const ONUPDATE: Self = Self(0x01); + } + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] + pub struct Cms(pub u8); + impl Cms { + #[doc = "The counter counts up or down depending on the direction bit"] + pub const EDGEALIGNED: Self = Self(0); + #[doc = "The counter counts up and down alternatively. Output compare interrupt flags are set only when the counter is counting down."] + pub const CENTERALIGNED1: Self = Self(0x01); + #[doc = "The counter counts up and down alternatively. Output compare interrupt flags are set only when the counter is counting up."] + pub const CENTERALIGNED2: Self = Self(0x02); + #[doc = "The counter counts up and down alternatively. Output compare interrupt flags are set both when the counter is counting up or down."] + pub const CENTERALIGNED3: Self = Self(0x03); + } + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] + pub struct Tis(pub u8); + impl Tis { + #[doc = "The TIMx_CH1 pin is connected to TI1 input"] + pub const NORMAL: Self = Self(0); + #[doc = "The TIMx_CH1, CH2, CH3 pins are connected to TI1 input"] + pub const XOR: Self = Self(0x01); + } + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] + pub struct CcmrInputCcs(pub u8); + impl CcmrInputCcs { + #[doc = "CCx channel is configured as input, normal mapping: ICx mapped to TIx"] + pub const TI4: Self = Self(0x01); + #[doc = "CCx channel is configured as input, alternate mapping (switches 1 with 2, 3 with 4)"] + pub const TI3: Self = Self(0x02); + #[doc = "CCx channel is configured as input, ICx is mapped on TRC"] + pub const TRC: Self = Self(0x03); + } + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] + pub struct Etf(pub u8); + impl Etf { + #[doc = "No filter, sampling is done at fDTS"] + pub const NOFILTER: Self = Self(0); + #[doc = "fSAMPLING=fCK_INT, N=2"] + pub const FCK_INT_N2: Self = Self(0x01); + #[doc = "fSAMPLING=fCK_INT, N=4"] + pub const FCK_INT_N4: Self = Self(0x02); + #[doc = "fSAMPLING=fCK_INT, N=8"] + pub const FCK_INT_N8: Self = Self(0x03); + #[doc = "fSAMPLING=fDTS/2, N=6"] + pub const FDTS_DIV2_N6: Self = Self(0x04); + #[doc = "fSAMPLING=fDTS/2, N=8"] + pub const FDTS_DIV2_N8: Self = Self(0x05); + #[doc = "fSAMPLING=fDTS/4, N=6"] + pub const FDTS_DIV4_N6: Self = Self(0x06); + #[doc = "fSAMPLING=fDTS/4, N=8"] + pub const FDTS_DIV4_N8: Self = Self(0x07); + #[doc = "fSAMPLING=fDTS/8, N=6"] + pub const FDTS_DIV8_N6: Self = Self(0x08); + #[doc = "fSAMPLING=fDTS/8, N=8"] + pub const FDTS_DIV8_N8: Self = Self(0x09); + #[doc = "fSAMPLING=fDTS/16, N=5"] + pub const FDTS_DIV16_N5: Self = Self(0x0a); + #[doc = "fSAMPLING=fDTS/16, N=6"] + pub const FDTS_DIV16_N6: Self = Self(0x0b); + #[doc = "fSAMPLING=fDTS/16, N=8"] + pub const FDTS_DIV16_N8: Self = Self(0x0c); + #[doc = "fSAMPLING=fDTS/32, N=5"] + pub const FDTS_DIV32_N5: Self = Self(0x0d); + #[doc = "fSAMPLING=fDTS/32, N=6"] + pub const FDTS_DIV32_N6: Self = Self(0x0e); + #[doc = "fSAMPLING=fDTS/32, N=8"] + pub const FDTS_DIV32_N8: Self = Self(0x0f); + } + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] + pub struct Ossr(pub u8); + impl Ossr { + #[doc = "When inactive, OC/OCN outputs are disabled"] + pub const DISABLED: Self = Self(0); + #[doc = "When inactive, OC/OCN outputs are enabled with their inactive level"] + pub const IDLELEVEL: Self = Self(0x01); + } + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] + pub struct Icf(pub u8); + impl Icf { + #[doc = "No filter, sampling is done at fDTS"] + pub const NOFILTER: Self = Self(0); + #[doc = "fSAMPLING=fCK_INT, N=2"] + pub const FCK_INT_N2: Self = Self(0x01); + #[doc = "fSAMPLING=fCK_INT, N=4"] + pub const FCK_INT_N4: Self = Self(0x02); + #[doc = "fSAMPLING=fCK_INT, N=8"] + pub const FCK_INT_N8: Self = Self(0x03); + #[doc = "fSAMPLING=fDTS/2, N=6"] + pub const FDTS_DIV2_N6: Self = Self(0x04); + #[doc = "fSAMPLING=fDTS/2, N=8"] + pub const FDTS_DIV2_N8: Self = Self(0x05); + #[doc = "fSAMPLING=fDTS/4, N=6"] + pub const FDTS_DIV4_N6: Self = Self(0x06); + #[doc = "fSAMPLING=fDTS/4, N=8"] + pub const FDTS_DIV4_N8: Self = Self(0x07); + #[doc = "fSAMPLING=fDTS/8, N=6"] + pub const FDTS_DIV8_N6: Self = Self(0x08); + #[doc = "fSAMPLING=fDTS/8, N=8"] + pub const FDTS_DIV8_N8: Self = Self(0x09); + #[doc = "fSAMPLING=fDTS/16, N=5"] + pub const FDTS_DIV16_N5: Self = Self(0x0a); + #[doc = "fSAMPLING=fDTS/16, N=6"] + pub const FDTS_DIV16_N6: Self = Self(0x0b); + #[doc = "fSAMPLING=fDTS/16, N=8"] + pub const FDTS_DIV16_N8: Self = Self(0x0c); + #[doc = "fSAMPLING=fDTS/32, N=5"] + pub const FDTS_DIV32_N5: Self = Self(0x0d); + #[doc = "fSAMPLING=fDTS/32, N=6"] + pub const FDTS_DIV32_N6: Self = Self(0x0e); + #[doc = "fSAMPLING=fDTS/32, N=8"] + pub const FDTS_DIV32_N8: Self = Self(0x0f); + } + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] + pub struct Opm(pub u8); + impl Opm { + #[doc = "Counter is not stopped at update event"] + pub const DISABLED: Self = Self(0); + #[doc = "Counter stops counting at the next update event (clearing the CEN bit)"] + pub const ENABLED: Self = Self(0x01); + } + } + pub mod regs { + use crate::generic::*; + #[doc = "slave mode control register"] + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq)] + pub struct Smcr(pub u32); + impl Smcr { + #[doc = "Slave mode selection"] + pub const fn sms(&self) -> super::vals::Sms { + let val = (self.0 >> 0usize) & 0x07; + super::vals::Sms(val as u8) + } + #[doc = "Slave mode selection"] + pub fn set_sms(&mut self, val: super::vals::Sms) { + self.0 = (self.0 & !(0x07 << 0usize)) | (((val.0 as u32) & 0x07) << 0usize); + } + #[doc = "Trigger selection"] + pub const fn ts(&self) -> super::vals::Ts { + let val = (self.0 >> 4usize) & 0x07; + super::vals::Ts(val as u8) + } + #[doc = "Trigger selection"] + pub fn set_ts(&mut self, val: super::vals::Ts) { + self.0 = (self.0 & !(0x07 << 4usize)) | (((val.0 as u32) & 0x07) << 4usize); + } + #[doc = "Master/Slave mode"] + pub const fn msm(&self) -> super::vals::Msm { + let val = (self.0 >> 7usize) & 0x01; + super::vals::Msm(val as u8) + } + #[doc = "Master/Slave mode"] + pub fn set_msm(&mut self, val: super::vals::Msm) { + self.0 = (self.0 & !(0x01 << 7usize)) | (((val.0 as u32) & 0x01) << 7usize); + } + #[doc = "External trigger filter"] + pub const fn etf(&self) -> super::vals::Etf { + let val = (self.0 >> 8usize) & 0x0f; + super::vals::Etf(val as u8) + } + #[doc = "External trigger filter"] + pub fn set_etf(&mut self, val: super::vals::Etf) { + self.0 = (self.0 & !(0x0f << 8usize)) | (((val.0 as u32) & 0x0f) << 8usize); + } + #[doc = "External trigger prescaler"] + pub const fn etps(&self) -> super::vals::Etps { + let val = (self.0 >> 12usize) & 0x03; + super::vals::Etps(val as u8) + } + #[doc = "External trigger prescaler"] + pub fn set_etps(&mut self, val: super::vals::Etps) { + self.0 = (self.0 & !(0x03 << 12usize)) | (((val.0 as u32) & 0x03) << 12usize); + } + #[doc = "External clock enable"] + pub const fn ece(&self) -> super::vals::Ece { + let val = (self.0 >> 14usize) & 0x01; + super::vals::Ece(val as u8) + } + #[doc = "External clock enable"] + pub fn set_ece(&mut self, val: super::vals::Ece) { + self.0 = (self.0 & !(0x01 << 14usize)) | (((val.0 as u32) & 0x01) << 14usize); + } + #[doc = "External trigger polarity"] + pub const fn etp(&self) -> super::vals::Etp { + let val = (self.0 >> 15usize) & 0x01; + super::vals::Etp(val as u8) + } + #[doc = "External trigger polarity"] + pub fn set_etp(&mut self, val: super::vals::Etp) { + self.0 = (self.0 & !(0x01 << 15usize)) | (((val.0 as u32) & 0x01) << 15usize); + } + } + impl Default for Smcr { + fn default() -> Smcr { + Smcr(0) + } + } + #[doc = "event generation register"] + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq)] + pub struct EgrGp(pub u32); + impl EgrGp { + #[doc = "Update generation"] + pub const fn ug(&self) -> bool { + let val = (self.0 >> 0usize) & 0x01; + val != 0 + } + #[doc = "Update generation"] + pub fn set_ug(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize); + } + #[doc = "Capture/compare 1 generation"] + pub fn ccg(&self, n: usize) -> bool { + assert!(n < 4usize); + let offs = 1usize + n * 1usize; + let val = (self.0 >> offs) & 0x01; + val != 0 + } + #[doc = "Capture/compare 1 generation"] + pub fn set_ccg(&mut self, n: usize, val: bool) { + assert!(n < 4usize); + let offs = 1usize + n * 1usize; + self.0 = (self.0 & !(0x01 << offs)) | (((val as u32) & 0x01) << offs); + } + #[doc = "Capture/Compare control update generation"] + pub const fn comg(&self) -> bool { + let val = (self.0 >> 5usize) & 0x01; + val != 0 + } + #[doc = "Capture/Compare control update generation"] + pub fn set_comg(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 5usize)) | (((val as u32) & 0x01) << 5usize); + } + #[doc = "Trigger generation"] + pub const fn tg(&self) -> bool { + let val = (self.0 >> 6usize) & 0x01; + val != 0 + } + #[doc = "Trigger generation"] + pub fn set_tg(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 6usize)) | (((val as u32) & 0x01) << 6usize); + } + #[doc = "Break generation"] + pub const fn bg(&self) -> bool { + let val = (self.0 >> 7usize) & 0x01; + val != 0 + } + #[doc = "Break generation"] + pub fn set_bg(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 7usize)) | (((val as u32) & 0x01) << 7usize); + } + } + impl Default for EgrGp { + fn default() -> EgrGp { + EgrGp(0) + } + } + #[doc = "auto-reload register"] + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq)] + pub struct Arr16(pub u32); + impl Arr16 { + #[doc = "Auto-reload value"] + pub const fn arr(&self) -> u16 { + let val = (self.0 >> 0usize) & 0xffff; + val as u16 + } + #[doc = "Auto-reload value"] + pub fn set_arr(&mut self, val: u16) { + self.0 = (self.0 & !(0xffff << 0usize)) | (((val as u32) & 0xffff) << 0usize); + } + } + impl Default for Arr16 { + fn default() -> Arr16 { + Arr16(0) + } + } + #[doc = "capture/compare mode register 1 (input mode)"] + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq)] + pub struct CcmrInput(pub u32); + impl CcmrInput { + #[doc = "Capture/Compare 1 selection"] + pub fn ccs(&self, n: usize) -> super::vals::CcmrInputCcs { + assert!(n < 2usize); + let offs = 0usize + n * 8usize; + let val = (self.0 >> offs) & 0x03; + super::vals::CcmrInputCcs(val as u8) + } + #[doc = "Capture/Compare 1 selection"] + pub fn set_ccs(&mut self, n: usize, val: super::vals::CcmrInputCcs) { + assert!(n < 2usize); + let offs = 0usize + n * 8usize; + self.0 = (self.0 & !(0x03 << offs)) | (((val.0 as u32) & 0x03) << offs); + } + #[doc = "Input capture 1 prescaler"] + pub fn icpsc(&self, n: usize) -> u8 { + assert!(n < 2usize); + let offs = 2usize + n * 8usize; + let val = (self.0 >> offs) & 0x03; + val as u8 + } + #[doc = "Input capture 1 prescaler"] + pub fn set_icpsc(&mut self, n: usize, val: u8) { + assert!(n < 2usize); + let offs = 2usize + n * 8usize; + self.0 = (self.0 & !(0x03 << offs)) | (((val as u32) & 0x03) << offs); + } + #[doc = "Input capture 1 filter"] + pub fn icf(&self, n: usize) -> super::vals::Icf { + assert!(n < 2usize); + let offs = 4usize + n * 8usize; + let val = (self.0 >> offs) & 0x0f; + super::vals::Icf(val as u8) + } + #[doc = "Input capture 1 filter"] + pub fn set_icf(&mut self, n: usize, val: super::vals::Icf) { + assert!(n < 2usize); + let offs = 4usize + n * 8usize; + self.0 = (self.0 & !(0x0f << offs)) | (((val.0 as u32) & 0x0f) << offs); + } + } + impl Default for CcmrInput { + fn default() -> CcmrInput { + CcmrInput(0) + } + } + #[doc = "repetition counter register"] + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq)] + pub struct Rcr(pub u32); + impl Rcr { + #[doc = "Repetition counter value"] + pub const fn rep(&self) -> u8 { + let val = (self.0 >> 0usize) & 0xff; + val as u8 + } + #[doc = "Repetition counter value"] + pub fn set_rep(&mut self, val: u8) { + self.0 = (self.0 & !(0xff << 0usize)) | (((val as u32) & 0xff) << 0usize); + } + } + impl Default for Rcr { + fn default() -> Rcr { + Rcr(0) + } + } + #[doc = "capture/compare register 1"] + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq)] + pub struct Ccr32(pub u32); + impl Ccr32 { + #[doc = "Capture/Compare 1 value"] + pub const fn ccr(&self) -> u32 { let val = (self.0 >> 0usize) & 0xffff_ffff; val as u32 } - #[doc = "see Table404."] - pub fn set_cardstatus3(&mut self, val: u32) { + #[doc = "Capture/Compare 1 value"] + pub fn set_ccr(&mut self, val: u32) { self.0 = (self.0 & !(0xffff_ffff << 0usize)) | (((val as u32) & 0xffff_ffff) << 0usize); } } - impl Default for Resp3r { - fn default() -> Resp3r { - Resp3r(0) + impl Default for Ccr32 { + fn default() -> Ccr32 { + Ccr32(0) } } + #[doc = "status register"] + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq)] + pub struct SrGp(pub u32); + impl SrGp { + #[doc = "Update interrupt flag"] + pub const fn uif(&self) -> bool { + let val = (self.0 >> 0usize) & 0x01; + val != 0 + } + #[doc = "Update interrupt flag"] + pub fn set_uif(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize); + } + #[doc = "Capture/compare 1 interrupt flag"] + pub fn ccif(&self, n: usize) -> bool { + assert!(n < 4usize); + let offs = 1usize + n * 1usize; + let val = (self.0 >> offs) & 0x01; + val != 0 + } + #[doc = "Capture/compare 1 interrupt flag"] + pub fn set_ccif(&mut self, n: usize, val: bool) { + assert!(n < 4usize); + let offs = 1usize + n * 1usize; + self.0 = (self.0 & !(0x01 << offs)) | (((val as u32) & 0x01) << offs); + } + #[doc = "COM interrupt flag"] + pub const fn comif(&self) -> bool { + let val = (self.0 >> 5usize) & 0x01; + val != 0 + } + #[doc = "COM interrupt flag"] + pub fn set_comif(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 5usize)) | (((val as u32) & 0x01) << 5usize); + } + #[doc = "Trigger interrupt flag"] + pub const fn tif(&self) -> bool { + let val = (self.0 >> 6usize) & 0x01; + val != 0 + } + #[doc = "Trigger interrupt flag"] + pub fn set_tif(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 6usize)) | (((val as u32) & 0x01) << 6usize); + } + #[doc = "Break interrupt flag"] + pub const fn bif(&self) -> bool { + let val = (self.0 >> 7usize) & 0x01; + val != 0 + } + #[doc = "Break interrupt flag"] + pub fn set_bif(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 7usize)) | (((val as u32) & 0x01) << 7usize); + } + #[doc = "Capture/Compare 1 overcapture flag"] + pub fn ccof(&self, n: usize) -> bool { + assert!(n < 4usize); + let offs = 9usize + n * 1usize; + let val = (self.0 >> offs) & 0x01; + val != 0 + } + #[doc = "Capture/Compare 1 overcapture flag"] + pub fn set_ccof(&mut self, n: usize, val: bool) { + assert!(n < 4usize); + let offs = 9usize + n * 1usize; + self.0 = (self.0 & !(0x01 << offs)) | (((val as u32) & 0x01) << offs); + } + } + impl Default for SrGp { + fn default() -> SrGp { + SrGp(0) + } + } + #[doc = "control register 1"] + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq)] + pub struct Cr1Basic(pub u32); + impl Cr1Basic { + #[doc = "Counter enable"] + pub const fn cen(&self) -> bool { + let val = (self.0 >> 0usize) & 0x01; + val != 0 + } + #[doc = "Counter enable"] + pub fn set_cen(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize); + } + #[doc = "Update disable"] + pub const fn udis(&self) -> bool { + let val = (self.0 >> 1usize) & 0x01; + val != 0 + } + #[doc = "Update disable"] + pub fn set_udis(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 1usize)) | (((val as u32) & 0x01) << 1usize); + } + #[doc = "Update request source"] + pub const fn urs(&self) -> super::vals::Urs { + let val = (self.0 >> 2usize) & 0x01; + super::vals::Urs(val as u8) + } + #[doc = "Update request source"] + pub fn set_urs(&mut self, val: super::vals::Urs) { + self.0 = (self.0 & !(0x01 << 2usize)) | (((val.0 as u32) & 0x01) << 2usize); + } + #[doc = "One-pulse mode"] + pub const fn opm(&self) -> super::vals::Opm { + let val = (self.0 >> 3usize) & 0x01; + super::vals::Opm(val as u8) + } + #[doc = "One-pulse mode"] + pub fn set_opm(&mut self, val: super::vals::Opm) { + self.0 = (self.0 & !(0x01 << 3usize)) | (((val.0 as u32) & 0x01) << 3usize); + } + #[doc = "Auto-reload preload enable"] + pub const fn arpe(&self) -> super::vals::Arpe { + let val = (self.0 >> 7usize) & 0x01; + super::vals::Arpe(val as u8) + } + #[doc = "Auto-reload preload enable"] + pub fn set_arpe(&mut self, val: super::vals::Arpe) { + self.0 = (self.0 & !(0x01 << 7usize)) | (((val.0 as u32) & 0x01) << 7usize); + } + } + impl Default for Cr1Basic { + fn default() -> Cr1Basic { + Cr1Basic(0) + } + } + #[doc = "control register 2"] + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq)] + pub struct Cr2Adv(pub u32); + impl Cr2Adv { + #[doc = "Capture/compare preloaded control"] + pub const fn ccpc(&self) -> bool { + let val = (self.0 >> 0usize) & 0x01; + val != 0 + } + #[doc = "Capture/compare preloaded control"] + pub fn set_ccpc(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize); + } + #[doc = "Capture/compare control update selection"] + pub const fn ccus(&self) -> bool { + let val = (self.0 >> 2usize) & 0x01; + val != 0 + } + #[doc = "Capture/compare control update selection"] + pub fn set_ccus(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 2usize)) | (((val as u32) & 0x01) << 2usize); + } + #[doc = "Capture/compare DMA selection"] + pub const fn ccds(&self) -> super::vals::Ccds { + let val = (self.0 >> 3usize) & 0x01; + super::vals::Ccds(val as u8) + } + #[doc = "Capture/compare DMA selection"] + pub fn set_ccds(&mut self, val: super::vals::Ccds) { + self.0 = (self.0 & !(0x01 << 3usize)) | (((val.0 as u32) & 0x01) << 3usize); + } + #[doc = "Master mode selection"] + pub const fn mms(&self) -> super::vals::Mms { + let val = (self.0 >> 4usize) & 0x07; + super::vals::Mms(val as u8) + } + #[doc = "Master mode selection"] + pub fn set_mms(&mut self, val: super::vals::Mms) { + self.0 = (self.0 & !(0x07 << 4usize)) | (((val.0 as u32) & 0x07) << 4usize); + } + #[doc = "TI1 selection"] + pub const fn ti1s(&self) -> super::vals::Tis { + let val = (self.0 >> 7usize) & 0x01; + super::vals::Tis(val as u8) + } + #[doc = "TI1 selection"] + pub fn set_ti1s(&mut self, val: super::vals::Tis) { + self.0 = (self.0 & !(0x01 << 7usize)) | (((val.0 as u32) & 0x01) << 7usize); + } + #[doc = "Output Idle state 1"] + pub fn ois(&self, n: usize) -> bool { + assert!(n < 4usize); + let offs = 8usize + n * 2usize; + let val = (self.0 >> offs) & 0x01; + val != 0 + } + #[doc = "Output Idle state 1"] + pub fn set_ois(&mut self, n: usize, val: bool) { + assert!(n < 4usize); + let offs = 8usize + n * 2usize; + self.0 = (self.0 & !(0x01 << offs)) | (((val as u32) & 0x01) << offs); + } + #[doc = "Output Idle state 1"] + pub const fn ois1n(&self) -> bool { + let val = (self.0 >> 9usize) & 0x01; + val != 0 + } + #[doc = "Output Idle state 1"] + pub fn set_ois1n(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 9usize)) | (((val as u32) & 0x01) << 9usize); + } + #[doc = "Output Idle state 2"] + pub const fn ois2n(&self) -> bool { + let val = (self.0 >> 11usize) & 0x01; + val != 0 + } + #[doc = "Output Idle state 2"] + pub fn set_ois2n(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 11usize)) | (((val as u32) & 0x01) << 11usize); + } + #[doc = "Output Idle state 3"] + pub const fn ois3n(&self) -> bool { + let val = (self.0 >> 13usize) & 0x01; + val != 0 + } + #[doc = "Output Idle state 3"] + pub fn set_ois3n(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 13usize)) | (((val as u32) & 0x01) << 13usize); + } + } + impl Default for Cr2Adv { + fn default() -> Cr2Adv { + Cr2Adv(0) + } + } + #[doc = "control register 2"] + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq)] + pub struct Cr2Gp(pub u32); + impl Cr2Gp { + #[doc = "Capture/compare DMA selection"] + pub const fn ccds(&self) -> super::vals::Ccds { + let val = (self.0 >> 3usize) & 0x01; + super::vals::Ccds(val as u8) + } + #[doc = "Capture/compare DMA selection"] + pub fn set_ccds(&mut self, val: super::vals::Ccds) { + self.0 = (self.0 & !(0x01 << 3usize)) | (((val.0 as u32) & 0x01) << 3usize); + } + #[doc = "Master mode selection"] + pub const fn mms(&self) -> super::vals::Mms { + let val = (self.0 >> 4usize) & 0x07; + super::vals::Mms(val as u8) + } + #[doc = "Master mode selection"] + pub fn set_mms(&mut self, val: super::vals::Mms) { + self.0 = (self.0 & !(0x07 << 4usize)) | (((val.0 as u32) & 0x07) << 4usize); + } + #[doc = "TI1 selection"] + pub const fn ti1s(&self) -> super::vals::Tis { + let val = (self.0 >> 7usize) & 0x01; + super::vals::Tis(val as u8) + } + #[doc = "TI1 selection"] + pub fn set_ti1s(&mut self, val: super::vals::Tis) { + self.0 = (self.0 & !(0x01 << 7usize)) | (((val.0 as u32) & 0x01) << 7usize); + } + } + impl Default for Cr2Gp { + fn default() -> Cr2Gp { + Cr2Gp(0) + } + } + #[doc = "capture/compare register 1"] + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq)] + pub struct Ccr16(pub u32); + impl Ccr16 { + #[doc = "Capture/Compare 1 value"] + pub const fn ccr(&self) -> u16 { + let val = (self.0 >> 0usize) & 0xffff; + val as u16 + } + #[doc = "Capture/Compare 1 value"] + pub fn set_ccr(&mut self, val: u16) { + self.0 = (self.0 & !(0xffff << 0usize)) | (((val as u32) & 0xffff) << 0usize); + } + } + impl Default for Ccr16 { + fn default() -> Ccr16 { + Ccr16(0) + } + } + #[doc = "DMA/Interrupt enable register"] + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq)] + pub struct DierBasic(pub u32); + impl DierBasic { + #[doc = "Update interrupt enable"] + pub const fn uie(&self) -> bool { + let val = (self.0 >> 0usize) & 0x01; + val != 0 + } + #[doc = "Update interrupt enable"] + pub fn set_uie(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize); + } + #[doc = "Update DMA request enable"] + pub const fn ude(&self) -> bool { + let val = (self.0 >> 8usize) & 0x01; + val != 0 + } + #[doc = "Update DMA request enable"] + pub fn set_ude(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 8usize)) | (((val as u32) & 0x01) << 8usize); + } + } + impl Default for DierBasic { + fn default() -> DierBasic { + DierBasic(0) + } + } + #[doc = "counter"] + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq)] + pub struct Cnt32(pub u32); + impl Cnt32 { + #[doc = "counter value"] + pub const fn cnt(&self) -> u32 { + let val = (self.0 >> 0usize) & 0xffff_ffff; + val as u32 + } + #[doc = "counter value"] + pub fn set_cnt(&mut self, val: u32) { + self.0 = + (self.0 & !(0xffff_ffff << 0usize)) | (((val as u32) & 0xffff_ffff) << 0usize); + } + } + impl Default for Cnt32 { + fn default() -> Cnt32 { + Cnt32(0) + } + } + #[doc = "capture/compare mode register 2 (output mode)"] + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq)] + pub struct CcmrOutput(pub u32); + impl CcmrOutput { + #[doc = "Capture/Compare 3 selection"] + pub fn ccs(&self, n: usize) -> super::vals::CcmrOutputCcs { + assert!(n < 2usize); + let offs = 0usize + n * 8usize; + let val = (self.0 >> offs) & 0x03; + super::vals::CcmrOutputCcs(val as u8) + } + #[doc = "Capture/Compare 3 selection"] + pub fn set_ccs(&mut self, n: usize, val: super::vals::CcmrOutputCcs) { + assert!(n < 2usize); + let offs = 0usize + n * 8usize; + self.0 = (self.0 & !(0x03 << offs)) | (((val.0 as u32) & 0x03) << offs); + } + #[doc = "Output compare 3 fast enable"] + pub fn ocfe(&self, n: usize) -> bool { + assert!(n < 2usize); + let offs = 2usize + n * 8usize; + let val = (self.0 >> offs) & 0x01; + val != 0 + } + #[doc = "Output compare 3 fast enable"] + pub fn set_ocfe(&mut self, n: usize, val: bool) { + assert!(n < 2usize); + let offs = 2usize + n * 8usize; + self.0 = (self.0 & !(0x01 << offs)) | (((val as u32) & 0x01) << offs); + } + #[doc = "Output compare 3 preload enable"] + pub fn ocpe(&self, n: usize) -> super::vals::Ocpe { + assert!(n < 2usize); + let offs = 3usize + n * 8usize; + let val = (self.0 >> offs) & 0x01; + super::vals::Ocpe(val as u8) + } + #[doc = "Output compare 3 preload enable"] + pub fn set_ocpe(&mut self, n: usize, val: super::vals::Ocpe) { + assert!(n < 2usize); + let offs = 3usize + n * 8usize; + self.0 = (self.0 & !(0x01 << offs)) | (((val.0 as u32) & 0x01) << offs); + } + #[doc = "Output compare 3 mode"] + pub fn ocm(&self, n: usize) -> super::vals::Ocm { + assert!(n < 2usize); + let offs = 4usize + n * 8usize; + let val = (self.0 >> offs) & 0x07; + super::vals::Ocm(val as u8) + } + #[doc = "Output compare 3 mode"] + pub fn set_ocm(&mut self, n: usize, val: super::vals::Ocm) { + assert!(n < 2usize); + let offs = 4usize + n * 8usize; + self.0 = (self.0 & !(0x07 << offs)) | (((val.0 as u32) & 0x07) << offs); + } + #[doc = "Output compare 3 clear enable"] + pub fn occe(&self, n: usize) -> bool { + assert!(n < 2usize); + let offs = 7usize + n * 8usize; + let val = (self.0 >> offs) & 0x01; + val != 0 + } + #[doc = "Output compare 3 clear enable"] + pub fn set_occe(&mut self, n: usize, val: bool) { + assert!(n < 2usize); + let offs = 7usize + n * 8usize; + self.0 = (self.0 & !(0x01 << offs)) | (((val as u32) & 0x01) << offs); + } + } + impl Default for CcmrOutput { + fn default() -> CcmrOutput { + CcmrOutput(0) + } + } + #[doc = "control register 1"] + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq)] + pub struct Cr1Gp(pub u32); + impl Cr1Gp { + #[doc = "Counter enable"] + pub const fn cen(&self) -> bool { + let val = (self.0 >> 0usize) & 0x01; + val != 0 + } + #[doc = "Counter enable"] + pub fn set_cen(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize); + } + #[doc = "Update disable"] + pub const fn udis(&self) -> bool { + let val = (self.0 >> 1usize) & 0x01; + val != 0 + } + #[doc = "Update disable"] + pub fn set_udis(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 1usize)) | (((val as u32) & 0x01) << 1usize); + } + #[doc = "Update request source"] + pub const fn urs(&self) -> super::vals::Urs { + let val = (self.0 >> 2usize) & 0x01; + super::vals::Urs(val as u8) + } + #[doc = "Update request source"] + pub fn set_urs(&mut self, val: super::vals::Urs) { + self.0 = (self.0 & !(0x01 << 2usize)) | (((val.0 as u32) & 0x01) << 2usize); + } + #[doc = "One-pulse mode"] + pub const fn opm(&self) -> super::vals::Opm { + let val = (self.0 >> 3usize) & 0x01; + super::vals::Opm(val as u8) + } + #[doc = "One-pulse mode"] + pub fn set_opm(&mut self, val: super::vals::Opm) { + self.0 = (self.0 & !(0x01 << 3usize)) | (((val.0 as u32) & 0x01) << 3usize); + } + #[doc = "Direction"] + pub const fn dir(&self) -> super::vals::Dir { + let val = (self.0 >> 4usize) & 0x01; + super::vals::Dir(val as u8) + } + #[doc = "Direction"] + pub fn set_dir(&mut self, val: super::vals::Dir) { + self.0 = (self.0 & !(0x01 << 4usize)) | (((val.0 as u32) & 0x01) << 4usize); + } + #[doc = "Center-aligned mode selection"] + pub const fn cms(&self) -> super::vals::Cms { + let val = (self.0 >> 5usize) & 0x03; + super::vals::Cms(val as u8) + } + #[doc = "Center-aligned mode selection"] + pub fn set_cms(&mut self, val: super::vals::Cms) { + self.0 = (self.0 & !(0x03 << 5usize)) | (((val.0 as u32) & 0x03) << 5usize); + } + #[doc = "Auto-reload preload enable"] + pub const fn arpe(&self) -> super::vals::Arpe { + let val = (self.0 >> 7usize) & 0x01; + super::vals::Arpe(val as u8) + } + #[doc = "Auto-reload preload enable"] + pub fn set_arpe(&mut self, val: super::vals::Arpe) { + self.0 = (self.0 & !(0x01 << 7usize)) | (((val.0 as u32) & 0x01) << 7usize); + } + #[doc = "Clock division"] + pub const fn ckd(&self) -> super::vals::Ckd { + let val = (self.0 >> 8usize) & 0x03; + super::vals::Ckd(val as u8) + } + #[doc = "Clock division"] + pub fn set_ckd(&mut self, val: super::vals::Ckd) { + self.0 = (self.0 & !(0x03 << 8usize)) | (((val.0 as u32) & 0x03) << 8usize); + } + } + impl Default for Cr1Gp { + fn default() -> Cr1Gp { + Cr1Gp(0) + } + } + #[doc = "status register"] + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq)] + pub struct SrAdv(pub u32); + impl SrAdv { + #[doc = "Update interrupt flag"] + pub const fn uif(&self) -> bool { + let val = (self.0 >> 0usize) & 0x01; + val != 0 + } + #[doc = "Update interrupt flag"] + pub fn set_uif(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize); + } + #[doc = "Capture/compare 1 interrupt flag"] + pub fn ccif(&self, n: usize) -> bool { + assert!(n < 4usize); + let offs = 1usize + n * 1usize; + let val = (self.0 >> offs) & 0x01; + val != 0 + } + #[doc = "Capture/compare 1 interrupt flag"] + pub fn set_ccif(&mut self, n: usize, val: bool) { + assert!(n < 4usize); + let offs = 1usize + n * 1usize; + self.0 = (self.0 & !(0x01 << offs)) | (((val as u32) & 0x01) << offs); + } + #[doc = "COM interrupt flag"] + pub const fn comif(&self) -> bool { + let val = (self.0 >> 5usize) & 0x01; + val != 0 + } + #[doc = "COM interrupt flag"] + pub fn set_comif(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 5usize)) | (((val as u32) & 0x01) << 5usize); + } + #[doc = "Trigger interrupt flag"] + pub const fn tif(&self) -> bool { + let val = (self.0 >> 6usize) & 0x01; + val != 0 + } + #[doc = "Trigger interrupt flag"] + pub fn set_tif(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 6usize)) | (((val as u32) & 0x01) << 6usize); + } + #[doc = "Break interrupt flag"] + pub const fn bif(&self) -> bool { + let val = (self.0 >> 7usize) & 0x01; + val != 0 + } + #[doc = "Break interrupt flag"] + pub fn set_bif(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 7usize)) | (((val as u32) & 0x01) << 7usize); + } + #[doc = "Capture/Compare 1 overcapture flag"] + pub fn ccof(&self, n: usize) -> bool { + assert!(n < 4usize); + let offs = 9usize + n * 1usize; + let val = (self.0 >> offs) & 0x01; + val != 0 + } + #[doc = "Capture/Compare 1 overcapture flag"] + pub fn set_ccof(&mut self, n: usize, val: bool) { + assert!(n < 4usize); + let offs = 9usize + n * 1usize; + self.0 = (self.0 & !(0x01 << offs)) | (((val as u32) & 0x01) << offs); + } + } + impl Default for SrAdv { + fn default() -> SrAdv { + SrAdv(0) + } + } + #[doc = "control register 2"] + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq)] + pub struct Cr2Basic(pub u32); + impl Cr2Basic { + #[doc = "Master mode selection"] + pub const fn mms(&self) -> super::vals::Mms { + let val = (self.0 >> 4usize) & 0x07; + super::vals::Mms(val as u8) + } + #[doc = "Master mode selection"] + pub fn set_mms(&mut self, val: super::vals::Mms) { + self.0 = (self.0 & !(0x07 << 4usize)) | (((val.0 as u32) & 0x07) << 4usize); + } + } + impl Default for Cr2Basic { + fn default() -> Cr2Basic { + Cr2Basic(0) + } + } + #[doc = "capture/compare enable register"] + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq)] + pub struct CcerAdv(pub u32); + impl CcerAdv { + #[doc = "Capture/Compare 1 output enable"] + pub fn cce(&self, n: usize) -> bool { + assert!(n < 4usize); + let offs = 0usize + n * 4usize; + let val = (self.0 >> offs) & 0x01; + val != 0 + } + #[doc = "Capture/Compare 1 output enable"] + pub fn set_cce(&mut self, n: usize, val: bool) { + assert!(n < 4usize); + let offs = 0usize + n * 4usize; + self.0 = (self.0 & !(0x01 << offs)) | (((val as u32) & 0x01) << offs); + } + #[doc = "Capture/Compare 1 output Polarity"] + pub fn ccp(&self, n: usize) -> bool { + assert!(n < 4usize); + let offs = 1usize + n * 4usize; + let val = (self.0 >> offs) & 0x01; + val != 0 + } + #[doc = "Capture/Compare 1 output Polarity"] + pub fn set_ccp(&mut self, n: usize, val: bool) { + assert!(n < 4usize); + let offs = 1usize + n * 4usize; + self.0 = (self.0 & !(0x01 << offs)) | (((val as u32) & 0x01) << offs); + } + #[doc = "Capture/Compare 1 complementary output enable"] + pub fn ccne(&self, n: usize) -> bool { + assert!(n < 4usize); + let offs = 2usize + n * 4usize; + let val = (self.0 >> offs) & 0x01; + val != 0 + } + #[doc = "Capture/Compare 1 complementary output enable"] + pub fn set_ccne(&mut self, n: usize, val: bool) { + assert!(n < 4usize); + let offs = 2usize + n * 4usize; + self.0 = (self.0 & !(0x01 << offs)) | (((val as u32) & 0x01) << offs); + } + #[doc = "Capture/Compare 1 output Polarity"] + pub fn ccnp(&self, n: usize) -> bool { + assert!(n < 4usize); + let offs = 3usize + n * 4usize; + let val = (self.0 >> offs) & 0x01; + val != 0 + } + #[doc = "Capture/Compare 1 output Polarity"] + pub fn set_ccnp(&mut self, n: usize, val: bool) { + assert!(n < 4usize); + let offs = 3usize + n * 4usize; + self.0 = (self.0 & !(0x01 << offs)) | (((val as u32) & 0x01) << offs); + } + } + impl Default for CcerAdv { + fn default() -> CcerAdv { + CcerAdv(0) + } + } + #[doc = "DMA control register"] + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq)] + pub struct Dcr(pub u32); + impl Dcr { + #[doc = "DMA base address"] + pub const fn dba(&self) -> u8 { + let val = (self.0 >> 0usize) & 0x1f; + val as u8 + } + #[doc = "DMA base address"] + pub fn set_dba(&mut self, val: u8) { + self.0 = (self.0 & !(0x1f << 0usize)) | (((val as u32) & 0x1f) << 0usize); + } + #[doc = "DMA burst length"] + pub const fn dbl(&self) -> u8 { + let val = (self.0 >> 8usize) & 0x1f; + val as u8 + } + #[doc = "DMA burst length"] + pub fn set_dbl(&mut self, val: u8) { + self.0 = (self.0 & !(0x1f << 8usize)) | (((val as u32) & 0x1f) << 8usize); + } + } + impl Default for Dcr { + fn default() -> Dcr { + Dcr(0) + } + } + #[doc = "DMA/Interrupt enable register"] + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq)] + pub struct DierAdv(pub u32); + impl DierAdv { + #[doc = "Update interrupt enable"] + pub const fn uie(&self) -> bool { + let val = (self.0 >> 0usize) & 0x01; + val != 0 + } + #[doc = "Update interrupt enable"] + pub fn set_uie(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize); + } + #[doc = "Capture/Compare 1 interrupt enable"] + pub fn ccie(&self, n: usize) -> bool { + assert!(n < 4usize); + let offs = 1usize + n * 1usize; + let val = (self.0 >> offs) & 0x01; + val != 0 + } + #[doc = "Capture/Compare 1 interrupt enable"] + pub fn set_ccie(&mut self, n: usize, val: bool) { + assert!(n < 4usize); + let offs = 1usize + n * 1usize; + self.0 = (self.0 & !(0x01 << offs)) | (((val as u32) & 0x01) << offs); + } + #[doc = "COM interrupt enable"] + pub const fn comie(&self) -> bool { + let val = (self.0 >> 5usize) & 0x01; + val != 0 + } + #[doc = "COM interrupt enable"] + pub fn set_comie(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 5usize)) | (((val as u32) & 0x01) << 5usize); + } + #[doc = "Trigger interrupt enable"] + pub const fn tie(&self) -> bool { + let val = (self.0 >> 6usize) & 0x01; + val != 0 + } + #[doc = "Trigger interrupt enable"] + pub fn set_tie(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 6usize)) | (((val as u32) & 0x01) << 6usize); + } + #[doc = "Break interrupt enable"] + pub const fn bie(&self) -> bool { + let val = (self.0 >> 7usize) & 0x01; + val != 0 + } + #[doc = "Break interrupt enable"] + pub fn set_bie(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 7usize)) | (((val as u32) & 0x01) << 7usize); + } + #[doc = "Update DMA request enable"] + pub const fn ude(&self) -> bool { + let val = (self.0 >> 8usize) & 0x01; + val != 0 + } + #[doc = "Update DMA request enable"] + pub fn set_ude(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 8usize)) | (((val as u32) & 0x01) << 8usize); + } + #[doc = "Capture/Compare 1 DMA request enable"] + pub fn ccde(&self, n: usize) -> bool { + assert!(n < 4usize); + let offs = 9usize + n * 1usize; + let val = (self.0 >> offs) & 0x01; + val != 0 + } + #[doc = "Capture/Compare 1 DMA request enable"] + pub fn set_ccde(&mut self, n: usize, val: bool) { + assert!(n < 4usize); + let offs = 9usize + n * 1usize; + self.0 = (self.0 & !(0x01 << offs)) | (((val as u32) & 0x01) << offs); + } + #[doc = "COM DMA request enable"] + pub const fn comde(&self) -> bool { + let val = (self.0 >> 13usize) & 0x01; + val != 0 + } + #[doc = "COM DMA request enable"] + pub fn set_comde(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 13usize)) | (((val as u32) & 0x01) << 13usize); + } + #[doc = "Trigger DMA request enable"] + pub const fn tde(&self) -> bool { + let val = (self.0 >> 14usize) & 0x01; + val != 0 + } + #[doc = "Trigger DMA request enable"] + pub fn set_tde(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 14usize)) | (((val as u32) & 0x01) << 14usize); + } + } + impl Default for DierAdv { + fn default() -> DierAdv { + DierAdv(0) + } + } + #[doc = "break and dead-time register"] + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq)] + pub struct Bdtr(pub u32); + impl Bdtr { + #[doc = "Dead-time generator setup"] + pub const fn dtg(&self) -> u8 { + let val = (self.0 >> 0usize) & 0xff; + val as u8 + } + #[doc = "Dead-time generator setup"] + pub fn set_dtg(&mut self, val: u8) { + self.0 = (self.0 & !(0xff << 0usize)) | (((val as u32) & 0xff) << 0usize); + } + #[doc = "Lock configuration"] + pub const fn lock(&self) -> u8 { + let val = (self.0 >> 8usize) & 0x03; + val as u8 + } + #[doc = "Lock configuration"] + pub fn set_lock(&mut self, val: u8) { + self.0 = (self.0 & !(0x03 << 8usize)) | (((val as u32) & 0x03) << 8usize); + } + #[doc = "Off-state selection for Idle mode"] + pub const fn ossi(&self) -> super::vals::Ossi { + let val = (self.0 >> 10usize) & 0x01; + super::vals::Ossi(val as u8) + } + #[doc = "Off-state selection for Idle mode"] + pub fn set_ossi(&mut self, val: super::vals::Ossi) { + self.0 = (self.0 & !(0x01 << 10usize)) | (((val.0 as u32) & 0x01) << 10usize); + } + #[doc = "Off-state selection for Run mode"] + pub const fn ossr(&self) -> super::vals::Ossr { + let val = (self.0 >> 11usize) & 0x01; + super::vals::Ossr(val as u8) + } + #[doc = "Off-state selection for Run mode"] + pub fn set_ossr(&mut self, val: super::vals::Ossr) { + self.0 = (self.0 & !(0x01 << 11usize)) | (((val.0 as u32) & 0x01) << 11usize); + } + #[doc = "Break enable"] + pub const fn bke(&self) -> bool { + let val = (self.0 >> 12usize) & 0x01; + val != 0 + } + #[doc = "Break enable"] + pub fn set_bke(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 12usize)) | (((val as u32) & 0x01) << 12usize); + } + #[doc = "Break polarity"] + pub const fn bkp(&self) -> bool { + let val = (self.0 >> 13usize) & 0x01; + val != 0 + } + #[doc = "Break polarity"] + pub fn set_bkp(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 13usize)) | (((val as u32) & 0x01) << 13usize); + } + #[doc = "Automatic output enable"] + pub const fn aoe(&self) -> bool { + let val = (self.0 >> 14usize) & 0x01; + val != 0 + } + #[doc = "Automatic output enable"] + pub fn set_aoe(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 14usize)) | (((val as u32) & 0x01) << 14usize); + } + #[doc = "Main output enable"] + pub const fn moe(&self) -> bool { + let val = (self.0 >> 15usize) & 0x01; + val != 0 + } + #[doc = "Main output enable"] + pub fn set_moe(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 15usize)) | (((val as u32) & 0x01) << 15usize); + } + } + impl Default for Bdtr { + fn default() -> Bdtr { + Bdtr(0) + } + } + #[doc = "event generation register"] + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq)] + pub struct EgrAdv(pub u32); + impl EgrAdv { + #[doc = "Update generation"] + pub const fn ug(&self) -> bool { + let val = (self.0 >> 0usize) & 0x01; + val != 0 + } + #[doc = "Update generation"] + pub fn set_ug(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize); + } + #[doc = "Capture/compare 1 generation"] + pub fn ccg(&self, n: usize) -> bool { + assert!(n < 4usize); + let offs = 1usize + n * 1usize; + let val = (self.0 >> offs) & 0x01; + val != 0 + } + #[doc = "Capture/compare 1 generation"] + pub fn set_ccg(&mut self, n: usize, val: bool) { + assert!(n < 4usize); + let offs = 1usize + n * 1usize; + self.0 = (self.0 & !(0x01 << offs)) | (((val as u32) & 0x01) << offs); + } + #[doc = "Capture/Compare control update generation"] + pub const fn comg(&self) -> bool { + let val = (self.0 >> 5usize) & 0x01; + val != 0 + } + #[doc = "Capture/Compare control update generation"] + pub fn set_comg(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 5usize)) | (((val as u32) & 0x01) << 5usize); + } + #[doc = "Trigger generation"] + pub const fn tg(&self) -> bool { + let val = (self.0 >> 6usize) & 0x01; + val != 0 + } + #[doc = "Trigger generation"] + pub fn set_tg(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 6usize)) | (((val as u32) & 0x01) << 6usize); + } + #[doc = "Break generation"] + pub const fn bg(&self) -> bool { + let val = (self.0 >> 7usize) & 0x01; + val != 0 + } + #[doc = "Break generation"] + pub fn set_bg(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 7usize)) | (((val as u32) & 0x01) << 7usize); + } + } + impl Default for EgrAdv { + fn default() -> EgrAdv { + EgrAdv(0) + } + } + #[doc = "status register"] + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq)] + pub struct SrBasic(pub u32); + impl SrBasic { + #[doc = "Update interrupt flag"] + pub const fn uif(&self) -> bool { + let val = (self.0 >> 0usize) & 0x01; + val != 0 + } + #[doc = "Update interrupt flag"] + pub fn set_uif(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize); + } + } + impl Default for SrBasic { + fn default() -> SrBasic { + SrBasic(0) + } + } + #[doc = "auto-reload register"] + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq)] + pub struct Arr32(pub u32); + impl Arr32 { + #[doc = "Auto-reload value"] + pub const fn arr(&self) -> u32 { + let val = (self.0 >> 0usize) & 0xffff_ffff; + val as u32 + } + #[doc = "Auto-reload value"] + pub fn set_arr(&mut self, val: u32) { + self.0 = + (self.0 & !(0xffff_ffff << 0usize)) | (((val as u32) & 0xffff_ffff) << 0usize); + } + } + impl Default for Arr32 { + fn default() -> Arr32 { + Arr32(0) + } + } + #[doc = "counter"] + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq)] + pub struct Cnt16(pub u32); + impl Cnt16 { + #[doc = "counter value"] + pub const fn cnt(&self) -> u16 { + let val = (self.0 >> 0usize) & 0xffff; + val as u16 + } + #[doc = "counter value"] + pub fn set_cnt(&mut self, val: u16) { + self.0 = (self.0 & !(0xffff << 0usize)) | (((val as u32) & 0xffff) << 0usize); + } + } + impl Default for Cnt16 { + fn default() -> Cnt16 { + Cnt16(0) + } + } + #[doc = "DMA/Interrupt enable register"] + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq)] + pub struct DierGp(pub u32); + impl DierGp { + #[doc = "Update interrupt enable"] + pub const fn uie(&self) -> bool { + let val = (self.0 >> 0usize) & 0x01; + val != 0 + } + #[doc = "Update interrupt enable"] + pub fn set_uie(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize); + } + #[doc = "Capture/Compare 1 interrupt enable"] + pub fn ccie(&self, n: usize) -> bool { + assert!(n < 4usize); + let offs = 1usize + n * 1usize; + let val = (self.0 >> offs) & 0x01; + val != 0 + } + #[doc = "Capture/Compare 1 interrupt enable"] + pub fn set_ccie(&mut self, n: usize, val: bool) { + assert!(n < 4usize); + let offs = 1usize + n * 1usize; + self.0 = (self.0 & !(0x01 << offs)) | (((val as u32) & 0x01) << offs); + } + #[doc = "Trigger interrupt enable"] + pub const fn tie(&self) -> bool { + let val = (self.0 >> 6usize) & 0x01; + val != 0 + } + #[doc = "Trigger interrupt enable"] + pub fn set_tie(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 6usize)) | (((val as u32) & 0x01) << 6usize); + } + #[doc = "Update DMA request enable"] + pub const fn ude(&self) -> bool { + let val = (self.0 >> 8usize) & 0x01; + val != 0 + } + #[doc = "Update DMA request enable"] + pub fn set_ude(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 8usize)) | (((val as u32) & 0x01) << 8usize); + } + #[doc = "Capture/Compare 1 DMA request enable"] + pub fn ccde(&self, n: usize) -> bool { + assert!(n < 4usize); + let offs = 9usize + n * 1usize; + let val = (self.0 >> offs) & 0x01; + val != 0 + } + #[doc = "Capture/Compare 1 DMA request enable"] + pub fn set_ccde(&mut self, n: usize, val: bool) { + assert!(n < 4usize); + let offs = 9usize + n * 1usize; + self.0 = (self.0 & !(0x01 << offs)) | (((val as u32) & 0x01) << offs); + } + #[doc = "Trigger DMA request enable"] + pub const fn tde(&self) -> bool { + let val = (self.0 >> 14usize) & 0x01; + val != 0 + } + #[doc = "Trigger DMA request enable"] + pub fn set_tde(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 14usize)) | (((val as u32) & 0x01) << 14usize); + } + } + impl Default for DierGp { + fn default() -> DierGp { + DierGp(0) + } + } + #[doc = "prescaler"] + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq)] + pub struct Psc(pub u32); + impl Psc { + #[doc = "Prescaler value"] + pub const fn psc(&self) -> u16 { + let val = (self.0 >> 0usize) & 0xffff; + val as u16 + } + #[doc = "Prescaler value"] + pub fn set_psc(&mut self, val: u16) { + self.0 = (self.0 & !(0xffff << 0usize)) | (((val as u32) & 0xffff) << 0usize); + } + } + impl Default for Psc { + fn default() -> Psc { + Psc(0) + } + } + #[doc = "event generation register"] + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq)] + pub struct EgrBasic(pub u32); + impl EgrBasic { + #[doc = "Update generation"] + pub const fn ug(&self) -> bool { + let val = (self.0 >> 0usize) & 0x01; + val != 0 + } + #[doc = "Update generation"] + pub fn set_ug(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize); + } + } + impl Default for EgrBasic { + fn default() -> EgrBasic { + EgrBasic(0) + } + } + #[doc = "DMA address for full transfer"] + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq)] + pub struct Dmar(pub u32); + impl Dmar { + #[doc = "DMA register for burst accesses"] + pub const fn dmab(&self) -> u16 { + let val = (self.0 >> 0usize) & 0xffff; + val as u16 + } + #[doc = "DMA register for burst accesses"] + pub fn set_dmab(&mut self, val: u16) { + self.0 = (self.0 & !(0xffff << 0usize)) | (((val as u32) & 0xffff) << 0usize); + } + } + impl Default for Dmar { + fn default() -> Dmar { + Dmar(0) + } + } + #[doc = "capture/compare enable register"] + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq)] + pub struct CcerGp(pub u32); + impl CcerGp { + #[doc = "Capture/Compare 1 output enable"] + pub fn cce(&self, n: usize) -> bool { + assert!(n < 4usize); + let offs = 0usize + n * 4usize; + let val = (self.0 >> offs) & 0x01; + val != 0 + } + #[doc = "Capture/Compare 1 output enable"] + pub fn set_cce(&mut self, n: usize, val: bool) { + assert!(n < 4usize); + let offs = 0usize + n * 4usize; + self.0 = (self.0 & !(0x01 << offs)) | (((val as u32) & 0x01) << offs); + } + #[doc = "Capture/Compare 1 output Polarity"] + pub fn ccp(&self, n: usize) -> bool { + assert!(n < 4usize); + let offs = 1usize + n * 4usize; + let val = (self.0 >> offs) & 0x01; + val != 0 + } + #[doc = "Capture/Compare 1 output Polarity"] + pub fn set_ccp(&mut self, n: usize, val: bool) { + assert!(n < 4usize); + let offs = 1usize + n * 4usize; + self.0 = (self.0 & !(0x01 << offs)) | (((val as u32) & 0x01) << offs); + } + #[doc = "Capture/Compare 1 output Polarity"] + pub fn ccnp(&self, n: usize) -> bool { + assert!(n < 4usize); + let offs = 3usize + n * 4usize; + let val = (self.0 >> offs) & 0x01; + val != 0 + } + #[doc = "Capture/Compare 1 output Polarity"] + pub fn set_ccnp(&mut self, n: usize, val: bool) { + assert!(n < 4usize); + let offs = 3usize + n * 4usize; + self.0 = (self.0 & !(0x01 << offs)) | (((val as u32) & 0x01) << offs); + } + } + impl Default for CcerGp { + fn default() -> CcerGp { + CcerGp(0) + } + } + } +} +pub mod gpio_v1 { + use crate::generic::*; + #[doc = "General purpose I/O"] + #[derive(Copy, Clone)] + pub struct Gpio(pub *mut u8); + unsafe impl Send for Gpio {} + unsafe impl Sync for Gpio {} + impl Gpio { + #[doc = "Port configuration register low (GPIOn_CRL)"] + pub fn cr(self, n: usize) -> Reg { + assert!(n < 2usize); + unsafe { Reg::from_ptr(self.0.add(0usize + n * 4usize)) } + } + #[doc = "Port input data register (GPIOn_IDR)"] + pub fn idr(self) -> Reg { + unsafe { Reg::from_ptr(self.0.add(8usize)) } + } + #[doc = "Port output data register (GPIOn_ODR)"] + pub fn odr(self) -> Reg { + unsafe { Reg::from_ptr(self.0.add(12usize)) } + } + #[doc = "Port bit set/reset register (GPIOn_BSRR)"] + pub fn bsrr(self) -> Reg { + unsafe { Reg::from_ptr(self.0.add(16usize)) } + } + #[doc = "Port bit reset register (GPIOn_BRR)"] + pub fn brr(self) -> Reg { + unsafe { Reg::from_ptr(self.0.add(20usize)) } + } + #[doc = "Port configuration lock register"] + pub fn lckr(self) -> Reg { + unsafe { Reg::from_ptr(self.0.add(24usize)) } + } + } + pub mod regs { + use crate::generic::*; + #[doc = "Port input data register (GPIOn_IDR)"] + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq)] + pub struct Idr(pub u32); + impl Idr { + #[doc = "Port input data"] + pub fn idr(&self, n: usize) -> super::vals::Idr { + assert!(n < 16usize); + let offs = 0usize + n * 1usize; + let val = (self.0 >> offs) & 0x01; + super::vals::Idr(val as u8) + } + #[doc = "Port input data"] + pub fn set_idr(&mut self, n: usize, val: super::vals::Idr) { + assert!(n < 16usize); + let offs = 0usize + n * 1usize; + self.0 = (self.0 & !(0x01 << offs)) | (((val.0 as u32) & 0x01) << offs); + } + } + impl Default for Idr { + fn default() -> Idr { + Idr(0) + } + } + #[doc = "Port bit reset register (GPIOn_BRR)"] + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq)] + pub struct Brr(pub u32); + impl Brr { + #[doc = "Reset bit"] + pub fn br(&self, n: usize) -> bool { + assert!(n < 16usize); + let offs = 0usize + n * 1usize; + let val = (self.0 >> offs) & 0x01; + val != 0 + } + #[doc = "Reset bit"] + pub fn set_br(&mut self, n: usize, val: bool) { + assert!(n < 16usize); + let offs = 0usize + n * 1usize; + self.0 = (self.0 & !(0x01 << offs)) | (((val as u32) & 0x01) << offs); + } + } + impl Default for Brr { + fn default() -> Brr { + Brr(0) + } + } + #[doc = "Port output data register (GPIOn_ODR)"] + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq)] + pub struct Odr(pub u32); + impl Odr { + #[doc = "Port output data"] + pub fn odr(&self, n: usize) -> super::vals::Odr { + assert!(n < 16usize); + let offs = 0usize + n * 1usize; + let val = (self.0 >> offs) & 0x01; + super::vals::Odr(val as u8) + } + #[doc = "Port output data"] + pub fn set_odr(&mut self, n: usize, val: super::vals::Odr) { + assert!(n < 16usize); + let offs = 0usize + n * 1usize; + self.0 = (self.0 & !(0x01 << offs)) | (((val.0 as u32) & 0x01) << offs); + } + } + impl Default for Odr { + fn default() -> Odr { + Odr(0) + } + } + #[doc = "Port bit set/reset register (GPIOn_BSRR)"] + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq)] + pub struct Bsrr(pub u32); + impl Bsrr { + #[doc = "Set bit"] + pub fn bs(&self, n: usize) -> bool { + assert!(n < 16usize); + let offs = 0usize + n * 1usize; + let val = (self.0 >> offs) & 0x01; + val != 0 + } + #[doc = "Set bit"] + pub fn set_bs(&mut self, n: usize, val: bool) { + assert!(n < 16usize); + let offs = 0usize + n * 1usize; + self.0 = (self.0 & !(0x01 << offs)) | (((val as u32) & 0x01) << offs); + } + #[doc = "Reset bit"] + pub fn br(&self, n: usize) -> bool { + assert!(n < 16usize); + let offs = 16usize + n * 1usize; + let val = (self.0 >> offs) & 0x01; + val != 0 + } + #[doc = "Reset bit"] + pub fn set_br(&mut self, n: usize, val: bool) { + assert!(n < 16usize); + let offs = 16usize + n * 1usize; + self.0 = (self.0 & !(0x01 << offs)) | (((val as u32) & 0x01) << offs); + } + } + impl Default for Bsrr { + fn default() -> Bsrr { + Bsrr(0) + } + } + #[doc = "Port configuration register (GPIOn_CRx)"] + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq)] + pub struct Cr(pub u32); + impl Cr { + #[doc = "Port n mode bits"] + pub fn mode(&self, n: usize) -> super::vals::Mode { + assert!(n < 8usize); + let offs = 0usize + n * 4usize; + let val = (self.0 >> offs) & 0x03; + super::vals::Mode(val as u8) + } + #[doc = "Port n mode bits"] + pub fn set_mode(&mut self, n: usize, val: super::vals::Mode) { + assert!(n < 8usize); + let offs = 0usize + n * 4usize; + self.0 = (self.0 & !(0x03 << offs)) | (((val.0 as u32) & 0x03) << offs); + } + #[doc = "Port n configuration bits"] + pub fn cnf(&self, n: usize) -> super::vals::Cnf { + assert!(n < 8usize); + let offs = 2usize + n * 4usize; + let val = (self.0 >> offs) & 0x03; + super::vals::Cnf(val as u8) + } + #[doc = "Port n configuration bits"] + pub fn set_cnf(&mut self, n: usize, val: super::vals::Cnf) { + assert!(n < 8usize); + let offs = 2usize + n * 4usize; + self.0 = (self.0 & !(0x03 << offs)) | (((val.0 as u32) & 0x03) << offs); + } + } + impl Default for Cr { + fn default() -> Cr { + Cr(0) + } + } + #[doc = "Port configuration lock register"] + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq)] + pub struct Lckr(pub u32); + impl Lckr { + #[doc = "Port A Lock bit"] + pub fn lck(&self, n: usize) -> super::vals::Lck { + assert!(n < 16usize); + let offs = 0usize + n * 1usize; + let val = (self.0 >> offs) & 0x01; + super::vals::Lck(val as u8) + } + #[doc = "Port A Lock bit"] + pub fn set_lck(&mut self, n: usize, val: super::vals::Lck) { + assert!(n < 16usize); + let offs = 0usize + n * 1usize; + self.0 = (self.0 & !(0x01 << offs)) | (((val.0 as u32) & 0x01) << offs); + } + #[doc = "Lock key"] + pub const fn lckk(&self) -> super::vals::Lckk { + let val = (self.0 >> 16usize) & 0x01; + super::vals::Lckk(val as u8) + } + #[doc = "Lock key"] + pub fn set_lckk(&mut self, val: super::vals::Lckk) { + self.0 = (self.0 & !(0x01 << 16usize)) | (((val.0 as u32) & 0x01) << 16usize); + } + } + impl Default for Lckr { + fn default() -> Lckr { + Lckr(0) + } + } + } + pub mod vals { + use crate::generic::*; + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] + pub struct Lck(pub u8); + impl Lck { + #[doc = "Port configuration not locked"] + pub const UNLOCKED: Self = Self(0); + #[doc = "Port configuration locked"] + pub const LOCKED: Self = Self(0x01); + } + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] + pub struct Idr(pub u8); + impl Idr { + #[doc = "Input is logic low"] + pub const LOW: Self = Self(0); + #[doc = "Input is logic high"] + pub const HIGH: Self = Self(0x01); + } + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] + pub struct Odr(pub u8); + impl Odr { + #[doc = "Set output to logic low"] + pub const LOW: Self = Self(0); + #[doc = "Set output to logic high"] + pub const HIGH: Self = Self(0x01); + } + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] + pub struct Brw(pub u8); + impl Brw { + #[doc = "No action on the corresponding ODx bit"] + pub const NOACTION: Self = Self(0); + #[doc = "Reset the ODx bit"] + pub const RESET: Self = Self(0x01); + } + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] + pub struct Cnf(pub u8); + impl Cnf { + #[doc = "Analog mode / Push-Pull mode"] + pub const PUSHPULL: Self = Self(0); + #[doc = "Floating input (reset state) / Open Drain-Mode"] + pub const OPENDRAIN: Self = Self(0x01); + #[doc = "Input with pull-up/pull-down / Alternate Function Push-Pull Mode"] + pub const ALTPUSHPULL: Self = Self(0x02); + #[doc = "Alternate Function Open-Drain Mode"] + pub const ALTOPENDRAIN: Self = Self(0x03); + } + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] + pub struct Lckk(pub u8); + impl Lckk { + #[doc = "Port configuration lock key not active"] + pub const NOTACTIVE: Self = Self(0); + #[doc = "Port configuration lock key active"] + pub const ACTIVE: Self = Self(0x01); + } + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] + pub struct Bsw(pub u8); + impl Bsw { + #[doc = "No action on the corresponding ODx bit"] + pub const NOACTION: Self = Self(0); + #[doc = "Sets the corresponding ODRx bit"] + pub const SET: Self = Self(0x01); + } + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] + pub struct Mode(pub u8); + impl Mode { + #[doc = "Input mode (reset state)"] + pub const INPUT: Self = Self(0); + #[doc = "Output mode 10 MHz"] + pub const OUTPUT: Self = Self(0x01); + #[doc = "Output mode 2 MHz"] + pub const OUTPUT2: Self = Self(0x02); + #[doc = "Output mode 50 MHz"] + pub const OUTPUT50: Self = Self(0x03); + } + } +} +pub mod generic { + use core::marker::PhantomData; + #[derive(Copy, Clone)] + pub struct RW; + #[derive(Copy, Clone)] + pub struct R; + #[derive(Copy, Clone)] + pub struct W; + mod sealed { + use super::*; + pub trait Access {} + impl Access for R {} + impl Access for W {} + impl Access for RW {} + } + pub trait Access: sealed::Access + Copy {} + impl Access for R {} + impl Access for W {} + impl Access for RW {} + pub trait Read: Access {} + impl Read for RW {} + impl Read for R {} + pub trait Write: Access {} + impl Write for RW {} + impl Write for W {} + #[derive(Copy, Clone)] + pub struct Reg { + ptr: *mut u8, + phantom: PhantomData<*mut (T, A)>, + } + unsafe impl Send for Reg {} + unsafe impl Sync for Reg {} + impl Reg { + pub fn from_ptr(ptr: *mut u8) -> Self { + Self { + ptr, + phantom: PhantomData, + } + } + pub fn ptr(&self) -> *mut T { + self.ptr as _ + } + } + impl Reg { + pub unsafe fn read(&self) -> T { + (self.ptr as *mut T).read_volatile() + } + } + impl Reg { + pub unsafe fn write_value(&self, val: T) { + (self.ptr as *mut T).write_volatile(val) + } + } + impl Reg { + pub unsafe fn write(&self, f: impl FnOnce(&mut T) -> R) -> R { + let mut val = Default::default(); + let res = f(&mut val); + self.write_value(val); + res + } + } + impl Reg { + pub unsafe fn modify(&self, f: impl FnOnce(&mut T) -> R) -> R { + let mut val = self.read(); + let res = f(&mut val); + self.write_value(val); + res + } } } pub mod dma_v1 { use crate::generic::*; + #[doc = "DMA controller"] + #[derive(Copy, Clone)] + pub struct Dma(pub *mut u8); + unsafe impl Send for Dma {} + unsafe impl Sync for Dma {} + impl Dma { + #[doc = "DMA interrupt status register (DMA_ISR)"] + pub fn isr(self) -> Reg { + unsafe { Reg::from_ptr(self.0.add(0usize)) } + } + #[doc = "DMA interrupt flag clear register (DMA_IFCR)"] + pub fn ifcr(self) -> Reg { + unsafe { Reg::from_ptr(self.0.add(4usize)) } + } + #[doc = "Channel cluster: CCR?, CNDTR?, CPAR?, and CMAR? registers"] + pub fn ch(self, n: usize) -> Ch { + assert!(n < 7usize); + unsafe { Ch(self.0.add(8usize + n * 20usize)) } + } + } #[doc = "Channel cluster: CCR?, CNDTR?, CPAR?, and CMAR? registers"] #[derive(Copy, Clone)] pub struct Ch(pub *mut u8); @@ -7070,91 +4945,154 @@ pub mod dma_v1 { unsafe { Reg::from_ptr(self.0.add(12usize)) } } } - #[doc = "DMA controller"] - #[derive(Copy, Clone)] - pub struct Dma(pub *mut u8); - unsafe impl Send for Dma {} - unsafe impl Sync for Dma {} - impl Dma { - #[doc = "DMA interrupt status register (DMA_ISR)"] - pub fn isr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(0usize)) } - } - #[doc = "DMA interrupt flag clear register (DMA_IFCR)"] - pub fn ifcr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(4usize)) } - } - #[doc = "Channel cluster: CCR?, CNDTR?, CPAR?, and CMAR? registers"] - pub fn ch(self, n: usize) -> Ch { - assert!(n < 7usize); - unsafe { Ch(self.0.add(8usize + n * 20usize)) } - } - } - pub mod vals { - use crate::generic::*; - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Memmem(pub u8); - impl Memmem { - #[doc = "Memory to memory mode disabled"] - pub const DISABLED: Self = Self(0); - #[doc = "Memory to memory mode enabled"] - pub const ENABLED: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Pl(pub u8); - impl Pl { - #[doc = "Low priority"] - pub const LOW: Self = Self(0); - #[doc = "Medium priority"] - pub const MEDIUM: Self = Self(0x01); - #[doc = "High priority"] - pub const HIGH: Self = Self(0x02); - #[doc = "Very high priority"] - pub const VERYHIGH: Self = Self(0x03); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Circ(pub u8); - impl Circ { - #[doc = "Circular buffer disabled"] - pub const DISABLED: Self = Self(0); - #[doc = "Circular buffer enabled"] - pub const ENABLED: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Dir(pub u8); - impl Dir { - #[doc = "Read from peripheral"] - pub const FROMPERIPHERAL: Self = Self(0); - #[doc = "Read from memory"] - pub const FROMMEMORY: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Inc(pub u8); - impl Inc { - #[doc = "Increment mode disabled"] - pub const DISABLED: Self = Self(0); - #[doc = "Increment mode enabled"] - pub const ENABLED: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Size(pub u8); - impl Size { - #[doc = "8-bit size"] - pub const BITS8: Self = Self(0); - #[doc = "16-bit size"] - pub const BITS16: Self = Self(0x01); - #[doc = "32-bit size"] - pub const BITS32: Self = Self(0x02); - } - } pub mod regs { use crate::generic::*; + #[doc = "DMA interrupt flag clear register (DMA_IFCR)"] + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq)] + pub struct Ifcr(pub u32); + impl Ifcr { + #[doc = "Channel 1 Global interrupt clear"] + pub fn cgif(&self, n: usize) -> bool { + assert!(n < 7usize); + let offs = 0usize + n * 4usize; + let val = (self.0 >> offs) & 0x01; + val != 0 + } + #[doc = "Channel 1 Global interrupt clear"] + pub fn set_cgif(&mut self, n: usize, val: bool) { + assert!(n < 7usize); + let offs = 0usize + n * 4usize; + self.0 = (self.0 & !(0x01 << offs)) | (((val as u32) & 0x01) << offs); + } + #[doc = "Channel 1 Transfer Complete clear"] + pub fn ctcif(&self, n: usize) -> bool { + assert!(n < 7usize); + let offs = 1usize + n * 4usize; + let val = (self.0 >> offs) & 0x01; + val != 0 + } + #[doc = "Channel 1 Transfer Complete clear"] + pub fn set_ctcif(&mut self, n: usize, val: bool) { + assert!(n < 7usize); + let offs = 1usize + n * 4usize; + self.0 = (self.0 & !(0x01 << offs)) | (((val as u32) & 0x01) << offs); + } + #[doc = "Channel 1 Half Transfer clear"] + pub fn chtif(&self, n: usize) -> bool { + assert!(n < 7usize); + let offs = 2usize + n * 4usize; + let val = (self.0 >> offs) & 0x01; + val != 0 + } + #[doc = "Channel 1 Half Transfer clear"] + pub fn set_chtif(&mut self, n: usize, val: bool) { + assert!(n < 7usize); + let offs = 2usize + n * 4usize; + self.0 = (self.0 & !(0x01 << offs)) | (((val as u32) & 0x01) << offs); + } + #[doc = "Channel 1 Transfer Error clear"] + pub fn cteif(&self, n: usize) -> bool { + assert!(n < 7usize); + let offs = 3usize + n * 4usize; + let val = (self.0 >> offs) & 0x01; + val != 0 + } + #[doc = "Channel 1 Transfer Error clear"] + pub fn set_cteif(&mut self, n: usize, val: bool) { + assert!(n < 7usize); + let offs = 3usize + n * 4usize; + self.0 = (self.0 & !(0x01 << offs)) | (((val as u32) & 0x01) << offs); + } + } + impl Default for Ifcr { + fn default() -> Ifcr { + Ifcr(0) + } + } + #[doc = "DMA interrupt status register (DMA_ISR)"] + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq)] + pub struct Isr(pub u32); + impl Isr { + #[doc = "Channel 1 Global interrupt flag"] + pub fn gif(&self, n: usize) -> bool { + assert!(n < 7usize); + let offs = 0usize + n * 4usize; + let val = (self.0 >> offs) & 0x01; + val != 0 + } + #[doc = "Channel 1 Global interrupt flag"] + pub fn set_gif(&mut self, n: usize, val: bool) { + assert!(n < 7usize); + let offs = 0usize + n * 4usize; + self.0 = (self.0 & !(0x01 << offs)) | (((val as u32) & 0x01) << offs); + } + #[doc = "Channel 1 Transfer Complete flag"] + pub fn tcif(&self, n: usize) -> bool { + assert!(n < 7usize); + let offs = 1usize + n * 4usize; + let val = (self.0 >> offs) & 0x01; + val != 0 + } + #[doc = "Channel 1 Transfer Complete flag"] + pub fn set_tcif(&mut self, n: usize, val: bool) { + assert!(n < 7usize); + let offs = 1usize + n * 4usize; + self.0 = (self.0 & !(0x01 << offs)) | (((val as u32) & 0x01) << offs); + } + #[doc = "Channel 1 Half Transfer Complete flag"] + pub fn htif(&self, n: usize) -> bool { + assert!(n < 7usize); + let offs = 2usize + n * 4usize; + let val = (self.0 >> offs) & 0x01; + val != 0 + } + #[doc = "Channel 1 Half Transfer Complete flag"] + pub fn set_htif(&mut self, n: usize, val: bool) { + assert!(n < 7usize); + let offs = 2usize + n * 4usize; + self.0 = (self.0 & !(0x01 << offs)) | (((val as u32) & 0x01) << offs); + } + #[doc = "Channel 1 Transfer Error flag"] + pub fn teif(&self, n: usize) -> bool { + assert!(n < 7usize); + let offs = 3usize + n * 4usize; + let val = (self.0 >> offs) & 0x01; + val != 0 + } + #[doc = "Channel 1 Transfer Error flag"] + pub fn set_teif(&mut self, n: usize, val: bool) { + assert!(n < 7usize); + let offs = 3usize + n * 4usize; + self.0 = (self.0 & !(0x01 << offs)) | (((val as u32) & 0x01) << offs); + } + } + impl Default for Isr { + fn default() -> Isr { + Isr(0) + } + } + #[doc = "DMA channel 1 number of data register"] + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq)] + pub struct Ndtr(pub u32); + impl Ndtr { + #[doc = "Number of data to transfer"] + pub const fn ndt(&self) -> u16 { + let val = (self.0 >> 0usize) & 0xffff; + val as u16 + } + #[doc = "Number of data to transfer"] + pub fn set_ndt(&mut self, val: u16) { + self.0 = (self.0 & !(0xffff << 0usize)) | (((val as u32) & 0xffff) << 0usize); + } + } + impl Default for Ndtr { + fn default() -> Ndtr { + Ndtr(0) + } + } #[doc = "DMA channel configuration register (DMA_CCR)"] #[repr(transparent)] #[derive(Copy, Clone, Eq, PartialEq)] @@ -7274,150 +5212,3859 @@ pub mod dma_v1 { Cr(0) } } - #[doc = "DMA interrupt flag clear register (DMA_IFCR)"] + } + pub mod vals { + use crate::generic::*; + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] + pub struct Memmem(pub u8); + impl Memmem { + #[doc = "Memory to memory mode disabled"] + pub const DISABLED: Self = Self(0); + #[doc = "Memory to memory mode enabled"] + pub const ENABLED: Self = Self(0x01); + } + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] + pub struct Circ(pub u8); + impl Circ { + #[doc = "Circular buffer disabled"] + pub const DISABLED: Self = Self(0); + #[doc = "Circular buffer enabled"] + pub const ENABLED: Self = Self(0x01); + } + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] + pub struct Inc(pub u8); + impl Inc { + #[doc = "Increment mode disabled"] + pub const DISABLED: Self = Self(0); + #[doc = "Increment mode enabled"] + pub const ENABLED: Self = Self(0x01); + } + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] + pub struct Dir(pub u8); + impl Dir { + #[doc = "Read from peripheral"] + pub const FROMPERIPHERAL: Self = Self(0); + #[doc = "Read from memory"] + pub const FROMMEMORY: Self = Self(0x01); + } + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] + pub struct Size(pub u8); + impl Size { + #[doc = "8-bit size"] + pub const BITS8: Self = Self(0); + #[doc = "16-bit size"] + pub const BITS16: Self = Self(0x01); + #[doc = "32-bit size"] + pub const BITS32: Self = Self(0x02); + } + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] + pub struct Pl(pub u8); + impl Pl { + #[doc = "Low priority"] + pub const LOW: Self = Self(0); + #[doc = "Medium priority"] + pub const MEDIUM: Self = Self(0x01); + #[doc = "High priority"] + pub const HIGH: Self = Self(0x02); + #[doc = "Very high priority"] + pub const VERYHIGH: Self = Self(0x03); + } + } +} +pub mod gpio_v2 { + use crate::generic::*; + #[doc = "General-purpose I/Os"] + #[derive(Copy, Clone)] + pub struct Gpio(pub *mut u8); + unsafe impl Send for Gpio {} + unsafe impl Sync for Gpio {} + impl Gpio { + #[doc = "GPIO port mode register"] + pub fn moder(self) -> Reg { + unsafe { Reg::from_ptr(self.0.add(0usize)) } + } + #[doc = "GPIO port output type register"] + pub fn otyper(self) -> Reg { + unsafe { Reg::from_ptr(self.0.add(4usize)) } + } + #[doc = "GPIO port output speed register"] + pub fn ospeedr(self) -> Reg { + unsafe { Reg::from_ptr(self.0.add(8usize)) } + } + #[doc = "GPIO port pull-up/pull-down register"] + pub fn pupdr(self) -> Reg { + unsafe { Reg::from_ptr(self.0.add(12usize)) } + } + #[doc = "GPIO port input data register"] + pub fn idr(self) -> Reg { + unsafe { Reg::from_ptr(self.0.add(16usize)) } + } + #[doc = "GPIO port output data register"] + pub fn odr(self) -> Reg { + unsafe { Reg::from_ptr(self.0.add(20usize)) } + } + #[doc = "GPIO port bit set/reset register"] + pub fn bsrr(self) -> Reg { + unsafe { Reg::from_ptr(self.0.add(24usize)) } + } + #[doc = "GPIO port configuration lock register"] + pub fn lckr(self) -> Reg { + unsafe { Reg::from_ptr(self.0.add(28usize)) } + } + #[doc = "GPIO alternate function register (low, high)"] + pub fn afr(self, n: usize) -> Reg { + assert!(n < 2usize); + unsafe { Reg::from_ptr(self.0.add(32usize + n * 4usize)) } + } + } + pub mod regs { + use crate::generic::*; + #[doc = "GPIO port input data register"] #[repr(transparent)] #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Ifcr(pub u32); - impl Ifcr { - #[doc = "Channel 1 Global interrupt clear"] - pub fn cgif(&self, n: usize) -> bool { - assert!(n < 7usize); - let offs = 0usize + n * 4usize; + pub struct Idr(pub u32); + impl Idr { + #[doc = "Port input data (y = 0..15)"] + pub fn idr(&self, n: usize) -> super::vals::Idr { + assert!(n < 16usize); + let offs = 0usize + n * 1usize; + let val = (self.0 >> offs) & 0x01; + super::vals::Idr(val as u8) + } + #[doc = "Port input data (y = 0..15)"] + pub fn set_idr(&mut self, n: usize, val: super::vals::Idr) { + assert!(n < 16usize); + let offs = 0usize + n * 1usize; + self.0 = (self.0 & !(0x01 << offs)) | (((val.0 as u32) & 0x01) << offs); + } + } + impl Default for Idr { + fn default() -> Idr { + Idr(0) + } + } + #[doc = "GPIO port pull-up/pull-down register"] + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq)] + pub struct Pupdr(pub u32); + impl Pupdr { + #[doc = "Port x configuration bits (y = 0..15)"] + pub fn pupdr(&self, n: usize) -> super::vals::Pupdr { + assert!(n < 16usize); + let offs = 0usize + n * 2usize; + let val = (self.0 >> offs) & 0x03; + super::vals::Pupdr(val as u8) + } + #[doc = "Port x configuration bits (y = 0..15)"] + pub fn set_pupdr(&mut self, n: usize, val: super::vals::Pupdr) { + assert!(n < 16usize); + let offs = 0usize + n * 2usize; + self.0 = (self.0 & !(0x03 << offs)) | (((val.0 as u32) & 0x03) << offs); + } + } + impl Default for Pupdr { + fn default() -> Pupdr { + Pupdr(0) + } + } + #[doc = "GPIO port output type register"] + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq)] + pub struct Otyper(pub u32); + impl Otyper { + #[doc = "Port x configuration bits (y = 0..15)"] + pub fn ot(&self, n: usize) -> super::vals::Ot { + assert!(n < 16usize); + let offs = 0usize + n * 1usize; + let val = (self.0 >> offs) & 0x01; + super::vals::Ot(val as u8) + } + #[doc = "Port x configuration bits (y = 0..15)"] + pub fn set_ot(&mut self, n: usize, val: super::vals::Ot) { + assert!(n < 16usize); + let offs = 0usize + n * 1usize; + self.0 = (self.0 & !(0x01 << offs)) | (((val.0 as u32) & 0x01) << offs); + } + } + impl Default for Otyper { + fn default() -> Otyper { + Otyper(0) + } + } + #[doc = "GPIO port bit set/reset register"] + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq)] + pub struct Bsrr(pub u32); + impl Bsrr { + #[doc = "Port x set bit y (y= 0..15)"] + pub fn bs(&self, n: usize) -> bool { + assert!(n < 16usize); + let offs = 0usize + n * 1usize; let val = (self.0 >> offs) & 0x01; val != 0 } - #[doc = "Channel 1 Global interrupt clear"] - pub fn set_cgif(&mut self, n: usize, val: bool) { - assert!(n < 7usize); - let offs = 0usize + n * 4usize; + #[doc = "Port x set bit y (y= 0..15)"] + pub fn set_bs(&mut self, n: usize, val: bool) { + assert!(n < 16usize); + let offs = 0usize + n * 1usize; self.0 = (self.0 & !(0x01 << offs)) | (((val as u32) & 0x01) << offs); } - #[doc = "Channel 1 Transfer Complete clear"] - pub fn ctcif(&self, n: usize) -> bool { - assert!(n < 7usize); - let offs = 1usize + n * 4usize; + #[doc = "Port x set bit y (y= 0..15)"] + pub fn br(&self, n: usize) -> bool { + assert!(n < 16usize); + let offs = 16usize + n * 1usize; let val = (self.0 >> offs) & 0x01; val != 0 } - #[doc = "Channel 1 Transfer Complete clear"] - pub fn set_ctcif(&mut self, n: usize, val: bool) { - assert!(n < 7usize); - let offs = 1usize + n * 4usize; - self.0 = (self.0 & !(0x01 << offs)) | (((val as u32) & 0x01) << offs); - } - #[doc = "Channel 1 Half Transfer clear"] - pub fn chtif(&self, n: usize) -> bool { - assert!(n < 7usize); - let offs = 2usize + n * 4usize; - let val = (self.0 >> offs) & 0x01; - val != 0 - } - #[doc = "Channel 1 Half Transfer clear"] - pub fn set_chtif(&mut self, n: usize, val: bool) { - assert!(n < 7usize); - let offs = 2usize + n * 4usize; - self.0 = (self.0 & !(0x01 << offs)) | (((val as u32) & 0x01) << offs); - } - #[doc = "Channel 1 Transfer Error clear"] - pub fn cteif(&self, n: usize) -> bool { - assert!(n < 7usize); - let offs = 3usize + n * 4usize; - let val = (self.0 >> offs) & 0x01; - val != 0 - } - #[doc = "Channel 1 Transfer Error clear"] - pub fn set_cteif(&mut self, n: usize, val: bool) { - assert!(n < 7usize); - let offs = 3usize + n * 4usize; + #[doc = "Port x set bit y (y= 0..15)"] + pub fn set_br(&mut self, n: usize, val: bool) { + assert!(n < 16usize); + let offs = 16usize + n * 1usize; self.0 = (self.0 & !(0x01 << offs)) | (((val as u32) & 0x01) << offs); } } - impl Default for Ifcr { - fn default() -> Ifcr { - Ifcr(0) + impl Default for Bsrr { + fn default() -> Bsrr { + Bsrr(0) } } - #[doc = "DMA channel 1 number of data register"] + #[doc = "GPIO port configuration lock register"] #[repr(transparent)] #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Ndtr(pub u32); - impl Ndtr { - #[doc = "Number of data to transfer"] - pub const fn ndt(&self) -> u16 { + pub struct Lckr(pub u32); + impl Lckr { + #[doc = "Port x lock bit y (y= 0..15)"] + pub fn lck(&self, n: usize) -> super::vals::Lck { + assert!(n < 16usize); + let offs = 0usize + n * 1usize; + let val = (self.0 >> offs) & 0x01; + super::vals::Lck(val as u8) + } + #[doc = "Port x lock bit y (y= 0..15)"] + pub fn set_lck(&mut self, n: usize, val: super::vals::Lck) { + assert!(n < 16usize); + let offs = 0usize + n * 1usize; + self.0 = (self.0 & !(0x01 << offs)) | (((val.0 as u32) & 0x01) << offs); + } + #[doc = "Port x lock bit y (y= 0..15)"] + pub const fn lckk(&self) -> super::vals::Lckk { + let val = (self.0 >> 16usize) & 0x01; + super::vals::Lckk(val as u8) + } + #[doc = "Port x lock bit y (y= 0..15)"] + pub fn set_lckk(&mut self, val: super::vals::Lckk) { + self.0 = (self.0 & !(0x01 << 16usize)) | (((val.0 as u32) & 0x01) << 16usize); + } + } + impl Default for Lckr { + fn default() -> Lckr { + Lckr(0) + } + } + #[doc = "GPIO port mode register"] + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq)] + pub struct Moder(pub u32); + impl Moder { + #[doc = "Port x configuration bits (y = 0..15)"] + pub fn moder(&self, n: usize) -> super::vals::Moder { + assert!(n < 16usize); + let offs = 0usize + n * 2usize; + let val = (self.0 >> offs) & 0x03; + super::vals::Moder(val as u8) + } + #[doc = "Port x configuration bits (y = 0..15)"] + pub fn set_moder(&mut self, n: usize, val: super::vals::Moder) { + assert!(n < 16usize); + let offs = 0usize + n * 2usize; + self.0 = (self.0 & !(0x03 << offs)) | (((val.0 as u32) & 0x03) << offs); + } + } + impl Default for Moder { + fn default() -> Moder { + Moder(0) + } + } + #[doc = "GPIO port output data register"] + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq)] + pub struct Odr(pub u32); + impl Odr { + #[doc = "Port output data (y = 0..15)"] + pub fn odr(&self, n: usize) -> super::vals::Odr { + assert!(n < 16usize); + let offs = 0usize + n * 1usize; + let val = (self.0 >> offs) & 0x01; + super::vals::Odr(val as u8) + } + #[doc = "Port output data (y = 0..15)"] + pub fn set_odr(&mut self, n: usize, val: super::vals::Odr) { + assert!(n < 16usize); + let offs = 0usize + n * 1usize; + self.0 = (self.0 & !(0x01 << offs)) | (((val.0 as u32) & 0x01) << offs); + } + } + impl Default for Odr { + fn default() -> Odr { + Odr(0) + } + } + #[doc = "GPIO alternate function register"] + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq)] + pub struct Afr(pub u32); + impl Afr { + #[doc = "Alternate function selection for port x bit y (y = 0..15)"] + pub fn afr(&self, n: usize) -> super::vals::Afr { + assert!(n < 8usize); + let offs = 0usize + n * 4usize; + let val = (self.0 >> offs) & 0x0f; + super::vals::Afr(val as u8) + } + #[doc = "Alternate function selection for port x bit y (y = 0..15)"] + pub fn set_afr(&mut self, n: usize, val: super::vals::Afr) { + assert!(n < 8usize); + let offs = 0usize + n * 4usize; + self.0 = (self.0 & !(0x0f << offs)) | (((val.0 as u32) & 0x0f) << offs); + } + } + impl Default for Afr { + fn default() -> Afr { + Afr(0) + } + } + #[doc = "GPIO port output speed register"] + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq)] + pub struct Ospeedr(pub u32); + impl Ospeedr { + #[doc = "Port x configuration bits (y = 0..15)"] + pub fn ospeedr(&self, n: usize) -> super::vals::Ospeedr { + assert!(n < 16usize); + let offs = 0usize + n * 2usize; + let val = (self.0 >> offs) & 0x03; + super::vals::Ospeedr(val as u8) + } + #[doc = "Port x configuration bits (y = 0..15)"] + pub fn set_ospeedr(&mut self, n: usize, val: super::vals::Ospeedr) { + assert!(n < 16usize); + let offs = 0usize + n * 2usize; + self.0 = (self.0 & !(0x03 << offs)) | (((val.0 as u32) & 0x03) << offs); + } + } + impl Default for Ospeedr { + fn default() -> Ospeedr { + Ospeedr(0) + } + } + } + pub mod vals { + use crate::generic::*; + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] + pub struct Idr(pub u8); + impl Idr { + #[doc = "Input is logic low"] + pub const LOW: Self = Self(0); + #[doc = "Input is logic high"] + pub const HIGH: Self = Self(0x01); + } + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] + pub struct Bsw(pub u8); + impl Bsw { + #[doc = "Sets the corresponding ODRx bit"] + pub const SET: Self = Self(0x01); + } + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] + pub struct Lckk(pub u8); + impl Lckk { + #[doc = "Port configuration lock key not active"] + pub const NOTACTIVE: Self = Self(0); + #[doc = "Port configuration lock key active"] + pub const ACTIVE: Self = Self(0x01); + } + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] + pub struct Lck(pub u8); + impl Lck { + #[doc = "Port configuration not locked"] + pub const UNLOCKED: Self = Self(0); + #[doc = "Port configuration locked"] + pub const LOCKED: Self = Self(0x01); + } + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] + pub struct Brw(pub u8); + impl Brw { + #[doc = "Resets the corresponding ODRx bit"] + pub const RESET: Self = Self(0x01); + } + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] + pub struct Ospeedr(pub u8); + impl Ospeedr { + #[doc = "Low speed"] + pub const LOWSPEED: Self = Self(0); + #[doc = "Medium speed"] + pub const MEDIUMSPEED: Self = Self(0x01); + #[doc = "High speed"] + pub const HIGHSPEED: Self = Self(0x02); + #[doc = "Very high speed"] + pub const VERYHIGHSPEED: Self = Self(0x03); + } + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] + pub struct Ot(pub u8); + impl Ot { + #[doc = "Output push-pull (reset state)"] + pub const PUSHPULL: Self = Self(0); + #[doc = "Output open-drain"] + pub const OPENDRAIN: Self = Self(0x01); + } + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] + pub struct Afr(pub u8); + impl Afr { + #[doc = "AF0"] + pub const AF0: Self = Self(0); + #[doc = "AF1"] + pub const AF1: Self = Self(0x01); + #[doc = "AF2"] + pub const AF2: Self = Self(0x02); + #[doc = "AF3"] + pub const AF3: Self = Self(0x03); + #[doc = "AF4"] + pub const AF4: Self = Self(0x04); + #[doc = "AF5"] + pub const AF5: Self = Self(0x05); + #[doc = "AF6"] + pub const AF6: Self = Self(0x06); + #[doc = "AF7"] + pub const AF7: Self = Self(0x07); + #[doc = "AF8"] + pub const AF8: Self = Self(0x08); + #[doc = "AF9"] + pub const AF9: Self = Self(0x09); + #[doc = "AF10"] + pub const AF10: Self = Self(0x0a); + #[doc = "AF11"] + pub const AF11: Self = Self(0x0b); + #[doc = "AF12"] + pub const AF12: Self = Self(0x0c); + #[doc = "AF13"] + pub const AF13: Self = Self(0x0d); + #[doc = "AF14"] + pub const AF14: Self = Self(0x0e); + #[doc = "AF15"] + pub const AF15: Self = Self(0x0f); + } + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] + pub struct Moder(pub u8); + impl Moder { + #[doc = "Input mode (reset state)"] + pub const INPUT: Self = Self(0); + #[doc = "General purpose output mode"] + pub const OUTPUT: Self = Self(0x01); + #[doc = "Alternate function mode"] + pub const ALTERNATE: Self = Self(0x02); + #[doc = "Analog mode"] + pub const ANALOG: Self = Self(0x03); + } + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] + pub struct Odr(pub u8); + impl Odr { + #[doc = "Set output to logic low"] + pub const LOW: Self = Self(0); + #[doc = "Set output to logic high"] + pub const HIGH: Self = Self(0x01); + } + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] + pub struct Pupdr(pub u8); + impl Pupdr { + #[doc = "No pull-up, pull-down"] + pub const FLOATING: Self = Self(0); + #[doc = "Pull-up"] + pub const PULLUP: Self = Self(0x01); + #[doc = "Pull-down"] + pub const PULLDOWN: Self = Self(0x02); + } + } +} +pub mod exti_v1 { + use crate::generic::*; + #[doc = "External interrupt/event controller"] + #[derive(Copy, Clone)] + pub struct Exti(pub *mut u8); + unsafe impl Send for Exti {} + unsafe impl Sync for Exti {} + impl Exti { + #[doc = "Interrupt mask register (EXTI_IMR)"] + pub fn imr(self) -> Reg { + unsafe { Reg::from_ptr(self.0.add(0usize)) } + } + #[doc = "Event mask register (EXTI_EMR)"] + pub fn emr(self) -> Reg { + unsafe { Reg::from_ptr(self.0.add(4usize)) } + } + #[doc = "Rising Trigger selection register (EXTI_RTSR)"] + pub fn rtsr(self) -> Reg { + unsafe { Reg::from_ptr(self.0.add(8usize)) } + } + #[doc = "Falling Trigger selection register (EXTI_FTSR)"] + pub fn ftsr(self) -> Reg { + unsafe { Reg::from_ptr(self.0.add(12usize)) } + } + #[doc = "Software interrupt event register (EXTI_SWIER)"] + pub fn swier(self) -> Reg { + unsafe { Reg::from_ptr(self.0.add(16usize)) } + } + #[doc = "Pending register (EXTI_PR)"] + pub fn pr(self) -> Reg { + unsafe { Reg::from_ptr(self.0.add(20usize)) } + } + } + pub mod regs { + use crate::generic::*; + #[doc = "Rising Trigger selection register (EXTI_RTSR)"] + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq)] + pub struct Rtsr(pub u32); + impl Rtsr { + #[doc = "Rising trigger event configuration of line 0"] + pub fn tr(&self, n: usize) -> super::vals::Tr { + assert!(n < 23usize); + let offs = 0usize + n * 1usize; + let val = (self.0 >> offs) & 0x01; + super::vals::Tr(val as u8) + } + #[doc = "Rising trigger event configuration of line 0"] + pub fn set_tr(&mut self, n: usize, val: super::vals::Tr) { + assert!(n < 23usize); + let offs = 0usize + n * 1usize; + self.0 = (self.0 & !(0x01 << offs)) | (((val.0 as u32) & 0x01) << offs); + } + } + impl Default for Rtsr { + fn default() -> Rtsr { + Rtsr(0) + } + } + #[doc = "Interrupt mask register (EXTI_IMR)"] + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq)] + pub struct Imr(pub u32); + impl Imr { + #[doc = "Interrupt Mask on line 0"] + pub fn mr(&self, n: usize) -> super::vals::Mr { + assert!(n < 23usize); + let offs = 0usize + n * 1usize; + let val = (self.0 >> offs) & 0x01; + super::vals::Mr(val as u8) + } + #[doc = "Interrupt Mask on line 0"] + pub fn set_mr(&mut self, n: usize, val: super::vals::Mr) { + assert!(n < 23usize); + let offs = 0usize + n * 1usize; + self.0 = (self.0 & !(0x01 << offs)) | (((val.0 as u32) & 0x01) << offs); + } + } + impl Default for Imr { + fn default() -> Imr { + Imr(0) + } + } + #[doc = "Software interrupt event register (EXTI_SWIER)"] + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq)] + pub struct Swier(pub u32); + impl Swier { + #[doc = "Software Interrupt on line 0"] + pub fn swier(&self, n: usize) -> bool { + assert!(n < 23usize); + let offs = 0usize + n * 1usize; + let val = (self.0 >> offs) & 0x01; + val != 0 + } + #[doc = "Software Interrupt on line 0"] + pub fn set_swier(&mut self, n: usize, val: bool) { + assert!(n < 23usize); + let offs = 0usize + n * 1usize; + self.0 = (self.0 & !(0x01 << offs)) | (((val as u32) & 0x01) << offs); + } + } + impl Default for Swier { + fn default() -> Swier { + Swier(0) + } + } + #[doc = "Event mask register (EXTI_EMR)"] + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq)] + pub struct Emr(pub u32); + impl Emr { + #[doc = "Event Mask on line 0"] + pub fn mr(&self, n: usize) -> super::vals::Mr { + assert!(n < 23usize); + let offs = 0usize + n * 1usize; + let val = (self.0 >> offs) & 0x01; + super::vals::Mr(val as u8) + } + #[doc = "Event Mask on line 0"] + pub fn set_mr(&mut self, n: usize, val: super::vals::Mr) { + assert!(n < 23usize); + let offs = 0usize + n * 1usize; + self.0 = (self.0 & !(0x01 << offs)) | (((val.0 as u32) & 0x01) << offs); + } + } + impl Default for Emr { + fn default() -> Emr { + Emr(0) + } + } + #[doc = "Pending register (EXTI_PR)"] + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq)] + pub struct Pr(pub u32); + impl Pr { + #[doc = "Pending bit 0"] + pub fn pr(&self, n: usize) -> bool { + assert!(n < 23usize); + let offs = 0usize + n * 1usize; + let val = (self.0 >> offs) & 0x01; + val != 0 + } + #[doc = "Pending bit 0"] + pub fn set_pr(&mut self, n: usize, val: bool) { + assert!(n < 23usize); + let offs = 0usize + n * 1usize; + self.0 = (self.0 & !(0x01 << offs)) | (((val as u32) & 0x01) << offs); + } + } + impl Default for Pr { + fn default() -> Pr { + Pr(0) + } + } + #[doc = "Falling Trigger selection register (EXTI_FTSR)"] + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq)] + pub struct Ftsr(pub u32); + impl Ftsr { + #[doc = "Falling trigger event configuration of line 0"] + pub fn tr(&self, n: usize) -> super::vals::Tr { + assert!(n < 23usize); + let offs = 0usize + n * 1usize; + let val = (self.0 >> offs) & 0x01; + super::vals::Tr(val as u8) + } + #[doc = "Falling trigger event configuration of line 0"] + pub fn set_tr(&mut self, n: usize, val: super::vals::Tr) { + assert!(n < 23usize); + let offs = 0usize + n * 1usize; + self.0 = (self.0 & !(0x01 << offs)) | (((val.0 as u32) & 0x01) << offs); + } + } + impl Default for Ftsr { + fn default() -> Ftsr { + Ftsr(0) + } + } + } + pub mod vals { + use crate::generic::*; + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] + pub struct Prw(pub u8); + impl Prw { + #[doc = "Clears pending bit"] + pub const CLEAR: Self = Self(0x01); + } + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] + pub struct Prr(pub u8); + impl Prr { + #[doc = "No trigger request occurred"] + pub const NOTPENDING: Self = Self(0); + #[doc = "Selected trigger request occurred"] + pub const PENDING: Self = Self(0x01); + } + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] + pub struct Tr(pub u8); + impl Tr { + #[doc = "Falling edge trigger is disabled"] + pub const DISABLED: Self = Self(0); + #[doc = "Falling edge trigger is enabled"] + pub const ENABLED: Self = Self(0x01); + } + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] + pub struct Mr(pub u8); + impl Mr { + #[doc = "Interrupt request line is masked"] + pub const MASKED: Self = Self(0); + #[doc = "Interrupt request line is unmasked"] + pub const UNMASKED: Self = Self(0x01); + } + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] + pub struct Swierw(pub u8); + impl Swierw { + #[doc = "Generates an interrupt request"] + pub const PEND: Self = Self(0x01); + } + } +} +pub mod usart_v1 { + use crate::generic::*; + #[doc = "Universal synchronous asynchronous receiver transmitter"] + #[derive(Copy, Clone)] + pub struct Usart(pub *mut u8); + unsafe impl Send for Usart {} + unsafe impl Sync for Usart {} + impl Usart { + #[doc = "Status register"] + pub fn sr(self) -> Reg { + unsafe { Reg::from_ptr(self.0.add(0usize)) } + } + #[doc = "Data register"] + pub fn dr(self) -> Reg { + unsafe { Reg::from_ptr(self.0.add(4usize)) } + } + #[doc = "Baud rate register"] + pub fn brr(self) -> Reg { + unsafe { Reg::from_ptr(self.0.add(8usize)) } + } + #[doc = "Control register 1"] + pub fn cr1(self) -> Reg { + unsafe { Reg::from_ptr(self.0.add(12usize)) } + } + #[doc = "Control register 2"] + pub fn cr2(self) -> Reg { + unsafe { Reg::from_ptr(self.0.add(16usize)) } + } + #[doc = "Control register 3"] + pub fn cr3(self) -> Reg { + unsafe { Reg::from_ptr(self.0.add(20usize)) } + } + #[doc = "Guard time and prescaler register"] + pub fn gtpr(self) -> Reg { + unsafe { Reg::from_ptr(self.0.add(24usize)) } + } + } + #[doc = "Universal asynchronous receiver transmitter"] + #[derive(Copy, Clone)] + pub struct Uart(pub *mut u8); + unsafe impl Send for Uart {} + unsafe impl Sync for Uart {} + impl Uart { + #[doc = "Status register"] + pub fn sr(self) -> Reg { + unsafe { Reg::from_ptr(self.0.add(0usize)) } + } + #[doc = "Data register"] + pub fn dr(self) -> Reg { + unsafe { Reg::from_ptr(self.0.add(4usize)) } + } + #[doc = "Baud rate register"] + pub fn brr(self) -> Reg { + unsafe { Reg::from_ptr(self.0.add(8usize)) } + } + #[doc = "Control register 1"] + pub fn cr1(self) -> Reg { + unsafe { Reg::from_ptr(self.0.add(12usize)) } + } + #[doc = "Control register 2"] + pub fn cr2(self) -> Reg { + unsafe { Reg::from_ptr(self.0.add(16usize)) } + } + #[doc = "Control register 3"] + pub fn cr3(self) -> Reg { + unsafe { Reg::from_ptr(self.0.add(20usize)) } + } + } + pub mod vals { + use crate::generic::*; + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] + pub struct Hdsel(pub u8); + impl Hdsel { + #[doc = "Half duplex mode is not selected"] + pub const FULLDUPLEX: Self = Self(0); + #[doc = "Half duplex mode is selected"] + pub const HALFDUPLEX: Self = Self(0x01); + } + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] + pub struct M(pub u8); + impl M { + #[doc = "8 data bits"] + pub const M8: Self = Self(0); + #[doc = "9 data bits"] + pub const M9: Self = Self(0x01); + } + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] + pub struct Cpol(pub u8); + impl Cpol { + #[doc = "Steady low value on CK pin outside transmission window"] + pub const LOW: Self = Self(0); + #[doc = "Steady high value on CK pin outside transmission window"] + pub const HIGH: Self = Self(0x01); + } + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] + pub struct Rwu(pub u8); + impl Rwu { + #[doc = "Receiver in active mode"] + pub const ACTIVE: Self = Self(0); + #[doc = "Receiver in mute mode"] + pub const MUTE: Self = Self(0x01); + } + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] + pub struct Ps(pub u8); + impl Ps { + #[doc = "Even parity"] + pub const EVEN: Self = Self(0); + #[doc = "Odd parity"] + pub const ODD: Self = Self(0x01); + } + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] + pub struct Irlp(pub u8); + impl Irlp { + #[doc = "Normal mode"] + pub const NORMAL: Self = Self(0); + #[doc = "Low-power mode"] + pub const LOWPOWER: Self = Self(0x01); + } + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] + pub struct Stop(pub u8); + impl Stop { + #[doc = "1 stop bit"] + pub const STOP1: Self = Self(0); + #[doc = "0.5 stop bits"] + pub const STOP0P5: Self = Self(0x01); + #[doc = "2 stop bits"] + pub const STOP2: Self = Self(0x02); + #[doc = "1.5 stop bits"] + pub const STOP1P5: Self = Self(0x03); + } + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] + pub struct Cpha(pub u8); + impl Cpha { + #[doc = "The first clock transition is the first data capture edge"] + pub const FIRST: Self = Self(0); + #[doc = "The second clock transition is the first data capture edge"] + pub const SECOND: Self = Self(0x01); + } + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] + pub struct Wake(pub u8); + impl Wake { + #[doc = "USART wakeup on idle line"] + pub const IDLELINE: Self = Self(0); + #[doc = "USART wakeup on address mark"] + pub const ADDRESSMARK: Self = Self(0x01); + } + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] + pub struct Lbdl(pub u8); + impl Lbdl { + #[doc = "10-bit break detection"] + pub const LBDL10: Self = Self(0); + #[doc = "11-bit break detection"] + pub const LBDL11: Self = Self(0x01); + } + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] + pub struct Sbk(pub u8); + impl Sbk { + #[doc = "No break character is transmitted"] + pub const NOBREAK: Self = Self(0); + #[doc = "Break character transmitted"] + pub const BREAK: Self = Self(0x01); + } + } + pub mod regs { + use crate::generic::*; + #[doc = "Status register"] + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq)] + pub struct Sr(pub u32); + impl Sr { + #[doc = "Parity error"] + pub const fn pe(&self) -> bool { + let val = (self.0 >> 0usize) & 0x01; + val != 0 + } + #[doc = "Parity error"] + pub fn set_pe(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize); + } + #[doc = "Framing error"] + pub const fn fe(&self) -> bool { + let val = (self.0 >> 1usize) & 0x01; + val != 0 + } + #[doc = "Framing error"] + pub fn set_fe(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 1usize)) | (((val as u32) & 0x01) << 1usize); + } + #[doc = "Noise error flag"] + pub const fn ne(&self) -> bool { + let val = (self.0 >> 2usize) & 0x01; + val != 0 + } + #[doc = "Noise error flag"] + pub fn set_ne(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 2usize)) | (((val as u32) & 0x01) << 2usize); + } + #[doc = "Overrun error"] + pub const fn ore(&self) -> bool { + let val = (self.0 >> 3usize) & 0x01; + val != 0 + } + #[doc = "Overrun error"] + pub fn set_ore(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 3usize)) | (((val as u32) & 0x01) << 3usize); + } + #[doc = "IDLE line detected"] + pub const fn idle(&self) -> bool { + let val = (self.0 >> 4usize) & 0x01; + val != 0 + } + #[doc = "IDLE line detected"] + pub fn set_idle(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 4usize)) | (((val as u32) & 0x01) << 4usize); + } + #[doc = "Read data register not empty"] + pub const fn rxne(&self) -> bool { + let val = (self.0 >> 5usize) & 0x01; + val != 0 + } + #[doc = "Read data register not empty"] + pub fn set_rxne(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 5usize)) | (((val as u32) & 0x01) << 5usize); + } + #[doc = "Transmission complete"] + pub const fn tc(&self) -> bool { + let val = (self.0 >> 6usize) & 0x01; + val != 0 + } + #[doc = "Transmission complete"] + pub fn set_tc(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 6usize)) | (((val as u32) & 0x01) << 6usize); + } + #[doc = "Transmit data register empty"] + pub const fn txe(&self) -> bool { + let val = (self.0 >> 7usize) & 0x01; + val != 0 + } + #[doc = "Transmit data register empty"] + pub fn set_txe(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 7usize)) | (((val as u32) & 0x01) << 7usize); + } + #[doc = "LIN break detection flag"] + pub const fn lbd(&self) -> bool { + let val = (self.0 >> 8usize) & 0x01; + val != 0 + } + #[doc = "LIN break detection flag"] + pub fn set_lbd(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 8usize)) | (((val as u32) & 0x01) << 8usize); + } + } + impl Default for Sr { + fn default() -> Sr { + Sr(0) + } + } + #[doc = "Control register 2"] + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq)] + pub struct Cr2(pub u32); + impl Cr2 { + #[doc = "Address of the USART node"] + pub const fn add(&self) -> u8 { + let val = (self.0 >> 0usize) & 0x0f; + val as u8 + } + #[doc = "Address of the USART node"] + pub fn set_add(&mut self, val: u8) { + self.0 = (self.0 & !(0x0f << 0usize)) | (((val as u32) & 0x0f) << 0usize); + } + #[doc = "lin break detection length"] + pub const fn lbdl(&self) -> super::vals::Lbdl { + let val = (self.0 >> 5usize) & 0x01; + super::vals::Lbdl(val as u8) + } + #[doc = "lin break detection length"] + pub fn set_lbdl(&mut self, val: super::vals::Lbdl) { + self.0 = (self.0 & !(0x01 << 5usize)) | (((val.0 as u32) & 0x01) << 5usize); + } + #[doc = "LIN break detection interrupt enable"] + pub const fn lbdie(&self) -> bool { + let val = (self.0 >> 6usize) & 0x01; + val != 0 + } + #[doc = "LIN break detection interrupt enable"] + pub fn set_lbdie(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 6usize)) | (((val as u32) & 0x01) << 6usize); + } + #[doc = "STOP bits"] + pub const fn stop(&self) -> super::vals::Stop { + let val = (self.0 >> 12usize) & 0x03; + super::vals::Stop(val as u8) + } + #[doc = "STOP bits"] + pub fn set_stop(&mut self, val: super::vals::Stop) { + self.0 = (self.0 & !(0x03 << 12usize)) | (((val.0 as u32) & 0x03) << 12usize); + } + #[doc = "LIN mode enable"] + pub const fn linen(&self) -> bool { + let val = (self.0 >> 14usize) & 0x01; + val != 0 + } + #[doc = "LIN mode enable"] + pub fn set_linen(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 14usize)) | (((val as u32) & 0x01) << 14usize); + } + } + impl Default for Cr2 { + fn default() -> Cr2 { + Cr2(0) + } + } + #[doc = "Control register 1"] + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq)] + pub struct Cr1(pub u32); + impl Cr1 { + #[doc = "Send break"] + pub const fn sbk(&self) -> super::vals::Sbk { + let val = (self.0 >> 0usize) & 0x01; + super::vals::Sbk(val as u8) + } + #[doc = "Send break"] + pub fn set_sbk(&mut self, val: super::vals::Sbk) { + self.0 = (self.0 & !(0x01 << 0usize)) | (((val.0 as u32) & 0x01) << 0usize); + } + #[doc = "Receiver wakeup"] + pub const fn rwu(&self) -> super::vals::Rwu { + let val = (self.0 >> 1usize) & 0x01; + super::vals::Rwu(val as u8) + } + #[doc = "Receiver wakeup"] + pub fn set_rwu(&mut self, val: super::vals::Rwu) { + self.0 = (self.0 & !(0x01 << 1usize)) | (((val.0 as u32) & 0x01) << 1usize); + } + #[doc = "Receiver enable"] + pub const fn re(&self) -> bool { + let val = (self.0 >> 2usize) & 0x01; + val != 0 + } + #[doc = "Receiver enable"] + pub fn set_re(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 2usize)) | (((val as u32) & 0x01) << 2usize); + } + #[doc = "Transmitter enable"] + pub const fn te(&self) -> bool { + let val = (self.0 >> 3usize) & 0x01; + val != 0 + } + #[doc = "Transmitter enable"] + pub fn set_te(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 3usize)) | (((val as u32) & 0x01) << 3usize); + } + #[doc = "IDLE interrupt enable"] + pub const fn idleie(&self) -> bool { + let val = (self.0 >> 4usize) & 0x01; + val != 0 + } + #[doc = "IDLE interrupt enable"] + pub fn set_idleie(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 4usize)) | (((val as u32) & 0x01) << 4usize); + } + #[doc = "RXNE interrupt enable"] + pub const fn rxneie(&self) -> bool { + let val = (self.0 >> 5usize) & 0x01; + val != 0 + } + #[doc = "RXNE interrupt enable"] + pub fn set_rxneie(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 5usize)) | (((val as u32) & 0x01) << 5usize); + } + #[doc = "Transmission complete interrupt enable"] + pub const fn tcie(&self) -> bool { + let val = (self.0 >> 6usize) & 0x01; + val != 0 + } + #[doc = "Transmission complete interrupt enable"] + pub fn set_tcie(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 6usize)) | (((val as u32) & 0x01) << 6usize); + } + #[doc = "TXE interrupt enable"] + pub const fn txeie(&self) -> bool { + let val = (self.0 >> 7usize) & 0x01; + val != 0 + } + #[doc = "TXE interrupt enable"] + pub fn set_txeie(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 7usize)) | (((val as u32) & 0x01) << 7usize); + } + #[doc = "PE interrupt enable"] + pub const fn peie(&self) -> bool { + let val = (self.0 >> 8usize) & 0x01; + val != 0 + } + #[doc = "PE interrupt enable"] + pub fn set_peie(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 8usize)) | (((val as u32) & 0x01) << 8usize); + } + #[doc = "Parity selection"] + pub const fn ps(&self) -> super::vals::Ps { + let val = (self.0 >> 9usize) & 0x01; + super::vals::Ps(val as u8) + } + #[doc = "Parity selection"] + pub fn set_ps(&mut self, val: super::vals::Ps) { + self.0 = (self.0 & !(0x01 << 9usize)) | (((val.0 as u32) & 0x01) << 9usize); + } + #[doc = "Parity control enable"] + pub const fn pce(&self) -> bool { + let val = (self.0 >> 10usize) & 0x01; + val != 0 + } + #[doc = "Parity control enable"] + pub fn set_pce(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 10usize)) | (((val as u32) & 0x01) << 10usize); + } + #[doc = "Wakeup method"] + pub const fn wake(&self) -> super::vals::Wake { + let val = (self.0 >> 11usize) & 0x01; + super::vals::Wake(val as u8) + } + #[doc = "Wakeup method"] + pub fn set_wake(&mut self, val: super::vals::Wake) { + self.0 = (self.0 & !(0x01 << 11usize)) | (((val.0 as u32) & 0x01) << 11usize); + } + #[doc = "Word length"] + pub const fn m(&self) -> super::vals::M { + let val = (self.0 >> 12usize) & 0x01; + super::vals::M(val as u8) + } + #[doc = "Word length"] + pub fn set_m(&mut self, val: super::vals::M) { + self.0 = (self.0 & !(0x01 << 12usize)) | (((val.0 as u32) & 0x01) << 12usize); + } + #[doc = "USART enable"] + pub const fn ue(&self) -> bool { + let val = (self.0 >> 13usize) & 0x01; + val != 0 + } + #[doc = "USART enable"] + pub fn set_ue(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 13usize)) | (((val as u32) & 0x01) << 13usize); + } + } + impl Default for Cr1 { + fn default() -> Cr1 { + Cr1(0) + } + } + #[doc = "Guard time and prescaler register"] + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq)] + pub struct Gtpr(pub u32); + impl Gtpr { + #[doc = "Prescaler value"] + pub const fn psc(&self) -> u8 { + let val = (self.0 >> 0usize) & 0xff; + val as u8 + } + #[doc = "Prescaler value"] + pub fn set_psc(&mut self, val: u8) { + self.0 = (self.0 & !(0xff << 0usize)) | (((val as u32) & 0xff) << 0usize); + } + #[doc = "Guard time value"] + pub const fn gt(&self) -> u8 { + let val = (self.0 >> 8usize) & 0xff; + val as u8 + } + #[doc = "Guard time value"] + pub fn set_gt(&mut self, val: u8) { + self.0 = (self.0 & !(0xff << 8usize)) | (((val as u32) & 0xff) << 8usize); + } + } + impl Default for Gtpr { + fn default() -> Gtpr { + Gtpr(0) + } + } + #[doc = "Baud rate register"] + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq)] + pub struct Brr(pub u32); + impl Brr { + #[doc = "fraction of USARTDIV"] + pub const fn div_fraction(&self) -> u8 { + let val = (self.0 >> 0usize) & 0x0f; + val as u8 + } + #[doc = "fraction of USARTDIV"] + pub fn set_div_fraction(&mut self, val: u8) { + self.0 = (self.0 & !(0x0f << 0usize)) | (((val as u32) & 0x0f) << 0usize); + } + #[doc = "mantissa of USARTDIV"] + pub const fn div_mantissa(&self) -> u16 { + let val = (self.0 >> 4usize) & 0x0fff; + val as u16 + } + #[doc = "mantissa of USARTDIV"] + pub fn set_div_mantissa(&mut self, val: u16) { + self.0 = (self.0 & !(0x0fff << 4usize)) | (((val as u32) & 0x0fff) << 4usize); + } + } + impl Default for Brr { + fn default() -> Brr { + Brr(0) + } + } + #[doc = "Control register 2"] + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq)] + pub struct Cr2Usart(pub u32); + impl Cr2Usart { + #[doc = "Address of the USART node"] + pub const fn add(&self) -> u8 { + let val = (self.0 >> 0usize) & 0x0f; + val as u8 + } + #[doc = "Address of the USART node"] + pub fn set_add(&mut self, val: u8) { + self.0 = (self.0 & !(0x0f << 0usize)) | (((val as u32) & 0x0f) << 0usize); + } + #[doc = "lin break detection length"] + pub const fn lbdl(&self) -> super::vals::Lbdl { + let val = (self.0 >> 5usize) & 0x01; + super::vals::Lbdl(val as u8) + } + #[doc = "lin break detection length"] + pub fn set_lbdl(&mut self, val: super::vals::Lbdl) { + self.0 = (self.0 & !(0x01 << 5usize)) | (((val.0 as u32) & 0x01) << 5usize); + } + #[doc = "LIN break detection interrupt enable"] + pub const fn lbdie(&self) -> bool { + let val = (self.0 >> 6usize) & 0x01; + val != 0 + } + #[doc = "LIN break detection interrupt enable"] + pub fn set_lbdie(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 6usize)) | (((val as u32) & 0x01) << 6usize); + } + #[doc = "Last bit clock pulse"] + pub const fn lbcl(&self) -> bool { + let val = (self.0 >> 8usize) & 0x01; + val != 0 + } + #[doc = "Last bit clock pulse"] + pub fn set_lbcl(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 8usize)) | (((val as u32) & 0x01) << 8usize); + } + #[doc = "Clock phase"] + pub const fn cpha(&self) -> super::vals::Cpha { + let val = (self.0 >> 9usize) & 0x01; + super::vals::Cpha(val as u8) + } + #[doc = "Clock phase"] + pub fn set_cpha(&mut self, val: super::vals::Cpha) { + self.0 = (self.0 & !(0x01 << 9usize)) | (((val.0 as u32) & 0x01) << 9usize); + } + #[doc = "Clock polarity"] + pub const fn cpol(&self) -> super::vals::Cpol { + let val = (self.0 >> 10usize) & 0x01; + super::vals::Cpol(val as u8) + } + #[doc = "Clock polarity"] + pub fn set_cpol(&mut self, val: super::vals::Cpol) { + self.0 = (self.0 & !(0x01 << 10usize)) | (((val.0 as u32) & 0x01) << 10usize); + } + #[doc = "Clock enable"] + pub const fn clken(&self) -> bool { + let val = (self.0 >> 11usize) & 0x01; + val != 0 + } + #[doc = "Clock enable"] + pub fn set_clken(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 11usize)) | (((val as u32) & 0x01) << 11usize); + } + #[doc = "STOP bits"] + pub const fn stop(&self) -> super::vals::Stop { + let val = (self.0 >> 12usize) & 0x03; + super::vals::Stop(val as u8) + } + #[doc = "STOP bits"] + pub fn set_stop(&mut self, val: super::vals::Stop) { + self.0 = (self.0 & !(0x03 << 12usize)) | (((val.0 as u32) & 0x03) << 12usize); + } + #[doc = "LIN mode enable"] + pub const fn linen(&self) -> bool { + let val = (self.0 >> 14usize) & 0x01; + val != 0 + } + #[doc = "LIN mode enable"] + pub fn set_linen(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 14usize)) | (((val as u32) & 0x01) << 14usize); + } + } + impl Default for Cr2Usart { + fn default() -> Cr2Usart { + Cr2Usart(0) + } + } + #[doc = "Data register"] + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq)] + pub struct Dr(pub u32); + impl Dr { + #[doc = "Data value"] + pub const fn dr(&self) -> u16 { + let val = (self.0 >> 0usize) & 0x01ff; + val as u16 + } + #[doc = "Data value"] + pub fn set_dr(&mut self, val: u16) { + self.0 = (self.0 & !(0x01ff << 0usize)) | (((val as u32) & 0x01ff) << 0usize); + } + } + impl Default for Dr { + fn default() -> Dr { + Dr(0) + } + } + #[doc = "Control register 3"] + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq)] + pub struct Cr3(pub u32); + impl Cr3 { + #[doc = "Error interrupt enable"] + pub const fn eie(&self) -> bool { + let val = (self.0 >> 0usize) & 0x01; + val != 0 + } + #[doc = "Error interrupt enable"] + pub fn set_eie(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize); + } + #[doc = "IrDA mode enable"] + pub const fn iren(&self) -> bool { + let val = (self.0 >> 1usize) & 0x01; + val != 0 + } + #[doc = "IrDA mode enable"] + pub fn set_iren(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 1usize)) | (((val as u32) & 0x01) << 1usize); + } + #[doc = "IrDA low-power"] + pub const fn irlp(&self) -> super::vals::Irlp { + let val = (self.0 >> 2usize) & 0x01; + super::vals::Irlp(val as u8) + } + #[doc = "IrDA low-power"] + pub fn set_irlp(&mut self, val: super::vals::Irlp) { + self.0 = (self.0 & !(0x01 << 2usize)) | (((val.0 as u32) & 0x01) << 2usize); + } + #[doc = "Half-duplex selection"] + pub const fn hdsel(&self) -> super::vals::Hdsel { + let val = (self.0 >> 3usize) & 0x01; + super::vals::Hdsel(val as u8) + } + #[doc = "Half-duplex selection"] + pub fn set_hdsel(&mut self, val: super::vals::Hdsel) { + self.0 = (self.0 & !(0x01 << 3usize)) | (((val.0 as u32) & 0x01) << 3usize); + } + #[doc = "DMA enable receiver"] + pub const fn dmar(&self) -> bool { + let val = (self.0 >> 6usize) & 0x01; + val != 0 + } + #[doc = "DMA enable receiver"] + pub fn set_dmar(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 6usize)) | (((val as u32) & 0x01) << 6usize); + } + #[doc = "DMA enable transmitter"] + pub const fn dmat(&self) -> bool { + let val = (self.0 >> 7usize) & 0x01; + val != 0 + } + #[doc = "DMA enable transmitter"] + pub fn set_dmat(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 7usize)) | (((val as u32) & 0x01) << 7usize); + } + } + impl Default for Cr3 { + fn default() -> Cr3 { + Cr3(0) + } + } + #[doc = "Status register"] + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq)] + pub struct SrUsart(pub u32); + impl SrUsart { + #[doc = "Parity error"] + pub const fn pe(&self) -> bool { + let val = (self.0 >> 0usize) & 0x01; + val != 0 + } + #[doc = "Parity error"] + pub fn set_pe(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize); + } + #[doc = "Framing error"] + pub const fn fe(&self) -> bool { + let val = (self.0 >> 1usize) & 0x01; + val != 0 + } + #[doc = "Framing error"] + pub fn set_fe(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 1usize)) | (((val as u32) & 0x01) << 1usize); + } + #[doc = "Noise error flag"] + pub const fn ne(&self) -> bool { + let val = (self.0 >> 2usize) & 0x01; + val != 0 + } + #[doc = "Noise error flag"] + pub fn set_ne(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 2usize)) | (((val as u32) & 0x01) << 2usize); + } + #[doc = "Overrun error"] + pub const fn ore(&self) -> bool { + let val = (self.0 >> 3usize) & 0x01; + val != 0 + } + #[doc = "Overrun error"] + pub fn set_ore(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 3usize)) | (((val as u32) & 0x01) << 3usize); + } + #[doc = "IDLE line detected"] + pub const fn idle(&self) -> bool { + let val = (self.0 >> 4usize) & 0x01; + val != 0 + } + #[doc = "IDLE line detected"] + pub fn set_idle(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 4usize)) | (((val as u32) & 0x01) << 4usize); + } + #[doc = "Read data register not empty"] + pub const fn rxne(&self) -> bool { + let val = (self.0 >> 5usize) & 0x01; + val != 0 + } + #[doc = "Read data register not empty"] + pub fn set_rxne(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 5usize)) | (((val as u32) & 0x01) << 5usize); + } + #[doc = "Transmission complete"] + pub const fn tc(&self) -> bool { + let val = (self.0 >> 6usize) & 0x01; + val != 0 + } + #[doc = "Transmission complete"] + pub fn set_tc(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 6usize)) | (((val as u32) & 0x01) << 6usize); + } + #[doc = "Transmit data register empty"] + pub const fn txe(&self) -> bool { + let val = (self.0 >> 7usize) & 0x01; + val != 0 + } + #[doc = "Transmit data register empty"] + pub fn set_txe(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 7usize)) | (((val as u32) & 0x01) << 7usize); + } + #[doc = "LIN break detection flag"] + pub const fn lbd(&self) -> bool { + let val = (self.0 >> 8usize) & 0x01; + val != 0 + } + #[doc = "LIN break detection flag"] + pub fn set_lbd(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 8usize)) | (((val as u32) & 0x01) << 8usize); + } + #[doc = "CTS flag"] + pub const fn cts(&self) -> bool { + let val = (self.0 >> 9usize) & 0x01; + val != 0 + } + #[doc = "CTS flag"] + pub fn set_cts(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 9usize)) | (((val as u32) & 0x01) << 9usize); + } + } + impl Default for SrUsart { + fn default() -> SrUsart { + SrUsart(0) + } + } + #[doc = "Control register 3"] + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq)] + pub struct Cr3Usart(pub u32); + impl Cr3Usart { + #[doc = "Error interrupt enable"] + pub const fn eie(&self) -> bool { + let val = (self.0 >> 0usize) & 0x01; + val != 0 + } + #[doc = "Error interrupt enable"] + pub fn set_eie(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize); + } + #[doc = "IrDA mode enable"] + pub const fn iren(&self) -> bool { + let val = (self.0 >> 1usize) & 0x01; + val != 0 + } + #[doc = "IrDA mode enable"] + pub fn set_iren(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 1usize)) | (((val as u32) & 0x01) << 1usize); + } + #[doc = "IrDA low-power"] + pub const fn irlp(&self) -> super::vals::Irlp { + let val = (self.0 >> 2usize) & 0x01; + super::vals::Irlp(val as u8) + } + #[doc = "IrDA low-power"] + pub fn set_irlp(&mut self, val: super::vals::Irlp) { + self.0 = (self.0 & !(0x01 << 2usize)) | (((val.0 as u32) & 0x01) << 2usize); + } + #[doc = "Half-duplex selection"] + pub const fn hdsel(&self) -> super::vals::Hdsel { + let val = (self.0 >> 3usize) & 0x01; + super::vals::Hdsel(val as u8) + } + #[doc = "Half-duplex selection"] + pub fn set_hdsel(&mut self, val: super::vals::Hdsel) { + self.0 = (self.0 & !(0x01 << 3usize)) | (((val.0 as u32) & 0x01) << 3usize); + } + #[doc = "Smartcard NACK enable"] + pub const fn nack(&self) -> bool { + let val = (self.0 >> 4usize) & 0x01; + val != 0 + } + #[doc = "Smartcard NACK enable"] + pub fn set_nack(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 4usize)) | (((val as u32) & 0x01) << 4usize); + } + #[doc = "Smartcard mode enable"] + pub const fn scen(&self) -> bool { + let val = (self.0 >> 5usize) & 0x01; + val != 0 + } + #[doc = "Smartcard mode enable"] + pub fn set_scen(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 5usize)) | (((val as u32) & 0x01) << 5usize); + } + #[doc = "DMA enable receiver"] + pub const fn dmar(&self) -> bool { + let val = (self.0 >> 6usize) & 0x01; + val != 0 + } + #[doc = "DMA enable receiver"] + pub fn set_dmar(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 6usize)) | (((val as u32) & 0x01) << 6usize); + } + #[doc = "DMA enable transmitter"] + pub const fn dmat(&self) -> bool { + let val = (self.0 >> 7usize) & 0x01; + val != 0 + } + #[doc = "DMA enable transmitter"] + pub fn set_dmat(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 7usize)) | (((val as u32) & 0x01) << 7usize); + } + #[doc = "RTS enable"] + pub const fn rtse(&self) -> bool { + let val = (self.0 >> 8usize) & 0x01; + val != 0 + } + #[doc = "RTS enable"] + pub fn set_rtse(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 8usize)) | (((val as u32) & 0x01) << 8usize); + } + #[doc = "CTS enable"] + pub const fn ctse(&self) -> bool { + let val = (self.0 >> 9usize) & 0x01; + val != 0 + } + #[doc = "CTS enable"] + pub fn set_ctse(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 9usize)) | (((val as u32) & 0x01) << 9usize); + } + #[doc = "CTS interrupt enable"] + pub const fn ctsie(&self) -> bool { + let val = (self.0 >> 10usize) & 0x01; + val != 0 + } + #[doc = "CTS interrupt enable"] + pub fn set_ctsie(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 10usize)) | (((val as u32) & 0x01) << 10usize); + } + } + impl Default for Cr3Usart { + fn default() -> Cr3Usart { + Cr3Usart(0) + } + } + } +} +pub mod usart_v2 { + use crate::generic::*; + #[doc = "Universal synchronous asynchronous receiver transmitter"] + #[derive(Copy, Clone)] + pub struct Usart(pub *mut u8); + unsafe impl Send for Usart {} + unsafe impl Sync for Usart {} + impl Usart { + #[doc = "Control register 1"] + pub fn cr1(self) -> Reg { + unsafe { Reg::from_ptr(self.0.add(0usize)) } + } + #[doc = "Control register 2"] + pub fn cr2(self) -> Reg { + unsafe { Reg::from_ptr(self.0.add(4usize)) } + } + #[doc = "Control register 3"] + pub fn cr3(self) -> Reg { + unsafe { Reg::from_ptr(self.0.add(8usize)) } + } + #[doc = "Baud rate register"] + pub fn brr(self) -> Reg { + unsafe { Reg::from_ptr(self.0.add(12usize)) } + } + #[doc = "Guard time and prescaler register"] + pub fn gtpr(self) -> Reg { + unsafe { Reg::from_ptr(self.0.add(16usize)) } + } + #[doc = "Receiver timeout register"] + pub fn rtor(self) -> Reg { + unsafe { Reg::from_ptr(self.0.add(20usize)) } + } + #[doc = "Request register"] + pub fn rqr(self) -> Reg { + unsafe { Reg::from_ptr(self.0.add(24usize)) } + } + #[doc = "Interrupt & status register"] + pub fn isr(self) -> Reg { + unsafe { Reg::from_ptr(self.0.add(28usize)) } + } + #[doc = "Interrupt flag clear register"] + pub fn icr(self) -> Reg { + unsafe { Reg::from_ptr(self.0.add(32usize)) } + } + #[doc = "Receive data register"] + pub fn rdr(self) -> Reg { + unsafe { Reg::from_ptr(self.0.add(36usize)) } + } + #[doc = "Transmit data register"] + pub fn tdr(self) -> Reg { + unsafe { Reg::from_ptr(self.0.add(40usize)) } + } + } + pub mod vals { + use crate::generic::*; + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] + pub struct Datainv(pub u8); + impl Datainv { + #[doc = "Logical data from the data register are send/received in positive/direct logic"] + pub const POSITIVE: Self = Self(0); + #[doc = "Logical data from the data register are send/received in negative/inverse logic"] + pub const NEGATIVE: Self = Self(0x01); + } + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] + pub struct Ovrdis(pub u8); + impl Ovrdis { + #[doc = "Overrun Error Flag, ORE, is set when received data is not read before receiving new data"] + pub const ENABLED: Self = Self(0); + #[doc = "Overrun functionality is disabled. If new data is received while the RXNE flag is still set the ORE flag is not set and the new received data overwrites the previous content of the RDR register"] + pub const DISABLED: Self = Self(0x01); + } + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] + pub struct Ddre(pub u8); + impl Ddre { + #[doc = "DMA is not disabled in case of reception error"] + pub const NOTDISABLED: Self = Self(0); + #[doc = "DMA is disabled following a reception error"] + pub const DISABLED: Self = Self(0x01); + } + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] + pub struct M0(pub u8); + impl M0 { + #[doc = "1 start bit, 8 data bits, n stop bits"] + pub const BIT8: Self = Self(0); + #[doc = "1 start bit, 9 data bits, n stop bits"] + pub const BIT9: Self = Self(0x01); + } + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] + pub struct Onebit(pub u8); + impl Onebit { + #[doc = "Three sample bit method"] + pub const SAMPLE3: Self = Self(0); + #[doc = "One sample bit method"] + pub const SAMPLE1: Self = Self(0x01); + } + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] + pub struct Txinv(pub u8); + impl Txinv { + #[doc = "TX pin signal works using the standard logic levels"] + pub const STANDARD: Self = Self(0); + #[doc = "TX pin signal values are inverted"] + pub const INVERTED: Self = Self(0x01); + } + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] + pub struct Ps(pub u8); + impl Ps { + #[doc = "Even parity"] + pub const EVEN: Self = Self(0); + #[doc = "Odd parity"] + pub const ODD: Self = Self(0x01); + } + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] + pub struct Abrrq(pub u8); + impl Abrrq { + #[doc = "resets the ABRF flag in the USART_ISR and request an automatic baud rate measurement on the next received data frame"] + pub const REQUEST: Self = Self(0x01); + } + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] + pub struct Dep(pub u8); + impl Dep { + #[doc = "DE signal is active high"] + pub const HIGH: Self = Self(0); + #[doc = "DE signal is active low"] + pub const LOW: Self = Self(0x01); + } + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] + pub struct Over(pub u8); + impl Over { + #[doc = "Oversampling by 16"] + pub const OVERSAMPLING16: Self = Self(0); + #[doc = "Oversampling by 8"] + pub const OVERSAMPLING8: Self = Self(0x01); + } + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] + pub struct Rxfrq(pub u8); + impl Rxfrq { + #[doc = "clears the RXNE flag. This allows to discard the received data without reading it, and avoid an overrun condition"] + pub const DISCARD: Self = Self(0x01); + } + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] + pub struct Wus(pub u8); + impl Wus { + #[doc = "WUF active on address match"] + pub const ADDRESS: Self = Self(0); + #[doc = "WuF active on Start bit detection"] + pub const START: Self = Self(0x02); + #[doc = "WUF active on RXNE"] + pub const RXNE: Self = Self(0x03); + } + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] + pub struct Cpol(pub u8); + impl Cpol { + #[doc = "Steady low value on CK pin outside transmission window"] + pub const LOW: Self = Self(0); + #[doc = "Steady high value on CK pin outside transmission window"] + pub const HIGH: Self = Self(0x01); + } + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] + pub struct Cpha(pub u8); + impl Cpha { + #[doc = "The first clock transition is the first data capture edge"] + pub const FIRST: Self = Self(0); + #[doc = "The second clock transition is the first data capture edge"] + pub const SECOND: Self = Self(0x01); + } + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] + pub struct Wake(pub u8); + impl Wake { + #[doc = "Idle line"] + pub const IDLE: Self = Self(0); + #[doc = "Address mask"] + pub const ADDRESS: Self = Self(0x01); + } + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] + pub struct Irlp(pub u8); + impl Irlp { + #[doc = "Normal mode"] + pub const NORMAL: Self = Self(0); + #[doc = "Low-power mode"] + pub const LOWPOWER: Self = Self(0x01); + } + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] + pub struct Sbkrq(pub u8); + impl Sbkrq { + #[doc = "sets the SBKF flag and request to send a BREAK on the line, as soon as the transmit machine is available"] + pub const BREAK: Self = Self(0x01); + } + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] + pub struct Lbcl(pub u8); + impl Lbcl { + #[doc = "The clock pulse of the last data bit is not output to the CK pin"] + pub const NOTOUTPUT: Self = Self(0); + #[doc = "The clock pulse of the last data bit is output to the CK pin"] + pub const OUTPUT: Self = Self(0x01); + } + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] + pub struct Mmrq(pub u8); + impl Mmrq { + #[doc = "Puts the USART in mute mode and sets the RWU flag"] + pub const MUTE: Self = Self(0x01); + } + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] + pub struct Txfrq(pub u8); + impl Txfrq { + #[doc = "Set the TXE flags. This allows to discard the transmit data"] + pub const DISCARD: Self = Self(0x01); + } + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] + pub struct Rxinv(pub u8); + impl Rxinv { + #[doc = "RX pin signal works using the standard logic levels"] + pub const STANDARD: Self = Self(0); + #[doc = "RX pin signal values are inverted"] + pub const INVERTED: Self = Self(0x01); + } + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] + pub struct M1(pub u8); + impl M1 { + #[doc = "Use M0 to set the data bits"] + pub const M0: Self = Self(0); + #[doc = "1 start bit, 7 data bits, n stop bits"] + pub const BIT7: Self = Self(0x01); + } + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] + pub struct Stop(pub u8); + impl Stop { + #[doc = "1 stop bit"] + pub const STOP1: Self = Self(0); + #[doc = "0.5 stop bit"] + pub const STOP0P5: Self = Self(0x01); + #[doc = "2 stop bit"] + pub const STOP2: Self = Self(0x02); + #[doc = "1.5 stop bit"] + pub const STOP1P5: Self = Self(0x03); + } + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] + pub struct Lbdl(pub u8); + impl Lbdl { + #[doc = "10-bit break detection"] + pub const BIT10: Self = Self(0); + #[doc = "11-bit break detection"] + pub const BIT11: Self = Self(0x01); + } + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] + pub struct Addm(pub u8); + impl Addm { + #[doc = "4-bit address detection"] + pub const BIT4: Self = Self(0); + #[doc = "7-bit address detection"] + pub const BIT7: Self = Self(0x01); + } + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] + pub struct Swap(pub u8); + impl Swap { + #[doc = "TX/RX pins are used as defined in standard pinout"] + pub const STANDARD: Self = Self(0); + #[doc = "The TX and RX pins functions are swapped"] + pub const SWAPPED: Self = Self(0x01); + } + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] + pub struct Hdsel(pub u8); + impl Hdsel { + #[doc = "Half duplex mode is not selected"] + pub const NOTSELECTED: Self = Self(0); + #[doc = "Half duplex mode is selected"] + pub const SELECTED: Self = Self(0x01); + } + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] + pub struct Abrmod(pub u8); + impl Abrmod { + #[doc = "Measurement of the start bit is used to detect the baud rate"] + pub const START: Self = Self(0); + #[doc = "Falling edge to falling edge measurement"] + pub const EDGE: Self = Self(0x01); + #[doc = "0x7F frame detection"] + pub const FRAME7F: Self = Self(0x02); + #[doc = "0x55 frame detection"] + pub const FRAME55: Self = Self(0x03); + } + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] + pub struct Msbfirst(pub u8); + impl Msbfirst { + #[doc = "data is transmitted/received with data bit 0 first, following the start bit"] + pub const LSB: Self = Self(0); + #[doc = "data is transmitted/received with MSB (bit 7/8/9) first, following the start bit"] + pub const MSB: Self = Self(0x01); + } + } + pub mod regs { + use crate::generic::*; + #[doc = "Guard time and prescaler register"] + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq)] + pub struct Gtpr(pub u32); + impl Gtpr { + #[doc = "Prescaler value"] + pub const fn psc(&self) -> u8 { + let val = (self.0 >> 0usize) & 0xff; + val as u8 + } + #[doc = "Prescaler value"] + pub fn set_psc(&mut self, val: u8) { + self.0 = (self.0 & !(0xff << 0usize)) | (((val as u32) & 0xff) << 0usize); + } + #[doc = "Guard time value"] + pub const fn gt(&self) -> u8 { + let val = (self.0 >> 8usize) & 0xff; + val as u8 + } + #[doc = "Guard time value"] + pub fn set_gt(&mut self, val: u8) { + self.0 = (self.0 & !(0xff << 8usize)) | (((val as u32) & 0xff) << 8usize); + } + } + impl Default for Gtpr { + fn default() -> Gtpr { + Gtpr(0) + } + } + #[doc = "Receiver timeout register"] + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq)] + pub struct Rtor(pub u32); + impl Rtor { + #[doc = "Receiver timeout value"] + pub const fn rto(&self) -> u32 { + let val = (self.0 >> 0usize) & 0x00ff_ffff; + val as u32 + } + #[doc = "Receiver timeout value"] + pub fn set_rto(&mut self, val: u32) { + self.0 = + (self.0 & !(0x00ff_ffff << 0usize)) | (((val as u32) & 0x00ff_ffff) << 0usize); + } + #[doc = "Block Length"] + pub const fn blen(&self) -> u8 { + let val = (self.0 >> 24usize) & 0xff; + val as u8 + } + #[doc = "Block Length"] + pub fn set_blen(&mut self, val: u8) { + self.0 = (self.0 & !(0xff << 24usize)) | (((val as u32) & 0xff) << 24usize); + } + } + impl Default for Rtor { + fn default() -> Rtor { + Rtor(0) + } + } + #[doc = "Baud rate register"] + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq)] + pub struct Brr(pub u32); + impl Brr { + #[doc = "mantissa of USARTDIV"] + pub const fn brr(&self) -> u16 { let val = (self.0 >> 0usize) & 0xffff; val as u16 } - #[doc = "Number of data to transfer"] - pub fn set_ndt(&mut self, val: u16) { + #[doc = "mantissa of USARTDIV"] + pub fn set_brr(&mut self, val: u16) { self.0 = (self.0 & !(0xffff << 0usize)) | (((val as u32) & 0xffff) << 0usize); } } - impl Default for Ndtr { - fn default() -> Ndtr { - Ndtr(0) + impl Default for Brr { + fn default() -> Brr { + Brr(0) } } - #[doc = "DMA interrupt status register (DMA_ISR)"] + #[doc = "Data register"] #[repr(transparent)] #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Isr(pub u32); - impl Isr { - #[doc = "Channel 1 Global interrupt flag"] - pub fn gif(&self, n: usize) -> bool { - assert!(n < 7usize); + pub struct Dr(pub u32); + impl Dr { + #[doc = "data value"] + pub const fn dr(&self) -> u16 { + let val = (self.0 >> 0usize) & 0x01ff; + val as u16 + } + #[doc = "data value"] + pub fn set_dr(&mut self, val: u16) { + self.0 = (self.0 & !(0x01ff << 0usize)) | (((val as u32) & 0x01ff) << 0usize); + } + } + impl Default for Dr { + fn default() -> Dr { + Dr(0) + } + } + #[doc = "Control register 2"] + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq)] + pub struct Cr2(pub u32); + impl Cr2 { + #[doc = "7-bit Address Detection/4-bit Address Detection"] + pub fn addm(&self, n: usize) -> super::vals::Addm { + assert!(n < 1usize); + let offs = 4usize + n * 0usize; + let val = (self.0 >> offs) & 0x01; + super::vals::Addm(val as u8) + } + #[doc = "7-bit Address Detection/4-bit Address Detection"] + pub fn set_addm(&mut self, n: usize, val: super::vals::Addm) { + assert!(n < 1usize); + let offs = 4usize + n * 0usize; + self.0 = (self.0 & !(0x01 << offs)) | (((val.0 as u32) & 0x01) << offs); + } + #[doc = "LIN break detection length"] + pub const fn lbdl(&self) -> super::vals::Lbdl { + let val = (self.0 >> 5usize) & 0x01; + super::vals::Lbdl(val as u8) + } + #[doc = "LIN break detection length"] + pub fn set_lbdl(&mut self, val: super::vals::Lbdl) { + self.0 = (self.0 & !(0x01 << 5usize)) | (((val.0 as u32) & 0x01) << 5usize); + } + #[doc = "LIN break detection interrupt enable"] + pub const fn lbdie(&self) -> bool { + let val = (self.0 >> 6usize) & 0x01; + val != 0 + } + #[doc = "LIN break detection interrupt enable"] + pub fn set_lbdie(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 6usize)) | (((val as u32) & 0x01) << 6usize); + } + #[doc = "Last bit clock pulse"] + pub const fn lbcl(&self) -> super::vals::Lbcl { + let val = (self.0 >> 8usize) & 0x01; + super::vals::Lbcl(val as u8) + } + #[doc = "Last bit clock pulse"] + pub fn set_lbcl(&mut self, val: super::vals::Lbcl) { + self.0 = (self.0 & !(0x01 << 8usize)) | (((val.0 as u32) & 0x01) << 8usize); + } + #[doc = "Clock phase"] + pub const fn cpha(&self) -> super::vals::Cpha { + let val = (self.0 >> 9usize) & 0x01; + super::vals::Cpha(val as u8) + } + #[doc = "Clock phase"] + pub fn set_cpha(&mut self, val: super::vals::Cpha) { + self.0 = (self.0 & !(0x01 << 9usize)) | (((val.0 as u32) & 0x01) << 9usize); + } + #[doc = "Clock polarity"] + pub const fn cpol(&self) -> super::vals::Cpol { + let val = (self.0 >> 10usize) & 0x01; + super::vals::Cpol(val as u8) + } + #[doc = "Clock polarity"] + pub fn set_cpol(&mut self, val: super::vals::Cpol) { + self.0 = (self.0 & !(0x01 << 10usize)) | (((val.0 as u32) & 0x01) << 10usize); + } + #[doc = "Clock enable"] + pub const fn clken(&self) -> bool { + let val = (self.0 >> 11usize) & 0x01; + val != 0 + } + #[doc = "Clock enable"] + pub fn set_clken(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 11usize)) | (((val as u32) & 0x01) << 11usize); + } + #[doc = "STOP bits"] + pub const fn stop(&self) -> super::vals::Stop { + let val = (self.0 >> 12usize) & 0x03; + super::vals::Stop(val as u8) + } + #[doc = "STOP bits"] + pub fn set_stop(&mut self, val: super::vals::Stop) { + self.0 = (self.0 & !(0x03 << 12usize)) | (((val.0 as u32) & 0x03) << 12usize); + } + #[doc = "LIN mode enable"] + pub const fn linen(&self) -> bool { + let val = (self.0 >> 14usize) & 0x01; + val != 0 + } + #[doc = "LIN mode enable"] + pub fn set_linen(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 14usize)) | (((val as u32) & 0x01) << 14usize); + } + #[doc = "Swap TX/RX pins"] + pub const fn swap(&self) -> super::vals::Swap { + let val = (self.0 >> 15usize) & 0x01; + super::vals::Swap(val as u8) + } + #[doc = "Swap TX/RX pins"] + pub fn set_swap(&mut self, val: super::vals::Swap) { + self.0 = (self.0 & !(0x01 << 15usize)) | (((val.0 as u32) & 0x01) << 15usize); + } + #[doc = "RX pin active level inversion"] + pub const fn rxinv(&self) -> super::vals::Rxinv { + let val = (self.0 >> 16usize) & 0x01; + super::vals::Rxinv(val as u8) + } + #[doc = "RX pin active level inversion"] + pub fn set_rxinv(&mut self, val: super::vals::Rxinv) { + self.0 = (self.0 & !(0x01 << 16usize)) | (((val.0 as u32) & 0x01) << 16usize); + } + #[doc = "TX pin active level inversion"] + pub const fn txinv(&self) -> super::vals::Txinv { + let val = (self.0 >> 17usize) & 0x01; + super::vals::Txinv(val as u8) + } + #[doc = "TX pin active level inversion"] + pub fn set_txinv(&mut self, val: super::vals::Txinv) { + self.0 = (self.0 & !(0x01 << 17usize)) | (((val.0 as u32) & 0x01) << 17usize); + } + #[doc = "Binary data inversion"] + pub const fn datainv(&self) -> super::vals::Datainv { + let val = (self.0 >> 18usize) & 0x01; + super::vals::Datainv(val as u8) + } + #[doc = "Binary data inversion"] + pub fn set_datainv(&mut self, val: super::vals::Datainv) { + self.0 = (self.0 & !(0x01 << 18usize)) | (((val.0 as u32) & 0x01) << 18usize); + } + #[doc = "Most significant bit first"] + pub const fn msbfirst(&self) -> super::vals::Msbfirst { + let val = (self.0 >> 19usize) & 0x01; + super::vals::Msbfirst(val as u8) + } + #[doc = "Most significant bit first"] + pub fn set_msbfirst(&mut self, val: super::vals::Msbfirst) { + self.0 = (self.0 & !(0x01 << 19usize)) | (((val.0 as u32) & 0x01) << 19usize); + } + #[doc = "Auto baud rate enable"] + pub const fn abren(&self) -> bool { + let val = (self.0 >> 20usize) & 0x01; + val != 0 + } + #[doc = "Auto baud rate enable"] + pub fn set_abren(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 20usize)) | (((val as u32) & 0x01) << 20usize); + } + #[doc = "Auto baud rate mode"] + pub const fn abrmod(&self) -> super::vals::Abrmod { + let val = (self.0 >> 21usize) & 0x03; + super::vals::Abrmod(val as u8) + } + #[doc = "Auto baud rate mode"] + pub fn set_abrmod(&mut self, val: super::vals::Abrmod) { + self.0 = (self.0 & !(0x03 << 21usize)) | (((val.0 as u32) & 0x03) << 21usize); + } + #[doc = "Receiver timeout enable"] + pub const fn rtoen(&self) -> bool { + let val = (self.0 >> 23usize) & 0x01; + val != 0 + } + #[doc = "Receiver timeout enable"] + pub fn set_rtoen(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 23usize)) | (((val as u32) & 0x01) << 23usize); + } + #[doc = "Address of the USART node"] + pub const fn add(&self) -> u8 { + let val = (self.0 >> 24usize) & 0xff; + val as u8 + } + #[doc = "Address of the USART node"] + pub fn set_add(&mut self, val: u8) { + self.0 = (self.0 & !(0xff << 24usize)) | (((val as u32) & 0xff) << 24usize); + } + } + impl Default for Cr2 { + fn default() -> Cr2 { + Cr2(0) + } + } + #[doc = "Control register 1"] + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq)] + pub struct Cr1(pub u32); + impl Cr1 { + #[doc = "USART enable"] + pub const fn ue(&self) -> bool { + let val = (self.0 >> 0usize) & 0x01; + val != 0 + } + #[doc = "USART enable"] + pub fn set_ue(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize); + } + #[doc = "USART enable in Stop mode"] + pub const fn uesm(&self) -> bool { + let val = (self.0 >> 1usize) & 0x01; + val != 0 + } + #[doc = "USART enable in Stop mode"] + pub fn set_uesm(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 1usize)) | (((val as u32) & 0x01) << 1usize); + } + #[doc = "Receiver enable"] + pub const fn re(&self) -> bool { + let val = (self.0 >> 2usize) & 0x01; + val != 0 + } + #[doc = "Receiver enable"] + pub fn set_re(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 2usize)) | (((val as u32) & 0x01) << 2usize); + } + #[doc = "Transmitter enable"] + pub const fn te(&self) -> bool { + let val = (self.0 >> 3usize) & 0x01; + val != 0 + } + #[doc = "Transmitter enable"] + pub fn set_te(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 3usize)) | (((val as u32) & 0x01) << 3usize); + } + #[doc = "IDLE interrupt enable"] + pub const fn idleie(&self) -> bool { + let val = (self.0 >> 4usize) & 0x01; + val != 0 + } + #[doc = "IDLE interrupt enable"] + pub fn set_idleie(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 4usize)) | (((val as u32) & 0x01) << 4usize); + } + #[doc = "RXNE interrupt enable"] + pub const fn rxneie(&self) -> bool { + let val = (self.0 >> 5usize) & 0x01; + val != 0 + } + #[doc = "RXNE interrupt enable"] + pub fn set_rxneie(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 5usize)) | (((val as u32) & 0x01) << 5usize); + } + #[doc = "Transmission complete interrupt enable"] + pub const fn tcie(&self) -> bool { + let val = (self.0 >> 6usize) & 0x01; + val != 0 + } + #[doc = "Transmission complete interrupt enable"] + pub fn set_tcie(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 6usize)) | (((val as u32) & 0x01) << 6usize); + } + #[doc = "interrupt enable"] + pub const fn txeie(&self) -> bool { + let val = (self.0 >> 7usize) & 0x01; + val != 0 + } + #[doc = "interrupt enable"] + pub fn set_txeie(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 7usize)) | (((val as u32) & 0x01) << 7usize); + } + #[doc = "PE interrupt enable"] + pub const fn peie(&self) -> bool { + let val = (self.0 >> 8usize) & 0x01; + val != 0 + } + #[doc = "PE interrupt enable"] + pub fn set_peie(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 8usize)) | (((val as u32) & 0x01) << 8usize); + } + #[doc = "Parity selection"] + pub const fn ps(&self) -> super::vals::Ps { + let val = (self.0 >> 9usize) & 0x01; + super::vals::Ps(val as u8) + } + #[doc = "Parity selection"] + pub fn set_ps(&mut self, val: super::vals::Ps) { + self.0 = (self.0 & !(0x01 << 9usize)) | (((val.0 as u32) & 0x01) << 9usize); + } + #[doc = "Parity control enable"] + pub const fn pce(&self) -> bool { + let val = (self.0 >> 10usize) & 0x01; + val != 0 + } + #[doc = "Parity control enable"] + pub fn set_pce(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 10usize)) | (((val as u32) & 0x01) << 10usize); + } + #[doc = "Receiver wakeup method"] + pub const fn wake(&self) -> bool { + let val = (self.0 >> 11usize) & 0x01; + val != 0 + } + #[doc = "Receiver wakeup method"] + pub fn set_wake(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 11usize)) | (((val as u32) & 0x01) << 11usize); + } + #[doc = "Word length"] + pub const fn m0(&self) -> super::vals::M0 { + let val = (self.0 >> 12usize) & 0x01; + super::vals::M0(val as u8) + } + #[doc = "Word length"] + pub fn set_m0(&mut self, val: super::vals::M0) { + self.0 = (self.0 & !(0x01 << 12usize)) | (((val.0 as u32) & 0x01) << 12usize); + } + #[doc = "Word length"] + pub const fn m1(&self) -> super::vals::M1 { + let val = (self.0 >> 12usize) & 0x01; + super::vals::M1(val as u8) + } + #[doc = "Word length"] + pub fn set_m1(&mut self, val: super::vals::M1) { + self.0 = (self.0 & !(0x01 << 12usize)) | (((val.0 as u32) & 0x01) << 12usize); + } + #[doc = "Mute mode enable"] + pub const fn mme(&self) -> bool { + let val = (self.0 >> 13usize) & 0x01; + val != 0 + } + #[doc = "Mute mode enable"] + pub fn set_mme(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 13usize)) | (((val as u32) & 0x01) << 13usize); + } + #[doc = "Character match interrupt enable"] + pub const fn cmie(&self) -> bool { + let val = (self.0 >> 14usize) & 0x01; + val != 0 + } + #[doc = "Character match interrupt enable"] + pub fn set_cmie(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 14usize)) | (((val as u32) & 0x01) << 14usize); + } + #[doc = "Oversampling mode"] + pub fn over(&self, n: usize) -> super::vals::Over { + assert!(n < 1usize); + let offs = 15usize + n * 0usize; + let val = (self.0 >> offs) & 0x01; + super::vals::Over(val as u8) + } + #[doc = "Oversampling mode"] + pub fn set_over(&mut self, n: usize, val: super::vals::Over) { + assert!(n < 1usize); + let offs = 15usize + n * 0usize; + self.0 = (self.0 & !(0x01 << offs)) | (((val.0 as u32) & 0x01) << offs); + } + #[doc = "Driver Enable deassertion time"] + pub const fn dedt(&self) -> u8 { + let val = (self.0 >> 16usize) & 0x1f; + val as u8 + } + #[doc = "Driver Enable deassertion time"] + pub fn set_dedt(&mut self, val: u8) { + self.0 = (self.0 & !(0x1f << 16usize)) | (((val as u32) & 0x1f) << 16usize); + } + #[doc = "Driver Enable assertion time"] + pub const fn deat(&self) -> u8 { + let val = (self.0 >> 21usize) & 0x1f; + val as u8 + } + #[doc = "Driver Enable assertion time"] + pub fn set_deat(&mut self, val: u8) { + self.0 = (self.0 & !(0x1f << 21usize)) | (((val as u32) & 0x1f) << 21usize); + } + #[doc = "Receiver timeout interrupt enable"] + pub const fn rtoie(&self) -> bool { + let val = (self.0 >> 26usize) & 0x01; + val != 0 + } + #[doc = "Receiver timeout interrupt enable"] + pub fn set_rtoie(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 26usize)) | (((val as u32) & 0x01) << 26usize); + } + #[doc = "End of Block interrupt enable"] + pub const fn eobie(&self) -> bool { + let val = (self.0 >> 27usize) & 0x01; + val != 0 + } + #[doc = "End of Block interrupt enable"] + pub fn set_eobie(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 27usize)) | (((val as u32) & 0x01) << 27usize); + } + } + impl Default for Cr1 { + fn default() -> Cr1 { + Cr1(0) + } + } + #[doc = "Interrupt & status register"] + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq)] + pub struct Ixr(pub u32); + impl Ixr { + #[doc = "Parity error"] + pub const fn pe(&self) -> bool { + let val = (self.0 >> 0usize) & 0x01; + val != 0 + } + #[doc = "Parity error"] + pub fn set_pe(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize); + } + #[doc = "Framing error"] + pub const fn fe(&self) -> bool { + let val = (self.0 >> 1usize) & 0x01; + val != 0 + } + #[doc = "Framing error"] + pub fn set_fe(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 1usize)) | (((val as u32) & 0x01) << 1usize); + } + #[doc = "Noise detected flag"] + pub const fn nf(&self) -> bool { + let val = (self.0 >> 2usize) & 0x01; + val != 0 + } + #[doc = "Noise detected flag"] + pub fn set_nf(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 2usize)) | (((val as u32) & 0x01) << 2usize); + } + #[doc = "Overrun error"] + pub const fn ore(&self) -> bool { + let val = (self.0 >> 3usize) & 0x01; + val != 0 + } + #[doc = "Overrun error"] + pub fn set_ore(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 3usize)) | (((val as u32) & 0x01) << 3usize); + } + #[doc = "Idle line detected"] + pub const fn idle(&self) -> bool { + let val = (self.0 >> 4usize) & 0x01; + val != 0 + } + #[doc = "Idle line detected"] + pub fn set_idle(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 4usize)) | (((val as u32) & 0x01) << 4usize); + } + #[doc = "Read data register not empty"] + pub const fn rxne(&self) -> bool { + let val = (self.0 >> 5usize) & 0x01; + val != 0 + } + #[doc = "Read data register not empty"] + pub fn set_rxne(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 5usize)) | (((val as u32) & 0x01) << 5usize); + } + #[doc = "Transmission complete"] + pub const fn tc(&self) -> bool { + let val = (self.0 >> 6usize) & 0x01; + val != 0 + } + #[doc = "Transmission complete"] + pub fn set_tc(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 6usize)) | (((val as u32) & 0x01) << 6usize); + } + #[doc = "Transmit data register empty"] + pub const fn txe(&self) -> bool { + let val = (self.0 >> 7usize) & 0x01; + val != 0 + } + #[doc = "Transmit data register empty"] + pub fn set_txe(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 7usize)) | (((val as u32) & 0x01) << 7usize); + } + #[doc = "LIN break detection flag"] + pub const fn lbdf(&self) -> bool { + let val = (self.0 >> 8usize) & 0x01; + val != 0 + } + #[doc = "LIN break detection flag"] + pub fn set_lbdf(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 8usize)) | (((val as u32) & 0x01) << 8usize); + } + #[doc = "CTS interrupt flag"] + pub const fn ctsif(&self) -> bool { + let val = (self.0 >> 9usize) & 0x01; + val != 0 + } + #[doc = "CTS interrupt flag"] + pub fn set_ctsif(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 9usize)) | (((val as u32) & 0x01) << 9usize); + } + #[doc = "CTS flag"] + pub const fn cts(&self) -> bool { + let val = (self.0 >> 10usize) & 0x01; + val != 0 + } + #[doc = "CTS flag"] + pub fn set_cts(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 10usize)) | (((val as u32) & 0x01) << 10usize); + } + #[doc = "Receiver timeout"] + pub const fn rtof(&self) -> bool { + let val = (self.0 >> 11usize) & 0x01; + val != 0 + } + #[doc = "Receiver timeout"] + pub fn set_rtof(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 11usize)) | (((val as u32) & 0x01) << 11usize); + } + #[doc = "End of block flag"] + pub const fn eobf(&self) -> bool { + let val = (self.0 >> 12usize) & 0x01; + val != 0 + } + #[doc = "End of block flag"] + pub fn set_eobf(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 12usize)) | (((val as u32) & 0x01) << 12usize); + } + #[doc = "Auto baud rate error"] + pub const fn abre(&self) -> bool { + let val = (self.0 >> 14usize) & 0x01; + val != 0 + } + #[doc = "Auto baud rate error"] + pub fn set_abre(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 14usize)) | (((val as u32) & 0x01) << 14usize); + } + #[doc = "Auto baud rate flag"] + pub const fn abrf(&self) -> bool { + let val = (self.0 >> 15usize) & 0x01; + val != 0 + } + #[doc = "Auto baud rate flag"] + pub fn set_abrf(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 15usize)) | (((val as u32) & 0x01) << 15usize); + } + #[doc = "Busy flag"] + pub const fn busy(&self) -> bool { + let val = (self.0 >> 16usize) & 0x01; + val != 0 + } + #[doc = "Busy flag"] + pub fn set_busy(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 16usize)) | (((val as u32) & 0x01) << 16usize); + } + #[doc = "character match flag"] + pub const fn cmf(&self) -> bool { + let val = (self.0 >> 17usize) & 0x01; + val != 0 + } + #[doc = "character match flag"] + pub fn set_cmf(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 17usize)) | (((val as u32) & 0x01) << 17usize); + } + #[doc = "Send break flag"] + pub const fn sbkf(&self) -> bool { + let val = (self.0 >> 18usize) & 0x01; + val != 0 + } + #[doc = "Send break flag"] + pub fn set_sbkf(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 18usize)) | (((val as u32) & 0x01) << 18usize); + } + #[doc = "Receiver wakeup from Mute mode"] + pub const fn rwu(&self) -> bool { + let val = (self.0 >> 19usize) & 0x01; + val != 0 + } + #[doc = "Receiver wakeup from Mute mode"] + pub fn set_rwu(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 19usize)) | (((val as u32) & 0x01) << 19usize); + } + #[doc = "Wakeup from Stop mode flag"] + pub const fn wuf(&self) -> bool { + let val = (self.0 >> 20usize) & 0x01; + val != 0 + } + #[doc = "Wakeup from Stop mode flag"] + pub fn set_wuf(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 20usize)) | (((val as u32) & 0x01) << 20usize); + } + #[doc = "Transmit enable acknowledge flag"] + pub const fn teack(&self) -> bool { + let val = (self.0 >> 21usize) & 0x01; + val != 0 + } + #[doc = "Transmit enable acknowledge flag"] + pub fn set_teack(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 21usize)) | (((val as u32) & 0x01) << 21usize); + } + #[doc = "Receive enable acknowledge flag"] + pub const fn reack(&self) -> bool { + let val = (self.0 >> 22usize) & 0x01; + val != 0 + } + #[doc = "Receive enable acknowledge flag"] + pub fn set_reack(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 22usize)) | (((val as u32) & 0x01) << 22usize); + } + } + impl Default for Ixr { + fn default() -> Ixr { + Ixr(0) + } + } + #[doc = "Control register 3"] + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq)] + pub struct Cr3(pub u32); + impl Cr3 { + #[doc = "Error interrupt enable"] + pub const fn eie(&self) -> bool { + let val = (self.0 >> 0usize) & 0x01; + val != 0 + } + #[doc = "Error interrupt enable"] + pub fn set_eie(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize); + } + #[doc = "IrDA mode enable"] + pub const fn iren(&self) -> bool { + let val = (self.0 >> 1usize) & 0x01; + val != 0 + } + #[doc = "IrDA mode enable"] + pub fn set_iren(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 1usize)) | (((val as u32) & 0x01) << 1usize); + } + #[doc = "IrDA low-power"] + pub const fn irlp(&self) -> super::vals::Irlp { + let val = (self.0 >> 2usize) & 0x01; + super::vals::Irlp(val as u8) + } + #[doc = "IrDA low-power"] + pub fn set_irlp(&mut self, val: super::vals::Irlp) { + self.0 = (self.0 & !(0x01 << 2usize)) | (((val.0 as u32) & 0x01) << 2usize); + } + #[doc = "Half-duplex selection"] + pub const fn hdsel(&self) -> super::vals::Hdsel { + let val = (self.0 >> 3usize) & 0x01; + super::vals::Hdsel(val as u8) + } + #[doc = "Half-duplex selection"] + pub fn set_hdsel(&mut self, val: super::vals::Hdsel) { + self.0 = (self.0 & !(0x01 << 3usize)) | (((val.0 as u32) & 0x01) << 3usize); + } + #[doc = "Smartcard NACK enable"] + pub const fn nack(&self) -> bool { + let val = (self.0 >> 4usize) & 0x01; + val != 0 + } + #[doc = "Smartcard NACK enable"] + pub fn set_nack(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 4usize)) | (((val as u32) & 0x01) << 4usize); + } + #[doc = "Smartcard mode enable"] + pub const fn scen(&self) -> bool { + let val = (self.0 >> 5usize) & 0x01; + val != 0 + } + #[doc = "Smartcard mode enable"] + pub fn set_scen(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 5usize)) | (((val as u32) & 0x01) << 5usize); + } + #[doc = "DMA enable receiver"] + pub const fn dmar(&self) -> bool { + let val = (self.0 >> 6usize) & 0x01; + val != 0 + } + #[doc = "DMA enable receiver"] + pub fn set_dmar(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 6usize)) | (((val as u32) & 0x01) << 6usize); + } + #[doc = "DMA enable transmitter"] + pub const fn dmat(&self) -> bool { + let val = (self.0 >> 7usize) & 0x01; + val != 0 + } + #[doc = "DMA enable transmitter"] + pub fn set_dmat(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 7usize)) | (((val as u32) & 0x01) << 7usize); + } + #[doc = "RTS enable"] + pub const fn rtse(&self) -> bool { + let val = (self.0 >> 8usize) & 0x01; + val != 0 + } + #[doc = "RTS enable"] + pub fn set_rtse(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 8usize)) | (((val as u32) & 0x01) << 8usize); + } + #[doc = "CTS enable"] + pub const fn ctse(&self) -> bool { + let val = (self.0 >> 9usize) & 0x01; + val != 0 + } + #[doc = "CTS enable"] + pub fn set_ctse(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 9usize)) | (((val as u32) & 0x01) << 9usize); + } + #[doc = "CTS interrupt enable"] + pub const fn ctsie(&self) -> bool { + let val = (self.0 >> 10usize) & 0x01; + val != 0 + } + #[doc = "CTS interrupt enable"] + pub fn set_ctsie(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 10usize)) | (((val as u32) & 0x01) << 10usize); + } + #[doc = "One sample bit method enable"] + pub const fn onebit(&self) -> super::vals::Onebit { + let val = (self.0 >> 11usize) & 0x01; + super::vals::Onebit(val as u8) + } + #[doc = "One sample bit method enable"] + pub fn set_onebit(&mut self, val: super::vals::Onebit) { + self.0 = (self.0 & !(0x01 << 11usize)) | (((val.0 as u32) & 0x01) << 11usize); + } + #[doc = "Overrun Disable"] + pub const fn ovrdis(&self) -> super::vals::Ovrdis { + let val = (self.0 >> 12usize) & 0x01; + super::vals::Ovrdis(val as u8) + } + #[doc = "Overrun Disable"] + pub fn set_ovrdis(&mut self, val: super::vals::Ovrdis) { + self.0 = (self.0 & !(0x01 << 12usize)) | (((val.0 as u32) & 0x01) << 12usize); + } + #[doc = "DMA Disable on Reception Error"] + pub const fn ddre(&self) -> bool { + let val = (self.0 >> 13usize) & 0x01; + val != 0 + } + #[doc = "DMA Disable on Reception Error"] + pub fn set_ddre(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 13usize)) | (((val as u32) & 0x01) << 13usize); + } + #[doc = "Driver enable mode"] + pub const fn dem(&self) -> bool { + let val = (self.0 >> 14usize) & 0x01; + val != 0 + } + #[doc = "Driver enable mode"] + pub fn set_dem(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 14usize)) | (((val as u32) & 0x01) << 14usize); + } + #[doc = "Driver enable polarity selection"] + pub const fn dep(&self) -> super::vals::Dep { + let val = (self.0 >> 15usize) & 0x01; + super::vals::Dep(val as u8) + } + #[doc = "Driver enable polarity selection"] + pub fn set_dep(&mut self, val: super::vals::Dep) { + self.0 = (self.0 & !(0x01 << 15usize)) | (((val.0 as u32) & 0x01) << 15usize); + } + #[doc = "Smartcard auto-retry count"] + pub const fn scarcnt(&self) -> u8 { + let val = (self.0 >> 17usize) & 0x07; + val as u8 + } + #[doc = "Smartcard auto-retry count"] + pub fn set_scarcnt(&mut self, val: u8) { + self.0 = (self.0 & !(0x07 << 17usize)) | (((val as u32) & 0x07) << 17usize); + } + #[doc = "Wakeup from Stop mode interrupt flag selection"] + pub const fn wus(&self) -> super::vals::Wus { + let val = (self.0 >> 20usize) & 0x03; + super::vals::Wus(val as u8) + } + #[doc = "Wakeup from Stop mode interrupt flag selection"] + pub fn set_wus(&mut self, val: super::vals::Wus) { + self.0 = (self.0 & !(0x03 << 20usize)) | (((val.0 as u32) & 0x03) << 20usize); + } + #[doc = "Wakeup from Stop mode interrupt enable"] + pub const fn wufie(&self) -> bool { + let val = (self.0 >> 22usize) & 0x01; + val != 0 + } + #[doc = "Wakeup from Stop mode interrupt enable"] + pub fn set_wufie(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 22usize)) | (((val as u32) & 0x01) << 22usize); + } + } + impl Default for Cr3 { + fn default() -> Cr3 { + Cr3(0) + } + } + #[doc = "Request register"] + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq)] + pub struct Rqr(pub u32); + impl Rqr { + #[doc = "Auto baud rate request"] + pub const fn abrrq(&self) -> super::vals::Abrrq { + let val = (self.0 >> 0usize) & 0x01; + super::vals::Abrrq(val as u8) + } + #[doc = "Auto baud rate request"] + pub fn set_abrrq(&mut self, val: super::vals::Abrrq) { + self.0 = (self.0 & !(0x01 << 0usize)) | (((val.0 as u32) & 0x01) << 0usize); + } + #[doc = "Send break request"] + pub const fn sbkrq(&self) -> super::vals::Sbkrq { + let val = (self.0 >> 1usize) & 0x01; + super::vals::Sbkrq(val as u8) + } + #[doc = "Send break request"] + pub fn set_sbkrq(&mut self, val: super::vals::Sbkrq) { + self.0 = (self.0 & !(0x01 << 1usize)) | (((val.0 as u32) & 0x01) << 1usize); + } + #[doc = "Mute mode request"] + pub const fn mmrq(&self) -> super::vals::Mmrq { + let val = (self.0 >> 2usize) & 0x01; + super::vals::Mmrq(val as u8) + } + #[doc = "Mute mode request"] + pub fn set_mmrq(&mut self, val: super::vals::Mmrq) { + self.0 = (self.0 & !(0x01 << 2usize)) | (((val.0 as u32) & 0x01) << 2usize); + } + #[doc = "Receive data flush request"] + pub const fn rxfrq(&self) -> super::vals::Rxfrq { + let val = (self.0 >> 3usize) & 0x01; + super::vals::Rxfrq(val as u8) + } + #[doc = "Receive data flush request"] + pub fn set_rxfrq(&mut self, val: super::vals::Rxfrq) { + self.0 = (self.0 & !(0x01 << 3usize)) | (((val.0 as u32) & 0x01) << 3usize); + } + #[doc = "Transmit data flush request"] + pub const fn txfrq(&self) -> super::vals::Txfrq { + let val = (self.0 >> 4usize) & 0x01; + super::vals::Txfrq(val as u8) + } + #[doc = "Transmit data flush request"] + pub fn set_txfrq(&mut self, val: super::vals::Txfrq) { + self.0 = (self.0 & !(0x01 << 4usize)) | (((val.0 as u32) & 0x01) << 4usize); + } + } + impl Default for Rqr { + fn default() -> Rqr { + Rqr(0) + } + } + } +} +pub mod spi_v1 { + use crate::generic::*; + #[doc = "Serial peripheral interface"] + #[derive(Copy, Clone)] + pub struct Spi(pub *mut u8); + unsafe impl Send for Spi {} + unsafe impl Sync for Spi {} + impl Spi { + #[doc = "control register 1"] + pub fn cr1(self) -> Reg { + unsafe { Reg::from_ptr(self.0.add(0usize)) } + } + #[doc = "control register 2"] + pub fn cr2(self) -> Reg { + unsafe { Reg::from_ptr(self.0.add(4usize)) } + } + #[doc = "status register"] + pub fn sr(self) -> Reg { + unsafe { Reg::from_ptr(self.0.add(8usize)) } + } + #[doc = "data register"] + pub fn dr(self) -> Reg { + unsafe { Reg::from_ptr(self.0.add(12usize)) } + } + #[doc = "CRC polynomial register"] + pub fn crcpr(self) -> Reg { + unsafe { Reg::from_ptr(self.0.add(16usize)) } + } + #[doc = "RX CRC register"] + pub fn rxcrcr(self) -> Reg { + unsafe { Reg::from_ptr(self.0.add(20usize)) } + } + #[doc = "TX CRC register"] + pub fn txcrcr(self) -> Reg { + unsafe { Reg::from_ptr(self.0.add(24usize)) } + } + } + pub mod regs { + use crate::generic::*; + #[doc = "TX CRC register"] + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq)] + pub struct Txcrcr(pub u32); + impl Txcrcr { + #[doc = "Tx CRC register"] + pub const fn tx_crc(&self) -> u16 { + let val = (self.0 >> 0usize) & 0xffff; + val as u16 + } + #[doc = "Tx CRC register"] + pub fn set_tx_crc(&mut self, val: u16) { + self.0 = (self.0 & !(0xffff << 0usize)) | (((val as u32) & 0xffff) << 0usize); + } + } + impl Default for Txcrcr { + fn default() -> Txcrcr { + Txcrcr(0) + } + } + #[doc = "status register"] + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq)] + pub struct Sr(pub u32); + impl Sr { + #[doc = "Receive buffer not empty"] + pub const fn rxne(&self) -> bool { + let val = (self.0 >> 0usize) & 0x01; + val != 0 + } + #[doc = "Receive buffer not empty"] + pub fn set_rxne(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize); + } + #[doc = "Transmit buffer empty"] + pub const fn txe(&self) -> bool { + let val = (self.0 >> 1usize) & 0x01; + val != 0 + } + #[doc = "Transmit buffer empty"] + pub fn set_txe(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 1usize)) | (((val as u32) & 0x01) << 1usize); + } + #[doc = "CRC error flag"] + pub const fn crcerr(&self) -> bool { + let val = (self.0 >> 4usize) & 0x01; + val != 0 + } + #[doc = "CRC error flag"] + pub fn set_crcerr(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 4usize)) | (((val as u32) & 0x01) << 4usize); + } + #[doc = "Mode fault"] + pub const fn modf(&self) -> bool { + let val = (self.0 >> 5usize) & 0x01; + val != 0 + } + #[doc = "Mode fault"] + pub fn set_modf(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 5usize)) | (((val as u32) & 0x01) << 5usize); + } + #[doc = "Overrun flag"] + pub const fn ovr(&self) -> bool { + let val = (self.0 >> 6usize) & 0x01; + val != 0 + } + #[doc = "Overrun flag"] + pub fn set_ovr(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 6usize)) | (((val as u32) & 0x01) << 6usize); + } + #[doc = "Busy flag"] + pub const fn bsy(&self) -> bool { + let val = (self.0 >> 7usize) & 0x01; + val != 0 + } + #[doc = "Busy flag"] + pub fn set_bsy(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 7usize)) | (((val as u32) & 0x01) << 7usize); + } + #[doc = "TI frame format error"] + pub const fn fre(&self) -> bool { + let val = (self.0 >> 8usize) & 0x01; + val != 0 + } + #[doc = "TI frame format error"] + pub fn set_fre(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 8usize)) | (((val as u32) & 0x01) << 8usize); + } + } + impl Default for Sr { + fn default() -> Sr { + Sr(0) + } + } + #[doc = "CRC polynomial register"] + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq)] + pub struct Crcpr(pub u32); + impl Crcpr { + #[doc = "CRC polynomial register"] + pub const fn crcpoly(&self) -> u16 { + let val = (self.0 >> 0usize) & 0xffff; + val as u16 + } + #[doc = "CRC polynomial register"] + pub fn set_crcpoly(&mut self, val: u16) { + self.0 = (self.0 & !(0xffff << 0usize)) | (((val as u32) & 0xffff) << 0usize); + } + } + impl Default for Crcpr { + fn default() -> Crcpr { + Crcpr(0) + } + } + #[doc = "data register"] + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq)] + pub struct Dr(pub u32); + impl Dr { + #[doc = "Data register"] + pub const fn dr(&self) -> u16 { + let val = (self.0 >> 0usize) & 0xffff; + val as u16 + } + #[doc = "Data register"] + pub fn set_dr(&mut self, val: u16) { + self.0 = (self.0 & !(0xffff << 0usize)) | (((val as u32) & 0xffff) << 0usize); + } + } + impl Default for Dr { + fn default() -> Dr { + Dr(0) + } + } + #[doc = "control register 2"] + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq)] + pub struct Cr2(pub u32); + impl Cr2 { + #[doc = "Rx buffer DMA enable"] + pub const fn rxdmaen(&self) -> bool { + let val = (self.0 >> 0usize) & 0x01; + val != 0 + } + #[doc = "Rx buffer DMA enable"] + pub fn set_rxdmaen(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize); + } + #[doc = "Tx buffer DMA enable"] + pub const fn txdmaen(&self) -> bool { + let val = (self.0 >> 1usize) & 0x01; + val != 0 + } + #[doc = "Tx buffer DMA enable"] + pub fn set_txdmaen(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 1usize)) | (((val as u32) & 0x01) << 1usize); + } + #[doc = "SS output enable"] + pub const fn ssoe(&self) -> bool { + let val = (self.0 >> 2usize) & 0x01; + val != 0 + } + #[doc = "SS output enable"] + pub fn set_ssoe(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 2usize)) | (((val as u32) & 0x01) << 2usize); + } + #[doc = "Frame format"] + pub const fn frf(&self) -> super::vals::Frf { + let val = (self.0 >> 4usize) & 0x01; + super::vals::Frf(val as u8) + } + #[doc = "Frame format"] + pub fn set_frf(&mut self, val: super::vals::Frf) { + self.0 = (self.0 & !(0x01 << 4usize)) | (((val.0 as u32) & 0x01) << 4usize); + } + #[doc = "Error interrupt enable"] + pub const fn errie(&self) -> bool { + let val = (self.0 >> 5usize) & 0x01; + val != 0 + } + #[doc = "Error interrupt enable"] + pub fn set_errie(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 5usize)) | (((val as u32) & 0x01) << 5usize); + } + #[doc = "RX buffer not empty interrupt enable"] + pub const fn rxneie(&self) -> bool { + let val = (self.0 >> 6usize) & 0x01; + val != 0 + } + #[doc = "RX buffer not empty interrupt enable"] + pub fn set_rxneie(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 6usize)) | (((val as u32) & 0x01) << 6usize); + } + #[doc = "Tx buffer empty interrupt enable"] + pub const fn txeie(&self) -> bool { + let val = (self.0 >> 7usize) & 0x01; + val != 0 + } + #[doc = "Tx buffer empty interrupt enable"] + pub fn set_txeie(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 7usize)) | (((val as u32) & 0x01) << 7usize); + } + } + impl Default for Cr2 { + fn default() -> Cr2 { + Cr2(0) + } + } + #[doc = "control register 1"] + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq)] + pub struct Cr1(pub u32); + impl Cr1 { + #[doc = "Clock phase"] + pub const fn cpha(&self) -> super::vals::Cpha { + let val = (self.0 >> 0usize) & 0x01; + super::vals::Cpha(val as u8) + } + #[doc = "Clock phase"] + pub fn set_cpha(&mut self, val: super::vals::Cpha) { + self.0 = (self.0 & !(0x01 << 0usize)) | (((val.0 as u32) & 0x01) << 0usize); + } + #[doc = "Clock polarity"] + pub const fn cpol(&self) -> super::vals::Cpol { + let val = (self.0 >> 1usize) & 0x01; + super::vals::Cpol(val as u8) + } + #[doc = "Clock polarity"] + pub fn set_cpol(&mut self, val: super::vals::Cpol) { + self.0 = (self.0 & !(0x01 << 1usize)) | (((val.0 as u32) & 0x01) << 1usize); + } + #[doc = "Master selection"] + pub const fn mstr(&self) -> super::vals::Mstr { + let val = (self.0 >> 2usize) & 0x01; + super::vals::Mstr(val as u8) + } + #[doc = "Master selection"] + pub fn set_mstr(&mut self, val: super::vals::Mstr) { + self.0 = (self.0 & !(0x01 << 2usize)) | (((val.0 as u32) & 0x01) << 2usize); + } + #[doc = "Baud rate control"] + pub const fn br(&self) -> super::vals::Br { + let val = (self.0 >> 3usize) & 0x07; + super::vals::Br(val as u8) + } + #[doc = "Baud rate control"] + pub fn set_br(&mut self, val: super::vals::Br) { + self.0 = (self.0 & !(0x07 << 3usize)) | (((val.0 as u32) & 0x07) << 3usize); + } + #[doc = "SPI enable"] + pub const fn spe(&self) -> bool { + let val = (self.0 >> 6usize) & 0x01; + val != 0 + } + #[doc = "SPI enable"] + pub fn set_spe(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 6usize)) | (((val as u32) & 0x01) << 6usize); + } + #[doc = "Frame format"] + pub const fn lsbfirst(&self) -> super::vals::Lsbfirst { + let val = (self.0 >> 7usize) & 0x01; + super::vals::Lsbfirst(val as u8) + } + #[doc = "Frame format"] + pub fn set_lsbfirst(&mut self, val: super::vals::Lsbfirst) { + self.0 = (self.0 & !(0x01 << 7usize)) | (((val.0 as u32) & 0x01) << 7usize); + } + #[doc = "Internal slave select"] + pub const fn ssi(&self) -> bool { + let val = (self.0 >> 8usize) & 0x01; + val != 0 + } + #[doc = "Internal slave select"] + pub fn set_ssi(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 8usize)) | (((val as u32) & 0x01) << 8usize); + } + #[doc = "Software slave management"] + pub const fn ssm(&self) -> bool { + let val = (self.0 >> 9usize) & 0x01; + val != 0 + } + #[doc = "Software slave management"] + pub fn set_ssm(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 9usize)) | (((val as u32) & 0x01) << 9usize); + } + #[doc = "Receive only"] + pub const fn rxonly(&self) -> super::vals::Rxonly { + let val = (self.0 >> 10usize) & 0x01; + super::vals::Rxonly(val as u8) + } + #[doc = "Receive only"] + pub fn set_rxonly(&mut self, val: super::vals::Rxonly) { + self.0 = (self.0 & !(0x01 << 10usize)) | (((val.0 as u32) & 0x01) << 10usize); + } + #[doc = "Data frame format"] + pub const fn dff(&self) -> super::vals::Dff { + let val = (self.0 >> 11usize) & 0x01; + super::vals::Dff(val as u8) + } + #[doc = "Data frame format"] + pub fn set_dff(&mut self, val: super::vals::Dff) { + self.0 = (self.0 & !(0x01 << 11usize)) | (((val.0 as u32) & 0x01) << 11usize); + } + #[doc = "CRC transfer next"] + pub const fn crcnext(&self) -> super::vals::Crcnext { + let val = (self.0 >> 12usize) & 0x01; + super::vals::Crcnext(val as u8) + } + #[doc = "CRC transfer next"] + pub fn set_crcnext(&mut self, val: super::vals::Crcnext) { + self.0 = (self.0 & !(0x01 << 12usize)) | (((val.0 as u32) & 0x01) << 12usize); + } + #[doc = "Hardware CRC calculation enable"] + pub const fn crcen(&self) -> bool { + let val = (self.0 >> 13usize) & 0x01; + val != 0 + } + #[doc = "Hardware CRC calculation enable"] + pub fn set_crcen(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 13usize)) | (((val as u32) & 0x01) << 13usize); + } + #[doc = "Output enable in bidirectional mode"] + pub const fn bidioe(&self) -> super::vals::Bidioe { + let val = (self.0 >> 14usize) & 0x01; + super::vals::Bidioe(val as u8) + } + #[doc = "Output enable in bidirectional mode"] + pub fn set_bidioe(&mut self, val: super::vals::Bidioe) { + self.0 = (self.0 & !(0x01 << 14usize)) | (((val.0 as u32) & 0x01) << 14usize); + } + #[doc = "Bidirectional data mode enable"] + pub const fn bidimode(&self) -> super::vals::Bidimode { + let val = (self.0 >> 15usize) & 0x01; + super::vals::Bidimode(val as u8) + } + #[doc = "Bidirectional data mode enable"] + pub fn set_bidimode(&mut self, val: super::vals::Bidimode) { + self.0 = (self.0 & !(0x01 << 15usize)) | (((val.0 as u32) & 0x01) << 15usize); + } + } + impl Default for Cr1 { + fn default() -> Cr1 { + Cr1(0) + } + } + #[doc = "RX CRC register"] + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq)] + pub struct Rxcrcr(pub u32); + impl Rxcrcr { + #[doc = "Rx CRC register"] + pub const fn rx_crc(&self) -> u16 { + let val = (self.0 >> 0usize) & 0xffff; + val as u16 + } + #[doc = "Rx CRC register"] + pub fn set_rx_crc(&mut self, val: u16) { + self.0 = (self.0 & !(0xffff << 0usize)) | (((val as u32) & 0xffff) << 0usize); + } + } + impl Default for Rxcrcr { + fn default() -> Rxcrcr { + Rxcrcr(0) + } + } + } + pub mod vals { + use crate::generic::*; + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] + pub struct Br(pub u8); + impl Br { + #[doc = "f_PCLK / 2"] + pub const DIV2: Self = Self(0); + #[doc = "f_PCLK / 4"] + pub const DIV4: Self = Self(0x01); + #[doc = "f_PCLK / 8"] + pub const DIV8: Self = Self(0x02); + #[doc = "f_PCLK / 16"] + pub const DIV16: Self = Self(0x03); + #[doc = "f_PCLK / 32"] + pub const DIV32: Self = Self(0x04); + #[doc = "f_PCLK / 64"] + pub const DIV64: Self = Self(0x05); + #[doc = "f_PCLK / 128"] + pub const DIV128: Self = Self(0x06); + #[doc = "f_PCLK / 256"] + pub const DIV256: Self = Self(0x07); + } + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] + pub struct Lsbfirst(pub u8); + impl Lsbfirst { + #[doc = "Data is transmitted/received with the MSB first"] + pub const MSBFIRST: Self = Self(0); + #[doc = "Data is transmitted/received with the LSB first"] + pub const LSBFIRST: Self = Self(0x01); + } + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] + pub struct Dff(pub u8); + impl Dff { + #[doc = "8-bit data frame format is selected for transmission/reception"] + pub const EIGHTBIT: Self = Self(0); + #[doc = "16-bit data frame format is selected for transmission/reception"] + pub const SIXTEENBIT: Self = Self(0x01); + } + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] + pub struct Crcnext(pub u8); + impl Crcnext { + #[doc = "Next transmit value is from Tx buffer"] + pub const TXBUFFER: Self = Self(0); + #[doc = "Next transmit value is from Tx CRC register"] + pub const CRC: Self = Self(0x01); + } + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] + pub struct Bidimode(pub u8); + impl Bidimode { + #[doc = "2-line unidirectional data mode selected"] + pub const UNIDIRECTIONAL: Self = Self(0); + #[doc = "1-line bidirectional data mode selected"] + pub const BIDIRECTIONAL: Self = Self(0x01); + } + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] + pub struct Frer(pub u8); + impl Frer { + #[doc = "No frame format error"] + pub const NOERROR: Self = Self(0); + #[doc = "A frame format error occurred"] + pub const ERROR: Self = Self(0x01); + } + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] + pub struct Mstr(pub u8); + impl Mstr { + #[doc = "Slave configuration"] + pub const SLAVE: Self = Self(0); + #[doc = "Master configuration"] + pub const MASTER: Self = Self(0x01); + } + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] + pub struct Rxonly(pub u8); + impl Rxonly { + #[doc = "Full duplex (Transmit and receive)"] + pub const FULLDUPLEX: Self = Self(0); + #[doc = "Output disabled (Receive-only mode)"] + pub const OUTPUTDISABLED: Self = Self(0x01); + } + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] + pub struct Cpha(pub u8); + impl Cpha { + #[doc = "The first clock transition is the first data capture edge"] + pub const FIRSTEDGE: Self = Self(0); + #[doc = "The second clock transition is the first data capture edge"] + pub const SECONDEDGE: Self = Self(0x01); + } + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] + pub struct Iscfg(pub u8); + impl Iscfg { + #[doc = "Slave - transmit"] + pub const SLAVETX: Self = Self(0); + #[doc = "Slave - receive"] + pub const SLAVERX: Self = Self(0x01); + #[doc = "Master - transmit"] + pub const MASTERTX: Self = Self(0x02); + #[doc = "Master - receive"] + pub const MASTERRX: Self = Self(0x03); + } + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] + pub struct Cpol(pub u8); + impl Cpol { + #[doc = "CK to 0 when idle"] + pub const IDLELOW: Self = Self(0); + #[doc = "CK to 1 when idle"] + pub const IDLEHIGH: Self = Self(0x01); + } + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] + pub struct Frf(pub u8); + impl Frf { + #[doc = "SPI Motorola mode"] + pub const MOTOROLA: Self = Self(0); + #[doc = "SPI TI mode"] + pub const TI: Self = Self(0x01); + } + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] + pub struct Bidioe(pub u8); + impl Bidioe { + #[doc = "Output disabled (receive-only mode)"] + pub const OUTPUTDISABLED: Self = Self(0); + #[doc = "Output enabled (transmit-only mode)"] + pub const OUTPUTENABLED: Self = Self(0x01); + } + } +} +pub mod syscfg_l4 { + use crate::generic::*; + #[doc = "System configuration controller"] + #[derive(Copy, Clone)] + pub struct Syscfg(pub *mut u8); + unsafe impl Send for Syscfg {} + unsafe impl Sync for Syscfg {} + impl Syscfg { + #[doc = "memory remap register"] + pub fn memrmp(self) -> Reg { + unsafe { Reg::from_ptr(self.0.add(0usize)) } + } + #[doc = "configuration register 1"] + pub fn cfgr1(self) -> Reg { + unsafe { Reg::from_ptr(self.0.add(4usize)) } + } + #[doc = "external interrupt configuration register 1"] + pub fn exticr(self, n: usize) -> Reg { + assert!(n < 4usize); + unsafe { Reg::from_ptr(self.0.add(8usize + n * 4usize)) } + } + #[doc = "SCSR"] + pub fn scsr(self) -> Reg { + unsafe { Reg::from_ptr(self.0.add(24usize)) } + } + #[doc = "CFGR2"] + pub fn cfgr2(self) -> Reg { + unsafe { Reg::from_ptr(self.0.add(28usize)) } + } + #[doc = "SWPR"] + pub fn swpr(self) -> Reg { + unsafe { Reg::from_ptr(self.0.add(32usize)) } + } + #[doc = "SKR"] + pub fn skr(self) -> Reg { + unsafe { Reg::from_ptr(self.0.add(36usize)) } + } + } + pub mod regs { + use crate::generic::*; + #[doc = "CFGR2"] + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq)] + pub struct Cfgr2(pub u32); + impl Cfgr2 { + #[doc = "Cortex LOCKUP (Hardfault) output enable bit"] + pub const fn cll(&self) -> bool { + let val = (self.0 >> 0usize) & 0x01; + val != 0 + } + #[doc = "Cortex LOCKUP (Hardfault) output enable bit"] + pub fn set_cll(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize); + } + #[doc = "SRAM2 parity lock bit"] + pub const fn spl(&self) -> bool { + let val = (self.0 >> 1usize) & 0x01; + val != 0 + } + #[doc = "SRAM2 parity lock bit"] + pub fn set_spl(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 1usize)) | (((val as u32) & 0x01) << 1usize); + } + #[doc = "PVD lock enable bit"] + pub const fn pvdl(&self) -> bool { + let val = (self.0 >> 2usize) & 0x01; + val != 0 + } + #[doc = "PVD lock enable bit"] + pub fn set_pvdl(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 2usize)) | (((val as u32) & 0x01) << 2usize); + } + #[doc = "ECC Lock"] + pub const fn eccl(&self) -> bool { + let val = (self.0 >> 3usize) & 0x01; + val != 0 + } + #[doc = "ECC Lock"] + pub fn set_eccl(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 3usize)) | (((val as u32) & 0x01) << 3usize); + } + #[doc = "SRAM2 parity error flag"] + pub const fn spf(&self) -> bool { + let val = (self.0 >> 8usize) & 0x01; + val != 0 + } + #[doc = "SRAM2 parity error flag"] + pub fn set_spf(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 8usize)) | (((val as u32) & 0x01) << 8usize); + } + } + impl Default for Cfgr2 { + fn default() -> Cfgr2 { + Cfgr2(0) + } + } + #[doc = "external interrupt configuration register 4"] + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq)] + pub struct Exticr(pub u32); + impl Exticr { + #[doc = "EXTI12 configuration bits"] + pub fn exti(&self, n: usize) -> u8 { + assert!(n < 4usize); let offs = 0usize + n * 4usize; - let val = (self.0 >> offs) & 0x01; - val != 0 + let val = (self.0 >> offs) & 0x0f; + val as u8 } - #[doc = "Channel 1 Global interrupt flag"] - pub fn set_gif(&mut self, n: usize, val: bool) { - assert!(n < 7usize); + #[doc = "EXTI12 configuration bits"] + pub fn set_exti(&mut self, n: usize, val: u8) { + assert!(n < 4usize); let offs = 0usize + n * 4usize; - self.0 = (self.0 & !(0x01 << offs)) | (((val as u32) & 0x01) << offs); + self.0 = (self.0 & !(0x0f << offs)) | (((val as u32) & 0x0f) << offs); } - #[doc = "Channel 1 Transfer Complete flag"] - pub fn tcif(&self, n: usize) -> bool { - assert!(n < 7usize); - let offs = 1usize + n * 4usize; + } + impl Default for Exticr { + fn default() -> Exticr { + Exticr(0) + } + } + #[doc = "SWPR"] + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq)] + pub struct Swpr(pub u32); + impl Swpr { + #[doc = "SRAWM2 write protection."] + pub fn pwp(&self, n: usize) -> bool { + assert!(n < 32usize); + let offs = 0usize + n * 1usize; let val = (self.0 >> offs) & 0x01; val != 0 } - #[doc = "Channel 1 Transfer Complete flag"] - pub fn set_tcif(&mut self, n: usize, val: bool) { - assert!(n < 7usize); - let offs = 1usize + n * 4usize; - self.0 = (self.0 & !(0x01 << offs)) | (((val as u32) & 0x01) << offs); - } - #[doc = "Channel 1 Half Transfer Complete flag"] - pub fn htif(&self, n: usize) -> bool { - assert!(n < 7usize); - let offs = 2usize + n * 4usize; - let val = (self.0 >> offs) & 0x01; - val != 0 - } - #[doc = "Channel 1 Half Transfer Complete flag"] - pub fn set_htif(&mut self, n: usize, val: bool) { - assert!(n < 7usize); - let offs = 2usize + n * 4usize; - self.0 = (self.0 & !(0x01 << offs)) | (((val as u32) & 0x01) << offs); - } - #[doc = "Channel 1 Transfer Error flag"] - pub fn teif(&self, n: usize) -> bool { - assert!(n < 7usize); - let offs = 3usize + n * 4usize; - let val = (self.0 >> offs) & 0x01; - val != 0 - } - #[doc = "Channel 1 Transfer Error flag"] - pub fn set_teif(&mut self, n: usize, val: bool) { - assert!(n < 7usize); - let offs = 3usize + n * 4usize; + #[doc = "SRAWM2 write protection."] + pub fn set_pwp(&mut self, n: usize, val: bool) { + assert!(n < 32usize); + let offs = 0usize + n * 1usize; self.0 = (self.0 & !(0x01 << offs)) | (((val as u32) & 0x01) << offs); } } - impl Default for Isr { - fn default() -> Isr { - Isr(0) + impl Default for Swpr { + fn default() -> Swpr { + Swpr(0) + } + } + #[doc = "SKR"] + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq)] + pub struct Skr(pub u32); + impl Skr { + #[doc = "SRAM2 write protection key for software erase"] + pub const fn key(&self) -> u8 { + let val = (self.0 >> 0usize) & 0xff; + val as u8 + } + #[doc = "SRAM2 write protection key for software erase"] + pub fn set_key(&mut self, val: u8) { + self.0 = (self.0 & !(0xff << 0usize)) | (((val as u32) & 0xff) << 0usize); + } + } + impl Default for Skr { + fn default() -> Skr { + Skr(0) + } + } + #[doc = "memory remap register"] + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq)] + pub struct Memrmp(pub u32); + impl Memrmp { + #[doc = "Memory mapping selection"] + pub const fn mem_mode(&self) -> u8 { + let val = (self.0 >> 0usize) & 0x07; + val as u8 + } + #[doc = "Memory mapping selection"] + pub fn set_mem_mode(&mut self, val: u8) { + self.0 = (self.0 & !(0x07 << 0usize)) | (((val as u32) & 0x07) << 0usize); + } + #[doc = "QUADSPI memory mapping swap"] + pub const fn qfs(&self) -> bool { + let val = (self.0 >> 3usize) & 0x01; + val != 0 + } + #[doc = "QUADSPI memory mapping swap"] + pub fn set_qfs(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 3usize)) | (((val as u32) & 0x01) << 3usize); + } + #[doc = "Flash Bank mode selection"] + pub const fn fb_mode(&self) -> bool { + let val = (self.0 >> 8usize) & 0x01; + val != 0 + } + #[doc = "Flash Bank mode selection"] + pub fn set_fb_mode(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 8usize)) | (((val as u32) & 0x01) << 8usize); + } + } + impl Default for Memrmp { + fn default() -> Memrmp { + Memrmp(0) + } + } + #[doc = "configuration register 1"] + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq)] + pub struct Cfgr1(pub u32); + impl Cfgr1 { + #[doc = "Firewall disable"] + pub const fn fwdis(&self) -> bool { + let val = (self.0 >> 0usize) & 0x01; + val != 0 + } + #[doc = "Firewall disable"] + pub fn set_fwdis(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize); + } + #[doc = "I/O analog switch voltage booster enable"] + pub const fn boosten(&self) -> bool { + let val = (self.0 >> 8usize) & 0x01; + val != 0 + } + #[doc = "I/O analog switch voltage booster enable"] + pub fn set_boosten(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 8usize)) | (((val as u32) & 0x01) << 8usize); + } + #[doc = "Fast-mode Plus (Fm+) driving capability activation on PB6"] + pub const fn i2c_pb6_fmp(&self) -> bool { + let val = (self.0 >> 16usize) & 0x01; + val != 0 + } + #[doc = "Fast-mode Plus (Fm+) driving capability activation on PB6"] + pub fn set_i2c_pb6_fmp(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 16usize)) | (((val as u32) & 0x01) << 16usize); + } + #[doc = "Fast-mode Plus (Fm+) driving capability activation on PB7"] + pub const fn i2c_pb7_fmp(&self) -> bool { + let val = (self.0 >> 17usize) & 0x01; + val != 0 + } + #[doc = "Fast-mode Plus (Fm+) driving capability activation on PB7"] + pub fn set_i2c_pb7_fmp(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 17usize)) | (((val as u32) & 0x01) << 17usize); + } + #[doc = "Fast-mode Plus (Fm+) driving capability activation on PB8"] + pub const fn i2c_pb8_fmp(&self) -> bool { + let val = (self.0 >> 18usize) & 0x01; + val != 0 + } + #[doc = "Fast-mode Plus (Fm+) driving capability activation on PB8"] + pub fn set_i2c_pb8_fmp(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 18usize)) | (((val as u32) & 0x01) << 18usize); + } + #[doc = "Fast-mode Plus (Fm+) driving capability activation on PB9"] + pub const fn i2c_pb9_fmp(&self) -> bool { + let val = (self.0 >> 19usize) & 0x01; + val != 0 + } + #[doc = "Fast-mode Plus (Fm+) driving capability activation on PB9"] + pub fn set_i2c_pb9_fmp(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 19usize)) | (((val as u32) & 0x01) << 19usize); + } + #[doc = "I2C1 Fast-mode Plus driving capability activation"] + pub const fn i2c1_fmp(&self) -> bool { + let val = (self.0 >> 20usize) & 0x01; + val != 0 + } + #[doc = "I2C1 Fast-mode Plus driving capability activation"] + pub fn set_i2c1_fmp(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 20usize)) | (((val as u32) & 0x01) << 20usize); + } + #[doc = "I2C2 Fast-mode Plus driving capability activation"] + pub const fn i2c2_fmp(&self) -> bool { + let val = (self.0 >> 21usize) & 0x01; + val != 0 + } + #[doc = "I2C2 Fast-mode Plus driving capability activation"] + pub fn set_i2c2_fmp(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 21usize)) | (((val as u32) & 0x01) << 21usize); + } + #[doc = "I2C3 Fast-mode Plus driving capability activation"] + pub const fn i2c3_fmp(&self) -> bool { + let val = (self.0 >> 22usize) & 0x01; + val != 0 + } + #[doc = "I2C3 Fast-mode Plus driving capability activation"] + pub fn set_i2c3_fmp(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 22usize)) | (((val as u32) & 0x01) << 22usize); + } + #[doc = "Floating Point Unit interrupts enable bits"] + pub const fn fpu_ie(&self) -> u8 { + let val = (self.0 >> 26usize) & 0x3f; + val as u8 + } + #[doc = "Floating Point Unit interrupts enable bits"] + pub fn set_fpu_ie(&mut self, val: u8) { + self.0 = (self.0 & !(0x3f << 26usize)) | (((val as u32) & 0x3f) << 26usize); + } + } + impl Default for Cfgr1 { + fn default() -> Cfgr1 { + Cfgr1(0) + } + } + #[doc = "SCSR"] + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq)] + pub struct Scsr(pub u32); + impl Scsr { + #[doc = "SRAM2 Erase"] + pub const fn sram2er(&self) -> bool { + let val = (self.0 >> 0usize) & 0x01; + val != 0 + } + #[doc = "SRAM2 Erase"] + pub fn set_sram2er(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize); + } + #[doc = "SRAM2 busy by erase operation"] + pub const fn sram2bsy(&self) -> bool { + let val = (self.0 >> 1usize) & 0x01; + val != 0 + } + #[doc = "SRAM2 busy by erase operation"] + pub fn set_sram2bsy(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 1usize)) | (((val as u32) & 0x01) << 1usize); + } + } + impl Default for Scsr { + fn default() -> Scsr { + Scsr(0) + } + } + } +} +pub mod rng_v1 { + use crate::generic::*; + #[doc = "Random number generator"] + #[derive(Copy, Clone)] + pub struct Rng(pub *mut u8); + unsafe impl Send for Rng {} + unsafe impl Sync for Rng {} + impl Rng { + #[doc = "control register"] + pub fn cr(self) -> Reg { + unsafe { Reg::from_ptr(self.0.add(0usize)) } + } + #[doc = "status register"] + pub fn sr(self) -> Reg { + unsafe { Reg::from_ptr(self.0.add(4usize)) } + } + #[doc = "data register"] + pub fn dr(self) -> Reg { + unsafe { Reg::from_ptr(self.0.add(8usize)) } + } + } + pub mod regs { + use crate::generic::*; + #[doc = "status register"] + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq)] + pub struct Sr(pub u32); + impl Sr { + #[doc = "Data ready"] + pub const fn drdy(&self) -> bool { + let val = (self.0 >> 0usize) & 0x01; + val != 0 + } + #[doc = "Data ready"] + pub fn set_drdy(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize); + } + #[doc = "Clock error current status"] + pub const fn cecs(&self) -> bool { + let val = (self.0 >> 1usize) & 0x01; + val != 0 + } + #[doc = "Clock error current status"] + pub fn set_cecs(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 1usize)) | (((val as u32) & 0x01) << 1usize); + } + #[doc = "Seed error current status"] + pub const fn secs(&self) -> bool { + let val = (self.0 >> 2usize) & 0x01; + val != 0 + } + #[doc = "Seed error current status"] + pub fn set_secs(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 2usize)) | (((val as u32) & 0x01) << 2usize); + } + #[doc = "Clock error interrupt status"] + pub const fn ceis(&self) -> bool { + let val = (self.0 >> 5usize) & 0x01; + val != 0 + } + #[doc = "Clock error interrupt status"] + pub fn set_ceis(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 5usize)) | (((val as u32) & 0x01) << 5usize); + } + #[doc = "Seed error interrupt status"] + pub const fn seis(&self) -> bool { + let val = (self.0 >> 6usize) & 0x01; + val != 0 + } + #[doc = "Seed error interrupt status"] + pub fn set_seis(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 6usize)) | (((val as u32) & 0x01) << 6usize); + } + } + impl Default for Sr { + fn default() -> Sr { + Sr(0) + } + } + #[doc = "control register"] + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq)] + pub struct Cr(pub u32); + impl Cr { + #[doc = "Random number generator enable"] + pub const fn rngen(&self) -> bool { + let val = (self.0 >> 2usize) & 0x01; + val != 0 + } + #[doc = "Random number generator enable"] + pub fn set_rngen(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 2usize)) | (((val as u32) & 0x01) << 2usize); + } + #[doc = "Interrupt enable"] + pub const fn ie(&self) -> bool { + let val = (self.0 >> 3usize) & 0x01; + val != 0 + } + #[doc = "Interrupt enable"] + pub fn set_ie(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 3usize)) | (((val as u32) & 0x01) << 3usize); + } + } + impl Default for Cr { + fn default() -> Cr { + Cr(0) } } } @@ -7459,8 +9106,486 @@ pub mod spi_v2 { unsafe { Reg::from_ptr(self.0.add(24usize)) } } } + pub mod vals { + use crate::generic::*; + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] + pub struct Ftlvlr(pub u8); + impl Ftlvlr { + #[doc = "Tx FIFO Empty"] + pub const EMPTY: Self = Self(0); + #[doc = "Tx 1/4 FIFO"] + pub const QUARTER: Self = Self(0x01); + #[doc = "Tx 1/2 FIFO"] + pub const HALF: Self = Self(0x02); + #[doc = "Tx FIFO full"] + pub const FULL: Self = Self(0x03); + } + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] + pub struct Crcnext(pub u8); + impl Crcnext { + #[doc = "Next transmit value is from Tx buffer"] + pub const TXBUFFER: Self = Self(0); + #[doc = "Next transmit value is from Tx CRC register"] + pub const CRC: Self = Self(0x01); + } + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] + pub struct Rxonly(pub u8); + impl Rxonly { + #[doc = "Full duplex (Transmit and receive)"] + pub const FULLDUPLEX: Self = Self(0); + #[doc = "Output disabled (Receive-only mode)"] + pub const OUTPUTDISABLED: Self = Self(0x01); + } + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] + pub struct Cpol(pub u8); + impl Cpol { + #[doc = "CK to 0 when idle"] + pub const IDLELOW: Self = Self(0); + #[doc = "CK to 1 when idle"] + pub const IDLEHIGH: Self = Self(0x01); + } + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] + pub struct Frlvlr(pub u8); + impl Frlvlr { + #[doc = "Rx FIFO Empty"] + pub const EMPTY: Self = Self(0); + #[doc = "Rx 1/4 FIFO"] + pub const QUARTER: Self = Self(0x01); + #[doc = "Rx 1/2 FIFO"] + pub const HALF: Self = Self(0x02); + #[doc = "Rx FIFO full"] + pub const FULL: Self = Self(0x03); + } + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] + pub struct Ds(pub u8); + impl Ds { + #[doc = "4-bit"] + pub const FOURBIT: Self = Self(0x03); + #[doc = "5-bit"] + pub const FIVEBIT: Self = Self(0x04); + #[doc = "6-bit"] + pub const SIXBIT: Self = Self(0x05); + #[doc = "7-bit"] + pub const SEVENBIT: Self = Self(0x06); + #[doc = "8-bit"] + pub const EIGHTBIT: Self = Self(0x07); + #[doc = "9-bit"] + pub const NINEBIT: Self = Self(0x08); + #[doc = "10-bit"] + pub const TENBIT: Self = Self(0x09); + #[doc = "11-bit"] + pub const ELEVENBIT: Self = Self(0x0a); + #[doc = "12-bit"] + pub const TWELVEBIT: Self = Self(0x0b); + #[doc = "13-bit"] + pub const THIRTEENBIT: Self = Self(0x0c); + #[doc = "14-bit"] + pub const FOURTEENBIT: Self = Self(0x0d); + #[doc = "15-bit"] + pub const FIFTEENBIT: Self = Self(0x0e); + #[doc = "16-bit"] + pub const SIXTEENBIT: Self = Self(0x0f); + } + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] + pub struct LdmaRx(pub u8); + impl LdmaRx { + #[doc = "Number of data to transfer for receive is even"] + pub const EVEN: Self = Self(0); + #[doc = "Number of data to transfer for receive is odd"] + pub const ODD: Self = Self(0x01); + } + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] + pub struct Mstr(pub u8); + impl Mstr { + #[doc = "Slave configuration"] + pub const SLAVE: Self = Self(0); + #[doc = "Master configuration"] + pub const MASTER: Self = Self(0x01); + } + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] + pub struct Crcl(pub u8); + impl Crcl { + #[doc = "8-bit CRC length"] + pub const EIGHTBIT: Self = Self(0); + #[doc = "16-bit CRC length"] + pub const SIXTEENBIT: Self = Self(0x01); + } + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] + pub struct Bidioe(pub u8); + impl Bidioe { + #[doc = "Output disabled (receive-only mode)"] + pub const OUTPUTDISABLED: Self = Self(0); + #[doc = "Output enabled (transmit-only mode)"] + pub const OUTPUTENABLED: Self = Self(0x01); + } + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] + pub struct Frer(pub u8); + impl Frer { + #[doc = "No frame format error"] + pub const NOERROR: Self = Self(0); + #[doc = "A frame format error occurred"] + pub const ERROR: Self = Self(0x01); + } + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] + pub struct Bidimode(pub u8); + impl Bidimode { + #[doc = "2-line unidirectional data mode selected"] + pub const UNIDIRECTIONAL: Self = Self(0); + #[doc = "1-line bidirectional data mode selected"] + pub const BIDIRECTIONAL: Self = Self(0x01); + } + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] + pub struct Br(pub u8); + impl Br { + #[doc = "f_PCLK / 2"] + pub const DIV2: Self = Self(0); + #[doc = "f_PCLK / 4"] + pub const DIV4: Self = Self(0x01); + #[doc = "f_PCLK / 8"] + pub const DIV8: Self = Self(0x02); + #[doc = "f_PCLK / 16"] + pub const DIV16: Self = Self(0x03); + #[doc = "f_PCLK / 32"] + pub const DIV32: Self = Self(0x04); + #[doc = "f_PCLK / 64"] + pub const DIV64: Self = Self(0x05); + #[doc = "f_PCLK / 128"] + pub const DIV128: Self = Self(0x06); + #[doc = "f_PCLK / 256"] + pub const DIV256: Self = Self(0x07); + } + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] + pub struct Cpha(pub u8); + impl Cpha { + #[doc = "The first clock transition is the first data capture edge"] + pub const FIRSTEDGE: Self = Self(0); + #[doc = "The second clock transition is the first data capture edge"] + pub const SECONDEDGE: Self = Self(0x01); + } + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] + pub struct Frxth(pub u8); + impl Frxth { + #[doc = "RXNE event is generated if the FIFO level is greater than or equal to 1/2 (16-bit)"] + pub const HALF: Self = Self(0); + #[doc = "RXNE event is generated if the FIFO level is greater than or equal to 1/4 (8-bit)"] + pub const QUARTER: Self = Self(0x01); + } + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] + pub struct Frf(pub u8); + impl Frf { + #[doc = "SPI Motorola mode"] + pub const MOTOROLA: Self = Self(0); + #[doc = "SPI TI mode"] + pub const TI: Self = Self(0x01); + } + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] + pub struct LdmaTx(pub u8); + impl LdmaTx { + #[doc = "Number of data to transfer for transmit is even"] + pub const EVEN: Self = Self(0); + #[doc = "Number of data to transfer for transmit is odd"] + pub const ODD: Self = Self(0x01); + } + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] + pub struct Lsbfirst(pub u8); + impl Lsbfirst { + #[doc = "Data is transmitted/received with the MSB first"] + pub const MSBFIRST: Self = Self(0); + #[doc = "Data is transmitted/received with the LSB first"] + pub const LSBFIRST: Self = Self(0x01); + } + } pub mod regs { use crate::generic::*; + #[doc = "TX CRC register"] + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq)] + pub struct Txcrcr(pub u32); + impl Txcrcr { + #[doc = "Tx CRC register"] + pub const fn tx_crc(&self) -> u16 { + let val = (self.0 >> 0usize) & 0xffff; + val as u16 + } + #[doc = "Tx CRC register"] + pub fn set_tx_crc(&mut self, val: u16) { + self.0 = (self.0 & !(0xffff << 0usize)) | (((val as u32) & 0xffff) << 0usize); + } + } + impl Default for Txcrcr { + fn default() -> Txcrcr { + Txcrcr(0) + } + } + #[doc = "RX CRC register"] + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq)] + pub struct Rxcrcr(pub u32); + impl Rxcrcr { + #[doc = "Rx CRC register"] + pub const fn rx_crc(&self) -> u16 { + let val = (self.0 >> 0usize) & 0xffff; + val as u16 + } + #[doc = "Rx CRC register"] + pub fn set_rx_crc(&mut self, val: u16) { + self.0 = (self.0 & !(0xffff << 0usize)) | (((val as u32) & 0xffff) << 0usize); + } + } + impl Default for Rxcrcr { + fn default() -> Rxcrcr { + Rxcrcr(0) + } + } + #[doc = "status register"] + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq)] + pub struct Sr(pub u32); + impl Sr { + #[doc = "Receive buffer not empty"] + pub const fn rxne(&self) -> bool { + let val = (self.0 >> 0usize) & 0x01; + val != 0 + } + #[doc = "Receive buffer not empty"] + pub fn set_rxne(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize); + } + #[doc = "Transmit buffer empty"] + pub const fn txe(&self) -> bool { + let val = (self.0 >> 1usize) & 0x01; + val != 0 + } + #[doc = "Transmit buffer empty"] + pub fn set_txe(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 1usize)) | (((val as u32) & 0x01) << 1usize); + } + #[doc = "CRC error flag"] + pub const fn crcerr(&self) -> bool { + let val = (self.0 >> 4usize) & 0x01; + val != 0 + } + #[doc = "CRC error flag"] + pub fn set_crcerr(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 4usize)) | (((val as u32) & 0x01) << 4usize); + } + #[doc = "Mode fault"] + pub const fn modf(&self) -> bool { + let val = (self.0 >> 5usize) & 0x01; + val != 0 + } + #[doc = "Mode fault"] + pub fn set_modf(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 5usize)) | (((val as u32) & 0x01) << 5usize); + } + #[doc = "Overrun flag"] + pub const fn ovr(&self) -> bool { + let val = (self.0 >> 6usize) & 0x01; + val != 0 + } + #[doc = "Overrun flag"] + pub fn set_ovr(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 6usize)) | (((val as u32) & 0x01) << 6usize); + } + #[doc = "Busy flag"] + pub const fn bsy(&self) -> bool { + let val = (self.0 >> 7usize) & 0x01; + val != 0 + } + #[doc = "Busy flag"] + pub fn set_bsy(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 7usize)) | (((val as u32) & 0x01) << 7usize); + } + #[doc = "Frame format error"] + pub const fn fre(&self) -> bool { + let val = (self.0 >> 8usize) & 0x01; + val != 0 + } + #[doc = "Frame format error"] + pub fn set_fre(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 8usize)) | (((val as u32) & 0x01) << 8usize); + } + #[doc = "FIFO reception level"] + pub const fn frlvl(&self) -> u8 { + let val = (self.0 >> 9usize) & 0x03; + val as u8 + } + #[doc = "FIFO reception level"] + pub fn set_frlvl(&mut self, val: u8) { + self.0 = (self.0 & !(0x03 << 9usize)) | (((val as u32) & 0x03) << 9usize); + } + #[doc = "FIFO Transmission Level"] + pub const fn ftlvl(&self) -> u8 { + let val = (self.0 >> 11usize) & 0x03; + val as u8 + } + #[doc = "FIFO Transmission Level"] + pub fn set_ftlvl(&mut self, val: u8) { + self.0 = (self.0 & !(0x03 << 11usize)) | (((val as u32) & 0x03) << 11usize); + } + } + impl Default for Sr { + fn default() -> Sr { + Sr(0) + } + } + #[doc = "data register"] + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq)] + pub struct Dr(pub u32); + impl Dr { + #[doc = "Data register"] + pub const fn dr(&self) -> u16 { + let val = (self.0 >> 0usize) & 0xffff; + val as u16 + } + #[doc = "Data register"] + pub fn set_dr(&mut self, val: u16) { + self.0 = (self.0 & !(0xffff << 0usize)) | (((val as u32) & 0xffff) << 0usize); + } + } + impl Default for Dr { + fn default() -> Dr { + Dr(0) + } + } + #[doc = "control register 2"] + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq)] + pub struct Cr2(pub u32); + impl Cr2 { + #[doc = "Rx buffer DMA enable"] + pub const fn rxdmaen(&self) -> bool { + let val = (self.0 >> 0usize) & 0x01; + val != 0 + } + #[doc = "Rx buffer DMA enable"] + pub fn set_rxdmaen(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize); + } + #[doc = "Tx buffer DMA enable"] + pub const fn txdmaen(&self) -> bool { + let val = (self.0 >> 1usize) & 0x01; + val != 0 + } + #[doc = "Tx buffer DMA enable"] + pub fn set_txdmaen(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 1usize)) | (((val as u32) & 0x01) << 1usize); + } + #[doc = "SS output enable"] + pub const fn ssoe(&self) -> bool { + let val = (self.0 >> 2usize) & 0x01; + val != 0 + } + #[doc = "SS output enable"] + pub fn set_ssoe(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 2usize)) | (((val as u32) & 0x01) << 2usize); + } + #[doc = "NSS pulse management"] + pub const fn nssp(&self) -> bool { + let val = (self.0 >> 3usize) & 0x01; + val != 0 + } + #[doc = "NSS pulse management"] + pub fn set_nssp(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 3usize)) | (((val as u32) & 0x01) << 3usize); + } + #[doc = "Frame format"] + pub const fn frf(&self) -> super::vals::Frf { + let val = (self.0 >> 4usize) & 0x01; + super::vals::Frf(val as u8) + } + #[doc = "Frame format"] + pub fn set_frf(&mut self, val: super::vals::Frf) { + self.0 = (self.0 & !(0x01 << 4usize)) | (((val.0 as u32) & 0x01) << 4usize); + } + #[doc = "Error interrupt enable"] + pub const fn errie(&self) -> bool { + let val = (self.0 >> 5usize) & 0x01; + val != 0 + } + #[doc = "Error interrupt enable"] + pub fn set_errie(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 5usize)) | (((val as u32) & 0x01) << 5usize); + } + #[doc = "RX buffer not empty interrupt enable"] + pub const fn rxneie(&self) -> bool { + let val = (self.0 >> 6usize) & 0x01; + val != 0 + } + #[doc = "RX buffer not empty interrupt enable"] + pub fn set_rxneie(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 6usize)) | (((val as u32) & 0x01) << 6usize); + } + #[doc = "Tx buffer empty interrupt enable"] + pub const fn txeie(&self) -> bool { + let val = (self.0 >> 7usize) & 0x01; + val != 0 + } + #[doc = "Tx buffer empty interrupt enable"] + pub fn set_txeie(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 7usize)) | (((val as u32) & 0x01) << 7usize); + } + #[doc = "Data size"] + pub const fn ds(&self) -> super::vals::Ds { + let val = (self.0 >> 8usize) & 0x0f; + super::vals::Ds(val as u8) + } + #[doc = "Data size"] + pub fn set_ds(&mut self, val: super::vals::Ds) { + self.0 = (self.0 & !(0x0f << 8usize)) | (((val.0 as u32) & 0x0f) << 8usize); + } + #[doc = "FIFO reception threshold"] + pub const fn frxth(&self) -> super::vals::Frxth { + let val = (self.0 >> 12usize) & 0x01; + super::vals::Frxth(val as u8) + } + #[doc = "FIFO reception threshold"] + pub fn set_frxth(&mut self, val: super::vals::Frxth) { + self.0 = (self.0 & !(0x01 << 12usize)) | (((val.0 as u32) & 0x01) << 12usize); + } + #[doc = "Last DMA transfer for reception"] + pub const fn ldma_rx(&self) -> super::vals::LdmaRx { + let val = (self.0 >> 13usize) & 0x01; + super::vals::LdmaRx(val as u8) + } + #[doc = "Last DMA transfer for reception"] + pub fn set_ldma_rx(&mut self, val: super::vals::LdmaRx) { + self.0 = (self.0 & !(0x01 << 13usize)) | (((val.0 as u32) & 0x01) << 13usize); + } + #[doc = "Last DMA transfer for transmission"] + pub const fn ldma_tx(&self) -> super::vals::LdmaTx { + let val = (self.0 >> 14usize) & 0x01; + super::vals::LdmaTx(val as u8) + } + #[doc = "Last DMA transfer for transmission"] + pub fn set_ldma_tx(&mut self, val: super::vals::LdmaTx) { + self.0 = (self.0 & !(0x01 << 14usize)) | (((val.0 as u32) & 0x01) << 14usize); + } + } + impl Default for Cr2 { + fn default() -> Cr2 { + Cr2(0) + } + } #[doc = "control register 1"] #[repr(transparent)] #[derive(Copy, Clone, Eq, PartialEq)] @@ -7618,1410 +9743,533 @@ pub mod spi_v2 { Crcpr(0) } } - #[doc = "RX CRC register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Rxcrcr(pub u32); - impl Rxcrcr { - #[doc = "Rx CRC register"] - pub const fn rx_crc(&self) -> u16 { - let val = (self.0 >> 0usize) & 0xffff; - val as u16 - } - #[doc = "Rx CRC register"] - pub fn set_rx_crc(&mut self, val: u16) { - self.0 = (self.0 & !(0xffff << 0usize)) | (((val as u32) & 0xffff) << 0usize); - } - } - impl Default for Rxcrcr { - fn default() -> Rxcrcr { - Rxcrcr(0) - } - } - #[doc = "control register 2"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Cr2(pub u32); - impl Cr2 { - #[doc = "Rx buffer DMA enable"] - pub const fn rxdmaen(&self) -> bool { - let val = (self.0 >> 0usize) & 0x01; - val != 0 - } - #[doc = "Rx buffer DMA enable"] - pub fn set_rxdmaen(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize); - } - #[doc = "Tx buffer DMA enable"] - pub const fn txdmaen(&self) -> bool { - let val = (self.0 >> 1usize) & 0x01; - val != 0 - } - #[doc = "Tx buffer DMA enable"] - pub fn set_txdmaen(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 1usize)) | (((val as u32) & 0x01) << 1usize); - } - #[doc = "SS output enable"] - pub const fn ssoe(&self) -> bool { - let val = (self.0 >> 2usize) & 0x01; - val != 0 - } - #[doc = "SS output enable"] - pub fn set_ssoe(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 2usize)) | (((val as u32) & 0x01) << 2usize); - } - #[doc = "NSS pulse management"] - pub const fn nssp(&self) -> bool { - let val = (self.0 >> 3usize) & 0x01; - val != 0 - } - #[doc = "NSS pulse management"] - pub fn set_nssp(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 3usize)) | (((val as u32) & 0x01) << 3usize); - } - #[doc = "Frame format"] - pub const fn frf(&self) -> super::vals::Frf { - let val = (self.0 >> 4usize) & 0x01; - super::vals::Frf(val as u8) - } - #[doc = "Frame format"] - pub fn set_frf(&mut self, val: super::vals::Frf) { - self.0 = (self.0 & !(0x01 << 4usize)) | (((val.0 as u32) & 0x01) << 4usize); - } - #[doc = "Error interrupt enable"] - pub const fn errie(&self) -> bool { - let val = (self.0 >> 5usize) & 0x01; - val != 0 - } - #[doc = "Error interrupt enable"] - pub fn set_errie(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 5usize)) | (((val as u32) & 0x01) << 5usize); - } - #[doc = "RX buffer not empty interrupt enable"] - pub const fn rxneie(&self) -> bool { - let val = (self.0 >> 6usize) & 0x01; - val != 0 - } - #[doc = "RX buffer not empty interrupt enable"] - pub fn set_rxneie(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 6usize)) | (((val as u32) & 0x01) << 6usize); - } - #[doc = "Tx buffer empty interrupt enable"] - pub const fn txeie(&self) -> bool { - let val = (self.0 >> 7usize) & 0x01; - val != 0 - } - #[doc = "Tx buffer empty interrupt enable"] - pub fn set_txeie(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 7usize)) | (((val as u32) & 0x01) << 7usize); - } - #[doc = "Data size"] - pub const fn ds(&self) -> super::vals::Ds { - let val = (self.0 >> 8usize) & 0x0f; - super::vals::Ds(val as u8) - } - #[doc = "Data size"] - pub fn set_ds(&mut self, val: super::vals::Ds) { - self.0 = (self.0 & !(0x0f << 8usize)) | (((val.0 as u32) & 0x0f) << 8usize); - } - #[doc = "FIFO reception threshold"] - pub const fn frxth(&self) -> super::vals::Frxth { - let val = (self.0 >> 12usize) & 0x01; - super::vals::Frxth(val as u8) - } - #[doc = "FIFO reception threshold"] - pub fn set_frxth(&mut self, val: super::vals::Frxth) { - self.0 = (self.0 & !(0x01 << 12usize)) | (((val.0 as u32) & 0x01) << 12usize); - } - #[doc = "Last DMA transfer for reception"] - pub const fn ldma_rx(&self) -> super::vals::LdmaRx { - let val = (self.0 >> 13usize) & 0x01; - super::vals::LdmaRx(val as u8) - } - #[doc = "Last DMA transfer for reception"] - pub fn set_ldma_rx(&mut self, val: super::vals::LdmaRx) { - self.0 = (self.0 & !(0x01 << 13usize)) | (((val.0 as u32) & 0x01) << 13usize); - } - #[doc = "Last DMA transfer for transmission"] - pub const fn ldma_tx(&self) -> super::vals::LdmaTx { - let val = (self.0 >> 14usize) & 0x01; - super::vals::LdmaTx(val as u8) - } - #[doc = "Last DMA transfer for transmission"] - pub fn set_ldma_tx(&mut self, val: super::vals::LdmaTx) { - self.0 = (self.0 & !(0x01 << 14usize)) | (((val.0 as u32) & 0x01) << 14usize); - } - } - impl Default for Cr2 { - fn default() -> Cr2 { - Cr2(0) - } - } - #[doc = "data register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Dr(pub u32); - impl Dr { - #[doc = "Data register"] - pub const fn dr(&self) -> u16 { - let val = (self.0 >> 0usize) & 0xffff; - val as u16 - } - #[doc = "Data register"] - pub fn set_dr(&mut self, val: u16) { - self.0 = (self.0 & !(0xffff << 0usize)) | (((val as u32) & 0xffff) << 0usize); - } - } - impl Default for Dr { - fn default() -> Dr { - Dr(0) - } - } - #[doc = "status register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Sr(pub u32); - impl Sr { - #[doc = "Receive buffer not empty"] - pub const fn rxne(&self) -> bool { - let val = (self.0 >> 0usize) & 0x01; - val != 0 - } - #[doc = "Receive buffer not empty"] - pub fn set_rxne(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize); - } - #[doc = "Transmit buffer empty"] - pub const fn txe(&self) -> bool { - let val = (self.0 >> 1usize) & 0x01; - val != 0 - } - #[doc = "Transmit buffer empty"] - pub fn set_txe(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 1usize)) | (((val as u32) & 0x01) << 1usize); - } - #[doc = "CRC error flag"] - pub const fn crcerr(&self) -> bool { - let val = (self.0 >> 4usize) & 0x01; - val != 0 - } - #[doc = "CRC error flag"] - pub fn set_crcerr(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 4usize)) | (((val as u32) & 0x01) << 4usize); - } - #[doc = "Mode fault"] - pub const fn modf(&self) -> bool { - let val = (self.0 >> 5usize) & 0x01; - val != 0 - } - #[doc = "Mode fault"] - pub fn set_modf(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 5usize)) | (((val as u32) & 0x01) << 5usize); - } - #[doc = "Overrun flag"] - pub const fn ovr(&self) -> bool { - let val = (self.0 >> 6usize) & 0x01; - val != 0 - } - #[doc = "Overrun flag"] - pub fn set_ovr(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 6usize)) | (((val as u32) & 0x01) << 6usize); - } - #[doc = "Busy flag"] - pub const fn bsy(&self) -> bool { - let val = (self.0 >> 7usize) & 0x01; - val != 0 - } - #[doc = "Busy flag"] - pub fn set_bsy(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 7usize)) | (((val as u32) & 0x01) << 7usize); - } - #[doc = "Frame format error"] - pub const fn fre(&self) -> bool { - let val = (self.0 >> 8usize) & 0x01; - val != 0 - } - #[doc = "Frame format error"] - pub fn set_fre(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 8usize)) | (((val as u32) & 0x01) << 8usize); - } - #[doc = "FIFO reception level"] - pub const fn frlvl(&self) -> u8 { - let val = (self.0 >> 9usize) & 0x03; - val as u8 - } - #[doc = "FIFO reception level"] - pub fn set_frlvl(&mut self, val: u8) { - self.0 = (self.0 & !(0x03 << 9usize)) | (((val as u32) & 0x03) << 9usize); - } - #[doc = "FIFO Transmission Level"] - pub const fn ftlvl(&self) -> u8 { - let val = (self.0 >> 11usize) & 0x03; - val as u8 - } - #[doc = "FIFO Transmission Level"] - pub fn set_ftlvl(&mut self, val: u8) { - self.0 = (self.0 & !(0x03 << 11usize)) | (((val as u32) & 0x03) << 11usize); - } - } - impl Default for Sr { - fn default() -> Sr { - Sr(0) - } - } - #[doc = "TX CRC register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Txcrcr(pub u32); - impl Txcrcr { - #[doc = "Tx CRC register"] - pub const fn tx_crc(&self) -> u16 { - let val = (self.0 >> 0usize) & 0xffff; - val as u16 - } - #[doc = "Tx CRC register"] - pub fn set_tx_crc(&mut self, val: u16) { - self.0 = (self.0 & !(0xffff << 0usize)) | (((val as u32) & 0xffff) << 0usize); - } - } - impl Default for Txcrcr { - fn default() -> Txcrcr { - Txcrcr(0) - } - } - } - pub mod vals { - use crate::generic::*; - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Cpha(pub u8); - impl Cpha { - #[doc = "The first clock transition is the first data capture edge"] - pub const FIRSTEDGE: Self = Self(0); - #[doc = "The second clock transition is the first data capture edge"] - pub const SECONDEDGE: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Crcl(pub u8); - impl Crcl { - #[doc = "8-bit CRC length"] - pub const EIGHTBIT: Self = Self(0); - #[doc = "16-bit CRC length"] - pub const SIXTEENBIT: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Br(pub u8); - impl Br { - #[doc = "f_PCLK / 2"] - pub const DIV2: Self = Self(0); - #[doc = "f_PCLK / 4"] - pub const DIV4: Self = Self(0x01); - #[doc = "f_PCLK / 8"] - pub const DIV8: Self = Self(0x02); - #[doc = "f_PCLK / 16"] - pub const DIV16: Self = Self(0x03); - #[doc = "f_PCLK / 32"] - pub const DIV32: Self = Self(0x04); - #[doc = "f_PCLK / 64"] - pub const DIV64: Self = Self(0x05); - #[doc = "f_PCLK / 128"] - pub const DIV128: Self = Self(0x06); - #[doc = "f_PCLK / 256"] - pub const DIV256: Self = Self(0x07); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Crcnext(pub u8); - impl Crcnext { - #[doc = "Next transmit value is from Tx buffer"] - pub const TXBUFFER: Self = Self(0); - #[doc = "Next transmit value is from Tx CRC register"] - pub const CRC: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Ftlvlr(pub u8); - impl Ftlvlr { - #[doc = "Tx FIFO Empty"] - pub const EMPTY: Self = Self(0); - #[doc = "Tx 1/4 FIFO"] - pub const QUARTER: Self = Self(0x01); - #[doc = "Tx 1/2 FIFO"] - pub const HALF: Self = Self(0x02); - #[doc = "Tx FIFO full"] - pub const FULL: Self = Self(0x03); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct LdmaRx(pub u8); - impl LdmaRx { - #[doc = "Number of data to transfer for receive is even"] - pub const EVEN: Self = Self(0); - #[doc = "Number of data to transfer for receive is odd"] - pub const ODD: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Frxth(pub u8); - impl Frxth { - #[doc = "RXNE event is generated if the FIFO level is greater than or equal to 1/2 (16-bit)"] - pub const HALF: Self = Self(0); - #[doc = "RXNE event is generated if the FIFO level is greater than or equal to 1/4 (8-bit)"] - pub const QUARTER: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Bidioe(pub u8); - impl Bidioe { - #[doc = "Output disabled (receive-only mode)"] - pub const OUTPUTDISABLED: Self = Self(0); - #[doc = "Output enabled (transmit-only mode)"] - pub const OUTPUTENABLED: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Lsbfirst(pub u8); - impl Lsbfirst { - #[doc = "Data is transmitted/received with the MSB first"] - pub const MSBFIRST: Self = Self(0); - #[doc = "Data is transmitted/received with the LSB first"] - pub const LSBFIRST: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Cpol(pub u8); - impl Cpol { - #[doc = "CK to 0 when idle"] - pub const IDLELOW: Self = Self(0); - #[doc = "CK to 1 when idle"] - pub const IDLEHIGH: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Frer(pub u8); - impl Frer { - #[doc = "No frame format error"] - pub const NOERROR: Self = Self(0); - #[doc = "A frame format error occurred"] - pub const ERROR: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Ds(pub u8); - impl Ds { - #[doc = "4-bit"] - pub const FOURBIT: Self = Self(0x03); - #[doc = "5-bit"] - pub const FIVEBIT: Self = Self(0x04); - #[doc = "6-bit"] - pub const SIXBIT: Self = Self(0x05); - #[doc = "7-bit"] - pub const SEVENBIT: Self = Self(0x06); - #[doc = "8-bit"] - pub const EIGHTBIT: Self = Self(0x07); - #[doc = "9-bit"] - pub const NINEBIT: Self = Self(0x08); - #[doc = "10-bit"] - pub const TENBIT: Self = Self(0x09); - #[doc = "11-bit"] - pub const ELEVENBIT: Self = Self(0x0a); - #[doc = "12-bit"] - pub const TWELVEBIT: Self = Self(0x0b); - #[doc = "13-bit"] - pub const THIRTEENBIT: Self = Self(0x0c); - #[doc = "14-bit"] - pub const FOURTEENBIT: Self = Self(0x0d); - #[doc = "15-bit"] - pub const FIFTEENBIT: Self = Self(0x0e); - #[doc = "16-bit"] - pub const SIXTEENBIT: Self = Self(0x0f); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Bidimode(pub u8); - impl Bidimode { - #[doc = "2-line unidirectional data mode selected"] - pub const UNIDIRECTIONAL: Self = Self(0); - #[doc = "1-line bidirectional data mode selected"] - pub const BIDIRECTIONAL: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct LdmaTx(pub u8); - impl LdmaTx { - #[doc = "Number of data to transfer for transmit is even"] - pub const EVEN: Self = Self(0); - #[doc = "Number of data to transfer for transmit is odd"] - pub const ODD: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Mstr(pub u8); - impl Mstr { - #[doc = "Slave configuration"] - pub const SLAVE: Self = Self(0); - #[doc = "Master configuration"] - pub const MASTER: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Rxonly(pub u8); - impl Rxonly { - #[doc = "Full duplex (Transmit and receive)"] - pub const FULLDUPLEX: Self = Self(0); - #[doc = "Output disabled (Receive-only mode)"] - pub const OUTPUTDISABLED: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Frlvlr(pub u8); - impl Frlvlr { - #[doc = "Rx FIFO Empty"] - pub const EMPTY: Self = Self(0); - #[doc = "Rx 1/4 FIFO"] - pub const QUARTER: Self = Self(0x01); - #[doc = "Rx 1/2 FIFO"] - pub const HALF: Self = Self(0x02); - #[doc = "Rx FIFO full"] - pub const FULL: Self = Self(0x03); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Frf(pub u8); - impl Frf { - #[doc = "SPI Motorola mode"] - pub const MOTOROLA: Self = Self(0); - #[doc = "SPI TI mode"] - pub const TI: Self = Self(0x01); - } } } -pub mod syscfg_f4 { +pub mod dma_v2 { use crate::generic::*; - #[doc = "System configuration controller"] + #[doc = "Stream cluster: S?CR, S?NDTR, S?M0AR, S?M1AR and S?FCR registers"] #[derive(Copy, Clone)] - pub struct Syscfg(pub *mut u8); - unsafe impl Send for Syscfg {} - unsafe impl Sync for Syscfg {} - impl Syscfg { - #[doc = "memory remap register"] - pub fn memrm(self) -> Reg { + pub struct St(pub *mut u8); + unsafe impl Send for St {} + unsafe impl Sync for St {} + impl St { + #[doc = "stream x configuration register"] + pub fn cr(self) -> Reg { unsafe { Reg::from_ptr(self.0.add(0usize)) } } - #[doc = "peripheral mode configuration register"] - pub fn pmc(self) -> Reg { + #[doc = "stream x number of data register"] + pub fn ndtr(self) -> Reg { unsafe { Reg::from_ptr(self.0.add(4usize)) } } - #[doc = "external interrupt configuration register"] - pub fn exticr(self, n: usize) -> Reg { - assert!(n < 4usize); + #[doc = "stream x peripheral address register"] + pub fn par(self) -> Reg { + unsafe { Reg::from_ptr(self.0.add(8usize)) } + } + #[doc = "stream x memory 0 address register"] + pub fn m0ar(self) -> Reg { + unsafe { Reg::from_ptr(self.0.add(12usize)) } + } + #[doc = "stream x memory 1 address register"] + pub fn m1ar(self) -> Reg { + unsafe { Reg::from_ptr(self.0.add(16usize)) } + } + #[doc = "stream x FIFO control register"] + pub fn fcr(self) -> Reg { + unsafe { Reg::from_ptr(self.0.add(20usize)) } + } + } + #[doc = "DMA controller"] + #[derive(Copy, Clone)] + pub struct Dma(pub *mut u8); + unsafe impl Send for Dma {} + unsafe impl Sync for Dma {} + impl Dma { + #[doc = "low interrupt status register"] + pub fn isr(self, n: usize) -> Reg { + assert!(n < 2usize); + unsafe { Reg::from_ptr(self.0.add(0usize + n * 4usize)) } + } + #[doc = "low interrupt flag clear register"] + pub fn ifcr(self, n: usize) -> Reg { + assert!(n < 2usize); unsafe { Reg::from_ptr(self.0.add(8usize + n * 4usize)) } } - #[doc = "Compensation cell control register"] - pub fn cmpcr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(32usize)) } - } - } - pub mod regs { - use crate::generic::*; - #[doc = "Compensation cell control register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Cmpcr(pub u32); - impl Cmpcr { - #[doc = "Compensation cell power-down"] - pub const fn cmp_pd(&self) -> bool { - let val = (self.0 >> 0usize) & 0x01; - val != 0 - } - #[doc = "Compensation cell power-down"] - pub fn set_cmp_pd(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize); - } - #[doc = "READY"] - pub const fn ready(&self) -> bool { - let val = (self.0 >> 8usize) & 0x01; - val != 0 - } - #[doc = "READY"] - pub fn set_ready(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 8usize)) | (((val as u32) & 0x01) << 8usize); - } - } - impl Default for Cmpcr { - fn default() -> Cmpcr { - Cmpcr(0) - } - } - #[doc = "peripheral mode configuration register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Pmc(pub u32); - impl Pmc { - #[doc = "ADC1DC2"] - pub const fn adc1dc2(&self) -> bool { - let val = (self.0 >> 16usize) & 0x01; - val != 0 - } - #[doc = "ADC1DC2"] - pub fn set_adc1dc2(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 16usize)) | (((val as u32) & 0x01) << 16usize); - } - #[doc = "ADC2DC2"] - pub const fn adc2dc2(&self) -> bool { - let val = (self.0 >> 17usize) & 0x01; - val != 0 - } - #[doc = "ADC2DC2"] - pub fn set_adc2dc2(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 17usize)) | (((val as u32) & 0x01) << 17usize); - } - #[doc = "ADC3DC2"] - pub const fn adc3dc2(&self) -> bool { - let val = (self.0 >> 18usize) & 0x01; - val != 0 - } - #[doc = "ADC3DC2"] - pub fn set_adc3dc2(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 18usize)) | (((val as u32) & 0x01) << 18usize); - } - #[doc = "Ethernet PHY interface selection"] - pub const fn mii_rmii_sel(&self) -> bool { - let val = (self.0 >> 23usize) & 0x01; - val != 0 - } - #[doc = "Ethernet PHY interface selection"] - pub fn set_mii_rmii_sel(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 23usize)) | (((val as u32) & 0x01) << 23usize); - } - } - impl Default for Pmc { - fn default() -> Pmc { - Pmc(0) - } - } - #[doc = "memory remap register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Memrm(pub u32); - impl Memrm { - #[doc = "Memory mapping selection"] - pub const fn mem_mode(&self) -> u8 { - let val = (self.0 >> 0usize) & 0x07; - val as u8 - } - #[doc = "Memory mapping selection"] - pub fn set_mem_mode(&mut self, val: u8) { - self.0 = (self.0 & !(0x07 << 0usize)) | (((val as u32) & 0x07) << 0usize); - } - #[doc = "Flash bank mode selection"] - pub const fn fb_mode(&self) -> bool { - let val = (self.0 >> 8usize) & 0x01; - val != 0 - } - #[doc = "Flash bank mode selection"] - pub fn set_fb_mode(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 8usize)) | (((val as u32) & 0x01) << 8usize); - } - #[doc = "FMC memory mapping swap"] - pub const fn swp_fmc(&self) -> u8 { - let val = (self.0 >> 10usize) & 0x03; - val as u8 - } - #[doc = "FMC memory mapping swap"] - pub fn set_swp_fmc(&mut self, val: u8) { - self.0 = (self.0 & !(0x03 << 10usize)) | (((val as u32) & 0x03) << 10usize); - } - } - impl Default for Memrm { - fn default() -> Memrm { - Memrm(0) - } - } - #[doc = "external interrupt configuration register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Exticr(pub u32); - impl Exticr { - #[doc = "EXTI x configuration"] - pub fn exti(&self, n: usize) -> u8 { - assert!(n < 4usize); - let offs = 0usize + n * 4usize; - let val = (self.0 >> offs) & 0x0f; - val as u8 - } - #[doc = "EXTI x configuration"] - pub fn set_exti(&mut self, n: usize, val: u8) { - assert!(n < 4usize); - let offs = 0usize + n * 4usize; - self.0 = (self.0 & !(0x0f << offs)) | (((val as u32) & 0x0f) << offs); - } - } - impl Default for Exticr { - fn default() -> Exticr { - Exticr(0) - } - } - } -} -pub mod gpio_v2 { - use crate::generic::*; - #[doc = "General-purpose I/Os"] - #[derive(Copy, Clone)] - pub struct Gpio(pub *mut u8); - unsafe impl Send for Gpio {} - unsafe impl Sync for Gpio {} - impl Gpio { - #[doc = "GPIO port mode register"] - pub fn moder(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(0usize)) } - } - #[doc = "GPIO port output type register"] - pub fn otyper(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(4usize)) } - } - #[doc = "GPIO port output speed register"] - pub fn ospeedr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(8usize)) } - } - #[doc = "GPIO port pull-up/pull-down register"] - pub fn pupdr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(12usize)) } - } - #[doc = "GPIO port input data register"] - pub fn idr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(16usize)) } - } - #[doc = "GPIO port output data register"] - pub fn odr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(20usize)) } - } - #[doc = "GPIO port bit set/reset register"] - pub fn bsrr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(24usize)) } - } - #[doc = "GPIO port configuration lock register"] - pub fn lckr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(28usize)) } - } - #[doc = "GPIO alternate function register (low, high)"] - pub fn afr(self, n: usize) -> Reg { - assert!(n < 2usize); - unsafe { Reg::from_ptr(self.0.add(32usize + n * 4usize)) } - } - } - pub mod regs { - use crate::generic::*; - #[doc = "GPIO port bit set/reset register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Bsrr(pub u32); - impl Bsrr { - #[doc = "Port x set bit y (y= 0..15)"] - pub fn bs(&self, n: usize) -> bool { - assert!(n < 16usize); - let offs = 0usize + n * 1usize; - let val = (self.0 >> offs) & 0x01; - val != 0 - } - #[doc = "Port x set bit y (y= 0..15)"] - pub fn set_bs(&mut self, n: usize, val: bool) { - assert!(n < 16usize); - let offs = 0usize + n * 1usize; - self.0 = (self.0 & !(0x01 << offs)) | (((val as u32) & 0x01) << offs); - } - #[doc = "Port x set bit y (y= 0..15)"] - pub fn br(&self, n: usize) -> bool { - assert!(n < 16usize); - let offs = 16usize + n * 1usize; - let val = (self.0 >> offs) & 0x01; - val != 0 - } - #[doc = "Port x set bit y (y= 0..15)"] - pub fn set_br(&mut self, n: usize, val: bool) { - assert!(n < 16usize); - let offs = 16usize + n * 1usize; - self.0 = (self.0 & !(0x01 << offs)) | (((val as u32) & 0x01) << offs); - } - } - impl Default for Bsrr { - fn default() -> Bsrr { - Bsrr(0) - } - } - #[doc = "GPIO port output speed register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Ospeedr(pub u32); - impl Ospeedr { - #[doc = "Port x configuration bits (y = 0..15)"] - pub fn ospeedr(&self, n: usize) -> super::vals::Ospeedr { - assert!(n < 16usize); - let offs = 0usize + n * 2usize; - let val = (self.0 >> offs) & 0x03; - super::vals::Ospeedr(val as u8) - } - #[doc = "Port x configuration bits (y = 0..15)"] - pub fn set_ospeedr(&mut self, n: usize, val: super::vals::Ospeedr) { - assert!(n < 16usize); - let offs = 0usize + n * 2usize; - self.0 = (self.0 & !(0x03 << offs)) | (((val.0 as u32) & 0x03) << offs); - } - } - impl Default for Ospeedr { - fn default() -> Ospeedr { - Ospeedr(0) - } - } - #[doc = "GPIO port mode register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Moder(pub u32); - impl Moder { - #[doc = "Port x configuration bits (y = 0..15)"] - pub fn moder(&self, n: usize) -> super::vals::Moder { - assert!(n < 16usize); - let offs = 0usize + n * 2usize; - let val = (self.0 >> offs) & 0x03; - super::vals::Moder(val as u8) - } - #[doc = "Port x configuration bits (y = 0..15)"] - pub fn set_moder(&mut self, n: usize, val: super::vals::Moder) { - assert!(n < 16usize); - let offs = 0usize + n * 2usize; - self.0 = (self.0 & !(0x03 << offs)) | (((val.0 as u32) & 0x03) << offs); - } - } - impl Default for Moder { - fn default() -> Moder { - Moder(0) - } - } - #[doc = "GPIO port output data register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Odr(pub u32); - impl Odr { - #[doc = "Port output data (y = 0..15)"] - pub fn odr(&self, n: usize) -> super::vals::Odr { - assert!(n < 16usize); - let offs = 0usize + n * 1usize; - let val = (self.0 >> offs) & 0x01; - super::vals::Odr(val as u8) - } - #[doc = "Port output data (y = 0..15)"] - pub fn set_odr(&mut self, n: usize, val: super::vals::Odr) { - assert!(n < 16usize); - let offs = 0usize + n * 1usize; - self.0 = (self.0 & !(0x01 << offs)) | (((val.0 as u32) & 0x01) << offs); - } - } - impl Default for Odr { - fn default() -> Odr { - Odr(0) - } - } - #[doc = "GPIO port output type register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Otyper(pub u32); - impl Otyper { - #[doc = "Port x configuration bits (y = 0..15)"] - pub fn ot(&self, n: usize) -> super::vals::Ot { - assert!(n < 16usize); - let offs = 0usize + n * 1usize; - let val = (self.0 >> offs) & 0x01; - super::vals::Ot(val as u8) - } - #[doc = "Port x configuration bits (y = 0..15)"] - pub fn set_ot(&mut self, n: usize, val: super::vals::Ot) { - assert!(n < 16usize); - let offs = 0usize + n * 1usize; - self.0 = (self.0 & !(0x01 << offs)) | (((val.0 as u32) & 0x01) << offs); - } - } - impl Default for Otyper { - fn default() -> Otyper { - Otyper(0) - } - } - #[doc = "GPIO port pull-up/pull-down register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Pupdr(pub u32); - impl Pupdr { - #[doc = "Port x configuration bits (y = 0..15)"] - pub fn pupdr(&self, n: usize) -> super::vals::Pupdr { - assert!(n < 16usize); - let offs = 0usize + n * 2usize; - let val = (self.0 >> offs) & 0x03; - super::vals::Pupdr(val as u8) - } - #[doc = "Port x configuration bits (y = 0..15)"] - pub fn set_pupdr(&mut self, n: usize, val: super::vals::Pupdr) { - assert!(n < 16usize); - let offs = 0usize + n * 2usize; - self.0 = (self.0 & !(0x03 << offs)) | (((val.0 as u32) & 0x03) << offs); - } - } - impl Default for Pupdr { - fn default() -> Pupdr { - Pupdr(0) - } - } - #[doc = "GPIO alternate function register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Afr(pub u32); - impl Afr { - #[doc = "Alternate function selection for port x bit y (y = 0..15)"] - pub fn afr(&self, n: usize) -> super::vals::Afr { - assert!(n < 8usize); - let offs = 0usize + n * 4usize; - let val = (self.0 >> offs) & 0x0f; - super::vals::Afr(val as u8) - } - #[doc = "Alternate function selection for port x bit y (y = 0..15)"] - pub fn set_afr(&mut self, n: usize, val: super::vals::Afr) { - assert!(n < 8usize); - let offs = 0usize + n * 4usize; - self.0 = (self.0 & !(0x0f << offs)) | (((val.0 as u32) & 0x0f) << offs); - } - } - impl Default for Afr { - fn default() -> Afr { - Afr(0) - } - } - #[doc = "GPIO port input data register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Idr(pub u32); - impl Idr { - #[doc = "Port input data (y = 0..15)"] - pub fn idr(&self, n: usize) -> super::vals::Idr { - assert!(n < 16usize); - let offs = 0usize + n * 1usize; - let val = (self.0 >> offs) & 0x01; - super::vals::Idr(val as u8) - } - #[doc = "Port input data (y = 0..15)"] - pub fn set_idr(&mut self, n: usize, val: super::vals::Idr) { - assert!(n < 16usize); - let offs = 0usize + n * 1usize; - self.0 = (self.0 & !(0x01 << offs)) | (((val.0 as u32) & 0x01) << offs); - } - } - impl Default for Idr { - fn default() -> Idr { - Idr(0) - } - } - #[doc = "GPIO port configuration lock register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Lckr(pub u32); - impl Lckr { - #[doc = "Port x lock bit y (y= 0..15)"] - pub fn lck(&self, n: usize) -> super::vals::Lck { - assert!(n < 16usize); - let offs = 0usize + n * 1usize; - let val = (self.0 >> offs) & 0x01; - super::vals::Lck(val as u8) - } - #[doc = "Port x lock bit y (y= 0..15)"] - pub fn set_lck(&mut self, n: usize, val: super::vals::Lck) { - assert!(n < 16usize); - let offs = 0usize + n * 1usize; - self.0 = (self.0 & !(0x01 << offs)) | (((val.0 as u32) & 0x01) << offs); - } - #[doc = "Port x lock bit y (y= 0..15)"] - pub const fn lckk(&self) -> super::vals::Lckk { - let val = (self.0 >> 16usize) & 0x01; - super::vals::Lckk(val as u8) - } - #[doc = "Port x lock bit y (y= 0..15)"] - pub fn set_lckk(&mut self, val: super::vals::Lckk) { - self.0 = (self.0 & !(0x01 << 16usize)) | (((val.0 as u32) & 0x01) << 16usize); - } - } - impl Default for Lckr { - fn default() -> Lckr { - Lckr(0) - } + #[doc = "Stream cluster: S?CR, S?NDTR, S?M0AR, S?M1AR and S?FCR registers"] + pub fn st(self, n: usize) -> St { + assert!(n < 8usize); + unsafe { St(self.0.add(16usize + n * 24usize)) } } } pub mod vals { use crate::generic::*; #[repr(transparent)] #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Bsw(pub u8); - impl Bsw { - #[doc = "Sets the corresponding ODRx bit"] - pub const SET: Self = Self(0x01); + pub struct Fs(pub u8); + impl Fs { + #[doc = "0 < fifo_level < 1/4"] + pub const QUARTER1: Self = Self(0); + #[doc = "1/4 <= fifo_level < 1/2"] + pub const QUARTER2: Self = Self(0x01); + #[doc = "1/2 <= fifo_level < 3/4"] + pub const QUARTER3: Self = Self(0x02); + #[doc = "3/4 <= fifo_level < full"] + pub const QUARTER4: Self = Self(0x03); + #[doc = "FIFO is empty"] + pub const EMPTY: Self = Self(0x04); + #[doc = "FIFO is full"] + pub const FULL: Self = Self(0x05); } #[repr(transparent)] #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Lck(pub u8); - impl Lck { - #[doc = "Port configuration not locked"] - pub const UNLOCKED: Self = Self(0); - #[doc = "Port configuration locked"] - pub const LOCKED: Self = Self(0x01); + pub struct Pfctrl(pub u8); + impl Pfctrl { + #[doc = "The DMA is the flow controller"] + pub const DMA: Self = Self(0); + #[doc = "The peripheral is the flow controller"] + pub const PERIPHERAL: Self = Self(0x01); } #[repr(transparent)] #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Pupdr(pub u8); - impl Pupdr { - #[doc = "No pull-up, pull-down"] - pub const FLOATING: Self = Self(0); - #[doc = "Pull-up"] - pub const PULLUP: Self = Self(0x01); - #[doc = "Pull-down"] - pub const PULLDOWN: Self = Self(0x02); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Lckk(pub u8); - impl Lckk { - #[doc = "Port configuration lock key not active"] - pub const NOTACTIVE: Self = Self(0); - #[doc = "Port configuration lock key active"] - pub const ACTIVE: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Ot(pub u8); - impl Ot { - #[doc = "Output push-pull (reset state)"] - pub const PUSHPULL: Self = Self(0); - #[doc = "Output open-drain"] - pub const OPENDRAIN: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Ospeedr(pub u8); - impl Ospeedr { - #[doc = "Low speed"] - pub const LOWSPEED: Self = Self(0); - #[doc = "Medium speed"] - pub const MEDIUMSPEED: Self = Self(0x01); - #[doc = "High speed"] - pub const HIGHSPEED: Self = Self(0x02); - #[doc = "Very high speed"] - pub const VERYHIGHSPEED: Self = Self(0x03); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Brw(pub u8); - impl Brw { - #[doc = "Resets the corresponding ODRx bit"] - pub const RESET: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Afr(pub u8); - impl Afr { - #[doc = "AF0"] - pub const AF0: Self = Self(0); - #[doc = "AF1"] - pub const AF1: Self = Self(0x01); - #[doc = "AF2"] - pub const AF2: Self = Self(0x02); - #[doc = "AF3"] - pub const AF3: Self = Self(0x03); - #[doc = "AF4"] - pub const AF4: Self = Self(0x04); - #[doc = "AF5"] - pub const AF5: Self = Self(0x05); - #[doc = "AF6"] - pub const AF6: Self = Self(0x06); - #[doc = "AF7"] - pub const AF7: Self = Self(0x07); - #[doc = "AF8"] - pub const AF8: Self = Self(0x08); - #[doc = "AF9"] - pub const AF9: Self = Self(0x09); - #[doc = "AF10"] - pub const AF10: Self = Self(0x0a); - #[doc = "AF11"] - pub const AF11: Self = Self(0x0b); - #[doc = "AF12"] - pub const AF12: Self = Self(0x0c); - #[doc = "AF13"] - pub const AF13: Self = Self(0x0d); - #[doc = "AF14"] - pub const AF14: Self = Self(0x0e); - #[doc = "AF15"] - pub const AF15: Self = Self(0x0f); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Odr(pub u8); - impl Odr { - #[doc = "Set output to logic low"] + pub struct Pl(pub u8); + impl Pl { + #[doc = "Low"] pub const LOW: Self = Self(0); - #[doc = "Set output to logic high"] - pub const HIGH: Self = Self(0x01); + #[doc = "Medium"] + pub const MEDIUM: Self = Self(0x01); + #[doc = "High"] + pub const HIGH: Self = Self(0x02); + #[doc = "Very high"] + pub const VERYHIGH: Self = Self(0x03); } #[repr(transparent)] #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Idr(pub u8); - impl Idr { - #[doc = "Input is logic low"] - pub const LOW: Self = Self(0); - #[doc = "Input is logic high"] - pub const HIGH: Self = Self(0x01); + pub struct Size(pub u8); + impl Size { + #[doc = "Byte (8-bit)"] + pub const BITS8: Self = Self(0); + #[doc = "Half-word (16-bit)"] + pub const BITS16: Self = Self(0x01); + #[doc = "Word (32-bit)"] + pub const BITS32: Self = Self(0x02); } #[repr(transparent)] #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Moder(pub u8); - impl Moder { - #[doc = "Input mode (reset state)"] - pub const INPUT: Self = Self(0); - #[doc = "General purpose output mode"] - pub const OUTPUT: Self = Self(0x01); - #[doc = "Alternate function mode"] - pub const ALTERNATE: Self = Self(0x02); - #[doc = "Analog mode"] - pub const ANALOG: Self = Self(0x03); - } - } -} -pub mod exti_v1 { - use crate::generic::*; - #[doc = "External interrupt/event controller"] - #[derive(Copy, Clone)] - pub struct Exti(pub *mut u8); - unsafe impl Send for Exti {} - unsafe impl Sync for Exti {} - impl Exti { - #[doc = "Interrupt mask register (EXTI_IMR)"] - pub fn imr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(0usize)) } - } - #[doc = "Event mask register (EXTI_EMR)"] - pub fn emr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(4usize)) } - } - #[doc = "Rising Trigger selection register (EXTI_RTSR)"] - pub fn rtsr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(8usize)) } - } - #[doc = "Falling Trigger selection register (EXTI_FTSR)"] - pub fn ftsr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(12usize)) } - } - #[doc = "Software interrupt event register (EXTI_SWIER)"] - pub fn swier(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(16usize)) } - } - #[doc = "Pending register (EXTI_PR)"] - pub fn pr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(20usize)) } - } - } - pub mod regs { - use crate::generic::*; - #[doc = "Software interrupt event register (EXTI_SWIER)"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Swier(pub u32); - impl Swier { - #[doc = "Software Interrupt on line 0"] - pub fn swier(&self, n: usize) -> bool { - assert!(n < 23usize); - let offs = 0usize + n * 1usize; - let val = (self.0 >> offs) & 0x01; - val != 0 - } - #[doc = "Software Interrupt on line 0"] - pub fn set_swier(&mut self, n: usize, val: bool) { - assert!(n < 23usize); - let offs = 0usize + n * 1usize; - self.0 = (self.0 & !(0x01 << offs)) | (((val as u32) & 0x01) << offs); - } - } - impl Default for Swier { - fn default() -> Swier { - Swier(0) - } - } - #[doc = "Pending register (EXTI_PR)"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Pr(pub u32); - impl Pr { - #[doc = "Pending bit 0"] - pub fn pr(&self, n: usize) -> bool { - assert!(n < 23usize); - let offs = 0usize + n * 1usize; - let val = (self.0 >> offs) & 0x01; - val != 0 - } - #[doc = "Pending bit 0"] - pub fn set_pr(&mut self, n: usize, val: bool) { - assert!(n < 23usize); - let offs = 0usize + n * 1usize; - self.0 = (self.0 & !(0x01 << offs)) | (((val as u32) & 0x01) << offs); - } - } - impl Default for Pr { - fn default() -> Pr { - Pr(0) - } - } - #[doc = "Falling Trigger selection register (EXTI_FTSR)"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Ftsr(pub u32); - impl Ftsr { - #[doc = "Falling trigger event configuration of line 0"] - pub fn tr(&self, n: usize) -> super::vals::Tr { - assert!(n < 23usize); - let offs = 0usize + n * 1usize; - let val = (self.0 >> offs) & 0x01; - super::vals::Tr(val as u8) - } - #[doc = "Falling trigger event configuration of line 0"] - pub fn set_tr(&mut self, n: usize, val: super::vals::Tr) { - assert!(n < 23usize); - let offs = 0usize + n * 1usize; - self.0 = (self.0 & !(0x01 << offs)) | (((val.0 as u32) & 0x01) << offs); - } - } - impl Default for Ftsr { - fn default() -> Ftsr { - Ftsr(0) - } - } - #[doc = "Event mask register (EXTI_EMR)"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Emr(pub u32); - impl Emr { - #[doc = "Event Mask on line 0"] - pub fn mr(&self, n: usize) -> super::vals::Mr { - assert!(n < 23usize); - let offs = 0usize + n * 1usize; - let val = (self.0 >> offs) & 0x01; - super::vals::Mr(val as u8) - } - #[doc = "Event Mask on line 0"] - pub fn set_mr(&mut self, n: usize, val: super::vals::Mr) { - assert!(n < 23usize); - let offs = 0usize + n * 1usize; - self.0 = (self.0 & !(0x01 << offs)) | (((val.0 as u32) & 0x01) << offs); - } - } - impl Default for Emr { - fn default() -> Emr { - Emr(0) - } - } - #[doc = "Rising Trigger selection register (EXTI_RTSR)"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Rtsr(pub u32); - impl Rtsr { - #[doc = "Rising trigger event configuration of line 0"] - pub fn tr(&self, n: usize) -> super::vals::Tr { - assert!(n < 23usize); - let offs = 0usize + n * 1usize; - let val = (self.0 >> offs) & 0x01; - super::vals::Tr(val as u8) - } - #[doc = "Rising trigger event configuration of line 0"] - pub fn set_tr(&mut self, n: usize, val: super::vals::Tr) { - assert!(n < 23usize); - let offs = 0usize + n * 1usize; - self.0 = (self.0 & !(0x01 << offs)) | (((val.0 as u32) & 0x01) << offs); - } - } - impl Default for Rtsr { - fn default() -> Rtsr { - Rtsr(0) - } - } - #[doc = "Interrupt mask register (EXTI_IMR)"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Imr(pub u32); - impl Imr { - #[doc = "Interrupt Mask on line 0"] - pub fn mr(&self, n: usize) -> super::vals::Mr { - assert!(n < 23usize); - let offs = 0usize + n * 1usize; - let val = (self.0 >> offs) & 0x01; - super::vals::Mr(val as u8) - } - #[doc = "Interrupt Mask on line 0"] - pub fn set_mr(&mut self, n: usize, val: super::vals::Mr) { - assert!(n < 23usize); - let offs = 0usize + n * 1usize; - self.0 = (self.0 & !(0x01 << offs)) | (((val.0 as u32) & 0x01) << offs); - } - } - impl Default for Imr { - fn default() -> Imr { - Imr(0) - } - } - } - pub mod vals { - use crate::generic::*; - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Prw(pub u8); - impl Prw { - #[doc = "Clears pending bit"] - pub const CLEAR: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Mr(pub u8); - impl Mr { - #[doc = "Interrupt request line is masked"] - pub const MASKED: Self = Self(0); - #[doc = "Interrupt request line is unmasked"] - pub const UNMASKED: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Tr(pub u8); - impl Tr { - #[doc = "Falling edge trigger is disabled"] + pub struct Circ(pub u8); + impl Circ { + #[doc = "Circular mode disabled"] pub const DISABLED: Self = Self(0); - #[doc = "Falling edge trigger is enabled"] + #[doc = "Circular mode enabled"] pub const ENABLED: Self = Self(0x01); } #[repr(transparent)] #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Swierw(pub u8); - impl Swierw { - #[doc = "Generates an interrupt request"] - pub const PEND: Self = Self(0x01); + pub struct Dmdis(pub u8); + impl Dmdis { + #[doc = "Direct mode is enabled"] + pub const ENABLED: Self = Self(0); + #[doc = "Direct mode is disabled"] + pub const DISABLED: Self = Self(0x01); } #[repr(transparent)] #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Prr(pub u8); - impl Prr { - #[doc = "No trigger request occurred"] - pub const NOTPENDING: Self = Self(0); - #[doc = "Selected trigger request occurred"] - pub const PENDING: Self = Self(0x01); + pub struct Dir(pub u8); + impl Dir { + #[doc = "Peripheral-to-memory"] + pub const PERIPHERALTOMEMORY: Self = Self(0); + #[doc = "Memory-to-peripheral"] + pub const MEMORYTOPERIPHERAL: Self = Self(0x01); + #[doc = "Memory-to-memory"] + pub const MEMORYTOMEMORY: Self = Self(0x02); } - } -} -pub mod rng_v1 { - use crate::generic::*; - #[doc = "Random number generator"] - #[derive(Copy, Clone)] - pub struct Rng(pub *mut u8); - unsafe impl Send for Rng {} - unsafe impl Sync for Rng {} - impl Rng { - #[doc = "control register"] - pub fn cr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(0usize)) } + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] + pub struct Fth(pub u8); + impl Fth { + #[doc = "1/4 full FIFO"] + pub const QUARTER: Self = Self(0); + #[doc = "1/2 full FIFO"] + pub const HALF: Self = Self(0x01); + #[doc = "3/4 full FIFO"] + pub const THREEQUARTERS: Self = Self(0x02); + #[doc = "Full FIFO"] + pub const FULL: Self = Self(0x03); } - #[doc = "status register"] - pub fn sr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(4usize)) } + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] + pub struct Inc(pub u8); + impl Inc { + #[doc = "Address pointer is fixed"] + pub const FIXED: Self = Self(0); + #[doc = "Address pointer is incremented after each data transfer"] + pub const INCREMENTED: Self = Self(0x01); } - #[doc = "data register"] - pub fn dr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(8usize)) } + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] + pub struct Burst(pub u8); + impl Burst { + #[doc = "Single transfer"] + pub const SINGLE: Self = Self(0); + #[doc = "Incremental burst of 4 beats"] + pub const INCR4: Self = Self(0x01); + #[doc = "Incremental burst of 8 beats"] + pub const INCR8: Self = Self(0x02); + #[doc = "Incremental burst of 16 beats"] + pub const INCR16: Self = Self(0x03); + } + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] + pub struct Pincos(pub u8); + impl Pincos { + #[doc = "The offset size for the peripheral address calculation is linked to the PSIZE"] + pub const PSIZE: Self = Self(0); + #[doc = "The offset size for the peripheral address calculation is fixed to 4 (32-bit alignment)"] + pub const FIXED4: Self = Self(0x01); + } + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] + pub struct Dbm(pub u8); + impl Dbm { + #[doc = "No buffer switching at the end of transfer"] + pub const DISABLED: Self = Self(0); + #[doc = "Memory target switched at the end of the DMA transfer"] + pub const ENABLED: Self = Self(0x01); + } + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] + pub struct Ct(pub u8); + impl Ct { + #[doc = "The current target memory is Memory 0"] + pub const MEMORY0: Self = Self(0); + #[doc = "The current target memory is Memory 1"] + pub const MEMORY1: Self = Self(0x01); } } pub mod regs { use crate::generic::*; - #[doc = "status register"] + #[doc = "stream x FIFO control register"] #[repr(transparent)] #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Sr(pub u32); - impl Sr { - #[doc = "Data ready"] - pub const fn drdy(&self) -> bool { - let val = (self.0 >> 0usize) & 0x01; - val != 0 + pub struct Fcr(pub u32); + impl Fcr { + #[doc = "FIFO threshold selection"] + pub const fn fth(&self) -> super::vals::Fth { + let val = (self.0 >> 0usize) & 0x03; + super::vals::Fth(val as u8) } - #[doc = "Data ready"] - pub fn set_drdy(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize); + #[doc = "FIFO threshold selection"] + pub fn set_fth(&mut self, val: super::vals::Fth) { + self.0 = (self.0 & !(0x03 << 0usize)) | (((val.0 as u32) & 0x03) << 0usize); } - #[doc = "Clock error current status"] - pub const fn cecs(&self) -> bool { - let val = (self.0 >> 1usize) & 0x01; - val != 0 - } - #[doc = "Clock error current status"] - pub fn set_cecs(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 1usize)) | (((val as u32) & 0x01) << 1usize); - } - #[doc = "Seed error current status"] - pub const fn secs(&self) -> bool { + #[doc = "Direct mode disable"] + pub const fn dmdis(&self) -> super::vals::Dmdis { let val = (self.0 >> 2usize) & 0x01; + super::vals::Dmdis(val as u8) + } + #[doc = "Direct mode disable"] + pub fn set_dmdis(&mut self, val: super::vals::Dmdis) { + self.0 = (self.0 & !(0x01 << 2usize)) | (((val.0 as u32) & 0x01) << 2usize); + } + #[doc = "FIFO status"] + pub const fn fs(&self) -> super::vals::Fs { + let val = (self.0 >> 3usize) & 0x07; + super::vals::Fs(val as u8) + } + #[doc = "FIFO status"] + pub fn set_fs(&mut self, val: super::vals::Fs) { + self.0 = (self.0 & !(0x07 << 3usize)) | (((val.0 as u32) & 0x07) << 3usize); + } + #[doc = "FIFO error interrupt enable"] + pub const fn feie(&self) -> bool { + let val = (self.0 >> 7usize) & 0x01; val != 0 } - #[doc = "Seed error current status"] - pub fn set_secs(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 2usize)) | (((val as u32) & 0x01) << 2usize); - } - #[doc = "Clock error interrupt status"] - pub const fn ceis(&self) -> bool { - let val = (self.0 >> 5usize) & 0x01; - val != 0 - } - #[doc = "Clock error interrupt status"] - pub fn set_ceis(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 5usize)) | (((val as u32) & 0x01) << 5usize); - } - #[doc = "Seed error interrupt status"] - pub const fn seis(&self) -> bool { - let val = (self.0 >> 6usize) & 0x01; - val != 0 - } - #[doc = "Seed error interrupt status"] - pub fn set_seis(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 6usize)) | (((val as u32) & 0x01) << 6usize); + #[doc = "FIFO error interrupt enable"] + pub fn set_feie(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 7usize)) | (((val as u32) & 0x01) << 7usize); } } - impl Default for Sr { - fn default() -> Sr { - Sr(0) + impl Default for Fcr { + fn default() -> Fcr { + Fcr(0) } } - #[doc = "control register"] + #[doc = "stream x number of data register"] + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq)] + pub struct Ndtr(pub u32); + impl Ndtr { + #[doc = "Number of data items to transfer"] + pub const fn ndt(&self) -> u16 { + let val = (self.0 >> 0usize) & 0xffff; + val as u16 + } + #[doc = "Number of data items to transfer"] + pub fn set_ndt(&mut self, val: u16) { + self.0 = (self.0 & !(0xffff << 0usize)) | (((val as u32) & 0xffff) << 0usize); + } + } + impl Default for Ndtr { + fn default() -> Ndtr { + Ndtr(0) + } + } + #[doc = "stream x configuration register"] #[repr(transparent)] #[derive(Copy, Clone, Eq, PartialEq)] pub struct Cr(pub u32); impl Cr { - #[doc = "Random number generator enable"] - pub const fn rngen(&self) -> bool { + #[doc = "Stream enable / flag stream ready when read low"] + pub const fn en(&self) -> bool { + let val = (self.0 >> 0usize) & 0x01; + val != 0 + } + #[doc = "Stream enable / flag stream ready when read low"] + pub fn set_en(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize); + } + #[doc = "Direct mode error interrupt enable"] + pub const fn dmeie(&self) -> bool { + let val = (self.0 >> 1usize) & 0x01; + val != 0 + } + #[doc = "Direct mode error interrupt enable"] + pub fn set_dmeie(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 1usize)) | (((val as u32) & 0x01) << 1usize); + } + #[doc = "Transfer error interrupt enable"] + pub const fn teie(&self) -> bool { let val = (self.0 >> 2usize) & 0x01; val != 0 } - #[doc = "Random number generator enable"] - pub fn set_rngen(&mut self, val: bool) { + #[doc = "Transfer error interrupt enable"] + pub fn set_teie(&mut self, val: bool) { self.0 = (self.0 & !(0x01 << 2usize)) | (((val as u32) & 0x01) << 2usize); } - #[doc = "Interrupt enable"] - pub const fn ie(&self) -> bool { + #[doc = "Half transfer interrupt enable"] + pub const fn htie(&self) -> bool { let val = (self.0 >> 3usize) & 0x01; val != 0 } - #[doc = "Interrupt enable"] - pub fn set_ie(&mut self, val: bool) { + #[doc = "Half transfer interrupt enable"] + pub fn set_htie(&mut self, val: bool) { self.0 = (self.0 & !(0x01 << 3usize)) | (((val as u32) & 0x01) << 3usize); } + #[doc = "Transfer complete interrupt enable"] + pub const fn tcie(&self) -> bool { + let val = (self.0 >> 4usize) & 0x01; + val != 0 + } + #[doc = "Transfer complete interrupt enable"] + pub fn set_tcie(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 4usize)) | (((val as u32) & 0x01) << 4usize); + } + #[doc = "Peripheral flow controller"] + pub const fn pfctrl(&self) -> super::vals::Pfctrl { + let val = (self.0 >> 5usize) & 0x01; + super::vals::Pfctrl(val as u8) + } + #[doc = "Peripheral flow controller"] + pub fn set_pfctrl(&mut self, val: super::vals::Pfctrl) { + self.0 = (self.0 & !(0x01 << 5usize)) | (((val.0 as u32) & 0x01) << 5usize); + } + #[doc = "Data transfer direction"] + pub const fn dir(&self) -> super::vals::Dir { + let val = (self.0 >> 6usize) & 0x03; + super::vals::Dir(val as u8) + } + #[doc = "Data transfer direction"] + pub fn set_dir(&mut self, val: super::vals::Dir) { + self.0 = (self.0 & !(0x03 << 6usize)) | (((val.0 as u32) & 0x03) << 6usize); + } + #[doc = "Circular mode"] + pub const fn circ(&self) -> super::vals::Circ { + let val = (self.0 >> 8usize) & 0x01; + super::vals::Circ(val as u8) + } + #[doc = "Circular mode"] + pub fn set_circ(&mut self, val: super::vals::Circ) { + self.0 = (self.0 & !(0x01 << 8usize)) | (((val.0 as u32) & 0x01) << 8usize); + } + #[doc = "Peripheral increment mode"] + pub const fn pinc(&self) -> super::vals::Inc { + let val = (self.0 >> 9usize) & 0x01; + super::vals::Inc(val as u8) + } + #[doc = "Peripheral increment mode"] + pub fn set_pinc(&mut self, val: super::vals::Inc) { + self.0 = (self.0 & !(0x01 << 9usize)) | (((val.0 as u32) & 0x01) << 9usize); + } + #[doc = "Memory increment mode"] + pub const fn minc(&self) -> super::vals::Inc { + let val = (self.0 >> 10usize) & 0x01; + super::vals::Inc(val as u8) + } + #[doc = "Memory increment mode"] + pub fn set_minc(&mut self, val: super::vals::Inc) { + self.0 = (self.0 & !(0x01 << 10usize)) | (((val.0 as u32) & 0x01) << 10usize); + } + #[doc = "Peripheral data size"] + pub const fn psize(&self) -> super::vals::Size { + let val = (self.0 >> 11usize) & 0x03; + super::vals::Size(val as u8) + } + #[doc = "Peripheral data size"] + pub fn set_psize(&mut self, val: super::vals::Size) { + self.0 = (self.0 & !(0x03 << 11usize)) | (((val.0 as u32) & 0x03) << 11usize); + } + #[doc = "Memory data size"] + pub const fn msize(&self) -> super::vals::Size { + let val = (self.0 >> 13usize) & 0x03; + super::vals::Size(val as u8) + } + #[doc = "Memory data size"] + pub fn set_msize(&mut self, val: super::vals::Size) { + self.0 = (self.0 & !(0x03 << 13usize)) | (((val.0 as u32) & 0x03) << 13usize); + } + #[doc = "Peripheral increment offset size"] + pub const fn pincos(&self) -> super::vals::Pincos { + let val = (self.0 >> 15usize) & 0x01; + super::vals::Pincos(val as u8) + } + #[doc = "Peripheral increment offset size"] + pub fn set_pincos(&mut self, val: super::vals::Pincos) { + self.0 = (self.0 & !(0x01 << 15usize)) | (((val.0 as u32) & 0x01) << 15usize); + } + #[doc = "Priority level"] + pub const fn pl(&self) -> super::vals::Pl { + let val = (self.0 >> 16usize) & 0x03; + super::vals::Pl(val as u8) + } + #[doc = "Priority level"] + pub fn set_pl(&mut self, val: super::vals::Pl) { + self.0 = (self.0 & !(0x03 << 16usize)) | (((val.0 as u32) & 0x03) << 16usize); + } + #[doc = "Double buffer mode"] + pub const fn dbm(&self) -> super::vals::Dbm { + let val = (self.0 >> 18usize) & 0x01; + super::vals::Dbm(val as u8) + } + #[doc = "Double buffer mode"] + pub fn set_dbm(&mut self, val: super::vals::Dbm) { + self.0 = (self.0 & !(0x01 << 18usize)) | (((val.0 as u32) & 0x01) << 18usize); + } + #[doc = "Current target (only in double buffer mode)"] + pub const fn ct(&self) -> super::vals::Ct { + let val = (self.0 >> 19usize) & 0x01; + super::vals::Ct(val as u8) + } + #[doc = "Current target (only in double buffer mode)"] + pub fn set_ct(&mut self, val: super::vals::Ct) { + self.0 = (self.0 & !(0x01 << 19usize)) | (((val.0 as u32) & 0x01) << 19usize); + } + #[doc = "Peripheral burst transfer configuration"] + pub const fn pburst(&self) -> super::vals::Burst { + let val = (self.0 >> 21usize) & 0x03; + super::vals::Burst(val as u8) + } + #[doc = "Peripheral burst transfer configuration"] + pub fn set_pburst(&mut self, val: super::vals::Burst) { + self.0 = (self.0 & !(0x03 << 21usize)) | (((val.0 as u32) & 0x03) << 21usize); + } + #[doc = "Memory burst transfer configuration"] + pub const fn mburst(&self) -> super::vals::Burst { + let val = (self.0 >> 23usize) & 0x03; + super::vals::Burst(val as u8) + } + #[doc = "Memory burst transfer configuration"] + pub fn set_mburst(&mut self, val: super::vals::Burst) { + self.0 = (self.0 & !(0x03 << 23usize)) | (((val.0 as u32) & 0x03) << 23usize); + } + #[doc = "Channel selection"] + pub const fn chsel(&self) -> u8 { + let val = (self.0 >> 25usize) & 0x0f; + val as u8 + } + #[doc = "Channel selection"] + pub fn set_chsel(&mut self, val: u8) { + self.0 = (self.0 & !(0x0f << 25usize)) | (((val as u32) & 0x0f) << 25usize); + } } impl Default for Cr { fn default() -> Cr { Cr(0) } } + #[doc = "interrupt register"] + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq)] + pub struct Ixr(pub u32); + impl Ixr { + #[doc = "Stream x FIFO error interrupt flag (x=3..0)"] + pub fn feif(&self, n: usize) -> bool { + assert!(n < 4usize); + let offs = 0usize + ([0usize, 6usize, 16usize, 22usize][n] as usize); + let val = (self.0 >> offs) & 0x01; + val != 0 + } + #[doc = "Stream x FIFO error interrupt flag (x=3..0)"] + pub fn set_feif(&mut self, n: usize, val: bool) { + assert!(n < 4usize); + let offs = 0usize + ([0usize, 6usize, 16usize, 22usize][n] as usize); + self.0 = (self.0 & !(0x01 << offs)) | (((val as u32) & 0x01) << offs); + } + #[doc = "Stream x direct mode error interrupt flag (x=3..0)"] + pub fn dmeif(&self, n: usize) -> bool { + assert!(n < 4usize); + let offs = 2usize + ([0usize, 6usize, 16usize, 22usize][n] as usize); + let val = (self.0 >> offs) & 0x01; + val != 0 + } + #[doc = "Stream x direct mode error interrupt flag (x=3..0)"] + pub fn set_dmeif(&mut self, n: usize, val: bool) { + assert!(n < 4usize); + let offs = 2usize + ([0usize, 6usize, 16usize, 22usize][n] as usize); + self.0 = (self.0 & !(0x01 << offs)) | (((val as u32) & 0x01) << offs); + } + #[doc = "Stream x transfer error interrupt flag (x=3..0)"] + pub fn teif(&self, n: usize) -> bool { + assert!(n < 4usize); + let offs = 3usize + ([0usize, 6usize, 16usize, 22usize][n] as usize); + let val = (self.0 >> offs) & 0x01; + val != 0 + } + #[doc = "Stream x transfer error interrupt flag (x=3..0)"] + pub fn set_teif(&mut self, n: usize, val: bool) { + assert!(n < 4usize); + let offs = 3usize + ([0usize, 6usize, 16usize, 22usize][n] as usize); + self.0 = (self.0 & !(0x01 << offs)) | (((val as u32) & 0x01) << offs); + } + #[doc = "Stream x half transfer interrupt flag (x=3..0)"] + pub fn htif(&self, n: usize) -> bool { + assert!(n < 4usize); + let offs = 4usize + ([0usize, 6usize, 16usize, 22usize][n] as usize); + let val = (self.0 >> offs) & 0x01; + val != 0 + } + #[doc = "Stream x half transfer interrupt flag (x=3..0)"] + pub fn set_htif(&mut self, n: usize, val: bool) { + assert!(n < 4usize); + let offs = 4usize + ([0usize, 6usize, 16usize, 22usize][n] as usize); + self.0 = (self.0 & !(0x01 << offs)) | (((val as u32) & 0x01) << offs); + } + #[doc = "Stream x transfer complete interrupt flag (x = 3..0)"] + pub fn tcif(&self, n: usize) -> bool { + assert!(n < 4usize); + let offs = 5usize + ([0usize, 6usize, 16usize, 22usize][n] as usize); + let val = (self.0 >> offs) & 0x01; + val != 0 + } + #[doc = "Stream x transfer complete interrupt flag (x = 3..0)"] + pub fn set_tcif(&mut self, n: usize, val: bool) { + assert!(n < 4usize); + let offs = 5usize + ([0usize, 6usize, 16usize, 22usize][n] as usize); + self.0 = (self.0 & !(0x01 << offs)) | (((val as u32) & 0x01) << offs); + } + } + impl Default for Ixr { + fn default() -> Ixr { + Ixr(0) + } + } } } diff --git a/embassy-stm32/src/sdmmc/mod.rs b/embassy-stm32/src/sdmmc/mod.rs new file mode 100644 index 00000000..6d62eaee --- /dev/null +++ b/embassy-stm32/src/sdmmc/mod.rs @@ -0,0 +1,7 @@ +#![macro_use] + +#[cfg_attr(feature = "_sdmmc_v1", path = "v1.rs")] +#[cfg_attr(feature = "_sdmmc_v2", path = "v2.rs")] +mod _version; + +pub use _version::*; diff --git a/embassy-stm32/src/sdmmc_v2.rs b/embassy-stm32/src/sdmmc/v2.rs similarity index 99% rename from embassy-stm32/src/sdmmc_v2.rs rename to embassy-stm32/src/sdmmc/v2.rs index 465a20fc..a4da4be8 100644 --- a/embassy-stm32/src/sdmmc_v2.rs +++ b/embassy-stm32/src/sdmmc/v2.rs @@ -1,3 +1,5 @@ +#![macro_use] + use core::default::Default; use core::future::Future; use core::marker::PhantomData; @@ -1470,11 +1472,11 @@ where macro_rules! impl_sdmmc { ($inst:ident) => { - impl crate::sdmmc_v2::sealed::Instance for peripherals::$inst { + impl crate::sdmmc::sealed::Instance for peripherals::$inst { type Interrupt = interrupt::$inst; - fn inner() -> crate::sdmmc_v2::SdmmcInner { - const INNER: crate::sdmmc_v2::SdmmcInner = crate::sdmmc_v2::SdmmcInner($inst); + fn inner() -> crate::sdmmc::SdmmcInner { + const INNER: crate::sdmmc::SdmmcInner = crate::sdmmc::SdmmcInner($inst); INNER } @@ -1484,17 +1486,17 @@ macro_rules! impl_sdmmc { } } - impl crate::sdmmc_v2::Instance for peripherals::$inst {} + impl crate::sdmmc::Instance for peripherals::$inst {} }; } macro_rules! impl_sdmmc_pin { ($inst:ident, $func:ident, $pin:ident, $num:expr) => { - impl crate::sdmmc_v2::sealed::$func for peripherals::$pin { + impl crate::sdmmc::sealed::$func for peripherals::$pin { const AF_NUM: u8 = $num; } - impl crate::sdmmc_v2::$func for peripherals::$pin {} + impl crate::sdmmc::$func for peripherals::$pin {} }; } diff --git a/embassy-stm32/src/spi/mod.rs b/embassy-stm32/src/spi/mod.rs index 79dce330..9f62a5ec 100644 --- a/embassy-stm32/src/spi/mod.rs +++ b/embassy-stm32/src/spi/mod.rs @@ -1,10 +1,9 @@ #![macro_use] -#[cfg_attr(feature = "_spi_v1", path = "spi_v1.rs")] -#[cfg_attr(feature = "_spi_v2", path = "spi_v2.rs")] -mod spi; - -pub use spi::*; +#[cfg_attr(feature = "_spi_v1", path = "v1.rs")] +#[cfg_attr(feature = "_spi_v2", path = "v2.rs")] +mod _version; +pub use _version::*; use crate::gpio::Pin; diff --git a/embassy-stm32/src/spi/spi_v1.rs b/embassy-stm32/src/spi/v1.rs similarity index 100% rename from embassy-stm32/src/spi/spi_v1.rs rename to embassy-stm32/src/spi/v1.rs diff --git a/embassy-stm32/src/spi/spi_v2.rs b/embassy-stm32/src/spi/v2.rs similarity index 100% rename from embassy-stm32/src/spi/spi_v2.rs rename to embassy-stm32/src/spi/v2.rs diff --git a/embassy-stm32/src/usart/mod.rs b/embassy-stm32/src/usart/mod.rs index cb1ebf49..02ef9c4b 100644 --- a/embassy-stm32/src/usart/mod.rs +++ b/embassy-stm32/src/usart/mod.rs @@ -1,10 +1,9 @@ #![macro_use] -#[cfg_attr(feature = "_usart_v1", path = "usart_v1.rs")] -#[cfg_attr(feature = "_usart_v2", path = "usart_v2.rs")] -mod usart; - -pub use usart::*; +#[cfg_attr(feature = "_usart_v1", path = "v1.rs")] +#[cfg_attr(feature = "_usart_v2", path = "v2.rs")] +mod _version; +pub use _version::*; use crate::gpio::Pin; use crate::pac::usart::Usart; diff --git a/embassy-stm32/src/usart/usart_v1.rs b/embassy-stm32/src/usart/v1.rs similarity index 95% rename from embassy-stm32/src/usart/usart_v1.rs rename to embassy-stm32/src/usart/v1.rs index 03ccd144..78a53b53 100644 --- a/embassy-stm32/src/usart/usart_v1.rs +++ b/embassy-stm32/src/usart/v1.rs @@ -3,7 +3,6 @@ use core::marker::PhantomData; use embassy::util::Unborrow; use embassy_extras::unborrow; -use crate::dma::{transfer_m2p, Channel}; use crate::gpio::{NoPin, Pin}; use crate::pac::usart::{regs, vals, Usart}; @@ -103,7 +102,8 @@ impl<'d, T: Instance> Uart<'d, T> { } } - pub async fn write_dma(&mut self, ch: &mut impl Channel, buffer: &[u8]) -> Result<(), Error> { + #[cfg(feature = "_dma_v2")] + pub async fn write_dma(&mut self, ch: &mut impl crate::dma::Channel, buffer: &[u8]) -> Result<(), Error> { let ch_func = 4; // USART3_TX let r = self.inner.regs(); @@ -114,7 +114,7 @@ impl<'d, T: Instance> Uart<'d, T> { let dst = r.dr().ptr() as *mut u8; - transfer_m2p(ch, ch_func, buffer, dst).await; + crate::dma::transfer_m2p(ch, ch_func, buffer, dst).await; } Ok(()) diff --git a/embassy-stm32/src/usart/v2.rs b/embassy-stm32/src/usart/v2.rs new file mode 100644 index 00000000..e69de29b diff --git a/embassy-stm32/stm32-data b/embassy-stm32/stm32-data index d10b30df..67db3905 160000 --- a/embassy-stm32/stm32-data +++ b/embassy-stm32/stm32-data @@ -1 +1 @@ -Subproject commit d10b30df80a4612ec2faaa0a7161b6a9dd731bf2 +Subproject commit 67db3905b34f062c55ceff09b1beac8444b78cab