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RP-PICO UART adding set_baudrate: missing to run rust-fmt

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Andres Hurtado Lopez 2023-02-26 21:23:51 -05:00
parent 482ba835c4
commit 2331d58aa6
1 changed files with 10 additions and 14 deletions
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14
embassy-rp/src/uart/mod.rs
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@ -350,7 +350,7 @@ impl<'d, T: Instance + 'd, M: Mode> Uart<'d, T, M> {
pin.pad_ctrl().write(|w| w.set_ie(true)); pin.pad_ctrl().write(|w| w.set_ie(true));
} }
Self::set_baudrate_inner(config.baudrate); Self::set_baudrate_inner(config.baudrate);
let (pen, eps) = match config.parity { let (pen, eps) = match config.parity {
Parity::ParityNone => (false, false), Parity::ParityNone => (false, false),
@ -385,15 +385,13 @@ impl<'d, T: Instance + 'd, M: Mode> Uart<'d, T, M> {
} }
} }
/// sets baudrate on runtime /// sets baudrate on runtime
pub fn set_baudrate(&mut self, baudrate: u32) { pub fn set_baudrate(&mut self, baudrate: u32) {
Self::set_baudrate_inner(baudrate); Self::set_baudrate_inner(baudrate);
} }
fn set_baudrate_inner(baudrate: u32) { fn set_baudrate_inner(baudrate: u32) {
let r = T::regs(); let r = T::regs();
let clk_base = crate::clocks::clk_peri_freq(); let clk_base = crate::clocks::clk_peri_freq();
@ -410,13 +408,11 @@ impl<'d, T: Instance + 'd, M: Mode> Uart<'d, T, M> {
} }
unsafe { unsafe {
// Load PL011's baud divisor registers
// Load PL011's baud divisor registers
r.uartibrd().write_value(pac::uart::regs::Uartibrd(baud_ibrd)); r.uartibrd().write_value(pac::uart::regs::Uartibrd(baud_ibrd));
r.uartfbrd().write_value(pac::uart::regs::Uartfbrd(baud_fbrd)); r.uartfbrd().write_value(pac::uart::regs::Uartfbrd(baud_fbrd));
} }
} }
} }
impl<'d, T: Instance, M: Mode> Uart<'d, T, M> { impl<'d, T: Instance, M: Mode> Uart<'d, T, M> {