From 24f18819c879488e2a33f3c9ebbf24979b3e9612 Mon Sep 17 00:00:00 2001 From: Bob McWhirter Date: Tue, 29 Jun 2021 11:00:23 -0400 Subject: [PATCH] Adjust example for RCC and DMA. --- examples/stm32f4/src/bin/usart_dma.rs | 4 ++-- stm32-metapac/gen/src/lib.rs | 6 +++--- 2 files changed, 5 insertions(+), 5 deletions(-) diff --git a/examples/stm32f4/src/bin/usart_dma.rs b/examples/stm32f4/src/bin/usart_dma.rs index fae05b60..66ca6242 100644 --- a/examples/stm32f4/src/bin/usart_dma.rs +++ b/examples/stm32f4/src/bin/usart_dma.rs @@ -23,14 +23,14 @@ async fn main_task() { let mut p = embassy_stm32::init(Default::default()); let config = Config::default(); - let mut usart = Uart::new(p.USART3, p.PD9, p.PD8, config, 16_000_000); + let mut usart = Uart::new(p.USART3, p.PD9, p.PD8, config); for n in 0u32.. { let mut s: String<128> = String::new(); core::write!(&mut s, "Hello DMA World {}!\r\n", n).unwrap(); usart - .write_dma(&mut p.DMA1_CH3, s.as_bytes()) + .write_dma(&mut p.DMA1_3, s.as_bytes()) .await .unwrap(); info!("wrote DMA"); diff --git a/stm32-metapac/gen/src/lib.rs b/stm32-metapac/gen/src/lib.rs index 00e122e9..1f969b3c 100644 --- a/stm32-metapac/gen/src/lib.rs +++ b/stm32-metapac/gen/src/lib.rs @@ -431,13 +431,13 @@ pub fn gen(options: Options) { ]); } (None, Some(_)) => { - println!("Unable to find enable register for {}", name) + panic!("Unable to find enable register for {}", name) } (Some(_), None) => { - println!("Unable to find reset register for {}", name) + panic!("Unable to find reset register for {}", name) } (None, None) => { - println!("Unable to find enable and reset register for {}", name) + panic!("Unable to find enable and reset register for {}", name) } } }