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Adjust pin-names to FooPin.

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Move common bits up to spi/mod.rs.
Isolate the RNG interrupt in a sub-module to avoid conflict with the const.
This commit is contained in:
Bob McWhirter
2021-05-14 10:11:43 -04:00
parent 9e93a0999f
commit 2569d38ab4
201 changed files with 14694 additions and 14765 deletions
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6
embassy-stm32/gen.py
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@ -124,11 +124,11 @@ for chip in chips.values():
for pin, funcs in af.items():
if pin in pins:
if func := funcs.get(f'{name}_SCK'):
f.write(f'impl_spi_pin!({name}, Sck, {pin}, {func});')
f.write(f'impl_spi_pin!({name}, SckPin, {pin}, {func});')
if func := funcs.get(f'{name}_MOSI'):
f.write(f'impl_spi_pin!({name}, Mosi, {pin}, {func});')
f.write(f'impl_spi_pin!({name}, MosiPin, {pin}, {func});')
if func := funcs.get(f'{name}_MISO'):
f.write(f'impl_spi_pin!({name}, Miso, {pin}, {func});')
f.write(f'impl_spi_pin!({name}, MisoPin, {pin}, {func});')
if block_mod == 'gpio':
custom_singletons = True