H7 RCC: Fix off by one error
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@ -83,7 +83,6 @@ impl<'d> Rcc<'d> {
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}
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}
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// TODO: FLASH and PWR
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/// Freeze the core clocks, returning a Core Clocks Distribution
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/// and Reset (CCDR) structure. The actual frequency of the clocks
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/// configured is returned in the `clocks` member of the CCDR
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@ -419,7 +418,7 @@ impl<'d> Rcc<'d> {
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_ => (0b111, 16),
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};
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let real_pclk = hclk / u32::from(ppre);
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assert!(real_pclk < max_pclk);
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assert!(real_pclk <= max_pclk);
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let tim_ker_clk = if let Some(tim_pre) = tim_pre {
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let clk = match (bits, tim_pre) {
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