Add blocking shared bus for i2c and SPI
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69
embassy-embedded-hal/src/shared_bus/blocking/i2c.rs
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69
embassy-embedded-hal/src/shared_bus/blocking/i2c.rs
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//! Blocking shared I2C bus
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use core::cell::RefCell;
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use core::fmt::Debug;
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use core::future::Future;
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use embedded_hal_1::i2c;
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#[derive(Copy, Clone, Eq, PartialEq, Debug)]
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pub enum I2cBusDeviceError<BUS> {
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I2c(BUS),
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}
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impl<BUS> i2c::Error for I2cBusDeviceError<BUS>
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where
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BUS: i2c::Error + Debug,
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{
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fn kind(&self) -> i2c::ErrorKind {
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match self {
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Self::I2c(e) => e.kind(),
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}
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}
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}
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pub struct I2cBusDevice<'a, BUS> {
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bus: &'a RefCell<BUS>,
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}
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impl<'a, BUS> I2cBusDevice<'a, BUS> {
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pub fn new(bus: &'a RefCell<BUS>) -> Self {
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Self { bus }
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}
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}
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impl<'a, BUS> i2c::ErrorType for I2cBusDevice<'a, BUS>
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where
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BUS: i2c::ErrorType,
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{
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type Error = I2cBusDeviceError<BUS::Error>;
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}
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impl<M, BUS> i2c::I2c for I2cBusDevice<'_, BUS>
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where
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BUS: i2c::I2c,
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{
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fn read(&mut self, address: u8, buffer: &mut [u8]) -> Result<(), Self::Error> {
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let mut bus = self.bus.borrow_mut();
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bus.read(address, buffer).map_err(I2cBusDeviceError::I2c)?;
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Ok(())
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}
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fn write(&mut self, address: u8, bytes: &[u8]) -> Result<(), Self::Error> {
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let mut bus = self.bus.borrow_mut();
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bus.write(address, bytes).map_err(I2cBusDeviceError::I2c)?;
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Ok(())
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}
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fn write_read(&mut self, address: u8, wr_buffer: &[u8], rd_buffer: &mut [u8]) -> Result<(), Self::Error> {
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let mut bus = self.bus.borrow_mut();
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bus.write_read(address, wr_buffer, rd_buffer)
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.map_err(I2cBusDeviceError::I2c)?;
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Ok(())
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}
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fn transaction<'a>(&mut self, address: u8, operations: &mut [i2c::Operation<'a>]) -> Result<(), Self::Error> {
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let _ = address;
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let _ = operations;
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todo!()
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}
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}
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