rp: DMA behaviour during FLASH operations

This commit is contained in:
kalkyl 2023-04-27 16:48:25 +02:00
parent 0dea7b02d6
commit 278818395e

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@ -174,25 +174,17 @@ impl<'d, T: Instance, const FLASH_SIZE: usize> Flash<'d, T, FLASH_SIZE> {
crate::multicore::pause_core1(); crate::multicore::pause_core1();
critical_section::with(|_| { critical_section::with(|_| {
// Pause all DMA channels for the duration of the ram operation // Wait for all DMA channels in flash to finish before ram operation
for (number, status) in dma_status.iter_mut().enumerate() { const SRAM_LOWER: u32 = 0x2000_0000;
let ch = crate::pac::DMA.ch(number as _); for n in 0..crate::dma::CHANNEL_COUNT {
*status = ch.ctrl_trig().read().en(); let ch = crate::pac::DMA.ch(n);
if *status { if ch.read_addr().read() < SRAM_LOWER {
ch.ctrl_trig().modify(|w| w.set_en(false)); while ch.ctrl_trig().read().busy() {}
} }
} }
// Run our flash operation in RAM // Run our flash operation in RAM
operation(); operation();
// Re-enable previously enabled DMA channels
for (number, status) in dma_status.iter().enumerate() {
let ch = crate::pac::DMA.ch(number as _);
if *status {
ch.ctrl_trig().modify(|w| w.set_en(true));
}
}
}); });
// Resume CORE1 execution // Resume CORE1 execution