stm32: add stm32c0 support.

This commit is contained in:
Dario Nieuwenhuis
2023-01-17 18:54:23 +01:00
parent aea5a0fd96
commit 2a349afea7
10 changed files with 277 additions and 29 deletions

View File

@ -25,11 +25,11 @@ fn cpu_regs() -> pac::exti::Exti {
EXTI
}
#[cfg(not(any(exti_g0, exti_l5, gpio_v1, exti_u5)))]
#[cfg(not(any(exti_c0, exti_g0, exti_l5, gpio_v1, exti_u5)))]
fn exticr_regs() -> pac::syscfg::Syscfg {
pac::SYSCFG
}
#[cfg(any(exti_g0, exti_l5, exti_u5))]
#[cfg(any(exti_c0, exti_g0, exti_l5, exti_u5))]
fn exticr_regs() -> pac::exti::Exti {
EXTI
}
@ -39,9 +39,9 @@ fn exticr_regs() -> pac::afio::Afio {
}
pub unsafe fn on_irq() {
#[cfg(not(any(exti_g0, exti_l5, exti_u5)))]
#[cfg(not(any(exti_c0, exti_g0, exti_l5, exti_u5)))]
let bits = EXTI.pr(0).read().0;
#[cfg(any(exti_g0, exti_l5, exti_u5))]
#[cfg(any(exti_c0, exti_g0, exti_l5, exti_u5))]
let bits = EXTI.rpr(0).read().0 | EXTI.fpr(0).read().0;
// Mask all the channels that fired.
@ -53,9 +53,9 @@ pub unsafe fn on_irq() {
}
// Clear pending
#[cfg(not(any(exti_g0, exti_l5, exti_u5)))]
#[cfg(not(any(exti_c0, exti_g0, exti_l5, exti_u5)))]
EXTI.pr(0).write_value(Lines(bits));
#[cfg(any(exti_g0, exti_l5, exti_u5))]
#[cfg(any(exti_c0, exti_g0, exti_l5, exti_u5))]
{
EXTI.rpr(0).write_value(Lines(bits));
EXTI.fpr(0).write_value(Lines(bits));
@ -212,9 +212,9 @@ impl<'a> ExtiInputFuture<'a> {
EXTI.ftsr(0).modify(|w| w.set_line(pin, falling));
// clear pending bit
#[cfg(not(any(exti_g0, exti_l5, exti_u5)))]
#[cfg(not(any(exti_c0, exti_g0, exti_l5, exti_u5)))]
EXTI.pr(0).write(|w| w.set_line(pin, true));
#[cfg(any(exti_g0, exti_l5, exti_u5))]
#[cfg(any(exti_c0, exti_g0, exti_l5, exti_u5))]
{
EXTI.rpr(0).write(|w| w.set_line(pin, true));
EXTI.fpr(0).write(|w| w.set_line(pin, true));