nrf/spim: make mosi,miso optional
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5646926cca
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2c248dab56
@ -9,7 +9,8 @@ use embassy_extras::unborrow;
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use futures::future::poll_fn;
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use traits::spi::FullDuplex;
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use crate::gpio::Pin as GpioPin;
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use crate::gpio::sealed::Pin as _;
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use crate::gpio::{OptionalPin, Pin as GpioPin};
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use crate::interrupt::{self, Interrupt};
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use crate::{pac, peripherals, slice_in_ram_or};
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@ -43,8 +44,8 @@ impl<'d, T: Instance> Spim<'d, T> {
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spim: impl PeripheralBorrow<Target = T> + 'd,
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irq: impl PeripheralBorrow<Target = T::Interrupt> + 'd,
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sck: impl PeripheralBorrow<Target = impl GpioPin> + 'd,
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miso: impl PeripheralBorrow<Target = impl GpioPin> + 'd,
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mosi: impl PeripheralBorrow<Target = impl GpioPin> + 'd,
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miso: impl PeripheralBorrow<Target = impl OptionalPin> + 'd,
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mosi: impl PeripheralBorrow<Target = impl OptionalPin> + 'd,
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config: Config,
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) -> Self {
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unborrow!(spim, irq, sck, miso, mosi);
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@ -53,21 +54,30 @@ impl<'d, T: Instance> Spim<'d, T> {
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// Configure pins
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sck.conf().write(|w| w.dir().output().drive().h0h1());
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mosi.conf().write(|w| w.dir().output().drive().h0h1());
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miso.conf().write(|w| w.input().connect().drive().h0h1());
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if let Some(mosi) = mosi.pin_mut() {
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mosi.conf().write(|w| w.dir().output().drive().h0h1());
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}
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if let Some(miso) = miso.pin_mut() {
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miso.conf().write(|w| w.input().connect().drive().h0h1());
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}
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match config.mode.polarity {
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Polarity::IdleHigh => {
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sck.set_high();
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mosi.set_high();
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if let Some(mosi) = mosi.pin_mut() {
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mosi.set_high();
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}
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}
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Polarity::IdleLow => {
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sck.set_low();
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mosi.set_low();
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if let Some(mosi) = mosi.pin_mut() {
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mosi.set_low();
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}
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}
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}
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// Select pins.
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// Note: OptionalPin reports 'disabled' for psel_bits when no pin was selected.
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r.psel.sck.write(|w| unsafe { w.bits(sck.psel_bits()) });
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r.psel.mosi.write(|w| unsafe { w.bits(mosi.psel_bits()) });
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r.psel.miso.write(|w| unsafe { w.bits(miso.psel_bits()) });
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