stm32: move dbgmcu stuff to toplevel config setting, defaulting to true.

This commit is contained in:
Dario Nieuwenhuis
2021-08-19 23:32:22 +02:00
parent 446d6c275c
commit 2c992f7010
46 changed files with 26 additions and 233 deletions

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@ -68,12 +68,14 @@ pub use generated::{peripherals, Peripherals};
#[non_exhaustive]
pub struct Config {
pub rcc: rcc::Config,
pub enable_debug_during_sleep: bool,
}
impl Default for Config {
fn default() -> Self {
Self {
rcc: Default::default(),
enable_debug_during_sleep: true,
}
}
}
@ -83,6 +85,10 @@ pub fn init(config: Config) -> Peripherals {
let p = Peripherals::take();
unsafe {
if config.enable_debug_during_sleep {
dbgmcu::Dbgmcu::enable_all();
}
gpio::init();
dma::init();
#[cfg(exti)]

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@ -2,7 +2,6 @@ use core::marker::PhantomData;
use embassy::util::Unborrow;
use crate::dbgmcu::Dbgmcu;
use crate::pac::{FLASH, RCC};
use crate::peripherals;
use crate::time::Hertz;
@ -27,7 +26,6 @@ pub struct Config {
pub sys_ck: Option<Hertz>,
pub hclk: Option<Hertz>,
pub pclk: Option<Hertz>,
pub enable_debug_wfe: bool,
}
pub struct Rcc<'d> {
@ -190,12 +188,6 @@ impl<'d> Rcc<'d> {
}
})
}
if self.config.enable_debug_wfe {
RCC.ahbenr().modify(|w| w.set_dmaen(true));
critical_section::with(|_| Dbgmcu::enable_all());
}
}
Clocks {

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@ -21,7 +21,6 @@ pub struct Config {
pub hclk: Option<Hertz>,
pub pclk1: Option<Hertz>,
pub pclk2: Option<Hertz>,
pub enable_debug_wfe: bool,
}
/// RCC peripheral
@ -176,15 +175,6 @@ impl<'d> Rcc<'d> {
});
}
if self.config.enable_debug_wfe {
unsafe {
RCC.ahb1enr().modify(|w| w.set_dma1en(true));
critical_section::with(|_| {
crate::dbgmcu::Dbgmcu::enable_all();
});
}
}
Clocks {
sys: Hertz(sysclk),
apb1: Hertz(pclk1),

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@ -3,7 +3,7 @@ use core::marker::PhantomData;
use embassy::util::Unborrow;
use crate::pac::rcc::vals::Timpre;
use crate::pac::{DBGMCU, RCC, SYSCFG};
use crate::pac::{RCC, SYSCFG};
use crate::peripherals;
use crate::pwr::{Power, VoltageScale};
use crate::rcc::{set_freqs, Clocks};
@ -363,25 +363,6 @@ impl<'d> Rcc<'d> {
}
}
/// Enables debugging during WFI/WFE
///
/// Set `enable_dma1` to true if you do not have at least one bus master (other than the CPU)
/// enable during WFI/WFE
pub fn enable_debug_wfe(&mut self, _dbg: &mut peripherals::DBGMCU, enable_dma1: bool) {
// NOTE(unsafe) We have exclusive access to the RCC and DBGMCU
unsafe {
if enable_dma1 {
RCC.ahb1enr().modify(|w| w.set_dma1en(true));
}
DBGMCU.cr().modify(|w| {
w.set_dbgsleep_d1(true);
w.set_dbgstby_d1(true);
w.set_dbgstop_d1(true);
});
}
}
/// Setup traceclk
/// Returns a pll1_r_ck
fn traceclk_setup(&mut self, sys_use_pll1_p: bool) {

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@ -1,5 +1,4 @@
pub use super::types::*;
use crate::dbgmcu::Dbgmcu;
use crate::pac;
use crate::peripherals::{self, CRS, RCC, SYSCFG};
use crate::rcc::{get_freqs, set_freqs, Clocks};
@ -168,15 +167,6 @@ impl<'d> Rcc<'d> {
unsafe { get_freqs() }
}
pub fn enable_debug_wfe(&mut self, _dbg: &mut peripherals::DBGMCU, enable_dma: bool) {
// NOTE(unsafe) We have exclusive access to the RCC and DBGMCU
unsafe {
pac::RCC.ahbenr().modify(|w| w.set_dma1en(enable_dma));
Dbgmcu::enable_all();
}
}
pub fn enable_hsi48(&mut self, _syscfg: &mut SYSCFG, _crs: CRS) -> HSI48 {
let rcc = pac::RCC;
unsafe {