Refactor: Impl From for SampleTime and Resolution

This commit is contained in:
Grant Miller 2022-10-26 02:28:39 -05:00
parent 7b38b95e10
commit 2cfe2439c9
7 changed files with 30 additions and 39 deletions

View File

@ -146,14 +146,11 @@ impl<'d, T: Instance> Adc<'d, T> {
}
unsafe fn set_channel_sample_time(ch: u8, sample_time: SampleTime) {
let sample_time = sample_time.into();
if ch <= 9 {
T::regs()
.smpr2()
.modify(|reg| reg.set_smp(ch as _, sample_time.sample_time()));
T::regs().smpr2().modify(|reg| reg.set_smp(ch as _, sample_time));
} else {
T::regs()
.smpr1()
.modify(|reg| reg.set_smp((ch - 10) as _, sample_time.sample_time()));
T::regs().smpr1().modify(|reg| reg.set_smp((ch - 10) as _, sample_time));
}
}
}

View File

@ -8,11 +8,10 @@
#[cfg_attr(adc_v1, path = "v1.rs")]
mod _version;
#[cfg(not(adc_v1))]
mod sample_time;
#[cfg(not(any(adc_f1, adc_v1)))]
mod resolution;
#[cfg(not(adc_v1))]
mod sample_time;
#[allow(unused)]
pub use _version::*;

View File

@ -1,4 +1,5 @@
#[cfg(any(adc_v2, adc_v3, adc_g0))]
#[derive(Clone, Copy, Debug, Eq, PartialEq)]
pub enum Resolution {
TwelveBit,
TenBit,
@ -7,6 +8,7 @@ pub enum Resolution {
}
#[cfg(adc_v4)]
#[derive(Clone, Copy, Debug, Eq, PartialEq)]
pub enum Resolution {
SixteenBit,
FourteenBit,
@ -28,9 +30,9 @@ impl Default for Resolution {
}
}
impl Resolution {
pub(super) fn res(&self) -> crate::pac::adc::vals::Res {
match self {
impl From<Resolution> for crate::pac::adc::vals::Res {
fn from(res: Resolution) -> crate::pac::adc::vals::Res {
match res {
#[cfg(adc_v4)]
Resolution::SixteenBit => crate::pac::adc::vals::Res::SIXTEENBIT,
#[cfg(adc_v4)]
@ -42,7 +44,9 @@ impl Resolution {
Resolution::SixBit => crate::pac::adc::vals::Res::SIXBIT,
}
}
}
impl Resolution {
pub fn to_max_count(&self) -> u32 {
match self {
#[cfg(adc_v4)]

View File

@ -9,10 +9,10 @@ macro_rules! impl_sample_time {
)*
}
impl SampleTime {
pub(crate) fn sample_time(&self) -> $pac {
match self {
$(Self::$variant => <$pac>::$pac_variant),*
impl From<SampleTime> for $pac {
fn from(sample_time: SampleTime) -> $pac {
match sample_time {
$(SampleTime::$variant => <$pac>::$pac_variant),*
}
}
}

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@ -214,7 +214,7 @@ where
unsafe fn read_channel(&mut self, channel: u8) -> u16 {
// Configure ADC
T::regs().cr1().modify(|reg| reg.set_res(self.resolution.res()));
T::regs().cr1().modify(|reg| reg.set_res(self.resolution.into()));
// Select channel
T::regs().sqr3().write(|reg| reg.set_sq(0, channel));
@ -228,14 +228,11 @@ where
}
unsafe fn set_channel_sample_time(ch: u8, sample_time: SampleTime) {
let sample_time = sample_time.into();
if ch <= 9 {
T::regs()
.smpr2()
.modify(|reg| reg.set_smp(ch as _, sample_time.sample_time()));
T::regs().smpr2().modify(|reg| reg.set_smp(ch as _, sample_time));
} else {
T::regs()
.smpr1()
.modify(|reg| reg.set_smp((ch - 10) as _, sample_time.sample_time()));
T::regs().smpr1().modify(|reg| reg.set_smp((ch - 10) as _, sample_time));
}
}
}

View File

@ -199,9 +199,9 @@ impl<'d, T: Instance> Adc<'d, T> {
// Configure ADC
#[cfg(not(stm32g0))]
T::regs().cfgr().modify(|reg| reg.set_res(self.resolution.res()));
T::regs().cfgr().modify(|reg| reg.set_res(self.resolution.into()));
#[cfg(stm32g0)]
T::regs().cfgr1().modify(|reg| reg.set_res(self.resolution.res()));
T::regs().cfgr1().modify(|reg| reg.set_res(self.resolution.into()));
// Configure channel
Self::set_channel_sample_time(pin.channel(), self.sample_time);
@ -231,19 +231,16 @@ impl<'d, T: Instance> Adc<'d, T> {
#[cfg(stm32g0)]
unsafe fn set_channel_sample_time(_ch: u8, sample_time: SampleTime) {
T::regs().smpr().modify(|reg| reg.set_smp1(sample_time.sample_time()));
T::regs().smpr().modify(|reg| reg.set_smp1(sample_time.into()));
}
#[cfg(not(stm32g0))]
unsafe fn set_channel_sample_time(ch: u8, sample_time: SampleTime) {
let sample_time = sample_time.into();
if ch <= 9 {
T::regs()
.smpr1()
.modify(|reg| reg.set_smp(ch as _, sample_time.sample_time()));
T::regs().smpr1().modify(|reg| reg.set_smp(ch as _, sample_time));
} else {
T::regs()
.smpr2()
.modify(|reg| reg.set_smp((ch - 10) as _, sample_time.sample_time()));
T::regs().smpr2().modify(|reg| reg.set_smp((ch - 10) as _, sample_time));
}
}
}

View File

@ -409,7 +409,7 @@ impl<'d, T: Instance + crate::rcc::RccPeripheral> Adc<'d, T> {
unsafe fn read_channel(&mut self, channel: u8) -> u16 {
// Configure ADC
T::regs().cfgr().modify(|reg| reg.set_res(self.resolution.res()));
T::regs().cfgr().modify(|reg| reg.set_res(self.resolution.into()));
// Configure channel
Self::set_channel_sample_time(channel, self.sample_time);
@ -427,14 +427,11 @@ impl<'d, T: Instance + crate::rcc::RccPeripheral> Adc<'d, T> {
}
unsafe fn set_channel_sample_time(ch: u8, sample_time: SampleTime) {
let sample_time = sample_time.into();
if ch <= 9 {
T::regs()
.smpr(0)
.modify(|reg| reg.set_smp(ch as _, sample_time.sample_time()));
T::regs().smpr(0).modify(|reg| reg.set_smp(ch as _, sample_time));
} else {
T::regs()
.smpr(1)
.modify(|reg| reg.set_smp((ch - 10) as _, sample_time.sample_time()));
T::regs().smpr(1).modify(|reg| reg.set_smp((ch - 10) as _, sample_time));
}
}
}