rp/clocks: always reconfigure pll
this is only really useful for runtime *re*configuration, which we don't currently support. even runtime reconfig probably won't need it, unless we keep taking the sledgehammer approach of reconfiguring everything all the time.
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@ -587,18 +587,6 @@ unsafe fn configure_pll(p: pac::pll::Pll, input_freq: u32, config: PllConfig) {
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assert!(config.post_div2 <= config.post_div1);
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assert!(config.post_div2 <= config.post_div1);
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assert!(ref_freq <= (config.vco_freq / 16));
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assert!(ref_freq <= (config.vco_freq / 16));
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// do not disrupt PLL that is already correctly configured and operating
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let cs = p.cs().read();
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let prim = p.prim().read();
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if cs.lock()
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&& cs.refdiv() == config.refdiv as u8
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&& p.fbdiv_int().read().fbdiv_int() == fbdiv as u16
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&& prim.postdiv1() == config.post_div1
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&& prim.postdiv2() == config.post_div2
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{
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return;
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}
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// Reset it
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// Reset it
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let mut peris = reset::Peripherals(0);
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let mut peris = reset::Peripherals(0);
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match p {
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match p {
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