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Merge #1054

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1054: riscv fixes r=lulf a=swolix

With these changes I can run embassy on our RISC-V processor, please consider merging this, feedback is very welcome.

I don't fully understand the code in the executor, but I have implemented a critical section by globally disabling interrupts, which means the wfi inside the critical section will hang the whole thing.

Co-authored-by: Sijmen Woutersen <sijmen.woutersen@gmail.com>
This commit is contained in:
bors[bot]
2022-11-23 09:24:11 +00:00
committed by GitHub
parent 83b199a874 4943dec1a7
commit 2fa2c1a6fe
4 changed files with 20 additions and 15 deletions
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1
embassy-executor/Cargo.toml
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@ -31,6 +31,7 @@ flavors = [
default = []
std = ["embassy-macros/std", "critical-section/std"]
wasm = ["dep:wasm-bindgen", "dep:js-sys", "embassy-macros/wasm"]
riscv = ["embassy-macros/riscv"]
# Enable nightly-only features
nightly = []

18
embassy-executor/src/arch/riscv32.rs
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@ -55,19 +55,11 @@ impl Executor {
unsafe {
self.inner.poll();
// we do not care about race conditions between the load and store operations, interrupts
//will only set this value to true.
critical_section::with(|_| {
// if there is work to do, loop back to polling
// TODO can we relax this?
if SIGNAL_WORK_THREAD_MODE.load(Ordering::SeqCst) {
SIGNAL_WORK_THREAD_MODE.store(false, Ordering::SeqCst);
}
// if not, wait for interrupt
else {
core::arch::asm!("wfi");
}
});
// if an interrupt occurred while waiting, it will be serviced here
// will only set this value to true.
// if there is work to do, loop back to polling
if !SIGNAL_WORK_THREAD_MODE.fetch_and(false, Ordering::SeqCst) {
core::arch::asm!("wfi");
}
}
}
}