stm32/hrtim: move traits out of macro def'n
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20ea76c19c
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322a4a8401
@ -78,12 +78,76 @@ pub(crate) mod sealed {
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pub trait Instance: RccPeripheral {
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pub trait Instance: RccPeripheral {
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fn regs() -> crate::pac::hrtim::Hrtim;
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fn regs() -> crate::pac::hrtim::Hrtim;
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fn set_master_frequency(frequency: Hertz);
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fn set_master_frequency(frequency: Hertz) {
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let f = frequency.0;
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#[cfg(not(stm32f334))]
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let timer_f = Self::frequency().0;
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#[cfg(stm32f334)]
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let timer_f = unsafe { crate::rcc::get_freqs() }.hrtim.unwrap_or(Self::frequency()).0;
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fn set_channel_frequency(channnel: usize, frequency: Hertz);
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let psc_min = (timer_f / f) / (u16::MAX as u32 / 32);
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let psc = if Self::regs().isr().read().dllrdy() {
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Prescaler::compute_min_high_res(psc_min)
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} else {
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Prescaler::compute_min_low_res(psc_min)
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};
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let timer_f = 32 * (timer_f / psc as u32);
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let per: u16 = (timer_f / f) as u16;
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let regs = Self::regs();
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regs.mcr().modify(|w| w.set_ckpsc(psc.into()));
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regs.mper().modify(|w| w.set_mper(per));
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}
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fn set_channel_frequency(channel: usize, frequency: Hertz) {
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let f = frequency.0;
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#[cfg(not(stm32f334))]
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let timer_f = Self::frequency().0;
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#[cfg(stm32f334)]
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let timer_f = unsafe { crate::rcc::get_freqs() }.hrtim.unwrap_or(Self::frequency()).0;
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let psc_min = (timer_f / f) / (u16::MAX as u32 / 32);
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let psc = if Self::regs().isr().read().dllrdy() {
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Prescaler::compute_min_high_res(psc_min)
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} else {
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Prescaler::compute_min_low_res(psc_min)
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};
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let timer_f = 32 * (timer_f / psc as u32);
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let per: u16 = (timer_f / f) as u16;
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let regs = Self::regs();
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regs.tim(channel).cr().modify(|w| w.set_ckpsc(psc.into()));
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regs.tim(channel).per().modify(|w| w.set_per(per));
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}
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/// Set the dead time as a proportion of max_duty
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/// Set the dead time as a proportion of max_duty
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fn set_channel_dead_time(channnel: usize, dead_time: u16);
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fn set_channel_dead_time(channel: usize, dead_time: u16) {
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let regs = Self::regs();
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let channel_psc: Prescaler = regs.tim(channel).cr().read().ckpsc().into();
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// The dead-time base clock runs 4 times slower than the hrtim base clock
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// u9::MAX = 511
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let psc_min = (channel_psc as u32 * dead_time as u32) / (4 * 511);
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let psc = if Self::regs().isr().read().dllrdy() {
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Prescaler::compute_min_high_res(psc_min)
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} else {
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Prescaler::compute_min_low_res(psc_min)
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};
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let dt_val = (psc as u32 * dead_time as u32) / (4 * channel_psc as u32);
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regs.tim(channel).dt().modify(|w| {
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w.set_dtprsc(psc.into());
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w.set_dtf(dt_val as u16);
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w.set_dtr(dt_val as u16);
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});
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}
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// fn enable_outputs(enable: bool);
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// fn enable_outputs(enable: bool);
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//
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//
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@ -99,84 +163,6 @@ foreach_interrupt! {
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fn regs() -> crate::pac::hrtim::Hrtim {
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fn regs() -> crate::pac::hrtim::Hrtim {
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crate::pac::$inst
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crate::pac::$inst
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}
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}
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fn set_master_frequency(frequency: Hertz) {
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use crate::rcc::sealed::RccPeripheral;
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let f = frequency.0;
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#[cfg(not(stm32f334))]
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let timer_f = Self::frequency().0;
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#[cfg(stm32f334)]
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let timer_f = unsafe { crate::rcc::get_freqs() }.hrtim.unwrap_or(
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Self::frequency()
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).0;
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let psc_min = (timer_f / f) / (u16::MAX as u32 / 32);
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let psc = if Self::regs().isr().read().dllrdy() {
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Prescaler::compute_min_high_res(psc_min)
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} else {
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Prescaler::compute_min_low_res(psc_min)
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};
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let timer_f = 32 * (timer_f / psc as u32);
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let per: u16 = (timer_f / f) as u16;
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let regs = Self::regs();
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regs.mcr().modify(|w| w.set_ckpsc(psc.into()));
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regs.mper().modify(|w| w.set_mper(per));
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}
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fn set_channel_frequency(channel: usize, frequency: Hertz) {
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use crate::rcc::sealed::RccPeripheral;
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let f = frequency.0;
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#[cfg(not(stm32f334))]
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let timer_f = Self::frequency().0;
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#[cfg(stm32f334)]
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let timer_f = unsafe { crate::rcc::get_freqs() }.hrtim.unwrap_or(
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Self::frequency()
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).0;
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let psc_min = (timer_f / f) / (u16::MAX as u32 / 32);
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let psc = if Self::regs().isr().read().dllrdy() {
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Prescaler::compute_min_high_res(psc_min)
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} else {
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Prescaler::compute_min_low_res(psc_min)
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};
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let timer_f = 32 * (timer_f / psc as u32);
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let per: u16 = (timer_f / f) as u16;
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let regs = Self::regs();
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regs.tim(channel).cr().modify(|w| w.set_ckpsc(psc.into()));
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regs.tim(channel).per().modify(|w| w.set_per(per));
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}
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fn set_channel_dead_time(channel: usize, dead_time: u16) {
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let regs = Self::regs();
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let channel_psc: Prescaler = regs.tim(channel).cr().read().ckpsc().into();
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// The dead-time base clock runs 4 times slower than the hrtim base clock
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// u9::MAX = 511
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let psc_min = (channel_psc as u32 * dead_time as u32) / (4 * 511);
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let psc = if Self::regs().isr().read().dllrdy() {
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Prescaler::compute_min_high_res(psc_min)
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} else {
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Prescaler::compute_min_low_res(psc_min)
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};
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let dt_val = (psc as u32 * dead_time as u32) / (4 * channel_psc as u32);
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regs.tim(channel).dt().modify(|w| {
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w.set_dtprsc(psc.into());
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w.set_dtf(dt_val as u16);
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w.set_dtr(dt_val as u16);
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});
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}
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}
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}
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impl Instance for crate::peripherals::$inst {
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impl Instance for crate::peripherals::$inst {
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