partial alternate function configuration on STM32f1
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@ -350,12 +350,15 @@ impl<'d, T: Pin> InputPin for OutputOpenDrain<'d, T> {
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pub(crate) mod sealed {
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use super::*;
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/// Output type settings
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/// Alternate function type settings
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#[derive(Debug)]
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#[cfg_attr(feature = "defmt", derive(defmt::Format))]
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pub enum OutputType {
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PushPull,
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OpenDrain,
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pub enum AFType {
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// InputFloating,
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// InputPullUp,
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// InputPullDown,
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OutputPushPull,
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OutputOpenDrain,
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}
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pub trait Pin {
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@ -394,21 +397,35 @@ pub(crate) mod sealed {
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}
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#[cfg(gpio_v1)]
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unsafe fn set_as_af(&self, _af_num: u8, _af_type: OutputType) {
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panic!("F1 alternate GPIO functions not supported yet!");
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unsafe fn set_as_af(&self, _af_num: u8, af_type: AFType) {
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// F1 uses the AFIO register for remapping.
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// For now, this is not implemented, so af_num is ignored
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// _af_num should be zero here, since it is not set by stm32-data
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let r = pin.block();
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let n = pin.pin() as usize;
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let crlh = if n < 8 { 0 } else { 1 };
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match af_type {
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// TODO: Do we need to configure input AF pins differently?
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AfType::OutputPushPull => {
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r.cr(crlh).modify(|w| w.set_cnf(n % 8, vals::Cnf::PUSHPULL));
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}
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AfType::OutputOpenDrain => r
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.cr(crlh)
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.modify(|w| w.set_cnf(n % 8, vals::Cnf::OPENDRAIN)),
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}
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}
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#[cfg(gpio_v2)]
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unsafe fn set_as_af(&self, af_num: u8, af_type: OutputType) {
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unsafe fn set_as_af(&self, af_num: u8, af_type: AFType) {
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let pin = self._pin() as usize;
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let block = self.block();
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block
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.afr(pin / 8)
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.modify(|w| w.set_afr(pin % 8, vals::Afr(af_num)));
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match af_type {
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OutputType::PushPull => {
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AfType::OutputPushPull => {
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block.otyper().modify(|w| w.set_ot(pin, vals::Ot::PUSHPULL))
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}
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OutputType::OpenDrain => block
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AfType::OutputOpenDrain => block
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.otyper()
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.modify(|w| w.set_ot(pin, vals::Ot::OPENDRAIN)),
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}
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