Merge #705

705: Add stm32wlexx support r=Dirbaio a=Dirbaio

RCC is actually identical, other than removing multicore-related regs.

bors r+

Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>

ci.sh

@@ -57,6 +57,7 @@ cargo batch  \
     --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7m-none-eabi --features nightly,stm32f217zg,defmt,exti,time-driver-any,unstable-traits \
     --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv8m.main-none-eabihf --features nightly,stm32l552ze,defmt,exti,time-driver-any,unstable-traits \
     --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv6m-none-eabi --features nightly,stm32wl54jc-cm0p,defmt,exti,time-driver-any,unstable-traits \
+    --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7em-none-eabi --features nightly,stm32wle5ub,defmt,exti,time-driver-any,unstable-traits \
     --- build --release --manifest-path docs/modules/ROOT/examples/basic/Cargo.toml --target thumbv7em-none-eabi \
     --- build --release --manifest-path docs/modules/ROOT/examples/layer-by-layer/blinky-pac/Cargo.toml --target thumbv7em-none-eabi \
     --- build --release --manifest-path docs/modules/ROOT/examples/layer-by-layer/blinky-hal/Cargo.toml --target thumbv7em-none-eabi \

embassy-stm32/Cargo.toml

@@ -26,6 +26,7 @@ flavors = [
     { regex_feature = "stm32l0.*", target = "thumbv6m-none-eabi" },
     { regex_feature = "stm32l1.*", target = "thumbv7m-none-eabi" },
     { regex_feature = "stm32l4.*", target = "thumbv7em-none-eabi" },
+    { regex_feature = "stm32l5.*", target = "thumbv8m.main-none-eabihf" },
     { regex_feature = "stm32u5.*", target = "thumbv8m.main-none-eabihf" },
     { regex_feature = "stm32wb.*", target = "thumbv7em-none-eabi" },
     { regex_feature = "stm32wl.*", target = "thumbv7em-none-eabi" },
@@ -1343,4 +1344,18 @@ stm32wl55jc-cm4 = [ "stm32-metapac/stm32wl55jc-cm4" ]
 stm32wl55jc-cm0p = [ "stm32-metapac/stm32wl55jc-cm0p" ]
 stm32wl55uc-cm4 = [ "stm32-metapac/stm32wl55uc-cm4" ]
 stm32wl55uc-cm0p = [ "stm32-metapac/stm32wl55uc-cm0p" ]
+stm32wle4c8 = [ "stm32-metapac/stm32wle4c8" ]
+stm32wle4cb = [ "stm32-metapac/stm32wle4cb" ]
+stm32wle4cc = [ "stm32-metapac/stm32wle4cc" ]
+stm32wle4j8 = [ "stm32-metapac/stm32wle4j8" ]
+stm32wle4jb = [ "stm32-metapac/stm32wle4jb" ]
+stm32wle4jc = [ "stm32-metapac/stm32wle4jc" ]
+stm32wle5c8 = [ "stm32-metapac/stm32wle5c8" ]
+stm32wle5cb = [ "stm32-metapac/stm32wle5cb" ]
+stm32wle5cc = [ "stm32-metapac/stm32wle5cc" ]
+stm32wle5j8 = [ "stm32-metapac/stm32wle5j8" ]
+stm32wle5jb = [ "stm32-metapac/stm32wle5jb" ]
+stm32wle5jc = [ "stm32-metapac/stm32wle5jc" ]
+stm32wle5u8 = [ "stm32-metapac/stm32wle5u8" ]
+stm32wle5ub = [ "stm32-metapac/stm32wle5ub" ]
 # END GENERATED FEATURES

embassy-stm32/src/exti.rs

@@ -371,7 +371,7 @@ pub(crate) unsafe fn init() {
 
     foreach_exti_irq!(enable_irq);
 
-    #[cfg(not(any(rcc_wb, rcc_wl5, rcc_f1)))]
+    #[cfg(not(any(rcc_wb, rcc_wl5, rcc_wle, rcc_f1)))]
     <crate::peripherals::SYSCFG as crate::rcc::sealed::RccPeripheral>::enable();
     #[cfg(stm32f1)]
     <crate::peripherals::AFIO as crate::rcc::sealed::RccPeripheral>::enable();

embassy-stm32/src/rcc/mod.rs

@@ -18,7 +18,7 @@ use core::mem::MaybeUninit;
 #[cfg_attr(rcc_l5, path = "l5.rs")]
 #[cfg_attr(rcc_u5, path = "u5.rs")]
 #[cfg_attr(rcc_wb, path = "wb.rs")]
-#[cfg_attr(rcc_wl5, path = "wl5.rs")]
+#[cfg_attr(any(rcc_wl5, rcc_wle), path = "wl.rs")]
 mod _version;
 pub use _version::*;
 
@@ -33,7 +33,7 @@ pub struct Clocks {
     pub apb2: Hertz,
     #[cfg(not(rcc_g0))]
     pub apb2_tim: Hertz,
-    #[cfg(any(rcc_wl5, rcc_u5))]
+    #[cfg(any(rcc_wl5, rcc_wle, rcc_u5))]
     pub apb3: Hertz,
     #[cfg(any(rcc_h7, rcc_h7ab))]
     pub apb4: Hertz,
@@ -42,11 +42,12 @@ pub struct Clocks {
     pub ahb1: Hertz,
     #[cfg(any(
         rcc_l4, rcc_l5, rcc_f2, rcc_f4, rcc_f410, rcc_f7, rcc_h7, rcc_h7ab, rcc_g4, rcc_u5, rcc_wb,
-        rcc_wl5
+        rcc_wl5, rcc_wle
     ))]
     pub ahb2: Hertz,
     #[cfg(any(
-        rcc_l4, rcc_l5, rcc_f2, rcc_f4, rcc_f410, rcc_f7, rcc_h7, rcc_h7ab, rcc_u5, rcc_wb, rcc_wl5
+        rcc_l4, rcc_l5, rcc_f2, rcc_f4, rcc_f410, rcc_f7, rcc_h7, rcc_h7ab, rcc_u5, rcc_wb,
+        rcc_wl5, rcc_wle
     ))]
     pub ahb3: Hertz,
     #[cfg(any(rcc_h7, rcc_h7ab))]

stm32-gen-features/src/lib.rs

@@ -1,38 +1,11 @@
 //! FIXME discuss about which errors to print and when to panic
 
-use std::{iter::FilterMap, path::Path, slice::Iter};
+use std::path::Path;
-
-const SUPPORTED_FAMILIES: &[&str] = &[
-    "stm32f0", "stm32f1", "stm32f2", "stm32f3", "stm32f4", "stm32f7", "stm32g0", "stm32g4",
-    "stm32l0", "stm32l1", "stm32l4", "stm32l5", "stm32h7", "stm32u5", "stm32wb", "stm32wl5",
-];
 
 const SEPARATOR_START: &str = "# BEGIN GENERATED FEATURES\n";
 const SEPARATOR_END: &str = "# END GENERATED FEATURES\n";
 const HELP: &str = "# Generated by stm32-gen-features. DO NOT EDIT.\n";
 
-/// True if the chip named `name` is supported else false
-fn is_supported(name: &str) -> bool {
-    SUPPORTED_FAMILIES
-        .iter()
-        .any(|family| name.starts_with(family))
-}
-
-type SupportedIter<'a> = FilterMap<
-    Iter<'a, (String, Vec<String>)>,
-    fn(&(String, Vec<String>)) -> Option<(&String, &Vec<String>)>,
->;
-trait FilterSupported {
-    fn supported(&self) -> SupportedIter;
-}
-impl FilterSupported for &[(String, Vec<String>)] {
-    /// Get a new Vec with only the supported chips
-    fn supported(&self) -> SupportedIter {
-        self.iter()
-            .filter_map(|(name, cores)| is_supported(name).then(|| (name, cores)))
-    }
-}
-
 /// Get the list of all the chips and their supported cores
 ///
 /// Print errors to `stderr` when something is returned by the glob but is not in the returned
@@ -85,7 +58,7 @@ fn chip_cores(path: &Path) -> Vec<String> {
 /// Panics if a file contains yaml syntax errors or if a value does not have a consistent type
 pub fn embassy_stm32_needed_data(names_and_cores: &[(String, Vec<String>)]) -> String {
     let mut result = String::new();
-    for (chip_name, cores) in names_and_cores.supported() {
+    for (chip_name, cores) in names_and_cores {
         if cores.len() > 1 {
             for core_name in cores.iter() {
                 result += &format!(
@@ -150,22 +123,11 @@ pub fn generate_cargo_toml_file(previous_text: &str, new_contents: &str) -> Stri
 mod tests {
     use super::*;
 
-    #[test]
-    fn stm32f407vg_is_supported() {
-        assert!(is_supported("stm32f407vg"))
-    }
-
-    #[test]
-    fn abcdef_is_not_supported() {
-        assert!(!is_supported("abcdef"))
-    }
-
     #[test]
     #[ignore]
-    fn stm32f407vg_yaml_file_exists_and_is_supported() {
+    fn stm32f407vg_yaml_file_exists() {
         assert!(chip_names_and_cores()
             .as_slice()
-            .supported()
             .into_iter()
             .any(|(name, _)| { name == "stm32f407vg" }))
     }