nrf/uarte: expose all functionality as inherent methods.
This commit is contained in:
parent
c432d036c7
commit
3e503e7335
@ -13,12 +13,10 @@
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//! memory may be used given that buffers are passed in directly to its read and write
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//! methods.
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use core::future::Future;
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use core::marker::PhantomData;
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use core::sync::atomic::{compiler_fence, Ordering};
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use core::task::Poll;
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use embassy::interrupt::InterruptExt;
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use embassy::traits::uart::{Error as TraitError, Read, ReadUntilIdle, Write};
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use embassy::util::Unborrow;
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use embassy_hal_common::drop::OnDrop;
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use embassy_hal_common::unborrow;
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@ -32,6 +30,7 @@ use crate::pac;
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use crate::ppi::{AnyConfigurableChannel, ConfigurableChannel, Event, Ppi, Task};
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use crate::timer::Instance as TimerInstance;
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use crate::timer::{Frequency, Timer};
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use crate::util::slice_in_ram_or;
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// Re-export SVD variants to allow user to directly set values.
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pub use pac::uarte0::{baudrate::BAUDRATE_A as Baudrate, config::PARITY_A as Parity};
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@ -51,6 +50,16 @@ impl Default for Config {
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}
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}
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#[derive(Debug, Clone, Copy, PartialEq, Eq)]
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#[cfg_attr(feature = "defmt", derive(defmt::Format))]
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#[non_exhaustive]
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pub enum Error {
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BufferTooLong,
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BufferZeroLength,
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DMABufferNotInDataMemory,
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// TODO: add other error variants.
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}
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/// Interface to the UARTE peripheral
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pub struct Uarte<'d, T: Instance> {
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phantom: PhantomData<&'d mut T>,
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@ -139,8 +148,12 @@ impl<'d, T: Instance> Uarte<'d, T> {
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Self {
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phantom: PhantomData,
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tx: UarteTx::new(),
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rx: UarteRx::new(),
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tx: UarteTx {
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phantom: PhantomData,
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},
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rx: UarteRx {
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phantom: PhantomData,
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},
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}
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}
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@ -170,50 +183,36 @@ impl<'d, T: Instance> Uarte<'d, T> {
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r.intenclr.write(|w| w.endtx().clear());
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}
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}
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}
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impl<'d, T: Instance> Read for Uarte<'d, T> {
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type ReadFuture<'a>
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where
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Self: 'a,
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= impl Future<Output = Result<(), TraitError>> + 'a;
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fn read<'a>(&'a mut self, rx_buffer: &'a mut [u8]) -> Self::ReadFuture<'a> {
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self.rx.read(rx_buffer)
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pub async fn read(&mut self, buffer: &mut [u8]) -> Result<(), Error> {
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self.rx.read(buffer).await
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}
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}
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impl<'d, T: Instance> Write for Uarte<'d, T> {
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type WriteFuture<'a>
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where
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Self: 'a,
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= impl Future<Output = Result<(), TraitError>> + 'a;
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pub async fn write(&mut self, buffer: &[u8]) -> Result<(), Error> {
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self.tx.write(buffer).await
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}
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fn write<'a>(&'a mut self, tx_buffer: &'a [u8]) -> Self::WriteFuture<'a> {
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self.tx.write(tx_buffer)
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pub fn blocking_read(&mut self, buffer: &mut [u8]) -> Result<(), Error> {
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self.rx.blocking_read(buffer)
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}
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pub fn blocking_write(&mut self, buffer: &[u8]) -> Result<(), Error> {
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self.tx.blocking_write(buffer)
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}
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}
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impl<'d, T: Instance> UarteTx<'d, T> {
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pub fn new() -> Self {
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Self {
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phantom: PhantomData,
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pub async fn write(&mut self, buffer: &[u8]) -> Result<(), Error> {
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slice_in_ram_or(buffer, Error::DMABufferNotInDataMemory)?;
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if buffer.len() == 0 {
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return Err(Error::BufferZeroLength);
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}
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if buffer.len() > EASY_DMA_SIZE {
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return Err(Error::BufferTooLong);
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}
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}
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impl<'d, T: Instance> Write for UarteTx<'d, T> {
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type WriteFuture<'a>
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where
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Self: 'a,
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= impl Future<Output = Result<(), TraitError>> + 'a;
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fn write<'a>(&'a mut self, tx_buffer: &'a [u8]) -> Self::WriteFuture<'a> {
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async move {
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let ptr = tx_buffer.as_ptr();
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let len = tx_buffer.len();
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assert!(len <= EASY_DMA_SIZE);
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// TODO: panic if buffer is not in SRAM
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let ptr = buffer.as_ptr();
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let len = buffer.len();
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let r = T::regs();
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let s = T::state();
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@ -256,6 +255,38 @@ impl<'d, T: Instance> Write for UarteTx<'d, T> {
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Ok(())
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}
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pub fn blocking_write(&mut self, buffer: &[u8]) -> Result<(), Error> {
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slice_in_ram_or(buffer, Error::DMABufferNotInDataMemory)?;
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if buffer.len() == 0 {
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return Err(Error::BufferZeroLength);
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}
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if buffer.len() > EASY_DMA_SIZE {
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return Err(Error::BufferTooLong);
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}
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let ptr = buffer.as_ptr();
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let len = buffer.len();
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let r = T::regs();
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r.txd.ptr.write(|w| unsafe { w.ptr().bits(ptr as u32) });
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r.txd.maxcnt.write(|w| unsafe { w.maxcnt().bits(len as _) });
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r.events_endtx.reset();
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r.intenclr.write(|w| w.endtx().clear());
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compiler_fence(Ordering::SeqCst);
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trace!("starttx");
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r.tasks_starttx.write(|w| unsafe { w.bits(1) });
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while r.events_endtx.read().bits() == 0 {}
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compiler_fence(Ordering::SeqCst);
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r.events_txstarted.reset();
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Ok(())
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}
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}
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@ -278,24 +309,16 @@ impl<'a, T: Instance> Drop for UarteTx<'a, T> {
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}
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impl<'d, T: Instance> UarteRx<'d, T> {
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pub fn new() -> Self {
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Self {
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phantom: PhantomData,
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pub async fn read(&mut self, buffer: &mut [u8]) -> Result<(), Error> {
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if buffer.len() == 0 {
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return Err(Error::BufferZeroLength);
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}
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if buffer.len() > EASY_DMA_SIZE {
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return Err(Error::BufferTooLong);
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}
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}
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impl<'d, T: Instance> Read for UarteRx<'d, T> {
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type ReadFuture<'a>
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where
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Self: 'a,
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= impl Future<Output = Result<(), TraitError>> + 'a;
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fn read<'a>(&'a mut self, rx_buffer: &'a mut [u8]) -> Self::ReadFuture<'a> {
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async move {
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let ptr = rx_buffer.as_ptr();
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let len = rx_buffer.len();
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assert!(len <= EASY_DMA_SIZE);
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let ptr = buffer.as_ptr();
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let len = buffer.len();
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let r = T::regs();
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let s = T::state();
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@ -338,6 +361,37 @@ impl<'d, T: Instance> Read for UarteRx<'d, T> {
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Ok(())
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}
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pub fn blocking_read(&mut self, buffer: &mut [u8]) -> Result<(), Error> {
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if buffer.len() == 0 {
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return Err(Error::BufferZeroLength);
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}
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if buffer.len() > EASY_DMA_SIZE {
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return Err(Error::BufferTooLong);
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}
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let ptr = buffer.as_ptr();
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let len = buffer.len();
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let r = T::regs();
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r.rxd.ptr.write(|w| unsafe { w.ptr().bits(ptr as u32) });
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r.rxd.maxcnt.write(|w| unsafe { w.maxcnt().bits(len as _) });
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r.events_endrx.reset();
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r.intenclr.write(|w| w.endrx().clear());
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compiler_fence(Ordering::SeqCst);
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trace!("startrx");
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r.tasks_startrx.write(|w| unsafe { w.bits(1) });
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while r.events_endrx.read().bits() == 0 {}
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compiler_fence(Ordering::SeqCst);
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r.events_rxstarted.reset();
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Ok(())
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}
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}
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@ -439,14 +493,7 @@ pub struct UarteWithIdle<'d, U: Instance, T: TimerInstance> {
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impl<'d, U: Instance, T: TimerInstance> UarteWithIdle<'d, U, T> {
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/// Creates the interface to a UARTE instance.
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/// Sets the baud rate, parity and assigns the pins to the UARTE peripheral.
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///
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/// # Safety
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///
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/// The returned API is safe unless you use `mem::forget` (or similar safe mechanisms)
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/// on stack allocated buffers which which have been passed to [`send()`](Uarte::send)
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/// or [`receive`](Uarte::receive).
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#[allow(unused_unsafe)]
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pub unsafe fn new(
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pub fn new(
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uarte: impl Unborrow<Target = U> + 'd,
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timer: impl Unborrow<Target = T> + 'd,
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ppi_ch1: impl Unborrow<Target = impl ConfigurableChannel + 'd> + 'd,
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@ -501,22 +548,41 @@ impl<'d, U: Instance, T: TimerInstance> UarteWithIdle<'d, U, T> {
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_ppi_ch2: ppi_ch2,
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}
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}
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}
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impl<'d, U: Instance, T: TimerInstance> ReadUntilIdle for UarteWithIdle<'d, U, T> {
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type ReadUntilIdleFuture<'a>
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where
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Self: 'a,
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= impl Future<Output = Result<usize, TraitError>> + 'a;
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fn read_until_idle<'a>(&'a mut self, rx_buffer: &'a mut [u8]) -> Self::ReadUntilIdleFuture<'a> {
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async move {
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let ptr = rx_buffer.as_ptr();
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let len = rx_buffer.len();
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assert!(len <= EASY_DMA_SIZE);
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pub async fn read(&mut self, buffer: &mut [u8]) -> Result<(), Error> {
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self.ppi_ch1.disable();
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self.uarte.read(buffer).await
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}
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pub async fn write(&mut self, buffer: &[u8]) -> Result<(), Error> {
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self.uarte.write(buffer).await
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}
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pub fn blocking_read(&mut self, buffer: &mut [u8]) -> Result<(), Error> {
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self.ppi_ch1.disable();
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self.uarte.blocking_read(buffer)
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}
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pub fn blocking_write(&mut self, buffer: &[u8]) -> Result<(), Error> {
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self.uarte.blocking_write(buffer)
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}
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pub async fn read_until_idle(&mut self, buffer: &mut [u8]) -> Result<usize, Error> {
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if buffer.len() == 0 {
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return Err(Error::BufferZeroLength);
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}
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if buffer.len() > EASY_DMA_SIZE {
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return Err(Error::BufferTooLong);
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}
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let ptr = buffer.as_ptr();
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let len = buffer.len();
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let r = U::regs();
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let s = U::state();
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self.ppi_ch1.enable();
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let drop = OnDrop::new(|| {
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trace!("read drop: stopping");
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@ -539,7 +605,6 @@ impl<'d, U: Instance, T: TimerInstance> ReadUntilIdle for UarteWithIdle<'d, U, T
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compiler_fence(Ordering::SeqCst);
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trace!("startrx");
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r.tasks_startrx.write(|w| unsafe { w.bits(1) });
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poll_fn(|cx| {
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@ -554,7 +619,6 @@ impl<'d, U: Instance, T: TimerInstance> ReadUntilIdle for UarteWithIdle<'d, U, T
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compiler_fence(Ordering::SeqCst);
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let n = r.rxd.amount.read().amount().bits() as usize;
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// Stop timer
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self.timer.stop();
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r.events_rxstarted.reset();
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@ -562,32 +626,41 @@ impl<'d, U: Instance, T: TimerInstance> ReadUntilIdle for UarteWithIdle<'d, U, T
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Ok(n)
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}
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}
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}
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impl<'d, U: Instance, T: TimerInstance> Read for UarteWithIdle<'d, U, T> {
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type ReadFuture<'a>
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where
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Self: 'a,
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= impl Future<Output = Result<(), TraitError>> + 'a;
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fn read<'a>(&'a mut self, rx_buffer: &'a mut [u8]) -> Self::ReadFuture<'a> {
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async move {
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self.ppi_ch1.disable();
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let result = self.uarte.read(rx_buffer).await;
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pub fn blocking_read_until_idle(&mut self, buffer: &mut [u8]) -> Result<usize, Error> {
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if buffer.len() == 0 {
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return Err(Error::BufferZeroLength);
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}
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if buffer.len() > EASY_DMA_SIZE {
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return Err(Error::BufferTooLong);
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}
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let ptr = buffer.as_ptr();
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let len = buffer.len();
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let r = U::regs();
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self.ppi_ch1.enable();
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result
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}
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}
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}
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impl<'d, U: Instance, T: TimerInstance> Write for UarteWithIdle<'d, U, T> {
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type WriteFuture<'a>
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where
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Self: 'a,
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= impl Future<Output = Result<(), TraitError>> + 'a;
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r.rxd.ptr.write(|w| unsafe { w.ptr().bits(ptr as u32) });
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r.rxd.maxcnt.write(|w| unsafe { w.maxcnt().bits(len as _) });
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fn write<'a>(&'a mut self, tx_buffer: &'a [u8]) -> Self::WriteFuture<'a> {
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self.uarte.write(tx_buffer)
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r.events_endrx.reset();
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r.intenclr.write(|w| w.endrx().clear());
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compiler_fence(Ordering::SeqCst);
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r.tasks_startrx.write(|w| unsafe { w.bits(1) });
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while r.events_endrx.read().bits() == 0 {}
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compiler_fence(Ordering::SeqCst);
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let n = r.rxd.amount.read().amount().bits() as usize;
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self.timer.stop();
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r.events_rxstarted.reset();
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Ok(n)
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}
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}
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@ -7,7 +7,6 @@ mod example_common;
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use example_common::*;
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use embassy::executor::Spawner;
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use embassy::traits::uart::{Read, Write};
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use embassy_nrf::gpio::NoPin;
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use embassy_nrf::{interrupt, uarte, Peripherals};
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@ -4,11 +4,9 @@
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#[path = "../example_common.rs"]
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mod example_common;
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use embassy_traits::uart::ReadUntilIdle;
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use example_common::*;
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use embassy::executor::Spawner;
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use embassy::traits::uart::Write;
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use embassy_nrf::gpio::NoPin;
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use embassy_nrf::{interrupt, uarte, Peripherals};
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@ -19,11 +17,9 @@ async fn main(_spawner: Spawner, p: Peripherals) {
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config.baudrate = uarte::Baudrate::BAUD115200;
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let irq = interrupt::take!(UARTE0_UART0);
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let mut uart = unsafe {
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uarte::UarteWithIdle::new(
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let mut uart = uarte::UarteWithIdle::new(
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p.UARTE0, p.TIMER0, p.PPI_CH0, p.PPI_CH1, irq, p.P0_08, p.P0_06, NoPin, NoPin, config,
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)
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};
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);
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info!("uarte initialized!");
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@ -4,16 +4,15 @@
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#[path = "../example_common.rs"]
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mod example_common;
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use embassy::blocking_mutex::kind::Noop;
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use embassy::channel::mpsc::{self, Channel, Sender};
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use embassy::util::Forever;
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use embassy_nrf::peripherals::UARTE0;
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use embassy_nrf::uarte::UarteRx;
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use example_common::*;
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use embassy::blocking_mutex::kind::Noop;
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use embassy::channel::mpsc::{self, Channel, Sender};
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use embassy::executor::Spawner;
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use embassy::traits::uart::{Read, Write};
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use embassy::util::Forever;
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use embassy_nrf::gpio::NoPin;
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use embassy_nrf::peripherals::UARTE0;
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use embassy_nrf::uarte::UarteRx;
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use embassy_nrf::{interrupt, uarte, Peripherals};
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static CHANNEL: Forever<Channel<Noop, [u8; 8], 1>> = Forever::new();
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