nrf: add support for UICR configuration.
- APPROTECT enable/disable. Notably this fixes issues with nrf52-rev3 and nrf53 from locking itself at reset. - Use NFC pins as GPIO. - Use RESET pin as GPIO. NFC and RESET pins singletons are made available only when usable as GPIO, for compile-time checking.
This commit is contained in:
Dario Nieuwenhuis
@ -24,6 +24,12 @@
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)))]
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compile_error!("No chip feature activated. You must activate exactly one of the following features: nrf52810, nrf52811, nrf52832, nrf52833, nrf52840");
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#[cfg(all(feature = "reset-pin-as-gpio", not(feature = "_nrf52")))]
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compile_error!("feature `reset-pin-as-gpio` is only valid for nRF52 series chips.");
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#[cfg(all(feature = "nfc-pins-as-gpio", not(any(feature = "_nrf52", feature = "_nrf5340-app"))))]
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compile_error!("feature `nfc-pins-as-gpio` is only valid for nRF52, or nRF53's application core.");
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// This mod MUST go first, so that the others see its macros.
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pub(crate) mod fmt;
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pub(crate) mod util;
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@ -139,6 +145,19 @@ pub mod config {
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ExternalFullSwing,
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}
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/// SWD access port protection setting.
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#[non_exhaustive]
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pub enum Debug {
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/// Debugging is allowed (APPROTECT is disabled). Default.
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Allowed,
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/// Debugging is not allowed (APPROTECT is enabled).
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Disallowed,
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/// APPROTECT is not configured (neither to enable it or disable it).
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/// This can be useful if you're already doing it by other means and
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/// you don't want embassy-nrf to touch UICR.
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NotConfigured,
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}
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/// Configuration for peripherals. Default configuration should work on any nRF chip.
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#[non_exhaustive]
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pub struct Config {
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@ -152,6 +171,8 @@ pub mod config {
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/// Time driver interrupt priority. Should be lower priority than softdevice if used.
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#[cfg(feature = "_time-driver")]
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pub time_interrupt_priority: crate::interrupt::Priority,
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/// Enable or disable the debug port.
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pub debug: Debug,
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}
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impl Default for Config {
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@ -166,17 +187,152 @@ pub mod config {
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gpiote_interrupt_priority: crate::interrupt::Priority::P0,
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#[cfg(feature = "_time-driver")]
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time_interrupt_priority: crate::interrupt::Priority::P0,
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// In NS mode, default to NotConfigured, assuming the S firmware will do it.
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#[cfg(feature = "_ns")]
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debug: Debug::NotConfigured,
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#[cfg(not(feature = "_ns"))]
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debug: Debug::Allowed,
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}
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}
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}
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}
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#[cfg(feature = "_nrf9160")]
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#[allow(unused)]
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mod consts {
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pub const UICR_APPROTECT: *mut u32 = 0x00FF8000 as *mut u32;
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pub const UICR_SECUREAPPROTECT: *mut u32 = 0x00FF802C as *mut u32;
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pub const APPROTECT_ENABLED: u32 = 0x0000_0000;
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}
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#[cfg(feature = "_nrf5340-app")]
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#[allow(unused)]
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mod consts {
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pub const UICR_APPROTECT: *mut u32 = 0x00FF8000 as *mut u32;
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pub const UICR_SECUREAPPROTECT: *mut u32 = 0x00FF801C as *mut u32;
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pub const UICR_NFCPINS: *mut u32 = 0x00FF8028 as *mut u32;
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pub const APPROTECT_ENABLED: u32 = 0x0000_0000;
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pub const APPROTECT_DISABLED: u32 = 0x50FA50FA;
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}
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#[cfg(feature = "_nrf5340-net")]
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#[allow(unused)]
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mod consts {
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pub const UICR_APPROTECT: *mut u32 = 0x01FF8000 as *mut u32;
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pub const APPROTECT_ENABLED: u32 = 0x0000_0000;
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pub const APPROTECT_DISABLED: u32 = 0x50FA50FA;
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}
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#[cfg(feature = "_nrf52")]
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#[allow(unused)]
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mod consts {
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pub const UICR_PSELRESET1: *mut u32 = 0x10001200 as *mut u32;
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pub const UICR_PSELRESET2: *mut u32 = 0x10001204 as *mut u32;
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pub const UICR_NFCPINS: *mut u32 = 0x1000120C as *mut u32;
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pub const UICR_APPROTECT: *mut u32 = 0x10001208 as *mut u32;
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pub const APPROTECT_ENABLED: u32 = 0x0000_0000;
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pub const APPROTECT_DISABLED: u32 = 0x0000_005a;
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}
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unsafe fn uicr_write(address: *mut u32, value: u32) -> bool {
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let curr_val = address.read_volatile();
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if curr_val == value {
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return false;
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}
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// Writing to UICR can only change `1` bits to `0` bits.
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// If this write would change `0` bits to `1` bits, we can't do it.
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// It is only possible to do when erasing UICR, which is forbidden if
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// APPROTECT is enabled.
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if (!curr_val) & value != 0 {
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panic!("Cannot write UICR address={:08x} value={:08x}", address as u32, value)
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}
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let nvmc = &*pac::NVMC::ptr();
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nvmc.config.write(|w| w.wen().wen());
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while nvmc.ready.read().ready().is_busy() {}
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address.write_volatile(value);
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while nvmc.ready.read().ready().is_busy() {}
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nvmc.config.reset();
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while nvmc.ready.read().ready().is_busy() {}
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true
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}
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/// Initialize peripherals with the provided configuration. This should only be called once at startup.
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pub fn init(config: config::Config) -> Peripherals {
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// Do this first, so that it panics if user is calling `init` a second time
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// before doing anything important.
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let peripherals = Peripherals::take();
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let mut needs_reset = false;
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// Setup debug protection.
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match config.debug {
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config::Debug::Allowed => {
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#[cfg(feature = "_nrf52")]
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unsafe {
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let variant = (0x1000_0104 as *mut u32).read_volatile();
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// Get the letter for the build code (b'A' .. b'F')
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let build_code = (variant >> 8) as u8;
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if build_code >= b'F' {
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// Chips with build code F and higher (revision 3 and higher) have an
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// improved APPROTECT ("hardware and software controlled access port protection")
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// which needs explicit action by the firmware to keep it unlocked
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// UICR.APPROTECT = SwDisabled
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needs_reset |= uicr_write(consts::UICR_APPROTECT, consts::APPROTECT_DISABLED);
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// APPROTECT.DISABLE = SwDisabled
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(0x4000_0558 as *mut u32).write_volatile(consts::APPROTECT_DISABLED);
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} else {
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// nothing to do on older chips, debug is allowed by default.
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}
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}
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#[cfg(feature = "_nrf5340")]
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unsafe {
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let p = &*pac::CTRLAP::ptr();
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needs_reset |= uicr_write(consts::UICR_APPROTECT, consts::APPROTECT_DISABLED);
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p.approtect.disable.write(|w| w.bits(consts::APPROTECT_DISABLED));
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#[cfg(feature = "_nrf5340-app")]
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{
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needs_reset |= uicr_write(consts::UICR_SECUREAPPROTECT, consts::APPROTECT_DISABLED);
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p.secureapprotect.disable.write(|w| w.bits(consts::APPROTECT_DISABLED));
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}
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}
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// nothing to do on the nrf9160, debug is allowed by default.
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}
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config::Debug::Disallowed => unsafe {
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// UICR.APPROTECT = Enabled
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needs_reset |= uicr_write(consts::UICR_APPROTECT, consts::APPROTECT_ENABLED);
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#[cfg(any(feature = "_nrf5340-app", feature = "_nrf9160"))]
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{
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needs_reset |= uicr_write(consts::UICR_SECUREAPPROTECT, consts::APPROTECT_ENABLED);
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}
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},
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config::Debug::NotConfigured => {}
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}
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#[cfg(all(feature = "_nrf52", not(feature = "reset-pin-as-gpio")))]
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unsafe {
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needs_reset |= uicr_write(consts::UICR_PSELRESET1, chip::RESET_PIN);
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needs_reset |= uicr_write(consts::UICR_PSELRESET2, chip::RESET_PIN);
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}
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#[cfg(all(any(feature = "_nrf52", feature = "_nrf5340-app"), feature = "nfc-pins-as-gpio"))]
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unsafe {
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needs_reset |= uicr_write(consts::UICR_NFCPINS, 0);
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}
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if needs_reset {
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cortex_m::peripheral::SCB::sys_reset();
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}
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let r = unsafe { &*pac::CLOCK::ptr() };
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// Start HFCLK.
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