From e560415fde967483573d42f628e52501768584e0 Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Sun, 10 Jul 2022 19:45:26 +0200 Subject: [PATCH 001/130] :rainbow: --- .gitignore | 4 + .vscode/settings.json | 15 + Cargo.toml | 22 + examples/rpi-pico-w/.cargo/config.toml | 8 + examples/rpi-pico-w/Cargo.toml | 59 ++ examples/rpi-pico-w/build.rs | 36 + examples/rpi-pico-w/memory.x | 5 + examples/rpi-pico-w/src/main.rs | 39 ++ rustfmt.toml | 3 + src/fmt.rs | 228 +++++++ src/lib.rs | 879 +++++++++++++++++++++++++ 11 files changed, 1298 insertions(+) create mode 100644 .gitignore create mode 100644 .vscode/settings.json create mode 100644 Cargo.toml create mode 100644 examples/rpi-pico-w/.cargo/config.toml create mode 100644 examples/rpi-pico-w/Cargo.toml create mode 100644 examples/rpi-pico-w/build.rs create mode 100644 examples/rpi-pico-w/memory.x create mode 100644 examples/rpi-pico-w/src/main.rs create mode 100644 rustfmt.toml create mode 100644 src/fmt.rs create mode 100644 src/lib.rs diff --git a/.gitignore b/.gitignore new file mode 100644 index 00000000..ee8e6b4c --- /dev/null +++ b/.gitignore @@ -0,0 +1,4 @@ +Cargo.lock +target/ +*.bin +notes.txt diff --git a/.vscode/settings.json b/.vscode/settings.json new file mode 100644 index 00000000..cc926d04 --- /dev/null +++ b/.vscode/settings.json @@ -0,0 +1,15 @@ +{ + "editor.formatOnSave": true, + "rust-analyzer.cargo.buildScripts.enable": true, + "rust-analyzer.cargo.noDefaultFeatures": true, + "rust-analyzer.cargo.target": "thumbv6m-none-eabi", + "rust-analyzer.checkOnSave.allTargets": false, + "rust-analyzer.checkOnSave.noDefaultFeatures": true, + "rust-analyzer.imports.granularity.enforce": true, + "rust-analyzer.imports.granularity.group": "module", + "rust-analyzer.procMacro.attributes.enable": false, + "rust-analyzer.procMacro.enable": true, + "rust-analyzer.linkedProjects": [ + "examples/rpi-pico-w/Cargo.toml", + ], +} \ No newline at end of file diff --git a/Cargo.toml b/Cargo.toml new file mode 100644 index 00000000..d1672146 --- /dev/null +++ b/Cargo.toml @@ -0,0 +1,22 @@ +[package] +name = "cyw43" +version = "0.1.0" +edition = "2021" + +[features] +defmt = ["dep:defmt", "embassy-rp/defmt", "embassy/defmt"] +log = ["dep:log"] +[dependencies] +embassy = { version = "0.1.0" } +embassy-rp = { version = "0.1.0", features = ["unstable-traits", "nightly", "unstable-pac"] } +atomic-polyfill = "0.1.5" + +defmt = { version = "0.3", optional = true } +log = { version = "0.4.17", optional = true } + +cortex-m = "0.7.3" +cortex-m-rt = "0.7.0" +futures = { version = "0.3.17", default-features = false, features = ["async-await", "cfg-target-has-atomic", "unstable"] } + +embedded-hal-1 = { package = "embedded-hal", version = "1.0.0-alpha.8" } +embedded-hal-async = { version = "0.1.0-alpha.1" } diff --git a/examples/rpi-pico-w/.cargo/config.toml b/examples/rpi-pico-w/.cargo/config.toml new file mode 100644 index 00000000..18bd4dfe --- /dev/null +++ b/examples/rpi-pico-w/.cargo/config.toml @@ -0,0 +1,8 @@ +[target.'cfg(all(target_arch = "arm", target_os = "none"))'] +runner = "probe-run --chip RP2040" + +[build] +target = "thumbv6m-none-eabi" + +[env] +DEFMT_LOG = "trace" diff --git a/examples/rpi-pico-w/Cargo.toml b/examples/rpi-pico-w/Cargo.toml new file mode 100644 index 00000000..8dbcb20d --- /dev/null +++ b/examples/rpi-pico-w/Cargo.toml @@ -0,0 +1,59 @@ +[package] +name = "cyw43-example-rpi-pico-w" +version = "0.1.0" +edition = "2021" + + +[dependencies] +cyw43 = { path = "../../", features = ["defmt"]} +embassy = { version = "0.1.0", features = ["defmt", "defmt-timestamp-uptime"] } +embassy-rp = { version = "0.1.0", features = ["defmt", "unstable-traits", "nightly", "unstable-pac"] } +atomic-polyfill = "0.1.5" + +defmt = "0.3" +defmt-rtt = "0.3" +panic-probe = { version = "0.3", features = ["print-defmt"] } + +cortex-m = "0.7.3" +cortex-m-rt = "0.7.0" +futures = { version = "0.3.17", default-features = false, features = ["async-await", "cfg-target-has-atomic", "unstable"] } + +embedded-hal-1 = { package = "embedded-hal", version = "1.0.0-alpha.8" } +embedded-hal-async = { version = "0.1.0-alpha.1" } + + +[patch.crates-io] +embassy = { git = "https://github.com/embassy-rs/embassy", rev = "5f43c1d37e9db847c7861fe0bd821db62edba9f6" } +embassy-rp = { git = "https://github.com/embassy-rs/embassy", rev = "5f43c1d37e9db847c7861fe0bd821db62edba9f6" } +#embassy = { path = "/home/dirbaio/embassy/embassy/embassy" } +#embassy-rp = { path = "/home/dirbaio/embassy/embassy/embassy-rp" } + +[profile.dev] +debug = 2 +debug-assertions = true +opt-level = 1 +overflow-checks = true + +[profile.release] +codegen-units = 1 +debug = 2 +debug-assertions = false +incremental = false +lto = 'fat' +opt-level = 'z' +overflow-checks = false + +# do not optimize proc-macro crates = faster builds from scratch +[profile.dev.build-override] +codegen-units = 8 +debug = false +debug-assertions = false +opt-level = 0 +overflow-checks = false + +[profile.release.build-override] +codegen-units = 8 +debug = false +debug-assertions = false +opt-level = 0 +overflow-checks = false diff --git a/examples/rpi-pico-w/build.rs b/examples/rpi-pico-w/build.rs new file mode 100644 index 00000000..3f915f93 --- /dev/null +++ b/examples/rpi-pico-w/build.rs @@ -0,0 +1,36 @@ +//! This build script copies the `memory.x` file from the crate root into +//! a directory where the linker can always find it at build time. +//! For many projects this is optional, as the linker always searches the +//! project root directory -- wherever `Cargo.toml` is. However, if you +//! are using a workspace or have a more complicated build setup, this +//! build script becomes required. Additionally, by requesting that +//! Cargo re-run the build script whenever `memory.x` is changed, +//! updating `memory.x` ensures a rebuild of the application with the +//! new memory settings. + +use std::env; +use std::fs::File; +use std::io::Write; +use std::path::PathBuf; + +fn main() { + // Put `memory.x` in our output directory and ensure it's + // on the linker search path. + let out = &PathBuf::from(env::var_os("OUT_DIR").unwrap()); + File::create(out.join("memory.x")) + .unwrap() + .write_all(include_bytes!("memory.x")) + .unwrap(); + println!("cargo:rustc-link-search={}", out.display()); + + // By default, Cargo will re-run a build script whenever + // any file in the project changes. By specifying `memory.x` + // here, we ensure the build script is only re-run when + // `memory.x` is changed. + println!("cargo:rerun-if-changed=memory.x"); + + println!("cargo:rustc-link-arg-bins=--nmagic"); + println!("cargo:rustc-link-arg-bins=-Tlink.x"); + println!("cargo:rustc-link-arg-bins=-Tlink-rp.x"); + println!("cargo:rustc-link-arg-bins=-Tdefmt.x"); +} diff --git a/examples/rpi-pico-w/memory.x b/examples/rpi-pico-w/memory.x new file mode 100644 index 00000000..eb8c1731 --- /dev/null +++ b/examples/rpi-pico-w/memory.x @@ -0,0 +1,5 @@ +MEMORY { + BOOT2 : ORIGIN = 0x10000000, LENGTH = 0x100 + FLASH : ORIGIN = 0x10000100, LENGTH = 1024K - 0x100 + RAM : ORIGIN = 0x20000000, LENGTH = 256K +} \ No newline at end of file diff --git a/examples/rpi-pico-w/src/main.rs b/examples/rpi-pico-w/src/main.rs new file mode 100644 index 00000000..de8c5a2b --- /dev/null +++ b/examples/rpi-pico-w/src/main.rs @@ -0,0 +1,39 @@ +#![no_std] +#![no_main] +#![feature(type_alias_impl_trait, concat_bytes)] + +use core::slice; + +use defmt::{assert, assert_eq, panic, *}; +use embassy::executor::Spawner; +use embassy_rp::gpio::{Flex, Level, Output, Pin}; +use embassy_rp::Peripherals; +use {defmt_rtt as _, panic_probe as _}; + + +macro_rules! forever { + ($val:expr) => {{ + type T = impl Sized; + static FOREVER: Forever = Forever::new(); + FOREVER.put_with(move || $val) + }}; +} + +#[embassy::main] +async fn main(_spawner: Spawner, p: Peripherals) { + info!("Hello World!"); + + let (pwr, cs, clk, dio) = (p.PIN_23, p.PIN_25, p.PIN_29, p.PIN_24); + //let (pwr, cs, clk, dio) = (p.PIN_23, p.PIN_0, p.PIN_1, p.PIN_2); + + let mut driver = cyw43::Driver::new( + Output::new(pwr, Level::Low), + Output::new(cs, Level::High), + Output::new(clk, Level::Low), + Flex::new(dio), + ); + + driver.init().await; + + loop {} +} diff --git a/rustfmt.toml b/rustfmt.toml new file mode 100644 index 00000000..3639f438 --- /dev/null +++ b/rustfmt.toml @@ -0,0 +1,3 @@ +group_imports = "StdExternalCrate" +imports_granularity = "Module" +max_width=120 \ No newline at end of file diff --git a/src/fmt.rs b/src/fmt.rs new file mode 100644 index 00000000..f8bb0a03 --- /dev/null +++ b/src/fmt.rs @@ -0,0 +1,228 @@ +#![macro_use] +#![allow(unused_macros)] + +#[cfg(all(feature = "defmt", feature = "log"))] +compile_error!("You may not enable both `defmt` and `log` features."); + +macro_rules! assert { + ($($x:tt)*) => { + { + #[cfg(not(feature = "defmt"))] + ::core::assert!($($x)*); + #[cfg(feature = "defmt")] + ::defmt::assert!($($x)*); + } + }; +} + +macro_rules! assert_eq { + ($($x:tt)*) => { + { + #[cfg(not(feature = "defmt"))] + ::core::assert_eq!($($x)*); + #[cfg(feature = "defmt")] + ::defmt::assert_eq!($($x)*); + } + }; +} + +macro_rules! assert_ne { + ($($x:tt)*) => { + { + #[cfg(not(feature = "defmt"))] + ::core::assert_ne!($($x)*); + #[cfg(feature = "defmt")] + ::defmt::assert_ne!($($x)*); + } + }; +} + +macro_rules! debug_assert { + ($($x:tt)*) => { + { + #[cfg(not(feature = "defmt"))] + ::core::debug_assert!($($x)*); + #[cfg(feature = "defmt")] + ::defmt::debug_assert!($($x)*); + } + }; +} + +macro_rules! debug_assert_eq { + ($($x:tt)*) => { + { + #[cfg(not(feature = "defmt"))] + ::core::debug_assert_eq!($($x)*); + #[cfg(feature = "defmt")] + ::defmt::debug_assert_eq!($($x)*); + } + }; +} + +macro_rules! debug_assert_ne { + ($($x:tt)*) => { + { + #[cfg(not(feature = "defmt"))] + ::core::debug_assert_ne!($($x)*); + #[cfg(feature = "defmt")] + ::defmt::debug_assert_ne!($($x)*); + } + }; +} + +macro_rules! todo { + ($($x:tt)*) => { + { + #[cfg(not(feature = "defmt"))] + ::core::todo!($($x)*); + #[cfg(feature = "defmt")] + ::defmt::todo!($($x)*); + } + }; +} + +macro_rules! unreachable { + ($($x:tt)*) => { + { + #[cfg(not(feature = "defmt"))] + ::core::unreachable!($($x)*); + #[cfg(feature = "defmt")] + ::defmt::unreachable!($($x)*); + } + }; +} + +macro_rules! panic { + ($($x:tt)*) => { + { + #[cfg(not(feature = "defmt"))] + ::core::panic!($($x)*); + #[cfg(feature = "defmt")] + ::defmt::panic!($($x)*); + } + }; +} + +macro_rules! trace { + ($s:literal $(, $x:expr)* $(,)?) => { + { + #[cfg(feature = "log")] + ::log::trace!($s $(, $x)*); + #[cfg(feature = "defmt")] + ::defmt::trace!($s $(, $x)*); + #[cfg(not(any(feature = "log", feature="defmt")))] + let _ = ($( & $x ),*); + } + }; +} + +macro_rules! debug { + ($s:literal $(, $x:expr)* $(,)?) => { + { + #[cfg(feature = "log")] + ::log::debug!($s $(, $x)*); + #[cfg(feature = "defmt")] + ::defmt::debug!($s $(, $x)*); + #[cfg(not(any(feature = "log", feature="defmt")))] + let _ = ($( & $x ),*); + } + }; +} + +macro_rules! info { + ($s:literal $(, $x:expr)* $(,)?) => { + { + #[cfg(feature = "log")] + ::log::info!($s $(, $x)*); + #[cfg(feature = "defmt")] + ::defmt::info!($s $(, $x)*); + #[cfg(not(any(feature = "log", feature="defmt")))] + let _ = ($( & $x ),*); + } + }; +} + +macro_rules! warn { + ($s:literal $(, $x:expr)* $(,)?) => { + { + #[cfg(feature = "log")] + ::log::warn!($s $(, $x)*); + #[cfg(feature = "defmt")] + ::defmt::warn!($s $(, $x)*); + #[cfg(not(any(feature = "log", feature="defmt")))] + let _ = ($( & $x ),*); + } + }; +} + +macro_rules! error { + ($s:literal $(, $x:expr)* $(,)?) => { + { + #[cfg(feature = "log")] + ::log::error!($s $(, $x)*); + #[cfg(feature = "defmt")] + ::defmt::error!($s $(, $x)*); + #[cfg(not(any(feature = "log", feature="defmt")))] + let _ = ($( & $x ),*); + } + }; +} + +#[cfg(feature = "defmt")] +macro_rules! unwrap { + ($($x:tt)*) => { + ::defmt::unwrap!($($x)*) + }; +} + +#[cfg(not(feature = "defmt"))] +macro_rules! unwrap { + ($arg:expr) => { + match $crate::fmt::Try::into_result($arg) { + ::core::result::Result::Ok(t) => t, + ::core::result::Result::Err(e) => { + ::core::panic!("unwrap of `{}` failed: {:?}", ::core::stringify!($arg), e); + } + } + }; + ($arg:expr, $($msg:expr),+ $(,)? ) => { + match $crate::fmt::Try::into_result($arg) { + ::core::result::Result::Ok(t) => t, + ::core::result::Result::Err(e) => { + ::core::panic!("unwrap of `{}` failed: {}: {:?}", ::core::stringify!($arg), ::core::format_args!($($msg,)*), e); + } + } + } +} + +#[cfg(feature = "defmt-timestamp-uptime")] +defmt::timestamp! {"{=u64:us}", crate::time::Instant::now().as_micros() } + +#[derive(Debug, Copy, Clone, Eq, PartialEq)] +pub struct NoneError; + +pub trait Try { + type Ok; + type Error; + fn into_result(self) -> Result; +} + +impl Try for Option { + type Ok = T; + type Error = NoneError; + + #[inline] + fn into_result(self) -> Result { + self.ok_or(NoneError) + } +} + +impl Try for Result { + type Ok = T; + type Error = E; + + #[inline] + fn into_result(self) -> Self { + self + } +} diff --git a/src/lib.rs b/src/lib.rs new file mode 100644 index 00000000..5caf1926 --- /dev/null +++ b/src/lib.rs @@ -0,0 +1,879 @@ +#![no_std] +#![no_main] +#![feature(type_alias_impl_trait, concat_bytes)] + +// This mod MUST go first, so that the others see its macros. +pub(crate) mod fmt; + +use core::slice; + +use embassy::time::{block_for, Duration, Timer}; +use embassy::util::yield_now; +use embassy_rp::gpio::{Flex, Output, Pin}; + +fn swap16(x: u32) -> u32 { + (x & 0xFF00FF00) >> 8 | (x & 0x00FF00FF) << 8 +} + +fn cmd_word(write: bool, incr: bool, func: u32, addr: u32, len: u32) -> u32 { + (write as u32) << 31 | (incr as u32) << 30 | (func & 0b11) << 28 | (addr & 0x1FFFF) << 11 | (len & 0x7FF) +} + +const FUNC_BUS: u32 = 0; +const FUNC_BACKPLANE: u32 = 1; +const FUNC_WLAN: u32 = 2; +const FUNC_BT: u32 = 3; + +const REG_BUS_CTRL: u32 = 0x0; +const REG_BUS_INTERRUPT: u32 = 0x04; // 16 bits - Interrupt status +const REG_BUS_INTERRUPT_ENABLE: u32 = 0x06; // 16 bits - Interrupt mask +const REG_BUS_STATUS: u32 = 0x8; +const REG_BUS_FEEDBEAD: u32 = 0x14; +const REG_BUS_TEST: u32 = 0x18; +const REG_BUS_RESP_DELAY: u32 = 0x1c; + +// SPI_STATUS_REGISTER bits +const STATUS_DATA_NOT_AVAILABLE: u32 = 0x00000001; +const STATUS_UNDERFLOW: u32 = 0x00000002; +const STATUS_OVERFLOW: u32 = 0x00000004; +const STATUS_F2_INTR: u32 = 0x00000008; +const STATUS_F3_INTR: u32 = 0x00000010; +const STATUS_F2_RX_READY: u32 = 0x00000020; +const STATUS_F3_RX_READY: u32 = 0x00000040; +const STATUS_HOST_CMD_DATA_ERR: u32 = 0x00000080; +const STATUS_F2_PKT_AVAILABLE: u32 = 0x00000100; +const STATUS_F2_PKT_LEN_MASK: u32 = 0x000FFE00; +const STATUS_F2_PKT_LEN_SHIFT: u32 = 9; +const STATUS_F3_PKT_AVAILABLE: u32 = 0x00100000; +const STATUS_F3_PKT_LEN_MASK: u32 = 0xFFE00000; +const STATUS_F3_PKT_LEN_SHIFT: u32 = 21; + +const REG_BACKPLANE_GPIO_SELECT: u32 = 0x10005; +const REG_BACKPLANE_GPIO_OUTPUT: u32 = 0x10006; +const REG_BACKPLANE_GPIO_ENABLE: u32 = 0x10007; +const REG_BACKPLANE_FUNCTION2_WATERMARK: u32 = 0x10008; +const REG_BACKPLANE_DEVICE_CONTROL: u32 = 0x10009; +const REG_BACKPLANE_BACKPLANE_ADDRESS_LOW: u32 = 0x1000A; +const REG_BACKPLANE_BACKPLANE_ADDRESS_MID: u32 = 0x1000B; +const REG_BACKPLANE_BACKPLANE_ADDRESS_HIGH: u32 = 0x1000C; +const REG_BACKPLANE_FRAME_CONTROL: u32 = 0x1000D; +const REG_BACKPLANE_CHIP_CLOCK_CSR: u32 = 0x1000E; +const REG_BACKPLANE_PULL_UP: u32 = 0x1000F; +const REG_BACKPLANE_READ_FRAME_BC_LOW: u32 = 0x1001B; +const REG_BACKPLANE_READ_FRAME_BC_HIGH: u32 = 0x1001C; +const REG_BACKPLANE_WAKEUP_CTRL: u32 = 0x1001E; +const REG_BACKPLANE_SLEEP_CSR: u32 = 0x1001F; + +const BACKPLANE_WINDOW_SIZE: usize = 0x8000; +const BACKPLANE_ADDRESS_MASK: u32 = 0x7FFF; +const BACKPLANE_ADDRESS_32BIT_FLAG: u32 = 0x08000; +const BACKPLANE_MAX_TRANSFER_SIZE: usize = 64; + +const AI_IOCTRL_OFFSET: u32 = 0x408; +const AI_IOCTRL_BIT_FGC: u8 = 0x0002; +const AI_IOCTRL_BIT_CLOCK_EN: u8 = 0x0001; +const AI_IOCTRL_BIT_CPUHALT: u8 = 0x0020; + +const AI_RESETCTRL_OFFSET: u32 = 0x800; +const AI_RESETCTRL_BIT_RESET: u8 = 1; + +const AI_RESETSTATUS_OFFSET: u32 = 0x804; + +const TEST_PATTERN: u32 = 0x12345678; +const FEEDBEAD: u32 = 0xFEEDBEAD; + +// SPI_INTERRUPT_REGISTER and SPI_INTERRUPT_ENABLE_REGISTER Bits +const IRQ_DATA_UNAVAILABLE: u16 = 0x0001; // Requested data not available; Clear by writing a "1" +const IRQ_F2_F3_FIFO_RD_UNDERFLOW: u16 = 0x0002; +const IRQ_F2_F3_FIFO_WR_OVERFLOW: u16 = 0x0004; +const IRQ_COMMAND_ERROR: u16 = 0x0008; // Cleared by writing 1 +const IRQ_DATA_ERROR: u16 = 0x0010; // Cleared by writing 1 +const IRQ_F2_PACKET_AVAILABLE: u16 = 0x0020; +const IRQ_F3_PACKET_AVAILABLE: u16 = 0x0040; +const IRQ_F1_OVERFLOW: u16 = 0x0080; // Due to last write. Bkplane has pending write requests +const IRQ_MISC_INTR0: u16 = 0x0100; +const IRQ_MISC_INTR1: u16 = 0x0200; +const IRQ_MISC_INTR2: u16 = 0x0400; +const IRQ_MISC_INTR3: u16 = 0x0800; +const IRQ_MISC_INTR4: u16 = 0x1000; +const IRQ_F1_INTR: u16 = 0x2000; +const IRQ_F2_INTR: u16 = 0x4000; +const IRQ_F3_INTR: u16 = 0x8000; + +#[derive(Clone, Copy, PartialEq, Eq)] +enum Core { + WLAN = 0, + SOCSRAM = 1, + SDIOD = 2, +} + +impl Core { + fn base_addr(&self) -> u32 { + match self { + Self::WLAN => CHIP.arm_core_base_address, + Self::SOCSRAM => CHIP.socsram_wrapper_base_address, + Self::SDIOD => CHIP.sdiod_core_base_address, + } + } +} + +struct Chip { + arm_core_base_address: u32, + socsram_base_address: u32, + socsram_wrapper_base_address: u32, + sdiod_core_base_address: u32, + pmu_base_address: u32, + chip_ram_size: u32, + atcm_ram_base_address: u32, + socram_srmem_size: u32, + chanspec_band_mask: u32, + chanspec_band_2g: u32, + chanspec_band_5g: u32, + chanspec_band_shift: u32, + chanspec_bw_10: u32, + chanspec_bw_20: u32, + chanspec_bw_40: u32, + chanspec_bw_mask: u32, + chanspec_bw_shift: u32, + chanspec_ctl_sb_lower: u32, + chanspec_ctl_sb_upper: u32, + chanspec_ctl_sb_none: u32, + chanspec_ctl_sb_mask: u32, +} + +const WRAPPER_REGISTER_OFFSET: u32 = 0x100000; + +// Data for CYW43439 +const CHIP: Chip = Chip { + arm_core_base_address: 0x18003000 + WRAPPER_REGISTER_OFFSET, + socsram_base_address: 0x18004000, + socsram_wrapper_base_address: 0x18004000 + WRAPPER_REGISTER_OFFSET, + sdiod_core_base_address: 0x18002000, + pmu_base_address: 0x18000000, + chip_ram_size: 512 * 1024, + atcm_ram_base_address: 0, + socram_srmem_size: 64 * 1024, + chanspec_band_mask: 0xc000, + chanspec_band_2g: 0x0000, + chanspec_band_5g: 0xc000, + chanspec_band_shift: 14, + chanspec_bw_10: 0x0800, + chanspec_bw_20: 0x1000, + chanspec_bw_40: 0x1800, + chanspec_bw_mask: 0x3800, + chanspec_bw_shift: 11, + chanspec_ctl_sb_lower: 0x0000, + chanspec_ctl_sb_upper: 0x0100, + chanspec_ctl_sb_none: 0x0000, + chanspec_ctl_sb_mask: 0x0700, +}; + +#[derive(Clone, Copy)] +#[repr(C)] +struct SdpcmHeader { + len: u16, + len_inv: u16, + /// Rx/Tx sequence number + sequence: u8, + /// 4 MSB Channel number, 4 LSB arbitrary flag + channel_and_flags: u8, + /// Length of next data frame, reserved for Tx + next_length: u8, + /// Data offset + header_length: u8, + /// Flow control bits, reserved for Tx + wireless_flow_control: u8, + /// Maximum Sequence number allowed by firmware for Tx + bus_data_credit: u8, + /// Reserved + reserved: [u8; 2], +} + +#[derive(Clone, Copy)] +#[repr(C)] +struct CdcHeader { + cmd: u32, + out_len: u16, + in_len: u16, + flags: u16, + id: u16, + status: u32, +} + +#[derive(Clone, Copy)] +#[repr(C)] +struct BdcHeader { + flags: u8, + /// 802.1d Priority (low 3 bits) + priority: u8, + flags2: u8, + /// Offset from end of BDC header to packet data, in 4-uint8_t words. Leaves room for optional headers. + data_offset: u8, +} + +macro_rules! impl_bytes { + ($t:ident) => { + impl $t { + const SIZE: usize = core::mem::size_of::(); + + pub fn to_bytes(&self) -> [u8; Self::SIZE] { + unsafe { core::mem::transmute(*self) } + } + + pub fn from_bytes(bytes: &[u8; Self::SIZE]) -> Self { + unsafe { core::mem::transmute(*bytes) } + } + } + }; +} +impl_bytes!(SdpcmHeader); +impl_bytes!(CdcHeader); +impl_bytes!(BdcHeader); + +pub struct Driver<'a, PWR: Pin, CS: Pin, CLK: Pin, DIO: Pin> { + pwr: Output<'a, PWR>, + + /// SPI chip-select. + cs: Output<'a, CS>, + + /// SPI clock + clk: Output<'a, CLK>, + + /// 4 signals, all in one!! + /// - SPI MISO + /// - SPI MOSI + /// - IRQ + /// - strap to set to gSPI mode on boot. + dio: Flex<'a, DIO>, + + backplane_window: u32, +} + +impl<'a, PWR: Pin, CS: Pin, CLK: Pin, DIO: Pin> Driver<'a, PWR, CS, CLK, DIO> { + pub fn new(pwr: Output<'a, PWR>, cs: Output<'a, CS>, clk: Output<'a, CLK>, dio: Flex<'a, DIO>) -> Self { + Self { + pwr, + cs, + clk, + dio, + backplane_window: 0xAAAA_AAAA, + } + } + + pub async fn init(&mut self) { + // Set strap to select gSPI mode. + self.dio.set_as_output(); + self.dio.set_low(); + + // Reset + self.pwr.set_low(); + Timer::after(Duration::from_millis(20)).await; + self.pwr.set_high(); + Timer::after(Duration::from_millis(250)).await; + + info!("waiting for ping..."); + while self.read32_swapped(REG_BUS_FEEDBEAD) != FEEDBEAD {} + info!("ping ok"); + + self.write32_swapped(0x18, TEST_PATTERN); + let val = self.read32_swapped(REG_BUS_TEST); + assert_eq!(val, TEST_PATTERN); + + // 32bit, big endian. + self.write32_swapped(REG_BUS_CTRL, 0x00010033); + + let val = self.read32(FUNC_BUS, REG_BUS_FEEDBEAD); + assert_eq!(val, FEEDBEAD); + let val = self.read32(FUNC_BUS, REG_BUS_TEST); + assert_eq!(val, TEST_PATTERN); + + // No response delay in any of the funcs. + // seems to break backplane??? eat the 4-byte delay instead, that's what the vendor drivers do... + //self.write32(FUNC_BUS, REG_BUS_RESP_DELAY, 0); + + // Init ALP (no idea what that stands for) clock + self.write8(FUNC_BACKPLANE, REG_BACKPLANE_CHIP_CLOCK_CSR, 0x08); + info!("waiting for clock..."); + while self.read8(FUNC_BACKPLANE, REG_BACKPLANE_CHIP_CLOCK_CSR) & 0x40 == 0 {} + info!("clock ok"); + + let chip_id = self.bp_read16(0x1800_0000); + info!("chip ID: {}", chip_id); + + // Upload firmware. + self.core_disable(Core::WLAN); + self.core_reset(Core::SOCSRAM); + self.bp_write32(CHIP.socsram_base_address + 0x10, 3); + self.bp_write32(CHIP.socsram_base_address + 0x44, 0); + + // I'm flashing the firmwares independently at hardcoded addresses, instead of baking them + // into the program with `include_bytes!` or similar, so that flashing the program stays fast. + // + // Flash them like this, also don't forget to update the lengths below if you change them!. + // + // probe-rs-cli download 43439A0.bin --format bin --chip RP2040 --base-address 0x10100000 + // probe-rs-cli download 43439A0.clm_blob --format bin --chip RP2040 --base-address 0x10140000 + let fw = unsafe { slice::from_raw_parts(0x10100000 as *const u8, 224190) }; + let clm = unsafe { slice::from_raw_parts(0x10140000 as *const u8, 4752) }; + + let ram_addr = CHIP.atcm_ram_base_address; + + info!("loading fw"); + self.bp_write(ram_addr, fw); + + info!("verifying fw"); + let mut buf = [0; 1024]; + for (i, chunk) in fw.chunks(1024).enumerate() { + let buf = &mut buf[..chunk.len()]; + self.bp_read(ram_addr + i as u32 * 1024, buf); + assert_eq!(chunk, buf); + } + + info!("loading nvram"); + // Round up to 4 bytes. + let nvram_len = (NVRAM.len() + 3) / 4 * 4; + self.bp_write(ram_addr + CHIP.chip_ram_size - 4 - nvram_len as u32, NVRAM); + + let nvram_len_words = nvram_len as u32 / 4; + let nvram_len_magic = (!nvram_len_words << 16) | nvram_len_words; + self.bp_write32(ram_addr + CHIP.chip_ram_size - 4, nvram_len_magic); + + // Start core! + info!("starting up core..."); + self.core_reset(Core::WLAN); + assert!(self.core_is_up(Core::WLAN)); + + while self.read8(FUNC_BACKPLANE, REG_BACKPLANE_CHIP_CLOCK_CSR) & 0x80 == 0 {} + + // "Set up the interrupt mask and enable interrupts" + self.bp_write32(CHIP.sdiod_core_base_address + 0x24, 0xF0); + + // "Lower F2 Watermark to avoid DMA Hang in F2 when SD Clock is stopped." + // Sounds scary... + self.write8(FUNC_BACKPLANE, REG_BACKPLANE_FUNCTION2_WATERMARK, 32); + + // wait for wifi startup + info!("waiting for wifi init..."); + while self.read32(FUNC_BUS, REG_BUS_STATUS) & STATUS_F2_RX_READY == 0 {} + + // Some random configs related to sleep. + // I think they're not needed if we don't want sleep...??? + /* + let mut val = self.read8(FUNC_BACKPLANE, REG_BACKPLANE_WAKEUP_CTRL); + val |= 0x02; // WAKE_TILL_HT_AVAIL + self.write8(FUNC_BACKPLANE, REG_BACKPLANE_WAKEUP_CTRL, val); + self.write8(FUNC_BUS, 0xF0, 0x08); // SDIOD_CCCR_BRCM_CARDCAP.CMD_NODEC = 1 + self.write8(FUNC_BACKPLANE, REG_BACKPLANE_CHIP_CLOCK_CSR, 0x02); // SBSDIO_FORCE_HT + + let mut val = self.read8(FUNC_BACKPLANE, REG_BACKPLANE_SLEEP_CSR); + val |= 0x01; // SBSDIO_SLPCSR_KEEP_SDIO_ON + self.write8(FUNC_BACKPLANE, REG_BACKPLANE_SLEEP_CSR, val); + + // clear pulls + self.write8(FUNC_BACKPLANE, REG_BACKPLANE_PULL_UP, 0); + let _ = self.read8(FUNC_BACKPLANE, REG_BACKPLANE_PULL_UP); + */ + + let mut buf = [0; 8 + 12 + 1024]; + buf[0..8].copy_from_slice(b"clmload\x00"); + buf[8..20].copy_from_slice(b"\x02\x10\x02\x00\x00\x04\x00\x00\x00\x00\x00\x00"); + buf[20..].copy_from_slice(&clm[..1024]); + self.send_ioctl(2, 263, 0, &buf); + + info!("init done "); + + let mut old_irq = 0; + let mut buf = [0; 2048]; + loop { + let irq = self.read16(FUNC_BUS, REG_BUS_INTERRUPT); + if irq != old_irq { + info!("irq: {:04x}", irq); + } + old_irq = irq; + + if irq & IRQ_F2_PACKET_AVAILABLE != 0 { + let mut status = 0xFFFF_FFFF; + while status == 0xFFFF_FFFF { + status = self.read32(FUNC_BUS, REG_BUS_STATUS); + } + + if status & STATUS_F2_PKT_AVAILABLE != 0 { + let len = (status & STATUS_F2_PKT_LEN_MASK) >> STATUS_F2_PKT_LEN_SHIFT; + info!("got len {}", len); + + let cmd = cmd_word(false, true, FUNC_WLAN, 0, len); + + self.cs.set_low(); + self.spi_write(&cmd.to_le_bytes()); + self.spi_read(&mut buf[..len as usize]); + // pad to 32bit + let mut junk = [0; 4]; + if len % 4 != 0 { + self.spi_read(&mut junk[..(4 - len as usize % 4)]); + } + self.cs.set_high(); + + info!("rxd packet {:02x}", &buf[..len as usize]); + + self.rx(&buf[..len as usize]); + } + } + + yield_now().await; + } + } + + fn rx(&mut self, packet: &[u8]) { + if packet.len() < SdpcmHeader::SIZE { + warn!("packet too short, len={}", packet.len()); + return; + } + + let sdpcm_header = SdpcmHeader::from_bytes(packet[..SdpcmHeader::SIZE].try_into().unwrap()); + + if sdpcm_header.len != !sdpcm_header.len_inv { + warn!("len inv mismatch"); + return; + } + if sdpcm_header.len as usize != packet.len() { + // TODO: is this guaranteed?? + warn!("len from header doesn't match len from spi"); + return; + } + + let channel = sdpcm_header.channel_and_flags & 0x0f; + + match channel { + 0 => { + if packet.len() < SdpcmHeader::SIZE + CdcHeader::SIZE { + warn!("control packet too short, len={}", packet.len()); + return; + } + + let cdc_header = + CdcHeader::from_bytes(packet[SdpcmHeader::SIZE..][..CdcHeader::SIZE].try_into().unwrap()); + + // TODO check cdc_header.id matches + // TODO check status + } + _ => {} + } + } + + fn send_ioctl(&mut self, kind: u32, cmd: u32, iface: u32, data: &[u8]) { + let mut buf = [0; 2048]; + + let total_len = SdpcmHeader::SIZE + CdcHeader::SIZE + data.len(); + + let sdpcm_header = SdpcmHeader { + len: total_len as u16, + len_inv: !total_len as u16, + sequence: 0x02, // todo + channel_and_flags: 0, // control channle + next_length: 0, + header_length: SdpcmHeader::SIZE as _, + wireless_flow_control: 0, + bus_data_credit: 0, + reserved: [0, 0], + }; + + let cdc_header = CdcHeader { + cmd: cmd, + out_len: data.len() as _, + in_len: 0, + flags: kind as u16 | (iface as u16) << 12, + id: 1, // todo + status: 0, + }; + + buf[0..SdpcmHeader::SIZE].copy_from_slice(&sdpcm_header.to_bytes()); + buf[SdpcmHeader::SIZE..][..CdcHeader::SIZE].copy_from_slice(&cdc_header.to_bytes()); + buf[SdpcmHeader::SIZE + CdcHeader::SIZE..][..data.len()].copy_from_slice(data); + + info!("txing {:02x}", &buf[..total_len]); + + let cmd = cmd_word(true, true, FUNC_WLAN, 0, total_len as _); + self.cs.set_low(); + self.spi_write(&cmd.to_le_bytes()); + self.spi_write(&buf[..total_len]); + self.cs.set_high(); + } + + fn core_disable(&mut self, core: Core) { + let base = core.base_addr(); + + // Dummy read? + let _ = self.bp_read8(base + AI_RESETCTRL_OFFSET); + + // Check it isn't already reset + let r = self.bp_read8(base + AI_RESETCTRL_OFFSET); + if r & AI_RESETCTRL_BIT_RESET != 0 { + return; + } + + self.bp_write8(base + AI_IOCTRL_OFFSET, 0); + let _ = self.bp_read8(base + AI_IOCTRL_OFFSET); + + block_for(Duration::from_millis(1)); + + self.bp_write8(base + AI_RESETCTRL_OFFSET, AI_RESETCTRL_BIT_RESET); + let _ = self.bp_read8(base + AI_RESETCTRL_OFFSET); + } + + fn core_reset(&mut self, core: Core) { + self.core_disable(core); + + let base = core.base_addr(); + self.bp_write8(base + AI_IOCTRL_OFFSET, AI_IOCTRL_BIT_FGC | AI_IOCTRL_BIT_CLOCK_EN); + let _ = self.bp_read8(base + AI_IOCTRL_OFFSET); + + self.bp_write8(base + AI_RESETCTRL_OFFSET, 0); + + block_for(Duration::from_millis(1)); + + self.bp_write8(base + AI_IOCTRL_OFFSET, AI_IOCTRL_BIT_CLOCK_EN); + let _ = self.bp_read8(base + AI_IOCTRL_OFFSET); + + block_for(Duration::from_millis(1)); + } + + fn core_is_up(&mut self, core: Core) -> bool { + let base = core.base_addr(); + + let io = self.bp_read8(base + AI_IOCTRL_OFFSET); + if io & (AI_IOCTRL_BIT_FGC | AI_IOCTRL_BIT_CLOCK_EN) != AI_IOCTRL_BIT_CLOCK_EN { + debug!("core_is_up: returning false due to bad ioctrl {:02x}", io); + return false; + } + + let r = self.bp_read8(base + AI_RESETCTRL_OFFSET); + if r & (AI_RESETCTRL_BIT_RESET) != 0 { + debug!("core_is_up: returning false due to bad resetctrl {:02x}", r); + return false; + } + + true + } + + fn bp_read(&mut self, mut addr: u32, mut data: &mut [u8]) { + // It seems the HW force-aligns the addr + // to 2 if data.len() >= 2 + // to 4 if data.len() >= 4 + // To simplify, enforce 4-align for now. + assert!(addr % 4 == 0); + + while !data.is_empty() { + // Ensure transfer doesn't cross a window boundary. + let window_offs = addr & BACKPLANE_ADDRESS_MASK; + let window_remaining = BACKPLANE_WINDOW_SIZE - window_offs as usize; + + let len = data.len().min(BACKPLANE_MAX_TRANSFER_SIZE).min(window_remaining); + + self.backplane_set_window(addr); + + let cmd = cmd_word(false, true, FUNC_BACKPLANE, window_offs, len as u32); + self.cs.set_low(); + self.spi_write(&cmd.to_le_bytes()); + + // 4-byte response delay. + let mut junk = [0; 4]; + self.spi_read(&mut junk); + + // Read data + self.spi_read(&mut data[..len]); + + // pad to 32bit + if len % 4 != 0 { + self.spi_read(&mut junk[..(4 - len % 4)]); + } + self.cs.set_high(); + + // Advance ptr. + addr += len as u32; + data = &mut data[len..]; + } + } + + fn bp_write(&mut self, mut addr: u32, mut data: &[u8]) { + // It seems the HW force-aligns the addr + // to 2 if data.len() >= 2 + // to 4 if data.len() >= 4 + // To simplify, enforce 4-align for now. + assert!(addr % 4 == 0); + + while !data.is_empty() { + // Ensure transfer doesn't cross a window boundary. + let window_offs = addr & BACKPLANE_ADDRESS_MASK; + let window_remaining = BACKPLANE_WINDOW_SIZE - window_offs as usize; + + let len = data.len().min(BACKPLANE_MAX_TRANSFER_SIZE).min(window_remaining); + + self.backplane_set_window(addr); + + let cmd = cmd_word(true, true, FUNC_BACKPLANE, window_offs, len as u32); + self.cs.set_low(); + self.spi_write(&cmd.to_le_bytes()); + self.spi_write(&data[..len]); + // pad to 32bit + if len % 4 != 0 { + let zeros = [0; 4]; + self.spi_write(&zeros[..(4 - len % 4)]); + } + self.cs.set_high(); + + // Advance ptr. + addr += len as u32; + data = &data[len..]; + } + } + + fn bp_read8(&mut self, addr: u32) -> u8 { + self.backplane_readn(addr, 1) as u8 + } + + fn bp_write8(&mut self, addr: u32, val: u8) { + self.backplane_writen(addr, val as u32, 1) + } + + fn bp_read16(&mut self, addr: u32) -> u16 { + self.backplane_readn(addr, 2) as u16 + } + + fn bp_write16(&mut self, addr: u32, val: u16) { + self.backplane_writen(addr, val as u32, 2) + } + + fn bp_read32(&mut self, addr: u32) -> u32 { + self.backplane_readn(addr, 4) + } + + fn bp_write32(&mut self, addr: u32, val: u32) { + self.backplane_writen(addr, val, 4) + } + + fn backplane_readn(&mut self, addr: u32, len: u32) -> u32 { + self.backplane_set_window(addr); + + let mut bus_addr = addr & BACKPLANE_ADDRESS_MASK; + if len == 4 { + bus_addr |= BACKPLANE_ADDRESS_32BIT_FLAG + } + self.readn(FUNC_BACKPLANE, bus_addr, len) + } + + fn backplane_writen(&mut self, addr: u32, val: u32, len: u32) { + self.backplane_set_window(addr); + + let mut bus_addr = addr & BACKPLANE_ADDRESS_MASK; + if len == 4 { + bus_addr |= BACKPLANE_ADDRESS_32BIT_FLAG + } + self.writen(FUNC_BACKPLANE, bus_addr, val, len) + } + + fn backplane_set_window(&mut self, addr: u32) { + let new_window = addr & !BACKPLANE_ADDRESS_MASK; + + if (new_window >> 24) as u8 != (self.backplane_window >> 24) as u8 { + self.write8( + FUNC_BACKPLANE, + REG_BACKPLANE_BACKPLANE_ADDRESS_HIGH, + (new_window >> 24) as u8, + ); + } + if (new_window >> 16) as u8 != (self.backplane_window >> 16) as u8 { + self.write8( + FUNC_BACKPLANE, + REG_BACKPLANE_BACKPLANE_ADDRESS_MID, + (new_window >> 16) as u8, + ); + } + if (new_window >> 8) as u8 != (self.backplane_window >> 8) as u8 { + self.write8( + FUNC_BACKPLANE, + REG_BACKPLANE_BACKPLANE_ADDRESS_LOW, + (new_window >> 8) as u8, + ); + } + self.backplane_window = new_window; + } + + fn read8(&mut self, func: u32, addr: u32) -> u8 { + self.readn(func, addr, 1) as u8 + } + + fn write8(&mut self, func: u32, addr: u32, val: u8) { + self.writen(func, addr, val as u32, 1) + } + + fn read16(&mut self, func: u32, addr: u32) -> u16 { + self.readn(func, addr, 2) as u16 + } + + fn write16(&mut self, func: u32, addr: u32, val: u16) { + self.writen(func, addr, val as u32, 2) + } + + fn read32(&mut self, func: u32, addr: u32) -> u32 { + self.readn(func, addr, 4) + } + + fn write32(&mut self, func: u32, addr: u32, val: u32) { + self.writen(func, addr, val, 4) + } + + fn readn(&mut self, func: u32, addr: u32, len: u32) -> u32 { + let cmd = cmd_word(false, true, func, addr, len); + let mut buf = [0; 4]; + + self.cs.set_low(); + self.spi_write(&cmd.to_le_bytes()); + if func == FUNC_BACKPLANE { + // 4-byte response delay. + self.spi_read(&mut buf); + } + self.spi_read(&mut buf); + self.cs.set_high(); + + u32::from_le_bytes(buf) + } + + fn writen(&mut self, func: u32, addr: u32, val: u32, len: u32) { + let cmd = cmd_word(true, true, func, addr, len); + + self.cs.set_low(); + self.spi_write(&cmd.to_le_bytes()); + self.spi_write(&val.to_le_bytes()); + self.cs.set_high(); + } + + fn read32_swapped(&mut self, addr: u32) -> u32 { + let cmd = cmd_word(false, true, FUNC_BUS, addr, 4); + let mut buf = [0; 4]; + + self.cs.set_low(); + self.spi_write(&swap16(cmd).to_le_bytes()); + self.spi_read(&mut buf); + self.cs.set_high(); + + swap16(u32::from_le_bytes(buf)) + } + + fn write32_swapped(&mut self, addr: u32, val: u32) { + let cmd = cmd_word(true, true, FUNC_BUS, addr, 4); + + self.cs.set_low(); + self.spi_write(&swap16(cmd).to_le_bytes()); + self.spi_write(&swap16(val).to_le_bytes()); + self.cs.set_high(); + } + + fn spi_read(&mut self, words: &mut [u8]) { + self.dio.set_as_input(); + for word in words { + let mut w = 0; + for _ in 0..8 { + w = w << 1; + + // rising edge, sample data + if self.dio.is_high() { + w |= 0x01; + } + self.clk.set_high(); + delay(); + + // falling edge + self.clk.set_low(); + delay(); + } + *word = w + } + self.clk.set_low(); + delay(); + } + + fn spi_write(&mut self, words: &[u8]) { + self.dio.set_as_output(); + for word in words { + let mut word = *word; + for _ in 0..8 { + // falling edge, setup data + self.clk.set_low(); + if word & 0x80 == 0 { + self.dio.set_low(); + } else { + self.dio.set_high(); + } + delay(); + + // rising edge + self.clk.set_high(); + delay(); + + word = word << 1; + } + } + self.clk.set_low(); + delay(); + self.dio.set_as_input(); + } +} + +fn delay() { + //cortex_m::asm::delay(5); +} + +macro_rules! nvram { + ($($s:literal,)*) => { + concat_bytes!($($s, b"\x00",)* b"\x00\x00") + }; +} + +static NVRAM: &'static [u8] = &*nvram!( + b"NVRAMRev=$Rev$", + b"manfid=0x2d0", + b"prodid=0x0727", + b"vendid=0x14e4", + b"devid=0x43e2", + b"boardtype=0x0887", + b"boardrev=0x1100", + b"boardnum=22", + b"macaddr=00:A0:50:86:aa:b6", + b"sromrev=11", + b"boardflags=0x00404001", + b"boardflags3=0x04000000", + b"xtalfreq=26000", + b"nocrc=1", + b"ag0=255", + b"aa2g=1", + b"ccode=ALL", + b"pa0itssit=0x20", + b"extpagain2g=0", + b"pa2ga0=-168,7161,-820", + b"AvVmid_c0=0x0,0xc8", + b"cckpwroffset0=5", + b"maxp2ga0=84", + b"txpwrbckof=6", + b"cckbw202gpo=0", + b"legofdmbw202gpo=0x66111111", + b"mcsbw202gpo=0x77711111", + b"propbw202gpo=0xdd", + b"ofdmdigfilttype=18", + b"ofdmdigfilttypebe=18", + b"papdmode=1", + b"papdvalidtest=1", + b"pacalidx2g=45", + b"papdepsoffset=-30", + b"papdendidx=58", + b"ltecxmux=0", + b"ltecxpadnum=0x0102", + b"ltecxfnsel=0x44", + b"ltecxgcigpio=0x01", + b"il0macaddr=00:90:4c:c5:12:38", + b"wl0id=0x431b", + b"deadman_to=0xffffffff", + b"muxenab=0x1", + b"spurconfig=0x3", + b"glitch_based_crsmin=1", + b"btc_mode=1", +); From 069a57fcf85c725d000e03163716edb4ae3922ca Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Mon, 11 Jul 2022 00:25:35 +0200 Subject: [PATCH 002/130] async ioctls working. --- examples/rpi-pico-w/src/main.rs | 21 +++- rust-toolchain.toml | 8 ++ src/lib.rs | 200 +++++++++++++++++--------------- src/structs.rs | 71 ++++++++++++ 4 files changed, 202 insertions(+), 98 deletions(-) create mode 100644 rust-toolchain.toml create mode 100644 src/structs.rs diff --git a/examples/rpi-pico-w/src/main.rs b/examples/rpi-pico-w/src/main.rs index de8c5a2b..7545dfde 100644 --- a/examples/rpi-pico-w/src/main.rs +++ b/examples/rpi-pico-w/src/main.rs @@ -6,11 +6,12 @@ use core::slice; use defmt::{assert, assert_eq, panic, *}; use embassy::executor::Spawner; +use embassy::util::Forever; use embassy_rp::gpio::{Flex, Level, Output, Pin}; +use embassy_rp::peripherals::{PIN_23, PIN_24, PIN_25, PIN_29}; use embassy_rp::Peripherals; use {defmt_rtt as _, panic_probe as _}; - macro_rules! forever { ($val:expr) => {{ type T = impl Sized; @@ -19,21 +20,29 @@ macro_rules! forever { }}; } +#[embassy::task] +async fn wifi_task(runner: cyw43::Runner<'static, PIN_23, PIN_25, PIN_29, PIN_24>) -> ! { + runner.run().await +} + #[embassy::main] -async fn main(_spawner: Spawner, p: Peripherals) { +async fn main(spawner: Spawner, p: Peripherals) { info!("Hello World!"); let (pwr, cs, clk, dio) = (p.PIN_23, p.PIN_25, p.PIN_29, p.PIN_24); //let (pwr, cs, clk, dio) = (p.PIN_23, p.PIN_0, p.PIN_1, p.PIN_2); - let mut driver = cyw43::Driver::new( + let state = forever!(cyw43::State::new()); + let (mut control, runner) = cyw43::new( + state, Output::new(pwr, Level::Low), Output::new(cs, Level::High), Output::new(clk, Level::Low), Flex::new(dio), - ); + ) + .await; - driver.init().await; + spawner.spawn(wifi_task(runner)).unwrap(); - loop {} + control.init().await; } diff --git a/rust-toolchain.toml b/rust-toolchain.toml new file mode 100644 index 00000000..03da4cf7 --- /dev/null +++ b/rust-toolchain.toml @@ -0,0 +1,8 @@ +# Before upgrading check that everything is available on all tier1 targets here: +# https://rust-lang.github.io/rustup-components-history +[toolchain] +channel = "nightly-2022-07-09" +components = [ "rust-src", "rustfmt" ] +targets = [ + "thumbv6m-none-eabi", +] diff --git a/src/lib.rs b/src/lib.rs index 5caf1926..3609ecae 100644 --- a/src/lib.rs +++ b/src/lib.rs @@ -1,16 +1,20 @@ #![no_std] #![no_main] -#![feature(type_alias_impl_trait, concat_bytes)] - +#![feature(type_alias_impl_trait, concat_bytes, const_slice_from_raw_parts)] // This mod MUST go first, so that the others see its macros. pub(crate) mod fmt; +mod structs; + +use core::cell::Cell; use core::slice; use embassy::time::{block_for, Duration, Timer}; use embassy::util::yield_now; use embassy_rp::gpio::{Flex, Output, Pin}; +use self::structs::*; + fn swap16(x: u32) -> u32 { (x & 0xFF00FF00) >> 8 | (x & 0x00FF00FF) << 8 } @@ -169,68 +173,73 @@ const CHIP: Chip = Chip { }; #[derive(Clone, Copy)] -#[repr(C)] -struct SdpcmHeader { - len: u16, - len_inv: u16, - /// Rx/Tx sequence number - sequence: u8, - /// 4 MSB Channel number, 4 LSB arbitrary flag - channel_and_flags: u8, - /// Length of next data frame, reserved for Tx - next_length: u8, - /// Data offset - header_length: u8, - /// Flow control bits, reserved for Tx - wireless_flow_control: u8, - /// Maximum Sequence number allowed by firmware for Tx - bus_data_credit: u8, - /// Reserved - reserved: [u8; 2], +enum IoctlState { + Idle, + + Pending { + kind: u32, + cmd: u32, + iface: u32, + buf: *const [u8], + }, + Sent, + Done, } -#[derive(Clone, Copy)] -#[repr(C)] -struct CdcHeader { - cmd: u32, - out_len: u16, - in_len: u16, - flags: u16, - id: u16, - status: u32, +pub struct State { + ioctl_id: Cell, + ioctl_state: Cell, } -#[derive(Clone, Copy)] -#[repr(C)] -struct BdcHeader { - flags: u8, - /// 802.1d Priority (low 3 bits) - priority: u8, - flags2: u8, - /// Offset from end of BDC header to packet data, in 4-uint8_t words. Leaves room for optional headers. - data_offset: u8, -} - -macro_rules! impl_bytes { - ($t:ident) => { - impl $t { - const SIZE: usize = core::mem::size_of::(); - - pub fn to_bytes(&self) -> [u8; Self::SIZE] { - unsafe { core::mem::transmute(*self) } - } - - pub fn from_bytes(bytes: &[u8; Self::SIZE]) -> Self { - unsafe { core::mem::transmute(*bytes) } - } +impl State { + pub fn new() -> Self { + Self { + ioctl_id: Cell::new(0), + ioctl_state: Cell::new(IoctlState::Idle), } - }; + } } -impl_bytes!(SdpcmHeader); -impl_bytes!(CdcHeader); -impl_bytes!(BdcHeader); -pub struct Driver<'a, PWR: Pin, CS: Pin, CLK: Pin, DIO: Pin> { +pub struct Control<'a> { + state: &'a State, +} + +impl<'a> Control<'a> { + pub async fn init(&mut self) { + let clm = unsafe { slice::from_raw_parts(0x10140000 as *const u8, 4752) }; + + let mut buf = [0; 8 + 12 + 1024]; + buf[0..8].copy_from_slice(b"clmload\x00"); + buf[8..20].copy_from_slice(b"\x02\x10\x02\x00\x00\x04\x00\x00\x00\x00\x00\x00"); + buf[20..].copy_from_slice(&clm[..1024]); + self.ioctl(2, 263, 0, &buf).await; + info!("IOCTL done"); + } + + async fn ioctl(&mut self, kind: u32, cmd: u32, iface: u32, buf: &[u8]) { + // TODO cancel ioctl on future drop. + + while !matches!(self.state.ioctl_state.get(), IoctlState::Idle) { + yield_now().await; + } + + self.state.ioctl_id.set(self.state.ioctl_id.get().wrapping_add(1)); + + self.state + .ioctl_state + .set(IoctlState::Pending { kind, cmd, iface, buf }); + + while !matches!(self.state.ioctl_state.get(), IoctlState::Done) { + yield_now().await; + } + + self.state.ioctl_state.set(IoctlState::Idle); + } +} + +pub struct Runner<'a, PWR: Pin, CS: Pin, CLK: Pin, DIO: Pin> { + state: &'a State, + pwr: Output<'a, PWR>, /// SPI chip-select. @@ -249,18 +258,29 @@ pub struct Driver<'a, PWR: Pin, CS: Pin, CLK: Pin, DIO: Pin> { backplane_window: u32, } -impl<'a, PWR: Pin, CS: Pin, CLK: Pin, DIO: Pin> Driver<'a, PWR, CS, CLK, DIO> { - pub fn new(pwr: Output<'a, PWR>, cs: Output<'a, CS>, clk: Output<'a, CLK>, dio: Flex<'a, DIO>) -> Self { - Self { - pwr, - cs, - clk, - dio, - backplane_window: 0xAAAA_AAAA, - } - } +pub async fn new<'a, PWR: Pin, CS: Pin, CLK: Pin, DIO: Pin>( + state: &'a State, + pwr: Output<'a, PWR>, + cs: Output<'a, CS>, + clk: Output<'a, CLK>, + dio: Flex<'a, DIO>, +) -> (Control<'a>, Runner<'a, PWR, CS, CLK, DIO>) { + let mut runner = Runner { + state, + pwr, + cs, + clk, + dio, + backplane_window: 0xAAAA_AAAA, + }; - pub async fn init(&mut self) { + runner.init().await; + + (Control { state }, runner) +} + +impl<'a, PWR: Pin, CS: Pin, CLK: Pin, DIO: Pin> Runner<'a, PWR, CS, CLK, DIO> { + async fn init(&mut self) { // Set strap to select gSPI mode. self.dio.set_as_output(); self.dio.set_low(); @@ -306,6 +326,8 @@ impl<'a, PWR: Pin, CS: Pin, CLK: Pin, DIO: Pin> Driver<'a, PWR, CS, CLK, DIO> { self.bp_write32(CHIP.socsram_base_address + 0x10, 3); self.bp_write32(CHIP.socsram_base_address + 0x44, 0); + let ram_addr = CHIP.atcm_ram_base_address; + // I'm flashing the firmwares independently at hardcoded addresses, instead of baking them // into the program with `include_bytes!` or similar, so that flashing the program stays fast. // @@ -314,9 +336,6 @@ impl<'a, PWR: Pin, CS: Pin, CLK: Pin, DIO: Pin> Driver<'a, PWR, CS, CLK, DIO> { // probe-rs-cli download 43439A0.bin --format bin --chip RP2040 --base-address 0x10100000 // probe-rs-cli download 43439A0.clm_blob --format bin --chip RP2040 --base-address 0x10140000 let fw = unsafe { slice::from_raw_parts(0x10100000 as *const u8, 224190) }; - let clm = unsafe { slice::from_raw_parts(0x10140000 as *const u8, 4752) }; - - let ram_addr = CHIP.atcm_ram_base_address; info!("loading fw"); self.bp_write(ram_addr, fw); @@ -374,17 +393,20 @@ impl<'a, PWR: Pin, CS: Pin, CLK: Pin, DIO: Pin> Driver<'a, PWR, CS, CLK, DIO> { let _ = self.read8(FUNC_BACKPLANE, REG_BACKPLANE_PULL_UP); */ - let mut buf = [0; 8 + 12 + 1024]; - buf[0..8].copy_from_slice(b"clmload\x00"); - buf[8..20].copy_from_slice(b"\x02\x10\x02\x00\x00\x04\x00\x00\x00\x00\x00\x00"); - buf[20..].copy_from_slice(&clm[..1024]); - self.send_ioctl(2, 263, 0, &buf); - info!("init done "); + } + pub async fn run(mut self) -> ! { let mut old_irq = 0; let mut buf = [0; 2048]; loop { + // Send stuff + if let IoctlState::Pending { kind, cmd, iface, buf } = self.state.ioctl_state.get() { + self.send_ioctl(kind, cmd, iface, unsafe { &*buf }, self.state.ioctl_id.get()); + self.state.ioctl_state.set(IoctlState::Sent); + } + + // Receive stuff let irq = self.read16(FUNC_BUS, REG_BUS_INTERRUPT); if irq != old_irq { info!("irq: {:04x}", irq); @@ -419,6 +441,7 @@ impl<'a, PWR: Pin, CS: Pin, CLK: Pin, DIO: Pin> Driver<'a, PWR, CS, CLK, DIO> { } } + // TODO use IRQs yield_now().await; } } @@ -453,14 +476,16 @@ impl<'a, PWR: Pin, CS: Pin, CLK: Pin, DIO: Pin> Driver<'a, PWR, CS, CLK, DIO> { let cdc_header = CdcHeader::from_bytes(packet[SdpcmHeader::SIZE..][..CdcHeader::SIZE].try_into().unwrap()); - // TODO check cdc_header.id matches - // TODO check status + if cdc_header.id == self.state.ioctl_id.get() { + assert_eq!(cdc_header.status, 0); // todo propagate error + self.state.ioctl_state.set(IoctlState::Done); + } } _ => {} } } - fn send_ioctl(&mut self, kind: u32, cmd: u32, iface: u32, data: &[u8]) { + fn send_ioctl(&mut self, kind: u32, cmd: u32, iface: u32, data: &[u8], id: u16) { let mut buf = [0; 2048]; let total_len = SdpcmHeader::SIZE + CdcHeader::SIZE + data.len(); @@ -469,7 +494,7 @@ impl<'a, PWR: Pin, CS: Pin, CLK: Pin, DIO: Pin> Driver<'a, PWR, CS, CLK, DIO> { len: total_len as u16, len_inv: !total_len as u16, sequence: 0x02, // todo - channel_and_flags: 0, // control channle + channel_and_flags: 0, // control channel next_length: 0, header_length: SdpcmHeader::SIZE as _, wireless_flow_control: 0, @@ -482,7 +507,7 @@ impl<'a, PWR: Pin, CS: Pin, CLK: Pin, DIO: Pin> Driver<'a, PWR, CS, CLK, DIO> { out_len: data.len() as _, in_len: 0, flags: kind as u16 | (iface as u16) << 12, - id: 1, // todo + id, status: 0, }; @@ -780,16 +805,13 @@ impl<'a, PWR: Pin, CS: Pin, CLK: Pin, DIO: Pin> Driver<'a, PWR, CS, CLK, DIO> { w |= 0x01; } self.clk.set_high(); - delay(); // falling edge self.clk.set_low(); - delay(); } *word = w } self.clk.set_low(); - delay(); } fn spi_write(&mut self, words: &[u8]) { @@ -804,25 +826,19 @@ impl<'a, PWR: Pin, CS: Pin, CLK: Pin, DIO: Pin> Driver<'a, PWR, CS, CLK, DIO> { } else { self.dio.set_high(); } - delay(); // rising edge self.clk.set_high(); - delay(); word = word << 1; } } self.clk.set_low(); - delay(); + self.dio.set_as_input(); } } -fn delay() { - //cortex_m::asm::delay(5); -} - macro_rules! nvram { ($($s:literal,)*) => { concat_bytes!($($s, b"\x00",)* b"\x00\x00") diff --git a/src/structs.rs b/src/structs.rs new file mode 100644 index 00000000..fe5e89a3 --- /dev/null +++ b/src/structs.rs @@ -0,0 +1,71 @@ +#[derive(Clone, Copy)] +#[repr(C)] +pub struct SdpcmHeader { + pub len: u16, + pub len_inv: u16, + /// Rx/Tx sequence number + pub sequence: u8, + /// 4 MSB Channel number, 4 LSB arbitrary flag + pub channel_and_flags: u8, + /// Length of next data frame, reserved for Tx + pub next_length: u8, + /// Data offset + pub header_length: u8, + /// Flow control bits, reserved for Tx + pub wireless_flow_control: u8, + /// Maximum Sequence number allowed by firmware for Tx + pub bus_data_credit: u8, + /// Reserved + pub reserved: [u8; 2], +} + +#[derive(Clone, Copy)] +#[repr(C)] +pub struct CdcHeader { + pub cmd: u32, + pub out_len: u16, + pub in_len: u16, + pub flags: u16, + pub id: u16, + pub status: u32, +} + +#[derive(Clone, Copy)] +#[repr(C)] +pub struct BdcHeader { + pub flags: u8, + /// 802.1d Priority (low 3 bits) + pub priority: u8, + pub flags2: u8, + /// Offset from end of BDC header to packet data, in 4-uint8_t words. Leaves room for optional headers. + pub data_offset: u8, +} + +#[derive(Clone, Copy)] +#[repr(C)] +pub struct DownloadHeader { + pub flag: u16, + pub dload_type: u16, + pub len: u32, + pub crc: u32, +} + +macro_rules! impl_bytes { + ($t:ident) => { + impl $t { + pub const SIZE: usize = core::mem::size_of::(); + + pub fn to_bytes(&self) -> [u8; Self::SIZE] { + unsafe { core::mem::transmute(*self) } + } + + pub fn from_bytes(bytes: &[u8; Self::SIZE]) -> Self { + unsafe { core::mem::transmute(*bytes) } + } + } + }; +} +impl_bytes!(SdpcmHeader); +impl_bytes!(CdcHeader); +impl_bytes!(BdcHeader); +impl_bytes!(DownloadHeader); From 7ddcacac7bbfaed303dcda7d14ab29cad94fd570 Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Mon, 11 Jul 2022 03:07:39 +0200 Subject: [PATCH 003/130] clm download, country config. --- src/countries.rs | 481 +++++++++++++++++++++++++++++++++++++++++++++++ src/lib.rs | 98 ++++++++-- src/structs.rs | 56 ++++-- 3 files changed, 596 insertions(+), 39 deletions(-) create mode 100644 src/countries.rs diff --git a/src/countries.rs b/src/countries.rs new file mode 100644 index 00000000..fa1e8cac --- /dev/null +++ b/src/countries.rs @@ -0,0 +1,481 @@ +#![allow(unused)] + +pub struct Country { + pub code: [u8; 2], + pub rev: u16, +} + +/// AF Afghanistan +pub const AFGHANISTAN: Country = Country { code: *b"AF", rev: 0 }; +/// AL Albania +pub const ALBANIA: Country = Country { code: *b"AL", rev: 0 }; +/// DZ Algeria +pub const ALGERIA: Country = Country { code: *b"DZ", rev: 0 }; +/// AS American_Samoa +pub const AMERICAN_SAMOA: Country = Country { code: *b"AS", rev: 0 }; +/// AO Angola +pub const ANGOLA: Country = Country { code: *b"AO", rev: 0 }; +/// AI Anguilla +pub const ANGUILLA: Country = Country { code: *b"AI", rev: 0 }; +/// AG Antigua_and_Barbuda +pub const ANTIGUA_AND_BARBUDA: Country = Country { code: *b"AG", rev: 0 }; +/// AR Argentina +pub const ARGENTINA: Country = Country { code: *b"AR", rev: 0 }; +/// AM Armenia +pub const ARMENIA: Country = Country { code: *b"AM", rev: 0 }; +/// AW Aruba +pub const ARUBA: Country = Country { code: *b"AW", rev: 0 }; +/// AU Australia +pub const AUSTRALIA: Country = Country { code: *b"AU", rev: 0 }; +/// AT Austria +pub const AUSTRIA: Country = Country { code: *b"AT", rev: 0 }; +/// AZ Azerbaijan +pub const AZERBAIJAN: Country = Country { code: *b"AZ", rev: 0 }; +/// BS Bahamas +pub const BAHAMAS: Country = Country { code: *b"BS", rev: 0 }; +/// BH Bahrain +pub const BAHRAIN: Country = Country { code: *b"BH", rev: 0 }; +/// 0B Baker_Island +pub const BAKER_ISLAND: Country = Country { code: *b"0B", rev: 0 }; +/// BD Bangladesh +pub const BANGLADESH: Country = Country { code: *b"BD", rev: 0 }; +/// BB Barbados +pub const BARBADOS: Country = Country { code: *b"BB", rev: 0 }; +/// BY Belarus +pub const BELARUS: Country = Country { code: *b"BY", rev: 0 }; +/// BE Belgium +pub const BELGIUM: Country = Country { code: *b"BE", rev: 0 }; +/// BZ Belize +pub const BELIZE: Country = Country { code: *b"BZ", rev: 0 }; +/// BJ Benin +pub const BENIN: Country = Country { code: *b"BJ", rev: 0 }; +/// BM Bermuda +pub const BERMUDA: Country = Country { code: *b"BM", rev: 0 }; +/// BT Bhutan +pub const BHUTAN: Country = Country { code: *b"BT", rev: 0 }; +/// BO Bolivia +pub const BOLIVIA: Country = Country { code: *b"BO", rev: 0 }; +/// BA Bosnia_and_Herzegovina +pub const BOSNIA_AND_HERZEGOVINA: Country = Country { code: *b"BA", rev: 0 }; +/// BW Botswana +pub const BOTSWANA: Country = Country { code: *b"BW", rev: 0 }; +/// BR Brazil +pub const BRAZIL: Country = Country { code: *b"BR", rev: 0 }; +/// IO British_Indian_Ocean_Territory +pub const BRITISH_INDIAN_OCEAN_TERRITORY: Country = Country { code: *b"IO", rev: 0 }; +/// BN Brunei_Darussalam +pub const BRUNEI_DARUSSALAM: Country = Country { code: *b"BN", rev: 0 }; +/// BG Bulgaria +pub const BULGARIA: Country = Country { code: *b"BG", rev: 0 }; +/// BF Burkina_Faso +pub const BURKINA_FASO: Country = Country { code: *b"BF", rev: 0 }; +/// BI Burundi +pub const BURUNDI: Country = Country { code: *b"BI", rev: 0 }; +/// KH Cambodia +pub const CAMBODIA: Country = Country { code: *b"KH", rev: 0 }; +/// CM Cameroon +pub const CAMEROON: Country = Country { code: *b"CM", rev: 0 }; +/// CA Canada +pub const CANADA: Country = Country { code: *b"CA", rev: 0 }; +/// CA Canada Revision 950 +pub const CANADA_REV950: Country = Country { code: *b"CA", rev: 950 }; +/// CV Cape_Verde +pub const CAPE_VERDE: Country = Country { code: *b"CV", rev: 0 }; +/// KY Cayman_Islands +pub const CAYMAN_ISLANDS: Country = Country { code: *b"KY", rev: 0 }; +/// CF Central_African_Republic +pub const CENTRAL_AFRICAN_REPUBLIC: Country = Country { code: *b"CF", rev: 0 }; +/// TD Chad +pub const CHAD: Country = Country { code: *b"TD", rev: 0 }; +/// CL Chile +pub const CHILE: Country = Country { code: *b"CL", rev: 0 }; +/// CN China +pub const CHINA: Country = Country { code: *b"CN", rev: 0 }; +/// CX Christmas_Island +pub const CHRISTMAS_ISLAND: Country = Country { code: *b"CX", rev: 0 }; +/// CO Colombia +pub const COLOMBIA: Country = Country { code: *b"CO", rev: 0 }; +/// KM Comoros +pub const COMOROS: Country = Country { code: *b"KM", rev: 0 }; +/// CG Congo +pub const CONGO: Country = Country { code: *b"CG", rev: 0 }; +/// CD Congo,_The_Democratic_Republic_Of_The +pub const CONGO_THE_DEMOCRATIC_REPUBLIC_OF_THE: Country = Country { code: *b"CD", rev: 0 }; +/// CR Costa_Rica +pub const COSTA_RICA: Country = Country { code: *b"CR", rev: 0 }; +/// CI Cote_D'ivoire +pub const COTE_DIVOIRE: Country = Country { code: *b"CI", rev: 0 }; +/// HR Croatia +pub const CROATIA: Country = Country { code: *b"HR", rev: 0 }; +/// CU Cuba +pub const CUBA: Country = Country { code: *b"CU", rev: 0 }; +/// CY Cyprus +pub const CYPRUS: Country = Country { code: *b"CY", rev: 0 }; +/// CZ Czech_Republic +pub const CZECH_REPUBLIC: Country = Country { code: *b"CZ", rev: 0 }; +/// DK Denmark +pub const DENMARK: Country = Country { code: *b"DK", rev: 0 }; +/// DJ Djibouti +pub const DJIBOUTI: Country = Country { code: *b"DJ", rev: 0 }; +/// DM Dominica +pub const DOMINICA: Country = Country { code: *b"DM", rev: 0 }; +/// DO Dominican_Republic +pub const DOMINICAN_REPUBLIC: Country = Country { code: *b"DO", rev: 0 }; +/// AU G'Day mate! +pub const DOWN_UNDER: Country = Country { code: *b"AU", rev: 0 }; +/// EC Ecuador +pub const ECUADOR: Country = Country { code: *b"EC", rev: 0 }; +/// EG Egypt +pub const EGYPT: Country = Country { code: *b"EG", rev: 0 }; +/// SV El_Salvador +pub const EL_SALVADOR: Country = Country { code: *b"SV", rev: 0 }; +/// GQ Equatorial_Guinea +pub const EQUATORIAL_GUINEA: Country = Country { code: *b"GQ", rev: 0 }; +/// ER Eritrea +pub const ERITREA: Country = Country { code: *b"ER", rev: 0 }; +/// EE Estonia +pub const ESTONIA: Country = Country { code: *b"EE", rev: 0 }; +/// ET Ethiopia +pub const ETHIOPIA: Country = Country { code: *b"ET", rev: 0 }; +/// FK Falkland_Islands_(Malvinas) +pub const FALKLAND_ISLANDS_MALVINAS: Country = Country { code: *b"FK", rev: 0 }; +/// FO Faroe_Islands +pub const FAROE_ISLANDS: Country = Country { code: *b"FO", rev: 0 }; +/// FJ Fiji +pub const FIJI: Country = Country { code: *b"FJ", rev: 0 }; +/// FI Finland +pub const FINLAND: Country = Country { code: *b"FI", rev: 0 }; +/// FR France +pub const FRANCE: Country = Country { code: *b"FR", rev: 0 }; +/// GF French_Guina +pub const FRENCH_GUINA: Country = Country { code: *b"GF", rev: 0 }; +/// PF French_Polynesia +pub const FRENCH_POLYNESIA: Country = Country { code: *b"PF", rev: 0 }; +/// TF French_Southern_Territories +pub const FRENCH_SOUTHERN_TERRITORIES: Country = Country { code: *b"TF", rev: 0 }; +/// GA Gabon +pub const GABON: Country = Country { code: *b"GA", rev: 0 }; +/// GM Gambia +pub const GAMBIA: Country = Country { code: *b"GM", rev: 0 }; +/// GE Georgia +pub const GEORGIA: Country = Country { code: *b"GE", rev: 0 }; +/// DE Germany +pub const GERMANY: Country = Country { code: *b"DE", rev: 0 }; +/// E0 European_Wide Revision 895 +pub const EUROPEAN_WIDE_REV895: Country = Country { code: *b"E0", rev: 895 }; +/// GH Ghana +pub const GHANA: Country = Country { code: *b"GH", rev: 0 }; +/// GI Gibraltar +pub const GIBRALTAR: Country = Country { code: *b"GI", rev: 0 }; +/// GR Greece +pub const GREECE: Country = Country { code: *b"GR", rev: 0 }; +/// GD Grenada +pub const GRENADA: Country = Country { code: *b"GD", rev: 0 }; +/// GP Guadeloupe +pub const GUADELOUPE: Country = Country { code: *b"GP", rev: 0 }; +/// GU Guam +pub const GUAM: Country = Country { code: *b"GU", rev: 0 }; +/// GT Guatemala +pub const GUATEMALA: Country = Country { code: *b"GT", rev: 0 }; +/// GG Guernsey +pub const GUERNSEY: Country = Country { code: *b"GG", rev: 0 }; +/// GN Guinea +pub const GUINEA: Country = Country { code: *b"GN", rev: 0 }; +/// GW Guinea-bissau +pub const GUINEA_BISSAU: Country = Country { code: *b"GW", rev: 0 }; +/// GY Guyana +pub const GUYANA: Country = Country { code: *b"GY", rev: 0 }; +/// HT Haiti +pub const HAITI: Country = Country { code: *b"HT", rev: 0 }; +/// VA Holy_See_(Vatican_City_State) +pub const HOLY_SEE_VATICAN_CITY_STATE: Country = Country { code: *b"VA", rev: 0 }; +/// HN Honduras +pub const HONDURAS: Country = Country { code: *b"HN", rev: 0 }; +/// HK Hong_Kong +pub const HONG_KONG: Country = Country { code: *b"HK", rev: 0 }; +/// HU Hungary +pub const HUNGARY: Country = Country { code: *b"HU", rev: 0 }; +/// IS Iceland +pub const ICELAND: Country = Country { code: *b"IS", rev: 0 }; +/// IN India +pub const INDIA: Country = Country { code: *b"IN", rev: 0 }; +/// ID Indonesia +pub const INDONESIA: Country = Country { code: *b"ID", rev: 0 }; +/// IR Iran,_Islamic_Republic_Of +pub const IRAN_ISLAMIC_REPUBLIC_OF: Country = Country { code: *b"IR", rev: 0 }; +/// IQ Iraq +pub const IRAQ: Country = Country { code: *b"IQ", rev: 0 }; +/// IE Ireland +pub const IRELAND: Country = Country { code: *b"IE", rev: 0 }; +/// IL Israel +pub const ISRAEL: Country = Country { code: *b"IL", rev: 0 }; +/// IT Italy +pub const ITALY: Country = Country { code: *b"IT", rev: 0 }; +/// JM Jamaica +pub const JAMAICA: Country = Country { code: *b"JM", rev: 0 }; +/// JP Japan +pub const JAPAN: Country = Country { code: *b"JP", rev: 0 }; +/// JE Jersey +pub const JERSEY: Country = Country { code: *b"JE", rev: 0 }; +/// JO Jordan +pub const JORDAN: Country = Country { code: *b"JO", rev: 0 }; +/// KZ Kazakhstan +pub const KAZAKHSTAN: Country = Country { code: *b"KZ", rev: 0 }; +/// KE Kenya +pub const KENYA: Country = Country { code: *b"KE", rev: 0 }; +/// KI Kiribati +pub const KIRIBATI: Country = Country { code: *b"KI", rev: 0 }; +/// KR Korea,_Republic_Of +pub const KOREA_REPUBLIC_OF: Country = Country { code: *b"KR", rev: 1 }; +/// 0A Kosovo +pub const KOSOVO: Country = Country { code: *b"0A", rev: 0 }; +/// KW Kuwait +pub const KUWAIT: Country = Country { code: *b"KW", rev: 0 }; +/// KG Kyrgyzstan +pub const KYRGYZSTAN: Country = Country { code: *b"KG", rev: 0 }; +/// LA Lao_People's_Democratic_Repubic +pub const LAO_PEOPLES_DEMOCRATIC_REPUBIC: Country = Country { code: *b"LA", rev: 0 }; +/// LV Latvia +pub const LATVIA: Country = Country { code: *b"LV", rev: 0 }; +/// LB Lebanon +pub const LEBANON: Country = Country { code: *b"LB", rev: 0 }; +/// LS Lesotho +pub const LESOTHO: Country = Country { code: *b"LS", rev: 0 }; +/// LR Liberia +pub const LIBERIA: Country = Country { code: *b"LR", rev: 0 }; +/// LY Libyan_Arab_Jamahiriya +pub const LIBYAN_ARAB_JAMAHIRIYA: Country = Country { code: *b"LY", rev: 0 }; +/// LI Liechtenstein +pub const LIECHTENSTEIN: Country = Country { code: *b"LI", rev: 0 }; +/// LT Lithuania +pub const LITHUANIA: Country = Country { code: *b"LT", rev: 0 }; +/// LU Luxembourg +pub const LUXEMBOURG: Country = Country { code: *b"LU", rev: 0 }; +/// MO Macao +pub const MACAO: Country = Country { code: *b"MO", rev: 0 }; +/// MK Macedonia,_Former_Yugoslav_Republic_Of +pub const MACEDONIA_FORMER_YUGOSLAV_REPUBLIC_OF: Country = Country { code: *b"MK", rev: 0 }; +/// MG Madagascar +pub const MADAGASCAR: Country = Country { code: *b"MG", rev: 0 }; +/// MW Malawi +pub const MALAWI: Country = Country { code: *b"MW", rev: 0 }; +/// MY Malaysia +pub const MALAYSIA: Country = Country { code: *b"MY", rev: 0 }; +/// MV Maldives +pub const MALDIVES: Country = Country { code: *b"MV", rev: 0 }; +/// ML Mali +pub const MALI: Country = Country { code: *b"ML", rev: 0 }; +/// MT Malta +pub const MALTA: Country = Country { code: *b"MT", rev: 0 }; +/// IM Man,_Isle_Of +pub const MAN_ISLE_OF: Country = Country { code: *b"IM", rev: 0 }; +/// MQ Martinique +pub const MARTINIQUE: Country = Country { code: *b"MQ", rev: 0 }; +/// MR Mauritania +pub const MAURITANIA: Country = Country { code: *b"MR", rev: 0 }; +/// MU Mauritius +pub const MAURITIUS: Country = Country { code: *b"MU", rev: 0 }; +/// YT Mayotte +pub const MAYOTTE: Country = Country { code: *b"YT", rev: 0 }; +/// MX Mexico +pub const MEXICO: Country = Country { code: *b"MX", rev: 0 }; +/// FM Micronesia,_Federated_States_Of +pub const MICRONESIA_FEDERATED_STATES_OF: Country = Country { code: *b"FM", rev: 0 }; +/// MD Moldova,_Republic_Of +pub const MOLDOVA_REPUBLIC_OF: Country = Country { code: *b"MD", rev: 0 }; +/// MC Monaco +pub const MONACO: Country = Country { code: *b"MC", rev: 0 }; +/// MN Mongolia +pub const MONGOLIA: Country = Country { code: *b"MN", rev: 0 }; +/// ME Montenegro +pub const MONTENEGRO: Country = Country { code: *b"ME", rev: 0 }; +/// MS Montserrat +pub const MONTSERRAT: Country = Country { code: *b"MS", rev: 0 }; +/// MA Morocco +pub const MOROCCO: Country = Country { code: *b"MA", rev: 0 }; +/// MZ Mozambique +pub const MOZAMBIQUE: Country = Country { code: *b"MZ", rev: 0 }; +/// MM Myanmar +pub const MYANMAR: Country = Country { code: *b"MM", rev: 0 }; +/// NA Namibia +pub const NAMIBIA: Country = Country { code: *b"NA", rev: 0 }; +/// NR Nauru +pub const NAURU: Country = Country { code: *b"NR", rev: 0 }; +/// NP Nepal +pub const NEPAL: Country = Country { code: *b"NP", rev: 0 }; +/// NL Netherlands +pub const NETHERLANDS: Country = Country { code: *b"NL", rev: 0 }; +/// AN Netherlands_Antilles +pub const NETHERLANDS_ANTILLES: Country = Country { code: *b"AN", rev: 0 }; +/// NC New_Caledonia +pub const NEW_CALEDONIA: Country = Country { code: *b"NC", rev: 0 }; +/// NZ New_Zealand +pub const NEW_ZEALAND: Country = Country { code: *b"NZ", rev: 0 }; +/// NI Nicaragua +pub const NICARAGUA: Country = Country { code: *b"NI", rev: 0 }; +/// NE Niger +pub const NIGER: Country = Country { code: *b"NE", rev: 0 }; +/// NG Nigeria +pub const NIGERIA: Country = Country { code: *b"NG", rev: 0 }; +/// NF Norfolk_Island +pub const NORFOLK_ISLAND: Country = Country { code: *b"NF", rev: 0 }; +/// MP Northern_Mariana_Islands +pub const NORTHERN_MARIANA_ISLANDS: Country = Country { code: *b"MP", rev: 0 }; +/// NO Norway +pub const NORWAY: Country = Country { code: *b"NO", rev: 0 }; +/// OM Oman +pub const OMAN: Country = Country { code: *b"OM", rev: 0 }; +/// PK Pakistan +pub const PAKISTAN: Country = Country { code: *b"PK", rev: 0 }; +/// PW Palau +pub const PALAU: Country = Country { code: *b"PW", rev: 0 }; +/// PA Panama +pub const PANAMA: Country = Country { code: *b"PA", rev: 0 }; +/// PG Papua_New_Guinea +pub const PAPUA_NEW_GUINEA: Country = Country { code: *b"PG", rev: 0 }; +/// PY Paraguay +pub const PARAGUAY: Country = Country { code: *b"PY", rev: 0 }; +/// PE Peru +pub const PERU: Country = Country { code: *b"PE", rev: 0 }; +/// PH Philippines +pub const PHILIPPINES: Country = Country { code: *b"PH", rev: 0 }; +/// PL Poland +pub const POLAND: Country = Country { code: *b"PL", rev: 0 }; +/// PT Portugal +pub const PORTUGAL: Country = Country { code: *b"PT", rev: 0 }; +/// PR Pueto_Rico +pub const PUETO_RICO: Country = Country { code: *b"PR", rev: 0 }; +/// QA Qatar +pub const QATAR: Country = Country { code: *b"QA", rev: 0 }; +/// RE Reunion +pub const REUNION: Country = Country { code: *b"RE", rev: 0 }; +/// RO Romania +pub const ROMANIA: Country = Country { code: *b"RO", rev: 0 }; +/// RU Russian_Federation +pub const RUSSIAN_FEDERATION: Country = Country { code: *b"RU", rev: 0 }; +/// RW Rwanda +pub const RWANDA: Country = Country { code: *b"RW", rev: 0 }; +/// KN Saint_Kitts_and_Nevis +pub const SAINT_KITTS_AND_NEVIS: Country = Country { code: *b"KN", rev: 0 }; +/// LC Saint_Lucia +pub const SAINT_LUCIA: Country = Country { code: *b"LC", rev: 0 }; +/// PM Saint_Pierre_and_Miquelon +pub const SAINT_PIERRE_AND_MIQUELON: Country = Country { code: *b"PM", rev: 0 }; +/// VC Saint_Vincent_and_The_Grenadines +pub const SAINT_VINCENT_AND_THE_GRENADINES: Country = Country { code: *b"VC", rev: 0 }; +/// WS Samoa +pub const SAMOA: Country = Country { code: *b"WS", rev: 0 }; +/// MF Sanit_Martin_/_Sint_Marteen +pub const SANIT_MARTIN_SINT_MARTEEN: Country = Country { code: *b"MF", rev: 0 }; +/// ST Sao_Tome_and_Principe +pub const SAO_TOME_AND_PRINCIPE: Country = Country { code: *b"ST", rev: 0 }; +/// SA Saudi_Arabia +pub const SAUDI_ARABIA: Country = Country { code: *b"SA", rev: 0 }; +/// SN Senegal +pub const SENEGAL: Country = Country { code: *b"SN", rev: 0 }; +/// RS Serbia +pub const SERBIA: Country = Country { code: *b"RS", rev: 0 }; +/// SC Seychelles +pub const SEYCHELLES: Country = Country { code: *b"SC", rev: 0 }; +/// SL Sierra_Leone +pub const SIERRA_LEONE: Country = Country { code: *b"SL", rev: 0 }; +/// SG Singapore +pub const SINGAPORE: Country = Country { code: *b"SG", rev: 0 }; +/// SK Slovakia +pub const SLOVAKIA: Country = Country { code: *b"SK", rev: 0 }; +/// SI Slovenia +pub const SLOVENIA: Country = Country { code: *b"SI", rev: 0 }; +/// SB Solomon_Islands +pub const SOLOMON_ISLANDS: Country = Country { code: *b"SB", rev: 0 }; +/// SO Somalia +pub const SOMALIA: Country = Country { code: *b"SO", rev: 0 }; +/// ZA South_Africa +pub const SOUTH_AFRICA: Country = Country { code: *b"ZA", rev: 0 }; +/// ES Spain +pub const SPAIN: Country = Country { code: *b"ES", rev: 0 }; +/// LK Sri_Lanka +pub const SRI_LANKA: Country = Country { code: *b"LK", rev: 0 }; +/// SR Suriname +pub const SURINAME: Country = Country { code: *b"SR", rev: 0 }; +/// SZ Swaziland +pub const SWAZILAND: Country = Country { code: *b"SZ", rev: 0 }; +/// SE Sweden +pub const SWEDEN: Country = Country { code: *b"SE", rev: 0 }; +/// CH Switzerland +pub const SWITZERLAND: Country = Country { code: *b"CH", rev: 0 }; +/// SY Syrian_Arab_Republic +pub const SYRIAN_ARAB_REPUBLIC: Country = Country { code: *b"SY", rev: 0 }; +/// TW Taiwan,_Province_Of_China +pub const TAIWAN_PROVINCE_OF_CHINA: Country = Country { code: *b"TW", rev: 0 }; +/// TJ Tajikistan +pub const TAJIKISTAN: Country = Country { code: *b"TJ", rev: 0 }; +/// TZ Tanzania,_United_Republic_Of +pub const TANZANIA_UNITED_REPUBLIC_OF: Country = Country { code: *b"TZ", rev: 0 }; +/// TH Thailand +pub const THAILAND: Country = Country { code: *b"TH", rev: 0 }; +/// TG Togo +pub const TOGO: Country = Country { code: *b"TG", rev: 0 }; +/// TO Tonga +pub const TONGA: Country = Country { code: *b"TO", rev: 0 }; +/// TT Trinidad_and_Tobago +pub const TRINIDAD_AND_TOBAGO: Country = Country { code: *b"TT", rev: 0 }; +/// TN Tunisia +pub const TUNISIA: Country = Country { code: *b"TN", rev: 0 }; +/// TR Turkey +pub const TURKEY: Country = Country { code: *b"TR", rev: 0 }; +/// TM Turkmenistan +pub const TURKMENISTAN: Country = Country { code: *b"TM", rev: 0 }; +/// TC Turks_and_Caicos_Islands +pub const TURKS_AND_CAICOS_ISLANDS: Country = Country { code: *b"TC", rev: 0 }; +/// TV Tuvalu +pub const TUVALU: Country = Country { code: *b"TV", rev: 0 }; +/// UG Uganda +pub const UGANDA: Country = Country { code: *b"UG", rev: 0 }; +/// UA Ukraine +pub const UKRAINE: Country = Country { code: *b"UA", rev: 0 }; +/// AE United_Arab_Emirates +pub const UNITED_ARAB_EMIRATES: Country = Country { code: *b"AE", rev: 0 }; +/// GB United_Kingdom +pub const UNITED_KINGDOM: Country = Country { code: *b"GB", rev: 0 }; +/// US United_States +pub const UNITED_STATES: Country = Country { code: *b"US", rev: 0 }; +/// US United_States Revision 4 +pub const UNITED_STATES_REV4: Country = Country { code: *b"US", rev: 4 }; +/// Q1 United_States Revision 931 +pub const UNITED_STATES_REV931: Country = Country { code: *b"Q1", rev: 931 }; +/// Q2 United_States_(No_DFS) +pub const UNITED_STATES_NO_DFS: Country = Country { code: *b"Q2", rev: 0 }; +/// UM United_States_Minor_Outlying_Islands +pub const UNITED_STATES_MINOR_OUTLYING_ISLANDS: Country = Country { code: *b"UM", rev: 0 }; +/// UY Uruguay +pub const URUGUAY: Country = Country { code: *b"UY", rev: 0 }; +/// UZ Uzbekistan +pub const UZBEKISTAN: Country = Country { code: *b"UZ", rev: 0 }; +/// VU Vanuatu +pub const VANUATU: Country = Country { code: *b"VU", rev: 0 }; +/// VE Venezuela +pub const VENEZUELA: Country = Country { code: *b"VE", rev: 0 }; +/// VN Viet_Nam +pub const VIET_NAM: Country = Country { code: *b"VN", rev: 0 }; +/// VG Virgin_Islands,_British +pub const VIRGIN_ISLANDS_BRITISH: Country = Country { code: *b"VG", rev: 0 }; +/// VI Virgin_Islands,_U.S. +pub const VIRGIN_ISLANDS_US: Country = Country { code: *b"VI", rev: 0 }; +/// WF Wallis_and_Futuna +pub const WALLIS_AND_FUTUNA: Country = Country { code: *b"WF", rev: 0 }; +/// 0C West_Bank +pub const WEST_BANK: Country = Country { code: *b"0C", rev: 0 }; +/// EH Western_Sahara +pub const WESTERN_SAHARA: Country = Country { code: *b"EH", rev: 0 }; +/// Worldwide Locale Revision 983 +pub const WORLD_WIDE_XV_REV983: Country = Country { code: *b"XV", rev: 983 }; +/// Worldwide Locale (passive Ch12-14) +pub const WORLD_WIDE_XX: Country = Country { code: *b"XX", rev: 0 }; +/// Worldwide Locale (passive Ch12-14) Revision 17 +pub const WORLD_WIDE_XX_REV17: Country = Country { code: *b"XX", rev: 17 }; +/// YE Yemen +pub const YEMEN: Country = Country { code: *b"YE", rev: 0 }; +/// ZM Zambia +pub const ZAMBIA: Country = Country { code: *b"ZM", rev: 0 }; +/// ZW Zimbabwe +pub const ZIMBABWE: Country = Country { code: *b"ZW", rev: 0 }; diff --git a/src/lib.rs b/src/lib.rs index 3609ecae..698c52f4 100644 --- a/src/lib.rs +++ b/src/lib.rs @@ -1,9 +1,12 @@ #![no_std] #![no_main] #![feature(type_alias_impl_trait, concat_bytes, const_slice_from_raw_parts)] +#![deny(unused_must_use)] + // This mod MUST go first, so that the others see its macros. pub(crate) mod fmt; +mod countries; mod structs; use core::cell::Cell; @@ -206,14 +209,67 @@ pub struct Control<'a> { impl<'a> Control<'a> { pub async fn init(&mut self) { + const CHUNK_SIZE: usize = 1024; + let clm = unsafe { slice::from_raw_parts(0x10140000 as *const u8, 4752) }; - let mut buf = [0; 8 + 12 + 1024]; - buf[0..8].copy_from_slice(b"clmload\x00"); - buf[8..20].copy_from_slice(b"\x02\x10\x02\x00\x00\x04\x00\x00\x00\x00\x00\x00"); - buf[20..].copy_from_slice(&clm[..1024]); - self.ioctl(2, 263, 0, &buf).await; - info!("IOCTL done"); + info!("Downloading CLM..."); + + let mut offs = 0; + for chunk in clm.chunks(CHUNK_SIZE) { + let mut flag = DOWNLOAD_FLAG_HANDLER_VER; + if offs == 0 { + flag |= DOWNLOAD_FLAG_BEGIN; + } + offs += chunk.len(); + if offs == clm.len() { + flag |= DOWNLOAD_FLAG_END; + } + + let header = DownloadHeader { + flag, + dload_type: DOWNLOAD_TYPE_CLM, + len: chunk.len() as _, + crc: 0, + }; + let mut buf = [0; 8 + 12 + CHUNK_SIZE]; + buf[0..8].copy_from_slice(b"clmload\x00"); + buf[8..20].copy_from_slice(&header.to_bytes()); + buf[20..][..chunk.len()].copy_from_slice(&chunk); + self.ioctl(2, 263, 0, &buf[..8 + 12 + chunk.len()]).await; + } + + info!("Configuring misc stuff..."); + + self.set_iovar_u32("bus:txglom", 0).await; + self.set_iovar_u32("apsta", 1).await; + self.set_iovar("cur_etheraddr", &[02, 03, 04, 05, 06, 07]).await; + + let country = countries::WORLD_WIDE_XX; + let country_info = CountryInfo { + country_abbrev: [country.code[0], country.code[1], 0, 0], + country_code: [country.code[0], country.code[1], 0, 0], + rev: if country.rev == 0 { -1 } else { country.rev as _ }, + }; + self.set_iovar("country", &country_info.to_bytes()).await; + + info!("INIT DONE"); + } + + async fn set_iovar_u32(&mut self, name: &str, val: u32) { + self.set_iovar(name, &val.to_le_bytes()).await + } + + async fn set_iovar(&mut self, name: &str, val: &[u8]) { + info!("set {} = {:02x}", name, val); + + let mut buf = [0; 64]; + buf[..name.len()].copy_from_slice(name.as_bytes()); + buf[name.len()] = 0; + buf[name.len() + 1..][..val.len()].copy_from_slice(val); + + let total_len = name.len() + 1 + val.len(); + self.ioctl(2, 263, 0, &buf[..total_len]).await; } async fn ioctl(&mut self, kind: u32, cmd: u32, iface: u32, buf: &[u8]) { @@ -255,6 +311,7 @@ pub struct Runner<'a, PWR: Pin, CS: Pin, CLK: Pin, DIO: Pin> { /// - strap to set to gSPI mode on boot. dio: Flex<'a, DIO>, + ioctl_seq: u8, backplane_window: u32, } @@ -271,6 +328,8 @@ pub async fn new<'a, PWR: Pin, CS: Pin, CLK: Pin, DIO: Pin>( cs, clk, dio, + + ioctl_seq: 0, backplane_window: 0xAAAA_AAAA, }; @@ -397,7 +456,6 @@ impl<'a, PWR: Pin, CS: Pin, CLK: Pin, DIO: Pin> Runner<'a, PWR, CS, CLK, DIO> { } pub async fn run(mut self) -> ! { - let mut old_irq = 0; let mut buf = [0; 2048]; loop { // Send stuff @@ -408,10 +466,6 @@ impl<'a, PWR: Pin, CS: Pin, CLK: Pin, DIO: Pin> Runner<'a, PWR, CS, CLK, DIO> { // Receive stuff let irq = self.read16(FUNC_BUS, REG_BUS_INTERRUPT); - if irq != old_irq { - info!("irq: {:04x}", irq); - } - old_irq = irq; if irq & IRQ_F2_PACKET_AVAILABLE != 0 { let mut status = 0xFFFF_FFFF; @@ -421,7 +475,6 @@ impl<'a, PWR: Pin, CS: Pin, CLK: Pin, DIO: Pin> Runner<'a, PWR, CS, CLK, DIO> { if status & STATUS_F2_PKT_AVAILABLE != 0 { let len = (status & STATUS_F2_PKT_LEN_MASK) >> STATUS_F2_PKT_LEN_SHIFT; - info!("got len {}", len); let cmd = cmd_word(false, true, FUNC_WLAN, 0, len); @@ -435,7 +488,7 @@ impl<'a, PWR: Pin, CS: Pin, CLK: Pin, DIO: Pin> Runner<'a, PWR, CS, CLK, DIO> { } self.cs.set_high(); - info!("rxd packet {:02x}", &buf[..len as usize]); + info!("rx {:02x}", &buf[..(len as usize).min(48)]); self.rx(&buf[..len as usize]); } @@ -466,15 +519,17 @@ impl<'a, PWR: Pin, CS: Pin, CLK: Pin, DIO: Pin> Runner<'a, PWR, CS, CLK, DIO> { let channel = sdpcm_header.channel_and_flags & 0x0f; + let payload = &packet[sdpcm_header.header_length as _..]; + match channel { 0 => { - if packet.len() < SdpcmHeader::SIZE + CdcHeader::SIZE { - warn!("control packet too short, len={}", packet.len()); + if payload.len() < CdcHeader::SIZE { + warn!("payload too short, len={}", payload.len()); return; } let cdc_header = - CdcHeader::from_bytes(packet[SdpcmHeader::SIZE..][..CdcHeader::SIZE].try_into().unwrap()); + CdcHeader::from_bytes(payload[..CdcHeader::SIZE].try_into().unwrap()); if cdc_header.id == self.state.ioctl_id.get() { assert_eq!(cdc_header.status, 0); // todo propagate error @@ -490,10 +545,13 @@ impl<'a, PWR: Pin, CS: Pin, CLK: Pin, DIO: Pin> Runner<'a, PWR, CS, CLK, DIO> { let total_len = SdpcmHeader::SIZE + CdcHeader::SIZE + data.len(); + let seq = self.ioctl_seq; + self.ioctl_seq = self.ioctl_seq.wrapping_add(1); + let sdpcm_header = SdpcmHeader { - len: total_len as u16, + len: total_len as u16, // TODO does this len need to be rounded up to u32? len_inv: !total_len as u16, - sequence: 0x02, // todo + sequence: seq, channel_and_flags: 0, // control channel next_length: 0, header_length: SdpcmHeader::SIZE as _, @@ -515,7 +573,9 @@ impl<'a, PWR: Pin, CS: Pin, CLK: Pin, DIO: Pin> Runner<'a, PWR, CS, CLK, DIO> { buf[SdpcmHeader::SIZE..][..CdcHeader::SIZE].copy_from_slice(&cdc_header.to_bytes()); buf[SdpcmHeader::SIZE + CdcHeader::SIZE..][..data.len()].copy_from_slice(data); - info!("txing {:02x}", &buf[..total_len]); + let total_len = (total_len + 3) & !3; // round up to 4byte + + info!("tx {:02x}", &buf[..total_len.min(48)]); let cmd = cmd_word(true, true, FUNC_WLAN, 0, total_len as _); self.cs.set_low(); diff --git a/src/structs.rs b/src/structs.rs index fe5e89a3..bce9ab9f 100644 --- a/src/structs.rs +++ b/src/structs.rs @@ -1,3 +1,19 @@ +macro_rules! impl_bytes { + ($t:ident) => { + impl $t { + pub const SIZE: usize = core::mem::size_of::(); + + pub fn to_bytes(&self) -> [u8; Self::SIZE] { + unsafe { core::mem::transmute(*self) } + } + + pub fn from_bytes(bytes: &[u8; Self::SIZE]) -> Self { + unsafe { core::mem::transmute(*bytes) } + } + } + }; +} + #[derive(Clone, Copy)] #[repr(C)] pub struct SdpcmHeader { @@ -18,6 +34,7 @@ pub struct SdpcmHeader { /// Reserved pub reserved: [u8; 2], } +impl_bytes!(SdpcmHeader); #[derive(Clone, Copy)] #[repr(C)] @@ -29,6 +46,7 @@ pub struct CdcHeader { pub id: u16, pub status: u32, } +impl_bytes!(CdcHeader); #[derive(Clone, Copy)] #[repr(C)] @@ -40,32 +58,30 @@ pub struct BdcHeader { /// Offset from end of BDC header to packet data, in 4-uint8_t words. Leaves room for optional headers. pub data_offset: u8, } +impl_bytes!(BdcHeader); #[derive(Clone, Copy)] #[repr(C)] pub struct DownloadHeader { - pub flag: u16, + pub flag: u16, // pub dload_type: u16, pub len: u32, pub crc: u32, } - -macro_rules! impl_bytes { - ($t:ident) => { - impl $t { - pub const SIZE: usize = core::mem::size_of::(); - - pub fn to_bytes(&self) -> [u8; Self::SIZE] { - unsafe { core::mem::transmute(*self) } - } - - pub fn from_bytes(bytes: &[u8; Self::SIZE]) -> Self { - unsafe { core::mem::transmute(*bytes) } - } - } - }; -} -impl_bytes!(SdpcmHeader); -impl_bytes!(CdcHeader); -impl_bytes!(BdcHeader); impl_bytes!(DownloadHeader); + +pub const DOWNLOAD_FLAG_NO_CRC: u16 = 0x0001; +pub const DOWNLOAD_FLAG_BEGIN: u16 = 0x0002; +pub const DOWNLOAD_FLAG_END: u16 = 0x0004; +pub const DOWNLOAD_FLAG_HANDLER_VER: u16 = 0x1000; + +pub const DOWNLOAD_TYPE_CLM: u16 = 2; + +#[derive(Clone, Copy)] +#[repr(C)] +pub struct CountryInfo { + pub country_abbrev: [u8; 4], + pub rev: i32, + pub country_code: [u8; 4], +} +impl_bytes!(CountryInfo); From 30b7800f9ae0a7f26e292dbe55cc67fbe2d1b131 Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Mon, 11 Jul 2022 05:19:31 +0200 Subject: [PATCH 004/130] add event printing, add join but not working yet. --- Cargo.toml | 1 + examples/rpi-pico-w/src/main.rs | 3 + src/events.rs | 281 ++++++++++++++++++++++++++++++++ src/lib.rs | 80 ++++++++- src/structs.rs | 55 ++++++- 5 files changed, 414 insertions(+), 6 deletions(-) create mode 100644 src/events.rs diff --git a/Cargo.toml b/Cargo.toml index d1672146..bd27a48b 100644 --- a/Cargo.toml +++ b/Cargo.toml @@ -20,3 +20,4 @@ futures = { version = "0.3.17", default-features = false, features = ["async-awa embedded-hal-1 = { package = "embedded-hal", version = "1.0.0-alpha.8" } embedded-hal-async = { version = "0.1.0-alpha.1" } +num_enum = { version = "0.5.7", default-features = false } diff --git a/examples/rpi-pico-w/src/main.rs b/examples/rpi-pico-w/src/main.rs index 7545dfde..d4aae847 100644 --- a/examples/rpi-pico-w/src/main.rs +++ b/examples/rpi-pico-w/src/main.rs @@ -45,4 +45,7 @@ async fn main(spawner: Spawner, p: Peripherals) { spawner.spawn(wifi_task(runner)).unwrap(); control.init().await; + + let ssid = "MikroTik-951589"; + control.join(ssid).await; } diff --git a/src/events.rs b/src/events.rs new file mode 100644 index 00000000..b35b12fa --- /dev/null +++ b/src/events.rs @@ -0,0 +1,281 @@ +#![allow(unused)] + +use core::num; + +#[derive(Clone, Copy, PartialEq, Eq, num_enum::FromPrimitive)] +#[cfg_attr(feature = "defmt", derive(defmt::Format))] +#[repr(u8)] +pub enum Event { + #[num_enum(default)] + Unknown = 0xFF, + /// indicates status of set SSID + SET_SSID = 0, + /// differentiates join IBSS from found (START) IBSS + JOIN = 1, + /// STA founded an IBSS or AP started a BSS + START = 2, + /// 802.11 AUTH request + AUTH = 3, + /// 802.11 AUTH indication + AUTH_IND = 4, + /// 802.11 DEAUTH request + DEAUTH = 5, + /// 802.11 DEAUTH indication + DEAUTH_IND = 6, + /// 802.11 ASSOC request + ASSOC = 7, + /// 802.11 ASSOC indication + ASSOC_IND = 8, + /// 802.11 REASSOC request + REASSOC = 9, + /// 802.11 REASSOC indication + REASSOC_IND = 10, + /// 802.11 DISASSOC request + DISASSOC = 11, + /// 802.11 DISASSOC indication + DISASSOC_IND = 12, + /// 802.11h Quiet period started + QUIET_START = 13, + /// 802.11h Quiet period ended + QUIET_END = 14, + /// BEACONS received/lost indication + BEACON_RX = 15, + /// generic link indication + LINK = 16, + /// TKIP MIC error occurred + MIC_ERROR = 17, + /// NDIS style link indication + NDIS_LINK = 18, + /// roam attempt occurred: indicate status & reason + ROAM = 19, + /// change in dot11FailedCount (txfail) + TXFAIL = 20, + /// WPA2 pmkid cache indication + PMKID_CACHE = 21, + /// current AP's TSF value went backward + RETROGRADE_TSF = 22, + /// AP was pruned from join list for reason + PRUNE = 23, + /// report AutoAuth table entry match for join attempt + AUTOAUTH = 24, + /// Event encapsulating an EAPOL message + EAPOL_MSG = 25, + /// Scan results are ready or scan was aborted + SCAN_COMPLETE = 26, + /// indicate to host addts fail/success + ADDTS_IND = 27, + /// indicate to host delts fail/success + DELTS_IND = 28, + /// indicate to host of beacon transmit + BCNSENT_IND = 29, + /// Send the received beacon up to the host + BCNRX_MSG = 30, + /// indicate to host loss of beacon + BCNLOST_MSG = 31, + /// before attempting to roam + ROAM_PREP = 32, + /// PFN network found event + PFN_NET_FOUND = 33, + /// PFN network lost event + PFN_NET_LOST = 34, + RESET_COMPLETE = 35, + JOIN_START = 36, + ROAM_START = 37, + ASSOC_START = 38, + IBSS_ASSOC = 39, + RADIO = 40, + /// PSM microcode watchdog fired + PSM_WATCHDOG = 41, + /// CCX association start + CCX_ASSOC_START = 42, + /// CCX association abort + CCX_ASSOC_ABORT = 43, + /// probe request received + PROBREQ_MSG = 44, + SCAN_CONFIRM_IND = 45, + /// WPA Handshake + PSK_SUP = 46, + COUNTRY_CODE_CHANGED = 47, + /// WMMAC excedded medium time + EXCEEDED_MEDIUM_TIME = 48, + /// WEP ICV error occurred + ICV_ERROR = 49, + /// Unsupported unicast encrypted frame + UNICAST_DECODE_ERROR = 50, + /// Unsupported multicast encrypted frame + MULTICAST_DECODE_ERROR = 51, + TRACE = 52, + /// BT-AMP HCI event + BTA_HCI_EVENT = 53, + /// I/F change (for wlan host notification) + IF = 54, + /// P2P Discovery listen state expires + P2P_DISC_LISTEN_COMPLETE = 55, + /// indicate RSSI change based on configured levels + RSSI = 56, + /// PFN best network batching event + PFN_BEST_BATCHING = 57, + EXTLOG_MSG = 58, + /// Action frame reception + ACTION_FRAME = 59, + /// Action frame Tx complete + ACTION_FRAME_COMPLETE = 60, + /// assoc request received + PRE_ASSOC_IND = 61, + /// re-assoc request received + PRE_REASSOC_IND = 62, + /// channel adopted (xxx: obsoleted) + CHANNEL_ADOPTED = 63, + /// AP started + AP_STARTED = 64, + /// AP stopped due to DFS + DFS_AP_STOP = 65, + /// AP resumed due to DFS + DFS_AP_RESUME = 66, + /// WAI stations event + WAI_STA_EVENT = 67, + /// event encapsulating an WAI message + WAI_MSG = 68, + /// escan result event + ESCAN_RESULT = 69, + /// action frame off channel complete + ACTION_FRAME_OFF_CHAN_COMPLETE = 70, + /// probe response received + PROBRESP_MSG = 71, + /// P2P Probe request received + P2P_PROBREQ_MSG = 72, + DCS_REQUEST = 73, + /// credits for D11 FIFOs. [AC0,AC1,AC2,AC3,BC_MC,ATIM] + FIFO_CREDIT_MAP = 74, + /// Received action frame event WITH wl_event_rx_frame_data_t header + ACTION_FRAME_RX = 75, + /// Wake Event timer fired, used for wake WLAN test mode + WAKE_EVENT = 76, + /// Radio measurement complete + RM_COMPLETE = 77, + /// Synchronize TSF with the host + HTSFSYNC = 78, + /// request an overlay IOCTL/iovar from the host + OVERLAY_REQ = 79, + CSA_COMPLETE_IND = 80, + /// excess PM Wake Event to inform host + EXCESS_PM_WAKE_EVENT = 81, + /// no PFN networks around + PFN_SCAN_NONE = 82, + /// last found PFN network gets lost + PFN_SCAN_ALLGONE = 83, + GTK_PLUMBED = 84, + /// 802.11 ASSOC indication for NDIS only + ASSOC_IND_NDIS = 85, + /// 802.11 REASSOC indication for NDIS only + REASSOC_IND_NDIS = 86, + ASSOC_REQ_IE = 87, + ASSOC_RESP_IE = 88, + /// association recreated on resume + ASSOC_RECREATED = 89, + /// rx action frame event for NDIS only + ACTION_FRAME_RX_NDIS = 90, + /// authentication request received + AUTH_REQ = 91, + /// fast assoc recreation failed + SPEEDY_RECREATE_FAIL = 93, + /// port-specific event and payload (e.g. NDIS) + NATIVE = 94, + /// event for tx pkt delay suddently jump + PKTDELAY_IND = 95, + /// AWDL AW period starts + AWDL_AW = 96, + /// AWDL Master/Slave/NE master role event + AWDL_ROLE = 97, + /// Generic AWDL event + AWDL_EVENT = 98, + /// NIC AF txstatus + NIC_AF_TXS = 99, + /// NAN event + NAN = 100, + BEACON_FRAME_RX = 101, + /// desired service found + SERVICE_FOUND = 102, + /// GAS fragment received + GAS_FRAGMENT_RX = 103, + /// GAS sessions all complete + GAS_COMPLETE = 104, + /// New device found by p2p offload + P2PO_ADD_DEVICE = 105, + /// device has been removed by p2p offload + P2PO_DEL_DEVICE = 106, + /// WNM event to notify STA enter sleep mode + WNM_STA_SLEEP = 107, + /// Indication of MAC tx failures (exhaustion of 802.11 retries) exceeding threshold(s) + TXFAIL_THRESH = 108, + /// Proximity Detection event + PROXD = 109, + /// AWDL RX Probe response + AWDL_RX_PRB_RESP = 111, + /// AWDL RX Action Frames + AWDL_RX_ACT_FRAME = 112, + /// AWDL Wowl nulls + AWDL_WOWL_NULLPKT = 113, + /// AWDL Phycal status + AWDL_PHYCAL_STATUS = 114, + /// AWDL OOB AF status + AWDL_OOB_AF_STATUS = 115, + /// Interleaved Scan status + AWDL_SCAN_STATUS = 116, + /// AWDL AW Start + AWDL_AW_START = 117, + /// AWDL AW End + AWDL_AW_END = 118, + /// AWDL AW Extensions + AWDL_AW_EXT = 119, + AWDL_PEER_CACHE_CONTROL = 120, + CSA_START_IND = 121, + CSA_DONE_IND = 122, + CSA_FAILURE_IND = 123, + /// CCA based channel quality report + CCA_CHAN_QUAL = 124, + /// to report change in BSSID while roaming + BSSID = 125, + /// tx error indication + TX_STAT_ERROR = 126, + /// credit check for BCMC supported + BCMC_CREDIT_SUPPORT = 127, + /// psta primary interface indication + PSTA_PRIMARY_INTF_IND = 128, + /// Handover Request Initiated + BT_WIFI_HANDOVER_REQ = 130, + /// Southpaw TxInhibit notification + SPW_TXINHIBIT = 131, + /// FBT Authentication Request Indication + FBT_AUTH_REQ_IND = 132, + /// Enhancement addition for RSSI + RSSI_LQM = 133, + /// Full probe/beacon (IEs etc) results + PFN_GSCAN_FULL_RESULT = 134, + /// Significant change in rssi of bssids being tracked + PFN_SWC = 135, + /// a STA been authroized for traffic + AUTHORIZED = 136, + /// probe req with wl_event_rx_frame_data_t header + PROBREQ_MSG_RX = 137, + /// PFN completed scan of network list + PFN_SCAN_COMPLETE = 138, + /// RMC Event + RMC_EVENT = 139, + /// DPSTA interface indication + DPSTA_INTF_IND = 140, + /// RRM Event + RRM = 141, + /// ULP entry event + ULP = 146, + /// TCP Keep Alive Offload Event + TKO = 151, + /// authentication request received + EXT_AUTH_REQ = 187, + /// authentication request received + EXT_AUTH_FRAME_RX = 188, + /// mgmt frame Tx complete + MGMT_FRAME_TXSTATUS = 189, + /// highest val + 1 for range checking + LAST = 190, +} diff --git a/src/lib.rs b/src/lib.rs index 698c52f4..040caed8 100644 --- a/src/lib.rs +++ b/src/lib.rs @@ -7,6 +7,7 @@ pub(crate) mod fmt; mod countries; +mod events; mod structs; use core::cell::Cell; @@ -253,9 +254,52 @@ impl<'a> Control<'a> { }; self.set_iovar("country", &country_info.to_bytes()).await; + // set country takes some time, next ioctls fail if we don't wait. + Timer::after(Duration::from_millis(100)).await; + + // self.set_iovar_u32("ampdu_ba_wsize", 8).await; + // self.set_iovar_u32("ampdu_mpdu", 4).await; + // self.set_iovar_u32("ampdu_rx_factor", 0).await; // this crashes + + Timer::after(Duration::from_millis(100)).await; + + // evts + let mut evts = EventMask { + iface: 0, + events: [0xFF; 24], + }; + self.set_iovar("bsscfg:event_msgs", &evts.to_bytes()).await; + + // set wifi up + self.ioctl(2, 2, 0, &[]).await; + + Timer::after(Duration::from_millis(100)).await; + info!("INIT DONE"); } + pub async fn join(&mut self, ssid: &str) { + self.ioctl_set_u32(134, 0, 0).await; // wsec = open + self.set_iovar_u32x2("bsscfg:sup_wpa", 0, 0).await; + self.ioctl_set_u32(20, 0, 1).await; // set_infra = 1 + self.ioctl_set_u32(22, 0, 0).await; // set_auth = open (0) + + let mut i = SsidInfo { + len: ssid.len() as _, + ssid: [0; 32], + }; + i.ssid[..ssid.len()].copy_from_slice(ssid.as_bytes()); + self.ioctl(2, 26, 0, &i.to_bytes()).await; // set_ssid + + info!("JOINED"); + } + + async fn set_iovar_u32x2(&mut self, name: &str, val1: u32, val2: u32) { + let mut buf = [0; 8]; + buf[0..4].copy_from_slice(&val1.to_le_bytes()); + buf[4..8].copy_from_slice(&val2.to_le_bytes()); + self.set_iovar(name, &buf).await + } async fn set_iovar_u32(&mut self, name: &str, val: u32) { self.set_iovar(name, &val.to_le_bytes()).await } @@ -272,6 +316,10 @@ impl<'a> Control<'a> { self.ioctl(2, 263, 0, &buf[..total_len]).await; } + async fn ioctl_set_u32(&mut self, cmd: u32, iface: u32, val: u32) { + self.ioctl(2, cmd, 0, &val.to_le_bytes()).await + } + async fn ioctl(&mut self, kind: u32, cmd: u32, iface: u32, buf: &[u8]) { // TODO cancel ioctl on future drop. @@ -488,7 +536,7 @@ impl<'a, PWR: Pin, CS: Pin, CLK: Pin, DIO: Pin> Runner<'a, PWR, CS, CLK, DIO> { } self.cs.set_high(); - info!("rx {:02x}", &buf[..(len as usize).min(48)]); + //info!("rx {:02x}", &buf[..(len as usize).min(36)]); self.rx(&buf[..len as usize]); } @@ -528,14 +576,38 @@ impl<'a, PWR: Pin, CS: Pin, CLK: Pin, DIO: Pin> Runner<'a, PWR, CS, CLK, DIO> { return; } - let cdc_header = - CdcHeader::from_bytes(payload[..CdcHeader::SIZE].try_into().unwrap()); + let cdc_header = CdcHeader::from_bytes(payload[..CdcHeader::SIZE].try_into().unwrap()); if cdc_header.id == self.state.ioctl_id.get() { assert_eq!(cdc_header.status, 0); // todo propagate error self.state.ioctl_state.set(IoctlState::Done); } } + 1 => { + let bcd_header = BcdHeader::from_bytes(&payload[..BcdHeader::SIZE].try_into().unwrap()); + //info!("{}", bcd_header); + + let packet_start = BcdHeader::SIZE + 4 * bcd_header.data_offset as usize; + if packet_start > payload.len() { + warn!("packet start out of range."); + return; + } + let packet = &payload[packet_start..]; + //info!("rx {:02x}", &packet[..(packet.len() as usize).min(36)]); + + let evt = EventHeader::from_bytes(&packet[24..][..EventHeader::SIZE].try_into().unwrap()); + let evt_num = evt.event_type.to_be() as u8; + let evt_data_len = evt.datalen.to_be() as u8; + let evt_data = &packet[24 + EventHeader::SIZE..][..evt_data_len as usize]; + info!( + "=== EVENT {} ({}) {} {:02x}", + events::Event::from(evt_num), + evt_num, + evt, + evt_data + ); + } + _ => {} } } @@ -575,7 +647,7 @@ impl<'a, PWR: Pin, CS: Pin, CLK: Pin, DIO: Pin> Runner<'a, PWR, CS, CLK, DIO> { let total_len = (total_len + 3) & !3; // round up to 4byte - info!("tx {:02x}", &buf[..total_len.min(48)]); + //info!("tx {:02x}", &buf[..total_len.min(48)]); let cmd = cmd_word(true, true, FUNC_WLAN, 0, total_len as _); self.cs.set_low(); diff --git a/src/structs.rs b/src/structs.rs index bce9ab9f..8a98d522 100644 --- a/src/structs.rs +++ b/src/structs.rs @@ -15,6 +15,7 @@ macro_rules! impl_bytes { } #[derive(Clone, Copy)] +#[cfg_attr(feature = "defmt", derive(defmt::Format))] #[repr(C)] pub struct SdpcmHeader { pub len: u16, @@ -37,6 +38,7 @@ pub struct SdpcmHeader { impl_bytes!(SdpcmHeader); #[derive(Clone, Copy)] +#[cfg_attr(feature = "defmt", derive(defmt::Format))] #[repr(C)] pub struct CdcHeader { pub cmd: u32, @@ -49,8 +51,9 @@ pub struct CdcHeader { impl_bytes!(CdcHeader); #[derive(Clone, Copy)] +#[cfg_attr(feature = "defmt", derive(defmt::Format))] #[repr(C)] -pub struct BdcHeader { +pub struct BcdHeader { pub flags: u8, /// 802.1d Priority (low 3 bits) pub priority: u8, @@ -58,7 +61,36 @@ pub struct BdcHeader { /// Offset from end of BDC header to packet data, in 4-uint8_t words. Leaves room for optional headers. pub data_offset: u8, } -impl_bytes!(BdcHeader); +impl_bytes!(BcdHeader); + +#[derive(Clone, Copy)] +#[cfg_attr(feature = "defmt", derive(defmt::Format))] +#[repr(C)] +pub struct EventHeader { + /// version + pub version: u16, + /// see flags below + pub flags: u16, + /// Message (see below) + pub event_type: u32, + /// Status code (see below) + pub status: u32, + /// Reason code (if applicable) + pub reason: u32, + /// WLC_E_AUTH + pub auth_type: u32, + /// data buf + pub datalen: u32, + /// Station address (if applicable) + pub addr: [u8; 6], + /// name of the incoming packet interface + pub ifname: [u8; 16], + /// destination OS i/f index + pub ifidx: u8, + /// source bsscfg index + pub bsscfgidx: u8, +} +impl_bytes!(EventHeader); #[derive(Clone, Copy)] #[repr(C)] @@ -78,6 +110,7 @@ pub const DOWNLOAD_FLAG_HANDLER_VER: u16 = 0x1000; pub const DOWNLOAD_TYPE_CLM: u16 = 2; #[derive(Clone, Copy)] +#[cfg_attr(feature = "defmt", derive(defmt::Format))] #[repr(C)] pub struct CountryInfo { pub country_abbrev: [u8; 4], @@ -85,3 +118,21 @@ pub struct CountryInfo { pub country_code: [u8; 4], } impl_bytes!(CountryInfo); + +#[derive(Clone, Copy)] +#[cfg_attr(feature = "defmt", derive(defmt::Format))] +#[repr(C)] +pub struct SsidInfo { + pub len: u32, + pub ssid: [u8; 32], +} +impl_bytes!(SsidInfo); + +#[derive(Clone, Copy)] +#[cfg_attr(feature = "defmt", derive(defmt::Format))] +#[repr(C)] +pub struct EventMask { + pub iface: u32, + pub events: [u8; 24], +} +impl_bytes!(EventMask); From 3ffdbd2ca3ed7cc3da95c391f1928342afb55e10 Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Mon, 11 Jul 2022 22:44:42 +0200 Subject: [PATCH 005/130] stuff --- examples/rpi-pico-w/src/main.rs | 1 + src/lib.rs | 32 ++++++++++++++++++++------------ src/structs.rs | 12 ++++++++++++ 3 files changed, 33 insertions(+), 12 deletions(-) diff --git a/examples/rpi-pico-w/src/main.rs b/examples/rpi-pico-w/src/main.rs index d4aae847..bef820d3 100644 --- a/examples/rpi-pico-w/src/main.rs +++ b/examples/rpi-pico-w/src/main.rs @@ -6,6 +6,7 @@ use core::slice; use defmt::{assert, assert_eq, panic, *}; use embassy::executor::Spawner; +use embassy::time::{Duration, Timer}; use embassy::util::Forever; use embassy_rp::gpio::{Flex, Level, Output, Pin}; use embassy_rp::peripherals::{PIN_23, PIN_24, PIN_25, PIN_29}; diff --git a/src/lib.rs b/src/lib.rs index 040caed8..27191797 100644 --- a/src/lib.rs +++ b/src/lib.rs @@ -243,7 +243,7 @@ impl<'a> Control<'a> { info!("Configuring misc stuff..."); self.set_iovar_u32("bus:txglom", 0).await; - self.set_iovar_u32("apsta", 1).await; + //self.set_iovar_u32("apsta", 1).await; self.set_iovar("cur_etheraddr", &[02, 03, 04, 05, 06, 07]).await; let country = countries::WORLD_WIDE_XX; @@ -257,9 +257,13 @@ impl<'a> Control<'a> { // set country takes some time, next ioctls fail if we don't wait. Timer::after(Duration::from_millis(100)).await; - // self.set_iovar_u32("ampdu_ba_wsize", 8).await; - // self.set_iovar_u32("ampdu_mpdu", 4).await; - // self.set_iovar_u32("ampdu_rx_factor", 0).await; // this crashes + self.ioctl_set_u32(64, 0, 0).await; // WLC_SET_ANTDIV + + self.set_iovar_u32("bus:txglom", 0).await; + //self.set_iovar_u32("apsta", 1).await; + self.set_iovar_u32("ampdu_ba_wsize", 8).await; + self.set_iovar_u32("ampdu_mpdu", 4).await; + //self.set_iovar_u32("ampdu_rx_factor", 0).await; // this crashes Timer::after(Duration::from_millis(100)).await; @@ -275,6 +279,12 @@ impl<'a> Control<'a> { Timer::after(Duration::from_millis(100)).await; + self.ioctl_set_u32(86, 0, 0).await; // no power save + self.ioctl_set_u32(110, 0, 1).await; // SET_GMODE = auto + self.ioctl_set_u32(142, 0, 0).await; // SET_BAND = any + + Timer::after(Duration::from_millis(100)).await; + info!("INIT DONE"); } @@ -494,11 +504,11 @@ impl<'a, PWR: Pin, CS: Pin, CLK: Pin, DIO: Pin> Runner<'a, PWR, CS, CLK, DIO> { let mut val = self.read8(FUNC_BACKPLANE, REG_BACKPLANE_SLEEP_CSR); val |= 0x01; // SBSDIO_SLPCSR_KEEP_SDIO_ON self.write8(FUNC_BACKPLANE, REG_BACKPLANE_SLEEP_CSR, val); + */ // clear pulls self.write8(FUNC_BACKPLANE, REG_BACKPLANE_PULL_UP, 0); let _ = self.read8(FUNC_BACKPLANE, REG_BACKPLANE_PULL_UP); - */ info!("init done "); } @@ -595,14 +605,12 @@ impl<'a, PWR: Pin, CS: Pin, CLK: Pin, DIO: Pin> Runner<'a, PWR, CS, CLK, DIO> { let packet = &payload[packet_start..]; //info!("rx {:02x}", &packet[..(packet.len() as usize).min(36)]); - let evt = EventHeader::from_bytes(&packet[24..][..EventHeader::SIZE].try_into().unwrap()); - let evt_num = evt.event_type.to_be() as u8; - let evt_data_len = evt.datalen.to_be() as u8; - let evt_data = &packet[24 + EventHeader::SIZE..][..evt_data_len as usize]; + let mut evt = EventHeader::from_bytes(&packet[24..][..EventHeader::SIZE].try_into().unwrap()); + evt.byteswap(); + let evt_data = &packet[24 + EventHeader::SIZE..][..evt.datalen as usize]; info!( - "=== EVENT {} ({}) {} {:02x}", - events::Event::from(evt_num), - evt_num, + "=== EVENT {}: {} {:02x}", + events::Event::from(evt.event_type as u8), evt, evt_data ); diff --git a/src/structs.rs b/src/structs.rs index 8a98d522..beda9f36 100644 --- a/src/structs.rs +++ b/src/structs.rs @@ -92,6 +92,18 @@ pub struct EventHeader { } impl_bytes!(EventHeader); +impl EventHeader { + pub fn byteswap(&mut self) { + self.version = self.version.to_be(); + self.flags = self.flags.to_be(); + self.event_type = self.event_type.to_be(); + self.status = self.status.to_be(); + self.reason = self.reason.to_be(); + self.auth_type = self.auth_type.to_be(); + self.datalen = self.datalen.to_be(); + } +} + #[derive(Clone, Copy)] #[repr(C)] pub struct DownloadHeader { From d96ad248b33d8ca89daf88c5878cb24d6566cc6d Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Mon, 11 Jul 2022 22:53:57 +0200 Subject: [PATCH 006/130] Add LICENSEs --- LICENSE-APACHE | 201 +++++++++++++++++++++++++++++++++++++++++++++++++ LICENSE-MIT | 25 ++++++ README.md | 14 ++++ 3 files changed, 240 insertions(+) create mode 100644 LICENSE-APACHE create mode 100644 LICENSE-MIT create mode 100644 README.md diff --git a/LICENSE-APACHE b/LICENSE-APACHE new file mode 100644 index 00000000..ea4fa15c --- /dev/null +++ b/LICENSE-APACHE @@ -0,0 +1,201 @@ + Apache License + Version 2.0, January 2004 + http://www.apache.org/licenses/ + +TERMS AND CONDITIONS FOR USE, REPRODUCTION, AND DISTRIBUTION + +1. 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We also recommend that a + file or class name and description of purpose be included on the + same "printed page" as the copyright notice for easier + identification within third-party archives. + +Copyright 2019-2022 Embassy project contributors + +Licensed under the Apache License, Version 2.0 (the "License"); +you may not use this file except in compliance with the License. +You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + +Unless required by applicable law or agreed to in writing, software +distributed under the License is distributed on an "AS IS" BASIS, +WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +See the License for the specific language governing permissions and +limitations under the License. diff --git a/LICENSE-MIT b/LICENSE-MIT new file mode 100644 index 00000000..87c05283 --- /dev/null +++ b/LICENSE-MIT @@ -0,0 +1,25 @@ +Copyright (c) 2019-2022 Embassy project contributors + +Permission is hereby granted, free of charge, to any +person obtaining a copy of this software and associated +documentation files (the "Software"), to deal in the +Software without restriction, including without +limitation the rights to use, copy, modify, merge, +publish, distribute, sublicense, and/or sell copies of +the Software, and to permit persons to whom the Software +is furnished to do so, subject to the following +conditions: + +The above copyright notice and this permission notice +shall be included in all copies or substantial portions +of the Software. + +THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF +ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED +TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A +PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT +SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY +CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION +OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR +IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER +DEALINGS IN THE SOFTWARE. diff --git a/README.md b/README.md new file mode 100644 index 00000000..7df988b7 --- /dev/null +++ b/README.md @@ -0,0 +1,14 @@ +# cyw43 + +Very WIP driver for the CYW43439 wifi chip, used in the Raspberry Pi Pico W. + +## License + +This work is licensed under either of + +- Apache License, Version 2.0 ([LICENSE-APACHE](LICENSE-APACHE) or + ) +- MIT license ([LICENSE-MIT](LICENSE-MIT) or ) + +at your option. + From 18b11e7417e1338fb18e6ceda609f2a0841d7a57 Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Tue, 12 Jul 2022 03:34:27 +0200 Subject: [PATCH 007/130] check clmload_status. --- src/lib.rs | 85 +++++++++++++++++++++++++++++++++++++------------- src/structs.rs | 3 +- 2 files changed, 64 insertions(+), 24 deletions(-) diff --git a/src/lib.rs b/src/lib.rs index 27191797..6a1b7970 100644 --- a/src/lib.rs +++ b/src/lib.rs @@ -184,10 +184,14 @@ enum IoctlState { kind: u32, cmd: u32, iface: u32, - buf: *const [u8], + buf: *mut [u8], + }, + Sent { + buf: *mut [u8], + }, + Done { + resp_len: usize, }, - Sent, - Done, } pub struct State { @@ -237,9 +241,12 @@ impl<'a> Control<'a> { buf[0..8].copy_from_slice(b"clmload\x00"); buf[8..20].copy_from_slice(&header.to_bytes()); buf[20..][..chunk.len()].copy_from_slice(&chunk); - self.ioctl(2, 263, 0, &buf[..8 + 12 + chunk.len()]).await; + self.ioctl(2, 263, 0, &mut buf[..8 + 12 + chunk.len()]).await; } + // check clmload ok + assert_eq!(self.get_iovar_u32("clmload_status").await, 0); + info!("Configuring misc stuff..."); self.set_iovar_u32("bus:txglom", 0).await; @@ -275,7 +282,7 @@ impl<'a> Control<'a> { self.set_iovar("bsscfg:event_msgs", &evts.to_bytes()).await; // set wifi up - self.ioctl(2, 2, 0, &[]).await; + self.ioctl(2, 2, 0, &mut []).await; Timer::after(Duration::from_millis(100)).await; @@ -299,7 +306,7 @@ impl<'a> Control<'a> { ssid: [0; 32], }; i.ssid[..ssid.len()].copy_from_slice(ssid.as_bytes()); - self.ioctl(2, 26, 0, &i.to_bytes()).await; // set_ssid + self.ioctl(2, 26, 0, &mut i.to_bytes()).await; // set_ssid info!("JOINED"); } @@ -310,10 +317,18 @@ impl<'a> Control<'a> { buf[4..8].copy_from_slice(&val2.to_le_bytes()); self.set_iovar(name, &buf).await } + async fn set_iovar_u32(&mut self, name: &str, val: u32) { self.set_iovar(name, &val.to_le_bytes()).await } + async fn get_iovar_u32(&mut self, name: &str) -> u32 { + let mut buf = [0; 4]; + let len = self.get_iovar(name, &mut buf).await; + assert_eq!(len, 4); + u32::from_le_bytes(buf) + } + async fn set_iovar(&mut self, name: &str, val: &[u8]) { info!("set {} = {:02x}", name, val); @@ -323,14 +338,28 @@ impl<'a> Control<'a> { buf[name.len() + 1..][..val.len()].copy_from_slice(val); let total_len = name.len() + 1 + val.len(); - self.ioctl(2, 263, 0, &buf[..total_len]).await; + self.ioctl(2, 263, 0, &mut buf).await; + } + + async fn get_iovar(&mut self, name: &str, res: &mut [u8]) -> usize { + info!("get {}", name); + + let mut buf = [0; 64]; + buf[..name.len()].copy_from_slice(name.as_bytes()); + buf[name.len()] = 0; + + let total_len = name.len() + 1 + res.len(); + let res_len = self.ioctl(2, 262, 0, &mut buf[..total_len]).await - name.len() - 1; + res[..res_len].copy_from_slice(&buf[name.len() + 1..][..res_len]); + res_len } async fn ioctl_set_u32(&mut self, cmd: u32, iface: u32, val: u32) { - self.ioctl(2, cmd, 0, &val.to_le_bytes()).await + let mut buf = val.to_le_bytes(); + self.ioctl(2, cmd, 0, &mut buf).await; } - async fn ioctl(&mut self, kind: u32, cmd: u32, iface: u32, buf: &[u8]) { + async fn ioctl(&mut self, kind: u32, cmd: u32, iface: u32, buf: &mut [u8]) -> usize { // TODO cancel ioctl on future drop. while !matches!(self.state.ioctl_state.get(), IoctlState::Idle) { @@ -343,11 +372,16 @@ impl<'a> Control<'a> { .ioctl_state .set(IoctlState::Pending { kind, cmd, iface, buf }); - while !matches!(self.state.ioctl_state.get(), IoctlState::Done) { + let resp_len = loop { + if let IoctlState::Done { resp_len } = self.state.ioctl_state.get() { + break resp_len; + } yield_now().await; - } + }; self.state.ioctl_state.set(IoctlState::Idle); + + resp_len } } @@ -519,7 +553,7 @@ impl<'a, PWR: Pin, CS: Pin, CLK: Pin, DIO: Pin> Runner<'a, PWR, CS, CLK, DIO> { // Send stuff if let IoctlState::Pending { kind, cmd, iface, buf } = self.state.ioctl_state.get() { self.send_ioctl(kind, cmd, iface, unsafe { &*buf }, self.state.ioctl_id.get()); - self.state.ioctl_state.set(IoctlState::Sent); + self.state.ioctl_state.set(IoctlState::Sent { buf }); } // Receive stuff @@ -546,7 +580,7 @@ impl<'a, PWR: Pin, CS: Pin, CLK: Pin, DIO: Pin> Runner<'a, PWR, CS, CLK, DIO> { } self.cs.set_high(); - //info!("rx {:02x}", &buf[..(len as usize).min(36)]); + trace!("rx {:02x}", &buf[..(len as usize).min(48)]); self.rx(&buf[..len as usize]); } @@ -564,7 +598,7 @@ impl<'a, PWR: Pin, CS: Pin, CLK: Pin, DIO: Pin> Runner<'a, PWR, CS, CLK, DIO> { } let sdpcm_header = SdpcmHeader::from_bytes(packet[..SdpcmHeader::SIZE].try_into().unwrap()); - + trace!("rx {:?}", sdpcm_header); if sdpcm_header.len != !sdpcm_header.len_inv { warn!("len inv mismatch"); return; @@ -587,15 +621,21 @@ impl<'a, PWR: Pin, CS: Pin, CLK: Pin, DIO: Pin> Runner<'a, PWR, CS, CLK, DIO> { } let cdc_header = CdcHeader::from_bytes(payload[..CdcHeader::SIZE].try_into().unwrap()); + trace!(" {:?}", cdc_header); - if cdc_header.id == self.state.ioctl_id.get() { - assert_eq!(cdc_header.status, 0); // todo propagate error - self.state.ioctl_state.set(IoctlState::Done); + if let IoctlState::Sent { buf } = self.state.ioctl_state.get() { + if cdc_header.id == self.state.ioctl_id.get() { + assert_eq!(cdc_header.status, 0); // todo propagate error instead + + let resp_len = cdc_header.len as usize; + (unsafe { &mut *buf }[..resp_len]).copy_from_slice(&payload[CdcHeader::SIZE..][..resp_len]); + self.state.ioctl_state.set(IoctlState::Done { resp_len }); + } } } 1 => { let bcd_header = BcdHeader::from_bytes(&payload[..BcdHeader::SIZE].try_into().unwrap()); - //info!("{}", bcd_header); + trace!(" {:?}", bcd_header); let packet_start = BcdHeader::SIZE + 4 * bcd_header.data_offset as usize; if packet_start > payload.len() { @@ -603,7 +643,7 @@ impl<'a, PWR: Pin, CS: Pin, CLK: Pin, DIO: Pin> Runner<'a, PWR, CS, CLK, DIO> { return; } let packet = &payload[packet_start..]; - //info!("rx {:02x}", &packet[..(packet.len() as usize).min(36)]); + trace!(" {:02x}", &packet[..(packet.len() as usize).min(36)]); let mut evt = EventHeader::from_bytes(&packet[24..][..EventHeader::SIZE].try_into().unwrap()); evt.byteswap(); @@ -642,12 +682,13 @@ impl<'a, PWR: Pin, CS: Pin, CLK: Pin, DIO: Pin> Runner<'a, PWR, CS, CLK, DIO> { let cdc_header = CdcHeader { cmd: cmd, - out_len: data.len() as _, - in_len: 0, + len: data.len() as _, flags: kind as u16 | (iface as u16) << 12, id, status: 0, }; + trace!("tx {:?}", sdpcm_header); + trace!(" {:?}", cdc_header); buf[0..SdpcmHeader::SIZE].copy_from_slice(&sdpcm_header.to_bytes()); buf[SdpcmHeader::SIZE..][..CdcHeader::SIZE].copy_from_slice(&cdc_header.to_bytes()); @@ -655,7 +696,7 @@ impl<'a, PWR: Pin, CS: Pin, CLK: Pin, DIO: Pin> Runner<'a, PWR, CS, CLK, DIO> { let total_len = (total_len + 3) & !3; // round up to 4byte - //info!("tx {:02x}", &buf[..total_len.min(48)]); + trace!(" {:02x}", &buf[..total_len.min(48)]); let cmd = cmd_word(true, true, FUNC_WLAN, 0, total_len as _); self.cs.set_low(); diff --git a/src/structs.rs b/src/structs.rs index beda9f36..91df616a 100644 --- a/src/structs.rs +++ b/src/structs.rs @@ -42,8 +42,7 @@ impl_bytes!(SdpcmHeader); #[repr(C)] pub struct CdcHeader { pub cmd: u32, - pub out_len: u16, - pub in_len: u16, + pub len: u32, pub flags: u16, pub id: u16, pub status: u32, From e1fd7dfc40bbb1ccbab511fb1e0d7a1120ae68a0 Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Tue, 12 Jul 2022 04:17:07 +0200 Subject: [PATCH 008/130] wpa2 join... still nothing. --- examples/rpi-pico-w/src/main.rs | 4 +-- src/lib.rs | 59 ++++++++++++++++++++++++++++++--- src/structs.rs | 10 ++++++ 3 files changed, 66 insertions(+), 7 deletions(-) diff --git a/examples/rpi-pico-w/src/main.rs b/examples/rpi-pico-w/src/main.rs index bef820d3..6d161414 100644 --- a/examples/rpi-pico-w/src/main.rs +++ b/examples/rpi-pico-w/src/main.rs @@ -47,6 +47,6 @@ async fn main(spawner: Spawner, p: Peripherals) { control.init().await; - let ssid = "MikroTik-951589"; - control.join(ssid).await; + //control.join_open("MikroTik-951589").await; + control.join_wpa2("MikroTik-951589", "fasdfasdfasdf").await; } diff --git a/src/lib.rs b/src/lib.rs index 6a1b7970..70fa7ede 100644 --- a/src/lib.rs +++ b/src/lib.rs @@ -250,8 +250,8 @@ impl<'a> Control<'a> { info!("Configuring misc stuff..."); self.set_iovar_u32("bus:txglom", 0).await; - //self.set_iovar_u32("apsta", 1).await; - self.set_iovar("cur_etheraddr", &[02, 03, 04, 05, 06, 07]).await; + self.set_iovar_u32("apsta", 1).await; + //self.set_iovar("cur_etheraddr", &[02, 03, 04, 05, 06, 07]).await; let country = countries::WORLD_WIDE_XX; let country_info = CountryInfo { @@ -267,9 +267,13 @@ impl<'a> Control<'a> { self.ioctl_set_u32(64, 0, 0).await; // WLC_SET_ANTDIV self.set_iovar_u32("bus:txglom", 0).await; - //self.set_iovar_u32("apsta", 1).await; + Timer::after(Duration::from_millis(100)).await; + //self.set_iovar_u32("apsta", 1).await; // this crashes, also we already did it before...?? + Timer::after(Duration::from_millis(100)).await; self.set_iovar_u32("ampdu_ba_wsize", 8).await; + Timer::after(Duration::from_millis(100)).await; self.set_iovar_u32("ampdu_mpdu", 4).await; + Timer::after(Duration::from_millis(100)).await; //self.set_iovar_u32("ampdu_rx_factor", 0).await; // this crashes Timer::after(Duration::from_millis(100)).await; @@ -281,12 +285,20 @@ impl<'a> Control<'a> { }; self.set_iovar("bsscfg:event_msgs", &evts.to_bytes()).await; + Timer::after(Duration::from_millis(100)).await; + // set wifi up self.ioctl(2, 2, 0, &mut []).await; Timer::after(Duration::from_millis(100)).await; - self.ioctl_set_u32(86, 0, 0).await; // no power save + // power save mode 2 + self.set_iovar_u32("pm2_sleep_ret", 0xc8).await; + self.set_iovar_u32("bcn_li_bcn", 1).await; + self.set_iovar_u32("bcn_li_dtim", 1).await; + self.set_iovar_u32("assoc_listen", 10).await; + self.ioctl_set_u32(0x86, 0, 2).await; + self.ioctl_set_u32(110, 0, 1).await; // SET_GMODE = auto self.ioctl_set_u32(142, 0, 0).await; // SET_BAND = any @@ -295,7 +307,9 @@ impl<'a> Control<'a> { info!("INIT DONE"); } - pub async fn join(&mut self, ssid: &str) { + pub async fn join_open(&mut self, ssid: &str) { + self.set_iovar_u32("ampdu_ba_wsize", 8).await; + self.ioctl_set_u32(134, 0, 0).await; // wsec = open self.set_iovar_u32x2("bsscfg:sup_wpa", 0, 0).await; self.ioctl_set_u32(20, 0, 1).await; // set_infra = 1 @@ -311,6 +325,38 @@ impl<'a> Control<'a> { info!("JOINED"); } + pub async fn join_wpa2(&mut self, ssid: &str, passphrase: &str) { + self.set_iovar_u32("ampdu_ba_wsize", 8).await; + + self.ioctl_set_u32(134, 0, 4).await; // wsec = wpa2 + self.set_iovar_u32x2("bsscfg:sup_wpa", 0, 1).await; + self.set_iovar_u32x2("bsscfg:sup_wpa2_eapver", 0, 0xFFFF_FFFF).await; + self.set_iovar_u32x2("bsscfg:sup_wpa_tmo", 0, 2500).await; + + Timer::after(Duration::from_millis(100)).await; + + let mut pfi = PassphraseInfo { + len: passphrase.len() as _, + flags: 1, + passphrase: [0; 64], + }; + pfi.passphrase[..passphrase.len()].copy_from_slice(passphrase.as_bytes()); + self.ioctl(2, 268, 0, &mut pfi.to_bytes()).await; // WLC_SET_WSEC_PMK + + self.ioctl_set_u32(20, 0, 1).await; // set_infra = 1 + self.ioctl_set_u32(22, 0, 0).await; // set_auth = 0 (open) + self.ioctl_set_u32(165, 0, 0x80).await; // set_wpa_auth + + let mut i = SsidInfo { + len: ssid.len() as _, + ssid: [0; 32], + }; + i.ssid[..ssid.len()].copy_from_slice(ssid.as_bytes()); + self.ioctl(2, 26, 0, &mut i.to_bytes()).await; // set_ssid + + info!("JOINED"); + } + async fn set_iovar_u32x2(&mut self, name: &str, val1: u32, val2: u32) { let mut buf = [0; 8]; buf[0..4].copy_from_slice(&val1.to_le_bytes()); @@ -362,6 +408,9 @@ impl<'a> Control<'a> { async fn ioctl(&mut self, kind: u32, cmd: u32, iface: u32, buf: &mut [u8]) -> usize { // TODO cancel ioctl on future drop. + // snail mode 🐌 + Timer::after(Duration::from_millis(100)).await; + while !matches!(self.state.ioctl_state.get(), IoctlState::Idle) { yield_now().await; } diff --git a/src/structs.rs b/src/structs.rs index 91df616a..dd2c0cfe 100644 --- a/src/structs.rs +++ b/src/structs.rs @@ -139,6 +139,16 @@ pub struct SsidInfo { } impl_bytes!(SsidInfo); +#[derive(Clone, Copy)] +#[cfg_attr(feature = "defmt", derive(defmt::Format))] +#[repr(C)] +pub struct PassphraseInfo { + pub len: u16, + pub flags: u16, + pub passphrase: [u8; 64], +} +impl_bytes!(PassphraseInfo); + #[derive(Clone, Copy)] #[cfg_attr(feature = "defmt", derive(defmt::Format))] #[repr(C)] From f60407feb3c2b2f3a364bd075dee2840220a5314 Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Tue, 12 Jul 2022 05:06:29 +0200 Subject: [PATCH 009/130] ITS DOING SOMETHING --- src/lib.rs | 14 ++++++++++---- 1 file changed, 10 insertions(+), 4 deletions(-) diff --git a/src/lib.rs b/src/lib.rs index 70fa7ede..e0c2c931 100644 --- a/src/lib.rs +++ b/src/lib.rs @@ -593,6 +593,12 @@ impl<'a, PWR: Pin, CS: Pin, CLK: Pin, DIO: Pin> Runner<'a, PWR, CS, CLK, DIO> { self.write8(FUNC_BACKPLANE, REG_BACKPLANE_PULL_UP, 0); let _ = self.read8(FUNC_BACKPLANE, REG_BACKPLANE_PULL_UP); + // start HT clock + //self.write8(FUNC_BACKPLANE, REG_BACKPLANE_CHIP_CLOCK_CSR, 0x10); + //info!("waiting for HT clock..."); + //while self.read8(FUNC_BACKPLANE, REG_BACKPLANE_CHIP_CLOCK_CSR) & 0x80 == 0 {} + //info!("clock ok"); + info!("init done "); } @@ -1084,18 +1090,18 @@ static NVRAM: &'static [u8] = &*nvram!( b"boardtype=0x0887", b"boardrev=0x1100", b"boardnum=22", - b"macaddr=00:A0:50:86:aa:b6", + b"macaddr=00:A0:50:b5:59:5e", b"sromrev=11", b"boardflags=0x00404001", b"boardflags3=0x04000000", - b"xtalfreq=26000", + b"xtalfreq=37400", b"nocrc=1", b"ag0=255", b"aa2g=1", b"ccode=ALL", b"pa0itssit=0x20", b"extpagain2g=0", - b"pa2ga0=-168,7161,-820", + b"pa2ga0=-168,6649,-778", b"AvVmid_c0=0x0,0xc8", b"cckpwroffset0=5", b"maxp2ga0=84", @@ -1118,7 +1124,7 @@ static NVRAM: &'static [u8] = &*nvram!( b"il0macaddr=00:90:4c:c5:12:38", b"wl0id=0x431b", b"deadman_to=0xffffffff", - b"muxenab=0x1", + b"muxenab=0x100", b"spurconfig=0x3", b"glitch_based_crsmin=1", b"btc_mode=1", From ce7353fba4e2a133087f0312ae47184aa180642e Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Tue, 12 Jul 2022 07:52:16 +0200 Subject: [PATCH 010/130] Hook up embassy-net. IT WORKS. --- Cargo.toml | 1 + examples/rpi-pico-w/Cargo.toml | 9 ++ examples/rpi-pico-w/src/main.rs | 78 ++++++++++++++- src/lib.rs | 168 ++++++++++++++++++++++++++++++-- src/structs.rs | 9 ++ 5 files changed, 255 insertions(+), 10 deletions(-) diff --git a/Cargo.toml b/Cargo.toml index bd27a48b..31a14f96 100644 --- a/Cargo.toml +++ b/Cargo.toml @@ -9,6 +9,7 @@ log = ["dep:log"] [dependencies] embassy = { version = "0.1.0" } embassy-rp = { version = "0.1.0", features = ["unstable-traits", "nightly", "unstable-pac"] } +embassy-net = { version = "0.1.0" } atomic-polyfill = "0.1.5" defmt = { version = "0.3", optional = true } diff --git a/examples/rpi-pico-w/Cargo.toml b/examples/rpi-pico-w/Cargo.toml index 8dbcb20d..9e1d7547 100644 --- a/examples/rpi-pico-w/Cargo.toml +++ b/examples/rpi-pico-w/Cargo.toml @@ -8,6 +8,7 @@ edition = "2021" cyw43 = { path = "../../", features = ["defmt"]} embassy = { version = "0.1.0", features = ["defmt", "defmt-timestamp-uptime"] } embassy-rp = { version = "0.1.0", features = ["defmt", "unstable-traits", "nightly", "unstable-pac"] } +embassy-net = { version = "0.1.0", features = ["defmt", "tcp", "dhcpv4", "medium-ethernet", "pool-16"] } atomic-polyfill = "0.1.5" defmt = "0.3" @@ -20,13 +21,21 @@ futures = { version = "0.3.17", default-features = false, features = ["async-awa embedded-hal-1 = { package = "embedded-hal", version = "1.0.0-alpha.8" } embedded-hal-async = { version = "0.1.0-alpha.1" } +embedded-io = { version = "0.3.0", features = ["async", "defmt"] } +heapless = "0.7.15" [patch.crates-io] embassy = { git = "https://github.com/embassy-rs/embassy", rev = "5f43c1d37e9db847c7861fe0bd821db62edba9f6" } embassy-rp = { git = "https://github.com/embassy-rs/embassy", rev = "5f43c1d37e9db847c7861fe0bd821db62edba9f6" } +embassy-net = { git = "https://github.com/embassy-rs/embassy", rev = "5f43c1d37e9db847c7861fe0bd821db62edba9f6" } #embassy = { path = "/home/dirbaio/embassy/embassy/embassy" } #embassy-rp = { path = "/home/dirbaio/embassy/embassy/embassy-rp" } +#embassy-net = { path = "/home/dirbaio/embassy/embassy/embassy-net" } +#smoltcp = { path = "./smoltcp" } + +#[patch."https://github.com/smoltcp-rs/smoltcp"] +#smoltcp = { path = "./smoltcp" } [profile.dev] debug = 2 diff --git a/examples/rpi-pico-w/src/main.rs b/examples/rpi-pico-w/src/main.rs index 6d161414..e08ee8e9 100644 --- a/examples/rpi-pico-w/src/main.rs +++ b/examples/rpi-pico-w/src/main.rs @@ -8,9 +8,13 @@ use defmt::{assert, assert_eq, panic, *}; use embassy::executor::Spawner; use embassy::time::{Duration, Timer}; use embassy::util::Forever; +use embassy_net::tcp::TcpSocket; +use embassy_net::{Ipv4Address, Ipv4Cidr, Stack, StackResources}; use embassy_rp::gpio::{Flex, Level, Output, Pin}; use embassy_rp::peripherals::{PIN_23, PIN_24, PIN_25, PIN_29}; use embassy_rp::Peripherals; +use embedded_io::asynch::{Read, Write}; +use heapless::Vec; use {defmt_rtt as _, panic_probe as _}; macro_rules! forever { @@ -26,6 +30,11 @@ async fn wifi_task(runner: cyw43::Runner<'static, PIN_23, PIN_25, PIN_29, PIN_24 runner.run().await } +#[embassy::task] +async fn net_task(stack: &'static Stack>) -> ! { + stack.run().await +} + #[embassy::main] async fn main(spawner: Spawner, p: Peripherals) { info!("Hello World!"); @@ -45,8 +54,71 @@ async fn main(spawner: Spawner, p: Peripherals) { spawner.spawn(wifi_task(runner)).unwrap(); - control.init().await; + let net_device = control.init().await; - //control.join_open("MikroTik-951589").await; - control.join_wpa2("MikroTik-951589", "fasdfasdfasdf").await; + control.join_open("MikroTik-951589").await; + //control.join_wpa2("MikroTik-951589", "asdfasdfasdfasdf").await; + + let config = embassy_net::ConfigStrategy::Dhcp; + //let config = embassy_net::ConfigStrategy::Static(embassy_net::Config { + // address: Ipv4Cidr::new(Ipv4Address::new(192, 168, 69, 2), 24), + // dns_servers: Vec::new(), + // gateway: Some(Ipv4Address::new(192, 168, 69, 1)), + //}); + + // Generate random seed + let seed = 0x0123_4567_89ab_cdef; // chosen by fair dice roll. guarenteed to be random. + + // Init network stack + let stack = &*forever!(Stack::new( + net_device, + config, + forever!(StackResources::<1, 2, 8>::new()), + seed + )); + + unwrap!(spawner.spawn(net_task(stack))); + + // And now we can use it! + + let mut rx_buffer = [0; 4096]; + let mut tx_buffer = [0; 4096]; + let mut buf = [0; 4096]; + + loop { + let mut socket = TcpSocket::new(stack, &mut rx_buffer, &mut tx_buffer); + socket.set_timeout(Some(embassy_net::SmolDuration::from_secs(10))); + + info!("Listening on TCP:1234..."); + if let Err(e) = socket.accept(1234).await { + warn!("accept error: {:?}", e); + continue; + } + + info!("Received connection from {:?}", socket.remote_endpoint()); + + loop { + let n = match socket.read(&mut buf).await { + Ok(0) => { + warn!("read EOF"); + break; + } + Ok(n) => n, + Err(e) => { + warn!("read error: {:?}", e); + break; + } + }; + + info!("rxd {:02x}", &buf[..n]); + + match socket.write_all(&buf[..n]).await { + Ok(()) => {} + Err(e) => { + warn!("write error: {:?}", e); + break; + } + }; + } + } } diff --git a/src/lib.rs b/src/lib.rs index e0c2c931..dde9d9c3 100644 --- a/src/lib.rs +++ b/src/lib.rs @@ -12,12 +12,19 @@ mod structs; use core::cell::Cell; use core::slice; +use core::sync::atomic::Ordering; +use core::task::Waker; +use atomic_polyfill::AtomicBool; +use embassy::blocking_mutex::raw::NoopRawMutex; +use embassy::channel::mpmc::Channel; use embassy::time::{block_for, Duration, Timer}; use embassy::util::yield_now; +use embassy_net::{PacketBoxExt, PacketBuf}; use embassy_rp::gpio::{Flex, Output, Pin}; use self::structs::*; +use crate::events::Event; fn swap16(x: u32) -> u32 { (x & 0xFF00FF00) >> 8 | (x & 0x00FF00FF) << 8 @@ -197,6 +204,10 @@ enum IoctlState { pub struct State { ioctl_id: Cell, ioctl_state: Cell, + + tx_channel: Channel, + rx_channel: Channel, + link_up: AtomicBool, } impl State { @@ -204,6 +215,10 @@ impl State { Self { ioctl_id: Cell::new(0), ioctl_state: Cell::new(IoctlState::Idle), + + tx_channel: Channel::new(), + rx_channel: Channel::new(), + link_up: AtomicBool::new(true), // TODO set up/down as we join/deassociate } } } @@ -213,7 +228,7 @@ pub struct Control<'a> { } impl<'a> Control<'a> { - pub async fn init(&mut self) { + pub async fn init(&mut self) -> NetDevice<'a> { const CHUNK_SIZE: usize = 1024; let clm = unsafe { slice::from_raw_parts(0x10140000 as *const u8, 4752) }; @@ -253,6 +268,15 @@ impl<'a> Control<'a> { self.set_iovar_u32("apsta", 1).await; //self.set_iovar("cur_etheraddr", &[02, 03, 04, 05, 06, 07]).await; + // read MAC addr. + let mut mac_addr = [0; 6]; + assert_eq!(self.get_iovar("cur_etheraddr", &mut mac_addr).await, 6); + info!("mac addr: {:02x}", mac_addr); + + // TODO get_iovar is broken, it returns all zeros. + // Harcdode our own MAC for now. + let mac_addr = [0x28, 0xCD, 0xC1, 0x00, 0x3F, 0x05]; + let country = countries::WORLD_WIDE_XX; let country_info = CountryInfo { country_abbrev: [country.code[0], country.code[1], 0, 0], @@ -283,6 +307,15 @@ impl<'a> Control<'a> { iface: 0, events: [0xFF; 24], }; + + // Disable spammy uninteresting events. + evts.unset(Event::RADIO); + evts.unset(Event::IF); + evts.unset(Event::PROBREQ_MSG); + evts.unset(Event::PROBREQ_MSG_RX); + evts.unset(Event::PROBRESP_MSG); + evts.unset(Event::PROBRESP_MSG); + self.set_iovar("bsscfg:event_msgs", &evts.to_bytes()).await; Timer::after(Duration::from_millis(100)).await; @@ -305,6 +338,11 @@ impl<'a> Control<'a> { Timer::after(Duration::from_millis(100)).await; info!("INIT DONE"); + + NetDevice { + state: self.state, + mac_addr, + } } pub async fn join_open(&mut self, ssid: &str) { @@ -387,6 +425,7 @@ impl<'a> Control<'a> { self.ioctl(2, 263, 0, &mut buf).await; } + // TODO this is not really working, it always returns all zeros. async fn get_iovar(&mut self, name: &str, res: &mut [u8]) -> usize { info!("get {}", name); @@ -395,7 +434,7 @@ impl<'a> Control<'a> { buf[name.len()] = 0; let total_len = name.len() + 1 + res.len(); - let res_len = self.ioctl(2, 262, 0, &mut buf[..total_len]).await - name.len() - 1; + let res_len = self.ioctl(0, 262, 0, &mut buf[..total_len]).await - name.len() - 1; res[..res_len].copy_from_slice(&buf[name.len() + 1..][..res_len]); res_len } @@ -408,9 +447,6 @@ impl<'a> Control<'a> { async fn ioctl(&mut self, kind: u32, cmd: u32, iface: u32, buf: &mut [u8]) -> usize { // TODO cancel ioctl on future drop. - // snail mode 🐌 - Timer::after(Duration::from_millis(100)).await; - while !matches!(self.state.ioctl_state.get(), IoctlState::Idle) { yield_now().await; } @@ -434,6 +470,50 @@ impl<'a> Control<'a> { } } +pub struct NetDevice<'a> { + state: &'a State, + mac_addr: [u8; 6], +} + +impl<'a> embassy_net::Device for NetDevice<'a> { + fn register_waker(&mut self, waker: &Waker) { + // loopy loopy wakey wakey + waker.wake_by_ref() + } + + fn link_state(&mut self) -> embassy_net::LinkState { + match self.state.link_up.load(Ordering::Relaxed) { + true => embassy_net::LinkState::Up, + false => embassy_net::LinkState::Down, + } + } + + fn capabilities(&self) -> embassy_net::DeviceCapabilities { + let mut caps = embassy_net::DeviceCapabilities::default(); + caps.max_transmission_unit = 1514; // 1500 IP + 14 ethernet header + caps.medium = embassy_net::Medium::Ethernet; + caps + } + + fn is_transmit_ready(&mut self) -> bool { + true + } + + fn transmit(&mut self, pkt: PacketBuf) { + if self.state.tx_channel.try_send(pkt).is_err() { + warn!("TX failed") + } + } + + fn receive(&mut self) -> Option { + self.state.rx_channel.try_recv().ok() + } + + fn ethernet_address(&self) -> [u8; 6] { + self.mac_addr + } +} + pub struct Runner<'a, PWR: Pin, CS: Pin, CLK: Pin, DIO: Pin> { state: &'a State, @@ -576,7 +656,10 @@ impl<'a, PWR: Pin, CS: Pin, CLK: Pin, DIO: Pin> Runner<'a, PWR, CS, CLK, DIO> { while self.read32(FUNC_BUS, REG_BUS_STATUS) & STATUS_F2_RX_READY == 0 {} // Some random configs related to sleep. - // I think they're not needed if we don't want sleep...??? + // These aren't needed if we don't want to sleep the bus. + // TODO do we need to sleep the bus to read the irq line, due to + // being on the same pin as MOSI/MISO? + /* let mut val = self.read8(FUNC_BACKPLANE, REG_BACKPLANE_WAKEUP_CTRL); val |= 0x02; // WAKE_TILL_HT_AVAIL @@ -606,11 +689,16 @@ impl<'a, PWR: Pin, CS: Pin, CLK: Pin, DIO: Pin> Runner<'a, PWR, CS, CLK, DIO> { let mut buf = [0; 2048]; loop { // Send stuff + // TODO flow control if let IoctlState::Pending { kind, cmd, iface, buf } = self.state.ioctl_state.get() { self.send_ioctl(kind, cmd, iface, unsafe { &*buf }, self.state.ioctl_id.get()); self.state.ioctl_state.set(IoctlState::Sent { buf }); } + if let Ok(p) = self.state.tx_channel.try_recv() { + self.send_packet(&p); + } + // Receive stuff let irq = self.read16(FUNC_BUS, REG_BUS_INTERRUPT); @@ -646,6 +734,52 @@ impl<'a, PWR: Pin, CS: Pin, CLK: Pin, DIO: Pin> Runner<'a, PWR, CS, CLK, DIO> { } } + fn send_packet(&mut self, packet: &[u8]) { + trace!("tx pkt {:02x}", &packet[..packet.len().min(48)]); + + let mut buf = [0; 2048]; + + let total_len = SdpcmHeader::SIZE + BcdHeader::SIZE + packet.len(); + + let seq = self.ioctl_seq; + self.ioctl_seq = self.ioctl_seq.wrapping_add(1); + + let sdpcm_header = SdpcmHeader { + len: total_len as u16, // TODO does this len need to be rounded up to u32? + len_inv: !total_len as u16, + sequence: seq, + channel_and_flags: 2, // data channel + next_length: 0, + header_length: SdpcmHeader::SIZE as _, + wireless_flow_control: 0, + bus_data_credit: 0, + reserved: [0, 0], + }; + + let bcd_header = BcdHeader { + flags: 0x20, + priority: 0, + flags2: 0, + data_offset: 0, + }; + trace!("tx {:?}", sdpcm_header); + trace!(" {:?}", bcd_header); + + buf[0..SdpcmHeader::SIZE].copy_from_slice(&sdpcm_header.to_bytes()); + buf[SdpcmHeader::SIZE..][..BcdHeader::SIZE].copy_from_slice(&bcd_header.to_bytes()); + buf[SdpcmHeader::SIZE + BcdHeader::SIZE..][..packet.len()].copy_from_slice(packet); + + let total_len = (total_len + 3) & !3; // round up to 4byte + + trace!(" {:02x}", &buf[..total_len.min(48)]); + + let cmd = cmd_word(true, true, FUNC_WLAN, 0, total_len as _); + self.cs.set_low(); + self.spi_write(&cmd.to_le_bytes()); + self.spi_write(&buf[..total_len]); + self.cs.set_high(); + } + fn rx(&mut self, packet: &[u8]) { if packet.len() < SdpcmHeader::SIZE { warn!("packet too short, len={}", packet.len()); @@ -683,6 +817,8 @@ impl<'a, PWR: Pin, CS: Pin, CLK: Pin, DIO: Pin> Runner<'a, PWR, CS, CLK, DIO> { assert_eq!(cdc_header.status, 0); // todo propagate error instead let resp_len = cdc_header.len as usize; + info!("IOCTL Response: {:02x}", &payload[CdcHeader::SIZE..][..resp_len]); + (unsafe { &mut *buf }[..resp_len]).copy_from_slice(&payload[CdcHeader::SIZE..][..resp_len]); self.state.ioctl_state.set(IoctlState::Done { resp_len }); } @@ -703,14 +839,32 @@ impl<'a, PWR: Pin, CS: Pin, CLK: Pin, DIO: Pin> Runner<'a, PWR, CS, CLK, DIO> { let mut evt = EventHeader::from_bytes(&packet[24..][..EventHeader::SIZE].try_into().unwrap()); evt.byteswap(); let evt_data = &packet[24 + EventHeader::SIZE..][..evt.datalen as usize]; - info!( + debug!( "=== EVENT {}: {} {:02x}", events::Event::from(evt.event_type as u8), evt, evt_data ); } + 2 => { + let bcd_header = BcdHeader::from_bytes(&payload[..BcdHeader::SIZE].try_into().unwrap()); + trace!(" {:?}", bcd_header); + let packet_start = BcdHeader::SIZE + 4 * bcd_header.data_offset as usize; + if packet_start > payload.len() { + warn!("packet start out of range."); + return; + } + let packet = &payload[packet_start..]; + trace!("rx pkt {:02x}", &packet[..(packet.len() as usize).min(48)]); + + let mut p = unwrap!(embassy_net::PacketBox::new(embassy_net::Packet::new())); + p[..packet.len()].copy_from_slice(packet); + + if let Err(_) = self.state.rx_channel.try_send(p.slice(0..packet.len())) { + warn!("failed to push rxd packet to the channel.") + } + } _ => {} } } diff --git a/src/structs.rs b/src/structs.rs index dd2c0cfe..060c2b06 100644 --- a/src/structs.rs +++ b/src/structs.rs @@ -1,3 +1,5 @@ +use crate::events::Event; + macro_rules! impl_bytes { ($t:ident) => { impl $t { @@ -157,3 +159,10 @@ pub struct EventMask { pub events: [u8; 24], } impl_bytes!(EventMask); + +impl EventMask { + pub fn unset(&mut self, evt: Event) { + let evt = evt as u8 as usize; + self.events[evt / 8] &= !(1 << (evt % 8)); + } +} From 31410aa5b7d570184b0abcb78d04654d939660db Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Wed, 13 Jul 2022 21:22:52 +0200 Subject: [PATCH 011/130] update rust nightly to match embassy. --- rust-toolchain.toml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/rust-toolchain.toml b/rust-toolchain.toml index 03da4cf7..0fa7cf7b 100644 --- a/rust-toolchain.toml +++ b/rust-toolchain.toml @@ -1,7 +1,7 @@ # Before upgrading check that everything is available on all tier1 targets here: # https://rust-lang.github.io/rustup-components-history [toolchain] -channel = "nightly-2022-07-09" +channel = "nightly-2022-07-13" components = [ "rust-src", "rustfmt" ] targets = [ "thumbv6m-none-eabi", From 7dfdea87971bf7a951b2b1d3fc2e50e245005d07 Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Fri, 15 Jul 2022 18:33:32 +0200 Subject: [PATCH 012/130] Switch to embedded-hal SPI, GPIO traits. --- .vscode/settings.json | 2 +- Cargo.toml | 3 +- examples/rpi-pico-w/src/main.rs | 125 ++++++-- src/lib.rs | 490 +++++++++++++++++--------------- 4 files changed, 364 insertions(+), 256 deletions(-) diff --git a/.vscode/settings.json b/.vscode/settings.json index cc926d04..748816bb 100644 --- a/.vscode/settings.json +++ b/.vscode/settings.json @@ -8,7 +8,7 @@ "rust-analyzer.imports.granularity.enforce": true, "rust-analyzer.imports.granularity.group": "module", "rust-analyzer.procMacro.attributes.enable": false, - "rust-analyzer.procMacro.enable": true, + "rust-analyzer.procMacro.enable": false, "rust-analyzer.linkedProjects": [ "examples/rpi-pico-w/Cargo.toml", ], diff --git a/Cargo.toml b/Cargo.toml index 31a14f96..d35e865b 100644 --- a/Cargo.toml +++ b/Cargo.toml @@ -4,11 +4,10 @@ version = "0.1.0" edition = "2021" [features] -defmt = ["dep:defmt", "embassy-rp/defmt", "embassy/defmt"] +defmt = ["dep:defmt", "embassy/defmt"] log = ["dep:log"] [dependencies] embassy = { version = "0.1.0" } -embassy-rp = { version = "0.1.0", features = ["unstable-traits", "nightly", "unstable-pac"] } embassy-net = { version = "0.1.0" } atomic-polyfill = "0.1.5" diff --git a/examples/rpi-pico-w/src/main.rs b/examples/rpi-pico-w/src/main.rs index e08ee8e9..655535f9 100644 --- a/examples/rpi-pico-w/src/main.rs +++ b/examples/rpi-pico-w/src/main.rs @@ -1,8 +1,9 @@ #![no_std] #![no_main] -#![feature(type_alias_impl_trait, concat_bytes)] +#![feature(generic_associated_types, type_alias_impl_trait)] -use core::slice; +use core::convert::Infallible; +use core::future::Future; use defmt::{assert, assert_eq, panic, *}; use embassy::executor::Spawner; @@ -13,8 +14,9 @@ use embassy_net::{Ipv4Address, Ipv4Cidr, Stack, StackResources}; use embassy_rp::gpio::{Flex, Level, Output, Pin}; use embassy_rp::peripherals::{PIN_23, PIN_24, PIN_25, PIN_29}; use embassy_rp::Peripherals; +use embedded_hal_1::spi::ErrorType; +use embedded_hal_async::spi::{ExclusiveDevice, SpiBusFlush, SpiBusRead, SpiBusWrite}; use embedded_io::asynch::{Read, Write}; -use heapless::Vec; use {defmt_rtt as _, panic_probe as _}; macro_rules! forever { @@ -26,7 +28,9 @@ macro_rules! forever { } #[embassy::task] -async fn wifi_task(runner: cyw43::Runner<'static, PIN_23, PIN_25, PIN_29, PIN_24>) -> ! { +async fn wifi_task( + runner: cyw43::Runner<'static, Output<'static, PIN_23>, ExclusiveDevice>>, +) -> ! { runner.run().await } @@ -39,25 +43,25 @@ async fn net_task(stack: &'static Stack>) -> ! { async fn main(spawner: Spawner, p: Peripherals) { info!("Hello World!"); - let (pwr, cs, clk, dio) = (p.PIN_23, p.PIN_25, p.PIN_29, p.PIN_24); - //let (pwr, cs, clk, dio) = (p.PIN_23, p.PIN_0, p.PIN_1, p.PIN_2); + let pwr = Output::new(p.PIN_23, Level::Low); + let cs = Output::new(p.PIN_25, Level::High); + let clk = Output::new(p.PIN_29, Level::Low); + let mut dio = Flex::new(p.PIN_24); + dio.set_low(); + dio.set_as_output(); + + let bus = MySpi { clk, dio }; + let spi = ExclusiveDevice::new(bus, cs); let state = forever!(cyw43::State::new()); - let (mut control, runner) = cyw43::new( - state, - Output::new(pwr, Level::Low), - Output::new(cs, Level::High), - Output::new(clk, Level::Low), - Flex::new(dio), - ) - .await; + let (mut control, runner) = cyw43::new(state, pwr, spi).await; spawner.spawn(wifi_task(runner)).unwrap(); let net_device = control.init().await; - control.join_open("MikroTik-951589").await; - //control.join_wpa2("MikroTik-951589", "asdfasdfasdfasdf").await; + //control.join_open("MikroTik-951589").await; + control.join_wpa2("DirbaioWifi", "HelloWorld").await; let config = embassy_net::ConfigStrategy::Dhcp; //let config = embassy_net::ConfigStrategy::Static(embassy_net::Config { @@ -122,3 +126,92 @@ async fn main(spawner: Spawner, p: Peripherals) { } } } + +struct MySpi { + /// SPI clock + clk: Output<'static, PIN_29>, + + /// 4 signals, all in one!! + /// - SPI MISO + /// - SPI MOSI + /// - IRQ + /// - strap to set to gSPI mode on boot. + dio: Flex<'static, PIN_24>, +} + +impl ErrorType for MySpi { + type Error = Infallible; +} + +impl SpiBusFlush for MySpi { + type FlushFuture<'a> = impl Future> + where + Self: 'a; + + fn flush<'a>(&'a mut self) -> Self::FlushFuture<'a> { + async move { Ok(()) } + } +} + +impl SpiBusRead for MySpi { + type ReadFuture<'a> = impl Future> + where + Self: 'a; + + fn read<'a>(&'a mut self, words: &'a mut [u8]) -> Self::ReadFuture<'a> { + async move { + self.dio.set_as_input(); + for word in words { + let mut w = 0; + for _ in 0..8 { + w = w << 1; + + // rising edge, sample data + if self.dio.is_high() { + w |= 0x01; + } + self.clk.set_high(); + + // falling edge + self.clk.set_low(); + } + *word = w + } + + Ok(()) + } + } +} + +impl SpiBusWrite for MySpi { + type WriteFuture<'a> = impl Future> + where + Self: 'a; + + fn write<'a>(&'a mut self, words: &'a [u8]) -> Self::WriteFuture<'a> { + async move { + self.dio.set_as_output(); + for word in words { + let mut word = *word; + for _ in 0..8 { + // falling edge, setup data + self.clk.set_low(); + if word & 0x80 == 0 { + self.dio.set_low(); + } else { + self.dio.set_high(); + } + + // rising edge + self.clk.set_high(); + + word = word << 1; + } + } + self.clk.set_low(); + + self.dio.set_as_input(); + Ok(()) + } + } +} diff --git a/src/lib.rs b/src/lib.rs index dde9d9c3..fb693c32 100644 --- a/src/lib.rs +++ b/src/lib.rs @@ -1,6 +1,6 @@ #![no_std] #![no_main] -#![feature(type_alias_impl_trait, concat_bytes, const_slice_from_raw_parts)] +#![feature(type_alias_impl_trait, concat_bytes)] #![deny(unused_must_use)] // This mod MUST go first, so that the others see its macros. @@ -21,7 +21,8 @@ use embassy::channel::mpmc::Channel; use embassy::time::{block_for, Duration, Timer}; use embassy::util::yield_now; use embassy_net::{PacketBoxExt, PacketBuf}; -use embassy_rp::gpio::{Flex, Output, Pin}; +use embedded_hal_1::digital::blocking::OutputPin; +use embedded_hal_async::spi::{SpiBusRead, SpiBusWrite, SpiDevice}; use self::structs::*; use crate::events::Event; @@ -514,41 +515,26 @@ impl<'a> embassy_net::Device for NetDevice<'a> { } } -pub struct Runner<'a, PWR: Pin, CS: Pin, CLK: Pin, DIO: Pin> { +pub struct Runner<'a, PWR, SPI> { state: &'a State, - pwr: Output<'a, PWR>, - - /// SPI chip-select. - cs: Output<'a, CS>, - - /// SPI clock - clk: Output<'a, CLK>, - - /// 4 signals, all in one!! - /// - SPI MISO - /// - SPI MOSI - /// - IRQ - /// - strap to set to gSPI mode on boot. - dio: Flex<'a, DIO>, + pwr: PWR, + spi: SPI, ioctl_seq: u8, backplane_window: u32, } -pub async fn new<'a, PWR: Pin, CS: Pin, CLK: Pin, DIO: Pin>( - state: &'a State, - pwr: Output<'a, PWR>, - cs: Output<'a, CS>, - clk: Output<'a, CLK>, - dio: Flex<'a, DIO>, -) -> (Control<'a>, Runner<'a, PWR, CS, CLK, DIO>) { +pub async fn new<'a, PWR, SPI>(state: &'a State, pwr: PWR, spi: SPI) -> (Control<'a>, Runner<'a, PWR, SPI>) +where + PWR: OutputPin, + SPI: SpiDevice, + SPI::Bus: SpiBusRead + SpiBusWrite, +{ let mut runner = Runner { state, pwr, - cs, - clk, - dio, + spi, ioctl_seq: 0, backplane_window: 0xAAAA_AAAA, @@ -559,52 +545,53 @@ pub async fn new<'a, PWR: Pin, CS: Pin, CLK: Pin, DIO: Pin>( (Control { state }, runner) } -impl<'a, PWR: Pin, CS: Pin, CLK: Pin, DIO: Pin> Runner<'a, PWR, CS, CLK, DIO> { +impl<'a, PWR, SPI> Runner<'a, PWR, SPI> +where + PWR: OutputPin, + SPI: SpiDevice, + SPI::Bus: SpiBusRead + SpiBusWrite, +{ async fn init(&mut self) { - // Set strap to select gSPI mode. - self.dio.set_as_output(); - self.dio.set_low(); - // Reset - self.pwr.set_low(); + self.pwr.set_low().unwrap(); Timer::after(Duration::from_millis(20)).await; - self.pwr.set_high(); + self.pwr.set_high().unwrap(); Timer::after(Duration::from_millis(250)).await; info!("waiting for ping..."); - while self.read32_swapped(REG_BUS_FEEDBEAD) != FEEDBEAD {} + while self.read32_swapped(REG_BUS_FEEDBEAD).await != FEEDBEAD {} info!("ping ok"); - self.write32_swapped(0x18, TEST_PATTERN); - let val = self.read32_swapped(REG_BUS_TEST); + self.write32_swapped(0x18, TEST_PATTERN).await; + let val = self.read32_swapped(REG_BUS_TEST).await; assert_eq!(val, TEST_PATTERN); // 32bit, big endian. - self.write32_swapped(REG_BUS_CTRL, 0x00010033); + self.write32_swapped(REG_BUS_CTRL, 0x00010033).await; - let val = self.read32(FUNC_BUS, REG_BUS_FEEDBEAD); + let val = self.read32(FUNC_BUS, REG_BUS_FEEDBEAD).await; assert_eq!(val, FEEDBEAD); - let val = self.read32(FUNC_BUS, REG_BUS_TEST); + let val = self.read32(FUNC_BUS, REG_BUS_TEST).await; assert_eq!(val, TEST_PATTERN); // No response delay in any of the funcs. // seems to break backplane??? eat the 4-byte delay instead, that's what the vendor drivers do... - //self.write32(FUNC_BUS, REG_BUS_RESP_DELAY, 0); + //self.write32(FUNC_BUS, REG_BUS_RESP_DELAY, 0).await; // Init ALP (no idea what that stands for) clock - self.write8(FUNC_BACKPLANE, REG_BACKPLANE_CHIP_CLOCK_CSR, 0x08); + self.write8(FUNC_BACKPLANE, REG_BACKPLANE_CHIP_CLOCK_CSR, 0x08).await; info!("waiting for clock..."); - while self.read8(FUNC_BACKPLANE, REG_BACKPLANE_CHIP_CLOCK_CSR) & 0x40 == 0 {} + while self.read8(FUNC_BACKPLANE, REG_BACKPLANE_CHIP_CLOCK_CSR).await & 0x40 == 0 {} info!("clock ok"); - let chip_id = self.bp_read16(0x1800_0000); + let chip_id = self.bp_read16(0x1800_0000).await; info!("chip ID: {}", chip_id); // Upload firmware. - self.core_disable(Core::WLAN); - self.core_reset(Core::SOCSRAM); - self.bp_write32(CHIP.socsram_base_address + 0x10, 3); - self.bp_write32(CHIP.socsram_base_address + 0x44, 0); + self.core_disable(Core::WLAN).await; + self.core_reset(Core::SOCSRAM).await; + self.bp_write32(CHIP.socsram_base_address + 0x10, 3).await; + self.bp_write32(CHIP.socsram_base_address + 0x44, 0).await; let ram_addr = CHIP.atcm_ram_base_address; @@ -618,42 +605,44 @@ impl<'a, PWR: Pin, CS: Pin, CLK: Pin, DIO: Pin> Runner<'a, PWR, CS, CLK, DIO> { let fw = unsafe { slice::from_raw_parts(0x10100000 as *const u8, 224190) }; info!("loading fw"); - self.bp_write(ram_addr, fw); + self.bp_write(ram_addr, fw).await; info!("verifying fw"); let mut buf = [0; 1024]; for (i, chunk) in fw.chunks(1024).enumerate() { let buf = &mut buf[..chunk.len()]; - self.bp_read(ram_addr + i as u32 * 1024, buf); + self.bp_read(ram_addr + i as u32 * 1024, buf).await; assert_eq!(chunk, buf); } info!("loading nvram"); // Round up to 4 bytes. let nvram_len = (NVRAM.len() + 3) / 4 * 4; - self.bp_write(ram_addr + CHIP.chip_ram_size - 4 - nvram_len as u32, NVRAM); + self.bp_write(ram_addr + CHIP.chip_ram_size - 4 - nvram_len as u32, NVRAM) + .await; let nvram_len_words = nvram_len as u32 / 4; let nvram_len_magic = (!nvram_len_words << 16) | nvram_len_words; - self.bp_write32(ram_addr + CHIP.chip_ram_size - 4, nvram_len_magic); + self.bp_write32(ram_addr + CHIP.chip_ram_size - 4, nvram_len_magic) + .await; // Start core! info!("starting up core..."); - self.core_reset(Core::WLAN); - assert!(self.core_is_up(Core::WLAN)); + self.core_reset(Core::WLAN).await; + assert!(self.core_is_up(Core::WLAN).await); - while self.read8(FUNC_BACKPLANE, REG_BACKPLANE_CHIP_CLOCK_CSR) & 0x80 == 0 {} + while self.read8(FUNC_BACKPLANE, REG_BACKPLANE_CHIP_CLOCK_CSR).await & 0x80 == 0 {} // "Set up the interrupt mask and enable interrupts" - self.bp_write32(CHIP.sdiod_core_base_address + 0x24, 0xF0); + self.bp_write32(CHIP.sdiod_core_base_address + 0x24, 0xF0).await; // "Lower F2 Watermark to avoid DMA Hang in F2 when SD Clock is stopped." // Sounds scary... - self.write8(FUNC_BACKPLANE, REG_BACKPLANE_FUNCTION2_WATERMARK, 32); + self.write8(FUNC_BACKPLANE, REG_BACKPLANE_FUNCTION2_WATERMARK, 32).await; // wait for wifi startup info!("waiting for wifi init..."); - while self.read32(FUNC_BUS, REG_BUS_STATUS) & STATUS_F2_RX_READY == 0 {} + while self.read32(FUNC_BUS, REG_BUS_STATUS).await & STATUS_F2_RX_READY == 0 {} // Some random configs related to sleep. // These aren't needed if we don't want to sleep the bus. @@ -661,25 +650,25 @@ impl<'a, PWR: Pin, CS: Pin, CLK: Pin, DIO: Pin> Runner<'a, PWR, CS, CLK, DIO> { // being on the same pin as MOSI/MISO? /* - let mut val = self.read8(FUNC_BACKPLANE, REG_BACKPLANE_WAKEUP_CTRL); + let mut val = self.read8(FUNC_BACKPLANE, REG_BACKPLANE_WAKEUP_CTRL).await; val |= 0x02; // WAKE_TILL_HT_AVAIL - self.write8(FUNC_BACKPLANE, REG_BACKPLANE_WAKEUP_CTRL, val); - self.write8(FUNC_BUS, 0xF0, 0x08); // SDIOD_CCCR_BRCM_CARDCAP.CMD_NODEC = 1 - self.write8(FUNC_BACKPLANE, REG_BACKPLANE_CHIP_CLOCK_CSR, 0x02); // SBSDIO_FORCE_HT + self.write8(FUNC_BACKPLANE, REG_BACKPLANE_WAKEUP_CTRL, val).await; + self.write8(FUNC_BUS, 0xF0, 0x08).await; // SDIOD_CCCR_BRCM_CARDCAP.CMD_NODEC = 1 + self.write8(FUNC_BACKPLANE, REG_BACKPLANE_CHIP_CLOCK_CSR, 0x02).await; // SBSDIO_FORCE_HT - let mut val = self.read8(FUNC_BACKPLANE, REG_BACKPLANE_SLEEP_CSR); + let mut val = self.read8(FUNC_BACKPLANE, REG_BACKPLANE_SLEEP_CSR).await; val |= 0x01; // SBSDIO_SLPCSR_KEEP_SDIO_ON - self.write8(FUNC_BACKPLANE, REG_BACKPLANE_SLEEP_CSR, val); + self.write8(FUNC_BACKPLANE, REG_BACKPLANE_SLEEP_CSR, val).await; */ // clear pulls - self.write8(FUNC_BACKPLANE, REG_BACKPLANE_PULL_UP, 0); - let _ = self.read8(FUNC_BACKPLANE, REG_BACKPLANE_PULL_UP); + self.write8(FUNC_BACKPLANE, REG_BACKPLANE_PULL_UP, 0).await; + let _ = self.read8(FUNC_BACKPLANE, REG_BACKPLANE_PULL_UP).await; // start HT clock - //self.write8(FUNC_BACKPLANE, REG_BACKPLANE_CHIP_CLOCK_CSR, 0x10); + //self.write8(FUNC_BACKPLANE, REG_BACKPLANE_CHIP_CLOCK_CSR, 0x10).await; //info!("waiting for HT clock..."); - //while self.read8(FUNC_BACKPLANE, REG_BACKPLANE_CHIP_CLOCK_CSR) & 0x80 == 0 {} + //while self.read8(FUNC_BACKPLANE, REG_BACKPLANE_CHIP_CLOCK_CSR).await & 0x80 == 0 {} //info!("clock ok"); info!("init done "); @@ -691,21 +680,22 @@ impl<'a, PWR: Pin, CS: Pin, CLK: Pin, DIO: Pin> Runner<'a, PWR, CS, CLK, DIO> { // Send stuff // TODO flow control if let IoctlState::Pending { kind, cmd, iface, buf } = self.state.ioctl_state.get() { - self.send_ioctl(kind, cmd, iface, unsafe { &*buf }, self.state.ioctl_id.get()); + self.send_ioctl(kind, cmd, iface, unsafe { &*buf }, self.state.ioctl_id.get()) + .await; self.state.ioctl_state.set(IoctlState::Sent { buf }); } if let Ok(p) = self.state.tx_channel.try_recv() { - self.send_packet(&p); + self.send_packet(&p).await; } // Receive stuff - let irq = self.read16(FUNC_BUS, REG_BUS_INTERRUPT); + let irq = self.read16(FUNC_BUS, REG_BUS_INTERRUPT).await; if irq & IRQ_F2_PACKET_AVAILABLE != 0 { let mut status = 0xFFFF_FFFF; while status == 0xFFFF_FFFF { - status = self.read32(FUNC_BUS, REG_BUS_STATUS); + status = self.read32(FUNC_BUS, REG_BUS_STATUS).await; } if status & STATUS_F2_PKT_AVAILABLE != 0 { @@ -713,15 +703,23 @@ impl<'a, PWR: Pin, CS: Pin, CLK: Pin, DIO: Pin> Runner<'a, PWR, CS, CLK, DIO> { let cmd = cmd_word(false, true, FUNC_WLAN, 0, len); - self.cs.set_low(); - self.spi_write(&cmd.to_le_bytes()); - self.spi_read(&mut buf[..len as usize]); - // pad to 32bit - let mut junk = [0; 4]; - if len % 4 != 0 { - self.spi_read(&mut junk[..(4 - len as usize % 4)]); - } - self.cs.set_high(); + self.spi + .transaction(|bus| { + let bus = unsafe { &mut *bus }; + async { + bus.write(&cmd.to_le_bytes()).await?; + bus.read(&mut buf[..len as usize]).await?; + // pad to 32bit + let mut junk = [0; 4]; + if len % 4 != 0 { + bus.read(&mut junk[..(4 - len as usize % 4)]).await?; + } + + Ok(()) + } + }) + .await + .unwrap(); trace!("rx {:02x}", &buf[..(len as usize).min(48)]); @@ -734,7 +732,7 @@ impl<'a, PWR: Pin, CS: Pin, CLK: Pin, DIO: Pin> Runner<'a, PWR, CS, CLK, DIO> { } } - fn send_packet(&mut self, packet: &[u8]) { + async fn send_packet(&mut self, packet: &[u8]) { trace!("tx pkt {:02x}", &packet[..packet.len().min(48)]); let mut buf = [0; 2048]; @@ -774,10 +772,17 @@ impl<'a, PWR: Pin, CS: Pin, CLK: Pin, DIO: Pin> Runner<'a, PWR, CS, CLK, DIO> { trace!(" {:02x}", &buf[..total_len.min(48)]); let cmd = cmd_word(true, true, FUNC_WLAN, 0, total_len as _); - self.cs.set_low(); - self.spi_write(&cmd.to_le_bytes()); - self.spi_write(&buf[..total_len]); - self.cs.set_high(); + self.spi + .transaction(|bus| { + let bus = unsafe { &mut *bus }; + async { + bus.write(&cmd.to_le_bytes()).await?; + bus.write(&buf[..total_len]).await?; + Ok(()) + } + }) + .await + .unwrap(); } fn rx(&mut self, packet: &[u8]) { @@ -869,7 +874,7 @@ impl<'a, PWR: Pin, CS: Pin, CLK: Pin, DIO: Pin> Runner<'a, PWR, CS, CLK, DIO> { } } - fn send_ioctl(&mut self, kind: u32, cmd: u32, iface: u32, data: &[u8], id: u16) { + async fn send_ioctl(&mut self, kind: u32, cmd: u32, iface: u32, data: &[u8], id: u16) { let mut buf = [0; 2048]; let total_len = SdpcmHeader::SIZE + CdcHeader::SIZE + data.len(); @@ -908,60 +913,69 @@ impl<'a, PWR: Pin, CS: Pin, CLK: Pin, DIO: Pin> Runner<'a, PWR, CS, CLK, DIO> { trace!(" {:02x}", &buf[..total_len.min(48)]); let cmd = cmd_word(true, true, FUNC_WLAN, 0, total_len as _); - self.cs.set_low(); - self.spi_write(&cmd.to_le_bytes()); - self.spi_write(&buf[..total_len]); - self.cs.set_high(); + + self.spi + .transaction(|bus| { + let bus = unsafe { &mut *bus }; + async { + bus.write(&cmd.to_le_bytes()).await?; + bus.write(&buf[..total_len]).await?; + Ok(()) + } + }) + .await + .unwrap(); } - fn core_disable(&mut self, core: Core) { + async fn core_disable(&mut self, core: Core) { let base = core.base_addr(); // Dummy read? - let _ = self.bp_read8(base + AI_RESETCTRL_OFFSET); + let _ = self.bp_read8(base + AI_RESETCTRL_OFFSET).await; // Check it isn't already reset - let r = self.bp_read8(base + AI_RESETCTRL_OFFSET); + let r = self.bp_read8(base + AI_RESETCTRL_OFFSET).await; if r & AI_RESETCTRL_BIT_RESET != 0 { return; } - self.bp_write8(base + AI_IOCTRL_OFFSET, 0); - let _ = self.bp_read8(base + AI_IOCTRL_OFFSET); + self.bp_write8(base + AI_IOCTRL_OFFSET, 0).await; + let _ = self.bp_read8(base + AI_IOCTRL_OFFSET).await; block_for(Duration::from_millis(1)); - self.bp_write8(base + AI_RESETCTRL_OFFSET, AI_RESETCTRL_BIT_RESET); - let _ = self.bp_read8(base + AI_RESETCTRL_OFFSET); + self.bp_write8(base + AI_RESETCTRL_OFFSET, AI_RESETCTRL_BIT_RESET).await; + let _ = self.bp_read8(base + AI_RESETCTRL_OFFSET).await; } - fn core_reset(&mut self, core: Core) { - self.core_disable(core); + async fn core_reset(&mut self, core: Core) { + self.core_disable(core).await; let base = core.base_addr(); - self.bp_write8(base + AI_IOCTRL_OFFSET, AI_IOCTRL_BIT_FGC | AI_IOCTRL_BIT_CLOCK_EN); - let _ = self.bp_read8(base + AI_IOCTRL_OFFSET); + self.bp_write8(base + AI_IOCTRL_OFFSET, AI_IOCTRL_BIT_FGC | AI_IOCTRL_BIT_CLOCK_EN) + .await; + let _ = self.bp_read8(base + AI_IOCTRL_OFFSET).await; - self.bp_write8(base + AI_RESETCTRL_OFFSET, 0); + self.bp_write8(base + AI_RESETCTRL_OFFSET, 0).await; - block_for(Duration::from_millis(1)); + Timer::after(Duration::from_millis(1)).await; - self.bp_write8(base + AI_IOCTRL_OFFSET, AI_IOCTRL_BIT_CLOCK_EN); - let _ = self.bp_read8(base + AI_IOCTRL_OFFSET); + self.bp_write8(base + AI_IOCTRL_OFFSET, AI_IOCTRL_BIT_CLOCK_EN).await; + let _ = self.bp_read8(base + AI_IOCTRL_OFFSET).await; - block_for(Duration::from_millis(1)); + Timer::after(Duration::from_millis(1)).await; } - fn core_is_up(&mut self, core: Core) -> bool { + async fn core_is_up(&mut self, core: Core) -> bool { let base = core.base_addr(); - let io = self.bp_read8(base + AI_IOCTRL_OFFSET); + let io = self.bp_read8(base + AI_IOCTRL_OFFSET).await; if io & (AI_IOCTRL_BIT_FGC | AI_IOCTRL_BIT_CLOCK_EN) != AI_IOCTRL_BIT_CLOCK_EN { debug!("core_is_up: returning false due to bad ioctrl {:02x}", io); return false; } - let r = self.bp_read8(base + AI_RESETCTRL_OFFSET); + let r = self.bp_read8(base + AI_RESETCTRL_OFFSET).await; if r & (AI_RESETCTRL_BIT_RESET) != 0 { debug!("core_is_up: returning false due to bad resetctrl {:02x}", r); return false; @@ -970,7 +984,7 @@ impl<'a, PWR: Pin, CS: Pin, CLK: Pin, DIO: Pin> Runner<'a, PWR, CS, CLK, DIO> { true } - fn bp_read(&mut self, mut addr: u32, mut data: &mut [u8]) { + async fn bp_read(&mut self, mut addr: u32, mut data: &mut [u8]) { // It seems the HW force-aligns the addr // to 2 if data.len() >= 2 // to 4 if data.len() >= 4 @@ -984,24 +998,32 @@ impl<'a, PWR: Pin, CS: Pin, CLK: Pin, DIO: Pin> Runner<'a, PWR, CS, CLK, DIO> { let len = data.len().min(BACKPLANE_MAX_TRANSFER_SIZE).min(window_remaining); - self.backplane_set_window(addr); + self.backplane_set_window(addr).await; let cmd = cmd_word(false, true, FUNC_BACKPLANE, window_offs, len as u32); - self.cs.set_low(); - self.spi_write(&cmd.to_le_bytes()); - // 4-byte response delay. - let mut junk = [0; 4]; - self.spi_read(&mut junk); + self.spi + .transaction(|bus| { + let bus = unsafe { &mut *bus }; + async { + bus.write(&cmd.to_le_bytes()).await?; - // Read data - self.spi_read(&mut data[..len]); + // 4-byte response delay. + let mut junk = [0; 4]; + bus.read(&mut junk).await?; - // pad to 32bit - if len % 4 != 0 { - self.spi_read(&mut junk[..(4 - len % 4)]); - } - self.cs.set_high(); + // Read data + bus.read(&mut data[..len]).await?; + + // pad to 32bit + if len % 4 != 0 { + bus.read(&mut junk[..(4 - len % 4)]).await?; + } + Ok(()) + } + }) + .await + .unwrap(); // Advance ptr. addr += len as u32; @@ -1009,7 +1031,7 @@ impl<'a, PWR: Pin, CS: Pin, CLK: Pin, DIO: Pin> Runner<'a, PWR, CS, CLK, DIO> { } } - fn bp_write(&mut self, mut addr: u32, mut data: &[u8]) { + async fn bp_write(&mut self, mut addr: u32, mut data: &[u8]) { // It seems the HW force-aligns the addr // to 2 if data.len() >= 2 // to 4 if data.len() >= 4 @@ -1023,18 +1045,26 @@ impl<'a, PWR: Pin, CS: Pin, CLK: Pin, DIO: Pin> Runner<'a, PWR, CS, CLK, DIO> { let len = data.len().min(BACKPLANE_MAX_TRANSFER_SIZE).min(window_remaining); - self.backplane_set_window(addr); + self.backplane_set_window(addr).await; let cmd = cmd_word(true, true, FUNC_BACKPLANE, window_offs, len as u32); - self.cs.set_low(); - self.spi_write(&cmd.to_le_bytes()); - self.spi_write(&data[..len]); - // pad to 32bit - if len % 4 != 0 { - let zeros = [0; 4]; - self.spi_write(&zeros[..(4 - len % 4)]); - } - self.cs.set_high(); + + self.spi + .transaction(|bus| { + let bus = unsafe { &mut *bus }; + async { + bus.write(&cmd.to_le_bytes()).await?; + bus.write(&data[..len]).await?; + // pad to 32bit + if len % 4 != 0 { + let zeros = [0; 4]; + bus.write(&zeros[..(4 - len % 4)]).await?; + } + Ok(()) + } + }) + .await + .unwrap(); // Advance ptr. addr += len as u32; @@ -1042,51 +1072,51 @@ impl<'a, PWR: Pin, CS: Pin, CLK: Pin, DIO: Pin> Runner<'a, PWR, CS, CLK, DIO> { } } - fn bp_read8(&mut self, addr: u32) -> u8 { - self.backplane_readn(addr, 1) as u8 + async fn bp_read8(&mut self, addr: u32) -> u8 { + self.backplane_readn(addr, 1).await as u8 } - fn bp_write8(&mut self, addr: u32, val: u8) { - self.backplane_writen(addr, val as u32, 1) + async fn bp_write8(&mut self, addr: u32, val: u8) { + self.backplane_writen(addr, val as u32, 1).await } - fn bp_read16(&mut self, addr: u32) -> u16 { - self.backplane_readn(addr, 2) as u16 + async fn bp_read16(&mut self, addr: u32) -> u16 { + self.backplane_readn(addr, 2).await as u16 } - fn bp_write16(&mut self, addr: u32, val: u16) { - self.backplane_writen(addr, val as u32, 2) + async fn bp_write16(&mut self, addr: u32, val: u16) { + self.backplane_writen(addr, val as u32, 2).await } - fn bp_read32(&mut self, addr: u32) -> u32 { - self.backplane_readn(addr, 4) + async fn bp_read32(&mut self, addr: u32) -> u32 { + self.backplane_readn(addr, 4).await } - fn bp_write32(&mut self, addr: u32, val: u32) { - self.backplane_writen(addr, val, 4) + async fn bp_write32(&mut self, addr: u32, val: u32) { + self.backplane_writen(addr, val, 4).await } - fn backplane_readn(&mut self, addr: u32, len: u32) -> u32 { - self.backplane_set_window(addr); + async fn backplane_readn(&mut self, addr: u32, len: u32) -> u32 { + self.backplane_set_window(addr).await; let mut bus_addr = addr & BACKPLANE_ADDRESS_MASK; if len == 4 { bus_addr |= BACKPLANE_ADDRESS_32BIT_FLAG } - self.readn(FUNC_BACKPLANE, bus_addr, len) + self.readn(FUNC_BACKPLANE, bus_addr, len).await } - fn backplane_writen(&mut self, addr: u32, val: u32, len: u32) { - self.backplane_set_window(addr); + async fn backplane_writen(&mut self, addr: u32, val: u32, len: u32) { + self.backplane_set_window(addr).await; let mut bus_addr = addr & BACKPLANE_ADDRESS_MASK; if len == 4 { bus_addr |= BACKPLANE_ADDRESS_32BIT_FLAG } - self.writen(FUNC_BACKPLANE, bus_addr, val, len) + self.writen(FUNC_BACKPLANE, bus_addr, val, len).await } - fn backplane_set_window(&mut self, addr: u32) { + async fn backplane_set_window(&mut self, addr: u32) { let new_window = addr & !BACKPLANE_ADDRESS_MASK; if (new_window >> 24) as u8 != (self.backplane_window >> 24) as u8 { @@ -1094,138 +1124,124 @@ impl<'a, PWR: Pin, CS: Pin, CLK: Pin, DIO: Pin> Runner<'a, PWR, CS, CLK, DIO> { FUNC_BACKPLANE, REG_BACKPLANE_BACKPLANE_ADDRESS_HIGH, (new_window >> 24) as u8, - ); + ) + .await; } if (new_window >> 16) as u8 != (self.backplane_window >> 16) as u8 { self.write8( FUNC_BACKPLANE, REG_BACKPLANE_BACKPLANE_ADDRESS_MID, (new_window >> 16) as u8, - ); + ) + .await; } if (new_window >> 8) as u8 != (self.backplane_window >> 8) as u8 { self.write8( FUNC_BACKPLANE, REG_BACKPLANE_BACKPLANE_ADDRESS_LOW, (new_window >> 8) as u8, - ); + ) + .await; } self.backplane_window = new_window; } - fn read8(&mut self, func: u32, addr: u32) -> u8 { - self.readn(func, addr, 1) as u8 + async fn read8(&mut self, func: u32, addr: u32) -> u8 { + self.readn(func, addr, 1).await as u8 } - fn write8(&mut self, func: u32, addr: u32, val: u8) { - self.writen(func, addr, val as u32, 1) + async fn write8(&mut self, func: u32, addr: u32, val: u8) { + self.writen(func, addr, val as u32, 1).await } - fn read16(&mut self, func: u32, addr: u32) -> u16 { - self.readn(func, addr, 2) as u16 + async fn read16(&mut self, func: u32, addr: u32) -> u16 { + self.readn(func, addr, 2).await as u16 } - fn write16(&mut self, func: u32, addr: u32, val: u16) { - self.writen(func, addr, val as u32, 2) + async fn write16(&mut self, func: u32, addr: u32, val: u16) { + self.writen(func, addr, val as u32, 2).await } - fn read32(&mut self, func: u32, addr: u32) -> u32 { - self.readn(func, addr, 4) + async fn read32(&mut self, func: u32, addr: u32) -> u32 { + self.readn(func, addr, 4).await } - fn write32(&mut self, func: u32, addr: u32, val: u32) { - self.writen(func, addr, val, 4) + async fn write32(&mut self, func: u32, addr: u32, val: u32) { + self.writen(func, addr, val, 4).await } - fn readn(&mut self, func: u32, addr: u32, len: u32) -> u32 { + async fn readn(&mut self, func: u32, addr: u32, len: u32) -> u32 { let cmd = cmd_word(false, true, func, addr, len); let mut buf = [0; 4]; - self.cs.set_low(); - self.spi_write(&cmd.to_le_bytes()); - if func == FUNC_BACKPLANE { - // 4-byte response delay. - self.spi_read(&mut buf); - } - self.spi_read(&mut buf); - self.cs.set_high(); + self.spi + .transaction(|bus| { + let bus = unsafe { &mut *bus }; + async { + bus.write(&cmd.to_le_bytes()).await?; + if func == FUNC_BACKPLANE { + // 4-byte response delay. + bus.read(&mut buf).await?; + } + bus.read(&mut buf).await?; + Ok(()) + } + }) + .await + .unwrap(); u32::from_le_bytes(buf) } - fn writen(&mut self, func: u32, addr: u32, val: u32, len: u32) { + async fn writen(&mut self, func: u32, addr: u32, val: u32, len: u32) { let cmd = cmd_word(true, true, func, addr, len); - self.cs.set_low(); - self.spi_write(&cmd.to_le_bytes()); - self.spi_write(&val.to_le_bytes()); - self.cs.set_high(); + self.spi + .transaction(|bus| { + let bus = unsafe { &mut *bus }; + async { + bus.write(&cmd.to_le_bytes()).await?; + bus.write(&val.to_le_bytes()).await?; + Ok(()) + } + }) + .await + .unwrap(); } - fn read32_swapped(&mut self, addr: u32) -> u32 { + async fn read32_swapped(&mut self, addr: u32) -> u32 { let cmd = cmd_word(false, true, FUNC_BUS, addr, 4); let mut buf = [0; 4]; - self.cs.set_low(); - self.spi_write(&swap16(cmd).to_le_bytes()); - self.spi_read(&mut buf); - self.cs.set_high(); + self.spi + .transaction(|bus| { + let bus = unsafe { &mut *bus }; + async { + bus.write(&swap16(cmd).to_le_bytes()).await?; + bus.read(&mut buf).await?; + Ok(()) + } + }) + .await + .unwrap(); swap16(u32::from_le_bytes(buf)) } - fn write32_swapped(&mut self, addr: u32, val: u32) { + async fn write32_swapped(&mut self, addr: u32, val: u32) { let cmd = cmd_word(true, true, FUNC_BUS, addr, 4); - self.cs.set_low(); - self.spi_write(&swap16(cmd).to_le_bytes()); - self.spi_write(&swap16(val).to_le_bytes()); - self.cs.set_high(); - } - - fn spi_read(&mut self, words: &mut [u8]) { - self.dio.set_as_input(); - for word in words { - let mut w = 0; - for _ in 0..8 { - w = w << 1; - - // rising edge, sample data - if self.dio.is_high() { - w |= 0x01; + self.spi + .transaction(|bus| { + let bus = unsafe { &mut *bus }; + async { + bus.write(&swap16(cmd).to_le_bytes()).await?; + bus.write(&swap16(val).to_le_bytes()).await?; + Ok(()) } - self.clk.set_high(); - - // falling edge - self.clk.set_low(); - } - *word = w - } - self.clk.set_low(); - } - - fn spi_write(&mut self, words: &[u8]) { - self.dio.set_as_output(); - for word in words { - let mut word = *word; - for _ in 0..8 { - // falling edge, setup data - self.clk.set_low(); - if word & 0x80 == 0 { - self.dio.set_low(); - } else { - self.dio.set_high(); - } - - // rising edge - self.clk.set_high(); - - word = word << 1; - } - } - self.clk.set_low(); - - self.dio.set_as_input(); + }) + .await + .unwrap(); } } From 931e3d7ee0cb1ff9f320b22aab3f4ea375a1c624 Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Sat, 16 Jul 2022 18:06:57 +0200 Subject: [PATCH 013/130] Switch to 32bit SPI. --- examples/rpi-pico-w/src/main.rs | 14 ++-- src/lib.rs | 112 ++++++++++++++------------------ 2 files changed, 55 insertions(+), 71 deletions(-) diff --git a/examples/rpi-pico-w/src/main.rs b/examples/rpi-pico-w/src/main.rs index 655535f9..475c6906 100644 --- a/examples/rpi-pico-w/src/main.rs +++ b/examples/rpi-pico-w/src/main.rs @@ -153,17 +153,17 @@ impl SpiBusFlush for MySpi { } } -impl SpiBusRead for MySpi { +impl SpiBusRead for MySpi { type ReadFuture<'a> = impl Future> where Self: 'a; - fn read<'a>(&'a mut self, words: &'a mut [u8]) -> Self::ReadFuture<'a> { + fn read<'a>(&'a mut self, words: &'a mut [u32]) -> Self::ReadFuture<'a> { async move { self.dio.set_as_input(); for word in words { let mut w = 0; - for _ in 0..8 { + for _ in 0..32 { w = w << 1; // rising edge, sample data @@ -183,20 +183,20 @@ impl SpiBusRead for MySpi { } } -impl SpiBusWrite for MySpi { +impl SpiBusWrite for MySpi { type WriteFuture<'a> = impl Future> where Self: 'a; - fn write<'a>(&'a mut self, words: &'a [u8]) -> Self::WriteFuture<'a> { + fn write<'a>(&'a mut self, words: &'a [u32]) -> Self::WriteFuture<'a> { async move { self.dio.set_as_output(); for word in words { let mut word = *word; - for _ in 0..8 { + for _ in 0..32 { // falling edge, setup data self.clk.set_low(); - if word & 0x80 == 0 { + if word & 0x8000_0000 == 0 { self.dio.set_low(); } else { self.dio.set_high(); diff --git a/src/lib.rs b/src/lib.rs index fb693c32..8c235b17 100644 --- a/src/lib.rs +++ b/src/lib.rs @@ -28,13 +28,18 @@ use self::structs::*; use crate::events::Event; fn swap16(x: u32) -> u32 { - (x & 0xFF00FF00) >> 8 | (x & 0x00FF00FF) << 8 + x.rotate_left(16) } fn cmd_word(write: bool, incr: bool, func: u32, addr: u32, len: u32) -> u32 { (write as u32) << 31 | (incr as u32) << 30 | (func & 0b11) << 28 | (addr & 0x1FFFF) << 11 | (len & 0x7FF) } +fn slice8_mut(x: &mut [u32]) -> &mut [u8] { + let len = x.len() * 4; + unsafe { slice::from_raw_parts_mut(x.as_mut_ptr() as _, len) } +} + const FUNC_BUS: u32 = 0; const FUNC_BACKPLANE: u32 = 1; const FUNC_WLAN: u32 = 2; @@ -529,7 +534,7 @@ pub async fn new<'a, PWR, SPI>(state: &'a State, pwr: PWR, spi: SPI) -> (Control where PWR: OutputPin, SPI: SpiDevice, - SPI::Bus: SpiBusRead + SpiBusWrite, + SPI::Bus: SpiBusRead + SpiBusWrite, { let mut runner = Runner { state, @@ -549,7 +554,7 @@ impl<'a, PWR, SPI> Runner<'a, PWR, SPI> where PWR: OutputPin, SPI: SpiDevice, - SPI::Bus: SpiBusRead + SpiBusWrite, + SPI::Bus: SpiBusRead + SpiBusWrite, { async fn init(&mut self) { // Reset @@ -566,8 +571,8 @@ where let val = self.read32_swapped(REG_BUS_TEST).await; assert_eq!(val, TEST_PATTERN); - // 32bit, big endian. - self.write32_swapped(REG_BUS_CTRL, 0x00010033).await; + // 32bit, little endian. + self.write32_swapped(REG_BUS_CTRL, 0x00010031).await; let val = self.read32(FUNC_BUS, REG_BUS_FEEDBEAD).await; assert_eq!(val, FEEDBEAD); @@ -607,14 +612,6 @@ where info!("loading fw"); self.bp_write(ram_addr, fw).await; - info!("verifying fw"); - let mut buf = [0; 1024]; - for (i, chunk) in fw.chunks(1024).enumerate() { - let buf = &mut buf[..chunk.len()]; - self.bp_read(ram_addr + i as u32 * 1024, buf).await; - assert_eq!(chunk, buf); - } - info!("loading nvram"); // Round up to 4 bytes. let nvram_len = (NVRAM.len() + 3) / 4 * 4; @@ -675,7 +672,7 @@ where } pub async fn run(mut self) -> ! { - let mut buf = [0; 2048]; + let mut buf = [0; 512]; loop { // Send stuff // TODO flow control @@ -707,14 +704,8 @@ where .transaction(|bus| { let bus = unsafe { &mut *bus }; async { - bus.write(&cmd.to_le_bytes()).await?; - bus.read(&mut buf[..len as usize]).await?; - // pad to 32bit - let mut junk = [0; 4]; - if len % 4 != 0 { - bus.read(&mut junk[..(4 - len as usize % 4)]).await?; - } - + bus.write(&[cmd]).await?; + bus.read(&mut buf[..(len as usize + 3) / 4]).await?; Ok(()) } }) @@ -723,7 +714,7 @@ where trace!("rx {:02x}", &buf[..(len as usize).min(48)]); - self.rx(&buf[..len as usize]); + self.rx(&slice8_mut(&mut buf)[..len as usize]); } } @@ -735,7 +726,8 @@ where async fn send_packet(&mut self, packet: &[u8]) { trace!("tx pkt {:02x}", &packet[..packet.len().min(48)]); - let mut buf = [0; 2048]; + let mut buf = [0; 512]; + let buf8 = slice8_mut(&mut buf); let total_len = SdpcmHeader::SIZE + BcdHeader::SIZE + packet.len(); @@ -763,21 +755,21 @@ where trace!("tx {:?}", sdpcm_header); trace!(" {:?}", bcd_header); - buf[0..SdpcmHeader::SIZE].copy_from_slice(&sdpcm_header.to_bytes()); - buf[SdpcmHeader::SIZE..][..BcdHeader::SIZE].copy_from_slice(&bcd_header.to_bytes()); - buf[SdpcmHeader::SIZE + BcdHeader::SIZE..][..packet.len()].copy_from_slice(packet); + buf8[0..SdpcmHeader::SIZE].copy_from_slice(&sdpcm_header.to_bytes()); + buf8[SdpcmHeader::SIZE..][..BcdHeader::SIZE].copy_from_slice(&bcd_header.to_bytes()); + buf8[SdpcmHeader::SIZE + BcdHeader::SIZE..][..packet.len()].copy_from_slice(packet); let total_len = (total_len + 3) & !3; // round up to 4byte - trace!(" {:02x}", &buf[..total_len.min(48)]); + trace!(" {:02x}", &buf8[..total_len.min(48)]); let cmd = cmd_word(true, true, FUNC_WLAN, 0, total_len as _); self.spi .transaction(|bus| { let bus = unsafe { &mut *bus }; async { - bus.write(&cmd.to_le_bytes()).await?; - bus.write(&buf[..total_len]).await?; + bus.write(&[cmd]).await?; + bus.write(&buf[..(total_len + 3 / 4)]).await?; Ok(()) } }) @@ -875,7 +867,8 @@ where } async fn send_ioctl(&mut self, kind: u32, cmd: u32, iface: u32, data: &[u8], id: u16) { - let mut buf = [0; 2048]; + let mut buf = [0; 512]; + let buf8 = slice8_mut(&mut buf); let total_len = SdpcmHeader::SIZE + CdcHeader::SIZE + data.len(); @@ -904,13 +897,13 @@ where trace!("tx {:?}", sdpcm_header); trace!(" {:?}", cdc_header); - buf[0..SdpcmHeader::SIZE].copy_from_slice(&sdpcm_header.to_bytes()); - buf[SdpcmHeader::SIZE..][..CdcHeader::SIZE].copy_from_slice(&cdc_header.to_bytes()); - buf[SdpcmHeader::SIZE + CdcHeader::SIZE..][..data.len()].copy_from_slice(data); + buf8[0..SdpcmHeader::SIZE].copy_from_slice(&sdpcm_header.to_bytes()); + buf8[SdpcmHeader::SIZE..][..CdcHeader::SIZE].copy_from_slice(&cdc_header.to_bytes()); + buf8[SdpcmHeader::SIZE + CdcHeader::SIZE..][..data.len()].copy_from_slice(data); let total_len = (total_len + 3) & !3; // round up to 4byte - trace!(" {:02x}", &buf[..total_len.min(48)]); + trace!(" {:02x}", &buf8[..total_len.min(48)]); let cmd = cmd_word(true, true, FUNC_WLAN, 0, total_len as _); @@ -918,8 +911,8 @@ where .transaction(|bus| { let bus = unsafe { &mut *bus }; async { - bus.write(&cmd.to_le_bytes()).await?; - bus.write(&buf[..total_len]).await?; + bus.write(&[cmd]).await?; + bus.write(&buf[..(total_len + 3) / 4]).await?; Ok(()) } }) @@ -984,7 +977,7 @@ where true } - async fn bp_read(&mut self, mut addr: u32, mut data: &mut [u8]) { + async fn bp_read(&mut self, mut addr: u32, mut data: &mut [u32]) { // It seems the HW force-aligns the addr // to 2 if data.len() >= 2 // to 4 if data.len() >= 4 @@ -1006,19 +999,14 @@ where .transaction(|bus| { let bus = unsafe { &mut *bus }; async { - bus.write(&cmd.to_le_bytes()).await?; + bus.write(&[cmd]).await?; // 4-byte response delay. - let mut junk = [0; 4]; + let mut junk = [0; 1]; bus.read(&mut junk).await?; // Read data - bus.read(&mut data[..len]).await?; - - // pad to 32bit - if len % 4 != 0 { - bus.read(&mut junk[..(4 - len % 4)]).await?; - } + bus.read(&mut data[..len / 4]).await?; Ok(()) } }) @@ -1027,7 +1015,7 @@ where // Advance ptr. addr += len as u32; - data = &mut data[len..]; + data = &mut data[len / 4..]; } } @@ -1038,12 +1026,15 @@ where // To simplify, enforce 4-align for now. assert!(addr % 4 == 0); + let mut buf = [0u32; BACKPLANE_MAX_TRANSFER_SIZE / 4]; + while !data.is_empty() { // Ensure transfer doesn't cross a window boundary. let window_offs = addr & BACKPLANE_ADDRESS_MASK; let window_remaining = BACKPLANE_WINDOW_SIZE - window_offs as usize; let len = data.len().min(BACKPLANE_MAX_TRANSFER_SIZE).min(window_remaining); + slice8_mut(&mut buf)[..len].copy_from_slice(&data[..len]); self.backplane_set_window(addr).await; @@ -1053,13 +1044,8 @@ where .transaction(|bus| { let bus = unsafe { &mut *bus }; async { - bus.write(&cmd.to_le_bytes()).await?; - bus.write(&data[..len]).await?; - // pad to 32bit - if len % 4 != 0 { - let zeros = [0; 4]; - bus.write(&zeros[..(4 - len % 4)]).await?; - } + bus.write(&[cmd]).await?; + bus.write(&buf[..(len + 3) / 4]).await?; Ok(()) } }) @@ -1172,13 +1158,13 @@ where async fn readn(&mut self, func: u32, addr: u32, len: u32) -> u32 { let cmd = cmd_word(false, true, func, addr, len); - let mut buf = [0; 4]; + let mut buf = [0; 1]; self.spi .transaction(|bus| { let bus = unsafe { &mut *bus }; async { - bus.write(&cmd.to_le_bytes()).await?; + bus.write(&[cmd]).await?; if func == FUNC_BACKPLANE { // 4-byte response delay. bus.read(&mut buf).await?; @@ -1190,7 +1176,7 @@ where .await .unwrap(); - u32::from_le_bytes(buf) + buf[0] } async fn writen(&mut self, func: u32, addr: u32, val: u32, len: u32) { @@ -1200,8 +1186,7 @@ where .transaction(|bus| { let bus = unsafe { &mut *bus }; async { - bus.write(&cmd.to_le_bytes()).await?; - bus.write(&val.to_le_bytes()).await?; + bus.write(&[cmd, val]).await?; Ok(()) } }) @@ -1211,13 +1196,13 @@ where async fn read32_swapped(&mut self, addr: u32) -> u32 { let cmd = cmd_word(false, true, FUNC_BUS, addr, 4); - let mut buf = [0; 4]; + let mut buf = [0; 1]; self.spi .transaction(|bus| { let bus = unsafe { &mut *bus }; async { - bus.write(&swap16(cmd).to_le_bytes()).await?; + bus.write(&[swap16(cmd)]).await?; bus.read(&mut buf).await?; Ok(()) } @@ -1225,7 +1210,7 @@ where .await .unwrap(); - swap16(u32::from_le_bytes(buf)) + swap16(buf[0]) } async fn write32_swapped(&mut self, addr: u32, val: u32) { @@ -1235,8 +1220,7 @@ where .transaction(|bus| { let bus = unsafe { &mut *bus }; async { - bus.write(&swap16(cmd).to_le_bytes()).await?; - bus.write(&swap16(val).to_le_bytes()).await?; + bus.write(&[swap16(cmd), swap16(val)]).await?; Ok(()) } }) From 4205eef3ec46840fff77eb45cdadcbd51938b798 Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Sat, 16 Jul 2022 19:25:35 +0200 Subject: [PATCH 014/130] Fix iovar_get, unhardcode MAC addr. --- src/lib.rs | 18 ++++++++---------- 1 file changed, 8 insertions(+), 10 deletions(-) diff --git a/src/lib.rs b/src/lib.rs index 8c235b17..e42bae68 100644 --- a/src/lib.rs +++ b/src/lib.rs @@ -11,6 +11,7 @@ mod events; mod structs; use core::cell::Cell; +use core::cmp::{max, min}; use core::slice; use core::sync::atomic::Ordering; use core::task::Waker; @@ -272,17 +273,12 @@ impl<'a> Control<'a> { self.set_iovar_u32("bus:txglom", 0).await; self.set_iovar_u32("apsta", 1).await; - //self.set_iovar("cur_etheraddr", &[02, 03, 04, 05, 06, 07]).await; // read MAC addr. let mut mac_addr = [0; 6]; assert_eq!(self.get_iovar("cur_etheraddr", &mut mac_addr).await, 6); info!("mac addr: {:02x}", mac_addr); - // TODO get_iovar is broken, it returns all zeros. - // Harcdode our own MAC for now. - let mac_addr = [0x28, 0xCD, 0xC1, 0x00, 0x3F, 0x05]; - let country = countries::WORLD_WIDE_XX; let country_info = CountryInfo { country_abbrev: [country.code[0], country.code[1], 0, 0], @@ -439,10 +435,12 @@ impl<'a> Control<'a> { buf[..name.len()].copy_from_slice(name.as_bytes()); buf[name.len()] = 0; - let total_len = name.len() + 1 + res.len(); - let res_len = self.ioctl(0, 262, 0, &mut buf[..total_len]).await - name.len() - 1; - res[..res_len].copy_from_slice(&buf[name.len() + 1..][..res_len]); - res_len + let total_len = max(name.len() + 1, res.len()); + let res_len = self.ioctl(0, 262, 0, &mut buf[..total_len]).await; + + let out_len = min(res.len(), res_len); + res[..out_len].copy_from_slice(&buf[..out_len]); + out_len } async fn ioctl_set_u32(&mut self, cmd: u32, iface: u32, val: u32) { @@ -712,7 +710,7 @@ where .await .unwrap(); - trace!("rx {:02x}", &buf[..(len as usize).min(48)]); + trace!("rx {:02x}", &slice8_mut(&mut buf)[..(len as usize).min(48)]); self.rx(&slice8_mut(&mut buf)[..len as usize]); } From 13c88a9ca3e4a192677a184baa7e6ac12646797d Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Sun, 17 Jul 2022 00:33:30 +0200 Subject: [PATCH 015/130] Obtain the firmware blobs from the user instead of hardcoding magic flash addrs. --- .gitignore | 2 - examples/rpi-pico-w/src/main.rs | 15 +++++- firmware/43439A0.bin | Bin 0 -> 224190 bytes firmware/43439A0_clm.bin | Bin 0 -> 4752 bytes .../LICENSE-permissive-binary-license-1.0.txt | 49 ++++++++++++++++++ firmware/README.md | 5 ++ src/lib.rs | 26 ++++------ 7 files changed, 77 insertions(+), 20 deletions(-) create mode 100755 firmware/43439A0.bin create mode 100755 firmware/43439A0_clm.bin create mode 100644 firmware/LICENSE-permissive-binary-license-1.0.txt create mode 100644 firmware/README.md diff --git a/.gitignore b/.gitignore index ee8e6b4c..1e7caa9e 100644 --- a/.gitignore +++ b/.gitignore @@ -1,4 +1,2 @@ Cargo.lock target/ -*.bin -notes.txt diff --git a/examples/rpi-pico-w/src/main.rs b/examples/rpi-pico-w/src/main.rs index 475c6906..633c1b2b 100644 --- a/examples/rpi-pico-w/src/main.rs +++ b/examples/rpi-pico-w/src/main.rs @@ -43,6 +43,17 @@ async fn net_task(stack: &'static Stack>) -> ! { async fn main(spawner: Spawner, p: Peripherals) { info!("Hello World!"); + // Include the WiFi firmware and CLM. + let fw = include_bytes!("../../../firmware/43439A0.bin"); + let clm = include_bytes!("../../../firmware/43439A0_clm.bin"); + + // To make flashing faster for development, you may want to flash the firmwares independently + // at hardcoded addresses, instead of baking them into the program with `include_bytes!`: + // probe-rs-cli download 43439A0.bin --format bin --chip RP2040 --base-address 0x10100000 + // probe-rs-cli download 43439A0.clm_blob --format bin --chip RP2040 --base-address 0x10140000 + //let fw = unsafe { core::slice::from_raw_parts(0x10100000 as *const u8, 224190) }; + //let clm = unsafe { core::slice::from_raw_parts(0x10140000 as *const u8, 4752) }; + let pwr = Output::new(p.PIN_23, Level::Low); let cs = Output::new(p.PIN_25, Level::High); let clk = Output::new(p.PIN_29, Level::Low); @@ -54,11 +65,11 @@ async fn main(spawner: Spawner, p: Peripherals) { let spi = ExclusiveDevice::new(bus, cs); let state = forever!(cyw43::State::new()); - let (mut control, runner) = cyw43::new(state, pwr, spi).await; + let (mut control, runner) = cyw43::new(state, pwr, spi, fw).await; spawner.spawn(wifi_task(runner)).unwrap(); - let net_device = control.init().await; + let net_device = control.init(clm).await; //control.join_open("MikroTik-951589").await; control.join_wpa2("DirbaioWifi", "HelloWorld").await; diff --git a/firmware/43439A0.bin b/firmware/43439A0.bin new file mode 100755 index 0000000000000000000000000000000000000000..b46b3beff05de7dfcbf41d53a12bf3a74381881b GIT binary patch literal 224190 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+Redistribution. Redistribution and use in binary form, without +modification, are permitted provided that the following conditions are +met: + +1) Redistributions must reproduce the above copyright notice and the + following disclaimer in the documentation and/or other materials + provided with the distribution. + +2) Unless to the extent explicitly permitted by law, no reverse + engineering, decompilation, or disassembly of this software is + permitted. + +3) Redistribution as part of a software development kit must include the + accompanying file named �DEPENDENCIES� and any dependencies listed in + that file. + +4) Neither the name of the copyright holder nor the names of its + contributors may be used to endorse or promote products derived from + this software without specific prior written permission. + +Limited patent license. The copyright holders (and contributors) grant a +worldwide, non-exclusive, no-charge, royalty-free patent license to +make, have made, use, offer to sell, sell, import, and otherwise +transfer this software, where such license applies only to those patent +claims licensable by the copyright holders (and contributors) that are +necessarily infringed by this software. This patent license shall not +apply to any combinations that include this software. No hardware is +licensed hereunder. + +If you institute patent litigation against any entity (including a +cross-claim or counterclaim in a lawsuit) alleging that the software +itself infringes your patent(s), then your rights granted under this +license shall terminate as of the date such litigation is filed. + +DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND +CONTRIBUTORS "AS IS." ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT +NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT +HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED +TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR +PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF +LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING +NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. \ No newline at end of file diff --git a/firmware/README.md b/firmware/README.md new file mode 100644 index 00000000..7381fdc5 --- /dev/null +++ b/firmware/README.md @@ -0,0 +1,5 @@ +# WiFi firmware + +Firmware obtained from https://github.com/Infineon/wifi-host-driver/tree/master/WiFi_Host_Driver/resources/firmware/COMPONENT_43439 + +Licensed under the [Infineon Permissive Binary License](./LICENSE-permissive-binary-license-1.0.txt) \ No newline at end of file diff --git a/src/lib.rs b/src/lib.rs index e42bae68..0e4a862c 100644 --- a/src/lib.rs +++ b/src/lib.rs @@ -235,11 +235,9 @@ pub struct Control<'a> { } impl<'a> Control<'a> { - pub async fn init(&mut self) -> NetDevice<'a> { + pub async fn init(&mut self, clm: &[u8]) -> NetDevice<'a> { const CHUNK_SIZE: usize = 1024; - let clm = unsafe { slice::from_raw_parts(0x10140000 as *const u8, 4752) }; - info!("Downloading CLM..."); let mut offs = 0; @@ -528,7 +526,12 @@ pub struct Runner<'a, PWR, SPI> { backplane_window: u32, } -pub async fn new<'a, PWR, SPI>(state: &'a State, pwr: PWR, spi: SPI) -> (Control<'a>, Runner<'a, PWR, SPI>) +pub async fn new<'a, PWR, SPI>( + state: &'a State, + pwr: PWR, + spi: SPI, + firmware: &[u8], +) -> (Control<'a>, Runner<'a, PWR, SPI>) where PWR: OutputPin, SPI: SpiDevice, @@ -543,7 +546,7 @@ where backplane_window: 0xAAAA_AAAA, }; - runner.init().await; + runner.init(firmware).await; (Control { state }, runner) } @@ -554,7 +557,7 @@ where SPI: SpiDevice, SPI::Bus: SpiBusRead + SpiBusWrite, { - async fn init(&mut self) { + async fn init(&mut self, firmware: &[u8]) { // Reset self.pwr.set_low().unwrap(); Timer::after(Duration::from_millis(20)).await; @@ -598,17 +601,8 @@ where let ram_addr = CHIP.atcm_ram_base_address; - // I'm flashing the firmwares independently at hardcoded addresses, instead of baking them - // into the program with `include_bytes!` or similar, so that flashing the program stays fast. - // - // Flash them like this, also don't forget to update the lengths below if you change them!. - // - // probe-rs-cli download 43439A0.bin --format bin --chip RP2040 --base-address 0x10100000 - // probe-rs-cli download 43439A0.clm_blob --format bin --chip RP2040 --base-address 0x10140000 - let fw = unsafe { slice::from_raw_parts(0x10100000 as *const u8, 224190) }; - info!("loading fw"); - self.bp_write(ram_addr, fw).await; + self.bp_write(ram_addr, firmware).await; info!("loading nvram"); // Round up to 4 bytes. From 54269a07614105b30e8ea52d424ff417fd9e6e87 Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Sun, 17 Jul 2022 00:34:27 +0200 Subject: [PATCH 016/130] Switch default log to debug. Trace is very VRYY verbose. --- examples/rpi-pico-w/.cargo/config.toml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/examples/rpi-pico-w/.cargo/config.toml b/examples/rpi-pico-w/.cargo/config.toml index 18bd4dfe..6183e70f 100644 --- a/examples/rpi-pico-w/.cargo/config.toml +++ b/examples/rpi-pico-w/.cargo/config.toml @@ -5,4 +5,4 @@ runner = "probe-run --chip RP2040" target = "thumbv6m-none-eabi" [env] -DEFMT_LOG = "trace" +DEFMT_LOG = "debug" From 726d68a706507d3c0a1b7c5a9c76231ccf1dcbcf Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Sun, 17 Jul 2022 00:34:41 +0200 Subject: [PATCH 017/130] Add status and instructions in README. --- README.md | 45 ++++++++++++++++++++++++++++++++++++++++++++- 1 file changed, 44 insertions(+), 1 deletion(-) diff --git a/README.md b/README.md index 7df988b7..8ee0c235 100644 --- a/README.md +++ b/README.md @@ -1,6 +1,49 @@ # cyw43 -Very WIP driver for the CYW43439 wifi chip, used in the Raspberry Pi Pico W. +WIP driver for the CYW43439 wifi chip, used in the Raspberry Pi Pico W. Implementation based on [Infineon/wifi-host-driver](https://github.com/Infineon/wifi-host-driver). + +## Current status + +Working: + +- Station mode (joining an AP). +- Sending and receiving Ethernet frames. +- Using the default MAC address. +- [`embassy-net`](https://embassy.dev) integration. + +TODO: + +- AP mode (creating an AP) +- GPIO support (used for the Pico W LED) +- Scanning +- Setting a custom MAC address. +- RP2040 PIO driver for the nonstandard half-duplex SPI used in the Pico W. Probably porting [this](https://github.com/raspberrypi/pico-sdk/tree/master/src/rp2_common/cyw43_driver). (Currently bitbanging is used). +- Using the IRQ pin instead of polling the bus. +- Bus sleep (unclear what the benefit is. Is it needed for IRQs? or is it just power consumption optimization?) + +## Running the example + +- `cargo install probe-run` +- `cd examples/rpi-pico-w` +- Edit `src/main.rs` with your Wifi network's name and password. +- `cargo run --release` + +After a few seconds, you should see that DHCP picks up an IP address like this + +``` +11.944489 DEBUG Acquired IP configuration: +11.944517 DEBUG IP address: 192.168.0.250/24 +11.944620 DEBUG Default gateway: 192.168.0.33 +11.944722 DEBUG DNS server 0: 192.168.0.33 +``` + +The example implements a TCP echo server on port 1234. You can try connecting to it with: + +``` +nc 192.168.0.250 1234 +``` + +Send it some data, you should see it echoed back and printed in the firmware's logs. ## License From 92505f53e239bf6004dec1140b2d5a15b762bb66 Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Thu, 21 Jul 2022 23:50:40 +0200 Subject: [PATCH 018/130] Get wifi credentials from envvars in example. --- .vscode/settings.json | 4 ++++ README.md | 3 +-- examples/rpi-pico-w/src/main.rs | 4 ++-- 3 files changed, 7 insertions(+), 4 deletions(-) diff --git a/.vscode/settings.json b/.vscode/settings.json index 748816bb..082b286d 100644 --- a/.vscode/settings.json +++ b/.vscode/settings.json @@ -12,4 +12,8 @@ "rust-analyzer.linkedProjects": [ "examples/rpi-pico-w/Cargo.toml", ], + "rust-analyzer.server.extraEnv": { + "WIFI_NETWORK": "foo", + "WIFI_PASSWORD": "foo", + } } \ No newline at end of file diff --git a/README.md b/README.md index 8ee0c235..5d4347e9 100644 --- a/README.md +++ b/README.md @@ -25,8 +25,7 @@ TODO: - `cargo install probe-run` - `cd examples/rpi-pico-w` -- Edit `src/main.rs` with your Wifi network's name and password. -- `cargo run --release` +- `WIFI_NETWORK=MyWifiNetwork WIFI_PASSWORD=MyWifiPassword cargo run --release` After a few seconds, you should see that DHCP picks up an IP address like this diff --git a/examples/rpi-pico-w/src/main.rs b/examples/rpi-pico-w/src/main.rs index 633c1b2b..3e966d21 100644 --- a/examples/rpi-pico-w/src/main.rs +++ b/examples/rpi-pico-w/src/main.rs @@ -71,8 +71,8 @@ async fn main(spawner: Spawner, p: Peripherals) { let net_device = control.init(clm).await; - //control.join_open("MikroTik-951589").await; - control.join_wpa2("DirbaioWifi", "HelloWorld").await; + //control.join_open(env!("WIFI_NETWORK")).await; + control.join_wpa2(env!("WIFI_NETWORK"), env!("WIFI_PASSWORD")).await; let config = embassy_net::ConfigStrategy::Dhcp; //let config = embassy_net::ConfigStrategy::Static(embassy_net::Config { From 5ef40acd1d9bf3b9c94787f3901ef32bd0d3a248 Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Fri, 22 Jul 2022 00:05:39 +0200 Subject: [PATCH 019/130] Fix set iovar buffer length. --- src/lib.rs | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/lib.rs b/src/lib.rs index 0e4a862c..b06eb36e 100644 --- a/src/lib.rs +++ b/src/lib.rs @@ -422,7 +422,7 @@ impl<'a> Control<'a> { buf[name.len() + 1..][..val.len()].copy_from_slice(val); let total_len = name.len() + 1 + val.len(); - self.ioctl(2, 263, 0, &mut buf).await; + self.ioctl(2, 263, 0, &mut buf[..total_len]).await; } // TODO this is not really working, it always returns all zeros. @@ -904,7 +904,7 @@ where let bus = unsafe { &mut *bus }; async { bus.write(&[cmd]).await?; - bus.write(&buf[..(total_len + 3) / 4]).await?; + bus.write(&buf[..total_len / 4]).await?; Ok(()) } }) From ddfbfa0132285963382a4d7290d506186da31369 Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Thu, 28 Jul 2022 18:43:17 +0200 Subject: [PATCH 020/130] move ioctl_id from State to Runner. --- src/lib.rs | 30 ++++++++++++++---------------- 1 file changed, 14 insertions(+), 16 deletions(-) diff --git a/src/lib.rs b/src/lib.rs index b06eb36e..133ce316 100644 --- a/src/lib.rs +++ b/src/lib.rs @@ -209,7 +209,6 @@ enum IoctlState { } pub struct State { - ioctl_id: Cell, ioctl_state: Cell, tx_channel: Channel, @@ -220,7 +219,6 @@ pub struct State { impl State { pub fn new() -> Self { Self { - ioctl_id: Cell::new(0), ioctl_state: Cell::new(IoctlState::Idle), tx_channel: Channel::new(), @@ -453,8 +451,6 @@ impl<'a> Control<'a> { yield_now().await; } - self.state.ioctl_id.set(self.state.ioctl_id.get().wrapping_add(1)); - self.state .ioctl_state .set(IoctlState::Pending { kind, cmd, iface, buf }); @@ -522,7 +518,8 @@ pub struct Runner<'a, PWR, SPI> { pwr: PWR, spi: SPI, - ioctl_seq: u8, + ioctl_id: u16, + sdpcm_seq: u8, backplane_window: u32, } @@ -542,7 +539,8 @@ where pwr, spi, - ioctl_seq: 0, + ioctl_id: 0, + sdpcm_seq: 0, backplane_window: 0xAAAA_AAAA, }; @@ -669,8 +667,7 @@ where // Send stuff // TODO flow control if let IoctlState::Pending { kind, cmd, iface, buf } = self.state.ioctl_state.get() { - self.send_ioctl(kind, cmd, iface, unsafe { &*buf }, self.state.ioctl_id.get()) - .await; + self.send_ioctl(kind, cmd, iface, unsafe { &*buf }).await; self.state.ioctl_state.set(IoctlState::Sent { buf }); } @@ -723,8 +720,8 @@ where let total_len = SdpcmHeader::SIZE + BcdHeader::SIZE + packet.len(); - let seq = self.ioctl_seq; - self.ioctl_seq = self.ioctl_seq.wrapping_add(1); + let seq = self.sdpcm_seq; + self.sdpcm_seq = self.sdpcm_seq.wrapping_add(1); let sdpcm_header = SdpcmHeader { len: total_len as u16, // TODO does this len need to be rounded up to u32? @@ -802,7 +799,7 @@ where trace!(" {:?}", cdc_header); if let IoctlState::Sent { buf } = self.state.ioctl_state.get() { - if cdc_header.id == self.state.ioctl_id.get() { + if cdc_header.id == self.ioctl_id { assert_eq!(cdc_header.status, 0); // todo propagate error instead let resp_len = cdc_header.len as usize; @@ -858,19 +855,20 @@ where } } - async fn send_ioctl(&mut self, kind: u32, cmd: u32, iface: u32, data: &[u8], id: u16) { + async fn send_ioctl(&mut self, kind: u32, cmd: u32, iface: u32, data: &[u8]) { let mut buf = [0; 512]; let buf8 = slice8_mut(&mut buf); let total_len = SdpcmHeader::SIZE + CdcHeader::SIZE + data.len(); - let seq = self.ioctl_seq; - self.ioctl_seq = self.ioctl_seq.wrapping_add(1); + let sdpcm_seq = self.sdpcm_seq; + self.sdpcm_seq = self.sdpcm_seq.wrapping_add(1); + self.ioctl_id = self.ioctl_id.wrapping_add(1); let sdpcm_header = SdpcmHeader { len: total_len as u16, // TODO does this len need to be rounded up to u32? len_inv: !total_len as u16, - sequence: seq, + sequence: sdpcm_seq, channel_and_flags: 0, // control channel next_length: 0, header_length: SdpcmHeader::SIZE as _, @@ -883,7 +881,7 @@ where cmd: cmd, len: data.len() as _, flags: kind as u16 | (iface as u16) << 12, - id, + id: self.ioctl_id, status: 0, }; trace!("tx {:?}", sdpcm_header); From 3388b5cecf95d6b0bc9cf5c952e9f0aa1e019b8a Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Mattias=20Gr=C3=B6nlund?= Date: Tue, 9 Aug 2022 00:53:32 +0200 Subject: [PATCH 021/130] Improve data checks for VHD events For some reason I got strange events on channel 1 (ASYNCEVENT_HEADER): 0.647329 WARN unexpected ehternet type 0x0508, expected Qualcom ether type 0x886c This patch improves the validation of BCD WHD events to minimize the risk for panic. --- src/events.rs | 1 + src/lib.rs | 53 +++++++++++++++++++++++++++++++++++++++-------- src/structs.rs | 56 ++++++++++++++++++++++++++++++++++++++++++++++++-- 3 files changed, 99 insertions(+), 11 deletions(-) diff --git a/src/events.rs b/src/events.rs index b35b12fa..a828eec9 100644 --- a/src/events.rs +++ b/src/events.rs @@ -1,4 +1,5 @@ #![allow(unused)] +#![allow(non_camel_case_types)] use core::num; diff --git a/src/lib.rs b/src/lib.rs index 133ce316..3d08370c 100644 --- a/src/lib.rs +++ b/src/lib.rs @@ -815,20 +815,55 @@ where trace!(" {:?}", bcd_header); let packet_start = BcdHeader::SIZE + 4 * bcd_header.data_offset as usize; - if packet_start > payload.len() { - warn!("packet start out of range."); + + if packet_start + EventPacket::SIZE > payload.len() { + warn!("BCD event, incomplete header"); return; } - let packet = &payload[packet_start..]; - trace!(" {:02x}", &packet[..(packet.len() as usize).min(36)]); + let bcd_packet = &payload[packet_start..]; + trace!(" {:02x}", &bcd_packet[..(bcd_packet.len() as usize).min(36)]); - let mut evt = EventHeader::from_bytes(&packet[24..][..EventHeader::SIZE].try_into().unwrap()); - evt.byteswap(); - let evt_data = &packet[24 + EventHeader::SIZE..][..evt.datalen as usize]; + let mut event_packet = EventPacket::from_bytes(&bcd_packet[..EventPacket::SIZE].try_into().unwrap()); + event_packet.byteswap(); + + const ETH_P_LINK_CTL: u16 = 0x886c; // HPNA, wlan link local tunnel, according to linux if_ether.h + if event_packet.eth.ether_type != ETH_P_LINK_CTL { + warn!( + "unexpected ethernet type 0x{:04x}, expected Broadcom ether type 0x{:04x}", + event_packet.eth.ether_type, ETH_P_LINK_CTL + ); + return; + } + const BROADCOM_OUI: &[u8] = &[0x00, 0x10, 0x18]; + if event_packet.hdr.oui != BROADCOM_OUI { + warn!( + "unexpected ethernet OUI {:02x}, expected Broadcom OUI {:02x}", + event_packet.hdr.oui, BROADCOM_OUI + ); + return; + } + const BCMILCP_SUBTYPE_VENDOR_LONG: u16 = 32769; + if event_packet.hdr.subtype != BCMILCP_SUBTYPE_VENDOR_LONG { + warn!("unexpected subtype {}", event_packet.hdr.subtype); + return; + } + + const BCMILCP_BCM_SUBTYPE_EVENT: u16 = 1; + if event_packet.hdr.user_subtype != BCMILCP_BCM_SUBTYPE_EVENT { + warn!("unexpected user_subtype {}", event_packet.hdr.subtype); + return; + } + + if event_packet.msg.datalen as usize >= (bcd_packet.len() - EventMessage::SIZE) { + warn!("BCD event, incomplete data"); + return; + } + + let evt_data = &bcd_packet[EventMessage::SIZE..][..event_packet.msg.datalen as usize]; debug!( "=== EVENT {}: {} {:02x}", - events::Event::from(evt.event_type as u8), - evt, + events::Event::from(event_packet.msg.event_type as u8), + event_packet.msg, evt_data ); } diff --git a/src/structs.rs b/src/structs.rs index 060c2b06..7a7c25b2 100644 --- a/src/structs.rs +++ b/src/structs.rs @@ -64,10 +64,44 @@ pub struct BcdHeader { } impl_bytes!(BcdHeader); +#[derive(Clone, Copy)] +#[cfg_attr(feature = "defmt", derive(defmt::Format))] +#[repr(C)] +pub struct EthernetHeader { + pub destination_mac: [u8; 6], + pub source_mac: [u8; 6], + pub ether_type: u16, +} + +impl EthernetHeader { + pub fn byteswap(&mut self) { + self.ether_type = self.ether_type.to_be(); + } +} + #[derive(Clone, Copy)] #[cfg_attr(feature = "defmt", derive(defmt::Format))] #[repr(C)] pub struct EventHeader { + pub subtype: u16, + pub length: u16, + pub version: u8, + pub oui: [u8; 3], + pub user_subtype: u16, +} + +impl EventHeader { + pub fn byteswap(&mut self) { + self.subtype = self.subtype.to_be(); + self.length = self.length.to_be(); + self.user_subtype = self.user_subtype.to_be(); + } +} + +#[derive(Clone, Copy)] +#[cfg_attr(feature = "defmt", derive(defmt::Format))] +#[repr(C)] +pub struct EventMessage { /// version pub version: u16, /// see flags below @@ -91,9 +125,9 @@ pub struct EventHeader { /// source bsscfg index pub bsscfgidx: u8, } -impl_bytes!(EventHeader); +impl_bytes!(EventMessage); -impl EventHeader { +impl EventMessage { pub fn byteswap(&mut self) { self.version = self.version.to_be(); self.flags = self.flags.to_be(); @@ -105,6 +139,24 @@ impl EventHeader { } } +#[derive(Clone, Copy)] +#[cfg_attr(feature = "defmt", derive(defmt::Format))] +#[repr(C)] +pub struct EventPacket { + pub eth: EthernetHeader, + pub hdr: EventHeader, + pub msg: EventMessage, +} +impl_bytes!(EventPacket); + +impl EventPacket { + pub fn byteswap(&mut self) { + self.eth.byteswap(); + self.hdr.byteswap(); + self.msg.byteswap(); + } +} + #[derive(Clone, Copy)] #[repr(C)] pub struct DownloadHeader { From f76815d642064b5ed5b1673e4a386e2747813f20 Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Sat, 13 Aug 2022 15:37:30 +0200 Subject: [PATCH 022/130] Update Embassy. --- Cargo.toml | 6 ++++-- examples/rpi-pico-w/Cargo.toml | 13 ++++++++----- examples/rpi-pico-w/src/main.rs | 17 ++++++++--------- src/lib.rs | 8 ++++---- 4 files changed, 24 insertions(+), 20 deletions(-) diff --git a/Cargo.toml b/Cargo.toml index d35e865b..cea7d780 100644 --- a/Cargo.toml +++ b/Cargo.toml @@ -4,10 +4,12 @@ version = "0.1.0" edition = "2021" [features] -defmt = ["dep:defmt", "embassy/defmt"] +defmt = ["dep:defmt"] log = ["dep:log"] + [dependencies] -embassy = { version = "0.1.0" } +embassy-executor = { version = "0.1.0", features = [ "time" ] } +embassy-util = { version = "0.1.0" } embassy-net = { version = "0.1.0" } atomic-polyfill = "0.1.5" diff --git a/examples/rpi-pico-w/Cargo.toml b/examples/rpi-pico-w/Cargo.toml index 9e1d7547..af558d8c 100644 --- a/examples/rpi-pico-w/Cargo.toml +++ b/examples/rpi-pico-w/Cargo.toml @@ -6,7 +6,8 @@ edition = "2021" [dependencies] cyw43 = { path = "../../", features = ["defmt"]} -embassy = { version = "0.1.0", features = ["defmt", "defmt-timestamp-uptime"] } +embassy-executor = { version = "0.1.0", features = ["defmt", "defmt-timestamp-uptime"] } +embassy-util = { version = "0.1.0" } embassy-rp = { version = "0.1.0", features = ["defmt", "unstable-traits", "nightly", "unstable-pac"] } embassy-net = { version = "0.1.0", features = ["defmt", "tcp", "dhcpv4", "medium-ethernet", "pool-16"] } atomic-polyfill = "0.1.5" @@ -26,10 +27,12 @@ heapless = "0.7.15" [patch.crates-io] -embassy = { git = "https://github.com/embassy-rs/embassy", rev = "5f43c1d37e9db847c7861fe0bd821db62edba9f6" } -embassy-rp = { git = "https://github.com/embassy-rs/embassy", rev = "5f43c1d37e9db847c7861fe0bd821db62edba9f6" } -embassy-net = { git = "https://github.com/embassy-rs/embassy", rev = "5f43c1d37e9db847c7861fe0bd821db62edba9f6" } -#embassy = { path = "/home/dirbaio/embassy/embassy/embassy" } +embassy-executor = { git = "https://github.com/embassy-rs/embassy", rev = "6ffca81a38d2c7f57da667ff49b4296c4eba78e2" } +embassy-util = { git = "https://github.com/embassy-rs/embassy", rev = "6ffca81a38d2c7f57da667ff49b4296c4eba78e2" } +embassy-rp = { git = "https://github.com/embassy-rs/embassy", rev = "6ffca81a38d2c7f57da667ff49b4296c4eba78e2" } +embassy-net = { git = "https://github.com/embassy-rs/embassy", rev = "6ffca81a38d2c7f57da667ff49b4296c4eba78e2" } +#embassy-executor = { path = "/home/dirbaio/embassy/embassy/embassy-executor" } +#embassy-util = { path = "/home/dirbaio/embassy/embassy/embassy-util" } #embassy-rp = { path = "/home/dirbaio/embassy/embassy/embassy-rp" } #embassy-net = { path = "/home/dirbaio/embassy/embassy/embassy-net" } #smoltcp = { path = "./smoltcp" } diff --git a/examples/rpi-pico-w/src/main.rs b/examples/rpi-pico-w/src/main.rs index 3e966d21..91f08726 100644 --- a/examples/rpi-pico-w/src/main.rs +++ b/examples/rpi-pico-w/src/main.rs @@ -5,15 +5,14 @@ use core::convert::Infallible; use core::future::Future; -use defmt::{assert, assert_eq, panic, *}; -use embassy::executor::Spawner; -use embassy::time::{Duration, Timer}; -use embassy::util::Forever; +use defmt::*; +use embassy_executor::executor::Spawner; use embassy_net::tcp::TcpSocket; -use embassy_net::{Ipv4Address, Ipv4Cidr, Stack, StackResources}; -use embassy_rp::gpio::{Flex, Level, Output, Pin}; +use embassy_net::{Stack, StackResources}; +use embassy_rp::gpio::{Flex, Level, Output}; use embassy_rp::peripherals::{PIN_23, PIN_24, PIN_25, PIN_29}; use embassy_rp::Peripherals; +use embassy_util::Forever; use embedded_hal_1::spi::ErrorType; use embedded_hal_async::spi::{ExclusiveDevice, SpiBusFlush, SpiBusRead, SpiBusWrite}; use embedded_io::asynch::{Read, Write}; @@ -27,19 +26,19 @@ macro_rules! forever { }}; } -#[embassy::task] +#[embassy_executor::task] async fn wifi_task( runner: cyw43::Runner<'static, Output<'static, PIN_23>, ExclusiveDevice>>, ) -> ! { runner.run().await } -#[embassy::task] +#[embassy_executor::task] async fn net_task(stack: &'static Stack>) -> ! { stack.run().await } -#[embassy::main] +#[embassy_executor::main] async fn main(spawner: Spawner, p: Peripherals) { info!("Hello World!"); diff --git a/src/lib.rs b/src/lib.rs index 3d08370c..3932ce41 100644 --- a/src/lib.rs +++ b/src/lib.rs @@ -17,11 +17,11 @@ use core::sync::atomic::Ordering; use core::task::Waker; use atomic_polyfill::AtomicBool; -use embassy::blocking_mutex::raw::NoopRawMutex; -use embassy::channel::mpmc::Channel; -use embassy::time::{block_for, Duration, Timer}; -use embassy::util::yield_now; +use embassy_executor::time::{block_for, Duration, Timer}; use embassy_net::{PacketBoxExt, PacketBuf}; +use embassy_util::blocking_mutex::raw::NoopRawMutex; +use embassy_util::channel::mpmc::Channel; +use embassy_util::yield_now; use embedded_hal_1::digital::blocking::OutputPin; use embedded_hal_async::spi::{SpiBusRead, SpiBusWrite, SpiDevice}; From 6b4555a6a70f8c10755198b69e7cf085c1a53fce Mon Sep 17 00:00:00 2001 From: Daniel Bevenius Date: Sat, 20 Aug 2022 10:49:27 +0200 Subject: [PATCH 023/130] Add comments about Country Locale Matrix (CLM) This commit add comments about what CLM stands for. The motivation of this is that I think it helps understanding the code for users who are new to the codebase (like me). --- examples/rpi-pico-w/src/main.rs | 2 +- src/structs.rs | 1 + 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/examples/rpi-pico-w/src/main.rs b/examples/rpi-pico-w/src/main.rs index 91f08726..569c9bf4 100644 --- a/examples/rpi-pico-w/src/main.rs +++ b/examples/rpi-pico-w/src/main.rs @@ -42,7 +42,7 @@ async fn net_task(stack: &'static Stack>) -> ! { async fn main(spawner: Spawner, p: Peripherals) { info!("Hello World!"); - // Include the WiFi firmware and CLM. + // Include the WiFi firmware and Country Locale Matrix (CLM) blobs. let fw = include_bytes!("../../../firmware/43439A0.bin"); let clm = include_bytes!("../../../firmware/43439A0_clm.bin"); diff --git a/src/structs.rs b/src/structs.rs index 7a7c25b2..35547097 100644 --- a/src/structs.rs +++ b/src/structs.rs @@ -172,6 +172,7 @@ pub const DOWNLOAD_FLAG_BEGIN: u16 = 0x0002; pub const DOWNLOAD_FLAG_END: u16 = 0x0004; pub const DOWNLOAD_FLAG_HANDLER_VER: u16 = 0x1000; +// Country Locale Matrix (CLM) pub const DOWNLOAD_TYPE_CLM: u16 = 2; #[derive(Clone, Copy)] From 945449b10fe815dd10875f55482d4777d6d801b7 Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Mon, 22 Aug 2022 17:24:43 +0200 Subject: [PATCH 024/130] Update Embassy. --- Cargo.toml | 2 +- examples/rpi-pico-w/Cargo.toml | 15 +++++++++------ examples/rpi-pico-w/src/main.rs | 21 +++++++++++---------- src/lib.rs | 2 +- 4 files changed, 22 insertions(+), 18 deletions(-) diff --git a/Cargo.toml b/Cargo.toml index cea7d780..c6120dac 100644 --- a/Cargo.toml +++ b/Cargo.toml @@ -8,7 +8,7 @@ defmt = ["dep:defmt"] log = ["dep:log"] [dependencies] -embassy-executor = { version = "0.1.0", features = [ "time" ] } +embassy-time = { version = "0.1.0" } embassy-util = { version = "0.1.0" } embassy-net = { version = "0.1.0" } atomic-polyfill = "0.1.5" diff --git a/examples/rpi-pico-w/Cargo.toml b/examples/rpi-pico-w/Cargo.toml index af558d8c..98a3d105 100644 --- a/examples/rpi-pico-w/Cargo.toml +++ b/examples/rpi-pico-w/Cargo.toml @@ -6,17 +6,19 @@ edition = "2021" [dependencies] cyw43 = { path = "../../", features = ["defmt"]} -embassy-executor = { version = "0.1.0", features = ["defmt", "defmt-timestamp-uptime"] } +embassy-executor = { version = "0.1.0", features = ["defmt", "integrated-timers"] } +embassy-time = { version = "0.1.0", features = ["defmt", "defmt-timestamp-uptime"] } embassy-util = { version = "0.1.0" } embassy-rp = { version = "0.1.0", features = ["defmt", "unstable-traits", "nightly", "unstable-pac"] } embassy-net = { version = "0.1.0", features = ["defmt", "tcp", "dhcpv4", "medium-ethernet", "pool-16"] } atomic-polyfill = "0.1.5" +static_cell = "1.0" defmt = "0.3" defmt-rtt = "0.3" panic-probe = { version = "0.3", features = ["print-defmt"] } -cortex-m = "0.7.3" +cortex-m = { version = "0.7.6", features = ["critical-section-single-core"]} cortex-m-rt = "0.7.0" futures = { version = "0.3.17", default-features = false, features = ["async-await", "cfg-target-has-atomic", "unstable"] } @@ -27,10 +29,11 @@ heapless = "0.7.15" [patch.crates-io] -embassy-executor = { git = "https://github.com/embassy-rs/embassy", rev = "6ffca81a38d2c7f57da667ff49b4296c4eba78e2" } -embassy-util = { git = "https://github.com/embassy-rs/embassy", rev = "6ffca81a38d2c7f57da667ff49b4296c4eba78e2" } -embassy-rp = { git = "https://github.com/embassy-rs/embassy", rev = "6ffca81a38d2c7f57da667ff49b4296c4eba78e2" } -embassy-net = { git = "https://github.com/embassy-rs/embassy", rev = "6ffca81a38d2c7f57da667ff49b4296c4eba78e2" } +embassy-executor = { git = "https://github.com/embassy-rs/embassy", rev = "53fbd0efb3e77e1e3de948afde2b5bf1a5a9735f" } +embassy-time = { git = "https://github.com/embassy-rs/embassy", rev = "53fbd0efb3e77e1e3de948afde2b5bf1a5a9735f" } +embassy-util = { git = "https://github.com/embassy-rs/embassy", rev = "53fbd0efb3e77e1e3de948afde2b5bf1a5a9735f" } +embassy-rp = { git = "https://github.com/embassy-rs/embassy", rev = "53fbd0efb3e77e1e3de948afde2b5bf1a5a9735f" } +embassy-net = { git = "https://github.com/embassy-rs/embassy", rev = "53fbd0efb3e77e1e3de948afde2b5bf1a5a9735f" } #embassy-executor = { path = "/home/dirbaio/embassy/embassy/embassy-executor" } #embassy-util = { path = "/home/dirbaio/embassy/embassy/embassy-util" } #embassy-rp = { path = "/home/dirbaio/embassy/embassy/embassy-rp" } diff --git a/examples/rpi-pico-w/src/main.rs b/examples/rpi-pico-w/src/main.rs index 569c9bf4..986474ce 100644 --- a/examples/rpi-pico-w/src/main.rs +++ b/examples/rpi-pico-w/src/main.rs @@ -6,23 +6,22 @@ use core::convert::Infallible; use core::future::Future; use defmt::*; -use embassy_executor::executor::Spawner; +use embassy_executor::Spawner; use embassy_net::tcp::TcpSocket; use embassy_net::{Stack, StackResources}; use embassy_rp::gpio::{Flex, Level, Output}; use embassy_rp::peripherals::{PIN_23, PIN_24, PIN_25, PIN_29}; -use embassy_rp::Peripherals; -use embassy_util::Forever; use embedded_hal_1::spi::ErrorType; use embedded_hal_async::spi::{ExclusiveDevice, SpiBusFlush, SpiBusRead, SpiBusWrite}; use embedded_io::asynch::{Read, Write}; +use static_cell::StaticCell; use {defmt_rtt as _, panic_probe as _}; -macro_rules! forever { +macro_rules! singleton { ($val:expr) => {{ type T = impl Sized; - static FOREVER: Forever = Forever::new(); - FOREVER.put_with(move || $val) + static STATIC_CELL: StaticCell = StaticCell::new(); + STATIC_CELL.init_with(move || $val) }}; } @@ -39,9 +38,11 @@ async fn net_task(stack: &'static Stack>) -> ! { } #[embassy_executor::main] -async fn main(spawner: Spawner, p: Peripherals) { +async fn main(spawner: Spawner) { info!("Hello World!"); + let p = embassy_rp::init(Default::default()); + // Include the WiFi firmware and Country Locale Matrix (CLM) blobs. let fw = include_bytes!("../../../firmware/43439A0.bin"); let clm = include_bytes!("../../../firmware/43439A0_clm.bin"); @@ -63,7 +64,7 @@ async fn main(spawner: Spawner, p: Peripherals) { let bus = MySpi { clk, dio }; let spi = ExclusiveDevice::new(bus, cs); - let state = forever!(cyw43::State::new()); + let state = singleton!(cyw43::State::new()); let (mut control, runner) = cyw43::new(state, pwr, spi, fw).await; spawner.spawn(wifi_task(runner)).unwrap(); @@ -84,10 +85,10 @@ async fn main(spawner: Spawner, p: Peripherals) { let seed = 0x0123_4567_89ab_cdef; // chosen by fair dice roll. guarenteed to be random. // Init network stack - let stack = &*forever!(Stack::new( + let stack = &*singleton!(Stack::new( net_device, config, - forever!(StackResources::<1, 2, 8>::new()), + singleton!(StackResources::<1, 2, 8>::new()), seed )); diff --git a/src/lib.rs b/src/lib.rs index 3932ce41..af2821e5 100644 --- a/src/lib.rs +++ b/src/lib.rs @@ -17,8 +17,8 @@ use core::sync::atomic::Ordering; use core::task::Waker; use atomic_polyfill::AtomicBool; -use embassy_executor::time::{block_for, Duration, Timer}; use embassy_net::{PacketBoxExt, PacketBuf}; +use embassy_time::{block_for, Duration, Timer}; use embassy_util::blocking_mutex::raw::NoopRawMutex; use embassy_util::channel::mpmc::Channel; use embassy_util::yield_now; From 9218aff498aa4f9fca5d0aa3134fda6462801a2e Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Tue, 23 Aug 2022 01:06:14 +0200 Subject: [PATCH 025/130] Update Embassy. --- Cargo.toml | 3 ++- examples/rpi-pico-w/Cargo.toml | 20 ++++++-------------- src/lib.rs | 6 +++--- 3 files changed, 11 insertions(+), 18 deletions(-) diff --git a/Cargo.toml b/Cargo.toml index c6120dac..cb6aa0b2 100644 --- a/Cargo.toml +++ b/Cargo.toml @@ -9,7 +9,8 @@ log = ["dep:log"] [dependencies] embassy-time = { version = "0.1.0" } -embassy-util = { version = "0.1.0" } +embassy-sync = { version = "0.1.0" } +embassy-futures = { version = "0.1.0" } embassy-net = { version = "0.1.0" } atomic-polyfill = "0.1.5" diff --git a/examples/rpi-pico-w/Cargo.toml b/examples/rpi-pico-w/Cargo.toml index 98a3d105..53e72498 100644 --- a/examples/rpi-pico-w/Cargo.toml +++ b/examples/rpi-pico-w/Cargo.toml @@ -8,7 +8,6 @@ edition = "2021" cyw43 = { path = "../../", features = ["defmt"]} embassy-executor = { version = "0.1.0", features = ["defmt", "integrated-timers"] } embassy-time = { version = "0.1.0", features = ["defmt", "defmt-timestamp-uptime"] } -embassy-util = { version = "0.1.0" } embassy-rp = { version = "0.1.0", features = ["defmt", "unstable-traits", "nightly", "unstable-pac"] } embassy-net = { version = "0.1.0", features = ["defmt", "tcp", "dhcpv4", "medium-ethernet", "pool-16"] } atomic-polyfill = "0.1.5" @@ -29,19 +28,12 @@ heapless = "0.7.15" [patch.crates-io] -embassy-executor = { git = "https://github.com/embassy-rs/embassy", rev = "53fbd0efb3e77e1e3de948afde2b5bf1a5a9735f" } -embassy-time = { git = "https://github.com/embassy-rs/embassy", rev = "53fbd0efb3e77e1e3de948afde2b5bf1a5a9735f" } -embassy-util = { git = "https://github.com/embassy-rs/embassy", rev = "53fbd0efb3e77e1e3de948afde2b5bf1a5a9735f" } -embassy-rp = { git = "https://github.com/embassy-rs/embassy", rev = "53fbd0efb3e77e1e3de948afde2b5bf1a5a9735f" } -embassy-net = { git = "https://github.com/embassy-rs/embassy", rev = "53fbd0efb3e77e1e3de948afde2b5bf1a5a9735f" } -#embassy-executor = { path = "/home/dirbaio/embassy/embassy/embassy-executor" } -#embassy-util = { path = "/home/dirbaio/embassy/embassy/embassy-util" } -#embassy-rp = { path = "/home/dirbaio/embassy/embassy/embassy-rp" } -#embassy-net = { path = "/home/dirbaio/embassy/embassy/embassy-net" } -#smoltcp = { path = "./smoltcp" } - -#[patch."https://github.com/smoltcp-rs/smoltcp"] -#smoltcp = { path = "./smoltcp" } +embassy-executor = { git = "https://github.com/embassy-rs/embassy", rev = "cb9f0ef5b800ce4a22cde1805e0eb88425f1e07b" } +embassy-time = { git = "https://github.com/embassy-rs/embassy", rev = "cb9f0ef5b800ce4a22cde1805e0eb88425f1e07b" } +embassy-futures = { git = "https://github.com/embassy-rs/embassy", rev = "cb9f0ef5b800ce4a22cde1805e0eb88425f1e07b" } +embassy-sync = { git = "https://github.com/embassy-rs/embassy", rev = "cb9f0ef5b800ce4a22cde1805e0eb88425f1e07b" } +embassy-rp = { git = "https://github.com/embassy-rs/embassy", rev = "cb9f0ef5b800ce4a22cde1805e0eb88425f1e07b" } +embassy-net = { git = "https://github.com/embassy-rs/embassy", rev = "cb9f0ef5b800ce4a22cde1805e0eb88425f1e07b" } [profile.dev] debug = 2 diff --git a/src/lib.rs b/src/lib.rs index af2821e5..1c49771b 100644 --- a/src/lib.rs +++ b/src/lib.rs @@ -17,11 +17,11 @@ use core::sync::atomic::Ordering; use core::task::Waker; use atomic_polyfill::AtomicBool; +use embassy_futures::yield_now; use embassy_net::{PacketBoxExt, PacketBuf}; +use embassy_sync::blocking_mutex::raw::NoopRawMutex; +use embassy_sync::channel::Channel; use embassy_time::{block_for, Duration, Timer}; -use embassy_util::blocking_mutex::raw::NoopRawMutex; -use embassy_util::channel::mpmc::Channel; -use embassy_util::yield_now; use embedded_hal_1::digital::blocking::OutputPin; use embedded_hal_async::spi::{SpiBusRead, SpiBusWrite, SpiDevice}; From bb76a29ff160580a934343a1ab10313e7b408da0 Mon Sep 17 00:00:00 2001 From: Daniel Bevenius Date: Wed, 24 Aug 2022 15:58:44 +0200 Subject: [PATCH 026/130] Add comment for AI constants This commit adds a comment about the AI_* constants. The motivation for using this definition is from looking in the following file: https://github.com/seemoo-lab/bcm-public/blob/master/firmware_patching/examples/ioctl/bcmdhd/include/aidmp.h#L2 https://github.com/seemoo-lab/bcm-public/blob/master/firmware_patching/examples/ioctl/bcmdhd/include/aidmp.h#L307-L361 --- src/lib.rs | 2 ++ 1 file changed, 2 insertions(+) diff --git a/src/lib.rs b/src/lib.rs index 1c49771b..b8c00329 100644 --- a/src/lib.rs +++ b/src/lib.rs @@ -91,6 +91,8 @@ const BACKPLANE_ADDRESS_MASK: u32 = 0x7FFF; const BACKPLANE_ADDRESS_32BIT_FLAG: u32 = 0x08000; const BACKPLANE_MAX_TRANSFER_SIZE: usize = 64; +// Broadcom AMBA (Advanced Microcontroller Bus Architecture) Interconnect (AI) +// constants const AI_IOCTRL_OFFSET: u32 = 0x408; const AI_IOCTRL_BIT_FGC: u8 = 0x0002; const AI_IOCTRL_BIT_CLOCK_EN: u8 = 0x0001; From 3826b4f7130366c92015f61566b4bb0783e0fee3 Mon Sep 17 00:00:00 2001 From: Daniel Bevenius Date: Thu, 25 Aug 2022 05:43:38 +0200 Subject: [PATCH 027/130] Rename REG_BUS_FEEDBEAD to REG_BUS_TEST_RO This commit renames the REG_BUS_FEEDBEAD to REG_BUS_TEST_RO (Read-Only) which is the name used in the specification, section 4.2.3 Table 6. It also adds a constant named REG_BUS_TEST_RW (Read-Write) to represent the dummy register which the host can use to write data and read back to check that the gSPI interface is working properly. --- src/lib.rs | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/src/lib.rs b/src/lib.rs index 1c49771b..e287ca12 100644 --- a/src/lib.rs +++ b/src/lib.rs @@ -50,8 +50,8 @@ const REG_BUS_CTRL: u32 = 0x0; const REG_BUS_INTERRUPT: u32 = 0x04; // 16 bits - Interrupt status const REG_BUS_INTERRUPT_ENABLE: u32 = 0x06; // 16 bits - Interrupt mask const REG_BUS_STATUS: u32 = 0x8; -const REG_BUS_FEEDBEAD: u32 = 0x14; -const REG_BUS_TEST: u32 = 0x18; +const REG_BUS_TEST_RO: u32 = 0x14; +const REG_BUS_TEST_RW: u32 = 0x18; const REG_BUS_RESP_DELAY: u32 = 0x1c; // SPI_STATUS_REGISTER bits @@ -563,19 +563,19 @@ where Timer::after(Duration::from_millis(250)).await; info!("waiting for ping..."); - while self.read32_swapped(REG_BUS_FEEDBEAD).await != FEEDBEAD {} + while self.read32_swapped(REG_BUS_TEST_RO).await != FEEDBEAD {} info!("ping ok"); - self.write32_swapped(0x18, TEST_PATTERN).await; - let val = self.read32_swapped(REG_BUS_TEST).await; + self.write32_swapped(REG_BUS_TEST_RW, TEST_PATTERN).await; + let val = self.read32_swapped(REG_BUS_TEST_RW).await; assert_eq!(val, TEST_PATTERN); // 32bit, little endian. self.write32_swapped(REG_BUS_CTRL, 0x00010031).await; - let val = self.read32(FUNC_BUS, REG_BUS_FEEDBEAD).await; + let val = self.read32(FUNC_BUS, REG_BUS_TEST_RO).await; assert_eq!(val, FEEDBEAD); - let val = self.read32(FUNC_BUS, REG_BUS_TEST).await; + let val = self.read32(FUNC_BUS, REG_BUS_TEST_RW).await; assert_eq!(val, TEST_PATTERN); // No response delay in any of the funcs. From f2ac14b86f21c31221bba1e1653e2a9020d60d8e Mon Sep 17 00:00:00 2001 From: Daniel Bevenius Date: Wed, 24 Aug 2022 13:35:48 +0200 Subject: [PATCH 028/130] Add WORD_LENGTH_32/HIGH_SPEED constants MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This commit adds two constants which are intended to be used for setting the `Word Length` and `High Speed` fields in the gSPR register (address: 0x0000, bit: 0 and bit 4). Currently, this field is being set by the following line: ```rust // 32bit, little endian. self.write32_swapped(REG_BUS_CTRL, 0x00010031).await; ``` Assuming that we are sending these bits using the gSPI write protocol and using 16-bit word operation in little endian (which I think might be the default) then the data bytes should be packed like this: ``` +--+--+--+--+ |D1|D0|D3|D2| +--+--+--+--+ val (hex): 0x00010031 val (bin): 00000000000000010000000000110001 rotated(16): 00000000001100010000000000000001 ``` If we split val into bytes and rotated the bits we get: ``` Split into bytes: D3 D2 D1 D0 00000000 00000001 00000000 00110001 Rotate 16 and split into bytes: D1 D0 D3 D2 00000000 00110001 00000000 00000001 ``` Looking at the write procotol it seems to me that the above will indeed set the `Word Length` to 1 but will also set other values. ``` Status enable (1=default) D1 D0 D3 D2 ↓ 00000000 00110001 00000000 00000001 ↑↑ ↑↑ ↑ || |Word Length (1=32-bit) || | || Endianess (0=Little) || |High-speed mode (1=High speed (default)) | Interrupt polarity (1=high (default)) ``` This commit suggests adding the above mentioned constants for setting the only the word length field and the high speed field. --- src/lib.rs | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/src/lib.rs b/src/lib.rs index 3932ce41..ef586c8f 100644 --- a/src/lib.rs +++ b/src/lib.rs @@ -53,6 +53,8 @@ const REG_BUS_STATUS: u32 = 0x8; const REG_BUS_FEEDBEAD: u32 = 0x14; const REG_BUS_TEST: u32 = 0x18; const REG_BUS_RESP_DELAY: u32 = 0x1c; +const WORD_LENGTH_32: u32 = 0x1; +const HIGH_SPEED: u32 = 0x10; // SPI_STATUS_REGISTER bits const STATUS_DATA_NOT_AVAILABLE: u32 = 0x00000001; @@ -570,8 +572,8 @@ where let val = self.read32_swapped(REG_BUS_TEST).await; assert_eq!(val, TEST_PATTERN); - // 32bit, little endian. - self.write32_swapped(REG_BUS_CTRL, 0x00010031).await; + // 32-bit word length, little endian (which is the default endianess). + self.write32_swapped(REG_BUS_CTRL, WORD_LENGTH_32 | HIGH_SPEED).await; let val = self.read32(FUNC_BUS, REG_BUS_FEEDBEAD).await; assert_eq!(val, FEEDBEAD); From acaa8b3e8b80ccd49e04a6dc7d595d3a52d1ad0d Mon Sep 17 00:00:00 2001 From: Jan Niehusmann Date: Tue, 30 Aug 2022 20:36:57 +0000 Subject: [PATCH 029/130] Fix calculation of slice index total_len is already rounded up, so the `+ 3` is not needed. And even if it was, the calculation should have been `((total_len + 3) / 4)`. `(total_len + 3 / 4)` is equivalent to `total_len` and can overflow the slice, leading to a panic which can easily be triggered by sending large ICMP ECHO packets to the device. --- src/lib.rs | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/lib.rs b/src/lib.rs index 8f439cf2..34170a26 100644 --- a/src/lib.rs +++ b/src/lib.rs @@ -762,7 +762,7 @@ where let bus = unsafe { &mut *bus }; async { bus.write(&[cmd]).await?; - bus.write(&buf[..(total_len + 3 / 4)]).await?; + bus.write(&buf[..(total_len / 4)]).await?; Ok(()) } }) From 95f3484b87d7ae829e14492a43d49a5a0a58f1b8 Mon Sep 17 00:00:00 2001 From: Jan Niehusmann Date: Tue, 6 Sep 2022 11:38:33 +0000 Subject: [PATCH 030/130] Implement minimal tx flow control The credit update code uses constants from https://github.com/Infineon/wifi-host-driver/blob/master/WiFi_Host_Driver/src/whd_sdpcm.c#L307-L317 --- src/lib.rs | 32 ++++++++++++++++++++++++++------ 1 file changed, 26 insertions(+), 6 deletions(-) diff --git a/src/lib.rs b/src/lib.rs index 34170a26..f818caf6 100644 --- a/src/lib.rs +++ b/src/lib.rs @@ -525,6 +525,8 @@ pub struct Runner<'a, PWR, SPI> { ioctl_id: u16, sdpcm_seq: u8, backplane_window: u32, + + tx_seq_max: u8, } pub async fn new<'a, PWR, SPI>( @@ -546,6 +548,8 @@ where ioctl_id: 0, sdpcm_seq: 0, backplane_window: 0xAAAA_AAAA, + + tx_seq_max: 1, }; runner.init(firmware).await; @@ -670,13 +674,17 @@ where loop { // Send stuff // TODO flow control - if let IoctlState::Pending { kind, cmd, iface, buf } = self.state.ioctl_state.get() { - self.send_ioctl(kind, cmd, iface, unsafe { &*buf }).await; - self.state.ioctl_state.set(IoctlState::Sent { buf }); - } + if self.sdpcm_seq == self.tx_seq_max || self.tx_seq_max.wrapping_sub(self.sdpcm_seq) & 0x80 != 0 { + warn!("TX stalled"); + } else { + if let IoctlState::Pending { kind, cmd, iface, buf } = self.state.ioctl_state.get() { + self.send_ioctl(kind, cmd, iface, unsafe { &*buf }).await; + self.state.ioctl_state.set(IoctlState::Sent { buf }); + } - if let Ok(p) = self.state.tx_channel.try_recv() { - self.send_packet(&p).await; + if let Ok(p) = self.state.tx_channel.try_recv() { + self.send_packet(&p).await; + } } // Receive stuff @@ -788,6 +796,8 @@ where return; } + self.update_credit(&sdpcm_header); + let channel = sdpcm_header.channel_and_flags & 0x0f; let payload = &packet[sdpcm_header.header_length as _..]; @@ -894,6 +904,16 @@ where } } + fn update_credit(&mut self, sdpcm_header: &SdpcmHeader) { + if sdpcm_header.channel_and_flags & 0xf < 3 { + let mut tx_seq_max = sdpcm_header.bus_data_credit; + if tx_seq_max - self.sdpcm_seq > 0x40 { + tx_seq_max = self.sdpcm_seq + 2; + } + self.tx_seq_max = tx_seq_max; + } + } + async fn send_ioctl(&mut self, kind: u32, cmd: u32, iface: u32, data: &[u8]) { let mut buf = [0; 512]; let buf8 = slice8_mut(&mut buf); From 5c4d6232ae5822d70cba4dbd60cfe348a7f0d687 Mon Sep 17 00:00:00 2001 From: Jan Niehusmann Date: Tue, 6 Sep 2022 20:50:27 +0000 Subject: [PATCH 031/130] Fixes after review - rename tx_seq_max to sdpcm_seq_max - make sure we have credit for each packet we send --- src/lib.rs | 29 ++++++++++++++++++----------- 1 file changed, 18 insertions(+), 11 deletions(-) diff --git a/src/lib.rs b/src/lib.rs index f818caf6..5e79e6e4 100644 --- a/src/lib.rs +++ b/src/lib.rs @@ -526,7 +526,7 @@ pub struct Runner<'a, PWR, SPI> { sdpcm_seq: u8, backplane_window: u32, - tx_seq_max: u8, + sdpcm_seq_max: u8, } pub async fn new<'a, PWR, SPI>( @@ -549,7 +549,7 @@ where sdpcm_seq: 0, backplane_window: 0xAAAA_AAAA, - tx_seq_max: 1, + sdpcm_seq_max: 1, }; runner.init(firmware).await; @@ -673,17 +673,20 @@ where let mut buf = [0; 512]; loop { // Send stuff - // TODO flow control - if self.sdpcm_seq == self.tx_seq_max || self.tx_seq_max.wrapping_sub(self.sdpcm_seq) & 0x80 != 0 { + // TODO flow control not yet complete + if !self.has_credit() { warn!("TX stalled"); } else { if let IoctlState::Pending { kind, cmd, iface, buf } = self.state.ioctl_state.get() { self.send_ioctl(kind, cmd, iface, unsafe { &*buf }).await; self.state.ioctl_state.set(IoctlState::Sent { buf }); } - - if let Ok(p) = self.state.tx_channel.try_recv() { - self.send_packet(&p).await; + if !self.has_credit() { + warn!("TX stalled"); + } else { + if let Ok(p) = self.state.tx_channel.try_recv() { + self.send_packet(&p).await; + } } } @@ -906,14 +909,18 @@ where fn update_credit(&mut self, sdpcm_header: &SdpcmHeader) { if sdpcm_header.channel_and_flags & 0xf < 3 { - let mut tx_seq_max = sdpcm_header.bus_data_credit; - if tx_seq_max - self.sdpcm_seq > 0x40 { - tx_seq_max = self.sdpcm_seq + 2; + let mut sdpcm_seq_max = sdpcm_header.bus_data_credit; + if sdpcm_seq_max - self.sdpcm_seq > 0x40 { + sdpcm_seq_max = self.sdpcm_seq + 2; } - self.tx_seq_max = tx_seq_max; + self.sdpcm_seq_max = sdpcm_seq_max; } } + fn has_credit(&mut self) -> bool { + self.sdpcm_seq != self.sdpcm_seq_max && self.sdpcm_seq_max.wrapping_sub(self.sdpcm_seq) & 0x80 == 0 + } + async fn send_ioctl(&mut self, kind: u32, cmd: u32, iface: u32, data: &[u8]) { let mut buf = [0; 512]; let buf8 = slice8_mut(&mut buf); From ea0738c4851cbeb87de0d40ce1e8246368db4c6b Mon Sep 17 00:00:00 2001 From: Jan Niehusmann Date: Tue, 6 Sep 2022 21:06:47 +0000 Subject: [PATCH 032/130] Add gpio_set Example: Blink LED ``` loop { info!("on"); control.gpio_set(0, true).await; Timer::after(Duration::from_millis(200)).await; info!("off"); control.gpio_set(0, false).await; Timer::after(Duration::from_millis(200)).await; } ``` --- src/lib.rs | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/src/lib.rs b/src/lib.rs index 5e79e6e4..21b8b2d8 100644 --- a/src/lib.rs +++ b/src/lib.rs @@ -397,6 +397,12 @@ impl<'a> Control<'a> { info!("JOINED"); } + pub async fn gpio_set(&mut self, gpio_n: u8, gpio_en: bool) { + assert!(gpio_n < 3); + self.set_iovar_u32x2("gpioout", 1 << gpio_n, if gpio_en { 1 << gpio_n } else { 0 }) + .await + } + async fn set_iovar_u32x2(&mut self, name: &str, val1: u32, val2: u32) { let mut buf = [0; 8]; buf[0..4].copy_from_slice(&val1.to_le_bytes()); From fe5229670f40757f63e56c68388be241b5470bf6 Mon Sep 17 00:00:00 2001 From: Daniel Bevenius Date: Fri, 9 Sep 2022 11:57:02 +0200 Subject: [PATCH 033/130] Add constants for ioctl commands This commit adds contants for the IOCTL commands that are currently used in cyw43::Control. --- src/lib.rs | 19 +++++++++++++------ 1 file changed, 13 insertions(+), 6 deletions(-) diff --git a/src/lib.rs b/src/lib.rs index 21b8b2d8..3f801fe9 100644 --- a/src/lib.rs +++ b/src/lib.rs @@ -126,6 +126,12 @@ const IRQ_F1_INTR: u16 = 0x2000; const IRQ_F2_INTR: u16 = 0x4000; const IRQ_F3_INTR: u16 = 0x8000; +const IOCTL_CMD_UP: u32 = 2; +const IOCTL_CMD_SET_SSID: u32 = 26; +const IOCTL_CMD_SET_VAR: u32 = 263; +const IOCTL_CMD_GET_VAR: u32 = 262; +const IOCTL_CMD_SET_PASSPHRASE: u32 = 268; + #[derive(Clone, Copy, PartialEq, Eq)] enum Core { WLAN = 0, @@ -263,7 +269,8 @@ impl<'a> Control<'a> { buf[0..8].copy_from_slice(b"clmload\x00"); buf[8..20].copy_from_slice(&header.to_bytes()); buf[20..][..chunk.len()].copy_from_slice(&chunk); - self.ioctl(2, 263, 0, &mut buf[..8 + 12 + chunk.len()]).await; + self.ioctl(2, IOCTL_CMD_SET_VAR, 0, &mut buf[..8 + 12 + chunk.len()]) + .await; } // check clmload ok @@ -323,7 +330,7 @@ impl<'a> Control<'a> { Timer::after(Duration::from_millis(100)).await; // set wifi up - self.ioctl(2, 2, 0, &mut []).await; + self.ioctl(2, IOCTL_CMD_UP, 0, &mut []).await; Timer::after(Duration::from_millis(100)).await; @@ -360,7 +367,7 @@ impl<'a> Control<'a> { ssid: [0; 32], }; i.ssid[..ssid.len()].copy_from_slice(ssid.as_bytes()); - self.ioctl(2, 26, 0, &mut i.to_bytes()).await; // set_ssid + self.ioctl(2, IOCTL_CMD_SET_SSID, 0, &mut i.to_bytes()).await; // set_ssid info!("JOINED"); } @@ -381,7 +388,7 @@ impl<'a> Control<'a> { passphrase: [0; 64], }; pfi.passphrase[..passphrase.len()].copy_from_slice(passphrase.as_bytes()); - self.ioctl(2, 268, 0, &mut pfi.to_bytes()).await; // WLC_SET_WSEC_PMK + self.ioctl(2, IOCTL_CMD_SET_PASSPHRASE, 0, &mut pfi.to_bytes()).await; // WLC_SET_WSEC_PMK self.ioctl_set_u32(20, 0, 1).await; // set_infra = 1 self.ioctl_set_u32(22, 0, 0).await; // set_auth = 0 (open) @@ -430,7 +437,7 @@ impl<'a> Control<'a> { buf[name.len() + 1..][..val.len()].copy_from_slice(val); let total_len = name.len() + 1 + val.len(); - self.ioctl(2, 263, 0, &mut buf[..total_len]).await; + self.ioctl(2, IOCTL_CMD_SET_VAR, 0, &mut buf[..total_len]).await; } // TODO this is not really working, it always returns all zeros. @@ -442,7 +449,7 @@ impl<'a> Control<'a> { buf[name.len()] = 0; let total_len = max(name.len() + 1, res.len()); - let res_len = self.ioctl(0, 262, 0, &mut buf[..total_len]).await; + let res_len = self.ioctl(0, IOCTL_CMD_GET_VAR, 0, &mut buf[..total_len]).await; let out_len = min(res.len(), res_len); res[..out_len].copy_from_slice(&buf[..out_len]); From f0b7f43c4104ea15c860d557c4a507681cba0d0d Mon Sep 17 00:00:00 2001 From: Daniel Bevenius Date: Fri, 9 Sep 2022 14:15:19 +0200 Subject: [PATCH 034/130] Use wrapping_sub in update_credit MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This commit uses wrapping_sub for subtraction in update_credit. The motivation for this is that currently the rpi-pico-w example panics (at least for me) with the following error: 3.825277 INFO init done └─ cyw43::{impl#4}::init::{async_fn#0} @ /embassy/cyw43/src/fmt.rs:138 3.825486 INFO Downloading CLM... └─ cyw43::{impl#2}::init::{async_fn#0} @ /embassy/cyw43/src/fmt.rs:138 3.841328 WARN TX stalled └─ cyw43::{impl#4}::run::{async_fn#0} @ /embassy/cyw43/src/fmt.rs:151 3.845549 ERROR panicked at 'attempt to subtract with overflow', /embassy/cyw43/src/lib.rs:919:16 └─ panic_probe::print_defmt::print @ .cargo/registry/src/github.com-1ecc6299db9ec823/panic-probe-0.3.0/src/lib.rs:91 ──────────────────────────────────────────────────────────────────────────────── stack backtrace: 0: HardFaultTrampoline 1: lib::inline::__udf at ./asm/inline.rs:181:5 2: __udf at ./asm/lib.rs:51:17 3: cortex_m::asm::udf at .cargo/registry/src/github.com-1ecc6299db9ec823/cortex-m-0.7.6/src/asm.rs:43:5 4: rust_begin_unwind at .cargo/registry/src/github.com-1ecc6299db9ec823/panic-probe-0.3.0/src/lib.rs:72:9 5: core::panicking::panic_fmt at rustc/1c7b36d4db582cb47513a6c7176baaec1c3346ab/library/core/src/panicking.rs:142:14 6: core::panicking::panic at /rustc/1c7b36d4db582cb47513a6c7176baaec1c3346ab/library/core/src/panicking.rs:48:5 7: cyw43::Runner::update_credit at /embassy/cyw43/src/lib.rs:919:16 8: cyw43::Runner::rx at /embassy/cyw43/src/lib.rs:808:9 9: cyw43::Runner::run::{{closure}} at /embassy/cyw43/src/lib.rs:727:21 10: as core::future::future::Future>::poll at /rustc/1c7b36d4db582cb47513a6c7176baaec1c3346ab/library/core/src/future/mod.rs:91:19 11: cyw43_example_rpi_pico_w::__wifi_task_task::{{closure}} at src/main.rs:32:17 --- src/lib.rs | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/lib.rs b/src/lib.rs index 21b8b2d8..d9a21f4b 100644 --- a/src/lib.rs +++ b/src/lib.rs @@ -916,7 +916,7 @@ where fn update_credit(&mut self, sdpcm_header: &SdpcmHeader) { if sdpcm_header.channel_and_flags & 0xf < 3 { let mut sdpcm_seq_max = sdpcm_header.bus_data_credit; - if sdpcm_seq_max - self.sdpcm_seq > 0x40 { + if sdpcm_seq_max.wrapping_sub(self.sdpcm_seq) > 0x40 { sdpcm_seq_max = self.sdpcm_seq + 2; } self.sdpcm_seq_max = sdpcm_seq_max; From be20512f17210ae179078c4bb082211d00d828da Mon Sep 17 00:00:00 2001 From: Daniel Bevenius Date: Mon, 12 Sep 2022 11:44:21 +0200 Subject: [PATCH 035/130] Add contants and update comment about ALP This commit add two constants and updates the comment about ALP. It was not easy to find the definition of ALP but after searching I found what I believe is the correct definition in section 3.3 "Clocks" in the referenced document below. Active Low Power (ALP): Supplied by an internal or external oscillator. This clock is requested by cores when accessing backplane registers in other cores or when performing minor computations. When an external crystal is used to provide reference clock, ALP clock frequency is determined by the frequency of the external oscillator. A 37.4 MHz reference clock is recommended. Refs: https://www.infineon.com/dgdl/Infineon-AN214828_Power_Consumption_Measurements-ApplicationNotes-v03_00-EN.pdf?fileId=8ac78c8c7cdc391c017d0d2803a4630d --- src/lib.rs | 10 +++++++--- 1 file changed, 7 insertions(+), 3 deletions(-) diff --git a/src/lib.rs b/src/lib.rs index e145b821..8e43f51f 100644 --- a/src/lib.rs +++ b/src/lib.rs @@ -92,6 +92,9 @@ const BACKPLANE_WINDOW_SIZE: usize = 0x8000; const BACKPLANE_ADDRESS_MASK: u32 = 0x7FFF; const BACKPLANE_ADDRESS_32BIT_FLAG: u32 = 0x08000; const BACKPLANE_MAX_TRANSFER_SIZE: usize = 64; +// Active Low Power (ALP) clock constants +const BACKPLANE_ALP_AVAIL_REQ: u8 = 0x08; +const BACKPLANE_ALP_AVAIL: u8 = 0x40; // Broadcom AMBA (Advanced Microcontroller Bus Architecture) Interconnect (AI) // constants @@ -603,10 +606,11 @@ where // seems to break backplane??? eat the 4-byte delay instead, that's what the vendor drivers do... //self.write32(FUNC_BUS, REG_BUS_RESP_DELAY, 0).await; - // Init ALP (no idea what that stands for) clock - self.write8(FUNC_BACKPLANE, REG_BACKPLANE_CHIP_CLOCK_CSR, 0x08).await; + // Init ALP (Active Low Power) clock + self.write8(FUNC_BACKPLANE, REG_BACKPLANE_CHIP_CLOCK_CSR, BACKPLANE_ALP_AVAIL_REQ) + .await; info!("waiting for clock..."); - while self.read8(FUNC_BACKPLANE, REG_BACKPLANE_CHIP_CLOCK_CSR).await & 0x40 == 0 {} + while self.read8(FUNC_BACKPLANE, REG_BACKPLANE_CHIP_CLOCK_CSR).await & BACKPLANE_ALP_AVAIL == 0 {} info!("clock ok"); let chip_id = self.bp_read16(0x1800_0000).await; From 96214f9db658be6d84082c8ddac21dcf4b09c3ff Mon Sep 17 00:00:00 2001 From: Daniel Bevenius Date: Thu, 15 Sep 2022 09:56:12 +0200 Subject: [PATCH 036/130] Add constants for channel types --- src/lib.rs | 14 +++++++++----- 1 file changed, 9 insertions(+), 5 deletions(-) diff --git a/src/lib.rs b/src/lib.rs index e145b821..def738b8 100644 --- a/src/lib.rs +++ b/src/lib.rs @@ -132,6 +132,10 @@ const IOCTL_CMD_SET_VAR: u32 = 263; const IOCTL_CMD_GET_VAR: u32 = 262; const IOCTL_CMD_SET_PASSPHRASE: u32 = 268; +const CHANNEL_TYPE_CONTROL: u8 = 0; +const CHANNEL_TYPE_EVENT: u8 = 1; +const CHANNEL_TYPE_DATA: u8 = 2; + #[derive(Clone, Copy, PartialEq, Eq)] enum Core { WLAN = 0, @@ -755,7 +759,7 @@ where len: total_len as u16, // TODO does this len need to be rounded up to u32? len_inv: !total_len as u16, sequence: seq, - channel_and_flags: 2, // data channel + channel_and_flags: CHANNEL_TYPE_DATA, next_length: 0, header_length: SdpcmHeader::SIZE as _, wireless_flow_control: 0, @@ -819,7 +823,7 @@ where let payload = &packet[sdpcm_header.header_length as _..]; match channel { - 0 => { + CHANNEL_TYPE_CONTROL => { if payload.len() < CdcHeader::SIZE { warn!("payload too short, len={}", payload.len()); return; @@ -840,7 +844,7 @@ where } } } - 1 => { + CHANNEL_TYPE_EVENT => { let bcd_header = BcdHeader::from_bytes(&payload[..BcdHeader::SIZE].try_into().unwrap()); trace!(" {:?}", bcd_header); @@ -897,7 +901,7 @@ where evt_data ); } - 2 => { + CHANNEL_TYPE_DATA => { let bcd_header = BcdHeader::from_bytes(&payload[..BcdHeader::SIZE].try_into().unwrap()); trace!(" {:?}", bcd_header); @@ -948,7 +952,7 @@ where len: total_len as u16, // TODO does this len need to be rounded up to u32? len_inv: !total_len as u16, sequence: sdpcm_seq, - channel_and_flags: 0, // control channel + channel_and_flags: CHANNEL_TYPE_CONTROL, next_length: 0, header_length: SdpcmHeader::SIZE as _, wireless_flow_control: 0, From 520860622b5d42471c58a041ae37337cb92e3fc9 Mon Sep 17 00:00:00 2001 From: Daniel Bevenius Date: Sat, 17 Sep 2022 09:06:23 +0200 Subject: [PATCH 037/130] Make self parameter to has_credit non-mutable --- src/lib.rs | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/lib.rs b/src/lib.rs index 4baaaa51..d09be506 100644 --- a/src/lib.rs +++ b/src/lib.rs @@ -938,7 +938,7 @@ where } } - fn has_credit(&mut self) -> bool { + fn has_credit(&self) -> bool { self.sdpcm_seq != self.sdpcm_seq_max && self.sdpcm_seq_max.wrapping_sub(self.sdpcm_seq) & 0x80 == 0 } From 483edf694b399779636b6bfd8cf243eb430d1323 Mon Sep 17 00:00:00 2001 From: Daniel Bevenius Date: Sun, 11 Sep 2022 09:34:39 +0200 Subject: [PATCH 038/130] Introduce IoctlType enum for IOCTL types This commit introduces an enum to represent the IOCTL command types available, the direction of the data transfer (Get and Set). --- src/lib.rs | 33 ++++++++++++++++++++++----------- 1 file changed, 22 insertions(+), 11 deletions(-) diff --git a/src/lib.rs b/src/lib.rs index d09be506..a6b26188 100644 --- a/src/lib.rs +++ b/src/lib.rs @@ -139,6 +139,12 @@ const CHANNEL_TYPE_CONTROL: u8 = 0; const CHANNEL_TYPE_EVENT: u8 = 1; const CHANNEL_TYPE_DATA: u8 = 2; +#[derive(Clone, Copy)] +pub enum IoctlType { + Get = 0, + Set = 2, +} + #[derive(Clone, Copy, PartialEq, Eq)] enum Core { WLAN = 0, @@ -212,7 +218,7 @@ enum IoctlState { Idle, Pending { - kind: u32, + kind: IoctlType, cmd: u32, iface: u32, buf: *mut [u8], @@ -276,7 +282,7 @@ impl<'a> Control<'a> { buf[0..8].copy_from_slice(b"clmload\x00"); buf[8..20].copy_from_slice(&header.to_bytes()); buf[20..][..chunk.len()].copy_from_slice(&chunk); - self.ioctl(2, IOCTL_CMD_SET_VAR, 0, &mut buf[..8 + 12 + chunk.len()]) + self.ioctl(IoctlType::Set, IOCTL_CMD_SET_VAR, 0, &mut buf[..8 + 12 + chunk.len()]) .await; } @@ -337,7 +343,7 @@ impl<'a> Control<'a> { Timer::after(Duration::from_millis(100)).await; // set wifi up - self.ioctl(2, IOCTL_CMD_UP, 0, &mut []).await; + self.ioctl(IoctlType::Set, IOCTL_CMD_UP, 0, &mut []).await; Timer::after(Duration::from_millis(100)).await; @@ -374,7 +380,8 @@ impl<'a> Control<'a> { ssid: [0; 32], }; i.ssid[..ssid.len()].copy_from_slice(ssid.as_bytes()); - self.ioctl(2, IOCTL_CMD_SET_SSID, 0, &mut i.to_bytes()).await; // set_ssid + self.ioctl(IoctlType::Set, IOCTL_CMD_SET_SSID, 0, &mut i.to_bytes()) + .await; // set_ssid info!("JOINED"); } @@ -395,7 +402,8 @@ impl<'a> Control<'a> { passphrase: [0; 64], }; pfi.passphrase[..passphrase.len()].copy_from_slice(passphrase.as_bytes()); - self.ioctl(2, IOCTL_CMD_SET_PASSPHRASE, 0, &mut pfi.to_bytes()).await; // WLC_SET_WSEC_PMK + self.ioctl(IoctlType::Set, IOCTL_CMD_SET_PASSPHRASE, 0, &mut pfi.to_bytes()) + .await; // WLC_SET_WSEC_PMK self.ioctl_set_u32(20, 0, 1).await; // set_infra = 1 self.ioctl_set_u32(22, 0, 0).await; // set_auth = 0 (open) @@ -406,7 +414,7 @@ impl<'a> Control<'a> { ssid: [0; 32], }; i.ssid[..ssid.len()].copy_from_slice(ssid.as_bytes()); - self.ioctl(2, 26, 0, &mut i.to_bytes()).await; // set_ssid + self.ioctl(IoctlType::Set, 26, 0, &mut i.to_bytes()).await; // set_ssid info!("JOINED"); } @@ -444,7 +452,8 @@ impl<'a> Control<'a> { buf[name.len() + 1..][..val.len()].copy_from_slice(val); let total_len = name.len() + 1 + val.len(); - self.ioctl(2, IOCTL_CMD_SET_VAR, 0, &mut buf[..total_len]).await; + self.ioctl(IoctlType::Set, IOCTL_CMD_SET_VAR, 0, &mut buf[..total_len]) + .await; } // TODO this is not really working, it always returns all zeros. @@ -456,7 +465,9 @@ impl<'a> Control<'a> { buf[name.len()] = 0; let total_len = max(name.len() + 1, res.len()); - let res_len = self.ioctl(0, IOCTL_CMD_GET_VAR, 0, &mut buf[..total_len]).await; + let res_len = self + .ioctl(IoctlType::Get, IOCTL_CMD_GET_VAR, 0, &mut buf[..total_len]) + .await; let out_len = min(res.len(), res_len); res[..out_len].copy_from_slice(&buf[..out_len]); @@ -465,10 +476,10 @@ impl<'a> Control<'a> { async fn ioctl_set_u32(&mut self, cmd: u32, iface: u32, val: u32) { let mut buf = val.to_le_bytes(); - self.ioctl(2, cmd, 0, &mut buf).await; + self.ioctl(IoctlType::Set, cmd, 0, &mut buf).await; } - async fn ioctl(&mut self, kind: u32, cmd: u32, iface: u32, buf: &mut [u8]) -> usize { + async fn ioctl(&mut self, kind: IoctlType, cmd: u32, iface: u32, buf: &mut [u8]) -> usize { // TODO cancel ioctl on future drop. while !matches!(self.state.ioctl_state.get(), IoctlState::Idle) { @@ -942,7 +953,7 @@ where self.sdpcm_seq != self.sdpcm_seq_max && self.sdpcm_seq_max.wrapping_sub(self.sdpcm_seq) & 0x80 == 0 } - async fn send_ioctl(&mut self, kind: u32, cmd: u32, iface: u32, data: &[u8]) { + async fn send_ioctl(&mut self, kind: IoctlType, cmd: u32, iface: u32, data: &[u8]) { let mut buf = [0; 512]; let buf8 = slice8_mut(&mut buf); From 8f21a5b11698e0c84e61e22c9c505d59d5e50f67 Mon Sep 17 00:00:00 2001 From: Daniel Bevenius Date: Fri, 23 Sep 2022 08:27:18 +0200 Subject: [PATCH 039/130] Add comment about bus:txglom iovar This commit adds a comment to the setting of the iovar `bus:txglom`. The motivation for this is that I had not heard of 'glom/glomming' before and having a comment might help others that are not familar with the term. --- src/lib.rs | 3 +++ 1 file changed, 3 insertions(+) diff --git a/src/lib.rs b/src/lib.rs index a6b26188..7a09a539 100644 --- a/src/lib.rs +++ b/src/lib.rs @@ -291,6 +291,9 @@ impl<'a> Control<'a> { info!("Configuring misc stuff..."); + // Disable tx gloming which transfers multiple packets in one request. + // 'glom' is short for "conglomerate" which means "gather together into + // a compact mass". self.set_iovar_u32("bus:txglom", 0).await; self.set_iovar_u32("apsta", 1).await; From 3ba0b3ef3b62ed05afed5ddeec8afaedc87e190e Mon Sep 17 00:00:00 2001 From: Daniel Bevenius Date: Fri, 23 Sep 2022 09:04:59 +0200 Subject: [PATCH 040/130] Comment out extra Timer:after calls This commit comments out two Timer::after calls which look like they go together with previous instructions, but those instructions are currently commented out, so it looks like these calls are not currently needed. --- src/lib.rs | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/lib.rs b/src/lib.rs index a6b26188..013b2343 100644 --- a/src/lib.rs +++ b/src/lib.rs @@ -315,14 +315,14 @@ impl<'a> Control<'a> { self.set_iovar_u32("bus:txglom", 0).await; Timer::after(Duration::from_millis(100)).await; //self.set_iovar_u32("apsta", 1).await; // this crashes, also we already did it before...?? - Timer::after(Duration::from_millis(100)).await; + //Timer::after(Duration::from_millis(100)).await; self.set_iovar_u32("ampdu_ba_wsize", 8).await; Timer::after(Duration::from_millis(100)).await; self.set_iovar_u32("ampdu_mpdu", 4).await; Timer::after(Duration::from_millis(100)).await; //self.set_iovar_u32("ampdu_rx_factor", 0).await; // this crashes - Timer::after(Duration::from_millis(100)).await; + //Timer::after(Duration::from_millis(100)).await; // evts let mut evts = EventMask { From 28bf4b7b6da0e0f6ce0878580363f135c7e7a879 Mon Sep 17 00:00:00 2001 From: Daniel Bevenius Date: Fri, 23 Sep 2022 09:35:54 +0200 Subject: [PATCH 041/130] Add const for IOCTL ANTDIV --- src/lib.rs | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/src/lib.rs b/src/lib.rs index a6b26188..f543f75e 100644 --- a/src/lib.rs +++ b/src/lib.rs @@ -131,6 +131,7 @@ const IRQ_F3_INTR: u16 = 0x8000; const IOCTL_CMD_UP: u32 = 2; const IOCTL_CMD_SET_SSID: u32 = 26; +const IOCTL_CMD_ANTDIV: u32 = 64; const IOCTL_CMD_SET_VAR: u32 = 263; const IOCTL_CMD_GET_VAR: u32 = 262; const IOCTL_CMD_SET_PASSPHRASE: u32 = 268; @@ -310,7 +311,8 @@ impl<'a> Control<'a> { // set country takes some time, next ioctls fail if we don't wait. Timer::after(Duration::from_millis(100)).await; - self.ioctl_set_u32(64, 0, 0).await; // WLC_SET_ANTDIV + // Set antenna to chip antenna + self.ioctl_set_u32(IOCTL_CMD_ANTDIV, 0, 0).await; self.set_iovar_u32("bus:txglom", 0).await; Timer::after(Duration::from_millis(100)).await; From 281cbcb1e8f2df2af6584c8dcef2d45b1ef73f4b Mon Sep 17 00:00:00 2001 From: Daniel Bevenius Date: Fri, 23 Sep 2022 09:39:29 +0200 Subject: [PATCH 042/130] Update ioctl_set_u32 to pass through iface param This commit updates ioctl_set_u32 to pass through the `iface` parameter to self.iotcl. --- src/lib.rs | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/lib.rs b/src/lib.rs index a6b26188..80e07662 100644 --- a/src/lib.rs +++ b/src/lib.rs @@ -476,7 +476,7 @@ impl<'a> Control<'a> { async fn ioctl_set_u32(&mut self, cmd: u32, iface: u32, val: u32) { let mut buf = val.to_le_bytes(); - self.ioctl(IoctlType::Set, cmd, 0, &mut buf).await; + self.ioctl(IoctlType::Set, cmd, iface, &mut buf).await; } async fn ioctl(&mut self, kind: IoctlType, cmd: u32, iface: u32, buf: &mut [u8]) -> usize { From 9aaefa6e7163c80b26546a8ce58740b437a5a03e Mon Sep 17 00:00:00 2001 From: Daniel Bevenius Date: Fri, 23 Sep 2022 15:01:09 +0200 Subject: [PATCH 043/130] Add constants for cmd_word arguments This commit adds constants intended to be used with the `cmd_word` function. The motivation for this to (hopefully) improve the readability of the code. --- src/lib.rs | 25 ++++++++++++++++--------- 1 file changed, 16 insertions(+), 9 deletions(-) diff --git a/src/lib.rs b/src/lib.rs index a6b26188..c72f29ed 100644 --- a/src/lib.rs +++ b/src/lib.rs @@ -32,6 +32,13 @@ fn swap16(x: u32) -> u32 { x.rotate_left(16) } +// CYW_SPID command structure constants. +const WRITE: bool = true; +const READ: bool = false; +const INC_ADDR: bool = true; +#[allow(unused)] +const FIXED_ADDR: bool = false; + fn cmd_word(write: bool, incr: bool, func: u32, addr: u32, len: u32) -> u32 { (write as u32) << 31 | (incr as u32) << 30 | (func & 0b11) << 28 | (addr & 0x1FFFF) << 11 | (len & 0x7FF) } @@ -734,7 +741,7 @@ where if status & STATUS_F2_PKT_AVAILABLE != 0 { let len = (status & STATUS_F2_PKT_LEN_MASK) >> STATUS_F2_PKT_LEN_SHIFT; - let cmd = cmd_word(false, true, FUNC_WLAN, 0, len); + let cmd = cmd_word(READ, INC_ADDR, FUNC_WLAN, 0, len); self.spi .transaction(|bus| { @@ -799,7 +806,7 @@ where trace!(" {:02x}", &buf8[..total_len.min(48)]); - let cmd = cmd_word(true, true, FUNC_WLAN, 0, total_len as _); + let cmd = cmd_word(WRITE, INC_ADDR, FUNC_WLAN, 0, total_len as _); self.spi .transaction(|bus| { let bus = unsafe { &mut *bus }; @@ -993,7 +1000,7 @@ where trace!(" {:02x}", &buf8[..total_len.min(48)]); - let cmd = cmd_word(true, true, FUNC_WLAN, 0, total_len as _); + let cmd = cmd_word(WRITE, INC_ADDR, FUNC_WLAN, 0, total_len as _); self.spi .transaction(|bus| { @@ -1081,7 +1088,7 @@ where self.backplane_set_window(addr).await; - let cmd = cmd_word(false, true, FUNC_BACKPLANE, window_offs, len as u32); + let cmd = cmd_word(READ, INC_ADDR, FUNC_BACKPLANE, window_offs, len as u32); self.spi .transaction(|bus| { @@ -1126,7 +1133,7 @@ where self.backplane_set_window(addr).await; - let cmd = cmd_word(true, true, FUNC_BACKPLANE, window_offs, len as u32); + let cmd = cmd_word(WRITE, INC_ADDR, FUNC_BACKPLANE, window_offs, len as u32); self.spi .transaction(|bus| { @@ -1245,7 +1252,7 @@ where } async fn readn(&mut self, func: u32, addr: u32, len: u32) -> u32 { - let cmd = cmd_word(false, true, func, addr, len); + let cmd = cmd_word(READ, INC_ADDR, func, addr, len); let mut buf = [0; 1]; self.spi @@ -1268,7 +1275,7 @@ where } async fn writen(&mut self, func: u32, addr: u32, val: u32, len: u32) { - let cmd = cmd_word(true, true, func, addr, len); + let cmd = cmd_word(WRITE, INC_ADDR, func, addr, len); self.spi .transaction(|bus| { @@ -1283,7 +1290,7 @@ where } async fn read32_swapped(&mut self, addr: u32) -> u32 { - let cmd = cmd_word(false, true, FUNC_BUS, addr, 4); + let cmd = cmd_word(READ, INC_ADDR, FUNC_BUS, addr, 4); let mut buf = [0; 1]; self.spi @@ -1302,7 +1309,7 @@ where } async fn write32_swapped(&mut self, addr: u32, val: u32) { - let cmd = cmd_word(true, true, FUNC_BUS, addr, 4); + let cmd = cmd_word(WRITE, INC_ADDR, FUNC_BUS, addr, 4); self.spi .transaction(|bus| { From 9962db4ecf227792d777ff0bc91d9e4d50d24f85 Mon Sep 17 00:00:00 2001 From: Daniel Bevenius Date: Fri, 23 Sep 2022 13:29:33 +0200 Subject: [PATCH 044/130] Suppress compiler warnings This commit adds the allow(unused) attribute to functions and constants that are not currently used. There is one warning remaining but https://github.com/embassy-rs/cyw43/pull/23 attempts to address that one. The constants have been moved into a module to allow the attribute to be applied to the module as a whole. The motivation for this is that it will hopefully make it easier to spot new warnings that might be introduced by new, or updated code. --- src/lib.rs | 198 ++++++++++++++++++++++++++----------------------- src/structs.rs | 3 + 2 files changed, 107 insertions(+), 94 deletions(-) diff --git a/src/lib.rs b/src/lib.rs index c7e0285f..b8ce2e2a 100644 --- a/src/lib.rs +++ b/src/lib.rs @@ -32,13 +32,6 @@ fn swap16(x: u32) -> u32 { x.rotate_left(16) } -// CYW_SPID command structure constants. -const WRITE: bool = true; -const READ: bool = false; -const INC_ADDR: bool = true; -#[allow(unused)] -const FIXED_ADDR: bool = false; - fn cmd_word(write: bool, incr: bool, func: u32, addr: u32, len: u32) -> u32 { (write as u32) << 31 | (incr as u32) << 30 | (func & 0b11) << 28 | (addr & 0x1FFFF) << 11 | (len & 0x7FF) } @@ -48,104 +41,114 @@ fn slice8_mut(x: &mut [u32]) -> &mut [u8] { unsafe { slice::from_raw_parts_mut(x.as_mut_ptr() as _, len) } } -const FUNC_BUS: u32 = 0; -const FUNC_BACKPLANE: u32 = 1; -const FUNC_WLAN: u32 = 2; -const FUNC_BT: u32 = 3; +mod constants { + #![allow(unused)] + pub(crate) const FUNC_BUS: u32 = 0; + pub(crate) const FUNC_BACKPLANE: u32 = 1; + pub(crate) const FUNC_WLAN: u32 = 2; + pub(crate) const FUNC_BT: u32 = 3; -const REG_BUS_CTRL: u32 = 0x0; -const REG_BUS_INTERRUPT: u32 = 0x04; // 16 bits - Interrupt status -const REG_BUS_INTERRUPT_ENABLE: u32 = 0x06; // 16 bits - Interrupt mask -const REG_BUS_STATUS: u32 = 0x8; -const REG_BUS_TEST_RO: u32 = 0x14; -const REG_BUS_TEST_RW: u32 = 0x18; -const REG_BUS_RESP_DELAY: u32 = 0x1c; -const WORD_LENGTH_32: u32 = 0x1; -const HIGH_SPEED: u32 = 0x10; + pub(crate) const REG_BUS_CTRL: u32 = 0x0; + pub(crate) const REG_BUS_INTERRUPT: u32 = 0x04; // 16 bits - Interrupt status + pub(crate) const REG_BUS_INTERRUPT_ENABLE: u32 = 0x06; // 16 bits - Interrupt mask + pub(crate) const REG_BUS_STATUS: u32 = 0x8; + pub(crate) const REG_BUS_TEST_RO: u32 = 0x14; + pub(crate) const REG_BUS_TEST_RW: u32 = 0x18; + pub(crate) const REG_BUS_RESP_DELAY: u32 = 0x1c; + pub(crate) const WORD_LENGTH_32: u32 = 0x1; + pub(crate) const HIGH_SPEED: u32 = 0x10; -// SPI_STATUS_REGISTER bits -const STATUS_DATA_NOT_AVAILABLE: u32 = 0x00000001; -const STATUS_UNDERFLOW: u32 = 0x00000002; -const STATUS_OVERFLOW: u32 = 0x00000004; -const STATUS_F2_INTR: u32 = 0x00000008; -const STATUS_F3_INTR: u32 = 0x00000010; -const STATUS_F2_RX_READY: u32 = 0x00000020; -const STATUS_F3_RX_READY: u32 = 0x00000040; -const STATUS_HOST_CMD_DATA_ERR: u32 = 0x00000080; -const STATUS_F2_PKT_AVAILABLE: u32 = 0x00000100; -const STATUS_F2_PKT_LEN_MASK: u32 = 0x000FFE00; -const STATUS_F2_PKT_LEN_SHIFT: u32 = 9; -const STATUS_F3_PKT_AVAILABLE: u32 = 0x00100000; -const STATUS_F3_PKT_LEN_MASK: u32 = 0xFFE00000; -const STATUS_F3_PKT_LEN_SHIFT: u32 = 21; + // SPI_STATUS_REGISTER bits + pub(crate) const STATUS_DATA_NOT_AVAILABLE: u32 = 0x00000001; + pub(crate) const STATUS_UNDERFLOW: u32 = 0x00000002; + pub(crate) const STATUS_OVERFLOW: u32 = 0x00000004; + pub(crate) const STATUS_F2_INTR: u32 = 0x00000008; + pub(crate) const STATUS_F3_INTR: u32 = 0x00000010; + pub(crate) const STATUS_F2_RX_READY: u32 = 0x00000020; + pub(crate) const STATUS_F3_RX_READY: u32 = 0x00000040; + pub(crate) const STATUS_HOST_CMD_DATA_ERR: u32 = 0x00000080; + pub(crate) const STATUS_F2_PKT_AVAILABLE: u32 = 0x00000100; + pub(crate) const STATUS_F2_PKT_LEN_MASK: u32 = 0x000FFE00; + pub(crate) const STATUS_F2_PKT_LEN_SHIFT: u32 = 9; + pub(crate) const STATUS_F3_PKT_AVAILABLE: u32 = 0x00100000; + pub(crate) const STATUS_F3_PKT_LEN_MASK: u32 = 0xFFE00000; + pub(crate) const STATUS_F3_PKT_LEN_SHIFT: u32 = 21; -const REG_BACKPLANE_GPIO_SELECT: u32 = 0x10005; -const REG_BACKPLANE_GPIO_OUTPUT: u32 = 0x10006; -const REG_BACKPLANE_GPIO_ENABLE: u32 = 0x10007; -const REG_BACKPLANE_FUNCTION2_WATERMARK: u32 = 0x10008; -const REG_BACKPLANE_DEVICE_CONTROL: u32 = 0x10009; -const REG_BACKPLANE_BACKPLANE_ADDRESS_LOW: u32 = 0x1000A; -const REG_BACKPLANE_BACKPLANE_ADDRESS_MID: u32 = 0x1000B; -const REG_BACKPLANE_BACKPLANE_ADDRESS_HIGH: u32 = 0x1000C; -const REG_BACKPLANE_FRAME_CONTROL: u32 = 0x1000D; -const REG_BACKPLANE_CHIP_CLOCK_CSR: u32 = 0x1000E; -const REG_BACKPLANE_PULL_UP: u32 = 0x1000F; -const REG_BACKPLANE_READ_FRAME_BC_LOW: u32 = 0x1001B; -const REG_BACKPLANE_READ_FRAME_BC_HIGH: u32 = 0x1001C; -const REG_BACKPLANE_WAKEUP_CTRL: u32 = 0x1001E; -const REG_BACKPLANE_SLEEP_CSR: u32 = 0x1001F; + pub(crate) const REG_BACKPLANE_GPIO_SELECT: u32 = 0x10005; + pub(crate) const REG_BACKPLANE_GPIO_OUTPUT: u32 = 0x10006; + pub(crate) const REG_BACKPLANE_GPIO_ENABLE: u32 = 0x10007; + pub(crate) const REG_BACKPLANE_FUNCTION2_WATERMARK: u32 = 0x10008; + pub(crate) const REG_BACKPLANE_DEVICE_CONTROL: u32 = 0x10009; + pub(crate) const REG_BACKPLANE_BACKPLANE_ADDRESS_LOW: u32 = 0x1000A; + pub(crate) const REG_BACKPLANE_BACKPLANE_ADDRESS_MID: u32 = 0x1000B; + pub(crate) const REG_BACKPLANE_BACKPLANE_ADDRESS_HIGH: u32 = 0x1000C; + pub(crate) const REG_BACKPLANE_FRAME_CONTROL: u32 = 0x1000D; + pub(crate) const REG_BACKPLANE_CHIP_CLOCK_CSR: u32 = 0x1000E; + pub(crate) const REG_BACKPLANE_PULL_UP: u32 = 0x1000F; + pub(crate) const REG_BACKPLANE_READ_FRAME_BC_LOW: u32 = 0x1001B; + pub(crate) const REG_BACKPLANE_READ_FRAME_BC_HIGH: u32 = 0x1001C; + pub(crate) const REG_BACKPLANE_WAKEUP_CTRL: u32 = 0x1001E; + pub(crate) const REG_BACKPLANE_SLEEP_CSR: u32 = 0x1001F; -const BACKPLANE_WINDOW_SIZE: usize = 0x8000; -const BACKPLANE_ADDRESS_MASK: u32 = 0x7FFF; -const BACKPLANE_ADDRESS_32BIT_FLAG: u32 = 0x08000; -const BACKPLANE_MAX_TRANSFER_SIZE: usize = 64; -// Active Low Power (ALP) clock constants -const BACKPLANE_ALP_AVAIL_REQ: u8 = 0x08; -const BACKPLANE_ALP_AVAIL: u8 = 0x40; + pub(crate) const BACKPLANE_WINDOW_SIZE: usize = 0x8000; + pub(crate) const BACKPLANE_ADDRESS_MASK: u32 = 0x7FFF; + pub(crate) const BACKPLANE_ADDRESS_32BIT_FLAG: u32 = 0x08000; + pub(crate) const BACKPLANE_MAX_TRANSFER_SIZE: usize = 64; + // Active Low Power (ALP) clock constants + pub(crate) const BACKPLANE_ALP_AVAIL_REQ: u8 = 0x08; + pub(crate) const BACKPLANE_ALP_AVAIL: u8 = 0x40; -// Broadcom AMBA (Advanced Microcontroller Bus Architecture) Interconnect (AI) -// constants -const AI_IOCTRL_OFFSET: u32 = 0x408; -const AI_IOCTRL_BIT_FGC: u8 = 0x0002; -const AI_IOCTRL_BIT_CLOCK_EN: u8 = 0x0001; -const AI_IOCTRL_BIT_CPUHALT: u8 = 0x0020; + // Broadcom AMBA (Advanced Microcontroller Bus Architecture) Interconnect + // (AI) pub (crate) constants + pub(crate) const AI_IOCTRL_OFFSET: u32 = 0x408; + pub(crate) const AI_IOCTRL_BIT_FGC: u8 = 0x0002; + pub(crate) const AI_IOCTRL_BIT_CLOCK_EN: u8 = 0x0001; + pub(crate) const AI_IOCTRL_BIT_CPUHALT: u8 = 0x0020; -const AI_RESETCTRL_OFFSET: u32 = 0x800; -const AI_RESETCTRL_BIT_RESET: u8 = 1; + pub(crate) const AI_RESETCTRL_OFFSET: u32 = 0x800; + pub(crate) const AI_RESETCTRL_BIT_RESET: u8 = 1; -const AI_RESETSTATUS_OFFSET: u32 = 0x804; + pub(crate) const AI_RESETSTATUS_OFFSET: u32 = 0x804; -const TEST_PATTERN: u32 = 0x12345678; -const FEEDBEAD: u32 = 0xFEEDBEAD; + pub(crate) const TEST_PATTERN: u32 = 0x12345678; + pub(crate) const FEEDBEAD: u32 = 0xFEEDBEAD; -// SPI_INTERRUPT_REGISTER and SPI_INTERRUPT_ENABLE_REGISTER Bits -const IRQ_DATA_UNAVAILABLE: u16 = 0x0001; // Requested data not available; Clear by writing a "1" -const IRQ_F2_F3_FIFO_RD_UNDERFLOW: u16 = 0x0002; -const IRQ_F2_F3_FIFO_WR_OVERFLOW: u16 = 0x0004; -const IRQ_COMMAND_ERROR: u16 = 0x0008; // Cleared by writing 1 -const IRQ_DATA_ERROR: u16 = 0x0010; // Cleared by writing 1 -const IRQ_F2_PACKET_AVAILABLE: u16 = 0x0020; -const IRQ_F3_PACKET_AVAILABLE: u16 = 0x0040; -const IRQ_F1_OVERFLOW: u16 = 0x0080; // Due to last write. Bkplane has pending write requests -const IRQ_MISC_INTR0: u16 = 0x0100; -const IRQ_MISC_INTR1: u16 = 0x0200; -const IRQ_MISC_INTR2: u16 = 0x0400; -const IRQ_MISC_INTR3: u16 = 0x0800; -const IRQ_MISC_INTR4: u16 = 0x1000; -const IRQ_F1_INTR: u16 = 0x2000; -const IRQ_F2_INTR: u16 = 0x4000; -const IRQ_F3_INTR: u16 = 0x8000; + // SPI_INTERRUPT_REGISTER and SPI_INTERRUPT_ENABLE_REGISTER Bits + pub(crate) const IRQ_DATA_UNAVAILABLE: u16 = 0x0001; // Requested data not available; Clear by writing a "1" + pub(crate) const IRQ_F2_F3_FIFO_RD_UNDERFLOW: u16 = 0x0002; + pub(crate) const IRQ_F2_F3_FIFO_WR_OVERFLOW: u16 = 0x0004; + pub(crate) const IRQ_COMMAND_ERROR: u16 = 0x0008; // Cleared by writing 1 + pub(crate) const IRQ_DATA_ERROR: u16 = 0x0010; // Cleared by writing 1 + pub(crate) const IRQ_F2_PACKET_AVAILABLE: u16 = 0x0020; + pub(crate) const IRQ_F3_PACKET_AVAILABLE: u16 = 0x0040; + pub(crate) const IRQ_F1_OVERFLOW: u16 = 0x0080; // Due to last write. Bkplane has pending write requests + pub(crate) const IRQ_MISC_INTR0: u16 = 0x0100; + pub(crate) const IRQ_MISC_INTR1: u16 = 0x0200; + pub(crate) const IRQ_MISC_INTR2: u16 = 0x0400; + pub(crate) const IRQ_MISC_INTR3: u16 = 0x0800; + pub(crate) const IRQ_MISC_INTR4: u16 = 0x1000; + pub(crate) const IRQ_F1_INTR: u16 = 0x2000; + pub(crate) const IRQ_F2_INTR: u16 = 0x4000; + pub(crate) const IRQ_F3_INTR: u16 = 0x8000; -const IOCTL_CMD_UP: u32 = 2; -const IOCTL_CMD_SET_SSID: u32 = 26; -const IOCTL_CMD_ANTDIV: u32 = 64; -const IOCTL_CMD_SET_VAR: u32 = 263; -const IOCTL_CMD_GET_VAR: u32 = 262; -const IOCTL_CMD_SET_PASSPHRASE: u32 = 268; + pub(crate) const IOCTL_CMD_UP: u32 = 2; + pub(crate) const IOCTL_CMD_SET_SSID: u32 = 26; + pub(crate) const IOCTL_CMD_ANTDIV: u32 = 64; + pub(crate) const IOCTL_CMD_SET_VAR: u32 = 263; + pub(crate) const IOCTL_CMD_GET_VAR: u32 = 262; + pub(crate) const IOCTL_CMD_SET_PASSPHRASE: u32 = 268; -const CHANNEL_TYPE_CONTROL: u8 = 0; -const CHANNEL_TYPE_EVENT: u8 = 1; -const CHANNEL_TYPE_DATA: u8 = 2; + pub(crate) const CHANNEL_TYPE_CONTROL: u8 = 0; + pub(crate) const CHANNEL_TYPE_EVENT: u8 = 1; + pub(crate) const CHANNEL_TYPE_DATA: u8 = 2; + + // CYW_SPID command structure constants. + pub(crate) const WRITE: bool = true; + pub(crate) const READ: bool = false; + pub(crate) const INC_ADDR: bool = true; + pub(crate) const FIXED_ADDR: bool = false; +} +use crate::constants::*; #[derive(Clone, Copy)] pub enum IoctlType { @@ -153,6 +156,7 @@ pub enum IoctlType { Set = 2, } +#[allow(unused)] #[derive(Clone, Copy, PartialEq, Eq)] enum Core { WLAN = 0, @@ -170,6 +174,7 @@ impl Core { } } +#[allow(unused)] struct Chip { arm_core_base_address: u32, socsram_base_address: u32, @@ -1077,6 +1082,7 @@ where true } + #[allow(unused)] async fn bp_read(&mut self, mut addr: u32, mut data: &mut [u32]) { // It seems the HW force-aligns the addr // to 2 if data.len() >= 2 @@ -1170,10 +1176,12 @@ where self.backplane_readn(addr, 2).await as u16 } + #[allow(unused)] async fn bp_write16(&mut self, addr: u32, val: u16) { self.backplane_writen(addr, val as u32, 2).await } + #[allow(unused)] async fn bp_read32(&mut self, addr: u32) -> u32 { self.backplane_readn(addr, 4).await } @@ -1244,6 +1252,7 @@ where self.readn(func, addr, 2).await as u16 } + #[allow(unused)] async fn write16(&mut self, func: u32, addr: u32, val: u16) { self.writen(func, addr, val as u32, 2).await } @@ -1252,6 +1261,7 @@ where self.readn(func, addr, 4).await } + #[allow(unused)] async fn write32(&mut self, func: u32, addr: u32, val: u32) { self.writen(func, addr, val, 4).await } diff --git a/src/structs.rs b/src/structs.rs index 35547097..ed5fc18d 100644 --- a/src/structs.rs +++ b/src/structs.rs @@ -5,10 +5,12 @@ macro_rules! impl_bytes { impl $t { pub const SIZE: usize = core::mem::size_of::(); + #[allow(unused)] pub fn to_bytes(&self) -> [u8; Self::SIZE] { unsafe { core::mem::transmute(*self) } } + #[allow(unused)] pub fn from_bytes(bytes: &[u8; Self::SIZE]) -> Self { unsafe { core::mem::transmute(*bytes) } } @@ -167,6 +169,7 @@ pub struct DownloadHeader { } impl_bytes!(DownloadHeader); +#[allow(unused)] pub const DOWNLOAD_FLAG_NO_CRC: u16 = 0x0001; pub const DOWNLOAD_FLAG_BEGIN: u16 = 0x0002; pub const DOWNLOAD_FLAG_END: u16 = 0x0004; From 3b04ef265c0f47b160ca8e89ef0b8fefc4b7e6ec Mon Sep 17 00:00:00 2001 From: Daniel Bevenius Date: Mon, 26 Sep 2022 14:53:37 +0200 Subject: [PATCH 045/130] Add constants for BDC_VERSION This commit adds two constants intended to be used with the bdc_header.flags field. I believe these are the correct values after looking at following lines in `whd_cdc_bdc.c`: https://github.com/Infineon/wifi-host-driver/blob/40a7ec2273a950fbf89353d3eac98c5c1c2fd8cd/WiFi_Host_Driver/src/whd_cdc_bdc.c#L34-L35 https://github.com/Infineon/wifi-host-driver/blob/40a7ec2273a950fbf89353d3eac98c5c1c2fd8cd/WiFi_Host_Driver/src/whd_cdc_bdc.c#L447 --- src/lib.rs | 2 +- src/structs.rs | 3 +++ 2 files changed, 4 insertions(+), 1 deletion(-) diff --git a/src/lib.rs b/src/lib.rs index b8ce2e2a..d446313c 100644 --- a/src/lib.rs +++ b/src/lib.rs @@ -800,7 +800,7 @@ where }; let bcd_header = BcdHeader { - flags: 0x20, + flags: BDC_VERSION << BDC_VERSION_SHIFT, priority: 0, flags2: 0, data_offset: 0, diff --git a/src/structs.rs b/src/structs.rs index ed5fc18d..6d4525a4 100644 --- a/src/structs.rs +++ b/src/structs.rs @@ -53,6 +53,9 @@ pub struct CdcHeader { } impl_bytes!(CdcHeader); +pub const BDC_VERSION: u8 = 2; +pub const BDC_VERSION_SHIFT: u8 = 4; + #[derive(Clone, Copy)] #[cfg_attr(feature = "defmt", derive(defmt::Format))] #[repr(C)] From c385bbf07dfcadb832d02e91385bcecc45c0ef58 Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Sun, 2 Oct 2022 21:28:34 +0200 Subject: [PATCH 046/130] Update embassy, embedded-hal. --- Cargo.toml | 4 ++-- examples/rpi-pico-w/Cargo.toml | 20 ++++++++++---------- examples/rpi-pico-w/src/main.rs | 10 +++++----- rust-toolchain.toml | 2 +- src/lib.rs | 2 +- 5 files changed, 19 insertions(+), 19 deletions(-) diff --git a/Cargo.toml b/Cargo.toml index cb6aa0b2..30c0da07 100644 --- a/Cargo.toml +++ b/Cargo.toml @@ -21,6 +21,6 @@ cortex-m = "0.7.3" cortex-m-rt = "0.7.0" futures = { version = "0.3.17", default-features = false, features = ["async-await", "cfg-target-has-atomic", "unstable"] } -embedded-hal-1 = { package = "embedded-hal", version = "1.0.0-alpha.8" } -embedded-hal-async = { version = "0.1.0-alpha.1" } +embedded-hal-1 = { package = "embedded-hal", version = "1.0.0-alpha.9" } +embedded-hal-async = { version = "0.1.0-alpha.2" } num_enum = { version = "0.5.7", default-features = false } diff --git a/examples/rpi-pico-w/Cargo.toml b/examples/rpi-pico-w/Cargo.toml index 53e72498..e82d12eb 100644 --- a/examples/rpi-pico-w/Cargo.toml +++ b/examples/rpi-pico-w/Cargo.toml @@ -8,8 +8,8 @@ edition = "2021" cyw43 = { path = "../../", features = ["defmt"]} embassy-executor = { version = "0.1.0", features = ["defmt", "integrated-timers"] } embassy-time = { version = "0.1.0", features = ["defmt", "defmt-timestamp-uptime"] } -embassy-rp = { version = "0.1.0", features = ["defmt", "unstable-traits", "nightly", "unstable-pac"] } -embassy-net = { version = "0.1.0", features = ["defmt", "tcp", "dhcpv4", "medium-ethernet", "pool-16"] } +embassy-rp = { version = "0.1.0", features = ["defmt", "unstable-traits", "nightly", "unstable-pac", "time-driver"] } +embassy-net = { version = "0.1.0", features = ["defmt", "tcp", "dhcpv4", "medium-ethernet", "pool-16", "unstable-traits", "nightly"] } atomic-polyfill = "0.1.5" static_cell = "1.0" @@ -21,19 +21,19 @@ cortex-m = { version = "0.7.6", features = ["critical-section-single-core"]} cortex-m-rt = "0.7.0" futures = { version = "0.3.17", default-features = false, features = ["async-await", "cfg-target-has-atomic", "unstable"] } -embedded-hal-1 = { package = "embedded-hal", version = "1.0.0-alpha.8" } -embedded-hal-async = { version = "0.1.0-alpha.1" } +embedded-hal-1 = { package = "embedded-hal", version = "1.0.0-alpha.9" } +embedded-hal-async = { version = "0.1.0-alpha.2" } embedded-io = { version = "0.3.0", features = ["async", "defmt"] } heapless = "0.7.15" [patch.crates-io] -embassy-executor = { git = "https://github.com/embassy-rs/embassy", rev = "cb9f0ef5b800ce4a22cde1805e0eb88425f1e07b" } -embassy-time = { git = "https://github.com/embassy-rs/embassy", rev = "cb9f0ef5b800ce4a22cde1805e0eb88425f1e07b" } -embassy-futures = { git = "https://github.com/embassy-rs/embassy", rev = "cb9f0ef5b800ce4a22cde1805e0eb88425f1e07b" } -embassy-sync = { git = "https://github.com/embassy-rs/embassy", rev = "cb9f0ef5b800ce4a22cde1805e0eb88425f1e07b" } -embassy-rp = { git = "https://github.com/embassy-rs/embassy", rev = "cb9f0ef5b800ce4a22cde1805e0eb88425f1e07b" } -embassy-net = { git = "https://github.com/embassy-rs/embassy", rev = "cb9f0ef5b800ce4a22cde1805e0eb88425f1e07b" } +embassy-executor = { git = "https://github.com/embassy-rs/embassy", rev = "73208d524843ca451b4cbfdb06e35f1b85290f4c" } +embassy-time = { git = "https://github.com/embassy-rs/embassy", rev = "73208d524843ca451b4cbfdb06e35f1b85290f4c" } +embassy-futures = { git = "https://github.com/embassy-rs/embassy", rev = "73208d524843ca451b4cbfdb06e35f1b85290f4c" } +embassy-sync = { git = "https://github.com/embassy-rs/embassy", rev = "73208d524843ca451b4cbfdb06e35f1b85290f4c" } +embassy-rp = { git = "https://github.com/embassy-rs/embassy", rev = "73208d524843ca451b4cbfdb06e35f1b85290f4c" } +embassy-net = { git = "https://github.com/embassy-rs/embassy", rev = "73208d524843ca451b4cbfdb06e35f1b85290f4c" } [profile.dev] debug = 2 diff --git a/examples/rpi-pico-w/src/main.rs b/examples/rpi-pico-w/src/main.rs index 986474ce..0915ef6b 100644 --- a/examples/rpi-pico-w/src/main.rs +++ b/examples/rpi-pico-w/src/main.rs @@ -1,6 +1,6 @@ #![no_std] #![no_main] -#![feature(generic_associated_types, type_alias_impl_trait)] +#![feature(type_alias_impl_trait)] use core::convert::Infallible; use core::future::Future; @@ -44,15 +44,15 @@ async fn main(spawner: Spawner) { let p = embassy_rp::init(Default::default()); // Include the WiFi firmware and Country Locale Matrix (CLM) blobs. - let fw = include_bytes!("../../../firmware/43439A0.bin"); - let clm = include_bytes!("../../../firmware/43439A0_clm.bin"); + //let fw = include_bytes!("../../../firmware/43439A0.bin"); + //let clm = include_bytes!("../../../firmware/43439A0_clm.bin"); // To make flashing faster for development, you may want to flash the firmwares independently // at hardcoded addresses, instead of baking them into the program with `include_bytes!`: // probe-rs-cli download 43439A0.bin --format bin --chip RP2040 --base-address 0x10100000 // probe-rs-cli download 43439A0.clm_blob --format bin --chip RP2040 --base-address 0x10140000 - //let fw = unsafe { core::slice::from_raw_parts(0x10100000 as *const u8, 224190) }; - //let clm = unsafe { core::slice::from_raw_parts(0x10140000 as *const u8, 4752) }; + let fw = unsafe { core::slice::from_raw_parts(0x10100000 as *const u8, 224190) }; + let clm = unsafe { core::slice::from_raw_parts(0x10140000 as *const u8, 4752) }; let pwr = Output::new(p.PIN_23, Level::Low); let cs = Output::new(p.PIN_25, Level::High); diff --git a/rust-toolchain.toml b/rust-toolchain.toml index 0fa7cf7b..a35a11b8 100644 --- a/rust-toolchain.toml +++ b/rust-toolchain.toml @@ -1,7 +1,7 @@ # Before upgrading check that everything is available on all tier1 targets here: # https://rust-lang.github.io/rustup-components-history [toolchain] -channel = "nightly-2022-07-13" +channel = "nightly-2022-09-22" components = [ "rust-src", "rustfmt" ] targets = [ "thumbv6m-none-eabi", diff --git a/src/lib.rs b/src/lib.rs index d446313c..2a3d4dee 100644 --- a/src/lib.rs +++ b/src/lib.rs @@ -22,7 +22,7 @@ use embassy_net::{PacketBoxExt, PacketBuf}; use embassy_sync::blocking_mutex::raw::NoopRawMutex; use embassy_sync::channel::Channel; use embassy_time::{block_for, Duration, Timer}; -use embedded_hal_1::digital::blocking::OutputPin; +use embedded_hal_1::digital::OutputPin; use embedded_hal_async::spi::{SpiBusRead, SpiBusWrite, SpiDevice}; use self::structs::*; From 0d84533bcb25a0d6cbe6aee5418e1ebf2cbbc26a Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Tue, 20 Sep 2022 22:01:24 +0200 Subject: [PATCH 047/130] Use async spi transaction helper macro. --- src/lib.rs | 176 +++++++++++++++++++++-------------------------------- 1 file changed, 70 insertions(+), 106 deletions(-) diff --git a/src/lib.rs b/src/lib.rs index 2a3d4dee..ba8acd34 100644 --- a/src/lib.rs +++ b/src/lib.rs @@ -23,7 +23,7 @@ use embassy_sync::blocking_mutex::raw::NoopRawMutex; use embassy_sync::channel::Channel; use embassy_time::{block_for, Duration, Timer}; use embedded_hal_1::digital::OutputPin; -use embedded_hal_async::spi::{SpiBusRead, SpiBusWrite, SpiDevice}; +use embedded_hal_async::spi::{transaction, SpiBusRead, SpiBusWrite, SpiDevice}; use self::structs::*; use crate::events::Event; @@ -753,17 +753,13 @@ where let cmd = cmd_word(READ, INC_ADDR, FUNC_WLAN, 0, len); - self.spi - .transaction(|bus| { - let bus = unsafe { &mut *bus }; - async { - bus.write(&[cmd]).await?; - bus.read(&mut buf[..(len as usize + 3) / 4]).await?; - Ok(()) - } - }) - .await - .unwrap(); + transaction!(&mut self.spi, |bus| async { + bus.write(&[cmd]).await?; + bus.read(&mut buf[..(len as usize + 3) / 4]).await?; + Ok(()) + }) + .await + .unwrap(); trace!("rx {:02x}", &slice8_mut(&mut buf)[..(len as usize).min(48)]); @@ -817,17 +813,13 @@ where trace!(" {:02x}", &buf8[..total_len.min(48)]); let cmd = cmd_word(WRITE, INC_ADDR, FUNC_WLAN, 0, total_len as _); - self.spi - .transaction(|bus| { - let bus = unsafe { &mut *bus }; - async { - bus.write(&[cmd]).await?; - bus.write(&buf[..(total_len / 4)]).await?; - Ok(()) - } - }) - .await - .unwrap(); + transaction!(&mut self.spi, |bus| async { + bus.write(&[cmd]).await?; + bus.write(&buf[..(total_len / 4)]).await?; + Ok(()) + }) + .await + .unwrap(); } fn rx(&mut self, packet: &[u8]) { @@ -1012,17 +1004,13 @@ where let cmd = cmd_word(WRITE, INC_ADDR, FUNC_WLAN, 0, total_len as _); - self.spi - .transaction(|bus| { - let bus = unsafe { &mut *bus }; - async { - bus.write(&[cmd]).await?; - bus.write(&buf[..total_len / 4]).await?; - Ok(()) - } - }) - .await - .unwrap(); + transaction!(&mut self.spi, |bus| async { + bus.write(&[cmd]).await?; + bus.write(&buf[..total_len / 4]).await?; + Ok(()) + }) + .await + .unwrap(); } async fn core_disable(&mut self, core: Core) { @@ -1101,23 +1089,19 @@ where let cmd = cmd_word(READ, INC_ADDR, FUNC_BACKPLANE, window_offs, len as u32); - self.spi - .transaction(|bus| { - let bus = unsafe { &mut *bus }; - async { - bus.write(&[cmd]).await?; + transaction!(&mut self.spi, |bus| async { + bus.write(&[cmd]).await?; - // 4-byte response delay. - let mut junk = [0; 1]; - bus.read(&mut junk).await?; + // 4-byte response delay. + let mut junk = [0; 1]; + bus.read(&mut junk).await?; - // Read data - bus.read(&mut data[..len / 4]).await?; - Ok(()) - } - }) - .await - .unwrap(); + // Read data + bus.read(&mut data[..len / 4]).await?; + Ok(()) + }) + .await + .unwrap(); // Advance ptr. addr += len as u32; @@ -1146,17 +1130,13 @@ where let cmd = cmd_word(WRITE, INC_ADDR, FUNC_BACKPLANE, window_offs, len as u32); - self.spi - .transaction(|bus| { - let bus = unsafe { &mut *bus }; - async { - bus.write(&[cmd]).await?; - bus.write(&buf[..(len + 3) / 4]).await?; - Ok(()) - } - }) - .await - .unwrap(); + transaction!(&mut self.spi, |bus| async { + bus.write(&[cmd]).await?; + bus.write(&buf[..(len + 3) / 4]).await?; + Ok(()) + }) + .await + .unwrap(); // Advance ptr. addr += len as u32; @@ -1270,21 +1250,17 @@ where let cmd = cmd_word(READ, INC_ADDR, func, addr, len); let mut buf = [0; 1]; - self.spi - .transaction(|bus| { - let bus = unsafe { &mut *bus }; - async { - bus.write(&[cmd]).await?; - if func == FUNC_BACKPLANE { - // 4-byte response delay. - bus.read(&mut buf).await?; - } - bus.read(&mut buf).await?; - Ok(()) - } - }) - .await - .unwrap(); + transaction!(&mut self.spi, |bus| async { + bus.write(&[cmd]).await?; + if func == FUNC_BACKPLANE { + // 4-byte response delay. + bus.read(&mut buf).await?; + } + bus.read(&mut buf).await?; + Ok(()) + }) + .await + .unwrap(); buf[0] } @@ -1292,33 +1268,25 @@ where async fn writen(&mut self, func: u32, addr: u32, val: u32, len: u32) { let cmd = cmd_word(WRITE, INC_ADDR, func, addr, len); - self.spi - .transaction(|bus| { - let bus = unsafe { &mut *bus }; - async { - bus.write(&[cmd, val]).await?; - Ok(()) - } - }) - .await - .unwrap(); + transaction!(&mut self.spi, |bus| async { + bus.write(&[cmd, val]).await?; + Ok(()) + }) + .await + .unwrap(); } async fn read32_swapped(&mut self, addr: u32) -> u32 { let cmd = cmd_word(READ, INC_ADDR, FUNC_BUS, addr, 4); let mut buf = [0; 1]; - self.spi - .transaction(|bus| { - let bus = unsafe { &mut *bus }; - async { - bus.write(&[swap16(cmd)]).await?; - bus.read(&mut buf).await?; - Ok(()) - } - }) - .await - .unwrap(); + transaction!(&mut self.spi, |bus| async { + bus.write(&[swap16(cmd)]).await?; + bus.read(&mut buf).await?; + Ok(()) + }) + .await + .unwrap(); swap16(buf[0]) } @@ -1326,16 +1294,12 @@ where async fn write32_swapped(&mut self, addr: u32, val: u32) { let cmd = cmd_word(WRITE, INC_ADDR, FUNC_BUS, addr, 4); - self.spi - .transaction(|bus| { - let bus = unsafe { &mut *bus }; - async { - bus.write(&[swap16(cmd), swap16(val)]).await?; - Ok(()) - } - }) - .await - .unwrap(); + transaction!(&mut self.spi, |bus| async { + bus.write(&[swap16(cmd), swap16(val)]).await?; + Ok(()) + }) + .await + .unwrap(); } } From 27771e60afa0fe71c5512cee241400502e121b91 Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Mon, 7 Nov 2022 22:44:20 +0100 Subject: [PATCH 048/130] Bake the blob into the firmware by default. --- examples/rpi-pico-w/src/main.rs | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/examples/rpi-pico-w/src/main.rs b/examples/rpi-pico-w/src/main.rs index 0915ef6b..dbc7761c 100644 --- a/examples/rpi-pico-w/src/main.rs +++ b/examples/rpi-pico-w/src/main.rs @@ -44,15 +44,15 @@ async fn main(spawner: Spawner) { let p = embassy_rp::init(Default::default()); // Include the WiFi firmware and Country Locale Matrix (CLM) blobs. - //let fw = include_bytes!("../../../firmware/43439A0.bin"); - //let clm = include_bytes!("../../../firmware/43439A0_clm.bin"); + let fw = include_bytes!("../../../firmware/43439A0.bin"); + let clm = include_bytes!("../../../firmware/43439A0_clm.bin"); // To make flashing faster for development, you may want to flash the firmwares independently // at hardcoded addresses, instead of baking them into the program with `include_bytes!`: // probe-rs-cli download 43439A0.bin --format bin --chip RP2040 --base-address 0x10100000 // probe-rs-cli download 43439A0.clm_blob --format bin --chip RP2040 --base-address 0x10140000 - let fw = unsafe { core::slice::from_raw_parts(0x10100000 as *const u8, 224190) }; - let clm = unsafe { core::slice::from_raw_parts(0x10140000 as *const u8, 4752) }; + //let fw = unsafe { core::slice::from_raw_parts(0x10100000 as *const u8, 224190) }; + //let clm = unsafe { core::slice::from_raw_parts(0x10140000 as *const u8, 4752) }; let pwr = Output::new(p.PIN_23, Level::Low); let cs = Output::new(p.PIN_25, Level::High); From 8a81114baf4ffe12ec54e80e342f098c596177d1 Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Mon, 7 Nov 2022 22:51:58 +0100 Subject: [PATCH 049/130] Update Embassy, nightly, deps. --- Cargo.toml | 2 +- examples/rpi-pico-w/Cargo.toml | 14 +++++++------- examples/rpi-pico-w/src/main.rs | 6 +++--- rust-toolchain.toml | 2 +- 4 files changed, 12 insertions(+), 12 deletions(-) diff --git a/Cargo.toml b/Cargo.toml index 30c0da07..8e1eddc1 100644 --- a/Cargo.toml +++ b/Cargo.toml @@ -22,5 +22,5 @@ cortex-m-rt = "0.7.0" futures = { version = "0.3.17", default-features = false, features = ["async-await", "cfg-target-has-atomic", "unstable"] } embedded-hal-1 = { package = "embedded-hal", version = "1.0.0-alpha.9" } -embedded-hal-async = { version = "0.1.0-alpha.2" } +embedded-hal-async = { version = "0.1.0-alpha.3" } num_enum = { version = "0.5.7", default-features = false } diff --git a/examples/rpi-pico-w/Cargo.toml b/examples/rpi-pico-w/Cargo.toml index e82d12eb..7ba22a69 100644 --- a/examples/rpi-pico-w/Cargo.toml +++ b/examples/rpi-pico-w/Cargo.toml @@ -22,18 +22,18 @@ cortex-m-rt = "0.7.0" futures = { version = "0.3.17", default-features = false, features = ["async-await", "cfg-target-has-atomic", "unstable"] } embedded-hal-1 = { package = "embedded-hal", version = "1.0.0-alpha.9" } -embedded-hal-async = { version = "0.1.0-alpha.2" } +embedded-hal-async = { version = "0.1.0-alpha.3" } embedded-io = { version = "0.3.0", features = ["async", "defmt"] } heapless = "0.7.15" [patch.crates-io] -embassy-executor = { git = "https://github.com/embassy-rs/embassy", rev = "73208d524843ca451b4cbfdb06e35f1b85290f4c" } -embassy-time = { git = "https://github.com/embassy-rs/embassy", rev = "73208d524843ca451b4cbfdb06e35f1b85290f4c" } -embassy-futures = { git = "https://github.com/embassy-rs/embassy", rev = "73208d524843ca451b4cbfdb06e35f1b85290f4c" } -embassy-sync = { git = "https://github.com/embassy-rs/embassy", rev = "73208d524843ca451b4cbfdb06e35f1b85290f4c" } -embassy-rp = { git = "https://github.com/embassy-rs/embassy", rev = "73208d524843ca451b4cbfdb06e35f1b85290f4c" } -embassy-net = { git = "https://github.com/embassy-rs/embassy", rev = "73208d524843ca451b4cbfdb06e35f1b85290f4c" } +embassy-executor = { git = "https://github.com/embassy-rs/embassy", rev = "c53614f057cd7d9ac6e86aebd1fb6c1a1055d8b6" } +embassy-time = { git = "https://github.com/embassy-rs/embassy", rev = "c53614f057cd7d9ac6e86aebd1fb6c1a1055d8b6" } +embassy-futures = { git = "https://github.com/embassy-rs/embassy", rev = "c53614f057cd7d9ac6e86aebd1fb6c1a1055d8b6" } +embassy-sync = { git = "https://github.com/embassy-rs/embassy", rev = "c53614f057cd7d9ac6e86aebd1fb6c1a1055d8b6" } +embassy-rp = { git = "https://github.com/embassy-rs/embassy", rev = "c53614f057cd7d9ac6e86aebd1fb6c1a1055d8b6" } +embassy-net = { git = "https://github.com/embassy-rs/embassy", rev = "c53614f057cd7d9ac6e86aebd1fb6c1a1055d8b6" } [profile.dev] debug = 2 diff --git a/examples/rpi-pico-w/src/main.rs b/examples/rpi-pico-w/src/main.rs index dbc7761c..705c7acc 100644 --- a/examples/rpi-pico-w/src/main.rs +++ b/examples/rpi-pico-w/src/main.rs @@ -13,7 +13,7 @@ use embassy_rp::gpio::{Flex, Level, Output}; use embassy_rp::peripherals::{PIN_23, PIN_24, PIN_25, PIN_29}; use embedded_hal_1::spi::ErrorType; use embedded_hal_async::spi::{ExclusiveDevice, SpiBusFlush, SpiBusRead, SpiBusWrite}; -use embedded_io::asynch::{Read, Write}; +use embedded_io::asynch::Write; use static_cell::StaticCell; use {defmt_rtt as _, panic_probe as _}; @@ -165,7 +165,7 @@ impl SpiBusFlush for MySpi { } impl SpiBusRead for MySpi { - type ReadFuture<'a> = impl Future> + type ReadFuture<'a> = impl Future> + 'a where Self: 'a; @@ -195,7 +195,7 @@ impl SpiBusRead for MySpi { } impl SpiBusWrite for MySpi { - type WriteFuture<'a> = impl Future> + type WriteFuture<'a> = impl Future> + 'a where Self: 'a; diff --git a/rust-toolchain.toml b/rust-toolchain.toml index a35a11b8..3e219b0c 100644 --- a/rust-toolchain.toml +++ b/rust-toolchain.toml @@ -1,7 +1,7 @@ # Before upgrading check that everything is available on all tier1 targets here: # https://rust-lang.github.io/rustup-components-history [toolchain] -channel = "nightly-2022-09-22" +channel = "nightly-2022-10-25" components = [ "rust-src", "rustfmt" ] targets = [ "thumbv6m-none-eabi", From f4c9014fe4d5bb96f583d4b96122bcc536631d18 Mon Sep 17 00:00:00 2001 From: Ulf Lilleengen Date: Thu, 1 Dec 2022 22:09:45 +0100 Subject: [PATCH 050/130] feat: use async fn in trait --- Cargo.toml | 2 +- examples/rpi-pico-w/Cargo.toml | 16 +++--- examples/rpi-pico-w/src/main.rs | 95 ++++++++++++++------------------- rust-toolchain.toml | 2 +- 4 files changed, 50 insertions(+), 65 deletions(-) diff --git a/Cargo.toml b/Cargo.toml index 8e1eddc1..cc19c938 100644 --- a/Cargo.toml +++ b/Cargo.toml @@ -22,5 +22,5 @@ cortex-m-rt = "0.7.0" futures = { version = "0.3.17", default-features = false, features = ["async-await", "cfg-target-has-atomic", "unstable"] } embedded-hal-1 = { package = "embedded-hal", version = "1.0.0-alpha.9" } -embedded-hal-async = { version = "0.1.0-alpha.3" } +embedded-hal-async = { version = "0.2.0-alpha.0" } num_enum = { version = "0.5.7", default-features = false } diff --git a/examples/rpi-pico-w/Cargo.toml b/examples/rpi-pico-w/Cargo.toml index 7ba22a69..bb44667d 100644 --- a/examples/rpi-pico-w/Cargo.toml +++ b/examples/rpi-pico-w/Cargo.toml @@ -22,18 +22,18 @@ cortex-m-rt = "0.7.0" futures = { version = "0.3.17", default-features = false, features = ["async-await", "cfg-target-has-atomic", "unstable"] } embedded-hal-1 = { package = "embedded-hal", version = "1.0.0-alpha.9" } -embedded-hal-async = { version = "0.1.0-alpha.3" } -embedded-io = { version = "0.3.0", features = ["async", "defmt"] } +embedded-hal-async = { version = "0.2.0-alpha.0" } +embedded-io = { version = "0.4.0", features = ["async", "defmt"] } heapless = "0.7.15" [patch.crates-io] -embassy-executor = { git = "https://github.com/embassy-rs/embassy", rev = "c53614f057cd7d9ac6e86aebd1fb6c1a1055d8b6" } -embassy-time = { git = "https://github.com/embassy-rs/embassy", rev = "c53614f057cd7d9ac6e86aebd1fb6c1a1055d8b6" } -embassy-futures = { git = "https://github.com/embassy-rs/embassy", rev = "c53614f057cd7d9ac6e86aebd1fb6c1a1055d8b6" } -embassy-sync = { git = "https://github.com/embassy-rs/embassy", rev = "c53614f057cd7d9ac6e86aebd1fb6c1a1055d8b6" } -embassy-rp = { git = "https://github.com/embassy-rs/embassy", rev = "c53614f057cd7d9ac6e86aebd1fb6c1a1055d8b6" } -embassy-net = { git = "https://github.com/embassy-rs/embassy", rev = "c53614f057cd7d9ac6e86aebd1fb6c1a1055d8b6" } +embassy-executor = { git = "https://github.com/embassy-rs/embassy", rev = "645fb66a5122bdc8180e0e65d076ca103431a426" } +embassy-time = { git = "https://github.com/embassy-rs/embassy", rev = "645fb66a5122bdc8180e0e65d076ca103431a426" } +embassy-futures = { git = "https://github.com/embassy-rs/embassy", rev = "645fb66a5122bdc8180e0e65d076ca103431a426" } +embassy-sync = { git = "https://github.com/embassy-rs/embassy", rev = "645fb66a5122bdc8180e0e65d076ca103431a426" } +embassy-rp = { git = "https://github.com/embassy-rs/embassy", rev = "645fb66a5122bdc8180e0e65d076ca103431a426" } +embassy-net = { git = "https://github.com/embassy-rs/embassy", rev = "645fb66a5122bdc8180e0e65d076ca103431a426" } [profile.dev] debug = 2 diff --git a/examples/rpi-pico-w/src/main.rs b/examples/rpi-pico-w/src/main.rs index 705c7acc..a19f3859 100644 --- a/examples/rpi-pico-w/src/main.rs +++ b/examples/rpi-pico-w/src/main.rs @@ -1,9 +1,10 @@ #![no_std] #![no_main] #![feature(type_alias_impl_trait)] +#![feature(async_fn_in_trait)] +#![allow(incomplete_features)] use core::convert::Infallible; -use core::future::Future; use defmt::*; use embassy_executor::Spawner; @@ -155,74 +156,58 @@ impl ErrorType for MySpi { } impl SpiBusFlush for MySpi { - type FlushFuture<'a> = impl Future> - where - Self: 'a; - - fn flush<'a>(&'a mut self) -> Self::FlushFuture<'a> { - async move { Ok(()) } + async fn flush(&mut self) -> Result<(), Self::Error> { + Ok(()) } } impl SpiBusRead for MySpi { - type ReadFuture<'a> = impl Future> + 'a - where - Self: 'a; + async fn read(&mut self, words: &mut [u32]) -> Result<(), Self::Error> { + self.dio.set_as_input(); + for word in words { + let mut w = 0; + for _ in 0..32 { + w = w << 1; - fn read<'a>(&'a mut self, words: &'a mut [u32]) -> Self::ReadFuture<'a> { - async move { - self.dio.set_as_input(); - for word in words { - let mut w = 0; - for _ in 0..32 { - w = w << 1; - - // rising edge, sample data - if self.dio.is_high() { - w |= 0x01; - } - self.clk.set_high(); - - // falling edge - self.clk.set_low(); + // rising edge, sample data + if self.dio.is_high() { + w |= 0x01; } - *word = w - } + self.clk.set_high(); - Ok(()) + // falling edge + self.clk.set_low(); + } + *word = w } + + Ok(()) } } impl SpiBusWrite for MySpi { - type WriteFuture<'a> = impl Future> + 'a - where - Self: 'a; - - fn write<'a>(&'a mut self, words: &'a [u32]) -> Self::WriteFuture<'a> { - async move { - self.dio.set_as_output(); - for word in words { - let mut word = *word; - for _ in 0..32 { - // falling edge, setup data - self.clk.set_low(); - if word & 0x8000_0000 == 0 { - self.dio.set_low(); - } else { - self.dio.set_high(); - } - - // rising edge - self.clk.set_high(); - - word = word << 1; + async fn write(&mut self, words: &[u32]) -> Result<(), Self::Error> { + self.dio.set_as_output(); + for word in words { + let mut word = *word; + for _ in 0..32 { + // falling edge, setup data + self.clk.set_low(); + if word & 0x8000_0000 == 0 { + self.dio.set_low(); + } else { + self.dio.set_high(); } - } - self.clk.set_low(); - self.dio.set_as_input(); - Ok(()) + // rising edge + self.clk.set_high(); + + word = word << 1; + } } + self.clk.set_low(); + + self.dio.set_as_input(); + Ok(()) } } diff --git a/rust-toolchain.toml b/rust-toolchain.toml index 3e219b0c..ffbcbd6f 100644 --- a/rust-toolchain.toml +++ b/rust-toolchain.toml @@ -1,7 +1,7 @@ # Before upgrading check that everything is available on all tier1 targets here: # https://rust-lang.github.io/rustup-components-history [toolchain] -channel = "nightly-2022-10-25" +channel = "nightly-2022-11-22" components = [ "rust-src", "rustfmt" ] targets = [ "thumbv6m-none-eabi", From 56b50f8b62024ba5bfccfa69381e6d98f8b108b5 Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Sun, 25 Dec 2022 22:02:20 +0100 Subject: [PATCH 051/130] fix bp_read. It was broken since the switch from u8 to u32. --- src/lib.rs | 10 +++++++--- 1 file changed, 7 insertions(+), 3 deletions(-) diff --git a/src/lib.rs b/src/lib.rs index ba8acd34..8e30522b 100644 --- a/src/lib.rs +++ b/src/lib.rs @@ -1071,13 +1071,15 @@ where } #[allow(unused)] - async fn bp_read(&mut self, mut addr: u32, mut data: &mut [u32]) { + async fn bp_read(&mut self, mut addr: u32, mut data: &mut [u8]) { // It seems the HW force-aligns the addr // to 2 if data.len() >= 2 // to 4 if data.len() >= 4 // To simplify, enforce 4-align for now. assert!(addr % 4 == 0); + let mut buf = [0u32; BACKPLANE_MAX_TRANSFER_SIZE / 4]; + while !data.is_empty() { // Ensure transfer doesn't cross a window boundary. let window_offs = addr & BACKPLANE_ADDRESS_MASK; @@ -1097,15 +1099,17 @@ where bus.read(&mut junk).await?; // Read data - bus.read(&mut data[..len / 4]).await?; + bus.read(&mut buf[..(len + 3) / 4]).await?; Ok(()) }) .await .unwrap(); + data[..len].copy_from_slice(&slice8_mut(&mut buf)[..len]); + // Advance ptr. addr += len as u32; - data = &mut data[len / 4..]; + data = &mut data[len..]; } } From 42cc0c6d736f6d296ef2a6a636ddf8733cdcd7c6 Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Sun, 25 Dec 2022 22:02:50 +0100 Subject: [PATCH 052/130] print ioctl error as signed. --- src/lib.rs | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/src/lib.rs b/src/lib.rs index 8e30522b..43082175 100644 --- a/src/lib.rs +++ b/src/lib.rs @@ -858,7 +858,10 @@ where if let IoctlState::Sent { buf } = self.state.ioctl_state.get() { if cdc_header.id == self.ioctl_id { - assert_eq!(cdc_header.status, 0); // todo propagate error instead + if cdc_header.status != 0 { + // TODO: propagate error instead + panic!("IOCTL error {=i32}", cdc_header.status as i32); + } let resp_len = cdc_header.len as usize; info!("IOCTL Response: {:02x}", &payload[CdcHeader::SIZE..][..resp_len]); From 076ada4c0233d2f89c89cda4c01910a86add90ac Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Sun, 25 Dec 2022 22:50:27 +0100 Subject: [PATCH 053/130] Add feature to display console logs from the wifi firmware. --- Cargo.toml | 3 ++ examples/rpi-pico-w/Cargo.toml | 2 +- src/lib.rs | 81 ++++++++++++++++++++++++++++++++++ src/structs.rs | 26 +++++++++++ 4 files changed, 111 insertions(+), 1 deletion(-) diff --git a/Cargo.toml b/Cargo.toml index cc19c938..dadfb5c5 100644 --- a/Cargo.toml +++ b/Cargo.toml @@ -7,6 +7,9 @@ edition = "2021" defmt = ["dep:defmt"] log = ["dep:log"] +# Fetch console logs from the WiFi firmware and forward them to `log` or `defmt`. +firmware-logs = [] + [dependencies] embassy-time = { version = "0.1.0" } embassy-sync = { version = "0.1.0" } diff --git a/examples/rpi-pico-w/Cargo.toml b/examples/rpi-pico-w/Cargo.toml index bb44667d..b817289e 100644 --- a/examples/rpi-pico-w/Cargo.toml +++ b/examples/rpi-pico-w/Cargo.toml @@ -5,7 +5,7 @@ edition = "2021" [dependencies] -cyw43 = { path = "../../", features = ["defmt"]} +cyw43 = { path = "../../", features = ["defmt", "firmware-logs"]} embassy-executor = { version = "0.1.0", features = ["defmt", "integrated-timers"] } embassy-time = { version = "0.1.0", features = ["defmt", "defmt-timestamp-uptime"] } embassy-rp = { version = "0.1.0", features = ["defmt", "unstable-traits", "nightly", "unstable-pac", "time-driver"] } diff --git a/src/lib.rs b/src/lib.rs index 43082175..883e669d 100644 --- a/src/lib.rs +++ b/src/lib.rs @@ -575,6 +575,17 @@ pub struct Runner<'a, PWR, SPI> { backplane_window: u32, sdpcm_seq_max: u8, + + #[cfg(feature = "firmware-logs")] + log: LogState, +} + +#[cfg(feature = "firmware-logs")] +struct LogState { + addr: u32, + last_idx: usize, + buf: [u8; 256], + buf_count: usize, } pub async fn new<'a, PWR, SPI>( @@ -598,6 +609,14 @@ where backplane_window: 0xAAAA_AAAA, sdpcm_seq_max: 1, + + #[cfg(feature = "firmware-logs")] + log: LogState { + addr: 0, + last_idx: 0, + buf: [0; 256], + buf_count: 0, + }, }; runner.init(firmware).await; @@ -715,12 +734,74 @@ where //while self.read8(FUNC_BACKPLANE, REG_BACKPLANE_CHIP_CLOCK_CSR).await & 0x80 == 0 {} //info!("clock ok"); + #[cfg(feature = "firmware-logs")] + self.log_init().await; + info!("init done "); } + #[cfg(feature = "firmware-logs")] + async fn log_init(&mut self) { + // Initialize shared memory for logging. + + let shared_addr = self + .bp_read32(CHIP.atcm_ram_base_address + CHIP.chip_ram_size - 4 - CHIP.socram_srmem_size) + .await; + info!("shared_addr {:08x}", shared_addr); + + let mut shared = [0; SharedMemData::SIZE]; + self.bp_read(shared_addr, &mut shared).await; + let shared = SharedMemData::from_bytes(&shared); + info!("shared: {:08x}", shared); + + self.log.addr = shared.console_addr + 8; + } + + #[cfg(feature = "firmware-logs")] + async fn log_read(&mut self) { + // Read log struct + let mut log = [0; SharedMemLog::SIZE]; + self.bp_read(self.log.addr, &mut log).await; + let log = SharedMemLog::from_bytes(&log); + + let idx = log.idx as usize; + + // If pointer hasn't moved, no need to do anything. + if idx == self.log.last_idx { + return; + } + + // Read entire buf for now. We could read only what we need, but then we + // run into annoying alignment issues in `bp_read`. + let mut buf = [0; 0x400]; + self.bp_read(log.buf, &mut buf).await; + + while self.log.last_idx != idx as usize { + let b = buf[self.log.last_idx]; + if b == b'\r' || b == b'\n' { + if self.log.buf_count != 0 { + let s = unsafe { core::str::from_utf8_unchecked(&self.log.buf[..self.log.buf_count]) }; + debug!("LOGS: {}", s); + self.log.buf_count = 0; + } + } else if self.log.buf_count < self.log.buf.len() { + self.log.buf[self.log.buf_count] = b; + self.log.buf_count += 1; + } + + self.log.last_idx += 1; + if self.log.last_idx == 0x400 { + self.log.last_idx = 0; + } + } + } + pub async fn run(mut self) -> ! { let mut buf = [0; 512]; loop { + #[cfg(feature = "firmware-logs")] + self.log_read().await; + // Send stuff // TODO flow control not yet complete if !self.has_credit() { diff --git a/src/structs.rs b/src/structs.rs index 6d4525a4..41a34066 100644 --- a/src/structs.rs +++ b/src/structs.rs @@ -18,6 +18,32 @@ macro_rules! impl_bytes { }; } +#[derive(Clone, Copy)] +#[cfg_attr(feature = "defmt", derive(defmt::Format))] +#[repr(C)] +pub struct SharedMemData { + pub flags: u32, + pub trap_addr: u32, + pub assert_exp_addr: u32, + pub assert_file_addr: u32, + pub assert_line: u32, + pub console_addr: u32, + pub msgtrace_addr: u32, + pub fwid: u32, +} +impl_bytes!(SharedMemData); + +#[derive(Clone, Copy)] +#[cfg_attr(feature = "defmt", derive(defmt::Format))] +#[repr(C)] +pub struct SharedMemLog { + pub buf: u32, + pub buf_size: u32, + pub idx: u32, + pub out_idx: u32, +} +impl_bytes!(SharedMemLog); + #[derive(Clone, Copy)] #[cfg_attr(feature = "defmt", derive(defmt::Format))] #[repr(C)] From 1b6799d93f0bbd6154c124d51aa47aeed0acf15d Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Mon, 26 Dec 2022 23:21:58 +0100 Subject: [PATCH 054/130] split bus, consts into separate mods. --- src/bus.rs | 321 ++++++++++++++++++++++++++++++ src/consts.rs | 105 ++++++++++ src/lib.rs | 536 +++++++------------------------------------------- 3 files changed, 496 insertions(+), 466 deletions(-) create mode 100644 src/bus.rs create mode 100644 src/consts.rs diff --git a/src/bus.rs b/src/bus.rs new file mode 100644 index 00000000..f220cffc --- /dev/null +++ b/src/bus.rs @@ -0,0 +1,321 @@ +use core::slice; + +use embassy_time::{Duration, Timer}; +use embedded_hal_1::digital::OutputPin; +use embedded_hal_async::spi::{transaction, SpiBusRead, SpiBusWrite, SpiDevice}; + +use crate::consts::*; + +pub(crate) struct Bus { + backplane_window: u32, + pwr: PWR, + spi: SPI, +} + +impl Bus +where + PWR: OutputPin, + SPI: SpiDevice, + SPI::Bus: SpiBusRead + SpiBusWrite, +{ + pub(crate) fn new(pwr: PWR, spi: SPI) -> Self { + Self { + backplane_window: 0xAAAA_AAAA, + pwr, + spi, + } + } + + pub async fn init(&mut self) { + // Reset + self.pwr.set_low().unwrap(); + Timer::after(Duration::from_millis(20)).await; + self.pwr.set_high().unwrap(); + Timer::after(Duration::from_millis(250)).await; + + while self.read32_swapped(REG_BUS_TEST_RO).await != FEEDBEAD {} + + self.write32_swapped(REG_BUS_TEST_RW, TEST_PATTERN).await; + let val = self.read32_swapped(REG_BUS_TEST_RW).await; + assert_eq!(val, TEST_PATTERN); + + // 32-bit word length, little endian (which is the default endianess). + self.write32_swapped(REG_BUS_CTRL, WORD_LENGTH_32 | HIGH_SPEED).await; + + let val = self.read32(FUNC_BUS, REG_BUS_TEST_RO).await; + assert_eq!(val, FEEDBEAD); + let val = self.read32(FUNC_BUS, REG_BUS_TEST_RW).await; + assert_eq!(val, TEST_PATTERN); + } + + pub async fn wlan_read(&mut self, buf: &mut [u32]) { + let cmd = cmd_word(READ, INC_ADDR, FUNC_WLAN, 0, buf.len() as u32 * 4); + transaction!(&mut self.spi, |bus| async { + bus.write(&[cmd]).await?; + bus.read(buf).await?; + Ok(()) + }) + .await + .unwrap(); + } + + pub async fn wlan_write(&mut self, buf: &[u32]) { + let cmd = cmd_word(WRITE, INC_ADDR, FUNC_WLAN, 0, buf.len() as u32 * 4); + transaction!(&mut self.spi, |bus| async { + bus.write(&[cmd]).await?; + bus.write(buf).await?; + Ok(()) + }) + .await + .unwrap(); + } + + #[allow(unused)] + pub async fn bp_read(&mut self, mut addr: u32, mut data: &mut [u8]) { + // It seems the HW force-aligns the addr + // to 2 if data.len() >= 2 + // to 4 if data.len() >= 4 + // To simplify, enforce 4-align for now. + assert!(addr % 4 == 0); + + let mut buf = [0u32; BACKPLANE_MAX_TRANSFER_SIZE / 4]; + + while !data.is_empty() { + // Ensure transfer doesn't cross a window boundary. + let window_offs = addr & BACKPLANE_ADDRESS_MASK; + let window_remaining = BACKPLANE_WINDOW_SIZE - window_offs as usize; + + let len = data.len().min(BACKPLANE_MAX_TRANSFER_SIZE).min(window_remaining); + + self.backplane_set_window(addr).await; + + let cmd = cmd_word(READ, INC_ADDR, FUNC_BACKPLANE, window_offs, len as u32); + + transaction!(&mut self.spi, |bus| async { + bus.write(&[cmd]).await?; + + // 4-byte response delay. + let mut junk = [0; 1]; + bus.read(&mut junk).await?; + + // Read data + bus.read(&mut buf[..(len + 3) / 4]).await?; + Ok(()) + }) + .await + .unwrap(); + + data[..len].copy_from_slice(&slice8_mut(&mut buf)[..len]); + + // Advance ptr. + addr += len as u32; + data = &mut data[len..]; + } + } + + pub async fn bp_write(&mut self, mut addr: u32, mut data: &[u8]) { + // It seems the HW force-aligns the addr + // to 2 if data.len() >= 2 + // to 4 if data.len() >= 4 + // To simplify, enforce 4-align for now. + assert!(addr % 4 == 0); + + let mut buf = [0u32; BACKPLANE_MAX_TRANSFER_SIZE / 4]; + + while !data.is_empty() { + // Ensure transfer doesn't cross a window boundary. + let window_offs = addr & BACKPLANE_ADDRESS_MASK; + let window_remaining = BACKPLANE_WINDOW_SIZE - window_offs as usize; + + let len = data.len().min(BACKPLANE_MAX_TRANSFER_SIZE).min(window_remaining); + slice8_mut(&mut buf)[..len].copy_from_slice(&data[..len]); + + self.backplane_set_window(addr).await; + + let cmd = cmd_word(WRITE, INC_ADDR, FUNC_BACKPLANE, window_offs, len as u32); + + transaction!(&mut self.spi, |bus| async { + bus.write(&[cmd]).await?; + bus.write(&buf[..(len + 3) / 4]).await?; + Ok(()) + }) + .await + .unwrap(); + + // Advance ptr. + addr += len as u32; + data = &data[len..]; + } + } + + pub async fn bp_read8(&mut self, addr: u32) -> u8 { + self.backplane_readn(addr, 1).await as u8 + } + + pub async fn bp_write8(&mut self, addr: u32, val: u8) { + self.backplane_writen(addr, val as u32, 1).await + } + + pub async fn bp_read16(&mut self, addr: u32) -> u16 { + self.backplane_readn(addr, 2).await as u16 + } + + #[allow(unused)] + pub async fn bp_write16(&mut self, addr: u32, val: u16) { + self.backplane_writen(addr, val as u32, 2).await + } + + #[allow(unused)] + pub async fn bp_read32(&mut self, addr: u32) -> u32 { + self.backplane_readn(addr, 4).await + } + + pub async fn bp_write32(&mut self, addr: u32, val: u32) { + self.backplane_writen(addr, val, 4).await + } + + async fn backplane_readn(&mut self, addr: u32, len: u32) -> u32 { + self.backplane_set_window(addr).await; + + let mut bus_addr = addr & BACKPLANE_ADDRESS_MASK; + if len == 4 { + bus_addr |= BACKPLANE_ADDRESS_32BIT_FLAG + } + self.readn(FUNC_BACKPLANE, bus_addr, len).await + } + + async fn backplane_writen(&mut self, addr: u32, val: u32, len: u32) { + self.backplane_set_window(addr).await; + + let mut bus_addr = addr & BACKPLANE_ADDRESS_MASK; + if len == 4 { + bus_addr |= BACKPLANE_ADDRESS_32BIT_FLAG + } + self.writen(FUNC_BACKPLANE, bus_addr, val, len).await + } + + async fn backplane_set_window(&mut self, addr: u32) { + let new_window = addr & !BACKPLANE_ADDRESS_MASK; + + if (new_window >> 24) as u8 != (self.backplane_window >> 24) as u8 { + self.write8( + FUNC_BACKPLANE, + REG_BACKPLANE_BACKPLANE_ADDRESS_HIGH, + (new_window >> 24) as u8, + ) + .await; + } + if (new_window >> 16) as u8 != (self.backplane_window >> 16) as u8 { + self.write8( + FUNC_BACKPLANE, + REG_BACKPLANE_BACKPLANE_ADDRESS_MID, + (new_window >> 16) as u8, + ) + .await; + } + if (new_window >> 8) as u8 != (self.backplane_window >> 8) as u8 { + self.write8( + FUNC_BACKPLANE, + REG_BACKPLANE_BACKPLANE_ADDRESS_LOW, + (new_window >> 8) as u8, + ) + .await; + } + self.backplane_window = new_window; + } + + pub async fn read8(&mut self, func: u32, addr: u32) -> u8 { + self.readn(func, addr, 1).await as u8 + } + + pub async fn write8(&mut self, func: u32, addr: u32, val: u8) { + self.writen(func, addr, val as u32, 1).await + } + + pub async fn read16(&mut self, func: u32, addr: u32) -> u16 { + self.readn(func, addr, 2).await as u16 + } + + #[allow(unused)] + pub async fn write16(&mut self, func: u32, addr: u32, val: u16) { + self.writen(func, addr, val as u32, 2).await + } + + pub async fn read32(&mut self, func: u32, addr: u32) -> u32 { + self.readn(func, addr, 4).await + } + + #[allow(unused)] + pub async fn write32(&mut self, func: u32, addr: u32, val: u32) { + self.writen(func, addr, val, 4).await + } + + async fn readn(&mut self, func: u32, addr: u32, len: u32) -> u32 { + let cmd = cmd_word(READ, INC_ADDR, func, addr, len); + let mut buf = [0; 1]; + + transaction!(&mut self.spi, |bus| async { + bus.write(&[cmd]).await?; + if func == FUNC_BACKPLANE { + // 4-byte response delay. + bus.read(&mut buf).await?; + } + bus.read(&mut buf).await?; + Ok(()) + }) + .await + .unwrap(); + + buf[0] + } + + async fn writen(&mut self, func: u32, addr: u32, val: u32, len: u32) { + let cmd = cmd_word(WRITE, INC_ADDR, func, addr, len); + + transaction!(&mut self.spi, |bus| async { + bus.write(&[cmd, val]).await?; + Ok(()) + }) + .await + .unwrap(); + } + + async fn read32_swapped(&mut self, addr: u32) -> u32 { + let cmd = cmd_word(READ, INC_ADDR, FUNC_BUS, addr, 4); + let mut buf = [0; 1]; + + transaction!(&mut self.spi, |bus| async { + bus.write(&[swap16(cmd)]).await?; + bus.read(&mut buf).await?; + Ok(()) + }) + .await + .unwrap(); + + swap16(buf[0]) + } + + async fn write32_swapped(&mut self, addr: u32, val: u32) { + let cmd = cmd_word(WRITE, INC_ADDR, FUNC_BUS, addr, 4); + + transaction!(&mut self.spi, |bus| async { + bus.write(&[swap16(cmd), swap16(val)]).await?; + Ok(()) + }) + .await + .unwrap(); + } +} + +fn swap16(x: u32) -> u32 { + x.rotate_left(16) +} + +fn cmd_word(write: bool, incr: bool, func: u32, addr: u32, len: u32) -> u32 { + (write as u32) << 31 | (incr as u32) << 30 | (func & 0b11) << 28 | (addr & 0x1FFFF) << 11 | (len & 0x7FF) +} + +fn slice8_mut(x: &mut [u32]) -> &mut [u8] { + let len = x.len() * 4; + unsafe { slice::from_raw_parts_mut(x.as_mut_ptr() as _, len) } +} diff --git a/src/consts.rs b/src/consts.rs new file mode 100644 index 00000000..bee70660 --- /dev/null +++ b/src/consts.rs @@ -0,0 +1,105 @@ +#![allow(unused)] +pub(crate) const FUNC_BUS: u32 = 0; +pub(crate) const FUNC_BACKPLANE: u32 = 1; +pub(crate) const FUNC_WLAN: u32 = 2; +pub(crate) const FUNC_BT: u32 = 3; + +pub(crate) const REG_BUS_CTRL: u32 = 0x0; +pub(crate) const REG_BUS_INTERRUPT: u32 = 0x04; // 16 bits - Interrupt status +pub(crate) const REG_BUS_INTERRUPT_ENABLE: u32 = 0x06; // 16 bits - Interrupt mask +pub(crate) const REG_BUS_STATUS: u32 = 0x8; +pub(crate) const REG_BUS_TEST_RO: u32 = 0x14; +pub(crate) const REG_BUS_TEST_RW: u32 = 0x18; +pub(crate) const REG_BUS_RESP_DELAY: u32 = 0x1c; +pub(crate) const WORD_LENGTH_32: u32 = 0x1; +pub(crate) const HIGH_SPEED: u32 = 0x10; + +// SPI_STATUS_REGISTER bits +pub(crate) const STATUS_DATA_NOT_AVAILABLE: u32 = 0x00000001; +pub(crate) const STATUS_UNDERFLOW: u32 = 0x00000002; +pub(crate) const STATUS_OVERFLOW: u32 = 0x00000004; +pub(crate) const STATUS_F2_INTR: u32 = 0x00000008; +pub(crate) const STATUS_F3_INTR: u32 = 0x00000010; +pub(crate) const STATUS_F2_RX_READY: u32 = 0x00000020; +pub(crate) const STATUS_F3_RX_READY: u32 = 0x00000040; +pub(crate) const STATUS_HOST_CMD_DATA_ERR: u32 = 0x00000080; +pub(crate) const STATUS_F2_PKT_AVAILABLE: u32 = 0x00000100; +pub(crate) const STATUS_F2_PKT_LEN_MASK: u32 = 0x000FFE00; +pub(crate) const STATUS_F2_PKT_LEN_SHIFT: u32 = 9; +pub(crate) const STATUS_F3_PKT_AVAILABLE: u32 = 0x00100000; +pub(crate) const STATUS_F3_PKT_LEN_MASK: u32 = 0xFFE00000; +pub(crate) const STATUS_F3_PKT_LEN_SHIFT: u32 = 21; + +pub(crate) const REG_BACKPLANE_GPIO_SELECT: u32 = 0x10005; +pub(crate) const REG_BACKPLANE_GPIO_OUTPUT: u32 = 0x10006; +pub(crate) const REG_BACKPLANE_GPIO_ENABLE: u32 = 0x10007; +pub(crate) const REG_BACKPLANE_FUNCTION2_WATERMARK: u32 = 0x10008; +pub(crate) const REG_BACKPLANE_DEVICE_CONTROL: u32 = 0x10009; +pub(crate) const REG_BACKPLANE_BACKPLANE_ADDRESS_LOW: u32 = 0x1000A; +pub(crate) const REG_BACKPLANE_BACKPLANE_ADDRESS_MID: u32 = 0x1000B; +pub(crate) const REG_BACKPLANE_BACKPLANE_ADDRESS_HIGH: u32 = 0x1000C; +pub(crate) const REG_BACKPLANE_FRAME_CONTROL: u32 = 0x1000D; +pub(crate) const REG_BACKPLANE_CHIP_CLOCK_CSR: u32 = 0x1000E; +pub(crate) const REG_BACKPLANE_PULL_UP: u32 = 0x1000F; +pub(crate) const REG_BACKPLANE_READ_FRAME_BC_LOW: u32 = 0x1001B; +pub(crate) const REG_BACKPLANE_READ_FRAME_BC_HIGH: u32 = 0x1001C; +pub(crate) const REG_BACKPLANE_WAKEUP_CTRL: u32 = 0x1001E; +pub(crate) const REG_BACKPLANE_SLEEP_CSR: u32 = 0x1001F; + +pub(crate) const BACKPLANE_WINDOW_SIZE: usize = 0x8000; +pub(crate) const BACKPLANE_ADDRESS_MASK: u32 = 0x7FFF; +pub(crate) const BACKPLANE_ADDRESS_32BIT_FLAG: u32 = 0x08000; +pub(crate) const BACKPLANE_MAX_TRANSFER_SIZE: usize = 64; +// Active Low Power (ALP) clock constants +pub(crate) const BACKPLANE_ALP_AVAIL_REQ: u8 = 0x08; +pub(crate) const BACKPLANE_ALP_AVAIL: u8 = 0x40; + +// Broadcom AMBA (Advanced Microcontroller Bus Architecture) Interconnect +// (AI) pub (crate) constants +pub(crate) const AI_IOCTRL_OFFSET: u32 = 0x408; +pub(crate) const AI_IOCTRL_BIT_FGC: u8 = 0x0002; +pub(crate) const AI_IOCTRL_BIT_CLOCK_EN: u8 = 0x0001; +pub(crate) const AI_IOCTRL_BIT_CPUHALT: u8 = 0x0020; + +pub(crate) const AI_RESETCTRL_OFFSET: u32 = 0x800; +pub(crate) const AI_RESETCTRL_BIT_RESET: u8 = 1; + +pub(crate) const AI_RESETSTATUS_OFFSET: u32 = 0x804; + +pub(crate) const TEST_PATTERN: u32 = 0x12345678; +pub(crate) const FEEDBEAD: u32 = 0xFEEDBEAD; + +// SPI_INTERRUPT_REGISTER and SPI_INTERRUPT_ENABLE_REGISTER Bits +pub(crate) const IRQ_DATA_UNAVAILABLE: u16 = 0x0001; // Requested data not available; Clear by writing a "1" +pub(crate) const IRQ_F2_F3_FIFO_RD_UNDERFLOW: u16 = 0x0002; +pub(crate) const IRQ_F2_F3_FIFO_WR_OVERFLOW: u16 = 0x0004; +pub(crate) const IRQ_COMMAND_ERROR: u16 = 0x0008; // Cleared by writing 1 +pub(crate) const IRQ_DATA_ERROR: u16 = 0x0010; // Cleared by writing 1 +pub(crate) const IRQ_F2_PACKET_AVAILABLE: u16 = 0x0020; +pub(crate) const IRQ_F3_PACKET_AVAILABLE: u16 = 0x0040; +pub(crate) const IRQ_F1_OVERFLOW: u16 = 0x0080; // Due to last write. Bkplane has pending write requests +pub(crate) const IRQ_MISC_INTR0: u16 = 0x0100; +pub(crate) const IRQ_MISC_INTR1: u16 = 0x0200; +pub(crate) const IRQ_MISC_INTR2: u16 = 0x0400; +pub(crate) const IRQ_MISC_INTR3: u16 = 0x0800; +pub(crate) const IRQ_MISC_INTR4: u16 = 0x1000; +pub(crate) const IRQ_F1_INTR: u16 = 0x2000; +pub(crate) const IRQ_F2_INTR: u16 = 0x4000; +pub(crate) const IRQ_F3_INTR: u16 = 0x8000; + +pub(crate) const IOCTL_CMD_UP: u32 = 2; +pub(crate) const IOCTL_CMD_SET_SSID: u32 = 26; +pub(crate) const IOCTL_CMD_ANTDIV: u32 = 64; +pub(crate) const IOCTL_CMD_SET_VAR: u32 = 263; +pub(crate) const IOCTL_CMD_GET_VAR: u32 = 262; +pub(crate) const IOCTL_CMD_SET_PASSPHRASE: u32 = 268; + +pub(crate) const CHANNEL_TYPE_CONTROL: u8 = 0; +pub(crate) const CHANNEL_TYPE_EVENT: u8 = 1; +pub(crate) const CHANNEL_TYPE_DATA: u8 = 2; + +// CYW_SPID command structure constants. +pub(crate) const WRITE: bool = true; +pub(crate) const READ: bool = false; +pub(crate) const INC_ADDR: bool = true; +pub(crate) const FIXED_ADDR: bool = false; diff --git a/src/lib.rs b/src/lib.rs index 883e669d..fa73b32e 100644 --- a/src/lib.rs +++ b/src/lib.rs @@ -6,6 +6,8 @@ // This mod MUST go first, so that the others see its macros. pub(crate) mod fmt; +mod bus; +mod consts; mod countries; mod events; mod structs; @@ -23,132 +25,12 @@ use embassy_sync::blocking_mutex::raw::NoopRawMutex; use embassy_sync::channel::Channel; use embassy_time::{block_for, Duration, Timer}; use embedded_hal_1::digital::OutputPin; -use embedded_hal_async::spi::{transaction, SpiBusRead, SpiBusWrite, SpiDevice}; +use embedded_hal_async::spi::{SpiBusRead, SpiBusWrite, SpiDevice}; -use self::structs::*; +use crate::bus::Bus; +use crate::consts::*; use crate::events::Event; - -fn swap16(x: u32) -> u32 { - x.rotate_left(16) -} - -fn cmd_word(write: bool, incr: bool, func: u32, addr: u32, len: u32) -> u32 { - (write as u32) << 31 | (incr as u32) << 30 | (func & 0b11) << 28 | (addr & 0x1FFFF) << 11 | (len & 0x7FF) -} - -fn slice8_mut(x: &mut [u32]) -> &mut [u8] { - let len = x.len() * 4; - unsafe { slice::from_raw_parts_mut(x.as_mut_ptr() as _, len) } -} - -mod constants { - #![allow(unused)] - pub(crate) const FUNC_BUS: u32 = 0; - pub(crate) const FUNC_BACKPLANE: u32 = 1; - pub(crate) const FUNC_WLAN: u32 = 2; - pub(crate) const FUNC_BT: u32 = 3; - - pub(crate) const REG_BUS_CTRL: u32 = 0x0; - pub(crate) const REG_BUS_INTERRUPT: u32 = 0x04; // 16 bits - Interrupt status - pub(crate) const REG_BUS_INTERRUPT_ENABLE: u32 = 0x06; // 16 bits - Interrupt mask - pub(crate) const REG_BUS_STATUS: u32 = 0x8; - pub(crate) const REG_BUS_TEST_RO: u32 = 0x14; - pub(crate) const REG_BUS_TEST_RW: u32 = 0x18; - pub(crate) const REG_BUS_RESP_DELAY: u32 = 0x1c; - pub(crate) const WORD_LENGTH_32: u32 = 0x1; - pub(crate) const HIGH_SPEED: u32 = 0x10; - - // SPI_STATUS_REGISTER bits - pub(crate) const STATUS_DATA_NOT_AVAILABLE: u32 = 0x00000001; - pub(crate) const STATUS_UNDERFLOW: u32 = 0x00000002; - pub(crate) const STATUS_OVERFLOW: u32 = 0x00000004; - pub(crate) const STATUS_F2_INTR: u32 = 0x00000008; - pub(crate) const STATUS_F3_INTR: u32 = 0x00000010; - pub(crate) const STATUS_F2_RX_READY: u32 = 0x00000020; - pub(crate) const STATUS_F3_RX_READY: u32 = 0x00000040; - pub(crate) const STATUS_HOST_CMD_DATA_ERR: u32 = 0x00000080; - pub(crate) const STATUS_F2_PKT_AVAILABLE: u32 = 0x00000100; - pub(crate) const STATUS_F2_PKT_LEN_MASK: u32 = 0x000FFE00; - pub(crate) const STATUS_F2_PKT_LEN_SHIFT: u32 = 9; - pub(crate) const STATUS_F3_PKT_AVAILABLE: u32 = 0x00100000; - pub(crate) const STATUS_F3_PKT_LEN_MASK: u32 = 0xFFE00000; - pub(crate) const STATUS_F3_PKT_LEN_SHIFT: u32 = 21; - - pub(crate) const REG_BACKPLANE_GPIO_SELECT: u32 = 0x10005; - pub(crate) const REG_BACKPLANE_GPIO_OUTPUT: u32 = 0x10006; - pub(crate) const REG_BACKPLANE_GPIO_ENABLE: u32 = 0x10007; - pub(crate) const REG_BACKPLANE_FUNCTION2_WATERMARK: u32 = 0x10008; - pub(crate) const REG_BACKPLANE_DEVICE_CONTROL: u32 = 0x10009; - pub(crate) const REG_BACKPLANE_BACKPLANE_ADDRESS_LOW: u32 = 0x1000A; - pub(crate) const REG_BACKPLANE_BACKPLANE_ADDRESS_MID: u32 = 0x1000B; - pub(crate) const REG_BACKPLANE_BACKPLANE_ADDRESS_HIGH: u32 = 0x1000C; - pub(crate) const REG_BACKPLANE_FRAME_CONTROL: u32 = 0x1000D; - pub(crate) const REG_BACKPLANE_CHIP_CLOCK_CSR: u32 = 0x1000E; - pub(crate) const REG_BACKPLANE_PULL_UP: u32 = 0x1000F; - pub(crate) const REG_BACKPLANE_READ_FRAME_BC_LOW: u32 = 0x1001B; - pub(crate) const REG_BACKPLANE_READ_FRAME_BC_HIGH: u32 = 0x1001C; - pub(crate) const REG_BACKPLANE_WAKEUP_CTRL: u32 = 0x1001E; - pub(crate) const REG_BACKPLANE_SLEEP_CSR: u32 = 0x1001F; - - pub(crate) const BACKPLANE_WINDOW_SIZE: usize = 0x8000; - pub(crate) const BACKPLANE_ADDRESS_MASK: u32 = 0x7FFF; - pub(crate) const BACKPLANE_ADDRESS_32BIT_FLAG: u32 = 0x08000; - pub(crate) const BACKPLANE_MAX_TRANSFER_SIZE: usize = 64; - // Active Low Power (ALP) clock constants - pub(crate) const BACKPLANE_ALP_AVAIL_REQ: u8 = 0x08; - pub(crate) const BACKPLANE_ALP_AVAIL: u8 = 0x40; - - // Broadcom AMBA (Advanced Microcontroller Bus Architecture) Interconnect - // (AI) pub (crate) constants - pub(crate) const AI_IOCTRL_OFFSET: u32 = 0x408; - pub(crate) const AI_IOCTRL_BIT_FGC: u8 = 0x0002; - pub(crate) const AI_IOCTRL_BIT_CLOCK_EN: u8 = 0x0001; - pub(crate) const AI_IOCTRL_BIT_CPUHALT: u8 = 0x0020; - - pub(crate) const AI_RESETCTRL_OFFSET: u32 = 0x800; - pub(crate) const AI_RESETCTRL_BIT_RESET: u8 = 1; - - pub(crate) const AI_RESETSTATUS_OFFSET: u32 = 0x804; - - pub(crate) const TEST_PATTERN: u32 = 0x12345678; - pub(crate) const FEEDBEAD: u32 = 0xFEEDBEAD; - - // SPI_INTERRUPT_REGISTER and SPI_INTERRUPT_ENABLE_REGISTER Bits - pub(crate) const IRQ_DATA_UNAVAILABLE: u16 = 0x0001; // Requested data not available; Clear by writing a "1" - pub(crate) const IRQ_F2_F3_FIFO_RD_UNDERFLOW: u16 = 0x0002; - pub(crate) const IRQ_F2_F3_FIFO_WR_OVERFLOW: u16 = 0x0004; - pub(crate) const IRQ_COMMAND_ERROR: u16 = 0x0008; // Cleared by writing 1 - pub(crate) const IRQ_DATA_ERROR: u16 = 0x0010; // Cleared by writing 1 - pub(crate) const IRQ_F2_PACKET_AVAILABLE: u16 = 0x0020; - pub(crate) const IRQ_F3_PACKET_AVAILABLE: u16 = 0x0040; - pub(crate) const IRQ_F1_OVERFLOW: u16 = 0x0080; // Due to last write. Bkplane has pending write requests - pub(crate) const IRQ_MISC_INTR0: u16 = 0x0100; - pub(crate) const IRQ_MISC_INTR1: u16 = 0x0200; - pub(crate) const IRQ_MISC_INTR2: u16 = 0x0400; - pub(crate) const IRQ_MISC_INTR3: u16 = 0x0800; - pub(crate) const IRQ_MISC_INTR4: u16 = 0x1000; - pub(crate) const IRQ_F1_INTR: u16 = 0x2000; - pub(crate) const IRQ_F2_INTR: u16 = 0x4000; - pub(crate) const IRQ_F3_INTR: u16 = 0x8000; - - pub(crate) const IOCTL_CMD_UP: u32 = 2; - pub(crate) const IOCTL_CMD_SET_SSID: u32 = 26; - pub(crate) const IOCTL_CMD_ANTDIV: u32 = 64; - pub(crate) const IOCTL_CMD_SET_VAR: u32 = 263; - pub(crate) const IOCTL_CMD_GET_VAR: u32 = 262; - pub(crate) const IOCTL_CMD_SET_PASSPHRASE: u32 = 268; - - pub(crate) const CHANNEL_TYPE_CONTROL: u8 = 0; - pub(crate) const CHANNEL_TYPE_EVENT: u8 = 1; - pub(crate) const CHANNEL_TYPE_DATA: u8 = 2; - - // CYW_SPID command structure constants. - pub(crate) const WRITE: bool = true; - pub(crate) const READ: bool = false; - pub(crate) const INC_ADDR: bool = true; - pub(crate) const FIXED_ADDR: bool = false; -} -use crate::constants::*; +use crate::structs::*; #[derive(Clone, Copy)] pub enum IoctlType { @@ -565,15 +447,11 @@ impl<'a> embassy_net::Device for NetDevice<'a> { } pub struct Runner<'a, PWR, SPI> { + bus: Bus, + state: &'a State, - - pwr: PWR, - spi: SPI, - ioctl_id: u16, sdpcm_seq: u8, - backplane_window: u32, - sdpcm_seq_max: u8, #[cfg(feature = "firmware-logs")] @@ -600,14 +478,11 @@ where SPI::Bus: SpiBusRead + SpiBusWrite, { let mut runner = Runner { - state, - pwr, - spi, + bus: Bus::new(pwr, spi), + state, ioctl_id: 0, sdpcm_seq: 0, - backplane_window: 0xAAAA_AAAA, - sdpcm_seq_max: 1, #[cfg(feature = "firmware-logs")] @@ -631,62 +506,41 @@ where SPI::Bus: SpiBusRead + SpiBusWrite, { async fn init(&mut self, firmware: &[u8]) { - // Reset - self.pwr.set_low().unwrap(); - Timer::after(Duration::from_millis(20)).await; - self.pwr.set_high().unwrap(); - Timer::after(Duration::from_millis(250)).await; - - info!("waiting for ping..."); - while self.read32_swapped(REG_BUS_TEST_RO).await != FEEDBEAD {} - info!("ping ok"); - - self.write32_swapped(REG_BUS_TEST_RW, TEST_PATTERN).await; - let val = self.read32_swapped(REG_BUS_TEST_RW).await; - assert_eq!(val, TEST_PATTERN); - - // 32-bit word length, little endian (which is the default endianess). - self.write32_swapped(REG_BUS_CTRL, WORD_LENGTH_32 | HIGH_SPEED).await; - - let val = self.read32(FUNC_BUS, REG_BUS_TEST_RO).await; - assert_eq!(val, FEEDBEAD); - let val = self.read32(FUNC_BUS, REG_BUS_TEST_RW).await; - assert_eq!(val, TEST_PATTERN); - - // No response delay in any of the funcs. - // seems to break backplane??? eat the 4-byte delay instead, that's what the vendor drivers do... - //self.write32(FUNC_BUS, REG_BUS_RESP_DELAY, 0).await; + self.bus.init().await; // Init ALP (Active Low Power) clock - self.write8(FUNC_BACKPLANE, REG_BACKPLANE_CHIP_CLOCK_CSR, BACKPLANE_ALP_AVAIL_REQ) + self.bus + .write8(FUNC_BACKPLANE, REG_BACKPLANE_CHIP_CLOCK_CSR, BACKPLANE_ALP_AVAIL_REQ) .await; info!("waiting for clock..."); - while self.read8(FUNC_BACKPLANE, REG_BACKPLANE_CHIP_CLOCK_CSR).await & BACKPLANE_ALP_AVAIL == 0 {} + while self.bus.read8(FUNC_BACKPLANE, REG_BACKPLANE_CHIP_CLOCK_CSR).await & BACKPLANE_ALP_AVAIL == 0 {} info!("clock ok"); - let chip_id = self.bp_read16(0x1800_0000).await; + let chip_id = self.bus.bp_read16(0x1800_0000).await; info!("chip ID: {}", chip_id); // Upload firmware. self.core_disable(Core::WLAN).await; self.core_reset(Core::SOCSRAM).await; - self.bp_write32(CHIP.socsram_base_address + 0x10, 3).await; - self.bp_write32(CHIP.socsram_base_address + 0x44, 0).await; + self.bus.bp_write32(CHIP.socsram_base_address + 0x10, 3).await; + self.bus.bp_write32(CHIP.socsram_base_address + 0x44, 0).await; let ram_addr = CHIP.atcm_ram_base_address; info!("loading fw"); - self.bp_write(ram_addr, firmware).await; + self.bus.bp_write(ram_addr, firmware).await; info!("loading nvram"); // Round up to 4 bytes. let nvram_len = (NVRAM.len() + 3) / 4 * 4; - self.bp_write(ram_addr + CHIP.chip_ram_size - 4 - nvram_len as u32, NVRAM) + self.bus + .bp_write(ram_addr + CHIP.chip_ram_size - 4 - nvram_len as u32, NVRAM) .await; let nvram_len_words = nvram_len as u32 / 4; let nvram_len_magic = (!nvram_len_words << 16) | nvram_len_words; - self.bp_write32(ram_addr + CHIP.chip_ram_size - 4, nvram_len_magic) + self.bus + .bp_write32(ram_addr + CHIP.chip_ram_size - 4, nvram_len_magic) .await; // Start core! @@ -694,18 +548,20 @@ where self.core_reset(Core::WLAN).await; assert!(self.core_is_up(Core::WLAN).await); - while self.read8(FUNC_BACKPLANE, REG_BACKPLANE_CHIP_CLOCK_CSR).await & 0x80 == 0 {} + while self.bus.read8(FUNC_BACKPLANE, REG_BACKPLANE_CHIP_CLOCK_CSR).await & 0x80 == 0 {} // "Set up the interrupt mask and enable interrupts" - self.bp_write32(CHIP.sdiod_core_base_address + 0x24, 0xF0).await; + self.bus.bp_write32(CHIP.sdiod_core_base_address + 0x24, 0xF0).await; // "Lower F2 Watermark to avoid DMA Hang in F2 when SD Clock is stopped." // Sounds scary... - self.write8(FUNC_BACKPLANE, REG_BACKPLANE_FUNCTION2_WATERMARK, 32).await; + self.bus + .write8(FUNC_BACKPLANE, REG_BACKPLANE_FUNCTION2_WATERMARK, 32) + .await; // wait for wifi startup info!("waiting for wifi init..."); - while self.read32(FUNC_BUS, REG_BUS_STATUS).await & STATUS_F2_RX_READY == 0 {} + while self.bus.read32(FUNC_BUS, REG_BUS_STATUS).await & STATUS_F2_RX_READY == 0 {} // Some random configs related to sleep. // These aren't needed if we don't want to sleep the bus. @@ -713,25 +569,25 @@ where // being on the same pin as MOSI/MISO? /* - let mut val = self.read8(FUNC_BACKPLANE, REG_BACKPLANE_WAKEUP_CTRL).await; + let mut val = self.bus.read8(FUNC_BACKPLANE, REG_BACKPLANE_WAKEUP_CTRL).await; val |= 0x02; // WAKE_TILL_HT_AVAIL - self.write8(FUNC_BACKPLANE, REG_BACKPLANE_WAKEUP_CTRL, val).await; - self.write8(FUNC_BUS, 0xF0, 0x08).await; // SDIOD_CCCR_BRCM_CARDCAP.CMD_NODEC = 1 - self.write8(FUNC_BACKPLANE, REG_BACKPLANE_CHIP_CLOCK_CSR, 0x02).await; // SBSDIO_FORCE_HT + self.bus.write8(FUNC_BACKPLANE, REG_BACKPLANE_WAKEUP_CTRL, val).await; + self.bus.write8(FUNC_BUS, 0xF0, 0x08).await; // SDIOD_CCCR_BRCM_CARDCAP.CMD_NODEC = 1 + self.bus.write8(FUNC_BACKPLANE, REG_BACKPLANE_CHIP_CLOCK_CSR, 0x02).await; // SBSDIO_FORCE_HT - let mut val = self.read8(FUNC_BACKPLANE, REG_BACKPLANE_SLEEP_CSR).await; + let mut val = self.bus.read8(FUNC_BACKPLANE, REG_BACKPLANE_SLEEP_CSR).await; val |= 0x01; // SBSDIO_SLPCSR_KEEP_SDIO_ON - self.write8(FUNC_BACKPLANE, REG_BACKPLANE_SLEEP_CSR, val).await; + self.bus.write8(FUNC_BACKPLANE, REG_BACKPLANE_SLEEP_CSR, val).await; */ // clear pulls - self.write8(FUNC_BACKPLANE, REG_BACKPLANE_PULL_UP, 0).await; - let _ = self.read8(FUNC_BACKPLANE, REG_BACKPLANE_PULL_UP).await; + self.bus.write8(FUNC_BACKPLANE, REG_BACKPLANE_PULL_UP, 0).await; + let _ = self.bus.read8(FUNC_BACKPLANE, REG_BACKPLANE_PULL_UP).await; // start HT clock - //self.write8(FUNC_BACKPLANE, REG_BACKPLANE_CHIP_CLOCK_CSR, 0x10).await; + //self.bus.write8(FUNC_BACKPLANE, REG_BACKPLANE_CHIP_CLOCK_CSR, 0x10).await; //info!("waiting for HT clock..."); - //while self.read8(FUNC_BACKPLANE, REG_BACKPLANE_CHIP_CLOCK_CSR).await & 0x80 == 0 {} + //while self.bus.read8(FUNC_BACKPLANE, REG_BACKPLANE_CHIP_CLOCK_CSR).await & 0x80 == 0 {} //info!("clock ok"); #[cfg(feature = "firmware-logs")] @@ -744,13 +600,12 @@ where async fn log_init(&mut self) { // Initialize shared memory for logging. - let shared_addr = self - .bp_read32(CHIP.atcm_ram_base_address + CHIP.chip_ram_size - 4 - CHIP.socram_srmem_size) - .await; + let addr = CHIP.atcm_ram_base_address + CHIP.chip_ram_size - 4 - CHIP.socram_srmem_size; + let shared_addr = self.bus.bp_read32(addr).await; info!("shared_addr {:08x}", shared_addr); let mut shared = [0; SharedMemData::SIZE]; - self.bp_read(shared_addr, &mut shared).await; + self.bus.bp_read(shared_addr, &mut shared).await; let shared = SharedMemData::from_bytes(&shared); info!("shared: {:08x}", shared); @@ -761,7 +616,7 @@ where async fn log_read(&mut self) { // Read log struct let mut log = [0; SharedMemLog::SIZE]; - self.bp_read(self.log.addr, &mut log).await; + self.bus.bp_read(self.log.addr, &mut log).await; let log = SharedMemLog::from_bytes(&log); let idx = log.idx as usize; @@ -774,7 +629,7 @@ where // Read entire buf for now. We could read only what we need, but then we // run into annoying alignment issues in `bp_read`. let mut buf = [0; 0x400]; - self.bp_read(log.buf, &mut buf).await; + self.bus.bp_read(log.buf, &mut buf).await; while self.log.last_idx != idx as usize { let b = buf[self.log.last_idx]; @@ -821,29 +676,19 @@ where } // Receive stuff - let irq = self.read16(FUNC_BUS, REG_BUS_INTERRUPT).await; + let irq = self.bus.read16(FUNC_BUS, REG_BUS_INTERRUPT).await; if irq & IRQ_F2_PACKET_AVAILABLE != 0 { let mut status = 0xFFFF_FFFF; while status == 0xFFFF_FFFF { - status = self.read32(FUNC_BUS, REG_BUS_STATUS).await; + status = self.bus.read32(FUNC_BUS, REG_BUS_STATUS).await; } if status & STATUS_F2_PKT_AVAILABLE != 0 { let len = (status & STATUS_F2_PKT_LEN_MASK) >> STATUS_F2_PKT_LEN_SHIFT; - let cmd = cmd_word(READ, INC_ADDR, FUNC_WLAN, 0, len); - - transaction!(&mut self.spi, |bus| async { - bus.write(&[cmd]).await?; - bus.read(&mut buf[..(len as usize + 3) / 4]).await?; - Ok(()) - }) - .await - .unwrap(); - + self.bus.wlan_read(&mut buf[..(len as usize + 3) / 4]).await; trace!("rx {:02x}", &slice8_mut(&mut buf)[..(len as usize).min(48)]); - self.rx(&slice8_mut(&mut buf)[..len as usize]); } } @@ -893,14 +738,7 @@ where trace!(" {:02x}", &buf8[..total_len.min(48)]); - let cmd = cmd_word(WRITE, INC_ADDR, FUNC_WLAN, 0, total_len as _); - transaction!(&mut self.spi, |bus| async { - bus.write(&[cmd]).await?; - bus.write(&buf[..(total_len / 4)]).await?; - Ok(()) - }) - .await - .unwrap(); + self.bus.wlan_write(&buf[..(total_len / 4)]).await; } fn rx(&mut self, packet: &[u8]) { @@ -1086,52 +924,49 @@ where trace!(" {:02x}", &buf8[..total_len.min(48)]); - let cmd = cmd_word(WRITE, INC_ADDR, FUNC_WLAN, 0, total_len as _); - - transaction!(&mut self.spi, |bus| async { - bus.write(&[cmd]).await?; - bus.write(&buf[..total_len / 4]).await?; - Ok(()) - }) - .await - .unwrap(); + self.bus.wlan_write(&buf[..total_len / 4]).await; } async fn core_disable(&mut self, core: Core) { let base = core.base_addr(); // Dummy read? - let _ = self.bp_read8(base + AI_RESETCTRL_OFFSET).await; + let _ = self.bus.bp_read8(base + AI_RESETCTRL_OFFSET).await; // Check it isn't already reset - let r = self.bp_read8(base + AI_RESETCTRL_OFFSET).await; + let r = self.bus.bp_read8(base + AI_RESETCTRL_OFFSET).await; if r & AI_RESETCTRL_BIT_RESET != 0 { return; } - self.bp_write8(base + AI_IOCTRL_OFFSET, 0).await; - let _ = self.bp_read8(base + AI_IOCTRL_OFFSET).await; + self.bus.bp_write8(base + AI_IOCTRL_OFFSET, 0).await; + let _ = self.bus.bp_read8(base + AI_IOCTRL_OFFSET).await; block_for(Duration::from_millis(1)); - self.bp_write8(base + AI_RESETCTRL_OFFSET, AI_RESETCTRL_BIT_RESET).await; - let _ = self.bp_read8(base + AI_RESETCTRL_OFFSET).await; + self.bus + .bp_write8(base + AI_RESETCTRL_OFFSET, AI_RESETCTRL_BIT_RESET) + .await; + let _ = self.bus.bp_read8(base + AI_RESETCTRL_OFFSET).await; } async fn core_reset(&mut self, core: Core) { self.core_disable(core).await; let base = core.base_addr(); - self.bp_write8(base + AI_IOCTRL_OFFSET, AI_IOCTRL_BIT_FGC | AI_IOCTRL_BIT_CLOCK_EN) + self.bus + .bp_write8(base + AI_IOCTRL_OFFSET, AI_IOCTRL_BIT_FGC | AI_IOCTRL_BIT_CLOCK_EN) .await; - let _ = self.bp_read8(base + AI_IOCTRL_OFFSET).await; + let _ = self.bus.bp_read8(base + AI_IOCTRL_OFFSET).await; - self.bp_write8(base + AI_RESETCTRL_OFFSET, 0).await; + self.bus.bp_write8(base + AI_RESETCTRL_OFFSET, 0).await; Timer::after(Duration::from_millis(1)).await; - self.bp_write8(base + AI_IOCTRL_OFFSET, AI_IOCTRL_BIT_CLOCK_EN).await; - let _ = self.bp_read8(base + AI_IOCTRL_OFFSET).await; + self.bus + .bp_write8(base + AI_IOCTRL_OFFSET, AI_IOCTRL_BIT_CLOCK_EN) + .await; + let _ = self.bus.bp_read8(base + AI_IOCTRL_OFFSET).await; Timer::after(Duration::from_millis(1)).await; } @@ -1139,13 +974,13 @@ where async fn core_is_up(&mut self, core: Core) -> bool { let base = core.base_addr(); - let io = self.bp_read8(base + AI_IOCTRL_OFFSET).await; + let io = self.bus.bp_read8(base + AI_IOCTRL_OFFSET).await; if io & (AI_IOCTRL_BIT_FGC | AI_IOCTRL_BIT_CLOCK_EN) != AI_IOCTRL_BIT_CLOCK_EN { debug!("core_is_up: returning false due to bad ioctrl {:02x}", io); return false; } - let r = self.bp_read8(base + AI_RESETCTRL_OFFSET).await; + let r = self.bus.bp_read8(base + AI_RESETCTRL_OFFSET).await; if r & (AI_RESETCTRL_BIT_RESET) != 0 { debug!("core_is_up: returning false due to bad resetctrl {:02x}", r); return false; @@ -1153,242 +988,11 @@ where true } +} - #[allow(unused)] - async fn bp_read(&mut self, mut addr: u32, mut data: &mut [u8]) { - // It seems the HW force-aligns the addr - // to 2 if data.len() >= 2 - // to 4 if data.len() >= 4 - // To simplify, enforce 4-align for now. - assert!(addr % 4 == 0); - - let mut buf = [0u32; BACKPLANE_MAX_TRANSFER_SIZE / 4]; - - while !data.is_empty() { - // Ensure transfer doesn't cross a window boundary. - let window_offs = addr & BACKPLANE_ADDRESS_MASK; - let window_remaining = BACKPLANE_WINDOW_SIZE - window_offs as usize; - - let len = data.len().min(BACKPLANE_MAX_TRANSFER_SIZE).min(window_remaining); - - self.backplane_set_window(addr).await; - - let cmd = cmd_word(READ, INC_ADDR, FUNC_BACKPLANE, window_offs, len as u32); - - transaction!(&mut self.spi, |bus| async { - bus.write(&[cmd]).await?; - - // 4-byte response delay. - let mut junk = [0; 1]; - bus.read(&mut junk).await?; - - // Read data - bus.read(&mut buf[..(len + 3) / 4]).await?; - Ok(()) - }) - .await - .unwrap(); - - data[..len].copy_from_slice(&slice8_mut(&mut buf)[..len]); - - // Advance ptr. - addr += len as u32; - data = &mut data[len..]; - } - } - - async fn bp_write(&mut self, mut addr: u32, mut data: &[u8]) { - // It seems the HW force-aligns the addr - // to 2 if data.len() >= 2 - // to 4 if data.len() >= 4 - // To simplify, enforce 4-align for now. - assert!(addr % 4 == 0); - - let mut buf = [0u32; BACKPLANE_MAX_TRANSFER_SIZE / 4]; - - while !data.is_empty() { - // Ensure transfer doesn't cross a window boundary. - let window_offs = addr & BACKPLANE_ADDRESS_MASK; - let window_remaining = BACKPLANE_WINDOW_SIZE - window_offs as usize; - - let len = data.len().min(BACKPLANE_MAX_TRANSFER_SIZE).min(window_remaining); - slice8_mut(&mut buf)[..len].copy_from_slice(&data[..len]); - - self.backplane_set_window(addr).await; - - let cmd = cmd_word(WRITE, INC_ADDR, FUNC_BACKPLANE, window_offs, len as u32); - - transaction!(&mut self.spi, |bus| async { - bus.write(&[cmd]).await?; - bus.write(&buf[..(len + 3) / 4]).await?; - Ok(()) - }) - .await - .unwrap(); - - // Advance ptr. - addr += len as u32; - data = &data[len..]; - } - } - - async fn bp_read8(&mut self, addr: u32) -> u8 { - self.backplane_readn(addr, 1).await as u8 - } - - async fn bp_write8(&mut self, addr: u32, val: u8) { - self.backplane_writen(addr, val as u32, 1).await - } - - async fn bp_read16(&mut self, addr: u32) -> u16 { - self.backplane_readn(addr, 2).await as u16 - } - - #[allow(unused)] - async fn bp_write16(&mut self, addr: u32, val: u16) { - self.backplane_writen(addr, val as u32, 2).await - } - - #[allow(unused)] - async fn bp_read32(&mut self, addr: u32) -> u32 { - self.backplane_readn(addr, 4).await - } - - async fn bp_write32(&mut self, addr: u32, val: u32) { - self.backplane_writen(addr, val, 4).await - } - - async fn backplane_readn(&mut self, addr: u32, len: u32) -> u32 { - self.backplane_set_window(addr).await; - - let mut bus_addr = addr & BACKPLANE_ADDRESS_MASK; - if len == 4 { - bus_addr |= BACKPLANE_ADDRESS_32BIT_FLAG - } - self.readn(FUNC_BACKPLANE, bus_addr, len).await - } - - async fn backplane_writen(&mut self, addr: u32, val: u32, len: u32) { - self.backplane_set_window(addr).await; - - let mut bus_addr = addr & BACKPLANE_ADDRESS_MASK; - if len == 4 { - bus_addr |= BACKPLANE_ADDRESS_32BIT_FLAG - } - self.writen(FUNC_BACKPLANE, bus_addr, val, len).await - } - - async fn backplane_set_window(&mut self, addr: u32) { - let new_window = addr & !BACKPLANE_ADDRESS_MASK; - - if (new_window >> 24) as u8 != (self.backplane_window >> 24) as u8 { - self.write8( - FUNC_BACKPLANE, - REG_BACKPLANE_BACKPLANE_ADDRESS_HIGH, - (new_window >> 24) as u8, - ) - .await; - } - if (new_window >> 16) as u8 != (self.backplane_window >> 16) as u8 { - self.write8( - FUNC_BACKPLANE, - REG_BACKPLANE_BACKPLANE_ADDRESS_MID, - (new_window >> 16) as u8, - ) - .await; - } - if (new_window >> 8) as u8 != (self.backplane_window >> 8) as u8 { - self.write8( - FUNC_BACKPLANE, - REG_BACKPLANE_BACKPLANE_ADDRESS_LOW, - (new_window >> 8) as u8, - ) - .await; - } - self.backplane_window = new_window; - } - - async fn read8(&mut self, func: u32, addr: u32) -> u8 { - self.readn(func, addr, 1).await as u8 - } - - async fn write8(&mut self, func: u32, addr: u32, val: u8) { - self.writen(func, addr, val as u32, 1).await - } - - async fn read16(&mut self, func: u32, addr: u32) -> u16 { - self.readn(func, addr, 2).await as u16 - } - - #[allow(unused)] - async fn write16(&mut self, func: u32, addr: u32, val: u16) { - self.writen(func, addr, val as u32, 2).await - } - - async fn read32(&mut self, func: u32, addr: u32) -> u32 { - self.readn(func, addr, 4).await - } - - #[allow(unused)] - async fn write32(&mut self, func: u32, addr: u32, val: u32) { - self.writen(func, addr, val, 4).await - } - - async fn readn(&mut self, func: u32, addr: u32, len: u32) -> u32 { - let cmd = cmd_word(READ, INC_ADDR, func, addr, len); - let mut buf = [0; 1]; - - transaction!(&mut self.spi, |bus| async { - bus.write(&[cmd]).await?; - if func == FUNC_BACKPLANE { - // 4-byte response delay. - bus.read(&mut buf).await?; - } - bus.read(&mut buf).await?; - Ok(()) - }) - .await - .unwrap(); - - buf[0] - } - - async fn writen(&mut self, func: u32, addr: u32, val: u32, len: u32) { - let cmd = cmd_word(WRITE, INC_ADDR, func, addr, len); - - transaction!(&mut self.spi, |bus| async { - bus.write(&[cmd, val]).await?; - Ok(()) - }) - .await - .unwrap(); - } - - async fn read32_swapped(&mut self, addr: u32) -> u32 { - let cmd = cmd_word(READ, INC_ADDR, FUNC_BUS, addr, 4); - let mut buf = [0; 1]; - - transaction!(&mut self.spi, |bus| async { - bus.write(&[swap16(cmd)]).await?; - bus.read(&mut buf).await?; - Ok(()) - }) - .await - .unwrap(); - - swap16(buf[0]) - } - - async fn write32_swapped(&mut self, addr: u32, val: u32) { - let cmd = cmd_word(WRITE, INC_ADDR, FUNC_BUS, addr, 4); - - transaction!(&mut self.spi, |bus| async { - bus.write(&[swap16(cmd), swap16(val)]).await?; - Ok(()) - }) - .await - .unwrap(); - } +fn slice8_mut(x: &mut [u32]) -> &mut [u8] { + let len = x.len() * 4; + unsafe { slice::from_raw_parts_mut(x.as_mut_ptr() as _, len) } } macro_rules! nvram { From 2548bbdd65fc3094f624bd043a1a9a296f9184b5 Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Tue, 27 Dec 2022 01:19:26 +0100 Subject: [PATCH 055/130] Update Embassy. --- Cargo.toml | 2 +- examples/rpi-pico-w/Cargo.toml | 18 +-- examples/rpi-pico-w/src/main.rs | 6 +- src/lib.rs | 218 +++++++++++++------------------- 4 files changed, 101 insertions(+), 143 deletions(-) diff --git a/Cargo.toml b/Cargo.toml index dadfb5c5..6e323744 100644 --- a/Cargo.toml +++ b/Cargo.toml @@ -14,7 +14,7 @@ firmware-logs = [] embassy-time = { version = "0.1.0" } embassy-sync = { version = "0.1.0" } embassy-futures = { version = "0.1.0" } -embassy-net = { version = "0.1.0" } +embassy-net-driver-channel = { version = "0.1.0" } atomic-polyfill = "0.1.5" defmt = { version = "0.3", optional = true } diff --git a/examples/rpi-pico-w/Cargo.toml b/examples/rpi-pico-w/Cargo.toml index b817289e..fa1cad8c 100644 --- a/examples/rpi-pico-w/Cargo.toml +++ b/examples/rpi-pico-w/Cargo.toml @@ -9,7 +9,7 @@ cyw43 = { path = "../../", features = ["defmt", "firmware-logs"]} embassy-executor = { version = "0.1.0", features = ["defmt", "integrated-timers"] } embassy-time = { version = "0.1.0", features = ["defmt", "defmt-timestamp-uptime"] } embassy-rp = { version = "0.1.0", features = ["defmt", "unstable-traits", "nightly", "unstable-pac", "time-driver"] } -embassy-net = { version = "0.1.0", features = ["defmt", "tcp", "dhcpv4", "medium-ethernet", "pool-16", "unstable-traits", "nightly"] } +embassy-net = { version = "0.1.0", features = ["defmt", "tcp", "dhcpv4", "medium-ethernet", "unstable-traits", "nightly"] } atomic-polyfill = "0.1.5" static_cell = "1.0" @@ -28,12 +28,14 @@ heapless = "0.7.15" [patch.crates-io] -embassy-executor = { git = "https://github.com/embassy-rs/embassy", rev = "645fb66a5122bdc8180e0e65d076ca103431a426" } -embassy-time = { git = "https://github.com/embassy-rs/embassy", rev = "645fb66a5122bdc8180e0e65d076ca103431a426" } -embassy-futures = { git = "https://github.com/embassy-rs/embassy", rev = "645fb66a5122bdc8180e0e65d076ca103431a426" } -embassy-sync = { git = "https://github.com/embassy-rs/embassy", rev = "645fb66a5122bdc8180e0e65d076ca103431a426" } -embassy-rp = { git = "https://github.com/embassy-rs/embassy", rev = "645fb66a5122bdc8180e0e65d076ca103431a426" } -embassy-net = { git = "https://github.com/embassy-rs/embassy", rev = "645fb66a5122bdc8180e0e65d076ca103431a426" } +embassy-executor = { git = "https://github.com/embassy-rs/embassy", rev = "771806be790a2758f1314d6460defe7c2f0d3e99" } +embassy-time = { git = "https://github.com/embassy-rs/embassy", rev = "771806be790a2758f1314d6460defe7c2f0d3e99" } +embassy-futures = { git = "https://github.com/embassy-rs/embassy", rev = "771806be790a2758f1314d6460defe7c2f0d3e99" } +embassy-sync = { git = "https://github.com/embassy-rs/embassy", rev = "771806be790a2758f1314d6460defe7c2f0d3e99" } +embassy-rp = { git = "https://github.com/embassy-rs/embassy", rev = "771806be790a2758f1314d6460defe7c2f0d3e99" } +embassy-net = { git = "https://github.com/embassy-rs/embassy", rev = "771806be790a2758f1314d6460defe7c2f0d3e99" } +embassy-net-driver = { git = "https://github.com/embassy-rs/embassy", rev = "771806be790a2758f1314d6460defe7c2f0d3e99" } +embassy-net-driver-channel = { git = "https://github.com/embassy-rs/embassy", rev = "771806be790a2758f1314d6460defe7c2f0d3e99" } [profile.dev] debug = 2 @@ -43,7 +45,7 @@ overflow-checks = true [profile.release] codegen-units = 1 -debug = 2 +debug = 1 debug-assertions = false incremental = false lto = 'fat' diff --git a/examples/rpi-pico-w/src/main.rs b/examples/rpi-pico-w/src/main.rs index a19f3859..fd58e46d 100644 --- a/examples/rpi-pico-w/src/main.rs +++ b/examples/rpi-pico-w/src/main.rs @@ -34,7 +34,7 @@ async fn wifi_task( } #[embassy_executor::task] -async fn net_task(stack: &'static Stack>) -> ! { +async fn net_task(stack: &'static Stack>) -> ! { stack.run().await } @@ -66,11 +66,11 @@ async fn main(spawner: Spawner) { let spi = ExclusiveDevice::new(bus, cs); let state = singleton!(cyw43::State::new()); - let (mut control, runner) = cyw43::new(state, pwr, spi, fw).await; + let (net_device, mut control, runner) = cyw43::new(state, pwr, spi, fw).await; spawner.spawn(wifi_task(runner)).unwrap(); - let net_device = control.init(clm).await; + control.init(clm).await; //control.join_open(env!("WIFI_NETWORK")).await; control.join_wpa2(env!("WIFI_NETWORK"), env!("WIFI_PASSWORD")).await; diff --git a/src/lib.rs b/src/lib.rs index fa73b32e..25e6f8f1 100644 --- a/src/lib.rs +++ b/src/lib.rs @@ -15,14 +15,10 @@ mod structs; use core::cell::Cell; use core::cmp::{max, min}; use core::slice; -use core::sync::atomic::Ordering; -use core::task::Waker; -use atomic_polyfill::AtomicBool; +use ch::driver::LinkState; use embassy_futures::yield_now; -use embassy_net::{PacketBoxExt, PacketBuf}; -use embassy_sync::blocking_mutex::raw::NoopRawMutex; -use embassy_sync::channel::Channel; +use embassy_net_driver_channel as ch; use embassy_time::{block_for, Duration, Timer}; use embedded_hal_1::digital::OutputPin; use embedded_hal_async::spi::{SpiBusRead, SpiBusWrite, SpiDevice}; @@ -32,6 +28,8 @@ use crate::consts::*; use crate::events::Event; use crate::structs::*; +const MTU: usize = 1514; + #[derive(Clone, Copy)] pub enum IoctlType { Get = 0, @@ -128,30 +126,25 @@ enum IoctlState { pub struct State { ioctl_state: Cell, - - tx_channel: Channel, - rx_channel: Channel, - link_up: AtomicBool, + ch: ch::State, } impl State { pub fn new() -> Self { Self { ioctl_state: Cell::new(IoctlState::Idle), - - tx_channel: Channel::new(), - rx_channel: Channel::new(), - link_up: AtomicBool::new(true), // TODO set up/down as we join/deassociate + ch: ch::State::new(), } } } pub struct Control<'a> { - state: &'a State, + state_ch: ch::StateRunner<'a>, + ioctl_state: &'a Cell, } impl<'a> Control<'a> { - pub async fn init(&mut self, clm: &[u8]) -> NetDevice<'a> { + pub async fn init(&mut self, clm: &[u8]) { const CHUNK_SIZE: usize = 1024; info!("Downloading CLM..."); @@ -258,12 +251,10 @@ impl<'a> Control<'a> { Timer::after(Duration::from_millis(100)).await; - info!("INIT DONE"); + self.state_ch.set_ethernet_address(mac_addr); + self.state_ch.set_link_state(LinkState::Up); // TODO do on join/leave - NetDevice { - state: self.state, - mac_addr, - } + info!("INIT DONE"); } pub async fn join_open(&mut self, ssid: &str) { @@ -381,75 +372,30 @@ impl<'a> Control<'a> { async fn ioctl(&mut self, kind: IoctlType, cmd: u32, iface: u32, buf: &mut [u8]) -> usize { // TODO cancel ioctl on future drop. - while !matches!(self.state.ioctl_state.get(), IoctlState::Idle) { + while !matches!(self.ioctl_state.get(), IoctlState::Idle) { yield_now().await; } - self.state - .ioctl_state - .set(IoctlState::Pending { kind, cmd, iface, buf }); + self.ioctl_state.set(IoctlState::Pending { kind, cmd, iface, buf }); let resp_len = loop { - if let IoctlState::Done { resp_len } = self.state.ioctl_state.get() { + if let IoctlState::Done { resp_len } = self.ioctl_state.get() { break resp_len; } yield_now().await; }; - self.state.ioctl_state.set(IoctlState::Idle); + self.ioctl_state.set(IoctlState::Idle); resp_len } } -pub struct NetDevice<'a> { - state: &'a State, - mac_addr: [u8; 6], -} - -impl<'a> embassy_net::Device for NetDevice<'a> { - fn register_waker(&mut self, waker: &Waker) { - // loopy loopy wakey wakey - waker.wake_by_ref() - } - - fn link_state(&mut self) -> embassy_net::LinkState { - match self.state.link_up.load(Ordering::Relaxed) { - true => embassy_net::LinkState::Up, - false => embassy_net::LinkState::Down, - } - } - - fn capabilities(&self) -> embassy_net::DeviceCapabilities { - let mut caps = embassy_net::DeviceCapabilities::default(); - caps.max_transmission_unit = 1514; // 1500 IP + 14 ethernet header - caps.medium = embassy_net::Medium::Ethernet; - caps - } - - fn is_transmit_ready(&mut self) -> bool { - true - } - - fn transmit(&mut self, pkt: PacketBuf) { - if self.state.tx_channel.try_send(pkt).is_err() { - warn!("TX failed") - } - } - - fn receive(&mut self) -> Option { - self.state.rx_channel.try_recv().ok() - } - - fn ethernet_address(&self) -> [u8; 6] { - self.mac_addr - } -} - pub struct Runner<'a, PWR, SPI> { + ch: ch::Runner<'a, MTU>, bus: Bus, - state: &'a State, + ioctl_state: &'a Cell, ioctl_id: u16, sdpcm_seq: u8, sdpcm_seq_max: u8, @@ -466,21 +412,27 @@ struct LogState { buf_count: usize, } +pub type NetDriver<'a> = ch::Device<'a, MTU>; + pub async fn new<'a, PWR, SPI>( - state: &'a State, + state: &'a mut State, pwr: PWR, spi: SPI, firmware: &[u8], -) -> (Control<'a>, Runner<'a, PWR, SPI>) +) -> (NetDriver<'a>, Control<'a>, Runner<'a, PWR, SPI>) where PWR: OutputPin, SPI: SpiDevice, SPI::Bus: SpiBusRead + SpiBusWrite, { + let (ch_runner, device) = ch::new(&mut state.ch, [0; 6]); + let state_ch = ch_runner.state_runner(); + let mut runner = Runner { + ch: ch_runner, bus: Bus::new(pwr, spi), - state, + ioctl_state: &state.ioctl_state, ioctl_id: 0, sdpcm_seq: 0, sdpcm_seq_max: 1, @@ -496,7 +448,14 @@ where runner.init(firmware).await; - (Control { state }, runner) + ( + device, + Control { + state_ch, + ioctl_state: &state.ioctl_state, + }, + runner, + ) } impl<'a, PWR, SPI> Runner<'a, PWR, SPI> @@ -662,15 +621,55 @@ where if !self.has_credit() { warn!("TX stalled"); } else { - if let IoctlState::Pending { kind, cmd, iface, buf } = self.state.ioctl_state.get() { + if let IoctlState::Pending { kind, cmd, iface, buf } = self.ioctl_state.get() { self.send_ioctl(kind, cmd, iface, unsafe { &*buf }).await; - self.state.ioctl_state.set(IoctlState::Sent { buf }); + self.ioctl_state.set(IoctlState::Sent { buf }); } if !self.has_credit() { warn!("TX stalled"); } else { - if let Ok(p) = self.state.tx_channel.try_recv() { - self.send_packet(&p).await; + if let Some(packet) = self.ch.try_tx_buf() { + trace!("tx pkt {:02x}", &packet[..packet.len().min(48)]); + + let mut buf = [0; 512]; + let buf8 = slice8_mut(&mut buf); + + let total_len = SdpcmHeader::SIZE + BcdHeader::SIZE + packet.len(); + + let seq = self.sdpcm_seq; + self.sdpcm_seq = self.sdpcm_seq.wrapping_add(1); + + let sdpcm_header = SdpcmHeader { + len: total_len as u16, // TODO does this len need to be rounded up to u32? + len_inv: !total_len as u16, + sequence: seq, + channel_and_flags: CHANNEL_TYPE_DATA, + next_length: 0, + header_length: SdpcmHeader::SIZE as _, + wireless_flow_control: 0, + bus_data_credit: 0, + reserved: [0, 0], + }; + + let bcd_header = BcdHeader { + flags: BDC_VERSION << BDC_VERSION_SHIFT, + priority: 0, + flags2: 0, + data_offset: 0, + }; + trace!("tx {:?}", sdpcm_header); + trace!(" {:?}", bcd_header); + + buf8[0..SdpcmHeader::SIZE].copy_from_slice(&sdpcm_header.to_bytes()); + buf8[SdpcmHeader::SIZE..][..BcdHeader::SIZE].copy_from_slice(&bcd_header.to_bytes()); + buf8[SdpcmHeader::SIZE + BcdHeader::SIZE..][..packet.len()].copy_from_slice(packet); + + let total_len = (total_len + 3) & !3; // round up to 4byte + + trace!(" {:02x}", &buf8[..total_len.min(48)]); + + self.bus.wlan_write(&buf[..(total_len / 4)]).await; + self.ch.tx_done(); } } } @@ -686,7 +685,6 @@ where if status & STATUS_F2_PKT_AVAILABLE != 0 { let len = (status & STATUS_F2_PKT_LEN_MASK) >> STATUS_F2_PKT_LEN_SHIFT; - self.bus.wlan_read(&mut buf[..(len as usize + 3) / 4]).await; trace!("rx {:02x}", &slice8_mut(&mut buf)[..(len as usize).min(48)]); self.rx(&slice8_mut(&mut buf)[..len as usize]); @@ -698,49 +696,6 @@ where } } - async fn send_packet(&mut self, packet: &[u8]) { - trace!("tx pkt {:02x}", &packet[..packet.len().min(48)]); - - let mut buf = [0; 512]; - let buf8 = slice8_mut(&mut buf); - - let total_len = SdpcmHeader::SIZE + BcdHeader::SIZE + packet.len(); - - let seq = self.sdpcm_seq; - self.sdpcm_seq = self.sdpcm_seq.wrapping_add(1); - - let sdpcm_header = SdpcmHeader { - len: total_len as u16, // TODO does this len need to be rounded up to u32? - len_inv: !total_len as u16, - sequence: seq, - channel_and_flags: CHANNEL_TYPE_DATA, - next_length: 0, - header_length: SdpcmHeader::SIZE as _, - wireless_flow_control: 0, - bus_data_credit: 0, - reserved: [0, 0], - }; - - let bcd_header = BcdHeader { - flags: BDC_VERSION << BDC_VERSION_SHIFT, - priority: 0, - flags2: 0, - data_offset: 0, - }; - trace!("tx {:?}", sdpcm_header); - trace!(" {:?}", bcd_header); - - buf8[0..SdpcmHeader::SIZE].copy_from_slice(&sdpcm_header.to_bytes()); - buf8[SdpcmHeader::SIZE..][..BcdHeader::SIZE].copy_from_slice(&bcd_header.to_bytes()); - buf8[SdpcmHeader::SIZE + BcdHeader::SIZE..][..packet.len()].copy_from_slice(packet); - - let total_len = (total_len + 3) & !3; // round up to 4byte - - trace!(" {:02x}", &buf8[..total_len.min(48)]); - - self.bus.wlan_write(&buf[..(total_len / 4)]).await; - } - fn rx(&mut self, packet: &[u8]) { if packet.len() < SdpcmHeader::SIZE { warn!("packet too short, len={}", packet.len()); @@ -775,7 +730,7 @@ where let cdc_header = CdcHeader::from_bytes(payload[..CdcHeader::SIZE].try_into().unwrap()); trace!(" {:?}", cdc_header); - if let IoctlState::Sent { buf } = self.state.ioctl_state.get() { + if let IoctlState::Sent { buf } = self.ioctl_state.get() { if cdc_header.id == self.ioctl_id { if cdc_header.status != 0 { // TODO: propagate error instead @@ -786,7 +741,7 @@ where info!("IOCTL Response: {:02x}", &payload[CdcHeader::SIZE..][..resp_len]); (unsafe { &mut *buf }[..resp_len]).copy_from_slice(&payload[CdcHeader::SIZE..][..resp_len]); - self.state.ioctl_state.set(IoctlState::Done { resp_len }); + self.ioctl_state.set(IoctlState::Done { resp_len }); } } } @@ -859,11 +814,12 @@ where let packet = &payload[packet_start..]; trace!("rx pkt {:02x}", &packet[..(packet.len() as usize).min(48)]); - let mut p = unwrap!(embassy_net::PacketBox::new(embassy_net::Packet::new())); - p[..packet.len()].copy_from_slice(packet); - - if let Err(_) = self.state.rx_channel.try_send(p.slice(0..packet.len())) { - warn!("failed to push rxd packet to the channel.") + match self.ch.try_rx_buf() { + Some(buf) => { + buf[..packet.len()].copy_from_slice(packet); + self.ch.rx_done(packet.len()) + } + None => warn!("failed to push rxd packet to the channel."), } } _ => {} From 871700f05dbd30aac71d6a3b5446e7743a18b90b Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Mattias=20Gr=C3=B6nlund?= Date: Sat, 31 Dec 2022 16:25:37 +0100 Subject: [PATCH 056/130] Fixed length for wlan_read. The length provided in command word for FUNC_WLAN READ, should describe the actual bytes requested, not the size of the buffer which is sized in u32. --- src/bus.rs | 7 ++++--- src/lib.rs | 2 +- 2 files changed, 5 insertions(+), 4 deletions(-) diff --git a/src/bus.rs b/src/bus.rs index f220cffc..f64c0abb 100644 --- a/src/bus.rs +++ b/src/bus.rs @@ -48,11 +48,12 @@ where assert_eq!(val, TEST_PATTERN); } - pub async fn wlan_read(&mut self, buf: &mut [u32]) { - let cmd = cmd_word(READ, INC_ADDR, FUNC_WLAN, 0, buf.len() as u32 * 4); + pub async fn wlan_read(&mut self, buf: &mut [u32], len_in_u8: u32) { + let cmd = cmd_word(READ, INC_ADDR, FUNC_WLAN, 0, len_in_u8); + let len_in_u32 = (len_in_u8 as usize + 3) / 4; transaction!(&mut self.spi, |bus| async { bus.write(&[cmd]).await?; - bus.read(buf).await?; + bus.read(&mut buf[..len_in_u32]).await?; Ok(()) }) .await diff --git a/src/lib.rs b/src/lib.rs index fa73b32e..a606d6be 100644 --- a/src/lib.rs +++ b/src/lib.rs @@ -687,7 +687,7 @@ where if status & STATUS_F2_PKT_AVAILABLE != 0 { let len = (status & STATUS_F2_PKT_LEN_MASK) >> STATUS_F2_PKT_LEN_SHIFT; - self.bus.wlan_read(&mut buf[..(len as usize + 3) / 4]).await; + self.bus.wlan_read(&mut buf, len).await; trace!("rx {:02x}", &slice8_mut(&mut buf)[..(len as usize).min(48)]); self.rx(&slice8_mut(&mut buf)[..len as usize]); } From 001610f0d0b94859b8c8800dcdfa255343f2ea05 Mon Sep 17 00:00:00 2001 From: Lukas Krejci Date: Wed, 30 Nov 2022 15:57:52 +0100 Subject: [PATCH 057/130] Be able to specify the power management mode at init time. --- examples/rpi-pico-w/src/main.rs | 2 +- src/lib.rs | 106 +++++++++++++++++++++++++++++--- 2 files changed, 100 insertions(+), 8 deletions(-) diff --git a/examples/rpi-pico-w/src/main.rs b/examples/rpi-pico-w/src/main.rs index fd58e46d..73cfdf42 100644 --- a/examples/rpi-pico-w/src/main.rs +++ b/examples/rpi-pico-w/src/main.rs @@ -70,7 +70,7 @@ async fn main(spawner: Spawner) { spawner.spawn(wifi_task(runner)).unwrap(); - control.init(clm).await; + control.init(clm, cyw43::PowerManagementMode::PowerSave).await; //control.join_open(env!("WIFI_NETWORK")).await; control.join_wpa2(env!("WIFI_NETWORK"), env!("WIFI_PASSWORD")).await; diff --git a/src/lib.rs b/src/lib.rs index 94032271..884cb082 100644 --- a/src/lib.rs +++ b/src/lib.rs @@ -143,8 +143,92 @@ pub struct Control<'a> { ioctl_state: &'a Cell, } +#[derive(Debug, Clone, Copy, PartialEq, Eq)] +pub enum PowerManagementMode { + /// Custom, officially unsupported mode. Use at your own risk. + /// All power-saving features set to their max at only a marginal decrease in power consumption + /// as oppposed to `Aggressive`. + SuperSave, + + /// Aggressive power saving mode. + Aggressive, + + /// The default mode. + PowerSave, + + /// Performance is prefered over power consumption but still some power is conserved as opposed to + /// `None`. + Performance, + + /// Unlike all the other PM modes, this lowers the power consumption at all times at the cost of + /// a much lower throughput. + ThroughputThrottling, + + /// No power management is configured. This consumes the most power. + None, +} + +impl Default for PowerManagementMode { + fn default() -> Self { + Self::PowerSave + } +} + +impl PowerManagementMode { + fn sleep_ret_ms(&self) -> u16 { + match self { + PowerManagementMode::SuperSave => 2000, + PowerManagementMode::Aggressive => 2000, + PowerManagementMode::PowerSave => 200, + PowerManagementMode::Performance => 20, + PowerManagementMode::ThroughputThrottling => 0, // value doesn't matter + PowerManagementMode::None => 0, // value doesn't matter + } + } + + fn beacon_period(&self) -> u8 { + match self { + PowerManagementMode::SuperSave => 255, + PowerManagementMode::Aggressive => 1, + PowerManagementMode::PowerSave => 1, + PowerManagementMode::Performance => 1, + PowerManagementMode::ThroughputThrottling => 0, // value doesn't matter + PowerManagementMode::None => 0, // value doesn't matter + } + } + + fn dtim_period(&self) -> u8 { + match self { + PowerManagementMode::SuperSave => 255, + PowerManagementMode::Aggressive => 1, + PowerManagementMode::PowerSave => 1, + PowerManagementMode::Performance => 1, + PowerManagementMode::ThroughputThrottling => 0, // value doesn't matter + PowerManagementMode::None => 0, // value doesn't matter + } + } + + fn assoc(&self) -> u8 { + match self { + PowerManagementMode::SuperSave => 255, + PowerManagementMode::Aggressive => 10, + PowerManagementMode::PowerSave => 10, + PowerManagementMode::Performance => 1, + PowerManagementMode::ThroughputThrottling => 0, // value doesn't matter + PowerManagementMode::None => 0, // value doesn't matter + } + } + + fn mode(&self) -> u32 { + match self { + PowerManagementMode::ThroughputThrottling => 1, + _ => 2, + } + } +} + impl<'a> Control<'a> { - pub async fn init(&mut self, clm: &[u8]) { + pub async fn init(&mut self, clm: &[u8], power_save_mode: PowerManagementMode) { const CHUNK_SIZE: usize = 1024; info!("Downloading CLM..."); @@ -239,12 +323,20 @@ impl<'a> Control<'a> { Timer::after(Duration::from_millis(100)).await; - // power save mode 2 - self.set_iovar_u32("pm2_sleep_ret", 0xc8).await; - self.set_iovar_u32("bcn_li_bcn", 1).await; - self.set_iovar_u32("bcn_li_dtim", 1).await; - self.set_iovar_u32("assoc_listen", 10).await; - self.ioctl_set_u32(0x86, 0, 2).await; + // power save mode + if power_save_mode != PowerManagementMode::None { + let mode = power_save_mode.mode(); + if mode == 2 { + self.set_iovar_u32("pm2_sleep_ret", power_save_mode.sleep_ret_ms() as u32) + .await; + self.set_iovar_u32("bcn_li_bcn", power_save_mode.beacon_period() as u32) + .await; + self.set_iovar_u32("bcn_li_dtim", power_save_mode.dtim_period() as u32) + .await; + self.set_iovar_u32("assoc_listen", power_save_mode.assoc() as u32).await; + } + self.ioctl_set_u32(86, 0, mode).await; + } self.ioctl_set_u32(110, 0, 1).await; // SET_GMODE = auto self.ioctl_set_u32(142, 0, 0).await; // SET_BAND = any From a2bae33d8460eee6c3af6f20a790f725cf2c5602 Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Mon, 2 Jan 2023 21:36:17 +0100 Subject: [PATCH 058/130] Add separate function to set power management mode. --- examples/rpi-pico-w/src/main.rs | 5 ++++- src/lib.rs | 29 +++++++++++++---------------- 2 files changed, 17 insertions(+), 17 deletions(-) diff --git a/examples/rpi-pico-w/src/main.rs b/examples/rpi-pico-w/src/main.rs index 73cfdf42..d2f47fd6 100644 --- a/examples/rpi-pico-w/src/main.rs +++ b/examples/rpi-pico-w/src/main.rs @@ -70,7 +70,10 @@ async fn main(spawner: Spawner) { spawner.spawn(wifi_task(runner)).unwrap(); - control.init(clm, cyw43::PowerManagementMode::PowerSave).await; + control.init(clm).await; + control + .set_power_management(cyw43::PowerManagementMode::PowerSave) + .await; //control.join_open(env!("WIFI_NETWORK")).await; control.join_wpa2(env!("WIFI_NETWORK"), env!("WIFI_PASSWORD")).await; diff --git a/src/lib.rs b/src/lib.rs index 884cb082..5733506a 100644 --- a/src/lib.rs +++ b/src/lib.rs @@ -228,7 +228,7 @@ impl PowerManagementMode { } impl<'a> Control<'a> { - pub async fn init(&mut self, clm: &[u8], power_save_mode: PowerManagementMode) { + pub async fn init(&mut self, clm: &[u8]) { const CHUNK_SIZE: usize = 1024; info!("Downloading CLM..."); @@ -323,21 +323,6 @@ impl<'a> Control<'a> { Timer::after(Duration::from_millis(100)).await; - // power save mode - if power_save_mode != PowerManagementMode::None { - let mode = power_save_mode.mode(); - if mode == 2 { - self.set_iovar_u32("pm2_sleep_ret", power_save_mode.sleep_ret_ms() as u32) - .await; - self.set_iovar_u32("bcn_li_bcn", power_save_mode.beacon_period() as u32) - .await; - self.set_iovar_u32("bcn_li_dtim", power_save_mode.dtim_period() as u32) - .await; - self.set_iovar_u32("assoc_listen", power_save_mode.assoc() as u32).await; - } - self.ioctl_set_u32(86, 0, mode).await; - } - self.ioctl_set_u32(110, 0, 1).await; // SET_GMODE = auto self.ioctl_set_u32(142, 0, 0).await; // SET_BAND = any @@ -349,6 +334,18 @@ impl<'a> Control<'a> { info!("INIT DONE"); } + pub async fn set_power_management(&mut self, mode: PowerManagementMode) { + // power save mode + let mode_num = mode.mode(); + if mode_num == 2 { + self.set_iovar_u32("pm2_sleep_ret", mode.sleep_ret_ms() as u32).await; + self.set_iovar_u32("bcn_li_bcn", mode.beacon_period() as u32).await; + self.set_iovar_u32("bcn_li_dtim", mode.dtim_period() as u32).await; + self.set_iovar_u32("assoc_listen", mode.assoc() as u32).await; + } + self.ioctl_set_u32(86, 0, mode_num).await; + } + pub async fn join_open(&mut self, ssid: &str) { self.set_iovar_u32("ampdu_ba_wsize", 8).await; From 0bcd1b1e10e0edefa520ba3f293d34367b416c99 Mon Sep 17 00:00:00 2001 From: Aaron Tsui Date: Wed, 15 Feb 2023 11:08:27 +0800 Subject: [PATCH 059/130] update embassy dependences --- examples/rpi-pico-w/Cargo.toml | 16 ++++++++-------- examples/rpi-pico-w/src/main.rs | 8 ++++---- 2 files changed, 12 insertions(+), 12 deletions(-) diff --git a/examples/rpi-pico-w/Cargo.toml b/examples/rpi-pico-w/Cargo.toml index fa1cad8c..99b82ca3 100644 --- a/examples/rpi-pico-w/Cargo.toml +++ b/examples/rpi-pico-w/Cargo.toml @@ -28,14 +28,14 @@ heapless = "0.7.15" [patch.crates-io] -embassy-executor = { git = "https://github.com/embassy-rs/embassy", rev = "771806be790a2758f1314d6460defe7c2f0d3e99" } -embassy-time = { git = "https://github.com/embassy-rs/embassy", rev = "771806be790a2758f1314d6460defe7c2f0d3e99" } -embassy-futures = { git = "https://github.com/embassy-rs/embassy", rev = "771806be790a2758f1314d6460defe7c2f0d3e99" } -embassy-sync = { git = "https://github.com/embassy-rs/embassy", rev = "771806be790a2758f1314d6460defe7c2f0d3e99" } -embassy-rp = { git = "https://github.com/embassy-rs/embassy", rev = "771806be790a2758f1314d6460defe7c2f0d3e99" } -embassy-net = { git = "https://github.com/embassy-rs/embassy", rev = "771806be790a2758f1314d6460defe7c2f0d3e99" } -embassy-net-driver = { git = "https://github.com/embassy-rs/embassy", rev = "771806be790a2758f1314d6460defe7c2f0d3e99" } -embassy-net-driver-channel = { git = "https://github.com/embassy-rs/embassy", rev = "771806be790a2758f1314d6460defe7c2f0d3e99" } +embassy-executor = { git = "https://github.com/embassy-rs/embassy", rev = "e3f8020c3bdf726dfa451b5b190f27191507a18f" } +embassy-time = { git = "https://github.com/embassy-rs/embassy", rev = "e3f8020c3bdf726dfa451b5b190f27191507a18f" } +embassy-futures = { git = "https://github.com/embassy-rs/embassy", rev = "e3f8020c3bdf726dfa451b5b190f27191507a18f" } +embassy-sync = { git = "https://github.com/embassy-rs/embassy", rev = "e3f8020c3bdf726dfa451b5b190f27191507a18f" } +embassy-rp = { git = "https://github.com/embassy-rs/embassy", rev = "e3f8020c3bdf726dfa451b5b190f27191507a18f" } +embassy-net = { git = "https://github.com/embassy-rs/embassy", rev = "e3f8020c3bdf726dfa451b5b190f27191507a18f" } +embassy-net-driver = { git = "https://github.com/embassy-rs/embassy", rev = "e3f8020c3bdf726dfa451b5b190f27191507a18f" } +embassy-net-driver-channel = { git = "https://github.com/embassy-rs/embassy", rev = "e3f8020c3bdf726dfa451b5b190f27191507a18f" } [profile.dev] debug = 2 diff --git a/examples/rpi-pico-w/src/main.rs b/examples/rpi-pico-w/src/main.rs index d2f47fd6..71459a12 100644 --- a/examples/rpi-pico-w/src/main.rs +++ b/examples/rpi-pico-w/src/main.rs @@ -9,7 +9,7 @@ use core::convert::Infallible; use defmt::*; use embassy_executor::Spawner; use embassy_net::tcp::TcpSocket; -use embassy_net::{Stack, StackResources}; +use embassy_net::{Config, Stack, StackResources}; use embassy_rp::gpio::{Flex, Level, Output}; use embassy_rp::peripherals::{PIN_23, PIN_24, PIN_25, PIN_29}; use embedded_hal_1::spi::ErrorType; @@ -78,8 +78,8 @@ async fn main(spawner: Spawner) { //control.join_open(env!("WIFI_NETWORK")).await; control.join_wpa2(env!("WIFI_NETWORK"), env!("WIFI_PASSWORD")).await; - let config = embassy_net::ConfigStrategy::Dhcp; - //let config = embassy_net::ConfigStrategy::Static(embassy_net::Config { + let config = Config::Dhcp(Default::default()); + //let config = embassy_net::Config::Static(embassy_net::Config { // address: Ipv4Cidr::new(Ipv4Address::new(192, 168, 69, 2), 24), // dns_servers: Vec::new(), // gateway: Some(Ipv4Address::new(192, 168, 69, 1)), @@ -92,7 +92,7 @@ async fn main(spawner: Spawner) { let stack = &*singleton!(Stack::new( net_device, config, - singleton!(StackResources::<1, 2, 8>::new()), + singleton!(StackResources::<2>::new()), seed )); From f34829f534297dfccb1c5b206bffcc7700ef86ae Mon Sep 17 00:00:00 2001 From: Pol Fernandez Date: Mon, 20 Feb 2023 21:03:39 +0100 Subject: [PATCH 060/130] Add stringify function --- examples/rpi-pico-w/src/main.rs | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) diff --git a/examples/rpi-pico-w/src/main.rs b/examples/rpi-pico-w/src/main.rs index 71459a12..e71c2234 100644 --- a/examples/rpi-pico-w/src/main.rs +++ b/examples/rpi-pico-w/src/main.rs @@ -18,6 +18,9 @@ use embedded_io::asynch::Write; use static_cell::StaticCell; use {defmt_rtt as _, panic_probe as _}; +use heapless::String; + + macro_rules! singleton { ($val:expr) => {{ type T = impl Sized; @@ -129,7 +132,8 @@ async fn main(spawner: Spawner) { } }; - info!("rxd {:02x}", &buf[..n]); + info!("rxd {}", asciify(&buf[..n])); + match socket.write_all(&buf[..n]).await { Ok(()) => {} @@ -214,3 +218,7 @@ impl SpiBusWrite for MySpi { Ok(()) } } + +fn asciify(buf: &[u8],) -> String<4096> { + buf.into_iter().map(|c| *c as char).into_iter().collect() +} From f6f041b05d9702982e3cf56bb76f7904485677c8 Mon Sep 17 00:00:00 2001 From: Pol Fernandez Date: Tue, 21 Feb 2023 08:52:57 +0100 Subject: [PATCH 061/130] Add from_utf8 --- examples/rpi-pico-w/src/main.rs | 11 +++-------- 1 file changed, 3 insertions(+), 8 deletions(-) diff --git a/examples/rpi-pico-w/src/main.rs b/examples/rpi-pico-w/src/main.rs index e71c2234..c706e121 100644 --- a/examples/rpi-pico-w/src/main.rs +++ b/examples/rpi-pico-w/src/main.rs @@ -1,4 +1,4 @@ -#![no_std] +#![no_std] #![no_main] #![feature(type_alias_impl_trait)] #![feature(async_fn_in_trait)] @@ -18,8 +18,7 @@ use embedded_io::asynch::Write; use static_cell::StaticCell; use {defmt_rtt as _, panic_probe as _}; -use heapless::String; - +use core::str::from_utf8; macro_rules! singleton { ($val:expr) => {{ @@ -132,7 +131,7 @@ async fn main(spawner: Spawner) { } }; - info!("rxd {}", asciify(&buf[..n])); + info!("rxd {}", from_utf8(&buf[..n]).unwrap()); match socket.write_all(&buf[..n]).await { @@ -218,7 +217,3 @@ impl SpiBusWrite for MySpi { Ok(()) } } - -fn asciify(buf: &[u8],) -> String<4096> { - buf.into_iter().map(|c| *c as char).into_iter().collect() -} From d57fe0de867cfc6510f0192fab488355d9ae8586 Mon Sep 17 00:00:00 2001 From: kbleeke Date: Sun, 19 Feb 2023 16:31:33 +0100 Subject: [PATCH 062/130] Custom Bus Trait to support PIO --- examples/rpi-pico-w/build.rs | 34 +++++------ examples/rpi-pico-w/src/main.rs | 11 ++++ src/bus.rs | 100 +++++++++++++++++++++++--------- src/lib.rs | 8 ++- 4 files changed, 104 insertions(+), 49 deletions(-) diff --git a/examples/rpi-pico-w/build.rs b/examples/rpi-pico-w/build.rs index 3f915f93..d4c3ec89 100644 --- a/examples/rpi-pico-w/build.rs +++ b/examples/rpi-pico-w/build.rs @@ -14,23 +14,23 @@ use std::io::Write; use std::path::PathBuf; fn main() { - // Put `memory.x` in our output directory and ensure it's - // on the linker search path. - let out = &PathBuf::from(env::var_os("OUT_DIR").unwrap()); - File::create(out.join("memory.x")) - .unwrap() - .write_all(include_bytes!("memory.x")) - .unwrap(); - println!("cargo:rustc-link-search={}", out.display()); + // // Put `memory.x` in our output directory and ensure it's + // // on the linker search path. + // let out = &PathBuf::from(env::var_os("OUT_DIR").unwrap()); + // File::create(out.join("memory.x")) + // .unwrap() + // .write_all(include_bytes!("memory.x")) + // .unwrap(); + // println!("cargo:rustc-link-search={}", out.display()); - // By default, Cargo will re-run a build script whenever - // any file in the project changes. By specifying `memory.x` - // here, we ensure the build script is only re-run when - // `memory.x` is changed. - println!("cargo:rerun-if-changed=memory.x"); + // // By default, Cargo will re-run a build script whenever + // // any file in the project changes. By specifying `memory.x` + // // here, we ensure the build script is only re-run when + // // `memory.x` is changed. + // println!("cargo:rerun-if-changed=memory.x"); - println!("cargo:rustc-link-arg-bins=--nmagic"); - println!("cargo:rustc-link-arg-bins=-Tlink.x"); - println!("cargo:rustc-link-arg-bins=-Tlink-rp.x"); - println!("cargo:rustc-link-arg-bins=-Tdefmt.x"); + // println!("cargo:rustc-link-arg-bins=--nmagic"); + // println!("cargo:rustc-link-arg-bins=-Tlink.x"); + // println!("cargo:rustc-link-arg-bins=-Tlink-rp.x"); + // println!("cargo:rustc-link-arg-bins=-Tdefmt.x"); } diff --git a/examples/rpi-pico-w/src/main.rs b/examples/rpi-pico-w/src/main.rs index c706e121..f768af19 100644 --- a/examples/rpi-pico-w/src/main.rs +++ b/examples/rpi-pico-w/src/main.rs @@ -161,6 +161,17 @@ impl ErrorType for MySpi { type Error = Infallible; } +impl cyw43::SpiBusCyw43 for MySpi { + async fn cmd_write<'a>(&'a mut self, write: &'a [u32]) -> Result<(), Self::Error> { + self.write(write).await + } + + async fn cmd_read<'a>(&'a mut self, write: &'a [u32], read: &'a mut [u32]) -> Result<(), Self::Error> { + self.write(write).await?; + self.read(read).await + } +} + impl SpiBusFlush for MySpi { async fn flush(&mut self) -> Result<(), Self::Error> { Ok(()) diff --git a/src/bus.rs b/src/bus.rs index f64c0abb..1c8bb989 100644 --- a/src/bus.rs +++ b/src/bus.rs @@ -2,10 +2,23 @@ use core::slice; use embassy_time::{Duration, Timer}; use embedded_hal_1::digital::OutputPin; +use embedded_hal_1::spi::ErrorType; use embedded_hal_async::spi::{transaction, SpiBusRead, SpiBusWrite, SpiDevice}; use crate::consts::*; +/// Custom Spi Trait that _only_ supports the bus operation of the cyw43 +pub trait SpiBusCyw43: ErrorType { + /// Issues a write command on the bus + /// Frist 32 bits of `word` are expected to be a cmd word + async fn cmd_write<'a>(&'a mut self, write: &'a [Word]) -> Result<(), Self::Error>; + + /// Issues a read command on the bus + /// `write` is expected to be a 32 bit cmd word + /// `read` will contain the response of the device + async fn cmd_read<'a>(&'a mut self, write: &'a [Word], read: &'a mut [Word]) -> Result<(), Self::Error>; +} + pub(crate) struct Bus { backplane_window: u32, pwr: PWR, @@ -16,7 +29,7 @@ impl Bus where PWR: OutputPin, SPI: SpiDevice, - SPI::Bus: SpiBusRead + SpiBusWrite, + SPI::Bus: SpiBusCyw43, { pub(crate) fn new(pwr: PWR, spi: SPI) -> Self { Self { @@ -52,8 +65,9 @@ where let cmd = cmd_word(READ, INC_ADDR, FUNC_WLAN, 0, len_in_u8); let len_in_u32 = (len_in_u8 as usize + 3) / 4; transaction!(&mut self.spi, |bus| async { - bus.write(&[cmd]).await?; - bus.read(&mut buf[..len_in_u32]).await?; + // bus.write(&[cmd]).await?; + // bus.read(&mut buf[..len_in_u32]).await?; + bus.cmd_read(slice::from_ref(&cmd), &mut buf[..len_in_u32]).await?; Ok(()) }) .await @@ -62,9 +76,16 @@ where pub async fn wlan_write(&mut self, buf: &[u32]) { let cmd = cmd_word(WRITE, INC_ADDR, FUNC_WLAN, 0, buf.len() as u32 * 4); + //TODO try to remove copy? + let mut cmd_buf = [0_u32; 513]; + cmd_buf[0] = cmd; + cmd_buf[1..][..buf.len()].copy_from_slice(buf); + transaction!(&mut self.spi, |bus| async { - bus.write(&[cmd]).await?; - bus.write(buf).await?; + // bus.write(&[cmd]).await?; + // bus.write(buf).await?; + + bus.cmd_write(&cmd_buf).await?; Ok(()) }) .await @@ -79,7 +100,7 @@ where // To simplify, enforce 4-align for now. assert!(addr % 4 == 0); - let mut buf = [0u32; BACKPLANE_MAX_TRANSFER_SIZE / 4]; + let mut buf = [0u32; BACKPLANE_MAX_TRANSFER_SIZE / 4 + 1]; while !data.is_empty() { // Ensure transfer doesn't cross a window boundary. @@ -93,20 +114,23 @@ where let cmd = cmd_word(READ, INC_ADDR, FUNC_BACKPLANE, window_offs, len as u32); transaction!(&mut self.spi, |bus| async { - bus.write(&[cmd]).await?; + // bus.write(&[cmd]).await?; - // 4-byte response delay. - let mut junk = [0; 1]; - bus.read(&mut junk).await?; + // // 4-byte response delay. + // let mut junk = [0; 1]; + // bus.read(&mut junk).await?; - // Read data - bus.read(&mut buf[..(len + 3) / 4]).await?; + // // Read data + // bus.read(&mut buf[..(len + 3) / 4]).await?; + + bus.cmd_read(slice::from_ref(&cmd), &mut buf[..(len + 3) / 4 + 1]) + .await?; Ok(()) }) .await .unwrap(); - data[..len].copy_from_slice(&slice8_mut(&mut buf)[..len]); + data[..len].copy_from_slice(&slice8_mut(&mut buf[1..])[..len]); // Advance ptr. addr += len as u32; @@ -121,7 +145,7 @@ where // To simplify, enforce 4-align for now. assert!(addr % 4 == 0); - let mut buf = [0u32; BACKPLANE_MAX_TRANSFER_SIZE / 4]; + let mut buf = [0u32; BACKPLANE_MAX_TRANSFER_SIZE / 4 + 1]; while !data.is_empty() { // Ensure transfer doesn't cross a window boundary. @@ -129,15 +153,19 @@ where let window_remaining = BACKPLANE_WINDOW_SIZE - window_offs as usize; let len = data.len().min(BACKPLANE_MAX_TRANSFER_SIZE).min(window_remaining); - slice8_mut(&mut buf)[..len].copy_from_slice(&data[..len]); + slice8_mut(&mut buf[1..])[..len].copy_from_slice(&data[..len]); self.backplane_set_window(addr).await; let cmd = cmd_word(WRITE, INC_ADDR, FUNC_BACKPLANE, window_offs, len as u32); + buf[0] = cmd; transaction!(&mut self.spi, |bus| async { - bus.write(&[cmd]).await?; - bus.write(&buf[..(len + 3) / 4]).await?; + // bus.write(&[cmd]).await?; + // bus.write(&buf[..(len + 3) / 4]).await?; + + bus.cmd_write(&buf[..(len + 3) / 4 + 1]).await?; + Ok(()) }) .await @@ -253,28 +281,36 @@ where async fn readn(&mut self, func: u32, addr: u32, len: u32) -> u32 { let cmd = cmd_word(READ, INC_ADDR, func, addr, len); - let mut buf = [0; 1]; + let mut buf = [0; 2]; + let len = if func == FUNC_BACKPLANE { 2 } else { 1 }; transaction!(&mut self.spi, |bus| async { - bus.write(&[cmd]).await?; - if func == FUNC_BACKPLANE { - // 4-byte response delay. - bus.read(&mut buf).await?; - } - bus.read(&mut buf).await?; + // bus.write(&[cmd]).await?; + // if func == FUNC_BACKPLANE { + // // 4-byte response delay. + // bus.read(&mut buf).await?; + // } + // bus.read(&mut buf).await?; + + bus.cmd_read(slice::from_ref(&cmd), &mut buf[..len]).await?; Ok(()) }) .await .unwrap(); - buf[0] + if func == FUNC_BACKPLANE { + buf[1] + } else { + buf[0] + } } async fn writen(&mut self, func: u32, addr: u32, val: u32, len: u32) { let cmd = cmd_word(WRITE, INC_ADDR, func, addr, len); transaction!(&mut self.spi, |bus| async { - bus.write(&[cmd, val]).await?; + // bus.write(&[cmd, val]).await?; + bus.cmd_write(&[cmd, val]).await?; Ok(()) }) .await @@ -283,11 +319,14 @@ where async fn read32_swapped(&mut self, addr: u32) -> u32 { let cmd = cmd_word(READ, INC_ADDR, FUNC_BUS, addr, 4); + let cmd = swap16(cmd); let mut buf = [0; 1]; transaction!(&mut self.spi, |bus| async { - bus.write(&[swap16(cmd)]).await?; - bus.read(&mut buf).await?; + // bus.write(&[swap16(cmd)]).await?; + // bus.read(&mut buf).await?; + + bus.cmd_read(slice::from_ref(&cmd), &mut buf).await?; Ok(()) }) .await @@ -298,9 +337,12 @@ where async fn write32_swapped(&mut self, addr: u32, val: u32) { let cmd = cmd_word(WRITE, INC_ADDR, FUNC_BUS, addr, 4); + let buf = [swap16(cmd), swap16(val)]; transaction!(&mut self.spi, |bus| async { - bus.write(&[swap16(cmd), swap16(val)]).await?; + // bus.write(&[swap16(cmd), swap16(val)]).await?; + + bus.cmd_write(&buf).await?; Ok(()) }) .await diff --git a/src/lib.rs b/src/lib.rs index 5733506a..7bf3992c 100644 --- a/src/lib.rs +++ b/src/lib.rs @@ -1,6 +1,7 @@ #![no_std] #![no_main] -#![feature(type_alias_impl_trait, concat_bytes)] +#![allow(incomplete_features)] +#![feature(async_fn_in_trait, type_alias_impl_trait, concat_bytes)] #![deny(unused_must_use)] // This mod MUST go first, so that the others see its macros. @@ -24,6 +25,7 @@ use embedded_hal_1::digital::OutputPin; use embedded_hal_async::spi::{SpiBusRead, SpiBusWrite, SpiDevice}; use crate::bus::Bus; +pub use crate::bus::SpiBusCyw43; use crate::consts::*; use crate::events::Event; use crate::structs::*; @@ -512,7 +514,7 @@ pub async fn new<'a, PWR, SPI>( where PWR: OutputPin, SPI: SpiDevice, - SPI::Bus: SpiBusRead + SpiBusWrite, + SPI::Bus: SpiBusCyw43, { let (ch_runner, device) = ch::new(&mut state.ch, [0; 6]); let state_ch = ch_runner.state_runner(); @@ -551,7 +553,7 @@ impl<'a, PWR, SPI> Runner<'a, PWR, SPI> where PWR: OutputPin, SPI: SpiDevice, - SPI::Bus: SpiBusRead + SpiBusWrite, + SPI::Bus: SpiBusCyw43, { async fn init(&mut self, firmware: &[u8]) { self.bus.init().await; From 0ff606dfc151b1b3812087b7508fdf4bee3b240b Mon Sep 17 00:00:00 2001 From: kbleeke Date: Sun, 19 Feb 2023 16:31:35 +0100 Subject: [PATCH 063/130] Add pio transport to pico w example --- examples/rpi-pico-w/Cargo.toml | 40 +++++-- examples/rpi-pico-w/build.rs | 34 +++--- examples/rpi-pico-w/src/main.rs | 29 +++-- examples/rpi-pico-w/src/pio.rs | 190 ++++++++++++++++++++++++++++++++ src/bus.rs | 2 +- src/lib.rs | 2 +- 6 files changed, 263 insertions(+), 34 deletions(-) create mode 100644 examples/rpi-pico-w/src/pio.rs diff --git a/examples/rpi-pico-w/Cargo.toml b/examples/rpi-pico-w/Cargo.toml index 99b82ca3..0d789a93 100644 --- a/examples/rpi-pico-w/Cargo.toml +++ b/examples/rpi-pico-w/Cargo.toml @@ -5,11 +5,31 @@ edition = "2021" [dependencies] -cyw43 = { path = "../../", features = ["defmt", "firmware-logs"]} -embassy-executor = { version = "0.1.0", features = ["defmt", "integrated-timers"] } -embassy-time = { version = "0.1.0", features = ["defmt", "defmt-timestamp-uptime"] } -embassy-rp = { version = "0.1.0", features = ["defmt", "unstable-traits", "nightly", "unstable-pac", "time-driver"] } -embassy-net = { version = "0.1.0", features = ["defmt", "tcp", "dhcpv4", "medium-ethernet", "unstable-traits", "nightly"] } +cyw43 = { path = "../../", features = ["defmt", "firmware-logs"] } +embassy-executor = { version = "0.1.0", features = [ + "defmt", + "integrated-timers", +] } +embassy-time = { version = "0.1.0", features = [ + "defmt", + "defmt-timestamp-uptime", +] } +embassy-rp = { version = "0.1.0", features = [ + "defmt", + "unstable-traits", + "nightly", + "unstable-pac", + "pio", + "time-driver", +] } +embassy-net = { version = "0.1.0", features = [ + "defmt", + "tcp", + "dhcpv4", + "medium-ethernet", + "unstable-traits", + "nightly", +] } atomic-polyfill = "0.1.5" static_cell = "1.0" @@ -17,9 +37,15 @@ defmt = "0.3" defmt-rtt = "0.3" panic-probe = { version = "0.3", features = ["print-defmt"] } -cortex-m = { version = "0.7.6", features = ["critical-section-single-core"]} +cortex-m = { version = "0.7.6", features = ["critical-section-single-core"] } cortex-m-rt = "0.7.0" -futures = { version = "0.3.17", default-features = false, features = ["async-await", "cfg-target-has-atomic", "unstable"] } +futures = { version = "0.3.17", default-features = false, features = [ + "async-await", + "cfg-target-has-atomic", + "unstable", +] } +pio-proc = "0.2" +pio = "0.2.1" embedded-hal-1 = { package = "embedded-hal", version = "1.0.0-alpha.9" } embedded-hal-async = { version = "0.2.0-alpha.0" } diff --git a/examples/rpi-pico-w/build.rs b/examples/rpi-pico-w/build.rs index d4c3ec89..3f915f93 100644 --- a/examples/rpi-pico-w/build.rs +++ b/examples/rpi-pico-w/build.rs @@ -14,23 +14,23 @@ use std::io::Write; use std::path::PathBuf; fn main() { - // // Put `memory.x` in our output directory and ensure it's - // // on the linker search path. - // let out = &PathBuf::from(env::var_os("OUT_DIR").unwrap()); - // File::create(out.join("memory.x")) - // .unwrap() - // .write_all(include_bytes!("memory.x")) - // .unwrap(); - // println!("cargo:rustc-link-search={}", out.display()); + // Put `memory.x` in our output directory and ensure it's + // on the linker search path. + let out = &PathBuf::from(env::var_os("OUT_DIR").unwrap()); + File::create(out.join("memory.x")) + .unwrap() + .write_all(include_bytes!("memory.x")) + .unwrap(); + println!("cargo:rustc-link-search={}", out.display()); - // // By default, Cargo will re-run a build script whenever - // // any file in the project changes. By specifying `memory.x` - // // here, we ensure the build script is only re-run when - // // `memory.x` is changed. - // println!("cargo:rerun-if-changed=memory.x"); + // By default, Cargo will re-run a build script whenever + // any file in the project changes. By specifying `memory.x` + // here, we ensure the build script is only re-run when + // `memory.x` is changed. + println!("cargo:rerun-if-changed=memory.x"); - // println!("cargo:rustc-link-arg-bins=--nmagic"); - // println!("cargo:rustc-link-arg-bins=-Tlink.x"); - // println!("cargo:rustc-link-arg-bins=-Tlink-rp.x"); - // println!("cargo:rustc-link-arg-bins=-Tdefmt.x"); + println!("cargo:rustc-link-arg-bins=--nmagic"); + println!("cargo:rustc-link-arg-bins=-Tlink.x"); + println!("cargo:rustc-link-arg-bins=-Tlink-rp.x"); + println!("cargo:rustc-link-arg-bins=-Tdefmt.x"); } diff --git a/examples/rpi-pico-w/src/main.rs b/examples/rpi-pico-w/src/main.rs index f768af19..3563d165 100644 --- a/examples/rpi-pico-w/src/main.rs +++ b/examples/rpi-pico-w/src/main.rs @@ -4,21 +4,25 @@ #![feature(async_fn_in_trait)] #![allow(incomplete_features)] +mod pio; + use core::convert::Infallible; +use core::str::from_utf8; use defmt::*; use embassy_executor::Spawner; use embassy_net::tcp::TcpSocket; use embassy_net::{Config, Stack, StackResources}; use embassy_rp::gpio::{Flex, Level, Output}; -use embassy_rp::peripherals::{PIN_23, PIN_24, PIN_25, PIN_29}; +use embassy_rp::peripherals::{DMA_CH0, PIN_23, PIN_24, PIN_25, PIN_29}; +use embassy_rp::pio::{Pio0, PioPeripherial, PioStateMachineInstance, Sm0}; use embedded_hal_1::spi::ErrorType; use embedded_hal_async::spi::{ExclusiveDevice, SpiBusFlush, SpiBusRead, SpiBusWrite}; use embedded_io::asynch::Write; use static_cell::StaticCell; use {defmt_rtt as _, panic_probe as _}; -use core::str::from_utf8; +use crate::pio::PioSpi; macro_rules! singleton { ($val:expr) => {{ @@ -30,7 +34,11 @@ macro_rules! singleton { #[embassy_executor::task] async fn wifi_task( - runner: cyw43::Runner<'static, Output<'static, PIN_23>, ExclusiveDevice>>, + runner: cyw43::Runner< + 'static, + Output<'static, PIN_23>, + ExclusiveDevice, DMA_CH0>, Output<'static, PIN_25>>, + >, ) -> ! { runner.run().await } @@ -59,12 +67,15 @@ async fn main(spawner: Spawner) { let pwr = Output::new(p.PIN_23, Level::Low); let cs = Output::new(p.PIN_25, Level::High); - let clk = Output::new(p.PIN_29, Level::Low); - let mut dio = Flex::new(p.PIN_24); - dio.set_low(); - dio.set_as_output(); + // let clk = Output::new(p.PIN_29, Level::Low); + // let mut dio = Flex::new(p.PIN_24); + // dio.set_low(); + // dio.set_as_output(); + // // let bus = MySpi { clk, dio }; - let bus = MySpi { clk, dio }; + let (_, sm, _, _, _) = p.PIO0.split(); + let dma = p.DMA_CH0; + let bus = PioSpi::new(sm, p.PIN_24, p.PIN_29, dma); let spi = ExclusiveDevice::new(bus, cs); let state = singleton!(cyw43::State::new()); @@ -110,6 +121,7 @@ async fn main(spawner: Spawner) { let mut socket = TcpSocket::new(stack, &mut rx_buffer, &mut tx_buffer); socket.set_timeout(Some(embassy_net::SmolDuration::from_secs(10))); + control.gpio_set(0, false).await; info!("Listening on TCP:1234..."); if let Err(e) = socket.accept(1234).await { warn!("accept error: {:?}", e); @@ -117,6 +129,7 @@ async fn main(spawner: Spawner) { } info!("Received connection from {:?}", socket.remote_endpoint()); + control.gpio_set(0, true).await; loop { let n = match socket.read(&mut buf).await { diff --git a/examples/rpi-pico-w/src/pio.rs b/examples/rpi-pico-w/src/pio.rs new file mode 100644 index 00000000..abb71b5d --- /dev/null +++ b/examples/rpi-pico-w/src/pio.rs @@ -0,0 +1,190 @@ +use core::slice; + +use cyw43::SpiBusCyw43; +use embassy_rp::dma::Channel; +use embassy_rp::gpio::{Pin, Pull}; +use embassy_rp::pio::{PioStateMachine, ShiftDirection}; +use embassy_rp::relocate::RelocatedProgram; +use embassy_rp::{pio_instr_util, Peripheral}; +use embedded_hal_1::spi::ErrorType; +use embedded_hal_async::spi::SpiBusFlush; +use pio::Wrap; +use pio_proc::pio_asm; + +pub struct PioSpi { + // cs: Output<'static, AnyPin>, + sm: SM, + dma: DMA, + wrap_target: u8, +} + +impl PioSpi +where + SM: PioStateMachine, + DMA: Channel, +{ + pub fn new( + mut sm: SM, + // cs: AnyPin, + dio: DIO, + clk: CLK, + dma: DMA, + ) -> Self + where + DIO: Pin, + CLK: Pin, + { + let program = pio_asm!( + ".side_set 1" + // "set pindirs, 1 side 0" + // "set pins, 0 side 0" + ".wrap_target" + "lp:", + "out pins, 1 side 0" + "jmp x-- lp side 1" + "set pindirs, 0 side 0" + // "nop side 1" + "lp2:" + "in pins, 1 side 0" + "jmp y-- lp2 side 1" + ".wrap" + ); + + let relocated = RelocatedProgram::new(&program.program); + + let mut pin_io = sm.make_pio_pin(dio); + pin_io.set_pull(Pull::Down); + pin_io.set_schmitt(true); + let pin_clk = sm.make_pio_pin(clk); + + sm.write_instr(relocated.origin() as usize, relocated.code()); + + // 16 Mhz + sm.set_clkdiv(0x07d0); + + // 8Mhz + sm.set_clkdiv(0x0a_00); + + // 1Mhz + // sm.set_clkdiv(0x7d_00); + + // slowest possible + // sm.set_clkdiv(0xffff_00); + + sm.set_autopull(true); + // sm.set_pull_threshold(32); + sm.set_autopush(true); + // sm.set_push_threshold(32); + + sm.set_out_pins(&[&pin_io]); + sm.set_in_base_pin(&pin_io); + + sm.set_set_pins(&[&pin_clk]); + pio_instr_util::set_pindir(&mut sm, 0b1); + sm.set_set_pins(&[&pin_io]); + pio_instr_util::set_pindir(&mut sm, 0b1); + + sm.set_sideset_base_pin(&pin_clk); + sm.set_sideset_count(1); + + sm.set_out_shift_dir(ShiftDirection::Left); + sm.set_in_shift_dir(ShiftDirection::Left); + + let Wrap { source, target } = relocated.wrap(); + sm.set_wrap(source, target); + + // pull low for startup + pio_instr_util::set_pin(&mut sm, 0); + + Self { + // cs: Output::new(cs, Level::High), + sm, + dma, + wrap_target: target, + } + } + + pub async fn write(&mut self, write: &[u32]) { + let write_bits = write.len() * 32 - 1; + let read_bits = 31; + + defmt::trace!("write={} read={}", write_bits, read_bits); + + let mut dma = Peripheral::into_ref(&mut self.dma); + pio_instr_util::set_x(&mut self.sm, write_bits as u32); + pio_instr_util::set_y(&mut self.sm, read_bits as u32); + pio_instr_util::set_pindir(&mut self.sm, 0b1); + pio_instr_util::exec_jmp(&mut self.sm, self.wrap_target); + + self.sm.set_enable(true); + + self.sm.dma_push(dma.reborrow(), write).await; + + let mut status = 0; + self.sm.dma_pull(dma, slice::from_mut(&mut status)).await; + defmt::trace!("{:#08x}", status); + + self.sm.set_enable(false); + } + + pub async fn cmd_read(&mut self, cmd: u32, read: &mut [u32]) { + let write_bits = 31; + let read_bits = read.len() * 32 - 1; + + defmt::trace!("write={} read={}", write_bits, read_bits); + + let mut dma = Peripheral::into_ref(&mut self.dma); + pio_instr_util::set_y(&mut self.sm, read_bits as u32); + pio_instr_util::set_x(&mut self.sm, write_bits as u32); + pio_instr_util::set_pindir(&mut self.sm, 0b1); + pio_instr_util::exec_jmp(&mut self.sm, self.wrap_target); + // self.cs.set_low(); + self.sm.set_enable(true); + + self.sm.dma_push(dma.reborrow(), slice::from_ref(&cmd)).await; + self.sm.dma_pull(dma, read).await; + + self.sm.set_enable(false); + } +} + +#[derive(Debug)] +pub enum PioError {} + +impl embedded_hal_async::spi::Error for PioError { + fn kind(&self) -> embedded_hal_1::spi::ErrorKind { + embedded_hal_1::spi::ErrorKind::Other + } +} + +impl ErrorType for PioSpi +where + SM: PioStateMachine, +{ + type Error = PioError; +} + +impl SpiBusFlush for PioSpi +where + SM: PioStateMachine, +{ + async fn flush(&mut self) -> Result<(), Self::Error> { + Ok(()) + } +} + +impl SpiBusCyw43 for PioSpi +where + SM: PioStateMachine, + DMA: Channel, +{ + async fn cmd_write<'a>(&'a mut self, write: &'a [u32]) -> Result<(), Self::Error> { + self.write(write).await; + Ok(()) + } + + async fn cmd_read<'a>(&'a mut self, write: &'a [u32], read: &'a mut [u32]) -> Result<(), Self::Error> { + self.cmd_read(write[0], read).await; + Ok(()) + } +} diff --git a/src/bus.rs b/src/bus.rs index 1c8bb989..aaa79b19 100644 --- a/src/bus.rs +++ b/src/bus.rs @@ -3,7 +3,7 @@ use core::slice; use embassy_time::{Duration, Timer}; use embedded_hal_1::digital::OutputPin; use embedded_hal_1::spi::ErrorType; -use embedded_hal_async::spi::{transaction, SpiBusRead, SpiBusWrite, SpiDevice}; +use embedded_hal_async::spi::{transaction, SpiDevice}; use crate::consts::*; diff --git a/src/lib.rs b/src/lib.rs index 7bf3992c..bcc3c59b 100644 --- a/src/lib.rs +++ b/src/lib.rs @@ -22,7 +22,7 @@ use embassy_futures::yield_now; use embassy_net_driver_channel as ch; use embassy_time::{block_for, Duration, Timer}; use embedded_hal_1::digital::OutputPin; -use embedded_hal_async::spi::{SpiBusRead, SpiBusWrite, SpiDevice}; +use embedded_hal_async::spi::SpiDevice; use crate::bus::Bus; pub use crate::bus::SpiBusCyw43; From a6a2a035d57ced9a7a9bb2ef325885063ea83295 Mon Sep 17 00:00:00 2001 From: kbleeke Date: Sun, 19 Mar 2023 16:43:46 +0100 Subject: [PATCH 064/130] even faster pio speed are possible --- examples/rpi-pico-w/src/pio.rs | 22 +++++++++++++++------- rust-toolchain.toml | 2 +- src/bus.rs | 31 +++++++++++++++++++++++++++---- 3 files changed, 43 insertions(+), 12 deletions(-) diff --git a/examples/rpi-pico-w/src/pio.rs b/examples/rpi-pico-w/src/pio.rs index abb71b5d..1bf304d5 100644 --- a/examples/rpi-pico-w/src/pio.rs +++ b/examples/rpi-pico-w/src/pio.rs @@ -2,7 +2,7 @@ use core::slice; use cyw43::SpiBusCyw43; use embassy_rp::dma::Channel; -use embassy_rp::gpio::{Pin, Pull}; +use embassy_rp::gpio::{Drive, Pin, Pull, SlewRate}; use embassy_rp::pio::{PioStateMachine, ShiftDirection}; use embassy_rp::relocate::RelocatedProgram; use embassy_rp::{pio_instr_util, Peripheral}; @@ -43,10 +43,11 @@ where "out pins, 1 side 0" "jmp x-- lp side 1" "set pindirs, 0 side 0" - // "nop side 1" + "nop side 1" "lp2:" - "in pins, 1 side 0" - "jmp y-- lp2 side 1" + "in pins, 1 side 1" + "jmp y-- lp2 side 0" + ".wrap" ); @@ -55,15 +56,22 @@ where let mut pin_io = sm.make_pio_pin(dio); pin_io.set_pull(Pull::Down); pin_io.set_schmitt(true); - let pin_clk = sm.make_pio_pin(clk); + pin_io.set_input_sync_bypass(true); + + let mut pin_clk = sm.make_pio_pin(clk); + pin_clk.set_drive_strength(Drive::_12mA); + pin_clk.set_slew_rate(SlewRate::Fast); sm.write_instr(relocated.origin() as usize, relocated.code()); + // 32 Mhz + sm.set_clkdiv(0x03E8); + // 16 Mhz - sm.set_clkdiv(0x07d0); + // sm.set_clkdiv(0x07d0); // 8Mhz - sm.set_clkdiv(0x0a_00); + // sm.set_clkdiv(0x0a_00); // 1Mhz // sm.set_clkdiv(0x7d_00); diff --git a/rust-toolchain.toml b/rust-toolchain.toml index ffbcbd6f..20c10c3f 100644 --- a/rust-toolchain.toml +++ b/rust-toolchain.toml @@ -1,7 +1,7 @@ # Before upgrading check that everything is available on all tier1 targets here: # https://rust-lang.github.io/rustup-components-history [toolchain] -channel = "nightly-2022-11-22" +channel = "nightly-2023-03-19" components = [ "rust-src", "rustfmt" ] targets = [ "thumbv6m-none-eabi", diff --git a/src/bus.rs b/src/bus.rs index aaa79b19..e4f9a69b 100644 --- a/src/bus.rs +++ b/src/bus.rs @@ -4,6 +4,7 @@ use embassy_time::{Duration, Timer}; use embedded_hal_1::digital::OutputPin; use embedded_hal_1::spi::ErrorType; use embedded_hal_async::spi::{transaction, SpiDevice}; +use futures::FutureExt; use crate::consts::*; @@ -46,18 +47,40 @@ where self.pwr.set_high().unwrap(); Timer::after(Duration::from_millis(250)).await; - while self.read32_swapped(REG_BUS_TEST_RO).await != FEEDBEAD {} + while self + .read32_swapped(REG_BUS_TEST_RO) + .inspect(|v| defmt::trace!("{:#x}", v)) + .await + != FEEDBEAD + {} self.write32_swapped(REG_BUS_TEST_RW, TEST_PATTERN).await; - let val = self.read32_swapped(REG_BUS_TEST_RW).await; + let val = self + .read32_swapped(REG_BUS_TEST_RW) + .inspect(|v| defmt::trace!("{:#x}", v)) + .await; assert_eq!(val, TEST_PATTERN); + self.read32_swapped(REG_BUS_CTRL) + .inspect(|v| defmt::trace!("{:#010b}", (v & 0xff))) + .await; + // 32-bit word length, little endian (which is the default endianess). self.write32_swapped(REG_BUS_CTRL, WORD_LENGTH_32 | HIGH_SPEED).await; - let val = self.read32(FUNC_BUS, REG_BUS_TEST_RO).await; + self.read8(FUNC_BUS, REG_BUS_CTRL) + .inspect(|v| defmt::trace!("{:#b}", v)) + .await; + + let val = self + .read32(FUNC_BUS, REG_BUS_TEST_RO) + .inspect(|v| defmt::trace!("{:#x}", v)) + .await; assert_eq!(val, FEEDBEAD); - let val = self.read32(FUNC_BUS, REG_BUS_TEST_RW).await; + let val = self + .read32(FUNC_BUS, REG_BUS_TEST_RW) + .inspect(|v| defmt::trace!("{:#x}", v)) + .await; assert_eq!(val, TEST_PATTERN); } From 1b410d6f3f08f12f2bd250a8b76f217291f4df26 Mon Sep 17 00:00:00 2001 From: kbleeke Date: Wed, 1 Mar 2023 19:03:46 +0100 Subject: [PATCH 065/130] add event handling to join --- examples/rpi-pico-w/src/main.rs | 9 ++++--- src/events.rs | 14 +++++++++++ src/lib.rs | 42 +++++++++++++++++++++++++++------ 3 files changed, 53 insertions(+), 12 deletions(-) diff --git a/examples/rpi-pico-w/src/main.rs b/examples/rpi-pico-w/src/main.rs index c706e121..91caa5e3 100644 --- a/examples/rpi-pico-w/src/main.rs +++ b/examples/rpi-pico-w/src/main.rs @@ -70,16 +70,11 @@ async fn main(spawner: Spawner) { let state = singleton!(cyw43::State::new()); let (net_device, mut control, runner) = cyw43::new(state, pwr, spi, fw).await; - spawner.spawn(wifi_task(runner)).unwrap(); - control.init(clm).await; control .set_power_management(cyw43::PowerManagementMode::PowerSave) .await; - //control.join_open(env!("WIFI_NETWORK")).await; - control.join_wpa2(env!("WIFI_NETWORK"), env!("WIFI_PASSWORD")).await; - let config = Config::Dhcp(Default::default()); //let config = embassy_net::Config::Static(embassy_net::Config { // address: Ipv4Cidr::new(Ipv4Address::new(192, 168, 69, 2), 24), @@ -98,8 +93,12 @@ async fn main(spawner: Spawner) { seed )); + unwrap!(spawner.spawn(wifi_task(runner))); unwrap!(spawner.spawn(net_task(stack))); + //control.join_open(env!("WIFI_NETWORK")).await; + control.join_wpa2(env!("WIFI_NETWORK"), env!("WIFI_PASSWORD")).await; + // And now we can use it! let mut rx_buffer = [0; 4096]; diff --git a/src/events.rs b/src/events.rs index a828eec9..9e6bb962 100644 --- a/src/events.rs +++ b/src/events.rs @@ -3,6 +3,9 @@ use core::num; +use embassy_sync::blocking_mutex::raw::CriticalSectionRawMutex; +use embassy_sync::pubsub::{PubSubChannel, Publisher, Subscriber}; + #[derive(Clone, Copy, PartialEq, Eq, num_enum::FromPrimitive)] #[cfg_attr(feature = "defmt", derive(defmt::Format))] #[repr(u8)] @@ -280,3 +283,14 @@ pub enum Event { /// highest val + 1 for range checking LAST = 190, } + +pub type EventQueue = PubSubChannel; +pub type EventPublisher<'a> = Publisher<'a, CriticalSectionRawMutex, EventStatus, 2, 1, 1>; +pub type EventSubscriber<'a> = Subscriber<'a, CriticalSectionRawMutex, EventStatus, 2, 1, 1>; + +#[derive(Clone, Copy)] +#[cfg_attr(feature = "defmt", derive(defmt::Format))] +pub struct EventStatus { + pub event_type: Event, + pub status: u32, +} diff --git a/src/lib.rs b/src/lib.rs index 5733506a..c58ac8e7 100644 --- a/src/lib.rs +++ b/src/lib.rs @@ -19,13 +19,15 @@ use core::slice; use ch::driver::LinkState; use embassy_futures::yield_now; use embassy_net_driver_channel as ch; +use embassy_sync::pubsub::PubSubBehavior; use embassy_time::{block_for, Duration, Timer}; use embedded_hal_1::digital::OutputPin; use embedded_hal_async::spi::{SpiBusRead, SpiBusWrite, SpiDevice}; +use events::EventQueue; use crate::bus::Bus; use crate::consts::*; -use crate::events::Event; +use crate::events::{Event, EventStatus}; use crate::structs::*; const MTU: usize = 1514; @@ -127,6 +129,7 @@ enum IoctlState { pub struct State { ioctl_state: Cell, ch: ch::State, + events: EventQueue, } impl State { @@ -134,12 +137,14 @@ impl State { Self { ioctl_state: Cell::new(IoctlState::Idle), ch: ch::State::new(), + events: EventQueue::new(), } } } pub struct Control<'a> { state_ch: ch::StateRunner<'a>, + event_sub: &'a EventQueue, ioctl_state: &'a Cell, } @@ -313,6 +318,7 @@ impl<'a> Control<'a> { evts.unset(Event::PROBREQ_MSG_RX); evts.unset(Event::PROBRESP_MSG); evts.unset(Event::PROBRESP_MSG); + evts.unset(Event::ROAM); self.set_iovar("bsscfg:event_msgs", &evts.to_bytes()).await; @@ -393,8 +399,22 @@ impl<'a> Control<'a> { ssid: [0; 32], }; i.ssid[..ssid.len()].copy_from_slice(ssid.as_bytes()); + + let mut subscriber = self.event_sub.subscriber().unwrap(); self.ioctl(IoctlType::Set, 26, 0, &mut i.to_bytes()).await; // set_ssid + loop { + let msg = subscriber.next_message_pure().await; + if msg.event_type == Event::AUTH && msg.status != 0 { + // retry + defmt::warn!("JOIN failed with status={}", msg.status); + self.ioctl(IoctlType::Set, 26, 0, &mut i.to_bytes()).await; + } else if msg.event_type == Event::JOIN && msg.status == 0 { + // successful join + break; + } + } + info!("JOINED"); } @@ -489,6 +509,8 @@ pub struct Runner<'a, PWR, SPI> { sdpcm_seq: u8, sdpcm_seq_max: u8, + events: &'a EventQueue, + #[cfg(feature = "firmware-logs")] log: LogState, } @@ -526,6 +548,8 @@ where sdpcm_seq: 0, sdpcm_seq_max: 1, + events: &state.events, + #[cfg(feature = "firmware-logs")] log: LogState { addr: 0, @@ -541,6 +565,7 @@ where device, Control { state_ch, + event_sub: &&state.events, ioctl_state: &state.ioctl_state, }, runner, @@ -883,13 +908,16 @@ where return; } + let evt_type = events::Event::from(event_packet.msg.event_type as u8); let evt_data = &bcd_packet[EventMessage::SIZE..][..event_packet.msg.datalen as usize]; - debug!( - "=== EVENT {}: {} {:02x}", - events::Event::from(event_packet.msg.event_type as u8), - event_packet.msg, - evt_data - ); + debug!("=== EVENT {}: {} {:02x}", evt_type, event_packet.msg, evt_data); + + if evt_type == events::Event::AUTH || evt_type == events::Event::JOIN { + self.events.publish_immediate(EventStatus { + status: event_packet.msg.status, + event_type: evt_type, + }); + } } CHANNEL_TYPE_DATA => { let bcd_header = BcdHeader::from_bytes(&payload[..BcdHeader::SIZE].try_into().unwrap()); From 67743bb1221fefc677bd2f207d0c382a85a46b7f Mon Sep 17 00:00:00 2001 From: Jacob Davis-Hansson Date: Sun, 19 Mar 2023 19:16:26 +0100 Subject: [PATCH 066/130] Update pre-flashed command to match file name Super minor, just to help the next person avoid the little stumble. --- examples/rpi-pico-w/src/main.rs | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/examples/rpi-pico-w/src/main.rs b/examples/rpi-pico-w/src/main.rs index c706e121..ad4e9895 100644 --- a/examples/rpi-pico-w/src/main.rs +++ b/examples/rpi-pico-w/src/main.rs @@ -53,7 +53,7 @@ async fn main(spawner: Spawner) { // To make flashing faster for development, you may want to flash the firmwares independently // at hardcoded addresses, instead of baking them into the program with `include_bytes!`: // probe-rs-cli download 43439A0.bin --format bin --chip RP2040 --base-address 0x10100000 - // probe-rs-cli download 43439A0.clm_blob --format bin --chip RP2040 --base-address 0x10140000 + // probe-rs-cli download 43439A0_clm.bin --format bin --chip RP2040 --base-address 0x10140000 //let fw = unsafe { core::slice::from_raw_parts(0x10100000 as *const u8, 224190) }; //let clm = unsafe { core::slice::from_raw_parts(0x10140000 as *const u8, 4752) }; From b411b7ce637e3e561f43b0c4f020f02b5607467b Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Sun, 19 Mar 2023 22:36:18 +0100 Subject: [PATCH 067/130] vscode: recommend extensions, disable toml formatting, update. --- .vscode/extensions.json | 11 +++++++++++ .vscode/settings.json | 14 ++++++-------- 2 files changed, 17 insertions(+), 8 deletions(-) create mode 100644 .vscode/extensions.json diff --git a/.vscode/extensions.json b/.vscode/extensions.json new file mode 100644 index 00000000..a8bb78ad --- /dev/null +++ b/.vscode/extensions.json @@ -0,0 +1,11 @@ +{ + // See https://go.microsoft.com/fwlink/?LinkId=827846 to learn about workspace recommendations. + // Extension identifier format: ${publisher}.${name}. Example: vscode.csharp + // List of extensions which should be recommended for users of this workspace. + "recommendations": [ + "rust-lang.rust-analyzer", + "tamasfe.even-better-toml", + ], + // List of extensions recommended by VS Code that should not be recommended for users of this workspace. + "unwantedRecommendations": [] +} \ No newline at end of file diff --git a/.vscode/settings.json b/.vscode/settings.json index 082b286d..dd479929 100644 --- a/.vscode/settings.json +++ b/.vscode/settings.json @@ -1,14 +1,12 @@ { "editor.formatOnSave": true, - "rust-analyzer.cargo.buildScripts.enable": true, - "rust-analyzer.cargo.noDefaultFeatures": true, + "[toml]": { + "editor.formatOnSave": false + }, "rust-analyzer.cargo.target": "thumbv6m-none-eabi", - "rust-analyzer.checkOnSave.allTargets": false, - "rust-analyzer.checkOnSave.noDefaultFeatures": true, - "rust-analyzer.imports.granularity.enforce": true, - "rust-analyzer.imports.granularity.group": "module", - "rust-analyzer.procMacro.attributes.enable": false, - "rust-analyzer.procMacro.enable": false, + "rust-analyzer.cargo.noDefaultFeatures": true, + "rust-analyzer.check.allTargets": false, + "rust-analyzer.check.noDefaultFeatures": true, "rust-analyzer.linkedProjects": [ "examples/rpi-pico-w/Cargo.toml", ], From b4b8d829801e149c90f9f0fc85736be3549dff87 Mon Sep 17 00:00:00 2001 From: kbleeke Date: Tue, 21 Mar 2023 19:15:54 +0100 Subject: [PATCH 068/130] remove use of embedded-hal SPI traits. Instead just call our bus trait directly and push responsibility for implementing CS on the trait implementor --- Cargo.toml | 1 - examples/rpi-pico-w/Cargo.toml | 2 - examples/rpi-pico-w/src/main.rs | 62 ++++++++----------- examples/rpi-pico-w/src/pio.rs | 61 +++++-------------- src/bus.rs | 104 +++++--------------------------- src/lib.rs | 7 +-- 6 files changed, 59 insertions(+), 178 deletions(-) diff --git a/Cargo.toml b/Cargo.toml index 6e323744..3bdeb0cf 100644 --- a/Cargo.toml +++ b/Cargo.toml @@ -25,5 +25,4 @@ cortex-m-rt = "0.7.0" futures = { version = "0.3.17", default-features = false, features = ["async-await", "cfg-target-has-atomic", "unstable"] } embedded-hal-1 = { package = "embedded-hal", version = "1.0.0-alpha.9" } -embedded-hal-async = { version = "0.2.0-alpha.0" } num_enum = { version = "0.5.7", default-features = false } diff --git a/examples/rpi-pico-w/Cargo.toml b/examples/rpi-pico-w/Cargo.toml index 0d789a93..17b4214d 100644 --- a/examples/rpi-pico-w/Cargo.toml +++ b/examples/rpi-pico-w/Cargo.toml @@ -47,8 +47,6 @@ futures = { version = "0.3.17", default-features = false, features = [ pio-proc = "0.2" pio = "0.2.1" -embedded-hal-1 = { package = "embedded-hal", version = "1.0.0-alpha.9" } -embedded-hal-async = { version = "0.2.0-alpha.0" } embedded-io = { version = "0.4.0", features = ["async", "defmt"] } heapless = "0.7.15" diff --git a/examples/rpi-pico-w/src/main.rs b/examples/rpi-pico-w/src/main.rs index 3563d165..f30a20ba 100644 --- a/examples/rpi-pico-w/src/main.rs +++ b/examples/rpi-pico-w/src/main.rs @@ -1,4 +1,4 @@ -#![no_std] +#![no_std] #![no_main] #![feature(type_alias_impl_trait)] #![feature(async_fn_in_trait)] @@ -6,7 +6,7 @@ mod pio; -use core::convert::Infallible; +use core::slice; use core::str::from_utf8; use defmt::*; @@ -16,8 +16,6 @@ use embassy_net::{Config, Stack, StackResources}; use embassy_rp::gpio::{Flex, Level, Output}; use embassy_rp::peripherals::{DMA_CH0, PIN_23, PIN_24, PIN_25, PIN_29}; use embassy_rp::pio::{Pio0, PioPeripherial, PioStateMachineInstance, Sm0}; -use embedded_hal_1::spi::ErrorType; -use embedded_hal_async::spi::{ExclusiveDevice, SpiBusFlush, SpiBusRead, SpiBusWrite}; use embedded_io::asynch::Write; use static_cell::StaticCell; use {defmt_rtt as _, panic_probe as _}; @@ -37,7 +35,7 @@ async fn wifi_task( runner: cyw43::Runner< 'static, Output<'static, PIN_23>, - ExclusiveDevice, DMA_CH0>, Output<'static, PIN_25>>, + PioSpi, DMA_CH0>, >, ) -> ! { runner.run().await @@ -75,8 +73,7 @@ async fn main(spawner: Spawner) { let (_, sm, _, _, _) = p.PIO0.split(); let dma = p.DMA_CH0; - let bus = PioSpi::new(sm, p.PIN_24, p.PIN_29, dma); - let spi = ExclusiveDevice::new(bus, cs); + let spi = PioSpi::new(sm, cs, p.PIN_24, p.PIN_29, dma); let state = singleton!(cyw43::State::new()); let (net_device, mut control, runner) = cyw43::new(state, pwr, spi, fw).await; @@ -146,7 +143,6 @@ async fn main(spawner: Spawner) { info!("rxd {}", from_utf8(&buf[..n]).unwrap()); - match socket.write_all(&buf[..n]).await { Ok(()) => {} Err(e) => { @@ -168,31 +164,13 @@ struct MySpi { /// - IRQ /// - strap to set to gSPI mode on boot. dio: Flex<'static, PIN_24>, + + /// Chip select + cs: Output<'static, PIN_25>, } -impl ErrorType for MySpi { - type Error = Infallible; -} - -impl cyw43::SpiBusCyw43 for MySpi { - async fn cmd_write<'a>(&'a mut self, write: &'a [u32]) -> Result<(), Self::Error> { - self.write(write).await - } - - async fn cmd_read<'a>(&'a mut self, write: &'a [u32], read: &'a mut [u32]) -> Result<(), Self::Error> { - self.write(write).await?; - self.read(read).await - } -} - -impl SpiBusFlush for MySpi { - async fn flush(&mut self) -> Result<(), Self::Error> { - Ok(()) - } -} - -impl SpiBusRead for MySpi { - async fn read(&mut self, words: &mut [u32]) -> Result<(), Self::Error> { +impl MySpi { + async fn read(&mut self, words: &mut [u32]) { self.dio.set_as_input(); for word in words { let mut w = 0; @@ -210,13 +188,9 @@ impl SpiBusRead for MySpi { } *word = w } - - Ok(()) } -} -impl SpiBusWrite for MySpi { - async fn write(&mut self, words: &[u32]) -> Result<(), Self::Error> { + async fn write(&mut self, words: &[u32]) { self.dio.set_as_output(); for word in words { let mut word = *word; @@ -238,6 +212,20 @@ impl SpiBusWrite for MySpi { self.clk.set_low(); self.dio.set_as_input(); - Ok(()) + } +} + +impl cyw43::SpiBusCyw43 for MySpi { + async fn cmd_write(&mut self, write: &[u32]) { + self.cs.set_low(); + self.write(write).await; + self.cs.set_high(); + } + + async fn cmd_read(&mut self, write: u32, read: &mut [u32]) { + self.cs.set_low(); + self.write(slice::from_ref(&write)).await; + self.read(read).await; + self.cs.set_high(); } } diff --git a/examples/rpi-pico-w/src/pio.rs b/examples/rpi-pico-w/src/pio.rs index 1bf304d5..896fd045 100644 --- a/examples/rpi-pico-w/src/pio.rs +++ b/examples/rpi-pico-w/src/pio.rs @@ -2,34 +2,27 @@ use core::slice; use cyw43::SpiBusCyw43; use embassy_rp::dma::Channel; -use embassy_rp::gpio::{Drive, Pin, Pull, SlewRate}; +use embassy_rp::gpio::{Drive, Output, Pin, Pull, SlewRate}; use embassy_rp::pio::{PioStateMachine, ShiftDirection}; use embassy_rp::relocate::RelocatedProgram; use embassy_rp::{pio_instr_util, Peripheral}; -use embedded_hal_1::spi::ErrorType; -use embedded_hal_async::spi::SpiBusFlush; use pio::Wrap; use pio_proc::pio_asm; -pub struct PioSpi { - // cs: Output<'static, AnyPin>, +pub struct PioSpi { + cs: Output<'static, CS>, sm: SM, dma: DMA, wrap_target: u8, } -impl PioSpi +impl PioSpi where SM: PioStateMachine, DMA: Channel, + CS: Pin, { - pub fn new( - mut sm: SM, - // cs: AnyPin, - dio: DIO, - clk: CLK, - dma: DMA, - ) -> Self + pub fn new(mut sm: SM, cs: Output<'static, CS>, dio: DIO, clk: CLK, dma: DMA) -> Self where DIO: Pin, CLK: Pin, @@ -105,7 +98,7 @@ where pio_instr_util::set_pin(&mut sm, 0); Self { - // cs: Output::new(cs, Level::High), + cs, sm, dma, wrap_target: target, @@ -156,43 +149,21 @@ where } } -#[derive(Debug)] -pub enum PioError {} - -impl embedded_hal_async::spi::Error for PioError { - fn kind(&self) -> embedded_hal_1::spi::ErrorKind { - embedded_hal_1::spi::ErrorKind::Other - } -} - -impl ErrorType for PioSpi -where - SM: PioStateMachine, -{ - type Error = PioError; -} - -impl SpiBusFlush for PioSpi -where - SM: PioStateMachine, -{ - async fn flush(&mut self) -> Result<(), Self::Error> { - Ok(()) - } -} - -impl SpiBusCyw43 for PioSpi +impl SpiBusCyw43 for PioSpi where + CS: Pin, SM: PioStateMachine, DMA: Channel, { - async fn cmd_write<'a>(&'a mut self, write: &'a [u32]) -> Result<(), Self::Error> { + async fn cmd_write(&mut self, write: & [u32]) { + self.cs.set_low(); self.write(write).await; - Ok(()) + self.cs.set_high(); } - async fn cmd_read<'a>(&'a mut self, write: &'a [u32], read: &'a mut [u32]) -> Result<(), Self::Error> { - self.cmd_read(write[0], read).await; - Ok(()) + async fn cmd_read(&mut self, write: u32, read: & mut [u32]) { + self.cs.set_low(); + self.cmd_read(write, read).await; + self.cs.set_high(); } } diff --git a/src/bus.rs b/src/bus.rs index e4f9a69b..90990f35 100644 --- a/src/bus.rs +++ b/src/bus.rs @@ -2,22 +2,22 @@ use core::slice; use embassy_time::{Duration, Timer}; use embedded_hal_1::digital::OutputPin; -use embedded_hal_1::spi::ErrorType; -use embedded_hal_async::spi::{transaction, SpiDevice}; use futures::FutureExt; use crate::consts::*; /// Custom Spi Trait that _only_ supports the bus operation of the cyw43 -pub trait SpiBusCyw43: ErrorType { +/// Implementors are expected to hold the CS pin low during an operation. +pub trait SpiBusCyw43 { /// Issues a write command on the bus - /// Frist 32 bits of `word` are expected to be a cmd word - async fn cmd_write<'a>(&'a mut self, write: &'a [Word]) -> Result<(), Self::Error>; + /// First 32 bits of `word` are expected to be a cmd word + async fn cmd_write(&mut self, write: &[u32]); /// Issues a read command on the bus /// `write` is expected to be a 32 bit cmd word /// `read` will contain the response of the device - async fn cmd_read<'a>(&'a mut self, write: &'a [Word], read: &'a mut [Word]) -> Result<(), Self::Error>; + /// + async fn cmd_read(&mut self, write: u32, read: &mut [u32]); } pub(crate) struct Bus { @@ -29,8 +29,7 @@ pub(crate) struct Bus { impl Bus where PWR: OutputPin, - SPI: SpiDevice, - SPI::Bus: SpiBusCyw43, + SPI: SpiBusCyw43, { pub(crate) fn new(pwr: PWR, spi: SPI) -> Self { Self { @@ -87,14 +86,8 @@ where pub async fn wlan_read(&mut self, buf: &mut [u32], len_in_u8: u32) { let cmd = cmd_word(READ, INC_ADDR, FUNC_WLAN, 0, len_in_u8); let len_in_u32 = (len_in_u8 as usize + 3) / 4; - transaction!(&mut self.spi, |bus| async { - // bus.write(&[cmd]).await?; - // bus.read(&mut buf[..len_in_u32]).await?; - bus.cmd_read(slice::from_ref(&cmd), &mut buf[..len_in_u32]).await?; - Ok(()) - }) - .await - .unwrap(); + + self.spi.cmd_read(cmd, &mut buf[..len_in_u32]).await; } pub async fn wlan_write(&mut self, buf: &[u32]) { @@ -104,15 +97,7 @@ where cmd_buf[0] = cmd; cmd_buf[1..][..buf.len()].copy_from_slice(buf); - transaction!(&mut self.spi, |bus| async { - // bus.write(&[cmd]).await?; - // bus.write(buf).await?; - - bus.cmd_write(&cmd_buf).await?; - Ok(()) - }) - .await - .unwrap(); + self.spi.cmd_write(&cmd_buf).await; } #[allow(unused)] @@ -136,22 +121,7 @@ where let cmd = cmd_word(READ, INC_ADDR, FUNC_BACKPLANE, window_offs, len as u32); - transaction!(&mut self.spi, |bus| async { - // bus.write(&[cmd]).await?; - - // // 4-byte response delay. - // let mut junk = [0; 1]; - // bus.read(&mut junk).await?; - - // // Read data - // bus.read(&mut buf[..(len + 3) / 4]).await?; - - bus.cmd_read(slice::from_ref(&cmd), &mut buf[..(len + 3) / 4 + 1]) - .await?; - Ok(()) - }) - .await - .unwrap(); + self.spi.cmd_read(cmd, &mut buf[..(len + 3) / 4 + 1]).await; data[..len].copy_from_slice(&slice8_mut(&mut buf[1..])[..len]); @@ -183,16 +153,7 @@ where let cmd = cmd_word(WRITE, INC_ADDR, FUNC_BACKPLANE, window_offs, len as u32); buf[0] = cmd; - transaction!(&mut self.spi, |bus| async { - // bus.write(&[cmd]).await?; - // bus.write(&buf[..(len + 3) / 4]).await?; - - bus.cmd_write(&buf[..(len + 3) / 4 + 1]).await?; - - Ok(()) - }) - .await - .unwrap(); + self.spi.cmd_write(&buf[..(len + 3) / 4 + 1]).await; // Advance ptr. addr += len as u32; @@ -307,19 +268,7 @@ where let mut buf = [0; 2]; let len = if func == FUNC_BACKPLANE { 2 } else { 1 }; - transaction!(&mut self.spi, |bus| async { - // bus.write(&[cmd]).await?; - // if func == FUNC_BACKPLANE { - // // 4-byte response delay. - // bus.read(&mut buf).await?; - // } - // bus.read(&mut buf).await?; - - bus.cmd_read(slice::from_ref(&cmd), &mut buf[..len]).await?; - Ok(()) - }) - .await - .unwrap(); + self.spi.cmd_read(cmd, &mut buf[..len]).await; if func == FUNC_BACKPLANE { buf[1] @@ -331,13 +280,7 @@ where async fn writen(&mut self, func: u32, addr: u32, val: u32, len: u32) { let cmd = cmd_word(WRITE, INC_ADDR, func, addr, len); - transaction!(&mut self.spi, |bus| async { - // bus.write(&[cmd, val]).await?; - bus.cmd_write(&[cmd, val]).await?; - Ok(()) - }) - .await - .unwrap(); + self.spi.cmd_write(&[cmd, val]).await; } async fn read32_swapped(&mut self, addr: u32) -> u32 { @@ -345,15 +288,7 @@ where let cmd = swap16(cmd); let mut buf = [0; 1]; - transaction!(&mut self.spi, |bus| async { - // bus.write(&[swap16(cmd)]).await?; - // bus.read(&mut buf).await?; - - bus.cmd_read(slice::from_ref(&cmd), &mut buf).await?; - Ok(()) - }) - .await - .unwrap(); + self.spi.cmd_read(cmd, &mut buf).await; swap16(buf[0]) } @@ -362,14 +297,7 @@ where let cmd = cmd_word(WRITE, INC_ADDR, FUNC_BUS, addr, 4); let buf = [swap16(cmd), swap16(val)]; - transaction!(&mut self.spi, |bus| async { - // bus.write(&[swap16(cmd), swap16(val)]).await?; - - bus.cmd_write(&buf).await?; - Ok(()) - }) - .await - .unwrap(); + self.spi.cmd_write(&buf).await; } } diff --git a/src/lib.rs b/src/lib.rs index bcc3c59b..f0a7aaa0 100644 --- a/src/lib.rs +++ b/src/lib.rs @@ -22,7 +22,6 @@ use embassy_futures::yield_now; use embassy_net_driver_channel as ch; use embassy_time::{block_for, Duration, Timer}; use embedded_hal_1::digital::OutputPin; -use embedded_hal_async::spi::SpiDevice; use crate::bus::Bus; pub use crate::bus::SpiBusCyw43; @@ -513,8 +512,7 @@ pub async fn new<'a, PWR, SPI>( ) -> (NetDriver<'a>, Control<'a>, Runner<'a, PWR, SPI>) where PWR: OutputPin, - SPI: SpiDevice, - SPI::Bus: SpiBusCyw43, + SPI: SpiBusCyw43, { let (ch_runner, device) = ch::new(&mut state.ch, [0; 6]); let state_ch = ch_runner.state_runner(); @@ -552,8 +550,7 @@ where impl<'a, PWR, SPI> Runner<'a, PWR, SPI> where PWR: OutputPin, - SPI: SpiDevice, - SPI::Bus: SpiBusCyw43, + SPI: SpiBusCyw43, { async fn init(&mut self, firmware: &[u8]) { self.bus.init().await; From 3034e8fb458cae0ff84d1ca07b4a64bced815f0c Mon Sep 17 00:00:00 2001 From: kbleeke Date: Tue, 21 Mar 2023 19:26:01 +0100 Subject: [PATCH 069/130] document response delay quirks in bus code --- src/bus.rs | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/src/bus.rs b/src/bus.rs index 90990f35..262b9e0d 100644 --- a/src/bus.rs +++ b/src/bus.rs @@ -16,7 +16,8 @@ pub trait SpiBusCyw43 { /// Issues a read command on the bus /// `write` is expected to be a 32 bit cmd word /// `read` will contain the response of the device - /// + /// Backplane reads have a response delay that produces one extra unspecified word at the beginning of `read`. + /// Callers that want to read `n` word from the backplane, have to provide a slice that is `n+1` words long. async fn cmd_read(&mut self, write: u32, read: &mut [u32]); } @@ -108,6 +109,7 @@ where // To simplify, enforce 4-align for now. assert!(addr % 4 == 0); + // Backplane read buffer has one extra word for the response delay. let mut buf = [0u32; BACKPLANE_MAX_TRANSFER_SIZE / 4 + 1]; while !data.is_empty() { @@ -121,8 +123,10 @@ where let cmd = cmd_word(READ, INC_ADDR, FUNC_BACKPLANE, window_offs, len as u32); + // round `buf` to word boundary, add one extra word for the response delay self.spi.cmd_read(cmd, &mut buf[..(len + 3) / 4 + 1]).await; + // when writing out the data, we skip the response-delay byte data[..len].copy_from_slice(&slice8_mut(&mut buf[1..])[..len]); // Advance ptr. @@ -266,10 +270,12 @@ where async fn readn(&mut self, func: u32, addr: u32, len: u32) -> u32 { let cmd = cmd_word(READ, INC_ADDR, func, addr, len); let mut buf = [0; 2]; + // if we are reading from the backplane, we need an extra word for the response delay let len = if func == FUNC_BACKPLANE { 2 } else { 1 }; self.spi.cmd_read(cmd, &mut buf[..len]).await; + // if we read from the backplane, the result is in the second word, after the response delay if func == FUNC_BACKPLANE { buf[1] } else { From f82f931dc2b8df2338fb8331ad27d667811e5c09 Mon Sep 17 00:00:00 2001 From: kbleeke Date: Tue, 21 Mar 2023 19:30:45 +0100 Subject: [PATCH 070/130] revert formatting changes in Cargo.toml --- examples/rpi-pico-w/Cargo.toml | 34 +++++----------------------------- 1 file changed, 5 insertions(+), 29 deletions(-) diff --git a/examples/rpi-pico-w/Cargo.toml b/examples/rpi-pico-w/Cargo.toml index 17b4214d..4a531c88 100644 --- a/examples/rpi-pico-w/Cargo.toml +++ b/examples/rpi-pico-w/Cargo.toml @@ -6,30 +6,10 @@ edition = "2021" [dependencies] cyw43 = { path = "../../", features = ["defmt", "firmware-logs"] } -embassy-executor = { version = "0.1.0", features = [ - "defmt", - "integrated-timers", -] } -embassy-time = { version = "0.1.0", features = [ - "defmt", - "defmt-timestamp-uptime", -] } -embassy-rp = { version = "0.1.0", features = [ - "defmt", - "unstable-traits", - "nightly", - "unstable-pac", - "pio", - "time-driver", -] } -embassy-net = { version = "0.1.0", features = [ - "defmt", - "tcp", - "dhcpv4", - "medium-ethernet", - "unstable-traits", - "nightly", -] } +embassy-executor = { version = "0.1.0", features = ["defmt", "integrated-timers"] } +embassy-time = { version = "0.1.0", features = ["defmt", "defmt-timestamp-uptime"] } +embassy-rp = { version = "0.1.0", features = ["defmt", "unstable-traits", "nightly", "unstable-pac", "time-driver", "pio"] } +embassy-net = { version = "0.1.0", features = ["defmt", "tcp", "dhcpv4", "medium-ethernet", "unstable-traits", "nightly"] } atomic-polyfill = "0.1.5" static_cell = "1.0" @@ -39,11 +19,7 @@ panic-probe = { version = "0.3", features = ["print-defmt"] } cortex-m = { version = "0.7.6", features = ["critical-section-single-core"] } cortex-m-rt = "0.7.0" -futures = { version = "0.3.17", default-features = false, features = [ - "async-await", - "cfg-target-has-atomic", - "unstable", -] } +futures = { version = "0.3.17", default-features = false, features = ["async-await", "cfg-target-has-atomic", "unstable"] } pio-proc = "0.2" pio = "0.2.1" From 359b1c7fdb246c125e0b835eb58283a8a9a6a946 Mon Sep 17 00:00:00 2001 From: kbleeke Date: Tue, 21 Mar 2023 19:39:41 +0100 Subject: [PATCH 071/130] replace inspect() with direct calls to trace!() after awaiting --- examples/rpi-pico-w/src/pio.rs | 4 ++-- src/bus.rs | 28 ++++++++++------------------ 2 files changed, 12 insertions(+), 20 deletions(-) diff --git a/examples/rpi-pico-w/src/pio.rs b/examples/rpi-pico-w/src/pio.rs index 896fd045..8017f4f4 100644 --- a/examples/rpi-pico-w/src/pio.rs +++ b/examples/rpi-pico-w/src/pio.rs @@ -155,13 +155,13 @@ where SM: PioStateMachine, DMA: Channel, { - async fn cmd_write(&mut self, write: & [u32]) { + async fn cmd_write(&mut self, write: &[u32]) { self.cs.set_low(); self.write(write).await; self.cs.set_high(); } - async fn cmd_read(&mut self, write: u32, read: & mut [u32]) { + async fn cmd_read(&mut self, write: u32, read: &mut [u32]) { self.cs.set_low(); self.cmd_read(write, read).await; self.cs.set_high(); diff --git a/src/bus.rs b/src/bus.rs index 262b9e0d..f77b890d 100644 --- a/src/bus.rs +++ b/src/bus.rs @@ -55,32 +55,24 @@ where {} self.write32_swapped(REG_BUS_TEST_RW, TEST_PATTERN).await; - let val = self - .read32_swapped(REG_BUS_TEST_RW) - .inspect(|v| defmt::trace!("{:#x}", v)) - .await; + let val = self.read32_swapped(REG_BUS_TEST_RW).await; + defmt::trace!("{:#x}", val); assert_eq!(val, TEST_PATTERN); - self.read32_swapped(REG_BUS_CTRL) - .inspect(|v| defmt::trace!("{:#010b}", (v & 0xff))) - .await; + let val = self.read32_swapped(REG_BUS_CTRL).await; + defmt::trace!("{:#010b}", (val & 0xff)); // 32-bit word length, little endian (which is the default endianess). self.write32_swapped(REG_BUS_CTRL, WORD_LENGTH_32 | HIGH_SPEED).await; - self.read8(FUNC_BUS, REG_BUS_CTRL) - .inspect(|v| defmt::trace!("{:#b}", v)) - .await; + let val = self.read8(FUNC_BUS, REG_BUS_CTRL).await; + defmt::trace!("{:#b}", val); - let val = self - .read32(FUNC_BUS, REG_BUS_TEST_RO) - .inspect(|v| defmt::trace!("{:#x}", v)) - .await; + let val = self.read32(FUNC_BUS, REG_BUS_TEST_RO).await; + defmt::trace!("{:#x}", val); assert_eq!(val, FEEDBEAD); - let val = self - .read32(FUNC_BUS, REG_BUS_TEST_RW) - .inspect(|v| defmt::trace!("{:#x}", v)) - .await; + let val = self.read32(FUNC_BUS, REG_BUS_TEST_RW).await; + defmt::trace!("{:#x}", val); assert_eq!(val, TEST_PATTERN); } From 369f2059627c579c344b1f4d8d34002b466e057d Mon Sep 17 00:00:00 2001 From: kbleeke Date: Wed, 22 Mar 2023 11:33:55 +0100 Subject: [PATCH 072/130] wifi task needs to be spawned immediately, otherwise ioctls are just stuck (duh). fix #44 --- examples/rpi-pico-w/src/main.rs | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/examples/rpi-pico-w/src/main.rs b/examples/rpi-pico-w/src/main.rs index 67348e45..43485137 100644 --- a/examples/rpi-pico-w/src/main.rs +++ b/examples/rpi-pico-w/src/main.rs @@ -77,6 +77,7 @@ async fn main(spawner: Spawner) { let state = singleton!(cyw43::State::new()); let (net_device, mut control, runner) = cyw43::new(state, pwr, spi, fw).await; + unwrap!(spawner.spawn(wifi_task(runner))); control.init(clm).await; control @@ -101,7 +102,6 @@ async fn main(spawner: Spawner) { seed )); - unwrap!(spawner.spawn(wifi_task(runner))); unwrap!(spawner.spawn(net_task(stack))); //control.join_open(env!("WIFI_NETWORK")).await; From 20923080e6ea313278b5f3aa8ec21055c6208527 Mon Sep 17 00:00:00 2001 From: kbleeke Date: Thu, 2 Mar 2023 12:10:13 +0100 Subject: [PATCH 073/130] split lib.rs into multiple files --- src/control.rs | 299 +++++++++++++++++ src/lib.rs | 890 +------------------------------------------------ src/nvram.rs | 54 +++ src/runner.rs | 564 +++++++++++++++++++++++++++++++ 4 files changed, 926 insertions(+), 881 deletions(-) create mode 100644 src/control.rs create mode 100644 src/nvram.rs create mode 100644 src/runner.rs diff --git a/src/control.rs b/src/control.rs new file mode 100644 index 00000000..7f1c9fe8 --- /dev/null +++ b/src/control.rs @@ -0,0 +1,299 @@ +use core::cell::Cell; +use core::cmp::{max, min}; + +use ch::driver::LinkState; +use embassy_futures::yield_now; +use embassy_net_driver_channel as ch; +use embassy_time::{Duration, Timer}; + +pub use crate::bus::SpiBusCyw43; +use crate::consts::*; +use crate::events::{Event, EventQueue}; +use crate::structs::*; +use crate::{countries, IoctlState, IoctlType, PowerManagementMode}; + +pub struct Control<'a> { + state_ch: ch::StateRunner<'a>, + event_sub: &'a EventQueue, + ioctl_state: &'a Cell, +} + +impl<'a> Control<'a> { + pub(crate) fn new( + state_ch: ch::StateRunner<'a>, + event_sub: &'a EventQueue, + ioctl_state: &'a Cell, + ) -> Self { + Self { + state_ch, + event_sub, + ioctl_state, + } + } + + pub async fn init(&mut self, clm: &[u8]) { + const CHUNK_SIZE: usize = 1024; + + info!("Downloading CLM..."); + + let mut offs = 0; + for chunk in clm.chunks(CHUNK_SIZE) { + let mut flag = DOWNLOAD_FLAG_HANDLER_VER; + if offs == 0 { + flag |= DOWNLOAD_FLAG_BEGIN; + } + offs += chunk.len(); + if offs == clm.len() { + flag |= DOWNLOAD_FLAG_END; + } + + let header = DownloadHeader { + flag, + dload_type: DOWNLOAD_TYPE_CLM, + len: chunk.len() as _, + crc: 0, + }; + let mut buf = [0; 8 + 12 + CHUNK_SIZE]; + buf[0..8].copy_from_slice(b"clmload\x00"); + buf[8..20].copy_from_slice(&header.to_bytes()); + buf[20..][..chunk.len()].copy_from_slice(&chunk); + self.ioctl(IoctlType::Set, IOCTL_CMD_SET_VAR, 0, &mut buf[..8 + 12 + chunk.len()]) + .await; + } + + // check clmload ok + assert_eq!(self.get_iovar_u32("clmload_status").await, 0); + + info!("Configuring misc stuff..."); + + // Disable tx gloming which transfers multiple packets in one request. + // 'glom' is short for "conglomerate" which means "gather together into + // a compact mass". + self.set_iovar_u32("bus:txglom", 0).await; + self.set_iovar_u32("apsta", 1).await; + + // read MAC addr. + let mut mac_addr = [0; 6]; + assert_eq!(self.get_iovar("cur_etheraddr", &mut mac_addr).await, 6); + info!("mac addr: {:02x}", mac_addr); + + let country = countries::WORLD_WIDE_XX; + let country_info = CountryInfo { + country_abbrev: [country.code[0], country.code[1], 0, 0], + country_code: [country.code[0], country.code[1], 0, 0], + rev: if country.rev == 0 { -1 } else { country.rev as _ }, + }; + self.set_iovar("country", &country_info.to_bytes()).await; + + // set country takes some time, next ioctls fail if we don't wait. + Timer::after(Duration::from_millis(100)).await; + + // Set antenna to chip antenna + self.ioctl_set_u32(IOCTL_CMD_ANTDIV, 0, 0).await; + + self.set_iovar_u32("bus:txglom", 0).await; + Timer::after(Duration::from_millis(100)).await; + //self.set_iovar_u32("apsta", 1).await; // this crashes, also we already did it before...?? + //Timer::after(Duration::from_millis(100)).await; + self.set_iovar_u32("ampdu_ba_wsize", 8).await; + Timer::after(Duration::from_millis(100)).await; + self.set_iovar_u32("ampdu_mpdu", 4).await; + Timer::after(Duration::from_millis(100)).await; + //self.set_iovar_u32("ampdu_rx_factor", 0).await; // this crashes + + //Timer::after(Duration::from_millis(100)).await; + + // evts + let mut evts = EventMask { + iface: 0, + events: [0xFF; 24], + }; + + // Disable spammy uninteresting events. + evts.unset(Event::RADIO); + evts.unset(Event::IF); + evts.unset(Event::PROBREQ_MSG); + evts.unset(Event::PROBREQ_MSG_RX); + evts.unset(Event::PROBRESP_MSG); + evts.unset(Event::PROBRESP_MSG); + evts.unset(Event::ROAM); + + self.set_iovar("bsscfg:event_msgs", &evts.to_bytes()).await; + + Timer::after(Duration::from_millis(100)).await; + + // set wifi up + self.ioctl(IoctlType::Set, IOCTL_CMD_UP, 0, &mut []).await; + + Timer::after(Duration::from_millis(100)).await; + + self.ioctl_set_u32(110, 0, 1).await; // SET_GMODE = auto + self.ioctl_set_u32(142, 0, 0).await; // SET_BAND = any + + Timer::after(Duration::from_millis(100)).await; + + self.state_ch.set_ethernet_address(mac_addr); + self.state_ch.set_link_state(LinkState::Up); // TODO do on join/leave + + info!("INIT DONE"); + } + + pub async fn set_power_management(&mut self, mode: PowerManagementMode) { + // power save mode + let mode_num = mode.mode(); + if mode_num == 2 { + self.set_iovar_u32("pm2_sleep_ret", mode.sleep_ret_ms() as u32).await; + self.set_iovar_u32("bcn_li_bcn", mode.beacon_period() as u32).await; + self.set_iovar_u32("bcn_li_dtim", mode.dtim_period() as u32).await; + self.set_iovar_u32("assoc_listen", mode.assoc() as u32).await; + } + self.ioctl_set_u32(86, 0, mode_num).await; + } + + pub async fn join_open(&mut self, ssid: &str) { + self.set_iovar_u32("ampdu_ba_wsize", 8).await; + + self.ioctl_set_u32(134, 0, 0).await; // wsec = open + self.set_iovar_u32x2("bsscfg:sup_wpa", 0, 0).await; + self.ioctl_set_u32(20, 0, 1).await; // set_infra = 1 + self.ioctl_set_u32(22, 0, 0).await; // set_auth = open (0) + + let mut i = SsidInfo { + len: ssid.len() as _, + ssid: [0; 32], + }; + i.ssid[..ssid.len()].copy_from_slice(ssid.as_bytes()); + self.ioctl(IoctlType::Set, IOCTL_CMD_SET_SSID, 0, &mut i.to_bytes()) + .await; // set_ssid + + info!("JOINED"); + } + + pub async fn join_wpa2(&mut self, ssid: &str, passphrase: &str) { + self.set_iovar_u32("ampdu_ba_wsize", 8).await; + + self.ioctl_set_u32(134, 0, 4).await; // wsec = wpa2 + self.set_iovar_u32x2("bsscfg:sup_wpa", 0, 1).await; + self.set_iovar_u32x2("bsscfg:sup_wpa2_eapver", 0, 0xFFFF_FFFF).await; + self.set_iovar_u32x2("bsscfg:sup_wpa_tmo", 0, 2500).await; + + Timer::after(Duration::from_millis(100)).await; + + let mut pfi = PassphraseInfo { + len: passphrase.len() as _, + flags: 1, + passphrase: [0; 64], + }; + pfi.passphrase[..passphrase.len()].copy_from_slice(passphrase.as_bytes()); + self.ioctl(IoctlType::Set, IOCTL_CMD_SET_PASSPHRASE, 0, &mut pfi.to_bytes()) + .await; // WLC_SET_WSEC_PMK + + self.ioctl_set_u32(20, 0, 1).await; // set_infra = 1 + self.ioctl_set_u32(22, 0, 0).await; // set_auth = 0 (open) + self.ioctl_set_u32(165, 0, 0x80).await; // set_wpa_auth + + let mut i = SsidInfo { + len: ssid.len() as _, + ssid: [0; 32], + }; + i.ssid[..ssid.len()].copy_from_slice(ssid.as_bytes()); + + let mut subscriber = self.event_sub.subscriber().unwrap(); + self.ioctl(IoctlType::Set, 26, 0, &mut i.to_bytes()).await; // set_ssid + + loop { + let msg = subscriber.next_message_pure().await; + if msg.event_type == Event::AUTH && msg.status != 0 { + // retry + defmt::warn!("JOIN failed with status={}", msg.status); + self.ioctl(IoctlType::Set, 26, 0, &mut i.to_bytes()).await; + } else if msg.event_type == Event::JOIN && msg.status == 0 { + // successful join + break; + } + } + + info!("JOINED"); + } + + pub async fn gpio_set(&mut self, gpio_n: u8, gpio_en: bool) { + assert!(gpio_n < 3); + self.set_iovar_u32x2("gpioout", 1 << gpio_n, if gpio_en { 1 << gpio_n } else { 0 }) + .await + } + + async fn set_iovar_u32x2(&mut self, name: &str, val1: u32, val2: u32) { + let mut buf = [0; 8]; + buf[0..4].copy_from_slice(&val1.to_le_bytes()); + buf[4..8].copy_from_slice(&val2.to_le_bytes()); + self.set_iovar(name, &buf).await + } + + async fn set_iovar_u32(&mut self, name: &str, val: u32) { + self.set_iovar(name, &val.to_le_bytes()).await + } + + async fn get_iovar_u32(&mut self, name: &str) -> u32 { + let mut buf = [0; 4]; + let len = self.get_iovar(name, &mut buf).await; + assert_eq!(len, 4); + u32::from_le_bytes(buf) + } + + async fn set_iovar(&mut self, name: &str, val: &[u8]) { + info!("set {} = {:02x}", name, val); + + let mut buf = [0; 64]; + buf[..name.len()].copy_from_slice(name.as_bytes()); + buf[name.len()] = 0; + buf[name.len() + 1..][..val.len()].copy_from_slice(val); + + let total_len = name.len() + 1 + val.len(); + self.ioctl(IoctlType::Set, IOCTL_CMD_SET_VAR, 0, &mut buf[..total_len]) + .await; + } + + // TODO this is not really working, it always returns all zeros. + async fn get_iovar(&mut self, name: &str, res: &mut [u8]) -> usize { + info!("get {}", name); + + let mut buf = [0; 64]; + buf[..name.len()].copy_from_slice(name.as_bytes()); + buf[name.len()] = 0; + + let total_len = max(name.len() + 1, res.len()); + let res_len = self + .ioctl(IoctlType::Get, IOCTL_CMD_GET_VAR, 0, &mut buf[..total_len]) + .await; + + let out_len = min(res.len(), res_len); + res[..out_len].copy_from_slice(&buf[..out_len]); + out_len + } + + async fn ioctl_set_u32(&mut self, cmd: u32, iface: u32, val: u32) { + let mut buf = val.to_le_bytes(); + self.ioctl(IoctlType::Set, cmd, iface, &mut buf).await; + } + + async fn ioctl(&mut self, kind: IoctlType, cmd: u32, iface: u32, buf: &mut [u8]) -> usize { + // TODO cancel ioctl on future drop. + + while !matches!(self.ioctl_state.get(), IoctlState::Idle) { + yield_now().await; + } + + self.ioctl_state.set(IoctlState::Pending { kind, cmd, iface, buf }); + + let resp_len = loop { + if let IoctlState::Done { resp_len } = self.ioctl_state.get() { + break resp_len; + } + yield_now().await; + }; + + self.ioctl_state.set(IoctlState::Idle); + + resp_len + } +} diff --git a/src/lib.rs b/src/lib.rs index 1b7d603d..af8f74a6 100644 --- a/src/lib.rs +++ b/src/lib.rs @@ -13,23 +13,20 @@ mod countries; mod events; mod structs; -use core::cell::Cell; -use core::cmp::{max, min}; -use core::slice; +mod control; +mod nvram; +mod runner; + +use core::cell::Cell; -use ch::driver::LinkState; -use embassy_futures::yield_now; use embassy_net_driver_channel as ch; -use embassy_sync::pubsub::PubSubBehavior; -use embassy_time::{block_for, Duration, Timer}; use embedded_hal_1::digital::OutputPin; use events::EventQueue; use crate::bus::Bus; pub use crate::bus::SpiBusCyw43; -use crate::consts::*; -use crate::events::{Event, EventStatus}; -use crate::structs::*; +pub use crate::control::Control; +pub use crate::runner::Runner; const MTU: usize = 1514; @@ -143,12 +140,6 @@ impl State { } } -pub struct Control<'a> { - state_ch: ch::StateRunner<'a>, - event_sub: &'a EventQueue, - ioctl_state: &'a Cell, -} - #[derive(Debug, Clone, Copy, PartialEq, Eq)] pub enum PowerManagementMode { /// Custom, officially unsupported mode. Use at your own risk. @@ -233,297 +224,6 @@ impl PowerManagementMode { } } -impl<'a> Control<'a> { - pub async fn init(&mut self, clm: &[u8]) { - const CHUNK_SIZE: usize = 1024; - - info!("Downloading CLM..."); - - let mut offs = 0; - for chunk in clm.chunks(CHUNK_SIZE) { - let mut flag = DOWNLOAD_FLAG_HANDLER_VER; - if offs == 0 { - flag |= DOWNLOAD_FLAG_BEGIN; - } - offs += chunk.len(); - if offs == clm.len() { - flag |= DOWNLOAD_FLAG_END; - } - - let header = DownloadHeader { - flag, - dload_type: DOWNLOAD_TYPE_CLM, - len: chunk.len() as _, - crc: 0, - }; - let mut buf = [0; 8 + 12 + CHUNK_SIZE]; - buf[0..8].copy_from_slice(b"clmload\x00"); - buf[8..20].copy_from_slice(&header.to_bytes()); - buf[20..][..chunk.len()].copy_from_slice(&chunk); - self.ioctl(IoctlType::Set, IOCTL_CMD_SET_VAR, 0, &mut buf[..8 + 12 + chunk.len()]) - .await; - } - - // check clmload ok - assert_eq!(self.get_iovar_u32("clmload_status").await, 0); - - info!("Configuring misc stuff..."); - - // Disable tx gloming which transfers multiple packets in one request. - // 'glom' is short for "conglomerate" which means "gather together into - // a compact mass". - self.set_iovar_u32("bus:txglom", 0).await; - self.set_iovar_u32("apsta", 1).await; - - // read MAC addr. - let mut mac_addr = [0; 6]; - assert_eq!(self.get_iovar("cur_etheraddr", &mut mac_addr).await, 6); - info!("mac addr: {:02x}", mac_addr); - - let country = countries::WORLD_WIDE_XX; - let country_info = CountryInfo { - country_abbrev: [country.code[0], country.code[1], 0, 0], - country_code: [country.code[0], country.code[1], 0, 0], - rev: if country.rev == 0 { -1 } else { country.rev as _ }, - }; - self.set_iovar("country", &country_info.to_bytes()).await; - - // set country takes some time, next ioctls fail if we don't wait. - Timer::after(Duration::from_millis(100)).await; - - // Set antenna to chip antenna - self.ioctl_set_u32(IOCTL_CMD_ANTDIV, 0, 0).await; - - self.set_iovar_u32("bus:txglom", 0).await; - Timer::after(Duration::from_millis(100)).await; - //self.set_iovar_u32("apsta", 1).await; // this crashes, also we already did it before...?? - //Timer::after(Duration::from_millis(100)).await; - self.set_iovar_u32("ampdu_ba_wsize", 8).await; - Timer::after(Duration::from_millis(100)).await; - self.set_iovar_u32("ampdu_mpdu", 4).await; - Timer::after(Duration::from_millis(100)).await; - //self.set_iovar_u32("ampdu_rx_factor", 0).await; // this crashes - - //Timer::after(Duration::from_millis(100)).await; - - // evts - let mut evts = EventMask { - iface: 0, - events: [0xFF; 24], - }; - - // Disable spammy uninteresting events. - evts.unset(Event::RADIO); - evts.unset(Event::IF); - evts.unset(Event::PROBREQ_MSG); - evts.unset(Event::PROBREQ_MSG_RX); - evts.unset(Event::PROBRESP_MSG); - evts.unset(Event::PROBRESP_MSG); - evts.unset(Event::ROAM); - - self.set_iovar("bsscfg:event_msgs", &evts.to_bytes()).await; - - Timer::after(Duration::from_millis(100)).await; - - // set wifi up - self.ioctl(IoctlType::Set, IOCTL_CMD_UP, 0, &mut []).await; - - Timer::after(Duration::from_millis(100)).await; - - self.ioctl_set_u32(110, 0, 1).await; // SET_GMODE = auto - self.ioctl_set_u32(142, 0, 0).await; // SET_BAND = any - - Timer::after(Duration::from_millis(100)).await; - - self.state_ch.set_ethernet_address(mac_addr); - self.state_ch.set_link_state(LinkState::Up); // TODO do on join/leave - - info!("INIT DONE"); - } - - pub async fn set_power_management(&mut self, mode: PowerManagementMode) { - // power save mode - let mode_num = mode.mode(); - if mode_num == 2 { - self.set_iovar_u32("pm2_sleep_ret", mode.sleep_ret_ms() as u32).await; - self.set_iovar_u32("bcn_li_bcn", mode.beacon_period() as u32).await; - self.set_iovar_u32("bcn_li_dtim", mode.dtim_period() as u32).await; - self.set_iovar_u32("assoc_listen", mode.assoc() as u32).await; - } - self.ioctl_set_u32(86, 0, mode_num).await; - } - - pub async fn join_open(&mut self, ssid: &str) { - self.set_iovar_u32("ampdu_ba_wsize", 8).await; - - self.ioctl_set_u32(134, 0, 0).await; // wsec = open - self.set_iovar_u32x2("bsscfg:sup_wpa", 0, 0).await; - self.ioctl_set_u32(20, 0, 1).await; // set_infra = 1 - self.ioctl_set_u32(22, 0, 0).await; // set_auth = open (0) - - let mut i = SsidInfo { - len: ssid.len() as _, - ssid: [0; 32], - }; - i.ssid[..ssid.len()].copy_from_slice(ssid.as_bytes()); - self.ioctl(IoctlType::Set, IOCTL_CMD_SET_SSID, 0, &mut i.to_bytes()) - .await; // set_ssid - - info!("JOINED"); - } - - pub async fn join_wpa2(&mut self, ssid: &str, passphrase: &str) { - self.set_iovar_u32("ampdu_ba_wsize", 8).await; - - self.ioctl_set_u32(134, 0, 4).await; // wsec = wpa2 - self.set_iovar_u32x2("bsscfg:sup_wpa", 0, 1).await; - self.set_iovar_u32x2("bsscfg:sup_wpa2_eapver", 0, 0xFFFF_FFFF).await; - self.set_iovar_u32x2("bsscfg:sup_wpa_tmo", 0, 2500).await; - - Timer::after(Duration::from_millis(100)).await; - - let mut pfi = PassphraseInfo { - len: passphrase.len() as _, - flags: 1, - passphrase: [0; 64], - }; - pfi.passphrase[..passphrase.len()].copy_from_slice(passphrase.as_bytes()); - self.ioctl(IoctlType::Set, IOCTL_CMD_SET_PASSPHRASE, 0, &mut pfi.to_bytes()) - .await; // WLC_SET_WSEC_PMK - - self.ioctl_set_u32(20, 0, 1).await; // set_infra = 1 - self.ioctl_set_u32(22, 0, 0).await; // set_auth = 0 (open) - self.ioctl_set_u32(165, 0, 0x80).await; // set_wpa_auth - - let mut i = SsidInfo { - len: ssid.len() as _, - ssid: [0; 32], - }; - i.ssid[..ssid.len()].copy_from_slice(ssid.as_bytes()); - - let mut subscriber = self.event_sub.subscriber().unwrap(); - self.ioctl(IoctlType::Set, 26, 0, &mut i.to_bytes()).await; // set_ssid - - loop { - let msg = subscriber.next_message_pure().await; - if msg.event_type == Event::AUTH && msg.status != 0 { - // retry - defmt::warn!("JOIN failed with status={}", msg.status); - self.ioctl(IoctlType::Set, 26, 0, &mut i.to_bytes()).await; - } else if msg.event_type == Event::JOIN && msg.status == 0 { - // successful join - break; - } - } - - info!("JOINED"); - } - - pub async fn gpio_set(&mut self, gpio_n: u8, gpio_en: bool) { - assert!(gpio_n < 3); - self.set_iovar_u32x2("gpioout", 1 << gpio_n, if gpio_en { 1 << gpio_n } else { 0 }) - .await - } - - async fn set_iovar_u32x2(&mut self, name: &str, val1: u32, val2: u32) { - let mut buf = [0; 8]; - buf[0..4].copy_from_slice(&val1.to_le_bytes()); - buf[4..8].copy_from_slice(&val2.to_le_bytes()); - self.set_iovar(name, &buf).await - } - - async fn set_iovar_u32(&mut self, name: &str, val: u32) { - self.set_iovar(name, &val.to_le_bytes()).await - } - - async fn get_iovar_u32(&mut self, name: &str) -> u32 { - let mut buf = [0; 4]; - let len = self.get_iovar(name, &mut buf).await; - assert_eq!(len, 4); - u32::from_le_bytes(buf) - } - - async fn set_iovar(&mut self, name: &str, val: &[u8]) { - info!("set {} = {:02x}", name, val); - - let mut buf = [0; 64]; - buf[..name.len()].copy_from_slice(name.as_bytes()); - buf[name.len()] = 0; - buf[name.len() + 1..][..val.len()].copy_from_slice(val); - - let total_len = name.len() + 1 + val.len(); - self.ioctl(IoctlType::Set, IOCTL_CMD_SET_VAR, 0, &mut buf[..total_len]) - .await; - } - - // TODO this is not really working, it always returns all zeros. - async fn get_iovar(&mut self, name: &str, res: &mut [u8]) -> usize { - info!("get {}", name); - - let mut buf = [0; 64]; - buf[..name.len()].copy_from_slice(name.as_bytes()); - buf[name.len()] = 0; - - let total_len = max(name.len() + 1, res.len()); - let res_len = self - .ioctl(IoctlType::Get, IOCTL_CMD_GET_VAR, 0, &mut buf[..total_len]) - .await; - - let out_len = min(res.len(), res_len); - res[..out_len].copy_from_slice(&buf[..out_len]); - out_len - } - - async fn ioctl_set_u32(&mut self, cmd: u32, iface: u32, val: u32) { - let mut buf = val.to_le_bytes(); - self.ioctl(IoctlType::Set, cmd, iface, &mut buf).await; - } - - async fn ioctl(&mut self, kind: IoctlType, cmd: u32, iface: u32, buf: &mut [u8]) -> usize { - // TODO cancel ioctl on future drop. - - while !matches!(self.ioctl_state.get(), IoctlState::Idle) { - yield_now().await; - } - - self.ioctl_state.set(IoctlState::Pending { kind, cmd, iface, buf }); - - let resp_len = loop { - if let IoctlState::Done { resp_len } = self.ioctl_state.get() { - break resp_len; - } - yield_now().await; - }; - - self.ioctl_state.set(IoctlState::Idle); - - resp_len - } -} - -pub struct Runner<'a, PWR, SPI> { - ch: ch::Runner<'a, MTU>, - bus: Bus, - - ioctl_state: &'a Cell, - ioctl_id: u16, - sdpcm_seq: u8, - sdpcm_seq_max: u8, - - events: &'a EventQueue, - - #[cfg(feature = "firmware-logs")] - log: LogState, -} - -#[cfg(feature = "firmware-logs")] -struct LogState { - addr: u32, - last_idx: usize, - buf: [u8; 256], - buf_count: usize, -} - pub type NetDriver<'a> = ch::Device<'a, MTU>; pub async fn new<'a, PWR, SPI>( @@ -539,585 +239,13 @@ where let (ch_runner, device) = ch::new(&mut state.ch, [0; 6]); let state_ch = ch_runner.state_runner(); - let mut runner = Runner { - ch: ch_runner, - bus: Bus::new(pwr, spi), - - ioctl_state: &state.ioctl_state, - ioctl_id: 0, - sdpcm_seq: 0, - sdpcm_seq_max: 1, - - events: &state.events, - - #[cfg(feature = "firmware-logs")] - log: LogState { - addr: 0, - last_idx: 0, - buf: [0; 256], - buf_count: 0, - }, - }; + let mut runner = Runner::new(ch_runner, Bus::new(pwr, spi), &state.ioctl_state, &state.events); runner.init(firmware).await; ( device, - Control { - state_ch, - event_sub: &&state.events, - ioctl_state: &state.ioctl_state, - }, + Control::new(state_ch, &state.events, &state.ioctl_state), runner, ) } - -impl<'a, PWR, SPI> Runner<'a, PWR, SPI> -where - PWR: OutputPin, - SPI: SpiBusCyw43, -{ - async fn init(&mut self, firmware: &[u8]) { - self.bus.init().await; - - // Init ALP (Active Low Power) clock - self.bus - .write8(FUNC_BACKPLANE, REG_BACKPLANE_CHIP_CLOCK_CSR, BACKPLANE_ALP_AVAIL_REQ) - .await; - info!("waiting for clock..."); - while self.bus.read8(FUNC_BACKPLANE, REG_BACKPLANE_CHIP_CLOCK_CSR).await & BACKPLANE_ALP_AVAIL == 0 {} - info!("clock ok"); - - let chip_id = self.bus.bp_read16(0x1800_0000).await; - info!("chip ID: {}", chip_id); - - // Upload firmware. - self.core_disable(Core::WLAN).await; - self.core_reset(Core::SOCSRAM).await; - self.bus.bp_write32(CHIP.socsram_base_address + 0x10, 3).await; - self.bus.bp_write32(CHIP.socsram_base_address + 0x44, 0).await; - - let ram_addr = CHIP.atcm_ram_base_address; - - info!("loading fw"); - self.bus.bp_write(ram_addr, firmware).await; - - info!("loading nvram"); - // Round up to 4 bytes. - let nvram_len = (NVRAM.len() + 3) / 4 * 4; - self.bus - .bp_write(ram_addr + CHIP.chip_ram_size - 4 - nvram_len as u32, NVRAM) - .await; - - let nvram_len_words = nvram_len as u32 / 4; - let nvram_len_magic = (!nvram_len_words << 16) | nvram_len_words; - self.bus - .bp_write32(ram_addr + CHIP.chip_ram_size - 4, nvram_len_magic) - .await; - - // Start core! - info!("starting up core..."); - self.core_reset(Core::WLAN).await; - assert!(self.core_is_up(Core::WLAN).await); - - while self.bus.read8(FUNC_BACKPLANE, REG_BACKPLANE_CHIP_CLOCK_CSR).await & 0x80 == 0 {} - - // "Set up the interrupt mask and enable interrupts" - self.bus.bp_write32(CHIP.sdiod_core_base_address + 0x24, 0xF0).await; - - // "Lower F2 Watermark to avoid DMA Hang in F2 when SD Clock is stopped." - // Sounds scary... - self.bus - .write8(FUNC_BACKPLANE, REG_BACKPLANE_FUNCTION2_WATERMARK, 32) - .await; - - // wait for wifi startup - info!("waiting for wifi init..."); - while self.bus.read32(FUNC_BUS, REG_BUS_STATUS).await & STATUS_F2_RX_READY == 0 {} - - // Some random configs related to sleep. - // These aren't needed if we don't want to sleep the bus. - // TODO do we need to sleep the bus to read the irq line, due to - // being on the same pin as MOSI/MISO? - - /* - let mut val = self.bus.read8(FUNC_BACKPLANE, REG_BACKPLANE_WAKEUP_CTRL).await; - val |= 0x02; // WAKE_TILL_HT_AVAIL - self.bus.write8(FUNC_BACKPLANE, REG_BACKPLANE_WAKEUP_CTRL, val).await; - self.bus.write8(FUNC_BUS, 0xF0, 0x08).await; // SDIOD_CCCR_BRCM_CARDCAP.CMD_NODEC = 1 - self.bus.write8(FUNC_BACKPLANE, REG_BACKPLANE_CHIP_CLOCK_CSR, 0x02).await; // SBSDIO_FORCE_HT - - let mut val = self.bus.read8(FUNC_BACKPLANE, REG_BACKPLANE_SLEEP_CSR).await; - val |= 0x01; // SBSDIO_SLPCSR_KEEP_SDIO_ON - self.bus.write8(FUNC_BACKPLANE, REG_BACKPLANE_SLEEP_CSR, val).await; - */ - - // clear pulls - self.bus.write8(FUNC_BACKPLANE, REG_BACKPLANE_PULL_UP, 0).await; - let _ = self.bus.read8(FUNC_BACKPLANE, REG_BACKPLANE_PULL_UP).await; - - // start HT clock - //self.bus.write8(FUNC_BACKPLANE, REG_BACKPLANE_CHIP_CLOCK_CSR, 0x10).await; - //info!("waiting for HT clock..."); - //while self.bus.read8(FUNC_BACKPLANE, REG_BACKPLANE_CHIP_CLOCK_CSR).await & 0x80 == 0 {} - //info!("clock ok"); - - #[cfg(feature = "firmware-logs")] - self.log_init().await; - - info!("init done "); - } - - #[cfg(feature = "firmware-logs")] - async fn log_init(&mut self) { - // Initialize shared memory for logging. - - let addr = CHIP.atcm_ram_base_address + CHIP.chip_ram_size - 4 - CHIP.socram_srmem_size; - let shared_addr = self.bus.bp_read32(addr).await; - info!("shared_addr {:08x}", shared_addr); - - let mut shared = [0; SharedMemData::SIZE]; - self.bus.bp_read(shared_addr, &mut shared).await; - let shared = SharedMemData::from_bytes(&shared); - info!("shared: {:08x}", shared); - - self.log.addr = shared.console_addr + 8; - } - - #[cfg(feature = "firmware-logs")] - async fn log_read(&mut self) { - // Read log struct - let mut log = [0; SharedMemLog::SIZE]; - self.bus.bp_read(self.log.addr, &mut log).await; - let log = SharedMemLog::from_bytes(&log); - - let idx = log.idx as usize; - - // If pointer hasn't moved, no need to do anything. - if idx == self.log.last_idx { - return; - } - - // Read entire buf for now. We could read only what we need, but then we - // run into annoying alignment issues in `bp_read`. - let mut buf = [0; 0x400]; - self.bus.bp_read(log.buf, &mut buf).await; - - while self.log.last_idx != idx as usize { - let b = buf[self.log.last_idx]; - if b == b'\r' || b == b'\n' { - if self.log.buf_count != 0 { - let s = unsafe { core::str::from_utf8_unchecked(&self.log.buf[..self.log.buf_count]) }; - debug!("LOGS: {}", s); - self.log.buf_count = 0; - } - } else if self.log.buf_count < self.log.buf.len() { - self.log.buf[self.log.buf_count] = b; - self.log.buf_count += 1; - } - - self.log.last_idx += 1; - if self.log.last_idx == 0x400 { - self.log.last_idx = 0; - } - } - } - - pub async fn run(mut self) -> ! { - let mut buf = [0; 512]; - loop { - #[cfg(feature = "firmware-logs")] - self.log_read().await; - - // Send stuff - // TODO flow control not yet complete - if !self.has_credit() { - warn!("TX stalled"); - } else { - if let IoctlState::Pending { kind, cmd, iface, buf } = self.ioctl_state.get() { - self.send_ioctl(kind, cmd, iface, unsafe { &*buf }).await; - self.ioctl_state.set(IoctlState::Sent { buf }); - } - if !self.has_credit() { - warn!("TX stalled"); - } else { - if let Some(packet) = self.ch.try_tx_buf() { - trace!("tx pkt {:02x}", &packet[..packet.len().min(48)]); - - let mut buf = [0; 512]; - let buf8 = slice8_mut(&mut buf); - - let total_len = SdpcmHeader::SIZE + BcdHeader::SIZE + packet.len(); - - let seq = self.sdpcm_seq; - self.sdpcm_seq = self.sdpcm_seq.wrapping_add(1); - - let sdpcm_header = SdpcmHeader { - len: total_len as u16, // TODO does this len need to be rounded up to u32? - len_inv: !total_len as u16, - sequence: seq, - channel_and_flags: CHANNEL_TYPE_DATA, - next_length: 0, - header_length: SdpcmHeader::SIZE as _, - wireless_flow_control: 0, - bus_data_credit: 0, - reserved: [0, 0], - }; - - let bcd_header = BcdHeader { - flags: BDC_VERSION << BDC_VERSION_SHIFT, - priority: 0, - flags2: 0, - data_offset: 0, - }; - trace!("tx {:?}", sdpcm_header); - trace!(" {:?}", bcd_header); - - buf8[0..SdpcmHeader::SIZE].copy_from_slice(&sdpcm_header.to_bytes()); - buf8[SdpcmHeader::SIZE..][..BcdHeader::SIZE].copy_from_slice(&bcd_header.to_bytes()); - buf8[SdpcmHeader::SIZE + BcdHeader::SIZE..][..packet.len()].copy_from_slice(packet); - - let total_len = (total_len + 3) & !3; // round up to 4byte - - trace!(" {:02x}", &buf8[..total_len.min(48)]); - - self.bus.wlan_write(&buf[..(total_len / 4)]).await; - self.ch.tx_done(); - } - } - } - - // Receive stuff - let irq = self.bus.read16(FUNC_BUS, REG_BUS_INTERRUPT).await; - - if irq & IRQ_F2_PACKET_AVAILABLE != 0 { - let mut status = 0xFFFF_FFFF; - while status == 0xFFFF_FFFF { - status = self.bus.read32(FUNC_BUS, REG_BUS_STATUS).await; - } - - if status & STATUS_F2_PKT_AVAILABLE != 0 { - let len = (status & STATUS_F2_PKT_LEN_MASK) >> STATUS_F2_PKT_LEN_SHIFT; - self.bus.wlan_read(&mut buf, len).await; - trace!("rx {:02x}", &slice8_mut(&mut buf)[..(len as usize).min(48)]); - self.rx(&slice8_mut(&mut buf)[..len as usize]); - } - } - - // TODO use IRQs - yield_now().await; - } - } - - fn rx(&mut self, packet: &[u8]) { - if packet.len() < SdpcmHeader::SIZE { - warn!("packet too short, len={}", packet.len()); - return; - } - - let sdpcm_header = SdpcmHeader::from_bytes(packet[..SdpcmHeader::SIZE].try_into().unwrap()); - trace!("rx {:?}", sdpcm_header); - if sdpcm_header.len != !sdpcm_header.len_inv { - warn!("len inv mismatch"); - return; - } - if sdpcm_header.len as usize != packet.len() { - // TODO: is this guaranteed?? - warn!("len from header doesn't match len from spi"); - return; - } - - self.update_credit(&sdpcm_header); - - let channel = sdpcm_header.channel_and_flags & 0x0f; - - let payload = &packet[sdpcm_header.header_length as _..]; - - match channel { - CHANNEL_TYPE_CONTROL => { - if payload.len() < CdcHeader::SIZE { - warn!("payload too short, len={}", payload.len()); - return; - } - - let cdc_header = CdcHeader::from_bytes(payload[..CdcHeader::SIZE].try_into().unwrap()); - trace!(" {:?}", cdc_header); - - if let IoctlState::Sent { buf } = self.ioctl_state.get() { - if cdc_header.id == self.ioctl_id { - if cdc_header.status != 0 { - // TODO: propagate error instead - panic!("IOCTL error {=i32}", cdc_header.status as i32); - } - - let resp_len = cdc_header.len as usize; - info!("IOCTL Response: {:02x}", &payload[CdcHeader::SIZE..][..resp_len]); - - (unsafe { &mut *buf }[..resp_len]).copy_from_slice(&payload[CdcHeader::SIZE..][..resp_len]); - self.ioctl_state.set(IoctlState::Done { resp_len }); - } - } - } - CHANNEL_TYPE_EVENT => { - let bcd_header = BcdHeader::from_bytes(&payload[..BcdHeader::SIZE].try_into().unwrap()); - trace!(" {:?}", bcd_header); - - let packet_start = BcdHeader::SIZE + 4 * bcd_header.data_offset as usize; - - if packet_start + EventPacket::SIZE > payload.len() { - warn!("BCD event, incomplete header"); - return; - } - let bcd_packet = &payload[packet_start..]; - trace!(" {:02x}", &bcd_packet[..(bcd_packet.len() as usize).min(36)]); - - let mut event_packet = EventPacket::from_bytes(&bcd_packet[..EventPacket::SIZE].try_into().unwrap()); - event_packet.byteswap(); - - const ETH_P_LINK_CTL: u16 = 0x886c; // HPNA, wlan link local tunnel, according to linux if_ether.h - if event_packet.eth.ether_type != ETH_P_LINK_CTL { - warn!( - "unexpected ethernet type 0x{:04x}, expected Broadcom ether type 0x{:04x}", - event_packet.eth.ether_type, ETH_P_LINK_CTL - ); - return; - } - const BROADCOM_OUI: &[u8] = &[0x00, 0x10, 0x18]; - if event_packet.hdr.oui != BROADCOM_OUI { - warn!( - "unexpected ethernet OUI {:02x}, expected Broadcom OUI {:02x}", - event_packet.hdr.oui, BROADCOM_OUI - ); - return; - } - const BCMILCP_SUBTYPE_VENDOR_LONG: u16 = 32769; - if event_packet.hdr.subtype != BCMILCP_SUBTYPE_VENDOR_LONG { - warn!("unexpected subtype {}", event_packet.hdr.subtype); - return; - } - - const BCMILCP_BCM_SUBTYPE_EVENT: u16 = 1; - if event_packet.hdr.user_subtype != BCMILCP_BCM_SUBTYPE_EVENT { - warn!("unexpected user_subtype {}", event_packet.hdr.subtype); - return; - } - - if event_packet.msg.datalen as usize >= (bcd_packet.len() - EventMessage::SIZE) { - warn!("BCD event, incomplete data"); - return; - } - - let evt_type = events::Event::from(event_packet.msg.event_type as u8); - let evt_data = &bcd_packet[EventMessage::SIZE..][..event_packet.msg.datalen as usize]; - debug!("=== EVENT {}: {} {:02x}", evt_type, event_packet.msg, evt_data); - - if evt_type == events::Event::AUTH || evt_type == events::Event::JOIN { - self.events.publish_immediate(EventStatus { - status: event_packet.msg.status, - event_type: evt_type, - }); - } - } - CHANNEL_TYPE_DATA => { - let bcd_header = BcdHeader::from_bytes(&payload[..BcdHeader::SIZE].try_into().unwrap()); - trace!(" {:?}", bcd_header); - - let packet_start = BcdHeader::SIZE + 4 * bcd_header.data_offset as usize; - if packet_start > payload.len() { - warn!("packet start out of range."); - return; - } - let packet = &payload[packet_start..]; - trace!("rx pkt {:02x}", &packet[..(packet.len() as usize).min(48)]); - - match self.ch.try_rx_buf() { - Some(buf) => { - buf[..packet.len()].copy_from_slice(packet); - self.ch.rx_done(packet.len()) - } - None => warn!("failed to push rxd packet to the channel."), - } - } - _ => {} - } - } - - fn update_credit(&mut self, sdpcm_header: &SdpcmHeader) { - if sdpcm_header.channel_and_flags & 0xf < 3 { - let mut sdpcm_seq_max = sdpcm_header.bus_data_credit; - if sdpcm_seq_max.wrapping_sub(self.sdpcm_seq) > 0x40 { - sdpcm_seq_max = self.sdpcm_seq + 2; - } - self.sdpcm_seq_max = sdpcm_seq_max; - } - } - - fn has_credit(&self) -> bool { - self.sdpcm_seq != self.sdpcm_seq_max && self.sdpcm_seq_max.wrapping_sub(self.sdpcm_seq) & 0x80 == 0 - } - - async fn send_ioctl(&mut self, kind: IoctlType, cmd: u32, iface: u32, data: &[u8]) { - let mut buf = [0; 512]; - let buf8 = slice8_mut(&mut buf); - - let total_len = SdpcmHeader::SIZE + CdcHeader::SIZE + data.len(); - - let sdpcm_seq = self.sdpcm_seq; - self.sdpcm_seq = self.sdpcm_seq.wrapping_add(1); - self.ioctl_id = self.ioctl_id.wrapping_add(1); - - let sdpcm_header = SdpcmHeader { - len: total_len as u16, // TODO does this len need to be rounded up to u32? - len_inv: !total_len as u16, - sequence: sdpcm_seq, - channel_and_flags: CHANNEL_TYPE_CONTROL, - next_length: 0, - header_length: SdpcmHeader::SIZE as _, - wireless_flow_control: 0, - bus_data_credit: 0, - reserved: [0, 0], - }; - - let cdc_header = CdcHeader { - cmd: cmd, - len: data.len() as _, - flags: kind as u16 | (iface as u16) << 12, - id: self.ioctl_id, - status: 0, - }; - trace!("tx {:?}", sdpcm_header); - trace!(" {:?}", cdc_header); - - buf8[0..SdpcmHeader::SIZE].copy_from_slice(&sdpcm_header.to_bytes()); - buf8[SdpcmHeader::SIZE..][..CdcHeader::SIZE].copy_from_slice(&cdc_header.to_bytes()); - buf8[SdpcmHeader::SIZE + CdcHeader::SIZE..][..data.len()].copy_from_slice(data); - - let total_len = (total_len + 3) & !3; // round up to 4byte - - trace!(" {:02x}", &buf8[..total_len.min(48)]); - - self.bus.wlan_write(&buf[..total_len / 4]).await; - } - - async fn core_disable(&mut self, core: Core) { - let base = core.base_addr(); - - // Dummy read? - let _ = self.bus.bp_read8(base + AI_RESETCTRL_OFFSET).await; - - // Check it isn't already reset - let r = self.bus.bp_read8(base + AI_RESETCTRL_OFFSET).await; - if r & AI_RESETCTRL_BIT_RESET != 0 { - return; - } - - self.bus.bp_write8(base + AI_IOCTRL_OFFSET, 0).await; - let _ = self.bus.bp_read8(base + AI_IOCTRL_OFFSET).await; - - block_for(Duration::from_millis(1)); - - self.bus - .bp_write8(base + AI_RESETCTRL_OFFSET, AI_RESETCTRL_BIT_RESET) - .await; - let _ = self.bus.bp_read8(base + AI_RESETCTRL_OFFSET).await; - } - - async fn core_reset(&mut self, core: Core) { - self.core_disable(core).await; - - let base = core.base_addr(); - self.bus - .bp_write8(base + AI_IOCTRL_OFFSET, AI_IOCTRL_BIT_FGC | AI_IOCTRL_BIT_CLOCK_EN) - .await; - let _ = self.bus.bp_read8(base + AI_IOCTRL_OFFSET).await; - - self.bus.bp_write8(base + AI_RESETCTRL_OFFSET, 0).await; - - Timer::after(Duration::from_millis(1)).await; - - self.bus - .bp_write8(base + AI_IOCTRL_OFFSET, AI_IOCTRL_BIT_CLOCK_EN) - .await; - let _ = self.bus.bp_read8(base + AI_IOCTRL_OFFSET).await; - - Timer::after(Duration::from_millis(1)).await; - } - - async fn core_is_up(&mut self, core: Core) -> bool { - let base = core.base_addr(); - - let io = self.bus.bp_read8(base + AI_IOCTRL_OFFSET).await; - if io & (AI_IOCTRL_BIT_FGC | AI_IOCTRL_BIT_CLOCK_EN) != AI_IOCTRL_BIT_CLOCK_EN { - debug!("core_is_up: returning false due to bad ioctrl {:02x}", io); - return false; - } - - let r = self.bus.bp_read8(base + AI_RESETCTRL_OFFSET).await; - if r & (AI_RESETCTRL_BIT_RESET) != 0 { - debug!("core_is_up: returning false due to bad resetctrl {:02x}", r); - return false; - } - - true - } -} - -fn slice8_mut(x: &mut [u32]) -> &mut [u8] { - let len = x.len() * 4; - unsafe { slice::from_raw_parts_mut(x.as_mut_ptr() as _, len) } -} - -macro_rules! nvram { - ($($s:literal,)*) => { - concat_bytes!($($s, b"\x00",)* b"\x00\x00") - }; -} - -static NVRAM: &'static [u8] = &*nvram!( - b"NVRAMRev=$Rev$", - b"manfid=0x2d0", - b"prodid=0x0727", - b"vendid=0x14e4", - b"devid=0x43e2", - b"boardtype=0x0887", - b"boardrev=0x1100", - b"boardnum=22", - b"macaddr=00:A0:50:b5:59:5e", - b"sromrev=11", - b"boardflags=0x00404001", - b"boardflags3=0x04000000", - b"xtalfreq=37400", - b"nocrc=1", - b"ag0=255", - b"aa2g=1", - b"ccode=ALL", - b"pa0itssit=0x20", - b"extpagain2g=0", - b"pa2ga0=-168,6649,-778", - b"AvVmid_c0=0x0,0xc8", - b"cckpwroffset0=5", - b"maxp2ga0=84", - b"txpwrbckof=6", - b"cckbw202gpo=0", - b"legofdmbw202gpo=0x66111111", - b"mcsbw202gpo=0x77711111", - b"propbw202gpo=0xdd", - b"ofdmdigfilttype=18", - b"ofdmdigfilttypebe=18", - b"papdmode=1", - b"papdvalidtest=1", - b"pacalidx2g=45", - b"papdepsoffset=-30", - b"papdendidx=58", - b"ltecxmux=0", - b"ltecxpadnum=0x0102", - b"ltecxfnsel=0x44", - b"ltecxgcigpio=0x01", - b"il0macaddr=00:90:4c:c5:12:38", - b"wl0id=0x431b", - b"deadman_to=0xffffffff", - b"muxenab=0x100", - b"spurconfig=0x3", - b"glitch_based_crsmin=1", - b"btc_mode=1", -); diff --git a/src/nvram.rs b/src/nvram.rs new file mode 100644 index 00000000..964a3128 --- /dev/null +++ b/src/nvram.rs @@ -0,0 +1,54 @@ +macro_rules! nvram { + ($($s:literal,)*) => { + concat_bytes!($($s, b"\x00",)* b"\x00\x00") + }; +} + +pub static NVRAM: &'static [u8] = &*nvram!( + b"NVRAMRev=$Rev$", + b"manfid=0x2d0", + b"prodid=0x0727", + b"vendid=0x14e4", + b"devid=0x43e2", + b"boardtype=0x0887", + b"boardrev=0x1100", + b"boardnum=22", + b"macaddr=00:A0:50:b5:59:5e", + b"sromrev=11", + b"boardflags=0x00404001", + b"boardflags3=0x04000000", + b"xtalfreq=37400", + b"nocrc=1", + b"ag0=255", + b"aa2g=1", + b"ccode=ALL", + b"pa0itssit=0x20", + b"extpagain2g=0", + b"pa2ga0=-168,6649,-778", + b"AvVmid_c0=0x0,0xc8", + b"cckpwroffset0=5", + b"maxp2ga0=84", + b"txpwrbckof=6", + b"cckbw202gpo=0", + b"legofdmbw202gpo=0x66111111", + b"mcsbw202gpo=0x77711111", + b"propbw202gpo=0xdd", + b"ofdmdigfilttype=18", + b"ofdmdigfilttypebe=18", + b"papdmode=1", + b"papdvalidtest=1", + b"pacalidx2g=45", + b"papdepsoffset=-30", + b"papdendidx=58", + b"ltecxmux=0", + b"ltecxpadnum=0x0102", + b"ltecxfnsel=0x44", + b"ltecxgcigpio=0x01", + b"il0macaddr=00:90:4c:c5:12:38", + b"wl0id=0x431b", + b"deadman_to=0xffffffff", + b"muxenab=0x100", + b"spurconfig=0x3", + b"glitch_based_crsmin=1", + b"btc_mode=1", +); diff --git a/src/runner.rs b/src/runner.rs new file mode 100644 index 00000000..5d840bc5 --- /dev/null +++ b/src/runner.rs @@ -0,0 +1,564 @@ +use core::cell::Cell; +use core::slice; + +use embassy_futures::yield_now; +use embassy_net_driver_channel as ch; +use embassy_sync::pubsub::PubSubBehavior; +use embassy_time::{block_for, Duration, Timer}; +use embedded_hal_1::digital::OutputPin; + +use crate::bus::Bus; +pub use crate::bus::SpiBusCyw43; +use crate::consts::*; +use crate::events::{EventQueue, EventStatus}; +use crate::nvram::NVRAM; +use crate::structs::*; +use crate::{events, Core, IoctlState, IoctlType, CHIP, MTU}; + +#[cfg(feature = "firmware-logs")] +struct LogState { + addr: u32, + last_idx: usize, + buf: [u8; 256], + buf_count: usize, +} + +impl Default for LogState { + fn default() -> Self { + Self { + addr: Default::default(), + last_idx: Default::default(), + buf: [0; 256], + buf_count: Default::default(), + } + } +} + +pub struct Runner<'a, PWR, SPI> { + ch: ch::Runner<'a, MTU>, + bus: Bus, + + ioctl_state: &'a Cell, + ioctl_id: u16, + sdpcm_seq: u8, + sdpcm_seq_max: u8, + + events: &'a EventQueue, + + #[cfg(feature = "firmware-logs")] + log: LogState, +} + +impl<'a, PWR, SPI> Runner<'a, PWR, SPI> +where + PWR: OutputPin, + SPI: SpiBusCyw43, +{ + pub(crate) fn new( + ch: ch::Runner<'a, MTU>, + bus: Bus, + ioctl_state: &'a Cell, + events: &'a EventQueue, + ) -> Self { + Self { + ch, + bus, + ioctl_state, + ioctl_id: 0, + sdpcm_seq: 0, + sdpcm_seq_max: 1, + events, + #[cfg(feature = "firmware-logs")] + log: LogState::default(), + } + } + + pub(crate) async fn init(&mut self, firmware: &[u8]) { + self.bus.init().await; + + // Init ALP (Active Low Power) clock + self.bus + .write8(FUNC_BACKPLANE, REG_BACKPLANE_CHIP_CLOCK_CSR, BACKPLANE_ALP_AVAIL_REQ) + .await; + info!("waiting for clock..."); + while self.bus.read8(FUNC_BACKPLANE, REG_BACKPLANE_CHIP_CLOCK_CSR).await & BACKPLANE_ALP_AVAIL == 0 {} + info!("clock ok"); + + let chip_id = self.bus.bp_read16(0x1800_0000).await; + info!("chip ID: {}", chip_id); + + // Upload firmware. + self.core_disable(Core::WLAN).await; + self.core_reset(Core::SOCSRAM).await; + self.bus.bp_write32(CHIP.socsram_base_address + 0x10, 3).await; + self.bus.bp_write32(CHIP.socsram_base_address + 0x44, 0).await; + + let ram_addr = CHIP.atcm_ram_base_address; + + info!("loading fw"); + self.bus.bp_write(ram_addr, firmware).await; + + info!("loading nvram"); + // Round up to 4 bytes. + let nvram_len = (NVRAM.len() + 3) / 4 * 4; + self.bus + .bp_write(ram_addr + CHIP.chip_ram_size - 4 - nvram_len as u32, NVRAM) + .await; + + let nvram_len_words = nvram_len as u32 / 4; + let nvram_len_magic = (!nvram_len_words << 16) | nvram_len_words; + self.bus + .bp_write32(ram_addr + CHIP.chip_ram_size - 4, nvram_len_magic) + .await; + + // Start core! + info!("starting up core..."); + self.core_reset(Core::WLAN).await; + assert!(self.core_is_up(Core::WLAN).await); + + while self.bus.read8(FUNC_BACKPLANE, REG_BACKPLANE_CHIP_CLOCK_CSR).await & 0x80 == 0 {} + + // "Set up the interrupt mask and enable interrupts" + self.bus.bp_write32(CHIP.sdiod_core_base_address + 0x24, 0xF0).await; + + // "Lower F2 Watermark to avoid DMA Hang in F2 when SD Clock is stopped." + // Sounds scary... + self.bus + .write8(FUNC_BACKPLANE, REG_BACKPLANE_FUNCTION2_WATERMARK, 32) + .await; + + // wait for wifi startup + info!("waiting for wifi init..."); + while self.bus.read32(FUNC_BUS, REG_BUS_STATUS).await & STATUS_F2_RX_READY == 0 {} + + // Some random configs related to sleep. + // These aren't needed if we don't want to sleep the bus. + // TODO do we need to sleep the bus to read the irq line, due to + // being on the same pin as MOSI/MISO? + + /* + let mut val = self.bus.read8(FUNC_BACKPLANE, REG_BACKPLANE_WAKEUP_CTRL).await; + val |= 0x02; // WAKE_TILL_HT_AVAIL + self.bus.write8(FUNC_BACKPLANE, REG_BACKPLANE_WAKEUP_CTRL, val).await; + self.bus.write8(FUNC_BUS, 0xF0, 0x08).await; // SDIOD_CCCR_BRCM_CARDCAP.CMD_NODEC = 1 + self.bus.write8(FUNC_BACKPLANE, REG_BACKPLANE_CHIP_CLOCK_CSR, 0x02).await; // SBSDIO_FORCE_HT + + let mut val = self.bus.read8(FUNC_BACKPLANE, REG_BACKPLANE_SLEEP_CSR).await; + val |= 0x01; // SBSDIO_SLPCSR_KEEP_SDIO_ON + self.bus.write8(FUNC_BACKPLANE, REG_BACKPLANE_SLEEP_CSR, val).await; + */ + + // clear pulls + self.bus.write8(FUNC_BACKPLANE, REG_BACKPLANE_PULL_UP, 0).await; + let _ = self.bus.read8(FUNC_BACKPLANE, REG_BACKPLANE_PULL_UP).await; + + // start HT clock + //self.bus.write8(FUNC_BACKPLANE, REG_BACKPLANE_CHIP_CLOCK_CSR, 0x10).await; + //info!("waiting for HT clock..."); + //while self.bus.read8(FUNC_BACKPLANE, REG_BACKPLANE_CHIP_CLOCK_CSR).await & 0x80 == 0 {} + //info!("clock ok"); + + #[cfg(feature = "firmware-logs")] + self.log_init().await; + + info!("init done "); + } + + #[cfg(feature = "firmware-logs")] + async fn log_init(&mut self) { + // Initialize shared memory for logging. + + let addr = CHIP.atcm_ram_base_address + CHIP.chip_ram_size - 4 - CHIP.socram_srmem_size; + let shared_addr = self.bus.bp_read32(addr).await; + info!("shared_addr {:08x}", shared_addr); + + let mut shared = [0; SharedMemData::SIZE]; + self.bus.bp_read(shared_addr, &mut shared).await; + let shared = SharedMemData::from_bytes(&shared); + info!("shared: {:08x}", shared); + + self.log.addr = shared.console_addr + 8; + } + + #[cfg(feature = "firmware-logs")] + async fn log_read(&mut self) { + // Read log struct + let mut log = [0; SharedMemLog::SIZE]; + self.bus.bp_read(self.log.addr, &mut log).await; + let log = SharedMemLog::from_bytes(&log); + + let idx = log.idx as usize; + + // If pointer hasn't moved, no need to do anything. + if idx == self.log.last_idx { + return; + } + + // Read entire buf for now. We could read only what we need, but then we + // run into annoying alignment issues in `bp_read`. + let mut buf = [0; 0x400]; + self.bus.bp_read(log.buf, &mut buf).await; + + while self.log.last_idx != idx as usize { + let b = buf[self.log.last_idx]; + if b == b'\r' || b == b'\n' { + if self.log.buf_count != 0 { + let s = unsafe { core::str::from_utf8_unchecked(&self.log.buf[..self.log.buf_count]) }; + debug!("LOGS: {}", s); + self.log.buf_count = 0; + } + } else if self.log.buf_count < self.log.buf.len() { + self.log.buf[self.log.buf_count] = b; + self.log.buf_count += 1; + } + + self.log.last_idx += 1; + if self.log.last_idx == 0x400 { + self.log.last_idx = 0; + } + } + } + + pub async fn run(mut self) -> ! { + let mut buf = [0; 512]; + loop { + #[cfg(feature = "firmware-logs")] + self.log_read().await; + + // Send stuff + // TODO flow control not yet complete + if !self.has_credit() { + warn!("TX stalled"); + } else { + if let IoctlState::Pending { kind, cmd, iface, buf } = self.ioctl_state.get() { + self.send_ioctl(kind, cmd, iface, unsafe { &*buf }).await; + self.ioctl_state.set(IoctlState::Sent { buf }); + } + if !self.has_credit() { + warn!("TX stalled"); + } else { + if let Some(packet) = self.ch.try_tx_buf() { + trace!("tx pkt {:02x}", &packet[..packet.len().min(48)]); + + let mut buf = [0; 512]; + let buf8 = slice8_mut(&mut buf); + + let total_len = SdpcmHeader::SIZE + BcdHeader::SIZE + packet.len(); + + let seq = self.sdpcm_seq; + self.sdpcm_seq = self.sdpcm_seq.wrapping_add(1); + + let sdpcm_header = SdpcmHeader { + len: total_len as u16, // TODO does this len need to be rounded up to u32? + len_inv: !total_len as u16, + sequence: seq, + channel_and_flags: CHANNEL_TYPE_DATA, + next_length: 0, + header_length: SdpcmHeader::SIZE as _, + wireless_flow_control: 0, + bus_data_credit: 0, + reserved: [0, 0], + }; + + let bcd_header = BcdHeader { + flags: BDC_VERSION << BDC_VERSION_SHIFT, + priority: 0, + flags2: 0, + data_offset: 0, + }; + trace!("tx {:?}", sdpcm_header); + trace!(" {:?}", bcd_header); + + buf8[0..SdpcmHeader::SIZE].copy_from_slice(&sdpcm_header.to_bytes()); + buf8[SdpcmHeader::SIZE..][..BcdHeader::SIZE].copy_from_slice(&bcd_header.to_bytes()); + buf8[SdpcmHeader::SIZE + BcdHeader::SIZE..][..packet.len()].copy_from_slice(packet); + + let total_len = (total_len + 3) & !3; // round up to 4byte + + trace!(" {:02x}", &buf8[..total_len.min(48)]); + + self.bus.wlan_write(&buf[..(total_len / 4)]).await; + self.ch.tx_done(); + } + } + } + + // Receive stuff + let irq = self.bus.read16(FUNC_BUS, REG_BUS_INTERRUPT).await; + + if irq & IRQ_F2_PACKET_AVAILABLE != 0 { + let mut status = 0xFFFF_FFFF; + while status == 0xFFFF_FFFF { + status = self.bus.read32(FUNC_BUS, REG_BUS_STATUS).await; + } + + if status & STATUS_F2_PKT_AVAILABLE != 0 { + let len = (status & STATUS_F2_PKT_LEN_MASK) >> STATUS_F2_PKT_LEN_SHIFT; + self.bus.wlan_read(&mut buf, len).await; + trace!("rx {:02x}", &slice8_mut(&mut buf)[..(len as usize).min(48)]); + self.rx(&slice8_mut(&mut buf)[..len as usize]); + } + } + + // TODO use IRQs + yield_now().await; + } + } + + fn rx(&mut self, packet: &[u8]) { + if packet.len() < SdpcmHeader::SIZE { + warn!("packet too short, len={}", packet.len()); + return; + } + + let sdpcm_header = SdpcmHeader::from_bytes(packet[..SdpcmHeader::SIZE].try_into().unwrap()); + trace!("rx {:?}", sdpcm_header); + if sdpcm_header.len != !sdpcm_header.len_inv { + warn!("len inv mismatch"); + return; + } + if sdpcm_header.len as usize != packet.len() { + // TODO: is this guaranteed?? + warn!("len from header doesn't match len from spi"); + return; + } + + self.update_credit(&sdpcm_header); + + let channel = sdpcm_header.channel_and_flags & 0x0f; + + let payload = &packet[sdpcm_header.header_length as _..]; + + match channel { + CHANNEL_TYPE_CONTROL => { + if payload.len() < CdcHeader::SIZE { + warn!("payload too short, len={}", payload.len()); + return; + } + + let cdc_header = CdcHeader::from_bytes(payload[..CdcHeader::SIZE].try_into().unwrap()); + trace!(" {:?}", cdc_header); + + if let IoctlState::Sent { buf } = self.ioctl_state.get() { + if cdc_header.id == self.ioctl_id { + if cdc_header.status != 0 { + // TODO: propagate error instead + panic!("IOCTL error {=i32}", cdc_header.status as i32); + } + + let resp_len = cdc_header.len as usize; + info!("IOCTL Response: {:02x}", &payload[CdcHeader::SIZE..][..resp_len]); + + (unsafe { &mut *buf }[..resp_len]).copy_from_slice(&payload[CdcHeader::SIZE..][..resp_len]); + self.ioctl_state.set(IoctlState::Done { resp_len }); + } + } + } + CHANNEL_TYPE_EVENT => { + let bcd_header = BcdHeader::from_bytes(&payload[..BcdHeader::SIZE].try_into().unwrap()); + trace!(" {:?}", bcd_header); + + let packet_start = BcdHeader::SIZE + 4 * bcd_header.data_offset as usize; + + if packet_start + EventPacket::SIZE > payload.len() { + warn!("BCD event, incomplete header"); + return; + } + let bcd_packet = &payload[packet_start..]; + trace!(" {:02x}", &bcd_packet[..(bcd_packet.len() as usize).min(36)]); + + let mut event_packet = EventPacket::from_bytes(&bcd_packet[..EventPacket::SIZE].try_into().unwrap()); + event_packet.byteswap(); + + const ETH_P_LINK_CTL: u16 = 0x886c; // HPNA, wlan link local tunnel, according to linux if_ether.h + if event_packet.eth.ether_type != ETH_P_LINK_CTL { + warn!( + "unexpected ethernet type 0x{:04x}, expected Broadcom ether type 0x{:04x}", + event_packet.eth.ether_type, ETH_P_LINK_CTL + ); + return; + } + const BROADCOM_OUI: &[u8] = &[0x00, 0x10, 0x18]; + if event_packet.hdr.oui != BROADCOM_OUI { + warn!( + "unexpected ethernet OUI {:02x}, expected Broadcom OUI {:02x}", + event_packet.hdr.oui, BROADCOM_OUI + ); + return; + } + const BCMILCP_SUBTYPE_VENDOR_LONG: u16 = 32769; + if event_packet.hdr.subtype != BCMILCP_SUBTYPE_VENDOR_LONG { + warn!("unexpected subtype {}", event_packet.hdr.subtype); + return; + } + + const BCMILCP_BCM_SUBTYPE_EVENT: u16 = 1; + if event_packet.hdr.user_subtype != BCMILCP_BCM_SUBTYPE_EVENT { + warn!("unexpected user_subtype {}", event_packet.hdr.subtype); + return; + } + + if event_packet.msg.datalen as usize >= (bcd_packet.len() - EventMessage::SIZE) { + warn!("BCD event, incomplete data"); + return; + } + + let evt_type = events::Event::from(event_packet.msg.event_type as u8); + let evt_data = &bcd_packet[EventMessage::SIZE..][..event_packet.msg.datalen as usize]; + debug!("=== EVENT {}: {} {:02x}", evt_type, event_packet.msg, evt_data); + + if evt_type == events::Event::AUTH || evt_type == events::Event::JOIN { + self.events.publish_immediate(EventStatus { + status: event_packet.msg.status, + event_type: evt_type, + }); + } + } + CHANNEL_TYPE_DATA => { + let bcd_header = BcdHeader::from_bytes(&payload[..BcdHeader::SIZE].try_into().unwrap()); + trace!(" {:?}", bcd_header); + + let packet_start = BcdHeader::SIZE + 4 * bcd_header.data_offset as usize; + if packet_start > payload.len() { + warn!("packet start out of range."); + return; + } + let packet = &payload[packet_start..]; + trace!("rx pkt {:02x}", &packet[..(packet.len() as usize).min(48)]); + + match self.ch.try_rx_buf() { + Some(buf) => { + buf[..packet.len()].copy_from_slice(packet); + self.ch.rx_done(packet.len()) + } + None => warn!("failed to push rxd packet to the channel."), + } + } + _ => {} + } + } + + fn update_credit(&mut self, sdpcm_header: &SdpcmHeader) { + if sdpcm_header.channel_and_flags & 0xf < 3 { + let mut sdpcm_seq_max = sdpcm_header.bus_data_credit; + if sdpcm_seq_max.wrapping_sub(self.sdpcm_seq) > 0x40 { + sdpcm_seq_max = self.sdpcm_seq + 2; + } + self.sdpcm_seq_max = sdpcm_seq_max; + } + } + + fn has_credit(&self) -> bool { + self.sdpcm_seq != self.sdpcm_seq_max && self.sdpcm_seq_max.wrapping_sub(self.sdpcm_seq) & 0x80 == 0 + } + + async fn send_ioctl(&mut self, kind: IoctlType, cmd: u32, iface: u32, data: &[u8]) { + let mut buf = [0; 512]; + let buf8 = slice8_mut(&mut buf); + + let total_len = SdpcmHeader::SIZE + CdcHeader::SIZE + data.len(); + + let sdpcm_seq = self.sdpcm_seq; + self.sdpcm_seq = self.sdpcm_seq.wrapping_add(1); + self.ioctl_id = self.ioctl_id.wrapping_add(1); + + let sdpcm_header = SdpcmHeader { + len: total_len as u16, // TODO does this len need to be rounded up to u32? + len_inv: !total_len as u16, + sequence: sdpcm_seq, + channel_and_flags: CHANNEL_TYPE_CONTROL, + next_length: 0, + header_length: SdpcmHeader::SIZE as _, + wireless_flow_control: 0, + bus_data_credit: 0, + reserved: [0, 0], + }; + + let cdc_header = CdcHeader { + cmd: cmd, + len: data.len() as _, + flags: kind as u16 | (iface as u16) << 12, + id: self.ioctl_id, + status: 0, + }; + trace!("tx {:?}", sdpcm_header); + trace!(" {:?}", cdc_header); + + buf8[0..SdpcmHeader::SIZE].copy_from_slice(&sdpcm_header.to_bytes()); + buf8[SdpcmHeader::SIZE..][..CdcHeader::SIZE].copy_from_slice(&cdc_header.to_bytes()); + buf8[SdpcmHeader::SIZE + CdcHeader::SIZE..][..data.len()].copy_from_slice(data); + + let total_len = (total_len + 3) & !3; // round up to 4byte + + trace!(" {:02x}", &buf8[..total_len.min(48)]); + + self.bus.wlan_write(&buf[..total_len / 4]).await; + } + + async fn core_disable(&mut self, core: Core) { + let base = core.base_addr(); + + // Dummy read? + let _ = self.bus.bp_read8(base + AI_RESETCTRL_OFFSET).await; + + // Check it isn't already reset + let r = self.bus.bp_read8(base + AI_RESETCTRL_OFFSET).await; + if r & AI_RESETCTRL_BIT_RESET != 0 { + return; + } + + self.bus.bp_write8(base + AI_IOCTRL_OFFSET, 0).await; + let _ = self.bus.bp_read8(base + AI_IOCTRL_OFFSET).await; + + block_for(Duration::from_millis(1)); + + self.bus + .bp_write8(base + AI_RESETCTRL_OFFSET, AI_RESETCTRL_BIT_RESET) + .await; + let _ = self.bus.bp_read8(base + AI_RESETCTRL_OFFSET).await; + } + + async fn core_reset(&mut self, core: Core) { + self.core_disable(core).await; + + let base = core.base_addr(); + self.bus + .bp_write8(base + AI_IOCTRL_OFFSET, AI_IOCTRL_BIT_FGC | AI_IOCTRL_BIT_CLOCK_EN) + .await; + let _ = self.bus.bp_read8(base + AI_IOCTRL_OFFSET).await; + + self.bus.bp_write8(base + AI_RESETCTRL_OFFSET, 0).await; + + Timer::after(Duration::from_millis(1)).await; + + self.bus + .bp_write8(base + AI_IOCTRL_OFFSET, AI_IOCTRL_BIT_CLOCK_EN) + .await; + let _ = self.bus.bp_read8(base + AI_IOCTRL_OFFSET).await; + + Timer::after(Duration::from_millis(1)).await; + } + + async fn core_is_up(&mut self, core: Core) -> bool { + let base = core.base_addr(); + + let io = self.bus.bp_read8(base + AI_IOCTRL_OFFSET).await; + if io & (AI_IOCTRL_BIT_FGC | AI_IOCTRL_BIT_CLOCK_EN) != AI_IOCTRL_BIT_CLOCK_EN { + debug!("core_is_up: returning false due to bad ioctrl {:02x}", io); + return false; + } + + let r = self.bus.bp_read8(base + AI_RESETCTRL_OFFSET).await; + if r & (AI_RESETCTRL_BIT_RESET) != 0 { + debug!("core_is_up: returning false due to bad resetctrl {:02x}", r); + return false; + } + + true + } +} + +fn slice8_mut(x: &mut [u32]) -> &mut [u8] { + let len = x.len() * 4; + unsafe { slice::from_raw_parts_mut(x.as_mut_ptr() as _, len) } +} From cffc3fc7956570c66bf1bd259a4f68a8ca02fe58 Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Mon, 27 Mar 2023 03:33:06 +0200 Subject: [PATCH 074/130] Fix build with log. --- src/bus.rs | 12 ++++++------ src/control.rs | 7 ++++--- src/events.rs | 2 +- src/fmt.rs | 29 +++++++++++++++++++++++++++++ src/runner.rs | 29 ++++++++++++++++++----------- src/structs.rs | 8 ++++---- 6 files changed, 62 insertions(+), 25 deletions(-) diff --git a/src/bus.rs b/src/bus.rs index f77b890d..7700a832 100644 --- a/src/bus.rs +++ b/src/bus.rs @@ -49,30 +49,30 @@ where while self .read32_swapped(REG_BUS_TEST_RO) - .inspect(|v| defmt::trace!("{:#x}", v)) + .inspect(|v| trace!("{:#x}", v)) .await != FEEDBEAD {} self.write32_swapped(REG_BUS_TEST_RW, TEST_PATTERN).await; let val = self.read32_swapped(REG_BUS_TEST_RW).await; - defmt::trace!("{:#x}", val); + trace!("{:#x}", val); assert_eq!(val, TEST_PATTERN); let val = self.read32_swapped(REG_BUS_CTRL).await; - defmt::trace!("{:#010b}", (val & 0xff)); + trace!("{:#010b}", (val & 0xff)); // 32-bit word length, little endian (which is the default endianess). self.write32_swapped(REG_BUS_CTRL, WORD_LENGTH_32 | HIGH_SPEED).await; let val = self.read8(FUNC_BUS, REG_BUS_CTRL).await; - defmt::trace!("{:#b}", val); + trace!("{:#b}", val); let val = self.read32(FUNC_BUS, REG_BUS_TEST_RO).await; - defmt::trace!("{:#x}", val); + trace!("{:#x}", val); assert_eq!(val, FEEDBEAD); let val = self.read32(FUNC_BUS, REG_BUS_TEST_RW).await; - defmt::trace!("{:#x}", val); + trace!("{:#x}", val); assert_eq!(val, TEST_PATTERN); } diff --git a/src/control.rs b/src/control.rs index 7f1c9fe8..8bfa033b 100644 --- a/src/control.rs +++ b/src/control.rs @@ -9,6 +9,7 @@ use embassy_time::{Duration, Timer}; pub use crate::bus::SpiBusCyw43; use crate::consts::*; use crate::events::{Event, EventQueue}; +use crate::fmt::Bytes; use crate::structs::*; use crate::{countries, IoctlState, IoctlType, PowerManagementMode}; @@ -75,7 +76,7 @@ impl<'a> Control<'a> { // read MAC addr. let mut mac_addr = [0; 6]; assert_eq!(self.get_iovar("cur_etheraddr", &mut mac_addr).await, 6); - info!("mac addr: {:02x}", mac_addr); + info!("mac addr: {:02x}", Bytes(&mac_addr)); let country = countries::WORLD_WIDE_XX; let country_info = CountryInfo { @@ -205,7 +206,7 @@ impl<'a> Control<'a> { let msg = subscriber.next_message_pure().await; if msg.event_type == Event::AUTH && msg.status != 0 { // retry - defmt::warn!("JOIN failed with status={}", msg.status); + warn!("JOIN failed with status={}", msg.status); self.ioctl(IoctlType::Set, 26, 0, &mut i.to_bytes()).await; } else if msg.event_type == Event::JOIN && msg.status == 0 { // successful join @@ -241,7 +242,7 @@ impl<'a> Control<'a> { } async fn set_iovar(&mut self, name: &str, val: &[u8]) { - info!("set {} = {:02x}", name, val); + info!("set {} = {:02x}", name, Bytes(val)); let mut buf = [0; 64]; buf[..name.len()].copy_from_slice(name.as_bytes()); diff --git a/src/events.rs b/src/events.rs index 9e6bb962..b9c8cca6 100644 --- a/src/events.rs +++ b/src/events.rs @@ -6,7 +6,7 @@ use core::num; use embassy_sync::blocking_mutex::raw::CriticalSectionRawMutex; use embassy_sync::pubsub::{PubSubChannel, Publisher, Subscriber}; -#[derive(Clone, Copy, PartialEq, Eq, num_enum::FromPrimitive)] +#[derive(Debug, Clone, Copy, PartialEq, Eq, num_enum::FromPrimitive)] #[cfg_attr(feature = "defmt", derive(defmt::Format))] #[repr(u8)] pub enum Event { diff --git a/src/fmt.rs b/src/fmt.rs index f8bb0a03..5730447b 100644 --- a/src/fmt.rs +++ b/src/fmt.rs @@ -1,6 +1,8 @@ #![macro_use] #![allow(unused_macros)] +use core::fmt::{Debug, Display, LowerHex}; + #[cfg(all(feature = "defmt", feature = "log"))] compile_error!("You may not enable both `defmt` and `log` features."); @@ -226,3 +228,30 @@ impl Try for Result { self } } + +pub struct Bytes<'a>(pub &'a [u8]); + +impl<'a> Debug for Bytes<'a> { + fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { + write!(f, "{:#02x?}", self.0) + } +} + +impl<'a> Display for Bytes<'a> { + fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { + write!(f, "{:#02x?}", self.0) + } +} + +impl<'a> LowerHex for Bytes<'a> { + fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { + write!(f, "{:#02x?}", self.0) + } +} + +#[cfg(feature = "defmt")] +impl<'a> defmt::Format for Bytes<'a> { + fn format(&self, fmt: defmt::Formatter) { + defmt::write!(fmt, "{:02x}", self.0) + } +} diff --git a/src/runner.rs b/src/runner.rs index 5d840bc5..9945af3f 100644 --- a/src/runner.rs +++ b/src/runner.rs @@ -11,6 +11,7 @@ use crate::bus::Bus; pub use crate::bus::SpiBusCyw43; use crate::consts::*; use crate::events::{EventQueue, EventStatus}; +use crate::fmt::Bytes; use crate::nvram::NVRAM; use crate::structs::*; use crate::{events, Core, IoctlState, IoctlType, CHIP, MTU}; @@ -23,6 +24,7 @@ struct LogState { buf_count: usize, } +#[cfg(feature = "firmware-logs")] impl Default for LogState { fn default() -> Self { Self { @@ -175,7 +177,6 @@ where let mut shared = [0; SharedMemData::SIZE]; self.bus.bp_read(shared_addr, &mut shared).await; let shared = SharedMemData::from_bytes(&shared); - info!("shared: {:08x}", shared); self.log.addr = shared.console_addr + 8; } @@ -238,7 +239,7 @@ where warn!("TX stalled"); } else { if let Some(packet) = self.ch.try_tx_buf() { - trace!("tx pkt {:02x}", &packet[..packet.len().min(48)]); + trace!("tx pkt {:02x}", Bytes(&packet[..packet.len().min(48)])); let mut buf = [0; 512]; let buf8 = slice8_mut(&mut buf); @@ -275,7 +276,7 @@ where let total_len = (total_len + 3) & !3; // round up to 4byte - trace!(" {:02x}", &buf8[..total_len.min(48)]); + trace!(" {:02x}", Bytes(&buf8[..total_len.min(48)])); self.bus.wlan_write(&buf[..(total_len / 4)]).await; self.ch.tx_done(); @@ -295,7 +296,7 @@ where if status & STATUS_F2_PKT_AVAILABLE != 0 { let len = (status & STATUS_F2_PKT_LEN_MASK) >> STATUS_F2_PKT_LEN_SHIFT; self.bus.wlan_read(&mut buf, len).await; - trace!("rx {:02x}", &slice8_mut(&mut buf)[..(len as usize).min(48)]); + trace!("rx {:02x}", Bytes(&slice8_mut(&mut buf)[..(len as usize).min(48)])); self.rx(&slice8_mut(&mut buf)[..len as usize]); } } @@ -343,11 +344,11 @@ where if cdc_header.id == self.ioctl_id { if cdc_header.status != 0 { // TODO: propagate error instead - panic!("IOCTL error {=i32}", cdc_header.status as i32); + panic!("IOCTL error {}", cdc_header.status as i32); } let resp_len = cdc_header.len as usize; - info!("IOCTL Response: {:02x}", &payload[CdcHeader::SIZE..][..resp_len]); + info!("IOCTL Response: {:02x}", Bytes(&payload[CdcHeader::SIZE..][..resp_len])); (unsafe { &mut *buf }[..resp_len]).copy_from_slice(&payload[CdcHeader::SIZE..][..resp_len]); self.ioctl_state.set(IoctlState::Done { resp_len }); @@ -365,7 +366,7 @@ where return; } let bcd_packet = &payload[packet_start..]; - trace!(" {:02x}", &bcd_packet[..(bcd_packet.len() as usize).min(36)]); + trace!(" {:02x}", Bytes(&bcd_packet[..(bcd_packet.len() as usize).min(36)])); let mut event_packet = EventPacket::from_bytes(&bcd_packet[..EventPacket::SIZE].try_into().unwrap()); event_packet.byteswap(); @@ -382,7 +383,8 @@ where if event_packet.hdr.oui != BROADCOM_OUI { warn!( "unexpected ethernet OUI {:02x}, expected Broadcom OUI {:02x}", - event_packet.hdr.oui, BROADCOM_OUI + Bytes(&event_packet.hdr.oui), + Bytes(BROADCOM_OUI) ); return; } @@ -405,7 +407,12 @@ where let evt_type = events::Event::from(event_packet.msg.event_type as u8); let evt_data = &bcd_packet[EventMessage::SIZE..][..event_packet.msg.datalen as usize]; - debug!("=== EVENT {}: {} {:02x}", evt_type, event_packet.msg, evt_data); + debug!( + "=== EVENT {:?}: {:?} {:02x}", + evt_type, + event_packet.msg, + Bytes(evt_data) + ); if evt_type == events::Event::AUTH || evt_type == events::Event::JOIN { self.events.publish_immediate(EventStatus { @@ -424,7 +431,7 @@ where return; } let packet = &payload[packet_start..]; - trace!("rx pkt {:02x}", &packet[..(packet.len() as usize).min(48)]); + trace!("rx pkt {:02x}", Bytes(&packet[..(packet.len() as usize).min(48)])); match self.ch.try_rx_buf() { Some(buf) => { @@ -490,7 +497,7 @@ where let total_len = (total_len + 3) & !3; // round up to 4byte - trace!(" {:02x}", &buf8[..total_len.min(48)]); + trace!(" {:02x}", Bytes(&buf8[..total_len.min(48)])); self.bus.wlan_write(&buf[..total_len / 4]).await; } diff --git a/src/structs.rs b/src/structs.rs index 41a34066..e16808f3 100644 --- a/src/structs.rs +++ b/src/structs.rs @@ -44,7 +44,7 @@ pub struct SharedMemLog { } impl_bytes!(SharedMemLog); -#[derive(Clone, Copy)] +#[derive(Debug, Clone, Copy)] #[cfg_attr(feature = "defmt", derive(defmt::Format))] #[repr(C)] pub struct SdpcmHeader { @@ -67,7 +67,7 @@ pub struct SdpcmHeader { } impl_bytes!(SdpcmHeader); -#[derive(Clone, Copy)] +#[derive(Debug, Clone, Copy)] #[cfg_attr(feature = "defmt", derive(defmt::Format))] #[repr(C)] pub struct CdcHeader { @@ -82,7 +82,7 @@ impl_bytes!(CdcHeader); pub const BDC_VERSION: u8 = 2; pub const BDC_VERSION_SHIFT: u8 = 4; -#[derive(Clone, Copy)] +#[derive(Debug, Clone, Copy)] #[cfg_attr(feature = "defmt", derive(defmt::Format))] #[repr(C)] pub struct BcdHeader { @@ -129,7 +129,7 @@ impl EventHeader { } } -#[derive(Clone, Copy)] +#[derive(Debug, Clone, Copy)] #[cfg_attr(feature = "defmt", derive(defmt::Format))] #[repr(C)] pub struct EventMessage { From ed601d439a222d057f7f19d08ac2cc7d519e831a Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Mon, 27 Mar 2023 03:33:20 +0200 Subject: [PATCH 075/130] Add CI. --- .github/workflows/rust.yml | 29 +++++++++++++++++++++++++++++ Cargo.toml | 6 ++++++ ci.sh | 18 ++++++++++++++++++ 3 files changed, 53 insertions(+) create mode 100644 .github/workflows/rust.yml create mode 100755 ci.sh diff --git a/.github/workflows/rust.yml b/.github/workflows/rust.yml new file mode 100644 index 00000000..2cd3ba5d --- /dev/null +++ b/.github/workflows/rust.yml @@ -0,0 +1,29 @@ +name: Rust + +on: + push: + branches: [master] + pull_request: + branches: [master] + merge_group: + +env: + CARGO_TERM_COLOR: always + +jobs: + build-nightly: + runs-on: ubuntu-latest + steps: + - uses: actions/checkout@v2 + - uses: actions/cache@v2 + with: + path: | + ~/.cargo/registry + ~/.cargo/git + target + key: ${{ runner.os }}-cargo-${{ hashFiles('**/Cargo.lock') }} + + - name: Check fmt + run: cargo fmt -- --check + - name: Build + run: ./ci.sh diff --git a/Cargo.toml b/Cargo.toml index 3bdeb0cf..a307a6cc 100644 --- a/Cargo.toml +++ b/Cargo.toml @@ -26,3 +26,9 @@ futures = { version = "0.3.17", default-features = false, features = ["async-awa embedded-hal-1 = { package = "embedded-hal", version = "1.0.0-alpha.9" } num_enum = { version = "0.5.7", default-features = false } + +[patch.crates-io] +embassy-time = { git = "https://github.com/embassy-rs/embassy", rev = "e3f8020c3bdf726dfa451b5b190f27191507a18f" } +embassy-futures = { git = "https://github.com/embassy-rs/embassy", rev = "e3f8020c3bdf726dfa451b5b190f27191507a18f" } +embassy-sync = { git = "https://github.com/embassy-rs/embassy", rev = "e3f8020c3bdf726dfa451b5b190f27191507a18f" } +embassy-net-driver-channel = { git = "https://github.com/embassy-rs/embassy", rev = "e3f8020c3bdf726dfa451b5b190f27191507a18f" } diff --git a/ci.sh b/ci.sh new file mode 100755 index 00000000..1b33564f --- /dev/null +++ b/ci.sh @@ -0,0 +1,18 @@ +#!/bin/bash + +set -euxo pipefail + +# build examples +#================== + +(cd examples/rpi-pico-w; WIFI_NETWORK=foo WIFI_PASSWORD=bar cargo build --release) + + +# build with log/defmt combinations +#===================================== + +cargo build --target thumbv6m-none-eabi --features '' +cargo build --target thumbv6m-none-eabi --features 'log' +cargo build --target thumbv6m-none-eabi --features 'defmt' +cargo build --target thumbv6m-none-eabi --features 'log,firmware-logs' +cargo build --target thumbv6m-none-eabi --features 'defmt,firmware-logs' From 472138122542d6c47e666c8e6bb16cc6635ede0a Mon Sep 17 00:00:00 2001 From: kbleeke Date: Thu, 2 Mar 2023 19:22:43 +0100 Subject: [PATCH 076/130] also wait for join event in join_open --- src/control.rs | 17 +++++++++++------ 1 file changed, 11 insertions(+), 6 deletions(-) diff --git a/src/control.rs b/src/control.rs index 8bfa033b..79677b55 100644 --- a/src/control.rs +++ b/src/control.rs @@ -134,7 +134,6 @@ impl<'a> Control<'a> { Timer::after(Duration::from_millis(100)).await; self.state_ch.set_ethernet_address(mac_addr); - self.state_ch.set_link_state(LinkState::Up); // TODO do on join/leave info!("INIT DONE"); } @@ -164,10 +163,8 @@ impl<'a> Control<'a> { ssid: [0; 32], }; i.ssid[..ssid.len()].copy_from_slice(ssid.as_bytes()); - self.ioctl(IoctlType::Set, IOCTL_CMD_SET_SSID, 0, &mut i.to_bytes()) - .await; // set_ssid - info!("JOINED"); + self.wait_for_join(i).await; } pub async fn join_wpa2(&mut self, ssid: &str, passphrase: &str) { @@ -199,21 +196,29 @@ impl<'a> Control<'a> { }; i.ssid[..ssid.len()].copy_from_slice(ssid.as_bytes()); + self.wait_for_join(i).await; + } + + async fn wait_for_join(&mut self, i: SsidInfo) { let mut subscriber = self.event_sub.subscriber().unwrap(); - self.ioctl(IoctlType::Set, 26, 0, &mut i.to_bytes()).await; // set_ssid + self.ioctl(IoctlType::Set, IOCTL_CMD_SET_SSID, 0, &mut i.to_bytes()) + .await; + // set_ssid loop { let msg = subscriber.next_message_pure().await; if msg.event_type == Event::AUTH && msg.status != 0 { // retry warn!("JOIN failed with status={}", msg.status); - self.ioctl(IoctlType::Set, 26, 0, &mut i.to_bytes()).await; + self.ioctl(IoctlType::Set, IOCTL_CMD_SET_SSID, 0, &mut i.to_bytes()) + .await; } else if msg.event_type == Event::JOIN && msg.status == 0 { // successful join break; } } + self.state_ch.set_link_state(LinkState::Up); info!("JOINED"); } From 6f547cf05ddd1a27c8ec4e107ac227f7f9520ba6 Mon Sep 17 00:00:00 2001 From: kbleeke Date: Thu, 2 Mar 2023 15:34:08 +0100 Subject: [PATCH 077/130] asyncify outgoing events --- src/control.rs | 32 +++----------- src/ioctl.rs | 111 ++++++++++++++++++++++++++++++++++++++++++++++ src/lib.rs | 32 ++------------ src/runner.rs | 118 +++++++++++++++++++++++++++++-------------------- 4 files changed, 190 insertions(+), 103 deletions(-) create mode 100644 src/ioctl.rs diff --git a/src/control.rs b/src/control.rs index 8bfa033b..98f678fb 100644 --- a/src/control.rs +++ b/src/control.rs @@ -1,8 +1,6 @@ -use core::cell::Cell; use core::cmp::{max, min}; use ch::driver::LinkState; -use embassy_futures::yield_now; use embassy_net_driver_channel as ch; use embassy_time::{Duration, Timer}; @@ -10,21 +8,18 @@ pub use crate::bus::SpiBusCyw43; use crate::consts::*; use crate::events::{Event, EventQueue}; use crate::fmt::Bytes; +use crate::ioctl::{IoctlState, IoctlType}; use crate::structs::*; -use crate::{countries, IoctlState, IoctlType, PowerManagementMode}; +use crate::{countries, PowerManagementMode}; pub struct Control<'a> { state_ch: ch::StateRunner<'a>, event_sub: &'a EventQueue, - ioctl_state: &'a Cell, + ioctl_state: &'a IoctlState, } impl<'a> Control<'a> { - pub(crate) fn new( - state_ch: ch::StateRunner<'a>, - event_sub: &'a EventQueue, - ioctl_state: &'a Cell, - ) -> Self { + pub(crate) fn new(state_ch: ch::StateRunner<'a>, event_sub: &'a EventQueue, ioctl_state: &'a IoctlState) -> Self { Self { state_ch, event_sub, @@ -278,23 +273,8 @@ impl<'a> Control<'a> { } async fn ioctl(&mut self, kind: IoctlType, cmd: u32, iface: u32, buf: &mut [u8]) -> usize { - // TODO cancel ioctl on future drop. - - while !matches!(self.ioctl_state.get(), IoctlState::Idle) { - yield_now().await; - } - - self.ioctl_state.set(IoctlState::Pending { kind, cmd, iface, buf }); - - let resp_len = loop { - if let IoctlState::Done { resp_len } = self.ioctl_state.get() { - break resp_len; - } - yield_now().await; - }; - - self.ioctl_state.set(IoctlState::Idle); - + self.ioctl_state.do_ioctl(kind, cmd, iface, buf).await; + let resp_len = self.ioctl_state.wait_complete().await; resp_len } } diff --git a/src/ioctl.rs b/src/ioctl.rs new file mode 100644 index 00000000..2d4cdb87 --- /dev/null +++ b/src/ioctl.rs @@ -0,0 +1,111 @@ +use core::cell::{Cell, RefCell}; +use core::future::poll_fn; +use core::task::{Poll, Waker}; + +use embassy_sync::blocking_mutex::raw::NoopRawMutex; +use embassy_sync::blocking_mutex::Mutex; +use embassy_sync::waitqueue::WakerRegistration; + +#[derive(Clone, Copy)] +pub enum IoctlType { + Get = 0, + Set = 2, +} + +#[derive(Clone, Copy)] +pub struct PendingIoctl { + pub buf: *mut [u8], + pub kind: IoctlType, + pub cmd: u32, + pub iface: u32, +} + +#[derive(Clone, Copy)] +enum IoctlStateInner { + Pending(PendingIoctl), + Sent { buf: *mut [u8] }, + Done { resp_len: usize }, +} + +pub struct IoctlState { + state: Cell, + wakers: Mutex>, +} + +impl IoctlState { + pub fn new() -> Self { + Self { + state: Cell::new(IoctlStateInner::Done { resp_len: 0 }), + wakers: Mutex::new(RefCell::default()), + } + } + + fn wake_control(&self) { + self.wakers.lock(|f| { + f.borrow_mut().0.wake(); + }) + } + + fn register_control(&self, waker: &Waker) { + self.wakers.lock(|f| f.borrow_mut().0.register(waker)); + } + + fn wake_runner(&self) { + self.wakers.lock(|f| { + f.borrow_mut().1.wake(); + }) + } + + fn register_runner(&self, waker: &Waker) { + self.wakers.lock(|f| f.borrow_mut().1.register(waker)); + } + + pub async fn wait_complete(&self) -> usize { + poll_fn(|cx| { + if let IoctlStateInner::Done { resp_len } = self.state.get() { + Poll::Ready(resp_len) + } else { + self.register_control(cx.waker()); + Poll::Pending + } + }) + .await + } + + pub async fn wait_pending(&self) -> PendingIoctl { + let pending = poll_fn(|cx| { + if let IoctlStateInner::Pending(pending) = self.state.get() { + warn!("found pending ioctl"); + Poll::Ready(pending) + } else { + self.register_runner(cx.waker()); + Poll::Pending + } + }) + .await; + + self.state.set(IoctlStateInner::Sent { buf: pending.buf }); + pending + } + + pub async fn do_ioctl(&self, kind: IoctlType, cmd: u32, iface: u32, buf: &mut [u8]) -> usize { + warn!("doing ioctl"); + self.state + .set(IoctlStateInner::Pending(PendingIoctl { buf, kind, cmd, iface })); + self.wake_runner(); + self.wait_complete().await + } + + pub fn ioctl_done(&self, response: &[u8]) { + if let IoctlStateInner::Sent { buf } = self.state.get() { + warn!("ioctl complete"); + // TODO fix this + (unsafe { &mut *buf }[..response.len()]).copy_from_slice(response); + + self.state.set(IoctlStateInner::Done { + resp_len: response.len(), + }); + self.wake_control(); + } + } +} diff --git a/src/lib.rs b/src/lib.rs index af8f74a6..069ca40f 100644 --- a/src/lib.rs +++ b/src/lib.rs @@ -11,17 +11,17 @@ mod bus; mod consts; mod countries; mod events; +mod ioctl; mod structs; mod control; mod nvram; mod runner; -use core::cell::Cell; - use embassy_net_driver_channel as ch; use embedded_hal_1::digital::OutputPin; use events::EventQueue; +use ioctl::IoctlState; use crate::bus::Bus; pub use crate::bus::SpiBusCyw43; @@ -30,12 +30,6 @@ pub use crate::runner::Runner; const MTU: usize = 1514; -#[derive(Clone, Copy)] -pub enum IoctlType { - Get = 0, - Set = 2, -} - #[allow(unused)] #[derive(Clone, Copy, PartialEq, Eq)] enum Core { @@ -106,26 +100,8 @@ const CHIP: Chip = Chip { chanspec_ctl_sb_mask: 0x0700, }; -#[derive(Clone, Copy)] -enum IoctlState { - Idle, - - Pending { - kind: IoctlType, - cmd: u32, - iface: u32, - buf: *mut [u8], - }, - Sent { - buf: *mut [u8], - }, - Done { - resp_len: usize, - }, -} - pub struct State { - ioctl_state: Cell, + ioctl_state: IoctlState, ch: ch::State, events: EventQueue, } @@ -133,7 +109,7 @@ pub struct State { impl State { pub fn new() -> Self { Self { - ioctl_state: Cell::new(IoctlState::Idle), + ioctl_state: IoctlState::new(), ch: ch::State::new(), events: EventQueue::new(), } diff --git a/src/runner.rs b/src/runner.rs index 9945af3f..4abccf48 100644 --- a/src/runner.rs +++ b/src/runner.rs @@ -1,6 +1,6 @@ -use core::cell::Cell; use core::slice; +use embassy_futures::select::{select3, Either3}; use embassy_futures::yield_now; use embassy_net_driver_channel as ch; use embassy_sync::pubsub::PubSubBehavior; @@ -12,9 +12,10 @@ pub use crate::bus::SpiBusCyw43; use crate::consts::*; use crate::events::{EventQueue, EventStatus}; use crate::fmt::Bytes; +use crate::ioctl::{IoctlState, IoctlType, PendingIoctl}; use crate::nvram::NVRAM; use crate::structs::*; -use crate::{events, Core, IoctlState, IoctlType, CHIP, MTU}; +use crate::{events, Core, CHIP, MTU}; #[cfg(feature = "firmware-logs")] struct LogState { @@ -40,7 +41,7 @@ pub struct Runner<'a, PWR, SPI> { ch: ch::Runner<'a, MTU>, bus: Bus, - ioctl_state: &'a Cell, + ioctl_state: &'a IoctlState, ioctl_id: u16, sdpcm_seq: u8, sdpcm_seq_max: u8, @@ -59,7 +60,7 @@ where pub(crate) fn new( ch: ch::Runner<'a, MTU>, bus: Bus, - ioctl_state: &'a Cell, + ioctl_state: &'a IoctlState, events: &'a EventQueue, ) -> Self { Self { @@ -226,19 +227,22 @@ where #[cfg(feature = "firmware-logs")] self.log_read().await; - // Send stuff - // TODO flow control not yet complete - if !self.has_credit() { - warn!("TX stalled"); - } else { - if let IoctlState::Pending { kind, cmd, iface, buf } = self.ioctl_state.get() { - self.send_ioctl(kind, cmd, iface, unsafe { &*buf }).await; - self.ioctl_state.set(IoctlState::Sent { buf }); - } - if !self.has_credit() { - warn!("TX stalled"); - } else { - if let Some(packet) = self.ch.try_tx_buf() { + let ev = || async { + // TODO use IRQs + yield_now().await; + }; + + if self.has_credit() { + let ioctl = self.ioctl_state.wait_pending(); + let tx = self.ch.tx_buf(); + + match select3(ioctl, tx, ev()).await { + Either3::First(PendingIoctl { buf, kind, cmd, iface }) => { + warn!("ioctl"); + self.send_ioctl(kind, cmd, iface, unsafe { &*buf }).await; + } + Either3::Second(packet) => { + warn!("packet"); trace!("tx pkt {:02x}", Bytes(&packet[..packet.len().min(48)])); let mut buf = [0; 512]; @@ -281,28 +285,46 @@ where self.bus.wlan_write(&buf[..(total_len / 4)]).await; self.ch.tx_done(); } + Either3::Third(()) => { + // Receive stuff + let irq = self.bus.read16(FUNC_BUS, REG_BUS_INTERRUPT).await; + + if irq & IRQ_F2_PACKET_AVAILABLE != 0 { + let mut status = 0xFFFF_FFFF; + while status == 0xFFFF_FFFF { + status = self.bus.read32(FUNC_BUS, REG_BUS_STATUS).await; + } + + if status & STATUS_F2_PKT_AVAILABLE != 0 { + let len = (status & STATUS_F2_PKT_LEN_MASK) >> STATUS_F2_PKT_LEN_SHIFT; + self.bus.wlan_read(&mut buf, len).await; + trace!("rx {:02x}", Bytes(&slice8_mut(&mut buf)[..(len as usize).min(48)])); + self.rx(&slice8_mut(&mut buf)[..len as usize]); + } + } + } + } + } else { + warn!("TX stalled"); + ev().await; + + // Receive stuff + let irq = self.bus.read16(FUNC_BUS, REG_BUS_INTERRUPT).await; + + if irq & IRQ_F2_PACKET_AVAILABLE != 0 { + let mut status = 0xFFFF_FFFF; + while status == 0xFFFF_FFFF { + status = self.bus.read32(FUNC_BUS, REG_BUS_STATUS).await; + } + + if status & STATUS_F2_PKT_AVAILABLE != 0 { + let len = (status & STATUS_F2_PKT_LEN_MASK) >> STATUS_F2_PKT_LEN_SHIFT; + self.bus.wlan_read(&mut buf, len).await; + trace!("rx {:02x}", Bytes(&slice8_mut(&mut buf)[..(len as usize).min(48)])); + self.rx(&slice8_mut(&mut buf)[..len as usize]); + } } } - - // Receive stuff - let irq = self.bus.read16(FUNC_BUS, REG_BUS_INTERRUPT).await; - - if irq & IRQ_F2_PACKET_AVAILABLE != 0 { - let mut status = 0xFFFF_FFFF; - while status == 0xFFFF_FFFF { - status = self.bus.read32(FUNC_BUS, REG_BUS_STATUS).await; - } - - if status & STATUS_F2_PKT_AVAILABLE != 0 { - let len = (status & STATUS_F2_PKT_LEN_MASK) >> STATUS_F2_PKT_LEN_SHIFT; - self.bus.wlan_read(&mut buf, len).await; - trace!("rx {:02x}", Bytes(&slice8_mut(&mut buf)[..(len as usize).min(48)])); - self.rx(&slice8_mut(&mut buf)[..len as usize]); - } - } - - // TODO use IRQs - yield_now().await; } } @@ -340,19 +362,17 @@ where let cdc_header = CdcHeader::from_bytes(payload[..CdcHeader::SIZE].try_into().unwrap()); trace!(" {:?}", cdc_header); - if let IoctlState::Sent { buf } = self.ioctl_state.get() { - if cdc_header.id == self.ioctl_id { - if cdc_header.status != 0 { - // TODO: propagate error instead - panic!("IOCTL error {}", cdc_header.status as i32); - } - - let resp_len = cdc_header.len as usize; - info!("IOCTL Response: {:02x}", Bytes(&payload[CdcHeader::SIZE..][..resp_len])); - - (unsafe { &mut *buf }[..resp_len]).copy_from_slice(&payload[CdcHeader::SIZE..][..resp_len]); - self.ioctl_state.set(IoctlState::Done { resp_len }); + if cdc_header.id == self.ioctl_id { + if cdc_header.status != 0 { + // TODO: propagate error instead + panic!("IOCTL error {}", cdc_header.status as i32); } + + let resp_len = cdc_header.len as usize; + let response = &payload[CdcHeader::SIZE..][..resp_len]; + info!("IOCTL Response: {:02x}", Bytes(response)); + + self.ioctl_state.ioctl_done(response); } } CHANNEL_TYPE_EVENT => { From 4c521044131279aa36f7e21dbc6ec566703a57c6 Mon Sep 17 00:00:00 2001 From: kbleeke Date: Mon, 27 Mar 2023 12:40:27 +0200 Subject: [PATCH 078/130] simplify ioctl waker code --- src/ioctl.rs | 24 ++++++++++++------------ 1 file changed, 12 insertions(+), 12 deletions(-) diff --git a/src/ioctl.rs b/src/ioctl.rs index 2d4cdb87..6a746559 100644 --- a/src/ioctl.rs +++ b/src/ioctl.rs @@ -2,8 +2,6 @@ use core::cell::{Cell, RefCell}; use core::future::poll_fn; use core::task::{Poll, Waker}; -use embassy_sync::blocking_mutex::raw::NoopRawMutex; -use embassy_sync::blocking_mutex::Mutex; use embassy_sync::waitqueue::WakerRegistration; #[derive(Clone, Copy)] @@ -27,37 +25,39 @@ enum IoctlStateInner { Done { resp_len: usize }, } +#[derive(Default)] +struct Wakers { + control: WakerRegistration, + runner: WakerRegistration, +} + pub struct IoctlState { state: Cell, - wakers: Mutex>, + wakers: RefCell, } impl IoctlState { pub fn new() -> Self { Self { state: Cell::new(IoctlStateInner::Done { resp_len: 0 }), - wakers: Mutex::new(RefCell::default()), + wakers: Default::default(), } } fn wake_control(&self) { - self.wakers.lock(|f| { - f.borrow_mut().0.wake(); - }) + self.wakers.borrow_mut().control.wake(); } fn register_control(&self, waker: &Waker) { - self.wakers.lock(|f| f.borrow_mut().0.register(waker)); + self.wakers.borrow_mut().control.register(waker); } fn wake_runner(&self) { - self.wakers.lock(|f| { - f.borrow_mut().1.wake(); - }) + self.wakers.borrow_mut().runner.wake(); } fn register_runner(&self, waker: &Waker) { - self.wakers.lock(|f| f.borrow_mut().1.register(waker)); + self.wakers.borrow_mut().runner.register(waker); } pub async fn wait_complete(&self) -> usize { From c7646eb699e194a7c692b95b49adc76d6d3295ea Mon Sep 17 00:00:00 2001 From: kbleeke Date: Mon, 27 Mar 2023 12:40:40 +0200 Subject: [PATCH 079/130] bring back TODO note about dropping ioctls --- src/control.rs | 2 ++ 1 file changed, 2 insertions(+) diff --git a/src/control.rs b/src/control.rs index 98f678fb..f15a3d3f 100644 --- a/src/control.rs +++ b/src/control.rs @@ -273,6 +273,8 @@ impl<'a> Control<'a> { } async fn ioctl(&mut self, kind: IoctlType, cmd: u32, iface: u32, buf: &mut [u8]) -> usize { + // TODO cancel ioctl on future drop. + self.ioctl_state.do_ioctl(kind, cmd, iface, buf).await; let resp_len = self.ioctl_state.wait_complete().await; resp_len From a2272dda08a2d1625eef0b79fcd80afc8a1e174a Mon Sep 17 00:00:00 2001 From: kbleeke Date: Thu, 2 Mar 2023 19:02:00 +0100 Subject: [PATCH 080/130] status and irq flags formatting with defmt --- src/consts.rs | 147 ++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 147 insertions(+) diff --git a/src/consts.rs b/src/consts.rs index bee70660..140cb4b6 100644 --- a/src/consts.rs +++ b/src/consts.rs @@ -1,4 +1,5 @@ #![allow(unused)] + pub(crate) const FUNC_BUS: u32 = 0; pub(crate) const FUNC_BACKPLANE: u32 = 1; pub(crate) const FUNC_WLAN: u32 = 2; @@ -103,3 +104,149 @@ pub(crate) const WRITE: bool = true; pub(crate) const READ: bool = false; pub(crate) const INC_ADDR: bool = true; pub(crate) const FIXED_ADDR: bool = false; + +#[allow(dead_code)] +pub(crate) struct FormatStatus(pub u32); + +#[cfg(feature = "defmt")] +impl defmt::Format for FormatStatus { + fn format(&self, fmt: defmt::Formatter) { + macro_rules! implm { + ($($name:ident),*) => { + $( + if self.0 & $name > 0 { + defmt::write!(fmt, " | {}", &stringify!($name)[7..]); + } + )* + }; + } + + implm!( + STATUS_DATA_NOT_AVAILABLE, + STATUS_UNDERFLOW, + STATUS_OVERFLOW, + STATUS_F2_INTR, + STATUS_F3_INTR, + STATUS_F2_RX_READY, + STATUS_F3_RX_READY, + STATUS_HOST_CMD_DATA_ERR, + STATUS_F2_PKT_AVAILABLE, + STATUS_F3_PKT_AVAILABLE + ); + } +} + +#[cfg(feature = "log")] +impl core::fmt::Debug for FormatStatus { + fn fmt(&self, fmt: &mut core::fmt::Formatter) -> core::fmt::Result { + macro_rules! implm { + ($($name:ident),*) => { + $( + if self.0 & $name > 0 { + core::write!(fmt, " | {}", &stringify!($name)[7..])?; + } + )* + }; + } + + implm!( + STATUS_DATA_NOT_AVAILABLE, + STATUS_UNDERFLOW, + STATUS_OVERFLOW, + STATUS_F2_INTR, + STATUS_F3_INTR, + STATUS_F2_RX_READY, + STATUS_F3_RX_READY, + STATUS_HOST_CMD_DATA_ERR, + STATUS_F2_PKT_AVAILABLE, + STATUS_F3_PKT_AVAILABLE + ); + Ok(()) + } +} + +#[cfg(feature = "log")] +impl core::fmt::Display for FormatStatus { + fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { + core::fmt::Debug::fmt(self, f) + } +} + +#[allow(dead_code)] +pub(crate) struct FormatInterrupt(pub u16); + +#[cfg(feature = "defmt")] +impl defmt::Format for FormatInterrupt { + fn format(&self, fmt: defmt::Formatter) { + macro_rules! implm { + ($($name:ident),*) => { + $( + if self.0 & $name > 0 { + defmt::write!(fmt, " | {}", &stringify!($name)[4..]); + } + )* + }; + } + + implm!( + IRQ_DATA_UNAVAILABLE, + IRQ_F2_F3_FIFO_RD_UNDERFLOW, + IRQ_F2_F3_FIFO_WR_OVERFLOW, + IRQ_COMMAND_ERROR, + IRQ_DATA_ERROR, + IRQ_F2_PACKET_AVAILABLE, + IRQ_F3_PACKET_AVAILABLE, + IRQ_F1_OVERFLOW, + IRQ_MISC_INTR0, + IRQ_MISC_INTR1, + IRQ_MISC_INTR2, + IRQ_MISC_INTR3, + IRQ_MISC_INTR4, + IRQ_F1_INTR, + IRQ_F2_INTR, + IRQ_F3_INTR + ); + } +} + +#[cfg(feature = "log")] +impl core::fmt::Debug for FormatInterrupt { + fn fmt(&self, fmt: &mut core::fmt::Formatter) -> core::fmt::Result { + macro_rules! implm { + ($($name:ident),*) => { + $( + if self.0 & $name > 0 { + core::write!(fmt, " | {}", &stringify!($name)[7..])?; + } + )* + }; + } + + implm!( + IRQ_DATA_UNAVAILABLE, + IRQ_F2_F3_FIFO_RD_UNDERFLOW, + IRQ_F2_F3_FIFO_WR_OVERFLOW, + IRQ_COMMAND_ERROR, + IRQ_DATA_ERROR, + IRQ_F2_PACKET_AVAILABLE, + IRQ_F3_PACKET_AVAILABLE, + IRQ_F1_OVERFLOW, + IRQ_MISC_INTR0, + IRQ_MISC_INTR1, + IRQ_MISC_INTR2, + IRQ_MISC_INTR3, + IRQ_MISC_INTR4, + IRQ_F1_INTR, + IRQ_F2_INTR, + IRQ_F3_INTR + ); + Ok(()) + } +} + +#[cfg(feature = "log")] +impl core::fmt::Display for FormatInterrupt { + fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { + core::fmt::Debug::fmt(self, f) + } +} From b58cc2aa239e4adba2c32462cc89133bb7d9f698 Mon Sep 17 00:00:00 2001 From: kbleeke Date: Thu, 2 Mar 2023 19:02:32 +0100 Subject: [PATCH 081/130] use irqs to wait for events --- examples/rpi-pico-w/src/main.rs | 6 ++ examples/rpi-pico-w/src/pio.rs | 17 ++++-- src/bus.rs | 14 ++++- src/consts.rs | 2 + src/ioctl.rs | 3 - src/runner.rs | 98 ++++++++++++++++++--------------- 6 files changed, 87 insertions(+), 53 deletions(-) diff --git a/examples/rpi-pico-w/src/main.rs b/examples/rpi-pico-w/src/main.rs index 43485137..97e2d6a6 100644 --- a/examples/rpi-pico-w/src/main.rs +++ b/examples/rpi-pico-w/src/main.rs @@ -227,4 +227,10 @@ impl cyw43::SpiBusCyw43 for MySpi { self.read(read).await; self.cs.set_high(); } + + async fn wait_for_event(&mut self) {} + + fn clear_event(&mut self) {} + + } diff --git a/examples/rpi-pico-w/src/pio.rs b/examples/rpi-pico-w/src/pio.rs index 8017f4f4..6df22746 100644 --- a/examples/rpi-pico-w/src/pio.rs +++ b/examples/rpi-pico-w/src/pio.rs @@ -41,6 +41,9 @@ where "in pins, 1 side 1" "jmp y-- lp2 side 0" + "wait 1 pin 0 side 0" + "irq 0 side 0" + ".wrap" ); @@ -106,6 +109,7 @@ where } pub async fn write(&mut self, write: &[u32]) { + self.sm.set_enable(false); let write_bits = write.len() * 32 - 1; let read_bits = 31; @@ -124,11 +128,10 @@ where let mut status = 0; self.sm.dma_pull(dma, slice::from_mut(&mut status)).await; defmt::trace!("{:#08x}", status); - - self.sm.set_enable(false); } pub async fn cmd_read(&mut self, cmd: u32, read: &mut [u32]) { + self.sm.set_enable(false); let write_bits = 31; let read_bits = read.len() * 32 - 1; @@ -144,8 +147,6 @@ where self.sm.dma_push(dma.reborrow(), slice::from_ref(&cmd)).await; self.sm.dma_pull(dma, read).await; - - self.sm.set_enable(false); } } @@ -166,4 +167,12 @@ where self.cmd_read(write, read).await; self.cs.set_high(); } + + async fn wait_for_event(&mut self) { + self.sm.wait_irq(0).await; + } + + fn clear_event(&mut self) { + self.sm.clear_irq(0); + } } diff --git a/src/bus.rs b/src/bus.rs index 7700a832..6ec5d0bd 100644 --- a/src/bus.rs +++ b/src/bus.rs @@ -19,6 +19,9 @@ pub trait SpiBusCyw43 { /// Backplane reads have a response delay that produces one extra unspecified word at the beginning of `read`. /// Callers that want to read `n` word from the backplane, have to provide a slice that is `n+1` words long. async fn cmd_read(&mut self, write: u32, read: &mut [u32]); + + async fn wait_for_event(&mut self); + fn clear_event(&mut self); } pub(crate) struct Bus { @@ -63,7 +66,8 @@ where trace!("{:#010b}", (val & 0xff)); // 32-bit word length, little endian (which is the default endianess). - self.write32_swapped(REG_BUS_CTRL, WORD_LENGTH_32 | HIGH_SPEED).await; + self.write32_swapped(REG_BUS_CTRL, WORD_LENGTH_32 | HIGH_SPEED | INTERRUPT_HIGH | WAKE_UP) + .await; let val = self.read8(FUNC_BUS, REG_BUS_CTRL).await; trace!("{:#b}", val); @@ -297,6 +301,14 @@ where self.spi.cmd_write(&buf).await; } + + pub async fn wait_for_event(&mut self) { + self.spi.wait_for_event().await; + } + + pub fn clear_event(&mut self) { + self.spi.clear_event(); + } } fn swap16(x: u32) -> u32 { diff --git a/src/consts.rs b/src/consts.rs index 140cb4b6..70d6660e 100644 --- a/src/consts.rs +++ b/src/consts.rs @@ -14,6 +14,8 @@ pub(crate) const REG_BUS_TEST_RW: u32 = 0x18; pub(crate) const REG_BUS_RESP_DELAY: u32 = 0x1c; pub(crate) const WORD_LENGTH_32: u32 = 0x1; pub(crate) const HIGH_SPEED: u32 = 0x10; +pub(crate) const INTERRUPT_HIGH: u32 = 1 << 5; +pub(crate) const WAKE_UP: u32 = 1 << 7; // SPI_STATUS_REGISTER bits pub(crate) const STATUS_DATA_NOT_AVAILABLE: u32 = 0x00000001; diff --git a/src/ioctl.rs b/src/ioctl.rs index 6a746559..4a2eb252 100644 --- a/src/ioctl.rs +++ b/src/ioctl.rs @@ -75,7 +75,6 @@ impl IoctlState { pub async fn wait_pending(&self) -> PendingIoctl { let pending = poll_fn(|cx| { if let IoctlStateInner::Pending(pending) = self.state.get() { - warn!("found pending ioctl"); Poll::Ready(pending) } else { self.register_runner(cx.waker()); @@ -89,7 +88,6 @@ impl IoctlState { } pub async fn do_ioctl(&self, kind: IoctlType, cmd: u32, iface: u32, buf: &mut [u8]) -> usize { - warn!("doing ioctl"); self.state .set(IoctlStateInner::Pending(PendingIoctl { buf, kind, cmd, iface })); self.wake_runner(); @@ -98,7 +96,6 @@ impl IoctlState { pub fn ioctl_done(&self, response: &[u8]) { if let IoctlStateInner::Sent { buf } = self.state.get() { - warn!("ioctl complete"); // TODO fix this (unsafe { &mut *buf }[..response.len()]).copy_from_slice(response); diff --git a/src/runner.rs b/src/runner.rs index 4abccf48..a1de0770 100644 --- a/src/runner.rs +++ b/src/runner.rs @@ -122,7 +122,11 @@ where while self.bus.read8(FUNC_BACKPLANE, REG_BACKPLANE_CHIP_CLOCK_CSR).await & 0x80 == 0 {} // "Set up the interrupt mask and enable interrupts" - self.bus.bp_write32(CHIP.sdiod_core_base_address + 0x24, 0xF0).await; + // self.bus.bp_write32(CHIP.sdiod_core_base_address + 0x24, 0xF0).await; + + self.bus + .write16(FUNC_BUS, REG_BUS_INTERRUPT_ENABLE, IRQ_F2_PACKET_AVAILABLE) + .await; // "Lower F2 Watermark to avoid DMA Hang in F2 when SD Clock is stopped." // Sounds scary... @@ -227,22 +231,22 @@ where #[cfg(feature = "firmware-logs")] self.log_read().await; - let ev = || async { - // TODO use IRQs - yield_now().await; - }; - if self.has_credit() { let ioctl = self.ioctl_state.wait_pending(); let tx = self.ch.tx_buf(); + let ev = self.bus.wait_for_event(); - match select3(ioctl, tx, ev()).await { - Either3::First(PendingIoctl { buf, kind, cmd, iface }) => { - warn!("ioctl"); - self.send_ioctl(kind, cmd, iface, unsafe { &*buf }).await; + match select3(ioctl, tx, ev).await { + Either3::First(PendingIoctl { + buf: iobuf, + kind, + cmd, + iface, + }) => { + self.send_ioctl(kind, cmd, iface, unsafe { &*iobuf }).await; + self.check_status(&mut buf).await; } Either3::Second(packet) => { - warn!("packet"); trace!("tx pkt {:02x}", Bytes(&packet[..packet.len().min(48)])); let mut buf = [0; 512]; @@ -284,50 +288,54 @@ where self.bus.wlan_write(&buf[..(total_len / 4)]).await; self.ch.tx_done(); + self.check_status(&mut buf).await; } Either3::Third(()) => { - // Receive stuff - let irq = self.bus.read16(FUNC_BUS, REG_BUS_INTERRUPT).await; - - if irq & IRQ_F2_PACKET_AVAILABLE != 0 { - let mut status = 0xFFFF_FFFF; - while status == 0xFFFF_FFFF { - status = self.bus.read32(FUNC_BUS, REG_BUS_STATUS).await; - } - - if status & STATUS_F2_PKT_AVAILABLE != 0 { - let len = (status & STATUS_F2_PKT_LEN_MASK) >> STATUS_F2_PKT_LEN_SHIFT; - self.bus.wlan_read(&mut buf, len).await; - trace!("rx {:02x}", Bytes(&slice8_mut(&mut buf)[..(len as usize).min(48)])); - self.rx(&slice8_mut(&mut buf)[..len as usize]); - } - } + self.handle_irq(&mut buf).await; } } } else { warn!("TX stalled"); - ev().await; - - // Receive stuff - let irq = self.bus.read16(FUNC_BUS, REG_BUS_INTERRUPT).await; - - if irq & IRQ_F2_PACKET_AVAILABLE != 0 { - let mut status = 0xFFFF_FFFF; - while status == 0xFFFF_FFFF { - status = self.bus.read32(FUNC_BUS, REG_BUS_STATUS).await; - } - - if status & STATUS_F2_PKT_AVAILABLE != 0 { - let len = (status & STATUS_F2_PKT_LEN_MASK) >> STATUS_F2_PKT_LEN_SHIFT; - self.bus.wlan_read(&mut buf, len).await; - trace!("rx {:02x}", Bytes(&slice8_mut(&mut buf)[..(len as usize).min(48)])); - self.rx(&slice8_mut(&mut buf)[..len as usize]); - } - } + self.bus.wait_for_event().await; + self.handle_irq(&mut buf).await; } } } + /// Wait for IRQ on F2 packet available + async fn handle_irq(&mut self, buf: &mut [u32; 512]) { + self.bus.clear_event(); + // Receive stuff + let irq = self.bus.read16(FUNC_BUS, REG_BUS_INTERRUPT).await; + trace!("irq{}", FormatInterrupt(irq)); + + if irq & IRQ_F2_PACKET_AVAILABLE != 0 { + self.check_status(buf).await; + } + } + + /// Handle F2 events while status register is set + async fn check_status(&mut self, buf: &mut [u32; 512]) { + loop { + let mut status = 0xFFFF_FFFF; + while status == 0xFFFF_FFFF { + status = self.bus.read32(FUNC_BUS, REG_BUS_STATUS).await; + } + trace!("check status{}", FormatStatus(status)); + + if status & STATUS_F2_PKT_AVAILABLE != 0 { + let len = (status & STATUS_F2_PKT_LEN_MASK) >> STATUS_F2_PKT_LEN_SHIFT; + self.bus.wlan_read(buf, len).await; + trace!("rx {:02x}", Bytes(&slice8_mut(buf)[..(len as usize).min(48)])); + self.rx(&slice8_mut(buf)[..len as usize]); + } else { + break; + } + + yield_now().await; + } + } + fn rx(&mut self, packet: &[u8]) { if packet.len() < SdpcmHeader::SIZE { warn!("packet too short, len={}", packet.len()); From 1c721cb20e44fdc7ec294792a9621d54361d344e Mon Sep 17 00:00:00 2001 From: kbleeke Date: Mon, 27 Mar 2023 13:39:41 +0200 Subject: [PATCH 082/130] cancel ioctl when future is dropped --- src/control.rs | 23 ++++++++++++++++++++--- src/ioctl.rs | 4 ++++ 2 files changed, 24 insertions(+), 3 deletions(-) diff --git a/src/control.rs b/src/control.rs index 0dbf6d44..30d5d092 100644 --- a/src/control.rs +++ b/src/control.rs @@ -278,10 +278,27 @@ impl<'a> Control<'a> { } async fn ioctl(&mut self, kind: IoctlType, cmd: u32, iface: u32, buf: &mut [u8]) -> usize { - // TODO cancel ioctl on future drop. + struct CancelOnDrop<'a>(&'a IoctlState); + + impl CancelOnDrop<'_> { + fn defuse(self) { + core::mem::forget(self); + } + } + + impl Drop for CancelOnDrop<'_> { + fn drop(&mut self) { + self.0.cancel_ioctl(); + } + } + + let ioctl = CancelOnDrop(self.ioctl_state); + + ioctl.0.do_ioctl(kind, cmd, iface, buf).await; + let resp_len = ioctl.0.wait_complete().await; + + ioctl.defuse(); - self.ioctl_state.do_ioctl(kind, cmd, iface, buf).await; - let resp_len = self.ioctl_state.wait_complete().await; resp_len } } diff --git a/src/ioctl.rs b/src/ioctl.rs index 6a746559..f5ab410d 100644 --- a/src/ioctl.rs +++ b/src/ioctl.rs @@ -88,6 +88,10 @@ impl IoctlState { pending } + pub fn cancel_ioctl(&self) { + self.state.set(IoctlStateInner::Done { resp_len: 0 }); + } + pub async fn do_ioctl(&self, kind: IoctlType, cmd: u32, iface: u32, buf: &mut [u8]) -> usize { warn!("doing ioctl"); self.state From 8926397f4592f22a5ed54f772a979578ca36628f Mon Sep 17 00:00:00 2001 From: kbleeke Date: Mon, 27 Mar 2023 14:37:39 +0200 Subject: [PATCH 083/130] address irq nits --- examples/rpi-pico-w/src/main.rs | 6 ------ examples/rpi-pico-w/src/pio.rs | 3 --- src/bus.rs | 12 ++++++------ src/runner.rs | 4 ---- 4 files changed, 6 insertions(+), 19 deletions(-) diff --git a/examples/rpi-pico-w/src/main.rs b/examples/rpi-pico-w/src/main.rs index 97e2d6a6..43485137 100644 --- a/examples/rpi-pico-w/src/main.rs +++ b/examples/rpi-pico-w/src/main.rs @@ -227,10 +227,4 @@ impl cyw43::SpiBusCyw43 for MySpi { self.read(read).await; self.cs.set_high(); } - - async fn wait_for_event(&mut self) {} - - fn clear_event(&mut self) {} - - } diff --git a/examples/rpi-pico-w/src/pio.rs b/examples/rpi-pico-w/src/pio.rs index 6df22746..1cefb173 100644 --- a/examples/rpi-pico-w/src/pio.rs +++ b/examples/rpi-pico-w/src/pio.rs @@ -170,9 +170,6 @@ where async fn wait_for_event(&mut self) { self.sm.wait_irq(0).await; - } - - fn clear_event(&mut self) { self.sm.clear_irq(0); } } diff --git a/src/bus.rs b/src/bus.rs index 6ec5d0bd..d2a249f9 100644 --- a/src/bus.rs +++ b/src/bus.rs @@ -1,5 +1,6 @@ use core::slice; +use embassy_futures::yield_now; use embassy_time::{Duration, Timer}; use embedded_hal_1::digital::OutputPin; use futures::FutureExt; @@ -20,8 +21,11 @@ pub trait SpiBusCyw43 { /// Callers that want to read `n` word from the backplane, have to provide a slice that is `n+1` words long. async fn cmd_read(&mut self, write: u32, read: &mut [u32]); - async fn wait_for_event(&mut self); - fn clear_event(&mut self); + /// Wait for events from the Device. A typical implementation would wait for the IRQ pin to be high. + /// The default implementation always reports ready, resulting in active polling of the device. + async fn wait_for_event(&mut self) { + yield_now().await; + } } pub(crate) struct Bus { @@ -305,10 +309,6 @@ where pub async fn wait_for_event(&mut self) { self.spi.wait_for_event().await; } - - pub fn clear_event(&mut self) { - self.spi.clear_event(); - } } fn swap16(x: u32) -> u32 { diff --git a/src/runner.rs b/src/runner.rs index a1de0770..abfac3ae 100644 --- a/src/runner.rs +++ b/src/runner.rs @@ -1,7 +1,6 @@ use core::slice; use embassy_futures::select::{select3, Either3}; -use embassy_futures::yield_now; use embassy_net_driver_channel as ch; use embassy_sync::pubsub::PubSubBehavior; use embassy_time::{block_for, Duration, Timer}; @@ -304,7 +303,6 @@ where /// Wait for IRQ on F2 packet available async fn handle_irq(&mut self, buf: &mut [u32; 512]) { - self.bus.clear_event(); // Receive stuff let irq = self.bus.read16(FUNC_BUS, REG_BUS_INTERRUPT).await; trace!("irq{}", FormatInterrupt(irq)); @@ -331,8 +329,6 @@ where } else { break; } - - yield_now().await; } } From 056df98d475c3be307b7c9c3038e02b4ef79fa08 Mon Sep 17 00:00:00 2001 From: kbleeke Date: Mon, 27 Mar 2023 17:24:45 +0200 Subject: [PATCH 084/130] use send status feature of cyw43 instead of manually checking status --- examples/rpi-pico-w/src/main.rs | 14 ++++++++++++-- examples/rpi-pico-w/src/pio.rs | 24 ++++++++++++++---------- src/bus.rs | 33 +++++++++++++++++++++------------ src/consts.rs | 1 + src/runner.rs | 5 +---- 5 files changed, 49 insertions(+), 28 deletions(-) diff --git a/examples/rpi-pico-w/src/main.rs b/examples/rpi-pico-w/src/main.rs index 43485137..e3c59223 100644 --- a/examples/rpi-pico-w/src/main.rs +++ b/examples/rpi-pico-w/src/main.rs @@ -215,16 +215,26 @@ impl MySpi { } impl cyw43::SpiBusCyw43 for MySpi { - async fn cmd_write(&mut self, write: &[u32]) { + async fn cmd_write(&mut self, write: &[u32]) -> u32 { self.cs.set_low(); self.write(write).await; + + let mut status = 0; + self.read(slice::from_mut(&mut status)).await; + self.cs.set_high(); + status } - async fn cmd_read(&mut self, write: u32, read: &mut [u32]) { + async fn cmd_read(&mut self, write: u32, read: &mut [u32]) -> u32 { self.cs.set_low(); self.write(slice::from_ref(&write)).await; self.read(read).await; + + let mut status = 0; + self.read(slice::from_mut(&mut status)).await; + self.cs.set_high(); + status } } diff --git a/examples/rpi-pico-w/src/pio.rs b/examples/rpi-pico-w/src/pio.rs index 1cefb173..84611306 100644 --- a/examples/rpi-pico-w/src/pio.rs +++ b/examples/rpi-pico-w/src/pio.rs @@ -108,7 +108,7 @@ where } } - pub async fn write(&mut self, write: &[u32]) { + pub async fn write(&mut self, write: &[u32]) -> u32 { self.sm.set_enable(false); let write_bits = write.len() * 32 - 1; let read_bits = 31; @@ -125,15 +125,14 @@ where self.sm.dma_push(dma.reborrow(), write).await; - let mut status = 0; - self.sm.dma_pull(dma, slice::from_mut(&mut status)).await; - defmt::trace!("{:#08x}", status); + let status = self.sm.wait_pull().await; + status } - pub async fn cmd_read(&mut self, cmd: u32, read: &mut [u32]) { + pub async fn cmd_read(&mut self, cmd: u32, read: &mut [u32]) -> u32 { self.sm.set_enable(false); let write_bits = 31; - let read_bits = read.len() * 32 - 1; + let read_bits = read.len() * 32 + 32 - 1; defmt::trace!("write={} read={}", write_bits, read_bits); @@ -147,6 +146,9 @@ where self.sm.dma_push(dma.reborrow(), slice::from_ref(&cmd)).await; self.sm.dma_pull(dma, read).await; + + let status = self.sm.wait_pull().await; + status } } @@ -156,16 +158,18 @@ where SM: PioStateMachine, DMA: Channel, { - async fn cmd_write(&mut self, write: &[u32]) { + async fn cmd_write(&mut self, write: &[u32]) -> u32 { self.cs.set_low(); - self.write(write).await; + let status = self.write(write).await; self.cs.set_high(); + status } - async fn cmd_read(&mut self, write: u32, read: &mut [u32]) { + async fn cmd_read(&mut self, write: u32, read: &mut [u32]) -> u32 { self.cs.set_low(); - self.cmd_read(write, read).await; + let status = self.cmd_read(write, read).await; self.cs.set_high(); + status } async fn wait_for_event(&mut self) { diff --git a/src/bus.rs b/src/bus.rs index d2a249f9..65caea8e 100644 --- a/src/bus.rs +++ b/src/bus.rs @@ -12,14 +12,14 @@ use crate::consts::*; pub trait SpiBusCyw43 { /// Issues a write command on the bus /// First 32 bits of `word` are expected to be a cmd word - async fn cmd_write(&mut self, write: &[u32]); + async fn cmd_write(&mut self, write: &[u32]) -> u32; /// Issues a read command on the bus /// `write` is expected to be a 32 bit cmd word /// `read` will contain the response of the device /// Backplane reads have a response delay that produces one extra unspecified word at the beginning of `read`. /// Callers that want to read `n` word from the backplane, have to provide a slice that is `n+1` words long. - async fn cmd_read(&mut self, write: u32, read: &mut [u32]); + async fn cmd_read(&mut self, write: u32, read: &mut [u32]) -> u32; /// Wait for events from the Device. A typical implementation would wait for the IRQ pin to be high. /// The default implementation always reports ready, resulting in active polling of the device. @@ -32,6 +32,7 @@ pub(crate) struct Bus { backplane_window: u32, pwr: PWR, spi: SPI, + status: u32, } impl Bus @@ -44,6 +45,7 @@ where backplane_window: 0xAAAA_AAAA, pwr, spi, + status: 0, } } @@ -70,8 +72,11 @@ where trace!("{:#010b}", (val & 0xff)); // 32-bit word length, little endian (which is the default endianess). - self.write32_swapped(REG_BUS_CTRL, WORD_LENGTH_32 | HIGH_SPEED | INTERRUPT_HIGH | WAKE_UP) - .await; + self.write32_swapped( + REG_BUS_CTRL, + WORD_LENGTH_32 | HIGH_SPEED | INTERRUPT_HIGH | WAKE_UP | STATUS_ENABLE, + ) + .await; let val = self.read8(FUNC_BUS, REG_BUS_CTRL).await; trace!("{:#b}", val); @@ -88,7 +93,7 @@ where let cmd = cmd_word(READ, INC_ADDR, FUNC_WLAN, 0, len_in_u8); let len_in_u32 = (len_in_u8 as usize + 3) / 4; - self.spi.cmd_read(cmd, &mut buf[..len_in_u32]).await; + self.status = self.spi.cmd_read(cmd, &mut buf[..len_in_u32]).await; } pub async fn wlan_write(&mut self, buf: &[u32]) { @@ -98,7 +103,7 @@ where cmd_buf[0] = cmd; cmd_buf[1..][..buf.len()].copy_from_slice(buf); - self.spi.cmd_write(&cmd_buf).await; + self.status = self.spi.cmd_write(&cmd_buf).await; } #[allow(unused)] @@ -124,7 +129,7 @@ where let cmd = cmd_word(READ, INC_ADDR, FUNC_BACKPLANE, window_offs, len as u32); // round `buf` to word boundary, add one extra word for the response delay - self.spi.cmd_read(cmd, &mut buf[..(len + 3) / 4 + 1]).await; + self.status = self.spi.cmd_read(cmd, &mut buf[..(len + 3) / 4 + 1]).await; // when writing out the data, we skip the response-delay byte data[..len].copy_from_slice(&slice8_mut(&mut buf[1..])[..len]); @@ -157,7 +162,7 @@ where let cmd = cmd_word(WRITE, INC_ADDR, FUNC_BACKPLANE, window_offs, len as u32); buf[0] = cmd; - self.spi.cmd_write(&buf[..(len + 3) / 4 + 1]).await; + self.status = self.spi.cmd_write(&buf[..(len + 3) / 4 + 1]).await; // Advance ptr. addr += len as u32; @@ -273,7 +278,7 @@ where // if we are reading from the backplane, we need an extra word for the response delay let len = if func == FUNC_BACKPLANE { 2 } else { 1 }; - self.spi.cmd_read(cmd, &mut buf[..len]).await; + self.status = self.spi.cmd_read(cmd, &mut buf[..len]).await; // if we read from the backplane, the result is in the second word, after the response delay if func == FUNC_BACKPLANE { @@ -286,7 +291,7 @@ where async fn writen(&mut self, func: u32, addr: u32, val: u32, len: u32) { let cmd = cmd_word(WRITE, INC_ADDR, func, addr, len); - self.spi.cmd_write(&[cmd, val]).await; + self.status = self.spi.cmd_write(&[cmd, val]).await; } async fn read32_swapped(&mut self, addr: u32) -> u32 { @@ -294,7 +299,7 @@ where let cmd = swap16(cmd); let mut buf = [0; 1]; - self.spi.cmd_read(cmd, &mut buf).await; + self.status = self.spi.cmd_read(cmd, &mut buf).await; swap16(buf[0]) } @@ -303,12 +308,16 @@ where let cmd = cmd_word(WRITE, INC_ADDR, FUNC_BUS, addr, 4); let buf = [swap16(cmd), swap16(val)]; - self.spi.cmd_write(&buf).await; + self.status = self.spi.cmd_write(&buf).await; } pub async fn wait_for_event(&mut self) { self.spi.wait_for_event().await; } + + pub fn status(&self) -> u32 { + self.status + } } fn swap16(x: u32) -> u32 { diff --git a/src/consts.rs b/src/consts.rs index 70d6660e..6ed7feb9 100644 --- a/src/consts.rs +++ b/src/consts.rs @@ -16,6 +16,7 @@ pub(crate) const WORD_LENGTH_32: u32 = 0x1; pub(crate) const HIGH_SPEED: u32 = 0x10; pub(crate) const INTERRUPT_HIGH: u32 = 1 << 5; pub(crate) const WAKE_UP: u32 = 1 << 7; +pub(crate) const STATUS_ENABLE: u32 = 0x10000; // SPI_STATUS_REGISTER bits pub(crate) const STATUS_DATA_NOT_AVAILABLE: u32 = 0x00000001; diff --git a/src/runner.rs b/src/runner.rs index abfac3ae..ccdbbf1a 100644 --- a/src/runner.rs +++ b/src/runner.rs @@ -315,10 +315,7 @@ where /// Handle F2 events while status register is set async fn check_status(&mut self, buf: &mut [u32; 512]) { loop { - let mut status = 0xFFFF_FFFF; - while status == 0xFFFF_FFFF { - status = self.bus.read32(FUNC_BUS, REG_BUS_STATUS).await; - } + let status = self.bus.status(); trace!("check status{}", FormatStatus(status)); if status & STATUS_F2_PKT_AVAILABLE != 0 { From 20ea35fc9639487eaa21f1dcee6c32d8a66a0fbb Mon Sep 17 00:00:00 2001 From: kbleeke Date: Mon, 27 Mar 2023 18:04:48 +0200 Subject: [PATCH 085/130] Move pio driver to separate crate --- .vscode/settings.json | 1 + Cargo.toml | 6 ++++++ cyw43-pio/Cargo.toml | 13 +++++++++++++ .../rpi-pico-w/src/pio.rs => cyw43-pio/src/lib.rs | 12 +++++++++--- examples/rpi-pico-w/Cargo.toml | 3 +-- examples/rpi-pico-w/src/main.rs | 5 +---- 6 files changed, 31 insertions(+), 9 deletions(-) create mode 100644 cyw43-pio/Cargo.toml rename examples/rpi-pico-w/src/pio.rs => cyw43-pio/src/lib.rs (93%) diff --git a/.vscode/settings.json b/.vscode/settings.json index dd479929..34430769 100644 --- a/.vscode/settings.json +++ b/.vscode/settings.json @@ -9,6 +9,7 @@ "rust-analyzer.check.noDefaultFeatures": true, "rust-analyzer.linkedProjects": [ "examples/rpi-pico-w/Cargo.toml", + "cyw43-pio/Cargo.toml", ], "rust-analyzer.server.extraEnv": { "WIFI_NETWORK": "foo", diff --git a/Cargo.toml b/Cargo.toml index a307a6cc..04a47a3a 100644 --- a/Cargo.toml +++ b/Cargo.toml @@ -32,3 +32,9 @@ embassy-time = { git = "https://github.com/embassy-rs/embassy", rev = "e3f8020c3 embassy-futures = { git = "https://github.com/embassy-rs/embassy", rev = "e3f8020c3bdf726dfa451b5b190f27191507a18f" } embassy-sync = { git = "https://github.com/embassy-rs/embassy", rev = "e3f8020c3bdf726dfa451b5b190f27191507a18f" } embassy-net-driver-channel = { git = "https://github.com/embassy-rs/embassy", rev = "e3f8020c3bdf726dfa451b5b190f27191507a18f" } +embassy-rp = { git = "https://github.com/embassy-rs/embassy", rev = "e3f8020c3bdf726dfa451b5b190f27191507a18f" } + +[workspace] +members = ["cyw43-pio"] +default-members = ["cyw43-pio", "."] +exclude = ["examples"] \ No newline at end of file diff --git a/cyw43-pio/Cargo.toml b/cyw43-pio/Cargo.toml new file mode 100644 index 00000000..2fc6b759 --- /dev/null +++ b/cyw43-pio/Cargo.toml @@ -0,0 +1,13 @@ +[package] +name = "cyw43-pio" +version = "0.1.0" +edition = "2021" + +# See more keys and their definitions at https://doc.rust-lang.org/cargo/reference/manifest.html + +[dependencies] +cyw43 = { path = "../" } +embassy-rp = { version = "0.1.0", features = ["defmt", "unstable-traits", "nightly", "unstable-pac", "time-driver", "pio"] } +pio-proc = "0.2" +pio = "0.2.1" +defmt = "0.3" \ No newline at end of file diff --git a/examples/rpi-pico-w/src/pio.rs b/cyw43-pio/src/lib.rs similarity index 93% rename from examples/rpi-pico-w/src/pio.rs rename to cyw43-pio/src/lib.rs index 84611306..2159796c 100644 --- a/examples/rpi-pico-w/src/pio.rs +++ b/cyw43-pio/src/lib.rs @@ -1,3 +1,7 @@ +#![no_std] +#![allow(incomplete_features)] +#![feature(async_fn_in_trait)] + use core::slice; use cyw43::SpiBusCyw43; @@ -125,7 +129,8 @@ where self.sm.dma_push(dma.reborrow(), write).await; - let status = self.sm.wait_pull().await; + let mut status = 0; + self.sm.dma_pull(dma.reborrow(), slice::from_mut(&mut status)).await; status } @@ -145,9 +150,10 @@ where self.sm.set_enable(true); self.sm.dma_push(dma.reborrow(), slice::from_ref(&cmd)).await; - self.sm.dma_pull(dma, read).await; + self.sm.dma_pull(dma.reborrow(), read).await; - let status = self.sm.wait_pull().await; + let mut status = 0; + self.sm.dma_pull(dma.reborrow(), slice::from_mut(&mut status)).await; status } } diff --git a/examples/rpi-pico-w/Cargo.toml b/examples/rpi-pico-w/Cargo.toml index 4a531c88..41ee8a3c 100644 --- a/examples/rpi-pico-w/Cargo.toml +++ b/examples/rpi-pico-w/Cargo.toml @@ -6,6 +6,7 @@ edition = "2021" [dependencies] cyw43 = { path = "../../", features = ["defmt", "firmware-logs"] } +cyw43-pio = { path = "../../cyw43-pio" } embassy-executor = { version = "0.1.0", features = ["defmt", "integrated-timers"] } embassy-time = { version = "0.1.0", features = ["defmt", "defmt-timestamp-uptime"] } embassy-rp = { version = "0.1.0", features = ["defmt", "unstable-traits", "nightly", "unstable-pac", "time-driver", "pio"] } @@ -20,8 +21,6 @@ panic-probe = { version = "0.3", features = ["print-defmt"] } cortex-m = { version = "0.7.6", features = ["critical-section-single-core"] } cortex-m-rt = "0.7.0" futures = { version = "0.3.17", default-features = false, features = ["async-await", "cfg-target-has-atomic", "unstable"] } -pio-proc = "0.2" -pio = "0.2.1" embedded-io = { version = "0.4.0", features = ["async", "defmt"] } heapless = "0.7.15" diff --git a/examples/rpi-pico-w/src/main.rs b/examples/rpi-pico-w/src/main.rs index e3c59223..4b1623be 100644 --- a/examples/rpi-pico-w/src/main.rs +++ b/examples/rpi-pico-w/src/main.rs @@ -4,11 +4,10 @@ #![feature(async_fn_in_trait)] #![allow(incomplete_features)] -mod pio; - use core::slice; use core::str::from_utf8; +use cyw43_pio::PioSpi; use defmt::*; use embassy_executor::Spawner; use embassy_net::tcp::TcpSocket; @@ -20,8 +19,6 @@ use embedded_io::asynch::Write; use static_cell::StaticCell; use {defmt_rtt as _, panic_probe as _}; -use crate::pio::PioSpi; - macro_rules! singleton { ($val:expr) => {{ type T = impl Sized; From 983a94a9c5166f5f4fea103737c6bbe436bec106 Mon Sep 17 00:00:00 2001 From: kbleeke Date: Mon, 27 Mar 2023 22:34:48 +0200 Subject: [PATCH 086/130] update readme --- README.md | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/README.md b/README.md index 5d4347e9..d24ec82f 100644 --- a/README.md +++ b/README.md @@ -10,15 +10,16 @@ Working: - Sending and receiving Ethernet frames. - Using the default MAC address. - [`embassy-net`](https://embassy.dev) integration. +- RP2040 PIO driver for the nonstandard half-duplex SPI used in the Pico W. +- Using IRQ for device events +- GPIO support (for LED on the Pico W) TODO: - AP mode (creating an AP) -- GPIO support (used for the Pico W LED) - Scanning - Setting a custom MAC address. -- RP2040 PIO driver for the nonstandard half-duplex SPI used in the Pico W. Probably porting [this](https://github.com/raspberrypi/pico-sdk/tree/master/src/rp2_common/cyw43_driver). (Currently bitbanging is used). -- Using the IRQ pin instead of polling the bus. +- Investigate why can [this](https://github.com/raspberrypi/pico-sdk/tree/master/src/rp2_common/pico_cyw43_driver) use higher PIO speed. - Bus sleep (unclear what the benefit is. Is it needed for IRQs? or is it just power consumption optimization?) ## Running the example From 781c7f978c555bfe364472fa822f1e27f2da1afb Mon Sep 17 00:00:00 2001 From: kbleeke Date: Tue, 28 Mar 2023 14:03:17 +0200 Subject: [PATCH 087/130] make pio faster --- cyw43-pio/src/lib.rs | 22 +++++++++++++++++----- 1 file changed, 17 insertions(+), 5 deletions(-) diff --git a/cyw43-pio/src/lib.rs b/cyw43-pio/src/lib.rs index 2159796c..46ea0411 100644 --- a/cyw43-pio/src/lib.rs +++ b/cyw43-pio/src/lib.rs @@ -33,18 +33,23 @@ where { let program = pio_asm!( ".side_set 1" - // "set pindirs, 1 side 0" - // "set pins, 0 side 0" + ".wrap_target" + // write out x-1 bits "lp:", "out pins, 1 side 0" "jmp x-- lp side 1" + // switch directions "set pindirs, 0 side 0" + // these nops seem to be necessary for fast clkdiv "nop side 1" + "nop side 1" + // read in y-1 bits "lp2:" - "in pins, 1 side 1" - "jmp y-- lp2 side 0" + "in pins, 1 side 0" + "jmp y-- lp2 side 1" + // wait for event and irq host "wait 1 pin 0 side 0" "irq 0 side 0" @@ -64,8 +69,15 @@ where sm.write_instr(relocated.origin() as usize, relocated.code()); + // theoretical maximum according to data sheet, 100Mhz Pio => 50Mhz SPI Freq + // does not work yet, + // sm.set_clkdiv(0x0140); + + // same speed as pico-sdk, 62.5Mhz + sm.set_clkdiv(0x0200); + // 32 Mhz - sm.set_clkdiv(0x03E8); + // sm.set_clkdiv(0x03E8); // 16 Mhz // sm.set_clkdiv(0x07d0); From 869b337715c7c784865e6b1a0c26557c4204d35d Mon Sep 17 00:00:00 2001 From: kbleeke Date: Tue, 28 Mar 2023 16:51:49 +0200 Subject: [PATCH 088/130] PIO at maximum speed --- cyw43-pio/src/lib.rs | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/cyw43-pio/src/lib.rs b/cyw43-pio/src/lib.rs index 46ea0411..9c425cba 100644 --- a/cyw43-pio/src/lib.rs +++ b/cyw43-pio/src/lib.rs @@ -43,6 +43,7 @@ where "set pindirs, 0 side 0" // these nops seem to be necessary for fast clkdiv "nop side 1" + "nop side 0" "nop side 1" // read in y-1 bits "lp2:" @@ -70,11 +71,10 @@ where sm.write_instr(relocated.origin() as usize, relocated.code()); // theoretical maximum according to data sheet, 100Mhz Pio => 50Mhz SPI Freq - // does not work yet, - // sm.set_clkdiv(0x0140); + sm.set_clkdiv(0x0140); // same speed as pico-sdk, 62.5Mhz - sm.set_clkdiv(0x0200); + // sm.set_clkdiv(0x0200); // 32 Mhz // sm.set_clkdiv(0x03E8); From b2d63d851df68effce2c4ef7276139380a496c88 Mon Sep 17 00:00:00 2001 From: kbleeke Date: Thu, 30 Mar 2023 12:04:18 +0200 Subject: [PATCH 089/130] set INTERRUPT_WITH_STATUS flag in attempt to prevent hangs --- src/bus.rs | 2 +- src/consts.rs | 3 ++- 2 files changed, 3 insertions(+), 2 deletions(-) diff --git a/src/bus.rs b/src/bus.rs index 65caea8e..add346b2 100644 --- a/src/bus.rs +++ b/src/bus.rs @@ -74,7 +74,7 @@ where // 32-bit word length, little endian (which is the default endianess). self.write32_swapped( REG_BUS_CTRL, - WORD_LENGTH_32 | HIGH_SPEED | INTERRUPT_HIGH | WAKE_UP | STATUS_ENABLE, + WORD_LENGTH_32 | HIGH_SPEED | INTERRUPT_HIGH | WAKE_UP | STATUS_ENABLE | INTERRUPT_WITH_STATUS, ) .await; diff --git a/src/consts.rs b/src/consts.rs index 6ed7feb9..fee2d01a 100644 --- a/src/consts.rs +++ b/src/consts.rs @@ -16,7 +16,8 @@ pub(crate) const WORD_LENGTH_32: u32 = 0x1; pub(crate) const HIGH_SPEED: u32 = 0x10; pub(crate) const INTERRUPT_HIGH: u32 = 1 << 5; pub(crate) const WAKE_UP: u32 = 1 << 7; -pub(crate) const STATUS_ENABLE: u32 = 0x10000; +pub(crate) const STATUS_ENABLE: u32 = 1 << 16; +pub(crate) const INTERRUPT_WITH_STATUS: u32 = 1 << 17; // SPI_STATUS_REGISTER bits pub(crate) const STATUS_DATA_NOT_AVAILABLE: u32 = 0x00000001; From 69db1535b21d529abe5c92fa88ea771ca0b1d721 Mon Sep 17 00:00:00 2001 From: kbleeke Date: Thu, 30 Mar 2023 12:24:37 +0200 Subject: [PATCH 090/130] clear DATA_UNAVAILABLE irq --- src/runner.rs | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/src/runner.rs b/src/runner.rs index ccdbbf1a..deb45f9f 100644 --- a/src/runner.rs +++ b/src/runner.rs @@ -310,6 +310,12 @@ where if irq & IRQ_F2_PACKET_AVAILABLE != 0 { self.check_status(buf).await; } + + if irq & IRQ_DATA_UNAVAILABLE != 0 { + // TODO what should we do here? + warn!("IRQ DATA_UNAVAILABLE, clearing..."); + self.bus.write16(FUNC_BUS, REG_BUS_INTERRUPT, 1).await; + } } /// Handle F2 events while status register is set From 608eb9b1fde5c2d6c5e8f4f5732379de22c2e6c1 Mon Sep 17 00:00:00 2001 From: kbleeke Date: Thu, 30 Mar 2023 17:09:12 +0200 Subject: [PATCH 091/130] event queue mutexs can be noop because we are already !Sync in other places --- src/events.rs | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/src/events.rs b/src/events.rs index b9c8cca6..87f6c01a 100644 --- a/src/events.rs +++ b/src/events.rs @@ -3,7 +3,7 @@ use core::num; -use embassy_sync::blocking_mutex::raw::CriticalSectionRawMutex; +use embassy_sync::blocking_mutex::raw::NoopRawMutex; use embassy_sync::pubsub::{PubSubChannel, Publisher, Subscriber}; #[derive(Debug, Clone, Copy, PartialEq, Eq, num_enum::FromPrimitive)] @@ -284,9 +284,9 @@ pub enum Event { LAST = 190, } -pub type EventQueue = PubSubChannel; -pub type EventPublisher<'a> = Publisher<'a, CriticalSectionRawMutex, EventStatus, 2, 1, 1>; -pub type EventSubscriber<'a> = Subscriber<'a, CriticalSectionRawMutex, EventStatus, 2, 1, 1>; +pub type EventQueue = PubSubChannel; +pub type EventPublisher<'a> = Publisher<'a, NoopRawMutex, EventStatus, 2, 1, 1>; +pub type EventSubscriber<'a> = Subscriber<'a, NoopRawMutex, EventStatus, 2, 1, 1>; #[derive(Clone, Copy)] #[cfg_attr(feature = "defmt", derive(defmt::Format))] From 76ebebd0c5b58d230391be4d1989f68f1cc3d5b5 Mon Sep 17 00:00:00 2001 From: kbleeke Date: Fri, 31 Mar 2023 14:18:39 +0200 Subject: [PATCH 092/130] parse data from device in-place --- src/runner.rs | 67 ++++------------------ src/structs.rs | 149 ++++++++++++++++++++++++++++++++++++++++++++++--- 2 files changed, 154 insertions(+), 62 deletions(-) diff --git a/src/runner.rs b/src/runner.rs index deb45f9f..f0f6fcee 100644 --- a/src/runner.rs +++ b/src/runner.rs @@ -328,45 +328,23 @@ where let len = (status & STATUS_F2_PKT_LEN_MASK) >> STATUS_F2_PKT_LEN_SHIFT; self.bus.wlan_read(buf, len).await; trace!("rx {:02x}", Bytes(&slice8_mut(buf)[..(len as usize).min(48)])); - self.rx(&slice8_mut(buf)[..len as usize]); + self.rx(&mut slice8_mut(buf)[..len as usize]); } else { break; } } } - fn rx(&mut self, packet: &[u8]) { - if packet.len() < SdpcmHeader::SIZE { - warn!("packet too short, len={}", packet.len()); - return; - } - - let sdpcm_header = SdpcmHeader::from_bytes(packet[..SdpcmHeader::SIZE].try_into().unwrap()); - trace!("rx {:?}", sdpcm_header); - if sdpcm_header.len != !sdpcm_header.len_inv { - warn!("len inv mismatch"); - return; - } - if sdpcm_header.len as usize != packet.len() { - // TODO: is this guaranteed?? - warn!("len from header doesn't match len from spi"); - return; - } + fn rx(&mut self, packet: &mut [u8]) { + let Some((sdpcm_header, payload)) = SdpcmHeader::parse(packet) else { return }; self.update_credit(&sdpcm_header); let channel = sdpcm_header.channel_and_flags & 0x0f; - let payload = &packet[sdpcm_header.header_length as _..]; - match channel { CHANNEL_TYPE_CONTROL => { - if payload.len() < CdcHeader::SIZE { - warn!("payload too short, len={}", payload.len()); - return; - } - - let cdc_header = CdcHeader::from_bytes(payload[..CdcHeader::SIZE].try_into().unwrap()); + let Some((cdc_header, response)) = CdcHeader::parse(payload) else { return; }; trace!(" {:?}", cdc_header); if cdc_header.id == self.ioctl_id { @@ -375,28 +353,21 @@ where panic!("IOCTL error {}", cdc_header.status as i32); } - let resp_len = cdc_header.len as usize; - let response = &payload[CdcHeader::SIZE..][..resp_len]; info!("IOCTL Response: {:02x}", Bytes(response)); self.ioctl_state.ioctl_done(response); } } CHANNEL_TYPE_EVENT => { - let bcd_header = BcdHeader::from_bytes(&payload[..BcdHeader::SIZE].try_into().unwrap()); - trace!(" {:?}", bcd_header); - - let packet_start = BcdHeader::SIZE + 4 * bcd_header.data_offset as usize; - - if packet_start + EventPacket::SIZE > payload.len() { + let Some((_, bcd_packet)) = BcdHeader::parse(payload) else { warn!("BCD event, incomplete header"); return; - } - let bcd_packet = &payload[packet_start..]; - trace!(" {:02x}", Bytes(&bcd_packet[..(bcd_packet.len() as usize).min(36)])); + }; - let mut event_packet = EventPacket::from_bytes(&bcd_packet[..EventPacket::SIZE].try_into().unwrap()); - event_packet.byteswap(); + let Some((event_packet, evt_data)) = EventPacket::parse(bcd_packet) else { + warn!("BCD event, incomplete data"); + return; + }; const ETH_P_LINK_CTL: u16 = 0x886c; // HPNA, wlan link local tunnel, according to linux if_ether.h if event_packet.eth.ether_type != ETH_P_LINK_CTL { @@ -427,13 +398,7 @@ where return; } - if event_packet.msg.datalen as usize >= (bcd_packet.len() - EventMessage::SIZE) { - warn!("BCD event, incomplete data"); - return; - } - let evt_type = events::Event::from(event_packet.msg.event_type as u8); - let evt_data = &bcd_packet[EventMessage::SIZE..][..event_packet.msg.datalen as usize]; debug!( "=== EVENT {:?}: {:?} {:02x}", evt_type, @@ -449,16 +414,8 @@ where } } CHANNEL_TYPE_DATA => { - let bcd_header = BcdHeader::from_bytes(&payload[..BcdHeader::SIZE].try_into().unwrap()); - trace!(" {:?}", bcd_header); - - let packet_start = BcdHeader::SIZE + 4 * bcd_header.data_offset as usize; - if packet_start > payload.len() { - warn!("packet start out of range."); - return; - } - let packet = &payload[packet_start..]; - trace!("rx pkt {:02x}", Bytes(&packet[..(packet.len() as usize).min(48)])); + let Some((_, packet)) = BcdHeader::parse(payload) else { return }; + trace!("rx pkt {:02x}", Bytes(&packet[..packet.len().min(48)])); match self.ch.try_rx_buf() { Some(buf) => { diff --git a/src/structs.rs b/src/structs.rs index e16808f3..6d5d31b0 100644 --- a/src/structs.rs +++ b/src/structs.rs @@ -1,4 +1,5 @@ use crate::events::Event; +use crate::fmt::Bytes; macro_rules! impl_bytes { ($t:ident) => { @@ -11,8 +12,28 @@ macro_rules! impl_bytes { } #[allow(unused)] - pub fn from_bytes(bytes: &[u8; Self::SIZE]) -> Self { - unsafe { core::mem::transmute(*bytes) } + pub fn from_bytes(bytes: &[u8; Self::SIZE]) -> &Self { + let alignment = core::mem::align_of::(); + assert_eq!( + bytes.as_ptr().align_offset(alignment), + 0, + "{} is not aligned", + core::any::type_name::() + ); + unsafe { core::mem::transmute(bytes) } + } + + #[allow(unused)] + pub fn from_bytes_mut(bytes: &mut [u8; Self::SIZE]) -> &mut Self { + let alignment = core::mem::align_of::(); + assert_eq!( + bytes.as_ptr().align_offset(alignment), + 0, + "{} is not aligned", + core::any::type_name::() + ); + + unsafe { core::mem::transmute(bytes) } } } }; @@ -67,9 +88,35 @@ pub struct SdpcmHeader { } impl_bytes!(SdpcmHeader); +impl SdpcmHeader { + pub fn parse(packet: &mut [u8]) -> Option<(&mut Self, &mut [u8])> { + let packet_len = packet.len(); + if packet_len < Self::SIZE { + warn!("packet too short, len={}", packet.len()); + return None; + } + let (sdpcm_header, sdpcm_packet) = packet.split_at_mut(Self::SIZE); + let sdpcm_header = Self::from_bytes_mut(sdpcm_header.try_into().unwrap()); + trace!("rx {:?}", sdpcm_header); + + if sdpcm_header.len != !sdpcm_header.len_inv { + warn!("len inv mismatch"); + return None; + } + + if sdpcm_header.len as usize != packet_len { + warn!("len from header doesn't match len from spi"); + return None; + } + + let sdpcm_packet = &mut sdpcm_packet[(sdpcm_header.header_length as usize - Self::SIZE)..]; + Some((sdpcm_header, sdpcm_packet)) + } +} + #[derive(Debug, Clone, Copy)] -#[cfg_attr(feature = "defmt", derive(defmt::Format))] -#[repr(C)] +// #[cfg_attr(feature = "defmt", derive(defmt::Format))] +#[repr(C, packed(2))] pub struct CdcHeader { pub cmd: u32, pub len: u32, @@ -79,6 +126,21 @@ pub struct CdcHeader { } impl_bytes!(CdcHeader); +impl CdcHeader { + pub fn parse(packet: &mut [u8]) -> Option<(&mut Self, &mut [u8])> { + if packet.len() < Self::SIZE { + warn!("payload too short, len={}", packet.len()); + return None; + } + + let (cdc_header, payload) = packet.split_at_mut(Self::SIZE); + let cdc_header = Self::from_bytes_mut(cdc_header.try_into().unwrap()); + + let payload = &mut payload[..cdc_header.len as usize]; + Some((cdc_header, payload)) + } +} + pub const BDC_VERSION: u8 = 2; pub const BDC_VERSION_SHIFT: u8 = 4; @@ -95,6 +157,25 @@ pub struct BcdHeader { } impl_bytes!(BcdHeader); +impl BcdHeader { + pub fn parse(packet: &mut [u8]) -> Option<(&mut Self, &mut [u8])> { + if packet.len() < Self::SIZE { + return None; + } + + let (bcd_header, bcd_packet) = packet.split_at_mut(Self::SIZE); + let bcd_header = Self::from_bytes_mut(bcd_header.try_into().unwrap()); + trace!(" {:?}", bcd_header); + + let packet_start = 4 * bcd_header.data_offset as usize; + + let bcd_packet = bcd_packet.get_mut(packet_start..)?; + trace!(" {:02x}", Bytes(&bcd_packet[..bcd_packet.len().min(36)])); + + Some((bcd_header, bcd_packet)) + } +} + #[derive(Clone, Copy)] #[cfg_attr(feature = "defmt", derive(defmt::Format))] #[repr(C)] @@ -130,8 +211,8 @@ impl EventHeader { } #[derive(Debug, Clone, Copy)] -#[cfg_attr(feature = "defmt", derive(defmt::Format))] -#[repr(C)] +// #[cfg_attr(feature = "defmt", derive(defmt::Format))] +#[repr(C, packed(2))] pub struct EventMessage { /// version pub version: u16, @@ -158,6 +239,45 @@ pub struct EventMessage { } impl_bytes!(EventMessage); +#[cfg(feature = "defmt")] +impl defmt::Format for EventMessage { + fn format(&self, fmt: defmt::Formatter) { + let event_type = self.event_type; + let status = self.status; + let reason = self.reason; + let auth_type = self.auth_type; + let datalen = self.datalen; + + defmt::write!( + fmt, + "EventMessage {{ \ + version: {=u16}, \ + flags: {=u16}, \ + event_type: {=u32}, \ + status: {=u32}, \ + reason: {=u32}, \ + auth_type: {=u32}, \ + datalen: {=u32}, \ + addr: {=[u8; 6]:x}, \ + ifname: {=[u8; 16]:x}, \ + ifidx: {=u8}, \ + bsscfgidx: {=u8}, \ + }} ", + self.version, + self.flags, + event_type, + status, + reason, + auth_type, + datalen, + self.addr, + self.ifname, + self.ifidx, + self.bsscfgidx + ); + } +} + impl EventMessage { pub fn byteswap(&mut self) { self.version = self.version.to_be(); @@ -172,7 +292,7 @@ impl EventMessage { #[derive(Clone, Copy)] #[cfg_attr(feature = "defmt", derive(defmt::Format))] -#[repr(C)] +#[repr(C, packed(2))] pub struct EventPacket { pub eth: EthernetHeader, pub hdr: EventHeader, @@ -181,6 +301,21 @@ pub struct EventPacket { impl_bytes!(EventPacket); impl EventPacket { + pub fn parse(packet: &mut [u8]) -> Option<(&mut Self, &mut [u8])> { + if packet.len() < Self::SIZE { + return None; + } + + let (event_header, event_packet) = packet.split_at_mut(Self::SIZE); + let event_header = Self::from_bytes_mut(event_header.try_into().unwrap()); + // warn!("event_header {:x}", event_header as *const _); + event_header.byteswap(); + + let event_packet = event_packet.get_mut(..event_header.msg.datalen as usize)?; + + Some((event_header, event_packet)) + } + pub fn byteswap(&mut self) { self.eth.byteswap(); self.hdr.byteswap(); From eb32d8ebbd86c0805c9e72f368a718b9977adf12 Mon Sep 17 00:00:00 2001 From: kbleeke Date: Fri, 7 Apr 2023 19:54:05 +0200 Subject: [PATCH 093/130] update embassy --- Cargo.toml | 10 +++++----- examples/rpi-pico-w/Cargo.toml | 18 +++++++++--------- examples/rpi-pico-w/src/main.rs | 2 +- 3 files changed, 15 insertions(+), 15 deletions(-) diff --git a/Cargo.toml b/Cargo.toml index 04a47a3a..acd3865e 100644 --- a/Cargo.toml +++ b/Cargo.toml @@ -28,11 +28,11 @@ embedded-hal-1 = { package = "embedded-hal", version = "1.0.0-alpha.9" } num_enum = { version = "0.5.7", default-features = false } [patch.crates-io] -embassy-time = { git = "https://github.com/embassy-rs/embassy", rev = "e3f8020c3bdf726dfa451b5b190f27191507a18f" } -embassy-futures = { git = "https://github.com/embassy-rs/embassy", rev = "e3f8020c3bdf726dfa451b5b190f27191507a18f" } -embassy-sync = { git = "https://github.com/embassy-rs/embassy", rev = "e3f8020c3bdf726dfa451b5b190f27191507a18f" } -embassy-net-driver-channel = { git = "https://github.com/embassy-rs/embassy", rev = "e3f8020c3bdf726dfa451b5b190f27191507a18f" } -embassy-rp = { git = "https://github.com/embassy-rs/embassy", rev = "e3f8020c3bdf726dfa451b5b190f27191507a18f" } +embassy-time = { git = "https://github.com/embassy-rs/embassy", rev = "047ea9066f0d946fd4d706577b21df38fd3b1647" } +embassy-futures = { git = "https://github.com/embassy-rs/embassy", rev = "047ea9066f0d946fd4d706577b21df38fd3b1647" } +embassy-sync = { git = "https://github.com/embassy-rs/embassy", rev = "047ea9066f0d946fd4d706577b21df38fd3b1647" } +embassy-net-driver-channel = { git = "https://github.com/embassy-rs/embassy", rev = "047ea9066f0d946fd4d706577b21df38fd3b1647" } +embassy-rp = { git = "https://github.com/embassy-rs/embassy", rev = "047ea9066f0d946fd4d706577b21df38fd3b1647" } [workspace] members = ["cyw43-pio"] diff --git a/examples/rpi-pico-w/Cargo.toml b/examples/rpi-pico-w/Cargo.toml index 41ee8a3c..17ee25c3 100644 --- a/examples/rpi-pico-w/Cargo.toml +++ b/examples/rpi-pico-w/Cargo.toml @@ -7,7 +7,7 @@ edition = "2021" [dependencies] cyw43 = { path = "../../", features = ["defmt", "firmware-logs"] } cyw43-pio = { path = "../../cyw43-pio" } -embassy-executor = { version = "0.1.0", features = ["defmt", "integrated-timers"] } +embassy-executor = { version = "0.1.0", features = ["defmt", "integrated-timers", "executor-thread", "arch-cortex-m"] } embassy-time = { version = "0.1.0", features = ["defmt", "defmt-timestamp-uptime"] } embassy-rp = { version = "0.1.0", features = ["defmt", "unstable-traits", "nightly", "unstable-pac", "time-driver", "pio"] } embassy-net = { version = "0.1.0", features = ["defmt", "tcp", "dhcpv4", "medium-ethernet", "unstable-traits", "nightly"] } @@ -27,14 +27,14 @@ heapless = "0.7.15" [patch.crates-io] -embassy-executor = { git = "https://github.com/embassy-rs/embassy", rev = "e3f8020c3bdf726dfa451b5b190f27191507a18f" } -embassy-time = { git = "https://github.com/embassy-rs/embassy", rev = "e3f8020c3bdf726dfa451b5b190f27191507a18f" } -embassy-futures = { git = "https://github.com/embassy-rs/embassy", rev = "e3f8020c3bdf726dfa451b5b190f27191507a18f" } -embassy-sync = { git = "https://github.com/embassy-rs/embassy", rev = "e3f8020c3bdf726dfa451b5b190f27191507a18f" } -embassy-rp = { git = "https://github.com/embassy-rs/embassy", rev = "e3f8020c3bdf726dfa451b5b190f27191507a18f" } -embassy-net = { git = "https://github.com/embassy-rs/embassy", rev = "e3f8020c3bdf726dfa451b5b190f27191507a18f" } -embassy-net-driver = { git = "https://github.com/embassy-rs/embassy", rev = "e3f8020c3bdf726dfa451b5b190f27191507a18f" } -embassy-net-driver-channel = { git = "https://github.com/embassy-rs/embassy", rev = "e3f8020c3bdf726dfa451b5b190f27191507a18f" } +embassy-executor = { git = "https://github.com/embassy-rs/embassy", rev = "047ea9066f0d946fd4d706577b21df38fd3b1647" } +embassy-time = { git = "https://github.com/embassy-rs/embassy", rev = "047ea9066f0d946fd4d706577b21df38fd3b1647" } +embassy-futures = { git = "https://github.com/embassy-rs/embassy", rev = "047ea9066f0d946fd4d706577b21df38fd3b1647" } +embassy-sync = { git = "https://github.com/embassy-rs/embassy", rev = "047ea9066f0d946fd4d706577b21df38fd3b1647" } +embassy-rp = { git = "https://github.com/embassy-rs/embassy", rev = "047ea9066f0d946fd4d706577b21df38fd3b1647" } +embassy-net = { git = "https://github.com/embassy-rs/embassy", rev = "047ea9066f0d946fd4d706577b21df38fd3b1647" } +embassy-net-driver = { git = "https://github.com/embassy-rs/embassy", rev = "047ea9066f0d946fd4d706577b21df38fd3b1647" } +embassy-net-driver-channel = { git = "https://github.com/embassy-rs/embassy", rev = "047ea9066f0d946fd4d706577b21df38fd3b1647" } [profile.dev] debug = 2 diff --git a/examples/rpi-pico-w/src/main.rs b/examples/rpi-pico-w/src/main.rs index 4b1623be..d5610d2b 100644 --- a/examples/rpi-pico-w/src/main.rs +++ b/examples/rpi-pico-w/src/main.rs @@ -14,7 +14,7 @@ use embassy_net::tcp::TcpSocket; use embassy_net::{Config, Stack, StackResources}; use embassy_rp::gpio::{Flex, Level, Output}; use embassy_rp::peripherals::{DMA_CH0, PIN_23, PIN_24, PIN_25, PIN_29}; -use embassy_rp::pio::{Pio0, PioPeripherial, PioStateMachineInstance, Sm0}; +use embassy_rp::pio::{Pio0, PioPeripheral, PioStateMachineInstance, Sm0}; use embedded_io::asynch::Write; use static_cell::StaticCell; use {defmt_rtt as _, panic_probe as _}; From 056b8ab5a2e277af7ceb845e87b38747ae9d950c Mon Sep 17 00:00:00 2001 From: kbleeke Date: Fri, 7 Apr 2023 19:54:39 +0200 Subject: [PATCH 094/130] update nightly to embassy nightly --- rust-toolchain.toml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/rust-toolchain.toml b/rust-toolchain.toml index 20c10c3f..88519979 100644 --- a/rust-toolchain.toml +++ b/rust-toolchain.toml @@ -1,7 +1,7 @@ # Before upgrading check that everything is available on all tier1 targets here: # https://rust-lang.github.io/rustup-components-history [toolchain] -channel = "nightly-2023-03-19" +channel = "nightly-2023-04-02" components = [ "rust-src", "rustfmt" ] targets = [ "thumbv6m-none-eabi", From 4d2710ed4d978b71602b9f1c809d721650e0c1e9 Mon Sep 17 00:00:00 2001 From: kbleeke Date: Fri, 7 Apr 2023 19:55:46 +0200 Subject: [PATCH 095/130] pin defmt to 0.3.2. 0.3.4 introduces an undesired wire format upgrade --- examples/rpi-pico-w/Cargo.toml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/examples/rpi-pico-w/Cargo.toml b/examples/rpi-pico-w/Cargo.toml index 17ee25c3..dca796e3 100644 --- a/examples/rpi-pico-w/Cargo.toml +++ b/examples/rpi-pico-w/Cargo.toml @@ -14,7 +14,7 @@ embassy-net = { version = "0.1.0", features = ["defmt", "tcp", "dhcpv4", "medium atomic-polyfill = "0.1.5" static_cell = "1.0" -defmt = "0.3" +defmt = "=0.3.2" defmt-rtt = "0.3" panic-probe = { version = "0.3", features = ["print-defmt"] } From 683ad8047996709fce819c90f6cad47c096a57b7 Mon Sep 17 00:00:00 2001 From: kbleeke Date: Fri, 7 Apr 2023 19:56:05 +0200 Subject: [PATCH 096/130] update embedded-hal --- Cargo.toml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Cargo.toml b/Cargo.toml index acd3865e..4ea5d8b6 100644 --- a/Cargo.toml +++ b/Cargo.toml @@ -24,7 +24,7 @@ cortex-m = "0.7.3" cortex-m-rt = "0.7.0" futures = { version = "0.3.17", default-features = false, features = ["async-await", "cfg-target-has-atomic", "unstable"] } -embedded-hal-1 = { package = "embedded-hal", version = "1.0.0-alpha.9" } +embedded-hal-1 = { package = "embedded-hal", version = "1.0.0-alpha.10" } num_enum = { version = "0.5.7", default-features = false } [patch.crates-io] From 4be1e4bd44600737bf80ef7210c2b913d63364de Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Mattias=20Gr=C3=B6nlund?= Date: Fri, 14 Apr 2023 09:38:35 +0200 Subject: [PATCH 097/130] Remove MySpi MySpi was replaced by PioSpi and no longer used. --- examples/rpi-pico-w/src/main.rs | 90 +-------------------------------- 1 file changed, 2 insertions(+), 88 deletions(-) diff --git a/examples/rpi-pico-w/src/main.rs b/examples/rpi-pico-w/src/main.rs index d5610d2b..b773cea1 100644 --- a/examples/rpi-pico-w/src/main.rs +++ b/examples/rpi-pico-w/src/main.rs @@ -4,7 +4,6 @@ #![feature(async_fn_in_trait)] #![allow(incomplete_features)] -use core::slice; use core::str::from_utf8; use cyw43_pio::PioSpi; @@ -12,8 +11,8 @@ use defmt::*; use embassy_executor::Spawner; use embassy_net::tcp::TcpSocket; use embassy_net::{Config, Stack, StackResources}; -use embassy_rp::gpio::{Flex, Level, Output}; -use embassy_rp::peripherals::{DMA_CH0, PIN_23, PIN_24, PIN_25, PIN_29}; +use embassy_rp::gpio::{Level, Output}; +use embassy_rp::peripherals::{DMA_CH0, PIN_23, PIN_25}; use embassy_rp::pio::{Pio0, PioPeripheral, PioStateMachineInstance, Sm0}; use embedded_io::asynch::Write; use static_cell::StaticCell; @@ -150,88 +149,3 @@ async fn main(spawner: Spawner) { } } -struct MySpi { - /// SPI clock - clk: Output<'static, PIN_29>, - - /// 4 signals, all in one!! - /// - SPI MISO - /// - SPI MOSI - /// - IRQ - /// - strap to set to gSPI mode on boot. - dio: Flex<'static, PIN_24>, - - /// Chip select - cs: Output<'static, PIN_25>, -} - -impl MySpi { - async fn read(&mut self, words: &mut [u32]) { - self.dio.set_as_input(); - for word in words { - let mut w = 0; - for _ in 0..32 { - w = w << 1; - - // rising edge, sample data - if self.dio.is_high() { - w |= 0x01; - } - self.clk.set_high(); - - // falling edge - self.clk.set_low(); - } - *word = w - } - } - - async fn write(&mut self, words: &[u32]) { - self.dio.set_as_output(); - for word in words { - let mut word = *word; - for _ in 0..32 { - // falling edge, setup data - self.clk.set_low(); - if word & 0x8000_0000 == 0 { - self.dio.set_low(); - } else { - self.dio.set_high(); - } - - // rising edge - self.clk.set_high(); - - word = word << 1; - } - } - self.clk.set_low(); - - self.dio.set_as_input(); - } -} - -impl cyw43::SpiBusCyw43 for MySpi { - async fn cmd_write(&mut self, write: &[u32]) -> u32 { - self.cs.set_low(); - self.write(write).await; - - let mut status = 0; - self.read(slice::from_mut(&mut status)).await; - - self.cs.set_high(); - status - } - - async fn cmd_read(&mut self, write: u32, read: &mut [u32]) -> u32 { - self.cs.set_low(); - self.write(slice::from_ref(&write)).await; - self.read(read).await; - - let mut status = 0; - self.read(slice::from_mut(&mut status)).await; - - self.cs.set_high(); - status - } -} From 9ca5bcd57686bc8144c31b1937a15dccb6cf07ce Mon Sep 17 00:00:00 2001 From: mattiasgronlund Date: Fri, 14 Apr 2023 10:27:25 +0200 Subject: [PATCH 098/130] Update main.rs --- examples/rpi-pico-w/src/main.rs | 5 ----- 1 file changed, 5 deletions(-) diff --git a/examples/rpi-pico-w/src/main.rs b/examples/rpi-pico-w/src/main.rs index b773cea1..d075aec2 100644 --- a/examples/rpi-pico-w/src/main.rs +++ b/examples/rpi-pico-w/src/main.rs @@ -61,11 +61,6 @@ async fn main(spawner: Spawner) { let pwr = Output::new(p.PIN_23, Level::Low); let cs = Output::new(p.PIN_25, Level::High); - // let clk = Output::new(p.PIN_29, Level::Low); - // let mut dio = Flex::new(p.PIN_24); - // dio.set_low(); - // dio.set_as_output(); - // // let bus = MySpi { clk, dio }; let (_, sm, _, _, _) = p.PIO0.split(); let dma = p.DMA_CH0; From 6a1a3e6877053b1b72adb3c1446f4f077ad3b03e Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Fri, 21 Apr 2023 14:37:04 +0200 Subject: [PATCH 099/130] Workaround regex breaking change. --- examples/rpi-pico-w/Cargo.toml | 3 +++ 1 file changed, 3 insertions(+) diff --git a/examples/rpi-pico-w/Cargo.toml b/examples/rpi-pico-w/Cargo.toml index dca796e3..d211f926 100644 --- a/examples/rpi-pico-w/Cargo.toml +++ b/examples/rpi-pico-w/Cargo.toml @@ -25,6 +25,9 @@ futures = { version = "0.3.17", default-features = false, features = ["async-awa embedded-io = { version = "0.4.0", features = ["async", "defmt"] } heapless = "0.7.15" +[build-dependencies] +# Workaround https://github.com/embassy-rs/cyw43/issues/68 +regex = { version = "~1.7.3", default-features = false } [patch.crates-io] embassy-executor = { git = "https://github.com/embassy-rs/embassy", rev = "047ea9066f0d946fd4d706577b21df38fd3b1647" } From 2d7ba44621fa35abad07d2ddb8b253e815ce2c1f Mon Sep 17 00:00:00 2001 From: kbleeke Date: Sun, 2 Apr 2023 20:19:47 +0200 Subject: [PATCH 100/130] rework event handling to allow sending data --- src/bus.rs | 8 +--- src/consts.rs | 44 ++++++++++++++++++++ src/control.rs | 19 +++++---- src/events.rs | 111 ++++++++++++++++++++++++++++++++++++++++++++++--- src/ioctl.rs | 6 +++ src/lib.rs | 13 ++++-- src/runner.rs | 33 +++++++-------- 7 files changed, 192 insertions(+), 42 deletions(-) diff --git a/src/bus.rs b/src/bus.rs index add346b2..e26f1112 100644 --- a/src/bus.rs +++ b/src/bus.rs @@ -1,11 +1,10 @@ -use core::slice; - use embassy_futures::yield_now; use embassy_time::{Duration, Timer}; use embedded_hal_1::digital::OutputPin; use futures::FutureExt; use crate::consts::*; +use crate::slice8_mut; /// Custom Spi Trait that _only_ supports the bus operation of the cyw43 /// Implementors are expected to hold the CS pin low during an operation. @@ -327,8 +326,3 @@ fn swap16(x: u32) -> u32 { fn cmd_word(write: bool, incr: bool, func: u32, addr: u32, len: u32) -> u32 { (write as u32) << 31 | (incr as u32) << 30 | (func & 0b11) << 28 | (addr & 0x1FFFF) << 11 | (len & 0x7FF) } - -fn slice8_mut(x: &mut [u32]) -> &mut [u8] { - let len = x.len() * 4; - unsafe { slice::from_raw_parts_mut(x.as_mut_ptr() as _, len) } -} diff --git a/src/consts.rs b/src/consts.rs index fee2d01a..18502bd1 100644 --- a/src/consts.rs +++ b/src/consts.rs @@ -109,6 +109,50 @@ pub(crate) const READ: bool = false; pub(crate) const INC_ADDR: bool = true; pub(crate) const FIXED_ADDR: bool = false; +#[allow(non_camel_case_types)] +#[derive(Copy, Clone)] +#[repr(u8)] +pub enum EStatus { + /// operation was successful + SUCCESS = 0, + /// operation failed + FAIL = 1, + /// operation timed out + TIMEOUT = 2, + /// failed due to no matching network found + NO_NETWORKS = 3, + /// operation was aborted + ABORT = 4, + /// protocol failure: packet not ack'd + NO_ACK = 5, + /// AUTH or ASSOC packet was unsolicited + UNSOLICITED = 6, + /// attempt to assoc to an auto auth configuration + ATTEMPT = 7, + /// scan results are incomplete + PARTIAL = 8, + /// scan aborted by another scan + NEWSCAN = 9, + /// scan aborted due to assoc in progress + NEWASSOC = 10, + /// 802.11h quiet period started + _11HQUIET = 11, + /// user disabled scanning (WLC_SET_SCANSUPPRESS) + SUPPRESS = 12, + /// no allowable channels to scan + NOCHANS = 13, + /// scan aborted due to CCX fast roam + CCXFASTRM = 14, + /// abort channel select + CS_ABORT = 15, +} + +impl PartialEq for u32 { + fn eq(&self, other: &EStatus) -> bool { + *self == *other as Self + } +} + #[allow(dead_code)] pub(crate) struct FormatStatus(pub u32); diff --git a/src/control.rs b/src/control.rs index 30d5d092..824c5512 100644 --- a/src/control.rs +++ b/src/control.rs @@ -6,7 +6,7 @@ use embassy_time::{Duration, Timer}; pub use crate::bus::SpiBusCyw43; use crate::consts::*; -use crate::events::{Event, EventQueue}; +use crate::events::{Event, Events}; use crate::fmt::Bytes; use crate::ioctl::{IoctlState, IoctlType}; use crate::structs::*; @@ -14,15 +14,15 @@ use crate::{countries, PowerManagementMode}; pub struct Control<'a> { state_ch: ch::StateRunner<'a>, - event_sub: &'a EventQueue, + events: &'a Events, ioctl_state: &'a IoctlState, } impl<'a> Control<'a> { - pub(crate) fn new(state_ch: ch::StateRunner<'a>, event_sub: &'a EventQueue, ioctl_state: &'a IoctlState) -> Self { + pub(crate) fn new(state_ch: ch::StateRunner<'a>, event_sub: &'a Events, ioctl_state: &'a IoctlState) -> Self { Self { state_ch, - event_sub, + events: event_sub, ioctl_state, } } @@ -195,24 +195,25 @@ impl<'a> Control<'a> { } async fn wait_for_join(&mut self, i: SsidInfo) { - let mut subscriber = self.event_sub.subscriber().unwrap(); + self.events.mask.enable(&[Event::JOIN, Event::AUTH]); + let mut subscriber = self.events.queue.subscriber().unwrap(); self.ioctl(IoctlType::Set, IOCTL_CMD_SET_SSID, 0, &mut i.to_bytes()) .await; // set_ssid loop { let msg = subscriber.next_message_pure().await; - if msg.event_type == Event::AUTH && msg.status != 0 { + if msg.header.event_type == Event::AUTH && msg.header.status != 0 { // retry - warn!("JOIN failed with status={}", msg.status); + warn!("JOIN failed with status={}", msg.header.status); self.ioctl(IoctlType::Set, IOCTL_CMD_SET_SSID, 0, &mut i.to_bytes()) .await; - } else if msg.event_type == Event::JOIN && msg.status == 0 { + } else if msg.header.event_type == Event::JOIN && msg.header.status == 0 { // successful join break; } } - + self.events.mask.disable_all(); self.state_ch.set_link_state(LinkState::Up); info!("JOINED"); } diff --git a/src/events.rs b/src/events.rs index 87f6c01a..fbdfbc88 100644 --- a/src/events.rs +++ b/src/events.rs @@ -1,7 +1,7 @@ #![allow(unused)] #![allow(non_camel_case_types)] -use core::num; +use core::cell::RefCell; use embassy_sync::blocking_mutex::raw::NoopRawMutex; use embassy_sync::pubsub::{PubSubChannel, Publisher, Subscriber}; @@ -284,13 +284,114 @@ pub enum Event { LAST = 190, } -pub type EventQueue = PubSubChannel; -pub type EventPublisher<'a> = Publisher<'a, NoopRawMutex, EventStatus, 2, 1, 1>; -pub type EventSubscriber<'a> = Subscriber<'a, NoopRawMutex, EventStatus, 2, 1, 1>; +// TODO this PubSub can probably be replaced with shared memory to make it a bit more efficient. +pub type EventQueue = PubSubChannel; +pub type EventPublisher<'a> = Publisher<'a, NoopRawMutex, Message, 2, 1, 1>; +pub type EventSubscriber<'a> = Subscriber<'a, NoopRawMutex, Message, 2, 1, 1>; + +pub struct Events { + pub queue: EventQueue, + pub mask: SharedEventMask, +} + +impl Events { + pub fn new() -> Self { + Self { + queue: EventQueue::new(), + mask: SharedEventMask::default(), + } + } +} #[derive(Clone, Copy)] #[cfg_attr(feature = "defmt", derive(defmt::Format))] -pub struct EventStatus { +pub struct Status { pub event_type: Event, pub status: u32, } + +#[derive(Clone, Copy)] +pub enum Payload { + None, +} + +#[derive(Clone, Copy)] + +pub struct Message { + pub header: Status, + pub payload: Payload, +} + +impl Message { + pub fn new(status: Status, payload: Payload) -> Self { + Self { + header: status, + payload, + } + } +} + +const EVENT_BITS: usize = ((Event::LAST as usize + 31) & !31) / 32; + +#[derive(Default)] +struct EventMask { + mask: [u32; EVENT_BITS], +} + +impl EventMask { + fn enable(&mut self, event: Event) { + let n = event as u32; + let word = n >> 5; + let bit = n & 0b11111; + + self.mask[word as usize] |= (1 << bit); + } + + fn disable(&mut self, event: Event) { + let n = event as u32; + let word = n >> 5; + let bit = n & 0b11111; + + self.mask[word as usize] &= !(1 << bit); + } + + fn is_enabled(&self, event: Event) -> bool { + let n = event as u32; + let word = n >> 5; + let bit = n & 0b11111; + + self.mask[word as usize] & (1 << bit) > 0 + } +} + +#[derive(Default)] + +pub struct SharedEventMask { + mask: RefCell, +} + +impl SharedEventMask { + pub fn enable(&self, events: &[Event]) { + let mut mask = self.mask.borrow_mut(); + for event in events { + mask.enable(*event); + } + } + + pub fn disable(&self, events: &[Event]) { + let mut mask = self.mask.borrow_mut(); + for event in events { + mask.disable(*event); + } + } + + pub fn disable_all(&self) { + let mut mask = self.mask.borrow_mut(); + mask.mask = Default::default(); + } + + pub fn is_enabled(&self, event: Event) -> bool { + let mask = self.mask.borrow(); + mask.is_enabled(event) + } +} diff --git a/src/ioctl.rs b/src/ioctl.rs index 89b20a2d..803934cf 100644 --- a/src/ioctl.rs +++ b/src/ioctl.rs @@ -4,6 +4,8 @@ use core::task::{Poll, Waker}; use embassy_sync::waitqueue::WakerRegistration; +use crate::fmt::Bytes; + #[derive(Clone, Copy)] pub enum IoctlType { Get = 0, @@ -100,6 +102,8 @@ impl IoctlState { pub fn ioctl_done(&self, response: &[u8]) { if let IoctlStateInner::Sent { buf } = self.state.get() { + info!("IOCTL Response: {:02x}", Bytes(response)); + // TODO fix this (unsafe { &mut *buf }[..response.len()]).copy_from_slice(response); @@ -107,6 +111,8 @@ impl IoctlState { resp_len: response.len(), }); self.wake_control(); + } else { + warn!("IOCTL Response but no pending Ioctl"); } } } diff --git a/src/lib.rs b/src/lib.rs index 069ca40f..f9244bdd 100644 --- a/src/lib.rs +++ b/src/lib.rs @@ -18,9 +18,11 @@ mod control; mod nvram; mod runner; +use core::slice; + use embassy_net_driver_channel as ch; use embedded_hal_1::digital::OutputPin; -use events::EventQueue; +use events::Events; use ioctl::IoctlState; use crate::bus::Bus; @@ -103,7 +105,7 @@ const CHIP: Chip = Chip { pub struct State { ioctl_state: IoctlState, ch: ch::State, - events: EventQueue, + events: Events, } impl State { @@ -111,7 +113,7 @@ impl State { Self { ioctl_state: IoctlState::new(), ch: ch::State::new(), - events: EventQueue::new(), + events: Events::new(), } } } @@ -225,3 +227,8 @@ where runner, ) } + +fn slice8_mut(x: &mut [u32]) -> &mut [u8] { + let len = x.len() * 4; + unsafe { slice::from_raw_parts_mut(x.as_mut_ptr() as _, len) } +} diff --git a/src/runner.rs b/src/runner.rs index f0f6fcee..554a711d 100644 --- a/src/runner.rs +++ b/src/runner.rs @@ -1,5 +1,3 @@ -use core::slice; - use embassy_futures::select::{select3, Either3}; use embassy_net_driver_channel as ch; use embassy_sync::pubsub::PubSubBehavior; @@ -9,12 +7,12 @@ use embedded_hal_1::digital::OutputPin; use crate::bus::Bus; pub use crate::bus::SpiBusCyw43; use crate::consts::*; -use crate::events::{EventQueue, EventStatus}; +use crate::events::{Events, Status}; use crate::fmt::Bytes; use crate::ioctl::{IoctlState, IoctlType, PendingIoctl}; use crate::nvram::NVRAM; use crate::structs::*; -use crate::{events, Core, CHIP, MTU}; +use crate::{events, slice8_mut, Core, CHIP, MTU}; #[cfg(feature = "firmware-logs")] struct LogState { @@ -45,7 +43,7 @@ pub struct Runner<'a, PWR, SPI> { sdpcm_seq: u8, sdpcm_seq_max: u8, - events: &'a EventQueue, + events: &'a Events, #[cfg(feature = "firmware-logs")] log: LogState, @@ -60,7 +58,7 @@ where ch: ch::Runner<'a, MTU>, bus: Bus, ioctl_state: &'a IoctlState, - events: &'a EventQueue, + events: &'a Events, ) -> Self { Self { ch, @@ -353,8 +351,6 @@ where panic!("IOCTL error {}", cdc_header.status as i32); } - info!("IOCTL Response: {:02x}", Bytes(response)); - self.ioctl_state.ioctl_done(response); } } @@ -406,11 +402,17 @@ where Bytes(evt_data) ); - if evt_type == events::Event::AUTH || evt_type == events::Event::JOIN { - self.events.publish_immediate(EventStatus { - status: event_packet.msg.status, - event_type: evt_type, - }); + if self.events.mask.is_enabled(evt_type) { + let status = event_packet.msg.status; + let event_payload = events::Payload::None; + + self.events.queue.publish_immediate(events::Message::new( + Status { + event_type: evt_type, + status, + }, + event_payload, + )); } } CHANNEL_TYPE_DATA => { @@ -548,8 +550,3 @@ where true } } - -fn slice8_mut(x: &mut [u32]) -> &mut [u8] { - let len = x.len() * 4; - unsafe { slice::from_raw_parts_mut(x.as_mut_ptr() as _, len) } -} From 582a15a69320d987de5db3121af2f805f8508a6b Mon Sep 17 00:00:00 2001 From: kbleeke Date: Tue, 25 Apr 2023 18:38:17 +0200 Subject: [PATCH 101/130] cleanup EventMask --- src/events.rs | 18 +++++++++--------- 1 file changed, 9 insertions(+), 9 deletions(-) diff --git a/src/events.rs b/src/events.rs index fbdfbc88..d6f114ed 100644 --- a/src/events.rs +++ b/src/events.rs @@ -331,34 +331,34 @@ impl Message { } } -const EVENT_BITS: usize = ((Event::LAST as usize + 31) & !31) / 32; - #[derive(Default)] struct EventMask { - mask: [u32; EVENT_BITS], + mask: [u32; Self::WORD_COUNT], } impl EventMask { + const WORD_COUNT: usize = ((Event::LAST as u32 + (u32::BITS - 1)) / u32::BITS) as usize; + fn enable(&mut self, event: Event) { let n = event as u32; - let word = n >> 5; - let bit = n & 0b11111; + let word = n / u32::BITS; + let bit = n % u32::BITS; self.mask[word as usize] |= (1 << bit); } fn disable(&mut self, event: Event) { let n = event as u32; - let word = n >> 5; - let bit = n & 0b11111; + let word = n / u32::BITS; + let bit = n % u32::BITS; self.mask[word as usize] &= !(1 << bit); } fn is_enabled(&self, event: Event) -> bool { let n = event as u32; - let word = n >> 5; - let bit = n & 0b11111; + let word = n / u32::BITS; + let bit = n % u32::BITS; self.mask[word as usize] & (1 << bit) > 0 } From 9e96655757180d7fe32ebff1ed93a35a4c3cff28 Mon Sep 17 00:00:00 2001 From: kbleeke Date: Tue, 25 Apr 2023 19:08:47 +0200 Subject: [PATCH 102/130] comment some choices for current event handling --- src/control.rs | 6 ++++-- src/runner.rs | 4 ++++ 2 files changed, 8 insertions(+), 2 deletions(-) diff --git a/src/control.rs b/src/control.rs index 824c5512..0c06009b 100644 --- a/src/control.rs +++ b/src/control.rs @@ -197,18 +197,20 @@ impl<'a> Control<'a> { async fn wait_for_join(&mut self, i: SsidInfo) { self.events.mask.enable(&[Event::JOIN, Event::AUTH]); let mut subscriber = self.events.queue.subscriber().unwrap(); + // the actual join operation starts here + // we make sure to enable events before so we don't miss any self.ioctl(IoctlType::Set, IOCTL_CMD_SET_SSID, 0, &mut i.to_bytes()) .await; // set_ssid loop { let msg = subscriber.next_message_pure().await; - if msg.header.event_type == Event::AUTH && msg.header.status != 0 { + if msg.header.event_type == Event::AUTH && msg.header.status != EStatus::SUCCESS { // retry warn!("JOIN failed with status={}", msg.header.status); self.ioctl(IoctlType::Set, IOCTL_CMD_SET_SSID, 0, &mut i.to_bytes()) .await; - } else if msg.header.event_type == Event::JOIN && msg.header.status == 0 { + } else if msg.header.event_type == Event::JOIN && msg.header.status == EStatus::SUCCESS { // successful join break; } diff --git a/src/runner.rs b/src/runner.rs index 554a711d..806ddfc4 100644 --- a/src/runner.rs +++ b/src/runner.rs @@ -406,6 +406,10 @@ where let status = event_packet.msg.status; let event_payload = events::Payload::None; + // this intentionally uses the non-blocking publish immediate + // publish() is a deadlock risk in the current design as awaiting here prevents ioctls + // The `Runner` always yields when accessing the device, so consumers always have a chance to receive the event + // (if they are actively awaiting the queue) self.events.queue.publish_immediate(events::Message::new( Status { event_type: evt_type, From 123c11042719648265d22f0d42b9f9e0ff8d73fc Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Wed, 26 Apr 2023 16:19:23 +0200 Subject: [PATCH 103/130] Revert "Workaround regex breaking change." This reverts commit 6a1a3e6877053b1b72adb3c1446f4f077ad3b03e. --- examples/rpi-pico-w/Cargo.toml | 3 --- 1 file changed, 3 deletions(-) diff --git a/examples/rpi-pico-w/Cargo.toml b/examples/rpi-pico-w/Cargo.toml index d211f926..dca796e3 100644 --- a/examples/rpi-pico-w/Cargo.toml +++ b/examples/rpi-pico-w/Cargo.toml @@ -25,9 +25,6 @@ futures = { version = "0.3.17", default-features = false, features = ["async-awa embedded-io = { version = "0.4.0", features = ["async", "defmt"] } heapless = "0.7.15" -[build-dependencies] -# Workaround https://github.com/embassy-rs/cyw43/issues/68 -regex = { version = "~1.7.3", default-features = false } [patch.crates-io] embassy-executor = { git = "https://github.com/embassy-rs/embassy", rev = "047ea9066f0d946fd4d706577b21df38fd3b1647" } From 0c7ce803849779af2ac6a2d3df401f5dafd57323 Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Wed, 26 Apr 2023 16:20:23 +0200 Subject: [PATCH 104/130] Fix missing defmt impl. --- src/structs.rs | 20 +++++++++++++++++++- 1 file changed, 19 insertions(+), 1 deletion(-) diff --git a/src/structs.rs b/src/structs.rs index 6d5d31b0..f54ec7fc 100644 --- a/src/structs.rs +++ b/src/structs.rs @@ -115,7 +115,6 @@ impl SdpcmHeader { } #[derive(Debug, Clone, Copy)] -// #[cfg_attr(feature = "defmt", derive(defmt::Format))] #[repr(C, packed(2))] pub struct CdcHeader { pub cmd: u32, @@ -126,6 +125,25 @@ pub struct CdcHeader { } impl_bytes!(CdcHeader); +#[cfg(feature = "defmt")] +impl defmt::Format for CdcHeader { + fn format(&self, fmt: defmt::Formatter) { + fn copy(t: T) -> T { + t + } + + defmt::write!( + fmt, + "CdcHeader{{cmd: {=u32:08x}, len: {=u32:08x}, flags: {=u16:04x}, id: {=u16:04x}, status: {=u32:08x}}}", + copy(self.cmd), + copy(self.len), + copy(self.flags), + copy(self.id), + copy(self.status), + ) + } +} + impl CdcHeader { pub fn parse(packet: &mut [u8]) -> Option<(&mut Self, &mut [u8])> { if packet.len() < Self::SIZE { From 0a2d6f0be069233bdfa9d9eee6f41184fdda72f3 Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Wed, 26 Apr 2023 16:20:49 +0200 Subject: [PATCH 105/130] ci: build with DEFMT_LOG=trace to catch all defmt issues. --- .vscode/settings.json | 1 - ci.sh | 2 ++ 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/.vscode/settings.json b/.vscode/settings.json index 34430769..dd479929 100644 --- a/.vscode/settings.json +++ b/.vscode/settings.json @@ -9,7 +9,6 @@ "rust-analyzer.check.noDefaultFeatures": true, "rust-analyzer.linkedProjects": [ "examples/rpi-pico-w/Cargo.toml", - "cyw43-pio/Cargo.toml", ], "rust-analyzer.server.extraEnv": { "WIFI_NETWORK": "foo", diff --git a/ci.sh b/ci.sh index 1b33564f..d41b3aa8 100755 --- a/ci.sh +++ b/ci.sh @@ -2,6 +2,8 @@ set -euxo pipefail +export DEFMT_LOG=trace + # build examples #================== From 0c8e5f92c7ebe6fd148a986baaaa6ac746d939c2 Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Wed, 26 Apr 2023 18:10:39 +0200 Subject: [PATCH 106/130] Switch from probe-run to probe-rs-cli. --- README.md | 2 +- examples/rpi-pico-w/.cargo/config.toml | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/README.md b/README.md index d24ec82f..d0920aae 100644 --- a/README.md +++ b/README.md @@ -24,7 +24,7 @@ TODO: ## Running the example -- `cargo install probe-run` +- `cargo install probe-rs-cli` - `cd examples/rpi-pico-w` - `WIFI_NETWORK=MyWifiNetwork WIFI_PASSWORD=MyWifiPassword cargo run --release` diff --git a/examples/rpi-pico-w/.cargo/config.toml b/examples/rpi-pico-w/.cargo/config.toml index 6183e70f..f1ed8af9 100644 --- a/examples/rpi-pico-w/.cargo/config.toml +++ b/examples/rpi-pico-w/.cargo/config.toml @@ -1,5 +1,5 @@ [target.'cfg(all(target_arch = "arm", target_os = "none"))'] -runner = "probe-run --chip RP2040" +runner = "probe-rs-cli run --chip RP2040" [build] target = "thumbv6m-none-eabi" From 4d551a586589b9fd8b5f92d2f98b90be4144154e Mon Sep 17 00:00:00 2001 From: kalkyl Date: Thu, 27 Apr 2023 19:37:19 +0200 Subject: [PATCH 107/130] Update embassy --- Cargo.toml | 12 ++++++------ cyw43-pio/Cargo.toml | 2 +- examples/rpi-pico-w/Cargo.toml | 18 +++++++++--------- rust-toolchain.toml | 2 +- src/ioctl.rs | 10 +++++++++- 5 files changed, 26 insertions(+), 18 deletions(-) diff --git a/Cargo.toml b/Cargo.toml index 4ea5d8b6..c4872f42 100644 --- a/Cargo.toml +++ b/Cargo.toml @@ -20,7 +20,7 @@ atomic-polyfill = "0.1.5" defmt = { version = "0.3", optional = true } log = { version = "0.4.17", optional = true } -cortex-m = "0.7.3" +cortex-m = "0.7.6" cortex-m-rt = "0.7.0" futures = { version = "0.3.17", default-features = false, features = ["async-await", "cfg-target-has-atomic", "unstable"] } @@ -28,11 +28,11 @@ embedded-hal-1 = { package = "embedded-hal", version = "1.0.0-alpha.10" } num_enum = { version = "0.5.7", default-features = false } [patch.crates-io] -embassy-time = { git = "https://github.com/embassy-rs/embassy", rev = "047ea9066f0d946fd4d706577b21df38fd3b1647" } -embassy-futures = { git = "https://github.com/embassy-rs/embassy", rev = "047ea9066f0d946fd4d706577b21df38fd3b1647" } -embassy-sync = { git = "https://github.com/embassy-rs/embassy", rev = "047ea9066f0d946fd4d706577b21df38fd3b1647" } -embassy-net-driver-channel = { git = "https://github.com/embassy-rs/embassy", rev = "047ea9066f0d946fd4d706577b21df38fd3b1647" } -embassy-rp = { git = "https://github.com/embassy-rs/embassy", rev = "047ea9066f0d946fd4d706577b21df38fd3b1647" } +embassy-time = { git = "https://github.com/embassy-rs/embassy", rev = "03d6363d5af5dcaf21b52734994a466ca593d2b6" } +embassy-futures = { git = "https://github.com/embassy-rs/embassy", rev = "03d6363d5af5dcaf21b52734994a466ca593d2b6" } +embassy-sync = { git = "https://github.com/embassy-rs/embassy", rev = "03d6363d5af5dcaf21b52734994a466ca593d2b6" } +embassy-net-driver-channel = { git = "https://github.com/embassy-rs/embassy", rev = "03d6363d5af5dcaf21b52734994a466ca593d2b6" } +embassy-rp = { git = "https://github.com/embassy-rs/embassy", rev = "03d6363d5af5dcaf21b52734994a466ca593d2b6" } [workspace] members = ["cyw43-pio"] diff --git a/cyw43-pio/Cargo.toml b/cyw43-pio/Cargo.toml index 2fc6b759..4ca227d3 100644 --- a/cyw43-pio/Cargo.toml +++ b/cyw43-pio/Cargo.toml @@ -7,7 +7,7 @@ edition = "2021" [dependencies] cyw43 = { path = "../" } -embassy-rp = { version = "0.1.0", features = ["defmt", "unstable-traits", "nightly", "unstable-pac", "time-driver", "pio"] } +embassy-rp = { version = "0.1.0", features = ["defmt", "unstable-traits", "nightly", "unstable-pac", "time-driver"] } pio-proc = "0.2" pio = "0.2.1" defmt = "0.3" \ No newline at end of file diff --git a/examples/rpi-pico-w/Cargo.toml b/examples/rpi-pico-w/Cargo.toml index dca796e3..970db089 100644 --- a/examples/rpi-pico-w/Cargo.toml +++ b/examples/rpi-pico-w/Cargo.toml @@ -9,7 +9,7 @@ cyw43 = { path = "../../", features = ["defmt", "firmware-logs"] } cyw43-pio = { path = "../../cyw43-pio" } embassy-executor = { version = "0.1.0", features = ["defmt", "integrated-timers", "executor-thread", "arch-cortex-m"] } embassy-time = { version = "0.1.0", features = ["defmt", "defmt-timestamp-uptime"] } -embassy-rp = { version = "0.1.0", features = ["defmt", "unstable-traits", "nightly", "unstable-pac", "time-driver", "pio"] } +embassy-rp = { version = "0.1.0", features = ["defmt", "unstable-traits", "nightly", "unstable-pac", "time-driver"] } embassy-net = { version = "0.1.0", features = ["defmt", "tcp", "dhcpv4", "medium-ethernet", "unstable-traits", "nightly"] } atomic-polyfill = "0.1.5" static_cell = "1.0" @@ -27,14 +27,14 @@ heapless = "0.7.15" [patch.crates-io] -embassy-executor = { git = "https://github.com/embassy-rs/embassy", rev = "047ea9066f0d946fd4d706577b21df38fd3b1647" } -embassy-time = { git = "https://github.com/embassy-rs/embassy", rev = "047ea9066f0d946fd4d706577b21df38fd3b1647" } -embassy-futures = { git = "https://github.com/embassy-rs/embassy", rev = "047ea9066f0d946fd4d706577b21df38fd3b1647" } -embassy-sync = { git = "https://github.com/embassy-rs/embassy", rev = "047ea9066f0d946fd4d706577b21df38fd3b1647" } -embassy-rp = { git = "https://github.com/embassy-rs/embassy", rev = "047ea9066f0d946fd4d706577b21df38fd3b1647" } -embassy-net = { git = "https://github.com/embassy-rs/embassy", rev = "047ea9066f0d946fd4d706577b21df38fd3b1647" } -embassy-net-driver = { git = "https://github.com/embassy-rs/embassy", rev = "047ea9066f0d946fd4d706577b21df38fd3b1647" } -embassy-net-driver-channel = { git = "https://github.com/embassy-rs/embassy", rev = "047ea9066f0d946fd4d706577b21df38fd3b1647" } +embassy-executor = { git = "https://github.com/embassy-rs/embassy", rev = "03d6363d5af5dcaf21b52734994a466ca593d2b6" } +embassy-time = { git = "https://github.com/embassy-rs/embassy", rev = "03d6363d5af5dcaf21b52734994a466ca593d2b6" } +embassy-futures = { git = "https://github.com/embassy-rs/embassy", rev = "03d6363d5af5dcaf21b52734994a466ca593d2b6" } +embassy-sync = { git = "https://github.com/embassy-rs/embassy", rev = "03d6363d5af5dcaf21b52734994a466ca593d2b6" } +embassy-rp = { git = "https://github.com/embassy-rs/embassy", rev = "03d6363d5af5dcaf21b52734994a466ca593d2b6" } +embassy-net = { git = "https://github.com/embassy-rs/embassy", rev = "03d6363d5af5dcaf21b52734994a466ca593d2b6" } +embassy-net-driver = { git = "https://github.com/embassy-rs/embassy", rev = "03d6363d5af5dcaf21b52734994a466ca593d2b6" } +embassy-net-driver-channel = { git = "https://github.com/embassy-rs/embassy", rev = "03d6363d5af5dcaf21b52734994a466ca593d2b6" } [profile.dev] debug = 2 diff --git a/rust-toolchain.toml b/rust-toolchain.toml index 88519979..2582e88f 100644 --- a/rust-toolchain.toml +++ b/rust-toolchain.toml @@ -1,7 +1,7 @@ # Before upgrading check that everything is available on all tier1 targets here: # https://rust-lang.github.io/rustup-components-history [toolchain] -channel = "nightly-2023-04-02" +channel = "nightly-2023-04-18" components = [ "rust-src", "rustfmt" ] targets = [ "thumbv6m-none-eabi", diff --git a/src/ioctl.rs b/src/ioctl.rs index 89b20a2d..0fee1ad1 100644 --- a/src/ioctl.rs +++ b/src/ioctl.rs @@ -25,12 +25,20 @@ enum IoctlStateInner { Done { resp_len: usize }, } -#[derive(Default)] struct Wakers { control: WakerRegistration, runner: WakerRegistration, } +impl Default for Wakers { + fn default() -> Self { + Self { + control: WakerRegistration::new(), + runner: WakerRegistration::new(), + } + } +} + pub struct IoctlState { state: Cell, wakers: RefCell, From 2c5d94493c25792435102680fe8e659cc7dad9df Mon Sep 17 00:00:00 2001 From: kbleeke Date: Thu, 30 Mar 2023 17:05:29 +0200 Subject: [PATCH 108/130] wifi scan ioctl --- examples/rpi-pico-w/src/main.rs | 1 - src/control.rs | 67 +++++++++++++++++++++++++-- src/events.rs | 11 +++-- src/lib.rs | 1 + src/runner.rs | 14 +++++- src/structs.rs | 81 +++++++++++++++++++++++++++++++++ 6 files changed, 165 insertions(+), 10 deletions(-) diff --git a/examples/rpi-pico-w/src/main.rs b/examples/rpi-pico-w/src/main.rs index d075aec2..944beaac 100644 --- a/examples/rpi-pico-w/src/main.rs +++ b/examples/rpi-pico-w/src/main.rs @@ -143,4 +143,3 @@ async fn main(spawner: Spawner) { } } } - diff --git a/src/control.rs b/src/control.rs index 0c06009b..bcb44937 100644 --- a/src/control.rs +++ b/src/control.rs @@ -6,11 +6,11 @@ use embassy_time::{Duration, Timer}; pub use crate::bus::SpiBusCyw43; use crate::consts::*; -use crate::events::{Event, Events}; +use crate::events::{Event, EventSubscriber, Events}; use crate::fmt::Bytes; use crate::ioctl::{IoctlState, IoctlType}; use crate::structs::*; -use crate::{countries, PowerManagementMode}; +use crate::{countries, events, PowerManagementMode}; pub struct Control<'a> { state_ch: ch::StateRunner<'a>, @@ -245,9 +245,13 @@ impl<'a> Control<'a> { } async fn set_iovar(&mut self, name: &str, val: &[u8]) { + self.set_iovar_v::<64>(name, val).await + } + + async fn set_iovar_v(&mut self, name: &str, val: &[u8]) { info!("set {} = {:02x}", name, Bytes(val)); - let mut buf = [0; 64]; + let mut buf = [0; BUFSIZE]; buf[..name.len()].copy_from_slice(name.as_bytes()); buf[name.len()] = 0; buf[name.len() + 1..][..val.len()].copy_from_slice(val); @@ -304,4 +308,61 @@ impl<'a> Control<'a> { resp_len } + + pub async fn scan(&mut self) -> Scanner<'_> { + const SCANTYPE_PASSIVE: u8 = 1; + + let scan_params = ScanParams { + version: 1, + action: 1, + sync_id: 1, + ssid_len: 0, + ssid: [0; 32], + bssid: [0xff; 6], + bss_type: 2, + scan_type: SCANTYPE_PASSIVE, + nprobes: !0, + active_time: !0, + passive_time: !0, + home_time: !0, + channel_num: 0, + channel_list: [0; 1], + }; + + self.events.mask.enable(&[Event::ESCAN_RESULT]); + let subscriber = self.events.queue.subscriber().unwrap(); + self.set_iovar_v::<256>("escan", &scan_params.to_bytes()).await; + + Scanner { + subscriber, + events: &self.events, + } + } +} + +pub struct Scanner<'a> { + subscriber: EventSubscriber<'a>, + events: &'a Events, +} + +impl Scanner<'_> { + pub async fn next(&mut self) -> Option { + let event = self.subscriber.next_message_pure().await; + if event.header.status != EStatus::PARTIAL { + self.events.mask.disable_all(); + return None; + } + + if let events::Payload::BssInfo(bss) = event.payload { + Some(bss) + } else { + None + } + } +} + +impl Drop for Scanner<'_> { + fn drop(&mut self) { + self.events.mask.disable_all(); + } } diff --git a/src/events.rs b/src/events.rs index d6f114ed..a94c49a0 100644 --- a/src/events.rs +++ b/src/events.rs @@ -1,10 +1,12 @@ -#![allow(unused)] +#![allow(dead_code)] #![allow(non_camel_case_types)] use core::cell::RefCell; use embassy_sync::blocking_mutex::raw::NoopRawMutex; -use embassy_sync::pubsub::{PubSubChannel, Publisher, Subscriber}; +use embassy_sync::pubsub::{PubSubChannel, Subscriber}; + +use crate::structs::BssInfo; #[derive(Debug, Clone, Copy, PartialEq, Eq, num_enum::FromPrimitive)] #[cfg_attr(feature = "defmt", derive(defmt::Format))] @@ -286,7 +288,6 @@ pub enum Event { // TODO this PubSub can probably be replaced with shared memory to make it a bit more efficient. pub type EventQueue = PubSubChannel; -pub type EventPublisher<'a> = Publisher<'a, NoopRawMutex, Message, 2, 1, 1>; pub type EventSubscriber<'a> = Subscriber<'a, NoopRawMutex, Message, 2, 1, 1>; pub struct Events { @@ -313,6 +314,7 @@ pub struct Status { #[derive(Clone, Copy)] pub enum Payload { None, + BssInfo(BssInfo), } #[derive(Clone, Copy)] @@ -344,7 +346,7 @@ impl EventMask { let word = n / u32::BITS; let bit = n % u32::BITS; - self.mask[word as usize] |= (1 << bit); + self.mask[word as usize] |= 1 << bit; } fn disable(&mut self, event: Event) { @@ -378,6 +380,7 @@ impl SharedEventMask { } } + #[allow(dead_code)] pub fn disable(&self, events: &[Event]) { let mut mask = self.mask.borrow_mut(); for event in events { diff --git a/src/lib.rs b/src/lib.rs index f9244bdd..d437a882 100644 --- a/src/lib.rs +++ b/src/lib.rs @@ -29,6 +29,7 @@ use crate::bus::Bus; pub use crate::bus::SpiBusCyw43; pub use crate::control::Control; pub use crate::runner::Runner; +pub use crate::structs::BssInfo; const MTU: usize = 1514; diff --git a/src/runner.rs b/src/runner.rs index 806ddfc4..9b99e174 100644 --- a/src/runner.rs +++ b/src/runner.rs @@ -7,7 +7,7 @@ use embedded_hal_1::digital::OutputPin; use crate::bus::Bus; pub use crate::bus::SpiBusCyw43; use crate::consts::*; -use crate::events::{Events, Status}; +use crate::events::{Event, Events, Status}; use crate::fmt::Bytes; use crate::ioctl::{IoctlState, IoctlType, PendingIoctl}; use crate::nvram::NVRAM; @@ -351,6 +351,8 @@ where panic!("IOCTL error {}", cdc_header.status as i32); } + info!("IOCTL Response: {:02x}", Bytes(response)); + self.ioctl_state.ioctl_done(response); } } @@ -404,7 +406,15 @@ where if self.events.mask.is_enabled(evt_type) { let status = event_packet.msg.status; - let event_payload = events::Payload::None; + let event_payload = match evt_type { + Event::ESCAN_RESULT if status == EStatus::PARTIAL => { + let Some((_, bss_info)) = ScanResults::parse(evt_data) else { return }; + let Some(bss_info) = BssInfo::parse(bss_info) else { return }; + events::Payload::BssInfo(*bss_info) + } + Event::ESCAN_RESULT => events::Payload::None, + _ => events::Payload::None, + }; // this intentionally uses the non-blocking publish immediate // publish() is a deadlock risk in the current design as awaiting here prevents ioctls diff --git a/src/structs.rs b/src/structs.rs index f54ec7fc..d01d5a65 100644 --- a/src/structs.rs +++ b/src/structs.rs @@ -404,3 +404,84 @@ impl EventMask { self.events[evt / 8] &= !(1 << (evt % 8)); } } + +/// Parameters for a wifi scan +#[derive(Clone, Copy)] +#[cfg_attr(feature = "defmt", derive(defmt::Format))] +#[repr(C)] +pub struct ScanParams { + pub version: u32, + pub action: u16, + pub sync_id: u16, + pub ssid_len: u32, + pub ssid: [u8; 32], + pub bssid: [u8; 6], + pub bss_type: u8, + pub scan_type: u8, + pub nprobes: u32, + pub active_time: u32, + pub passive_time: u32, + pub home_time: u32, + pub channel_num: u32, + pub channel_list: [u16; 1], +} +impl_bytes!(ScanParams); + +/// Wifi Scan Results Header, followed by `bss_count` `BssInfo` +#[derive(Clone, Copy)] +// #[cfg_attr(feature = "defmt", derive(defmt::Format))] +#[repr(C, packed(2))] +pub struct ScanResults { + pub buflen: u32, + pub version: u32, + pub sync_id: u16, + pub bss_count: u16, +} +impl_bytes!(ScanResults); + +impl ScanResults { + pub fn parse(packet: &mut [u8]) -> Option<(&mut ScanResults, &mut [u8])> { + if packet.len() < ScanResults::SIZE { + return None; + } + + let (scan_results, bssinfo) = packet.split_at_mut(ScanResults::SIZE); + let scan_results = ScanResults::from_bytes_mut(scan_results.try_into().unwrap()); + + if scan_results.bss_count > 0 && bssinfo.len() < BssInfo::SIZE { + warn!("Scan result, incomplete BssInfo"); + return None; + } + + Some((scan_results, bssinfo)) + } +} + +/// Wifi Scan Result +#[derive(Clone, Copy)] +// #[cfg_attr(feature = "defmt", derive(defmt::Format))] +#[repr(C, packed(2))] +#[non_exhaustive] +pub struct BssInfo { + pub version: u32, + pub length: u32, + pub bssid: [u8; 6], + pub beacon_period: u16, + pub capability: u16, + pub ssid_len: u8, + pub ssid: [u8; 32], + // there will be more stuff here +} +impl_bytes!(BssInfo); + +impl BssInfo { + pub fn parse(packet: &mut [u8]) -> Option<&mut Self> { + if packet.len() < BssInfo::SIZE { + return None; + } + + Some(BssInfo::from_bytes_mut( + packet[..BssInfo::SIZE].as_mut().try_into().unwrap(), + )) + } +} From 76b967a966677e570cc0a2942ed3ccd29b2d1017 Mon Sep 17 00:00:00 2001 From: kbleeke Date: Fri, 28 Apr 2023 21:17:13 +0200 Subject: [PATCH 109/130] comment wifi scanning items --- src/control.rs | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/src/control.rs b/src/control.rs index bcb44937..934bade2 100644 --- a/src/control.rs +++ b/src/control.rs @@ -309,6 +309,13 @@ impl<'a> Control<'a> { resp_len } + /// Start a wifi scan + /// + /// Returns a `Stream` of networks found by the device + /// + /// # Note + /// Device events are currently implemented using a bounded queue. + /// To not miss any events, you should make sure to always await the stream. pub async fn scan(&mut self) -> Scanner<'_> { const SCANTYPE_PASSIVE: u8 = 1; @@ -346,6 +353,7 @@ pub struct Scanner<'a> { } impl Scanner<'_> { + /// wait for the next found network pub async fn next(&mut self) -> Option { let event = self.subscriber.next_message_pure().await; if event.header.status != EStatus::PARTIAL { From 099ec7443bed2183397005b4e8ebfcd2492e2b4c Mon Sep 17 00:00:00 2001 From: Satoshi Tanaka Date: Mon, 1 May 2023 04:30:21 +0900 Subject: [PATCH 110/130] Add AP mode (unencrypted) --- src/consts.rs | 3 +++ src/control.rs | 37 +++++++++++++++++++++++++++++++++++++ src/structs.rs | 9 +++++++++ 3 files changed, 49 insertions(+) diff --git a/src/consts.rs b/src/consts.rs index 18502bd1..ade3cb2c 100644 --- a/src/consts.rs +++ b/src/consts.rs @@ -93,8 +93,11 @@ pub(crate) const IRQ_F2_INTR: u16 = 0x4000; pub(crate) const IRQ_F3_INTR: u16 = 0x8000; pub(crate) const IOCTL_CMD_UP: u32 = 2; +pub(crate) const IOCTL_CMD_DOWN: u32 = 3; pub(crate) const IOCTL_CMD_SET_SSID: u32 = 26; +pub(crate) const IOCTL_CMD_SET_CHANNEL: u32 = 30; pub(crate) const IOCTL_CMD_ANTDIV: u32 = 64; +pub(crate) const IOCTL_CMD_SET_AP: u32 = 118; pub(crate) const IOCTL_CMD_SET_VAR: u32 = 263; pub(crate) const IOCTL_CMD_GET_VAR: u32 = 262; pub(crate) const IOCTL_CMD_SET_PASSPHRASE: u32 = 268; diff --git a/src/control.rs b/src/control.rs index 934bade2..44024649 100644 --- a/src/control.rs +++ b/src/control.rs @@ -226,6 +226,43 @@ impl<'a> Control<'a> { .await } + pub async fn start_ap_open(&mut self, ssid: &str, channel: u8) { + // Temporarily set wifi down + self.ioctl(IoctlType::Set, IOCTL_CMD_DOWN, 0, &mut []).await; + + // Turn off APSTA mode + self.set_iovar_u32("apsta", 0).await; + + // Set wifi up again + self.ioctl(IoctlType::Set, IOCTL_CMD_UP, 0, &mut []).await; + + // Turn on AP mode + self.ioctl_set_u32(IOCTL_CMD_SET_AP, 0, 1).await; + + // Set SSID + let mut i = SsidInfoWithIndex { + index: 0, + ssid_info: SsidInfo { + len: ssid.as_bytes().len() as _, + ssid: [0; 32], + }, + }; + i.ssid_info.ssid[..ssid.as_bytes().len()].copy_from_slice(ssid.as_bytes()); + self.set_iovar("bsscfg:ssid", &i.to_bytes()).await; + + // Set channel number + self.ioctl_set_u32(IOCTL_CMD_SET_CHANNEL, 0, channel as u32).await; + + // Set security + self.set_iovar_u32x2("bsscfg:wsec", 0, 0).await; // wsec = open + + // Change mutlicast rate from 1 Mbps to 11 Mbps + self.set_iovar_u32("2g_mrate", 11000000 / 500000).await; + + // Start AP + self.set_iovar_u32x2("bss", 0, 1).await; // bss = BSS_UP + } + async fn set_iovar_u32x2(&mut self, name: &str, val1: u32, val2: u32) { let mut buf = [0; 8]; buf[0..4].copy_from_slice(&val1.to_le_bytes()); diff --git a/src/structs.rs b/src/structs.rs index d01d5a65..3b646e1a 100644 --- a/src/structs.rs +++ b/src/structs.rs @@ -389,6 +389,15 @@ pub struct PassphraseInfo { } impl_bytes!(PassphraseInfo); +#[derive(Clone, Copy)] +#[cfg_attr(feature = "defmt", derive(defmt::Format))] +#[repr(C)] +pub struct SsidInfoWithIndex { + pub index: u32, + pub ssid_info: SsidInfo, +} +impl_bytes!(SsidInfoWithIndex); + #[derive(Clone, Copy)] #[cfg_attr(feature = "defmt", derive(defmt::Format))] #[repr(C)] From af368676ef50317c1b97b5f2134dd86503b01124 Mon Sep 17 00:00:00 2001 From: Daniel Larsen <44644910+daniel-larsen@users.noreply.github.com> Date: Sun, 30 Apr 2023 18:02:44 -0300 Subject: [PATCH 111/130] Removed defmt --- cyw43-pio/Cargo.toml | 5 +++-- cyw43-pio/src/lib.rs | 4 ++-- 2 files changed, 5 insertions(+), 4 deletions(-) diff --git a/cyw43-pio/Cargo.toml b/cyw43-pio/Cargo.toml index 4ca227d3..dbb94f61 100644 --- a/cyw43-pio/Cargo.toml +++ b/cyw43-pio/Cargo.toml @@ -7,7 +7,8 @@ edition = "2021" [dependencies] cyw43 = { path = "../" } -embassy-rp = { version = "0.1.0", features = ["defmt", "unstable-traits", "nightly", "unstable-pac", "time-driver"] } +embassy-rp = { version = "0.1.0", features = ["unstable-traits", "nightly", "unstable-pac", "time-driver"] } +# embassy-rp = { version = "0.1.0", features = ["defmt", "unstable-traits", "nightly", "unstable-pac", "time-driver"] } pio-proc = "0.2" pio = "0.2.1" -defmt = "0.3" \ No newline at end of file +# defmt = "0.3" \ No newline at end of file diff --git a/cyw43-pio/src/lib.rs b/cyw43-pio/src/lib.rs index 9c425cba..f67a55a0 100644 --- a/cyw43-pio/src/lib.rs +++ b/cyw43-pio/src/lib.rs @@ -129,7 +129,7 @@ where let write_bits = write.len() * 32 - 1; let read_bits = 31; - defmt::trace!("write={} read={}", write_bits, read_bits); + // defmt::trace!("write={} read={}", write_bits, read_bits); let mut dma = Peripheral::into_ref(&mut self.dma); pio_instr_util::set_x(&mut self.sm, write_bits as u32); @@ -151,7 +151,7 @@ where let write_bits = 31; let read_bits = read.len() * 32 + 32 - 1; - defmt::trace!("write={} read={}", write_bits, read_bits); + // defmt::trace!("write={} read={}", write_bits, read_bits); let mut dma = Peripheral::into_ref(&mut self.dma); pio_instr_util::set_y(&mut self.sm, read_bits as u32); From a186694fddd00beb4c3b45349cd79ca1959b4d17 Mon Sep 17 00:00:00 2001 From: Satoshi Tanaka Date: Mon, 1 May 2023 06:54:26 +0900 Subject: [PATCH 112/130] Implement WPA2 AP mode --- src/consts.rs | 15 +++++++++++++++ src/control.rs | 32 +++++++++++++++++++++++++++++++- 2 files changed, 46 insertions(+), 1 deletion(-) diff --git a/src/consts.rs b/src/consts.rs index ade3cb2c..1f655158 100644 --- a/src/consts.rs +++ b/src/consts.rs @@ -112,6 +112,21 @@ pub(crate) const READ: bool = false; pub(crate) const INC_ADDR: bool = true; pub(crate) const FIXED_ADDR: bool = false; +pub(crate) const AES_ENABLED: u32 = 0x0004; +pub(crate) const WPA2_SECURITY: u32 = 0x00400000; + +pub(crate) const MIN_PSK_LEN: usize = 8; +pub(crate) const MAX_PSK_LEN: usize = 64; + +// Security type (authentication and encryption types are combined using bit mask) +#[allow(non_camel_case_types)] +#[derive(Copy, Clone, PartialEq)] +#[repr(u32)] +pub(crate) enum Security { + OPEN = 0, + WPA2_AES_PSK = WPA2_SECURITY | AES_ENABLED, +} + #[allow(non_camel_case_types)] #[derive(Copy, Clone)] #[repr(u8)] diff --git a/src/control.rs b/src/control.rs index 44024649..e1ad06e6 100644 --- a/src/control.rs +++ b/src/control.rs @@ -227,6 +227,20 @@ impl<'a> Control<'a> { } pub async fn start_ap_open(&mut self, ssid: &str, channel: u8) { + self.start_ap(ssid, "", Security::OPEN, channel).await; + } + + pub async fn start_ap_wpa2(&mut self, ssid: &str, passphrase: &str, channel: u8) { + self.start_ap(ssid, passphrase, Security::WPA2_AES_PSK, channel).await; + } + + async fn start_ap(&mut self, ssid: &str, passphrase: &str, security: Security, channel: u8) { + if security != Security::OPEN + && (passphrase.as_bytes().len() < MIN_PSK_LEN || passphrase.as_bytes().len() > MAX_PSK_LEN) + { + panic!("Passphrase is too short or too long"); + } + // Temporarily set wifi down self.ioctl(IoctlType::Set, IOCTL_CMD_DOWN, 0, &mut []).await; @@ -254,7 +268,23 @@ impl<'a> Control<'a> { self.ioctl_set_u32(IOCTL_CMD_SET_CHANNEL, 0, channel as u32).await; // Set security - self.set_iovar_u32x2("bsscfg:wsec", 0, 0).await; // wsec = open + self.set_iovar_u32x2("bsscfg:wsec", 0, (security as u32) & 0xFF).await; + + if security != Security::OPEN { + self.set_iovar_u32x2("bsscfg:wpa_auth", 0, 0x0084).await; // wpa_auth = WPA2_AUTH_PSK | WPA_AUTH_PSK + + Timer::after(Duration::from_millis(100)).await; + + // Set passphrase + let mut pfi = PassphraseInfo { + len: passphrase.as_bytes().len() as _, + flags: 1, // WSEC_PASSPHRASE + passphrase: [0; 64], + }; + pfi.passphrase[..passphrase.as_bytes().len()].copy_from_slice(passphrase.as_bytes()); + self.ioctl(IoctlType::Set, IOCTL_CMD_SET_PASSPHRASE, 0, &mut pfi.to_bytes()) + .await; + } // Change mutlicast rate from 1 Mbps to 11 Mbps self.set_iovar_u32("2g_mrate", 11000000 / 500000).await; From c70a66fe815cc3926a0b8ae73066a8ed2c1583e1 Mon Sep 17 00:00:00 2001 From: Daniel Larsen <44644910+daniel-larsen@users.noreply.github.com> Date: Sun, 30 Apr 2023 18:55:19 -0300 Subject: [PATCH 113/130] Make defmt optional --- cyw43-pio/Cargo.toml | 3 +-- cyw43-pio/src/lib.rs | 6 ++++-- 2 files changed, 5 insertions(+), 4 deletions(-) diff --git a/cyw43-pio/Cargo.toml b/cyw43-pio/Cargo.toml index dbb94f61..c5632d5f 100644 --- a/cyw43-pio/Cargo.toml +++ b/cyw43-pio/Cargo.toml @@ -8,7 +8,6 @@ edition = "2021" [dependencies] cyw43 = { path = "../" } embassy-rp = { version = "0.1.0", features = ["unstable-traits", "nightly", "unstable-pac", "time-driver"] } -# embassy-rp = { version = "0.1.0", features = ["defmt", "unstable-traits", "nightly", "unstable-pac", "time-driver"] } pio-proc = "0.2" pio = "0.2.1" -# defmt = "0.3" \ No newline at end of file +defmt = { version = "0.3", optional = true } \ No newline at end of file diff --git a/cyw43-pio/src/lib.rs b/cyw43-pio/src/lib.rs index f67a55a0..c468435f 100644 --- a/cyw43-pio/src/lib.rs +++ b/cyw43-pio/src/lib.rs @@ -129,7 +129,8 @@ where let write_bits = write.len() * 32 - 1; let read_bits = 31; - // defmt::trace!("write={} read={}", write_bits, read_bits); + #[cfg(feature = "defmt")] + defmt::trace!("write={} read={}", write_bits, read_bits); let mut dma = Peripheral::into_ref(&mut self.dma); pio_instr_util::set_x(&mut self.sm, write_bits as u32); @@ -151,7 +152,8 @@ where let write_bits = 31; let read_bits = read.len() * 32 + 32 - 1; - // defmt::trace!("write={} read={}", write_bits, read_bits); + #[cfg(feature = "defmt")] + defmt::trace!("write={} read={}", write_bits, read_bits); let mut dma = Peripheral::into_ref(&mut self.dma); pio_instr_util::set_y(&mut self.sm, read_bits as u32); From bc34f3c60f83d4f1762864e3a070a501a94fc4e2 Mon Sep 17 00:00:00 2001 From: Daniel Larsen <44644910+daniel-larsen@users.noreply.github.com> Date: Sun, 30 Apr 2023 23:19:53 -0300 Subject: [PATCH 114/130] updated example --- examples/rpi-pico-w/Cargo.toml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/examples/rpi-pico-w/Cargo.toml b/examples/rpi-pico-w/Cargo.toml index 970db089..8df65e18 100644 --- a/examples/rpi-pico-w/Cargo.toml +++ b/examples/rpi-pico-w/Cargo.toml @@ -6,7 +6,7 @@ edition = "2021" [dependencies] cyw43 = { path = "../../", features = ["defmt", "firmware-logs"] } -cyw43-pio = { path = "../../cyw43-pio" } +cyw43-pio = { path = "../../cyw43-pio", features = ["defmt"] } embassy-executor = { version = "0.1.0", features = ["defmt", "integrated-timers", "executor-thread", "arch-cortex-m"] } embassy-time = { version = "0.1.0", features = ["defmt", "defmt-timestamp-uptime"] } embassy-rp = { version = "0.1.0", features = ["defmt", "unstable-traits", "nightly", "unstable-pac", "time-driver"] } From b612976cc7e9fcce7b547b348adaaabe73c487d0 Mon Sep 17 00:00:00 2001 From: kbleeke Date: Fri, 28 Apr 2023 20:53:09 +0200 Subject: [PATCH 115/130] add wifi scan example --- .../src/{main.rs => bin/tcp_server.rs} | 5 +- examples/rpi-pico-w/src/bin/wifi_scan.rs | 81 +++++++++++++++++++ 2 files changed, 83 insertions(+), 3 deletions(-) rename examples/rpi-pico-w/src/{main.rs => bin/tcp_server.rs} (95%) create mode 100644 examples/rpi-pico-w/src/bin/wifi_scan.rs diff --git a/examples/rpi-pico-w/src/main.rs b/examples/rpi-pico-w/src/bin/tcp_server.rs similarity index 95% rename from examples/rpi-pico-w/src/main.rs rename to examples/rpi-pico-w/src/bin/tcp_server.rs index 944beaac..036f7930 100644 --- a/examples/rpi-pico-w/src/main.rs +++ b/examples/rpi-pico-w/src/bin/tcp_server.rs @@ -48,9 +48,8 @@ async fn main(spawner: Spawner) { let p = embassy_rp::init(Default::default()); - // Include the WiFi firmware and Country Locale Matrix (CLM) blobs. - let fw = include_bytes!("../../../firmware/43439A0.bin"); - let clm = include_bytes!("../../../firmware/43439A0_clm.bin"); + let fw = include_bytes!("../../../../firmware/43439A0.bin"); + let clm = include_bytes!("../../../../firmware/43439A0_clm.bin"); // To make flashing faster for development, you may want to flash the firmwares independently // at hardcoded addresses, instead of baking them into the program with `include_bytes!`: diff --git a/examples/rpi-pico-w/src/bin/wifi_scan.rs b/examples/rpi-pico-w/src/bin/wifi_scan.rs new file mode 100644 index 00000000..da8fadfd --- /dev/null +++ b/examples/rpi-pico-w/src/bin/wifi_scan.rs @@ -0,0 +1,81 @@ +#![no_std] +#![no_main] +#![feature(type_alias_impl_trait)] +#![feature(async_fn_in_trait)] +#![allow(incomplete_features)] + +use core::str; + +use cyw43_pio::PioSpi; +use defmt::*; +use embassy_executor::Spawner; +use embassy_net::Stack; +use embassy_rp::gpio::{Level, Output}; +use embassy_rp::peripherals::{DMA_CH0, PIN_23, PIN_25}; +use embassy_rp::pio::{Pio0, PioPeripheral, PioStateMachineInstance, Sm0}; +use static_cell::StaticCell; +use {defmt_rtt as _, panic_probe as _}; + +macro_rules! singleton { + ($val:expr) => {{ + type T = impl Sized; + static STATIC_CELL: StaticCell = StaticCell::new(); + STATIC_CELL.init_with(move || $val) + }}; +} + +#[embassy_executor::task] +async fn wifi_task( + runner: cyw43::Runner< + 'static, + Output<'static, PIN_23>, + PioSpi, DMA_CH0>, + >, +) -> ! { + runner.run().await +} + +#[embassy_executor::task] +async fn net_task(stack: &'static Stack>) -> ! { + stack.run().await +} + +#[embassy_executor::main] +async fn main(spawner: Spawner) { + info!("Hello World!"); + + let p = embassy_rp::init(Default::default()); + + let fw = include_bytes!("../../../../firmware/43439A0.bin"); + let clm = include_bytes!("../../../../firmware/43439A0_clm.bin"); + + // To make flashing faster for development, you may want to flash the firmwares independently + // at hardcoded addresses, instead of baking them into the program with `include_bytes!`: + // probe-rs-cli download 43439A0.bin --format bin --chip RP2040 --base-address 0x10100000 + // probe-rs-cli download 43439A0_clm.bin --format bin --chip RP2040 --base-address 0x10140000 + //let fw = unsafe { core::slice::from_raw_parts(0x10100000 as *const u8, 224190) }; + //let clm = unsafe { core::slice::from_raw_parts(0x10140000 as *const u8, 4752) }; + + let pwr = Output::new(p.PIN_23, Level::Low); + let cs = Output::new(p.PIN_25, Level::High); + + let (_, sm, _, _, _) = p.PIO0.split(); + let dma = p.DMA_CH0; + let spi = PioSpi::new(sm, cs, p.PIN_24, p.PIN_29, dma); + + let state = singleton!(cyw43::State::new()); + let (_net_device, mut control, runner) = cyw43::new(state, pwr, spi, fw).await; + unwrap!(spawner.spawn(wifi_task(runner))); + + control.init(clm).await; + control + .set_power_management(cyw43::PowerManagementMode::PowerSave) + .await; + + let mut scanner = control.scan().await; + while let Some(bss) = scanner.next().await { + if let Ok(ssid_str) = str::from_utf8(&bss.ssid) { + info!("scanned {} == {:x}", ssid_str, bss.bssid); + } + } +} From 534cf7c618b0e93881b9757b5608a7ad67606fce Mon Sep 17 00:00:00 2001 From: Satoshi Tanaka Date: Tue, 2 May 2023 01:30:08 +0900 Subject: [PATCH 116/130] Add AP mode example --- examples/rpi-pico-w/src/bin/tcp_server_ap.rs | 144 +++++++++++++++++++ 1 file changed, 144 insertions(+) create mode 100644 examples/rpi-pico-w/src/bin/tcp_server_ap.rs diff --git a/examples/rpi-pico-w/src/bin/tcp_server_ap.rs b/examples/rpi-pico-w/src/bin/tcp_server_ap.rs new file mode 100644 index 00000000..e4341262 --- /dev/null +++ b/examples/rpi-pico-w/src/bin/tcp_server_ap.rs @@ -0,0 +1,144 @@ +#![no_std] +#![no_main] +#![feature(type_alias_impl_trait)] +#![feature(async_fn_in_trait)] +#![allow(incomplete_features)] + +use core::str::from_utf8; + +use cyw43_pio::PioSpi; +use defmt::*; +use embassy_executor::Spawner; +use embassy_net::tcp::TcpSocket; +use embassy_net::{Config, Stack, StackResources}; +use embassy_rp::gpio::{Level, Output}; +use embassy_rp::peripherals::{DMA_CH0, PIN_23, PIN_25}; +use embassy_rp::pio::{Pio0, PioPeripheral, PioStateMachineInstance, Sm0}; +use embedded_io::asynch::Write; +use static_cell::StaticCell; +use {defmt_rtt as _, panic_probe as _}; + +macro_rules! singleton { + ($val:expr) => {{ + type T = impl Sized; + static STATIC_CELL: StaticCell = StaticCell::new(); + STATIC_CELL.init_with(move || $val) + }}; +} + +#[embassy_executor::task] +async fn wifi_task( + runner: cyw43::Runner< + 'static, + Output<'static, PIN_23>, + PioSpi, DMA_CH0>, + >, +) -> ! { + runner.run().await +} + +#[embassy_executor::task] +async fn net_task(stack: &'static Stack>) -> ! { + stack.run().await +} + +#[embassy_executor::main] +async fn main(spawner: Spawner) { + info!("Hello World!"); + + let p = embassy_rp::init(Default::default()); + + let fw = include_bytes!("../../../../firmware/43439A0.bin"); + let clm = include_bytes!("../../../../firmware/43439A0_clm.bin"); + + // To make flashing faster for development, you may want to flash the firmwares independently + // at hardcoded addresses, instead of baking them into the program with `include_bytes!`: + // probe-rs-cli download 43439A0.bin --format bin --chip RP2040 --base-address 0x10100000 + // probe-rs-cli download 43439A0_clm.bin --format bin --chip RP2040 --base-address 0x10140000 + //let fw = unsafe { core::slice::from_raw_parts(0x10100000 as *const u8, 224190) }; + //let clm = unsafe { core::slice::from_raw_parts(0x10140000 as *const u8, 4752) }; + + let pwr = Output::new(p.PIN_23, Level::Low); + let cs = Output::new(p.PIN_25, Level::High); + + let (_, sm, _, _, _) = p.PIO0.split(); + let dma = p.DMA_CH0; + let spi = PioSpi::new(sm, cs, p.PIN_24, p.PIN_29, dma); + + let state = singleton!(cyw43::State::new()); + let (net_device, mut control, runner) = cyw43::new(state, pwr, spi, fw).await; + unwrap!(spawner.spawn(wifi_task(runner))); + + control.init(clm).await; + control + .set_power_management(cyw43::PowerManagementMode::PowerSave) + .await; + + // Use a link-local address for communication without DHCP server + let config = Config::Static(embassy_net::StaticConfig { + address: embassy_net::Ipv4Cidr::new(embassy_net::Ipv4Address::new(169, 254, 1, 1), 16), + dns_servers: heapless::Vec::new(), + gateway: None, + }); + + // Generate random seed + let seed = 0x0123_4567_89ab_cdef; // chosen by fair dice roll. guarenteed to be random. + + // Init network stack + let stack = &*singleton!(Stack::new( + net_device, + config, + singleton!(StackResources::<2>::new()), + seed + )); + + unwrap!(spawner.spawn(net_task(stack))); + + //control.start_ap_open("cyw43", 5).await; + control.start_ap_wpa2("cyw43", "password", 5).await; + + // And now we can use it! + + let mut rx_buffer = [0; 4096]; + let mut tx_buffer = [0; 4096]; + let mut buf = [0; 4096]; + + loop { + let mut socket = TcpSocket::new(stack, &mut rx_buffer, &mut tx_buffer); + socket.set_timeout(Some(embassy_net::SmolDuration::from_secs(10))); + + control.gpio_set(0, false).await; + info!("Listening on TCP:1234..."); + if let Err(e) = socket.accept(1234).await { + warn!("accept error: {:?}", e); + continue; + } + + info!("Received connection from {:?}", socket.remote_endpoint()); + control.gpio_set(0, true).await; + + loop { + let n = match socket.read(&mut buf).await { + Ok(0) => { + warn!("read EOF"); + break; + } + Ok(n) => n, + Err(e) => { + warn!("read error: {:?}", e); + break; + } + }; + + info!("rxd {}", from_utf8(&buf[..n]).unwrap()); + + match socket.write_all(&buf[..n]).await { + Ok(()) => {} + Err(e) => { + warn!("write error: {:?}", e); + break; + } + }; + } + } +} From 6ee45f5ec01208bdcb38f23bf46dcdac141ff6e7 Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Mon, 1 May 2023 18:47:09 +0200 Subject: [PATCH 117/130] Update README.md --- README.md | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/README.md b/README.md index d0920aae..fe8d5d93 100644 --- a/README.md +++ b/README.md @@ -7,6 +7,8 @@ WIP driver for the CYW43439 wifi chip, used in the Raspberry Pi Pico W. Implemen Working: - Station mode (joining an AP). +- AP mode (creating an AP) +- Scanning - Sending and receiving Ethernet frames. - Using the default MAC address. - [`embassy-net`](https://embassy.dev) integration. @@ -16,10 +18,7 @@ Working: TODO: -- AP mode (creating an AP) -- Scanning - Setting a custom MAC address. -- Investigate why can [this](https://github.com/raspberrypi/pico-sdk/tree/master/src/rp2_common/pico_cyw43_driver) use higher PIO speed. - Bus sleep (unclear what the benefit is. Is it needed for IRQs? or is it just power consumption optimization?) ## Running the example From 8dbe397f993cb3a9c330c3d6d5a90a8695d87c67 Mon Sep 17 00:00:00 2001 From: Kai Bleeke <39027073+kbleeke@users.noreply.github.com> Date: Wed, 3 May 2023 20:15:43 +0200 Subject: [PATCH 118/130] cleanup ioctl response logging --- src/ioctl.rs | 2 +- src/runner.rs | 2 -- 2 files changed, 1 insertion(+), 3 deletions(-) diff --git a/src/ioctl.rs b/src/ioctl.rs index 66c6a10e..61524c27 100644 --- a/src/ioctl.rs +++ b/src/ioctl.rs @@ -110,7 +110,7 @@ impl IoctlState { pub fn ioctl_done(&self, response: &[u8]) { if let IoctlStateInner::Sent { buf } = self.state.get() { - info!("IOCTL Response: {:02x}", Bytes(response)); + trace!("IOCTL Response: {:02x}", Bytes(response)); // TODO fix this (unsafe { &mut *buf }[..response.len()]).copy_from_slice(response); diff --git a/src/runner.rs b/src/runner.rs index 9b99e174..56b9a609 100644 --- a/src/runner.rs +++ b/src/runner.rs @@ -351,8 +351,6 @@ where panic!("IOCTL error {}", cdc_header.status as i32); } - info!("IOCTL Response: {:02x}", Bytes(response)); - self.ioctl_state.ioctl_done(response); } } From 0d8d8d3320ad44eda53d4ac793fb7c9fed03b63a Mon Sep 17 00:00:00 2001 From: kbleeke Date: Wed, 3 May 2023 21:49:35 +0200 Subject: [PATCH 119/130] simple error handling for join instead of looping internally --- examples/rpi-pico-w/src/bin/tcp_server.rs | 11 ++++- src/control.rs | 50 +++++++++++++++-------- src/lib.rs | 2 +- 3 files changed, 42 insertions(+), 21 deletions(-) diff --git a/examples/rpi-pico-w/src/bin/tcp_server.rs b/examples/rpi-pico-w/src/bin/tcp_server.rs index 036f7930..9581602a 100644 --- a/examples/rpi-pico-w/src/bin/tcp_server.rs +++ b/examples/rpi-pico-w/src/bin/tcp_server.rs @@ -94,8 +94,15 @@ async fn main(spawner: Spawner) { unwrap!(spawner.spawn(net_task(stack))); - //control.join_open(env!("WIFI_NETWORK")).await; - control.join_wpa2(env!("WIFI_NETWORK"), env!("WIFI_PASSWORD")).await; + loop { + //control.join_open(env!("WIFI_NETWORK")).await; + match control.join_wpa2(env!("WIFI_NETWORK"), env!("WIFI_PASSWORD")).await { + Ok(_) => break, + Err(err) => { + info!("join failed with status={}", err.status); + } + } + } // And now we can use it! diff --git a/src/control.rs b/src/control.rs index e1ad06e6..3d7d4dd3 100644 --- a/src/control.rs +++ b/src/control.rs @@ -12,6 +12,11 @@ use crate::ioctl::{IoctlState, IoctlType}; use crate::structs::*; use crate::{countries, events, PowerManagementMode}; +#[derive(Debug)] +pub struct Error { + pub status: u32, +} + pub struct Control<'a> { state_ch: ch::StateRunner<'a>, events: &'a Events, @@ -145,7 +150,7 @@ impl<'a> Control<'a> { self.ioctl_set_u32(86, 0, mode_num).await; } - pub async fn join_open(&mut self, ssid: &str) { + pub async fn join_open(&mut self, ssid: &str) -> Result<(), Error> { self.set_iovar_u32("ampdu_ba_wsize", 8).await; self.ioctl_set_u32(134, 0, 0).await; // wsec = open @@ -159,10 +164,10 @@ impl<'a> Control<'a> { }; i.ssid[..ssid.len()].copy_from_slice(ssid.as_bytes()); - self.wait_for_join(i).await; + self.wait_for_join(i).await } - pub async fn join_wpa2(&mut self, ssid: &str, passphrase: &str) { + pub async fn join_wpa2(&mut self, ssid: &str, passphrase: &str) -> Result<(), Error> { self.set_iovar_u32("ampdu_ba_wsize", 8).await; self.ioctl_set_u32(134, 0, 4).await; // wsec = wpa2 @@ -191,33 +196,42 @@ impl<'a> Control<'a> { }; i.ssid[..ssid.len()].copy_from_slice(ssid.as_bytes()); - self.wait_for_join(i).await; + self.wait_for_join(i).await } - async fn wait_for_join(&mut self, i: SsidInfo) { - self.events.mask.enable(&[Event::JOIN, Event::AUTH]); + async fn wait_for_join(&mut self, i: SsidInfo) -> Result<(), Error> { + self.events.mask.enable(&[Event::SET_SSID, Event::AUTH]); let mut subscriber = self.events.queue.subscriber().unwrap(); // the actual join operation starts here // we make sure to enable events before so we don't miss any + + // set_ssid self.ioctl(IoctlType::Set, IOCTL_CMD_SET_SSID, 0, &mut i.to_bytes()) .await; - // set_ssid - loop { + // to complete the join, we wait for a SET_SSID event + // we also save the AUTH status for the user, it may be interesting + let mut auth_status = 0; + let status = loop { let msg = subscriber.next_message_pure().await; if msg.header.event_type == Event::AUTH && msg.header.status != EStatus::SUCCESS { - // retry - warn!("JOIN failed with status={}", msg.header.status); - self.ioctl(IoctlType::Set, IOCTL_CMD_SET_SSID, 0, &mut i.to_bytes()) - .await; - } else if msg.header.event_type == Event::JOIN && msg.header.status == EStatus::SUCCESS { - // successful join - break; + auth_status = msg.header.status; + } else if msg.header.event_type == Event::SET_SSID { + // join operation ends with SET_SSID event + break msg.header.status; } - } + }; + self.events.mask.disable_all(); - self.state_ch.set_link_state(LinkState::Up); - info!("JOINED"); + if status == EStatus::SUCCESS { + // successful join + self.state_ch.set_link_state(LinkState::Up); + info!("JOINED"); + Ok(()) + } else { + warn!("JOIN failed with status={} auth={}", status, auth_status); + Err(Error { status }) + } } pub async fn gpio_set(&mut self, gpio_n: u8, gpio_en: bool) { diff --git a/src/lib.rs b/src/lib.rs index d437a882..4a9ada90 100644 --- a/src/lib.rs +++ b/src/lib.rs @@ -27,7 +27,7 @@ use ioctl::IoctlState; use crate::bus::Bus; pub use crate::bus::SpiBusCyw43; -pub use crate::control::Control; +pub use crate::control::{Control, Error as ControlError}; pub use crate::runner::Runner; pub use crate::structs::BssInfo; From 008b1fd30c945fdfb36d95dcfc38ffa9cbcf2cf1 Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Mon, 8 May 2023 20:26:17 +0200 Subject: [PATCH 120/130] update defmt to 0.3.4, now that probe-run is fixed. --- examples/rpi-pico-w/Cargo.toml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/examples/rpi-pico-w/Cargo.toml b/examples/rpi-pico-w/Cargo.toml index 8df65e18..5b46726d 100644 --- a/examples/rpi-pico-w/Cargo.toml +++ b/examples/rpi-pico-w/Cargo.toml @@ -14,7 +14,7 @@ embassy-net = { version = "0.1.0", features = ["defmt", "tcp", "dhcpv4", "medium atomic-polyfill = "0.1.5" static_cell = "1.0" -defmt = "=0.3.2" +defmt = "0.3.4" defmt-rtt = "0.3" panic-probe = { version = "0.3", features = ["print-defmt"] } From d3d424dad348c78222a6d962e2d51b56b485807d Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Mon, 8 May 2023 20:27:21 +0200 Subject: [PATCH 121/130] remove comment. --- cyw43-pio/Cargo.toml | 2 -- 1 file changed, 2 deletions(-) diff --git a/cyw43-pio/Cargo.toml b/cyw43-pio/Cargo.toml index c5632d5f..8272903c 100644 --- a/cyw43-pio/Cargo.toml +++ b/cyw43-pio/Cargo.toml @@ -3,8 +3,6 @@ name = "cyw43-pio" version = "0.1.0" edition = "2021" -# See more keys and their definitions at https://doc.rust-lang.org/cargo/reference/manifest.html - [dependencies] cyw43 = { path = "../" } embassy-rp = { version = "0.1.0", features = ["unstable-traits", "nightly", "unstable-pac", "time-driver"] } From a7dee5b65c602637f8209d46d4611ed846a17459 Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Mon, 8 May 2023 20:27:44 +0200 Subject: [PATCH 122/130] Change all logging level to debug. --- src/control.rs | 14 +++++++------- src/runner.rs | 22 +++++++++++----------- 2 files changed, 18 insertions(+), 18 deletions(-) diff --git a/src/control.rs b/src/control.rs index 3d7d4dd3..6919d569 100644 --- a/src/control.rs +++ b/src/control.rs @@ -35,7 +35,7 @@ impl<'a> Control<'a> { pub async fn init(&mut self, clm: &[u8]) { const CHUNK_SIZE: usize = 1024; - info!("Downloading CLM..."); + debug!("Downloading CLM..."); let mut offs = 0; for chunk in clm.chunks(CHUNK_SIZE) { @@ -65,7 +65,7 @@ impl<'a> Control<'a> { // check clmload ok assert_eq!(self.get_iovar_u32("clmload_status").await, 0); - info!("Configuring misc stuff..."); + debug!("Configuring misc stuff..."); // Disable tx gloming which transfers multiple packets in one request. // 'glom' is short for "conglomerate" which means "gather together into @@ -76,7 +76,7 @@ impl<'a> Control<'a> { // read MAC addr. let mut mac_addr = [0; 6]; assert_eq!(self.get_iovar("cur_etheraddr", &mut mac_addr).await, 6); - info!("mac addr: {:02x}", Bytes(&mac_addr)); + debug!("mac addr: {:02x}", Bytes(&mac_addr)); let country = countries::WORLD_WIDE_XX; let country_info = CountryInfo { @@ -135,7 +135,7 @@ impl<'a> Control<'a> { self.state_ch.set_ethernet_address(mac_addr); - info!("INIT DONE"); + debug!("INIT DONE"); } pub async fn set_power_management(&mut self, mode: PowerManagementMode) { @@ -226,7 +226,7 @@ impl<'a> Control<'a> { if status == EStatus::SUCCESS { // successful join self.state_ch.set_link_state(LinkState::Up); - info!("JOINED"); + debug!("JOINED"); Ok(()) } else { warn!("JOIN failed with status={} auth={}", status, auth_status); @@ -330,7 +330,7 @@ impl<'a> Control<'a> { } async fn set_iovar_v(&mut self, name: &str, val: &[u8]) { - info!("set {} = {:02x}", name, Bytes(val)); + debug!("set {} = {:02x}", name, Bytes(val)); let mut buf = [0; BUFSIZE]; buf[..name.len()].copy_from_slice(name.as_bytes()); @@ -344,7 +344,7 @@ impl<'a> Control<'a> { // TODO this is not really working, it always returns all zeros. async fn get_iovar(&mut self, name: &str, res: &mut [u8]) -> usize { - info!("get {}", name); + debug!("get {}", name); let mut buf = [0; 64]; buf[..name.len()].copy_from_slice(name.as_bytes()); diff --git a/src/runner.rs b/src/runner.rs index 56b9a609..98f8aff7 100644 --- a/src/runner.rs +++ b/src/runner.rs @@ -80,12 +80,12 @@ where self.bus .write8(FUNC_BACKPLANE, REG_BACKPLANE_CHIP_CLOCK_CSR, BACKPLANE_ALP_AVAIL_REQ) .await; - info!("waiting for clock..."); + debug!("waiting for clock..."); while self.bus.read8(FUNC_BACKPLANE, REG_BACKPLANE_CHIP_CLOCK_CSR).await & BACKPLANE_ALP_AVAIL == 0 {} - info!("clock ok"); + debug!("clock ok"); let chip_id = self.bus.bp_read16(0x1800_0000).await; - info!("chip ID: {}", chip_id); + debug!("chip ID: {}", chip_id); // Upload firmware. self.core_disable(Core::WLAN).await; @@ -95,10 +95,10 @@ where let ram_addr = CHIP.atcm_ram_base_address; - info!("loading fw"); + debug!("loading fw"); self.bus.bp_write(ram_addr, firmware).await; - info!("loading nvram"); + debug!("loading nvram"); // Round up to 4 bytes. let nvram_len = (NVRAM.len() + 3) / 4 * 4; self.bus @@ -112,7 +112,7 @@ where .await; // Start core! - info!("starting up core..."); + debug!("starting up core..."); self.core_reset(Core::WLAN).await; assert!(self.core_is_up(Core::WLAN).await); @@ -132,7 +132,7 @@ where .await; // wait for wifi startup - info!("waiting for wifi init..."); + debug!("waiting for wifi init..."); while self.bus.read32(FUNC_BUS, REG_BUS_STATUS).await & STATUS_F2_RX_READY == 0 {} // Some random configs related to sleep. @@ -158,14 +158,14 @@ where // start HT clock //self.bus.write8(FUNC_BACKPLANE, REG_BACKPLANE_CHIP_CLOCK_CSR, 0x10).await; - //info!("waiting for HT clock..."); + //debug!("waiting for HT clock..."); //while self.bus.read8(FUNC_BACKPLANE, REG_BACKPLANE_CHIP_CLOCK_CSR).await & 0x80 == 0 {} - //info!("clock ok"); + //debug!("clock ok"); #[cfg(feature = "firmware-logs")] self.log_init().await; - info!("init done "); + debug!("wifi init done"); } #[cfg(feature = "firmware-logs")] @@ -174,7 +174,7 @@ where let addr = CHIP.atcm_ram_base_address + CHIP.chip_ram_size - 4 - CHIP.socram_srmem_size; let shared_addr = self.bus.bp_read32(addr).await; - info!("shared_addr {:08x}", shared_addr); + debug!("shared_addr {:08x}", shared_addr); let mut shared = [0; SharedMemData::SIZE]; self.bus.bp_read(shared_addr, &mut shared).await; From 881e9d07d2e1107b27952c8bfe1d5afeef172165 Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Mon, 8 May 2023 21:45:54 +0200 Subject: [PATCH 123/130] Fix missing padding in tx. Makes max-sized packets not get dropped --- src/runner.rs | 19 +++++++++++++++---- 1 file changed, 15 insertions(+), 4 deletions(-) diff --git a/src/runner.rs b/src/runner.rs index 98f8aff7..1d8ec435 100644 --- a/src/runner.rs +++ b/src/runner.rs @@ -249,7 +249,16 @@ where let mut buf = [0; 512]; let buf8 = slice8_mut(&mut buf); - let total_len = SdpcmHeader::SIZE + BcdHeader::SIZE + packet.len(); + // There MUST be 2 bytes of padding between the SDPCM and BCD headers. + // And ONLY for data packets! + // No idea why, but the firmware will append two zero bytes to the tx'd packets + // otherwise. If the packet is exactly 1514 bytes (the max MTU), this makes it + // be oversized and get dropped. + // WHD adds it here https://github.com/Infineon/wifi-host-driver/blob/c04fcbb6b0d049304f376cf483fd7b1b570c8cd5/WiFi_Host_Driver/src/include/whd_sdpcm.h#L90 + // and adds it to the header size her https://github.com/Infineon/wifi-host-driver/blob/c04fcbb6b0d049304f376cf483fd7b1b570c8cd5/WiFi_Host_Driver/src/whd_sdpcm.c#L597 + // ¯\_(ツ)_/¯ + const PADDING_SIZE: usize = 2; + let total_len = SdpcmHeader::SIZE + PADDING_SIZE + BcdHeader::SIZE + packet.len(); let seq = self.sdpcm_seq; self.sdpcm_seq = self.sdpcm_seq.wrapping_add(1); @@ -260,7 +269,7 @@ where sequence: seq, channel_and_flags: CHANNEL_TYPE_DATA, next_length: 0, - header_length: SdpcmHeader::SIZE as _, + header_length: (SdpcmHeader::SIZE + PADDING_SIZE) as _, wireless_flow_control: 0, bus_data_credit: 0, reserved: [0, 0], @@ -276,8 +285,10 @@ where trace!(" {:?}", bcd_header); buf8[0..SdpcmHeader::SIZE].copy_from_slice(&sdpcm_header.to_bytes()); - buf8[SdpcmHeader::SIZE..][..BcdHeader::SIZE].copy_from_slice(&bcd_header.to_bytes()); - buf8[SdpcmHeader::SIZE + BcdHeader::SIZE..][..packet.len()].copy_from_slice(packet); + buf8[SdpcmHeader::SIZE + PADDING_SIZE..][..BcdHeader::SIZE] + .copy_from_slice(&bcd_header.to_bytes()); + buf8[SdpcmHeader::SIZE + PADDING_SIZE + BcdHeader::SIZE..][..packet.len()] + .copy_from_slice(packet); let total_len = (total_len + 3) & !3; // round up to 4byte From 6b5d9642d583bc034ee35b88c903545e7f423b4e Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Mon, 8 May 2023 22:01:44 +0200 Subject: [PATCH 124/130] Rename BCD -> BDC. That's what Broadcom calls it. Still no idea what it means. --- src/runner.rs | 24 ++++++++++++------------ src/structs.rs | 20 ++++++++++---------- 2 files changed, 22 insertions(+), 22 deletions(-) diff --git a/src/runner.rs b/src/runner.rs index 1d8ec435..5706696b 100644 --- a/src/runner.rs +++ b/src/runner.rs @@ -249,7 +249,7 @@ where let mut buf = [0; 512]; let buf8 = slice8_mut(&mut buf); - // There MUST be 2 bytes of padding between the SDPCM and BCD headers. + // There MUST be 2 bytes of padding between the SDPCM and BDC headers. // And ONLY for data packets! // No idea why, but the firmware will append two zero bytes to the tx'd packets // otherwise. If the packet is exactly 1514 bytes (the max MTU), this makes it @@ -258,7 +258,7 @@ where // and adds it to the header size her https://github.com/Infineon/wifi-host-driver/blob/c04fcbb6b0d049304f376cf483fd7b1b570c8cd5/WiFi_Host_Driver/src/whd_sdpcm.c#L597 // ¯\_(ツ)_/¯ const PADDING_SIZE: usize = 2; - let total_len = SdpcmHeader::SIZE + PADDING_SIZE + BcdHeader::SIZE + packet.len(); + let total_len = SdpcmHeader::SIZE + PADDING_SIZE + BdcHeader::SIZE + packet.len(); let seq = self.sdpcm_seq; self.sdpcm_seq = self.sdpcm_seq.wrapping_add(1); @@ -275,19 +275,19 @@ where reserved: [0, 0], }; - let bcd_header = BcdHeader { + let bdc_header = BdcHeader { flags: BDC_VERSION << BDC_VERSION_SHIFT, priority: 0, flags2: 0, data_offset: 0, }; trace!("tx {:?}", sdpcm_header); - trace!(" {:?}", bcd_header); + trace!(" {:?}", bdc_header); buf8[0..SdpcmHeader::SIZE].copy_from_slice(&sdpcm_header.to_bytes()); - buf8[SdpcmHeader::SIZE + PADDING_SIZE..][..BcdHeader::SIZE] - .copy_from_slice(&bcd_header.to_bytes()); - buf8[SdpcmHeader::SIZE + PADDING_SIZE + BcdHeader::SIZE..][..packet.len()] + buf8[SdpcmHeader::SIZE + PADDING_SIZE..][..BdcHeader::SIZE] + .copy_from_slice(&bdc_header.to_bytes()); + buf8[SdpcmHeader::SIZE + PADDING_SIZE + BdcHeader::SIZE..][..packet.len()] .copy_from_slice(packet); let total_len = (total_len + 3) & !3; // round up to 4byte @@ -366,13 +366,13 @@ where } } CHANNEL_TYPE_EVENT => { - let Some((_, bcd_packet)) = BcdHeader::parse(payload) else { - warn!("BCD event, incomplete header"); + let Some((_, bdc_packet)) = BdcHeader::parse(payload) else { + warn!("BDC event, incomplete header"); return; }; - let Some((event_packet, evt_data)) = EventPacket::parse(bcd_packet) else { - warn!("BCD event, incomplete data"); + let Some((event_packet, evt_data)) = EventPacket::parse(bdc_packet) else { + warn!("BDC event, incomplete data"); return; }; @@ -439,7 +439,7 @@ where } } CHANNEL_TYPE_DATA => { - let Some((_, packet)) = BcdHeader::parse(payload) else { return }; + let Some((_, packet)) = BdcHeader::parse(payload) else { return }; trace!("rx pkt {:02x}", Bytes(&packet[..packet.len().min(48)])); match self.ch.try_rx_buf() { diff --git a/src/structs.rs b/src/structs.rs index 3b646e1a..5ba633c7 100644 --- a/src/structs.rs +++ b/src/structs.rs @@ -165,7 +165,7 @@ pub const BDC_VERSION_SHIFT: u8 = 4; #[derive(Debug, Clone, Copy)] #[cfg_attr(feature = "defmt", derive(defmt::Format))] #[repr(C)] -pub struct BcdHeader { +pub struct BdcHeader { pub flags: u8, /// 802.1d Priority (low 3 bits) pub priority: u8, @@ -173,24 +173,24 @@ pub struct BcdHeader { /// Offset from end of BDC header to packet data, in 4-uint8_t words. Leaves room for optional headers. pub data_offset: u8, } -impl_bytes!(BcdHeader); +impl_bytes!(BdcHeader); -impl BcdHeader { +impl BdcHeader { pub fn parse(packet: &mut [u8]) -> Option<(&mut Self, &mut [u8])> { if packet.len() < Self::SIZE { return None; } - let (bcd_header, bcd_packet) = packet.split_at_mut(Self::SIZE); - let bcd_header = Self::from_bytes_mut(bcd_header.try_into().unwrap()); - trace!(" {:?}", bcd_header); + let (bdc_header, bdc_packet) = packet.split_at_mut(Self::SIZE); + let bdc_header = Self::from_bytes_mut(bdc_header.try_into().unwrap()); + trace!(" {:?}", bdc_header); - let packet_start = 4 * bcd_header.data_offset as usize; + let packet_start = 4 * bdc_header.data_offset as usize; - let bcd_packet = bcd_packet.get_mut(packet_start..)?; - trace!(" {:02x}", Bytes(&bcd_packet[..bcd_packet.len().min(36)])); + let bdc_packet = bdc_packet.get_mut(packet_start..)?; + trace!(" {:02x}", Bytes(&bdc_packet[..bdc_packet.len().min(36)])); - Some((bcd_header, bcd_packet)) + Some((bdc_header, bdc_packet)) } } From 8800caa216f2c90b7d998280a54dddf14e97e318 Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Sat, 13 May 2023 02:20:46 +0200 Subject: [PATCH 125/130] Update Embassy, to new PIO API. --- Cargo.toml | 12 +- cyw43-pio/Cargo.toml | 1 + cyw43-pio/src/lib.rs | 151 ++++++++++--------- examples/rpi-pico-w/Cargo.toml | 18 +-- examples/rpi-pico-w/src/bin/tcp_server.rs | 16 +- examples/rpi-pico-w/src/bin/tcp_server_ap.rs | 16 +- examples/rpi-pico-w/src/bin/wifi_scan.rs | 16 +- 7 files changed, 112 insertions(+), 118 deletions(-) diff --git a/Cargo.toml b/Cargo.toml index c4872f42..2bb2b8d9 100644 --- a/Cargo.toml +++ b/Cargo.toml @@ -12,7 +12,7 @@ firmware-logs = [] [dependencies] embassy-time = { version = "0.1.0" } -embassy-sync = { version = "0.1.0" } +embassy-sync = { version = "0.2.0" } embassy-futures = { version = "0.1.0" } embassy-net-driver-channel = { version = "0.1.0" } atomic-polyfill = "0.1.5" @@ -28,11 +28,11 @@ embedded-hal-1 = { package = "embedded-hal", version = "1.0.0-alpha.10" } num_enum = { version = "0.5.7", default-features = false } [patch.crates-io] -embassy-time = { git = "https://github.com/embassy-rs/embassy", rev = "03d6363d5af5dcaf21b52734994a466ca593d2b6" } -embassy-futures = { git = "https://github.com/embassy-rs/embassy", rev = "03d6363d5af5dcaf21b52734994a466ca593d2b6" } -embassy-sync = { git = "https://github.com/embassy-rs/embassy", rev = "03d6363d5af5dcaf21b52734994a466ca593d2b6" } -embassy-net-driver-channel = { git = "https://github.com/embassy-rs/embassy", rev = "03d6363d5af5dcaf21b52734994a466ca593d2b6" } -embassy-rp = { git = "https://github.com/embassy-rs/embassy", rev = "03d6363d5af5dcaf21b52734994a466ca593d2b6" } +embassy-time = { git = "https://github.com/embassy-rs/embassy", rev = "82f7e104d90a6628d1873017ea5ef6a7afb3b3f7" } +embassy-futures = { git = "https://github.com/embassy-rs/embassy", rev = "82f7e104d90a6628d1873017ea5ef6a7afb3b3f7" } +embassy-sync = { git = "https://github.com/embassy-rs/embassy", rev = "82f7e104d90a6628d1873017ea5ef6a7afb3b3f7" } +embassy-net-driver-channel = { git = "https://github.com/embassy-rs/embassy", rev = "82f7e104d90a6628d1873017ea5ef6a7afb3b3f7" } +embassy-rp = { git = "https://github.com/embassy-rs/embassy", rev = "82f7e104d90a6628d1873017ea5ef6a7afb3b3f7" } [workspace] members = ["cyw43-pio"] diff --git a/cyw43-pio/Cargo.toml b/cyw43-pio/Cargo.toml index 8272903c..dd50e02b 100644 --- a/cyw43-pio/Cargo.toml +++ b/cyw43-pio/Cargo.toml @@ -8,4 +8,5 @@ cyw43 = { path = "../" } embassy-rp = { version = "0.1.0", features = ["unstable-traits", "nightly", "unstable-pac", "time-driver"] } pio-proc = "0.2" pio = "0.2.1" +fixed = "1.23.1" defmt = { version = "0.3", optional = true } \ No newline at end of file diff --git a/cyw43-pio/src/lib.rs b/cyw43-pio/src/lib.rs index c468435f..2c17b151 100644 --- a/cyw43-pio/src/lib.rs +++ b/cyw43-pio/src/lib.rs @@ -6,30 +6,39 @@ use core::slice; use cyw43::SpiBusCyw43; use embassy_rp::dma::Channel; -use embassy_rp::gpio::{Drive, Output, Pin, Pull, SlewRate}; -use embassy_rp::pio::{PioStateMachine, ShiftDirection}; +use embassy_rp::gpio::{Drive, Level, Output, Pin, Pull, SlewRate}; +use embassy_rp::pio::{Common, Config, Direction, Instance, Irq, PioPin, ShiftDirection, StateMachine}; use embassy_rp::relocate::RelocatedProgram; -use embassy_rp::{pio_instr_util, Peripheral}; -use pio::Wrap; +use embassy_rp::{pio_instr_util, Peripheral, PeripheralRef}; +use fixed::FixedU32; use pio_proc::pio_asm; -pub struct PioSpi { - cs: Output<'static, CS>, - sm: SM, - dma: DMA, +pub struct PioSpi<'d, CS: Pin, PIO: Instance, const SM: usize, DMA> { + cs: Output<'d, CS>, + sm: StateMachine<'d, PIO, SM>, + irq: Irq<'d, PIO, 0>, + dma: PeripheralRef<'d, DMA>, wrap_target: u8, } -impl PioSpi +impl<'d, CS, PIO, const SM: usize, DMA> PioSpi<'d, CS, PIO, SM, DMA> where - SM: PioStateMachine, DMA: Channel, CS: Pin, + PIO: Instance, { - pub fn new(mut sm: SM, cs: Output<'static, CS>, dio: DIO, clk: CLK, dma: DMA) -> Self + pub fn new( + common: &mut Common<'d, PIO>, + mut sm: StateMachine<'d, PIO, SM>, + irq: Irq<'d, PIO, 0>, + cs: Output<'d, CS>, + dio: DIO, + clk: CLK, + dma: impl Peripheral

+ 'd, + ) -> Self where - DIO: Pin, - CLK: Pin, + DIO: PioPin, + CLK: PioPin, { let program = pio_asm!( ".side_set 1" @@ -42,8 +51,8 @@ where // switch directions "set pindirs, 0 side 0" // these nops seem to be necessary for fast clkdiv - "nop side 1" - "nop side 0" + //"nop side 1" + //"nop side 0" "nop side 1" // read in y-1 bits "lp2:" @@ -59,68 +68,62 @@ where let relocated = RelocatedProgram::new(&program.program); - let mut pin_io = sm.make_pio_pin(dio); - pin_io.set_pull(Pull::Down); + let mut pin_io: embassy_rp::pio::Pin = common.make_pio_pin(dio); + pin_io.set_pull(Pull::None); pin_io.set_schmitt(true); pin_io.set_input_sync_bypass(true); + //pin_io.set_drive_strength(Drive::_12mA); + //pin_io.set_slew_rate(SlewRate::Fast); - let mut pin_clk = sm.make_pio_pin(clk); + let mut pin_clk = common.make_pio_pin(clk); pin_clk.set_drive_strength(Drive::_12mA); pin_clk.set_slew_rate(SlewRate::Fast); - sm.write_instr(relocated.origin() as usize, relocated.code()); + let mut cfg = Config::default(); + cfg.use_program(&common.load_program(&relocated), &[&pin_clk]); + cfg.set_out_pins(&[&pin_io]); + cfg.set_in_pins(&[&pin_io]); + cfg.set_set_pins(&[&pin_io]); + cfg.shift_out.direction = ShiftDirection::Left; + cfg.shift_out.auto_fill = true; + //cfg.shift_out.threshold = 32; + cfg.shift_in.direction = ShiftDirection::Left; + cfg.shift_in.auto_fill = true; + //cfg.shift_in.threshold = 32; // theoretical maximum according to data sheet, 100Mhz Pio => 50Mhz SPI Freq - sm.set_clkdiv(0x0140); + // seems to cause random corruption, probably due to jitter due to the fractional divider. + // cfg.clock_divider = FixedU32::from_bits(0x0140); // same speed as pico-sdk, 62.5Mhz - // sm.set_clkdiv(0x0200); + cfg.clock_divider = FixedU32::from_bits(0x0200); // 32 Mhz - // sm.set_clkdiv(0x03E8); + // cfg.clock_divider = FixedU32::from_bits(0x03E8); // 16 Mhz - // sm.set_clkdiv(0x07d0); + // cfg.clock_divider = FixedU32::from_bits(0x07d0); // 8Mhz - // sm.set_clkdiv(0x0a_00); + // cfg.clock_divider = FixedU32::from_bits(0x0a_00); // 1Mhz - // sm.set_clkdiv(0x7d_00); + // cfg.clock_divider = FixedU32::from_bits(0x7d_00); // slowest possible - // sm.set_clkdiv(0xffff_00); + // cfg.clock_divider = FixedU32::from_bits(0xffff_00); - sm.set_autopull(true); - // sm.set_pull_threshold(32); - sm.set_autopush(true); - // sm.set_push_threshold(32); + sm.set_config(&cfg); - sm.set_out_pins(&[&pin_io]); - sm.set_in_base_pin(&pin_io); - - sm.set_set_pins(&[&pin_clk]); - pio_instr_util::set_pindir(&mut sm, 0b1); - sm.set_set_pins(&[&pin_io]); - pio_instr_util::set_pindir(&mut sm, 0b1); - - sm.set_sideset_base_pin(&pin_clk); - sm.set_sideset_count(1); - - sm.set_out_shift_dir(ShiftDirection::Left); - sm.set_in_shift_dir(ShiftDirection::Left); - - let Wrap { source, target } = relocated.wrap(); - sm.set_wrap(source, target); - - // pull low for startup - pio_instr_util::set_pin(&mut sm, 0); + sm.set_pin_dirs(Direction::Out, &[&pin_clk, &pin_io]); + sm.set_pins(Level::Low, &[&pin_clk, &pin_io]); Self { cs, sm, - dma, - wrap_target: target, + irq, + dma: dma.into_ref(), + wrap_target: relocated.wrap().target, } } @@ -132,18 +135,22 @@ where #[cfg(feature = "defmt")] defmt::trace!("write={} read={}", write_bits, read_bits); - let mut dma = Peripheral::into_ref(&mut self.dma); - pio_instr_util::set_x(&mut self.sm, write_bits as u32); - pio_instr_util::set_y(&mut self.sm, read_bits as u32); - pio_instr_util::set_pindir(&mut self.sm, 0b1); - pio_instr_util::exec_jmp(&mut self.sm, self.wrap_target); + unsafe { + pio_instr_util::set_x(&mut self.sm, write_bits as u32); + pio_instr_util::set_y(&mut self.sm, read_bits as u32); + pio_instr_util::set_pindir(&mut self.sm, 0b1); + pio_instr_util::exec_jmp(&mut self.sm, self.wrap_target); + } self.sm.set_enable(true); - self.sm.dma_push(dma.reborrow(), write).await; + self.sm.tx().dma_push(self.dma.reborrow(), write).await; let mut status = 0; - self.sm.dma_pull(dma.reborrow(), slice::from_mut(&mut status)).await; + self.sm + .rx() + .dma_pull(self.dma.reborrow(), slice::from_mut(&mut status)) + .await; status } @@ -155,27 +162,32 @@ where #[cfg(feature = "defmt")] defmt::trace!("write={} read={}", write_bits, read_bits); - let mut dma = Peripheral::into_ref(&mut self.dma); - pio_instr_util::set_y(&mut self.sm, read_bits as u32); - pio_instr_util::set_x(&mut self.sm, write_bits as u32); - pio_instr_util::set_pindir(&mut self.sm, 0b1); - pio_instr_util::exec_jmp(&mut self.sm, self.wrap_target); + unsafe { + pio_instr_util::set_y(&mut self.sm, read_bits as u32); + pio_instr_util::set_x(&mut self.sm, write_bits as u32); + pio_instr_util::set_pindir(&mut self.sm, 0b1); + pio_instr_util::exec_jmp(&mut self.sm, self.wrap_target); + } + // self.cs.set_low(); self.sm.set_enable(true); - self.sm.dma_push(dma.reborrow(), slice::from_ref(&cmd)).await; - self.sm.dma_pull(dma.reborrow(), read).await; + self.sm.tx().dma_push(self.dma.reborrow(), slice::from_ref(&cmd)).await; + self.sm.rx().dma_pull(self.dma.reborrow(), read).await; let mut status = 0; - self.sm.dma_pull(dma.reborrow(), slice::from_mut(&mut status)).await; + self.sm + .rx() + .dma_pull(self.dma.reborrow(), slice::from_mut(&mut status)) + .await; status } } -impl SpiBusCyw43 for PioSpi +impl<'d, CS, PIO, const SM: usize, DMA> SpiBusCyw43 for PioSpi<'d, CS, PIO, SM, DMA> where CS: Pin, - SM: PioStateMachine, + PIO: Instance, DMA: Channel, { async fn cmd_write(&mut self, write: &[u32]) -> u32 { @@ -193,7 +205,6 @@ where } async fn wait_for_event(&mut self) { - self.sm.wait_irq(0).await; - self.sm.clear_irq(0); + self.irq.wait().await; } } diff --git a/examples/rpi-pico-w/Cargo.toml b/examples/rpi-pico-w/Cargo.toml index 5b46726d..d972bf5a 100644 --- a/examples/rpi-pico-w/Cargo.toml +++ b/examples/rpi-pico-w/Cargo.toml @@ -7,7 +7,7 @@ edition = "2021" [dependencies] cyw43 = { path = "../../", features = ["defmt", "firmware-logs"] } cyw43-pio = { path = "../../cyw43-pio", features = ["defmt"] } -embassy-executor = { version = "0.1.0", features = ["defmt", "integrated-timers", "executor-thread", "arch-cortex-m"] } +embassy-executor = { version = "0.2.0", features = ["defmt", "integrated-timers", "executor-thread", "arch-cortex-m"] } embassy-time = { version = "0.1.0", features = ["defmt", "defmt-timestamp-uptime"] } embassy-rp = { version = "0.1.0", features = ["defmt", "unstable-traits", "nightly", "unstable-pac", "time-driver"] } embassy-net = { version = "0.1.0", features = ["defmt", "tcp", "dhcpv4", "medium-ethernet", "unstable-traits", "nightly"] } @@ -27,14 +27,14 @@ heapless = "0.7.15" [patch.crates-io] -embassy-executor = { git = "https://github.com/embassy-rs/embassy", rev = "03d6363d5af5dcaf21b52734994a466ca593d2b6" } -embassy-time = { git = "https://github.com/embassy-rs/embassy", rev = "03d6363d5af5dcaf21b52734994a466ca593d2b6" } -embassy-futures = { git = "https://github.com/embassy-rs/embassy", rev = "03d6363d5af5dcaf21b52734994a466ca593d2b6" } -embassy-sync = { git = "https://github.com/embassy-rs/embassy", rev = "03d6363d5af5dcaf21b52734994a466ca593d2b6" } -embassy-rp = { git = "https://github.com/embassy-rs/embassy", rev = "03d6363d5af5dcaf21b52734994a466ca593d2b6" } -embassy-net = { git = "https://github.com/embassy-rs/embassy", rev = "03d6363d5af5dcaf21b52734994a466ca593d2b6" } -embassy-net-driver = { git = "https://github.com/embassy-rs/embassy", rev = "03d6363d5af5dcaf21b52734994a466ca593d2b6" } -embassy-net-driver-channel = { git = "https://github.com/embassy-rs/embassy", rev = "03d6363d5af5dcaf21b52734994a466ca593d2b6" } +embassy-executor = { git = "https://github.com/embassy-rs/embassy", rev = "82f7e104d90a6628d1873017ea5ef6a7afb3b3f7" } +embassy-time = { git = "https://github.com/embassy-rs/embassy", rev = "82f7e104d90a6628d1873017ea5ef6a7afb3b3f7" } +embassy-futures = { git = "https://github.com/embassy-rs/embassy", rev = "82f7e104d90a6628d1873017ea5ef6a7afb3b3f7" } +embassy-sync = { git = "https://github.com/embassy-rs/embassy", rev = "82f7e104d90a6628d1873017ea5ef6a7afb3b3f7" } +embassy-rp = { git = "https://github.com/embassy-rs/embassy", rev = "82f7e104d90a6628d1873017ea5ef6a7afb3b3f7" } +embassy-net = { git = "https://github.com/embassy-rs/embassy", rev = "82f7e104d90a6628d1873017ea5ef6a7afb3b3f7" } +embassy-net-driver = { git = "https://github.com/embassy-rs/embassy", rev = "82f7e104d90a6628d1873017ea5ef6a7afb3b3f7" } +embassy-net-driver-channel = { git = "https://github.com/embassy-rs/embassy", rev = "82f7e104d90a6628d1873017ea5ef6a7afb3b3f7" } [profile.dev] debug = 2 diff --git a/examples/rpi-pico-w/src/bin/tcp_server.rs b/examples/rpi-pico-w/src/bin/tcp_server.rs index 9581602a..8accc469 100644 --- a/examples/rpi-pico-w/src/bin/tcp_server.rs +++ b/examples/rpi-pico-w/src/bin/tcp_server.rs @@ -12,8 +12,8 @@ use embassy_executor::Spawner; use embassy_net::tcp::TcpSocket; use embassy_net::{Config, Stack, StackResources}; use embassy_rp::gpio::{Level, Output}; -use embassy_rp::peripherals::{DMA_CH0, PIN_23, PIN_25}; -use embassy_rp::pio::{Pio0, PioPeripheral, PioStateMachineInstance, Sm0}; +use embassy_rp::peripherals::{DMA_CH0, PIN_23, PIN_25, PIO0}; +use embassy_rp::pio::Pio; use embedded_io::asynch::Write; use static_cell::StaticCell; use {defmt_rtt as _, panic_probe as _}; @@ -28,11 +28,7 @@ macro_rules! singleton { #[embassy_executor::task] async fn wifi_task( - runner: cyw43::Runner< - 'static, - Output<'static, PIN_23>, - PioSpi, DMA_CH0>, - >, + runner: cyw43::Runner<'static, Output<'static, PIN_23>, PioSpi<'static, PIN_25, PIO0, 0, DMA_CH0>>, ) -> ! { runner.run().await } @@ -60,10 +56,8 @@ async fn main(spawner: Spawner) { let pwr = Output::new(p.PIN_23, Level::Low); let cs = Output::new(p.PIN_25, Level::High); - - let (_, sm, _, _, _) = p.PIO0.split(); - let dma = p.DMA_CH0; - let spi = PioSpi::new(sm, cs, p.PIN_24, p.PIN_29, dma); + let mut pio = Pio::new(p.PIO0); + let spi = PioSpi::new(&mut pio.common, pio.sm0, pio.irq0, cs, p.PIN_24, p.PIN_29, p.DMA_CH0); let state = singleton!(cyw43::State::new()); let (net_device, mut control, runner) = cyw43::new(state, pwr, spi, fw).await; diff --git a/examples/rpi-pico-w/src/bin/tcp_server_ap.rs b/examples/rpi-pico-w/src/bin/tcp_server_ap.rs index e4341262..ee2c3237 100644 --- a/examples/rpi-pico-w/src/bin/tcp_server_ap.rs +++ b/examples/rpi-pico-w/src/bin/tcp_server_ap.rs @@ -12,8 +12,8 @@ use embassy_executor::Spawner; use embassy_net::tcp::TcpSocket; use embassy_net::{Config, Stack, StackResources}; use embassy_rp::gpio::{Level, Output}; -use embassy_rp::peripherals::{DMA_CH0, PIN_23, PIN_25}; -use embassy_rp::pio::{Pio0, PioPeripheral, PioStateMachineInstance, Sm0}; +use embassy_rp::peripherals::{DMA_CH0, PIN_23, PIN_25, PIO0}; +use embassy_rp::pio::Pio; use embedded_io::asynch::Write; use static_cell::StaticCell; use {defmt_rtt as _, panic_probe as _}; @@ -28,11 +28,7 @@ macro_rules! singleton { #[embassy_executor::task] async fn wifi_task( - runner: cyw43::Runner< - 'static, - Output<'static, PIN_23>, - PioSpi, DMA_CH0>, - >, + runner: cyw43::Runner<'static, Output<'static, PIN_23>, PioSpi<'static, PIN_25, PIO0, 0, DMA_CH0>>, ) -> ! { runner.run().await } @@ -60,10 +56,8 @@ async fn main(spawner: Spawner) { let pwr = Output::new(p.PIN_23, Level::Low); let cs = Output::new(p.PIN_25, Level::High); - - let (_, sm, _, _, _) = p.PIO0.split(); - let dma = p.DMA_CH0; - let spi = PioSpi::new(sm, cs, p.PIN_24, p.PIN_29, dma); + let mut pio = Pio::new(p.PIO0); + let spi = PioSpi::new(&mut pio.common, pio.sm0, pio.irq0, cs, p.PIN_24, p.PIN_29, p.DMA_CH0); let state = singleton!(cyw43::State::new()); let (net_device, mut control, runner) = cyw43::new(state, pwr, spi, fw).await; diff --git a/examples/rpi-pico-w/src/bin/wifi_scan.rs b/examples/rpi-pico-w/src/bin/wifi_scan.rs index da8fadfd..a2a44f99 100644 --- a/examples/rpi-pico-w/src/bin/wifi_scan.rs +++ b/examples/rpi-pico-w/src/bin/wifi_scan.rs @@ -11,8 +11,8 @@ use defmt::*; use embassy_executor::Spawner; use embassy_net::Stack; use embassy_rp::gpio::{Level, Output}; -use embassy_rp::peripherals::{DMA_CH0, PIN_23, PIN_25}; -use embassy_rp::pio::{Pio0, PioPeripheral, PioStateMachineInstance, Sm0}; +use embassy_rp::peripherals::{DMA_CH0, PIN_23, PIN_25, PIO0}; +use embassy_rp::pio::Pio; use static_cell::StaticCell; use {defmt_rtt as _, panic_probe as _}; @@ -26,11 +26,7 @@ macro_rules! singleton { #[embassy_executor::task] async fn wifi_task( - runner: cyw43::Runner< - 'static, - Output<'static, PIN_23>, - PioSpi, DMA_CH0>, - >, + runner: cyw43::Runner<'static, Output<'static, PIN_23>, PioSpi<'static, PIN_25, PIO0, 0, DMA_CH0>>, ) -> ! { runner.run().await } @@ -58,10 +54,8 @@ async fn main(spawner: Spawner) { let pwr = Output::new(p.PIN_23, Level::Low); let cs = Output::new(p.PIN_25, Level::High); - - let (_, sm, _, _, _) = p.PIO0.split(); - let dma = p.DMA_CH0; - let spi = PioSpi::new(sm, cs, p.PIN_24, p.PIN_29, dma); + let mut pio = Pio::new(p.PIO0); + let spi = PioSpi::new(&mut pio.common, pio.sm0, pio.irq0, cs, p.PIN_24, p.PIN_29, p.DMA_CH0); let state = singleton!(cyw43::State::new()); let (_net_device, mut control, runner) = cyw43::new(state, pwr, spi, fw).await; From f46e0eb5f28fff64997fee7fc15b123ddc7231fe Mon Sep 17 00:00:00 2001 From: Matt Johnston Date: Sun, 14 May 2023 22:48:04 +0800 Subject: [PATCH 126/130] Fix PowerManagementMode::None MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Mode was being set to 2 (PM2_POWERSAVE_MODE), should be 0 (NO_POWERSAVE_MODE). Setting None mode failed with a panic: 85.707099 DEBUG set pm2_sleep_ret = [00, 00, 00, 00] └─ cyw43::control::{impl#0}::set_iovar_v::{async_fn#0} @ cyw43/src/fmt.rs:127 85.710469 ERROR panicked at 'IOCTL error -29' --- src/lib.rs | 1 + 1 file changed, 1 insertion(+) diff --git a/src/lib.rs b/src/lib.rs index 4a9ada90..fd11f367 100644 --- a/src/lib.rs +++ b/src/lib.rs @@ -198,6 +198,7 @@ impl PowerManagementMode { fn mode(&self) -> u32 { match self { PowerManagementMode::ThroughputThrottling => 1, + PowerManagementMode::None => 0, _ => 2, } } From db907a914c7e84176a15da70385af871c9b97cf6 Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Sun, 14 May 2023 23:02:49 +0200 Subject: [PATCH 127/130] cyw43-pio: add `overclock` feature flag. --- ci.sh | 5 +++ cyw43-pio/Cargo.toml | 5 +++ cyw43-pio/src/lib.rs | 77 +++++++++++++++++++++------------- examples/rpi-pico-w/Cargo.toml | 4 +- 4 files changed, 60 insertions(+), 31 deletions(-) diff --git a/ci.sh b/ci.sh index d41b3aa8..91683820 100755 --- a/ci.sh +++ b/ci.sh @@ -1,7 +1,9 @@ #!/bin/bash set -euxo pipefail +cd $(dirname $0) +export CARGO_TARGET_DIR=$(pwd)/target export DEFMT_LOG=trace # build examples @@ -18,3 +20,6 @@ cargo build --target thumbv6m-none-eabi --features 'log' cargo build --target thumbv6m-none-eabi --features 'defmt' cargo build --target thumbv6m-none-eabi --features 'log,firmware-logs' cargo build --target thumbv6m-none-eabi --features 'defmt,firmware-logs' + +(cd cyw43-pio; cargo build --target thumbv6m-none-eabi --features '') +(cd cyw43-pio; cargo build --target thumbv6m-none-eabi --features 'overclock') diff --git a/cyw43-pio/Cargo.toml b/cyw43-pio/Cargo.toml index dd50e02b..2238f761 100644 --- a/cyw43-pio/Cargo.toml +++ b/cyw43-pio/Cargo.toml @@ -3,6 +3,11 @@ name = "cyw43-pio" version = "0.1.0" edition = "2021" +[features] +# If disabled, SPI runs at 31.25MHz +# If enabled, SPI runs at 62.5MHz, which is 25% higher than 50Mhz which is the maximum according to the CYW43439 datasheet. +overclock = [] + [dependencies] cyw43 = { path = "../" } embassy-rp = { version = "0.1.0", features = ["unstable-traits", "nightly", "unstable-pac", "time-driver"] } diff --git a/cyw43-pio/src/lib.rs b/cyw43-pio/src/lib.rs index 2c17b151..dca30c74 100644 --- a/cyw43-pio/src/lib.rs +++ b/cyw43-pio/src/lib.rs @@ -40,24 +40,46 @@ where DIO: PioPin, CLK: PioPin, { + #[cfg(feature = "overclock")] let program = pio_asm!( ".side_set 1" ".wrap_target" // write out x-1 bits - "lp:", + "lp:" "out pins, 1 side 0" "jmp x-- lp side 1" // switch directions "set pindirs, 0 side 0" - // these nops seem to be necessary for fast clkdiv - //"nop side 1" - //"nop side 0" - "nop side 1" + "nop side 1" // necessary for clkdiv=1. + "nop side 0" // read in y-1 bits "lp2:" - "in pins, 1 side 0" - "jmp y-- lp2 side 1" + "in pins, 1 side 1" + "jmp y-- lp2 side 0" + + // wait for event and irq host + "wait 1 pin 0 side 0" + "irq 0 side 0" + + ".wrap" + ); + #[cfg(not(feature = "overclock"))] + let program = pio_asm!( + ".side_set 1" + + ".wrap_target" + // write out x-1 bits + "lp:" + "out pins, 1 side 0" + "jmp x-- lp side 1" + // switch directions + "set pindirs, 0 side 0" + "nop side 0" + // read in y-1 bits + "lp2:" + "in pins, 1 side 1" + "jmp y-- lp2 side 0" // wait for event and irq host "wait 1 pin 0 side 0" @@ -72,8 +94,8 @@ where pin_io.set_pull(Pull::None); pin_io.set_schmitt(true); pin_io.set_input_sync_bypass(true); - //pin_io.set_drive_strength(Drive::_12mA); - //pin_io.set_slew_rate(SlewRate::Fast); + pin_io.set_drive_strength(Drive::_12mA); + pin_io.set_slew_rate(SlewRate::Fast); let mut pin_clk = common.make_pio_pin(clk); pin_clk.set_drive_strength(Drive::_12mA); @@ -91,27 +113,24 @@ where cfg.shift_in.auto_fill = true; //cfg.shift_in.threshold = 32; - // theoretical maximum according to data sheet, 100Mhz Pio => 50Mhz SPI Freq - // seems to cause random corruption, probably due to jitter due to the fractional divider. - // cfg.clock_divider = FixedU32::from_bits(0x0140); + #[cfg(feature = "overclock")] + { + // 125mhz Pio => 62.5Mhz SPI Freq. 25% higher than theoretical maximum according to + // data sheet, but seems to work fine. + cfg.clock_divider = FixedU32::from_bits(0x0100); + } - // same speed as pico-sdk, 62.5Mhz - cfg.clock_divider = FixedU32::from_bits(0x0200); - - // 32 Mhz - // cfg.clock_divider = FixedU32::from_bits(0x03E8); - - // 16 Mhz - // cfg.clock_divider = FixedU32::from_bits(0x07d0); - - // 8Mhz - // cfg.clock_divider = FixedU32::from_bits(0x0a_00); - - // 1Mhz - // cfg.clock_divider = FixedU32::from_bits(0x7d_00); - - // slowest possible - // cfg.clock_divider = FixedU32::from_bits(0xffff_00); + #[cfg(not(feature = "overclock"))] + { + // same speed as pico-sdk, 62.5Mhz + // This is actually the fastest we can go without overclocking. + // According to data sheet, the theoretical maximum is 100Mhz Pio => 50Mhz SPI Freq. + // However, the PIO uses a fractional divider, which works by introducing jitter when + // the divider is not an integer. It does some clocks at 125mhz and others at 62.5mhz + // so that it averages out to the desired frequency of 100mhz. The 125mhz clock cycles + // violate the maximum from the data sheet. + cfg.clock_divider = FixedU32::from_bits(0x0200); + } sm.set_config(&cfg); diff --git a/examples/rpi-pico-w/Cargo.toml b/examples/rpi-pico-w/Cargo.toml index d972bf5a..525e934f 100644 --- a/examples/rpi-pico-w/Cargo.toml +++ b/examples/rpi-pico-w/Cargo.toml @@ -6,7 +6,7 @@ edition = "2021" [dependencies] cyw43 = { path = "../../", features = ["defmt", "firmware-logs"] } -cyw43-pio = { path = "../../cyw43-pio", features = ["defmt"] } +cyw43-pio = { path = "../../cyw43-pio", features = ["defmt", "overclock"] } embassy-executor = { version = "0.2.0", features = ["defmt", "integrated-timers", "executor-thread", "arch-cortex-m"] } embassy-time = { version = "0.1.0", features = ["defmt", "defmt-timestamp-uptime"] } embassy-rp = { version = "0.1.0", features = ["defmt", "unstable-traits", "nightly", "unstable-pac", "time-driver"] } @@ -48,7 +48,7 @@ debug = 1 debug-assertions = false incremental = false lto = 'fat' -opt-level = 'z' +opt-level = 's' overflow-checks = false # do not optimize proc-macro crates = faster builds from scratch From a19f8c32ffe085fdb68d349599dac360721b7786 Mon Sep 17 00:00:00 2001 From: Olivier Monnom <7986118+papyDoctor@users.noreply.github.com> Date: Wed, 24 May 2023 09:22:05 +0200 Subject: [PATCH 128/130] Update examples in README.md --- README.md | 13 +++++++------ 1 file changed, 7 insertions(+), 6 deletions(-) diff --git a/README.md b/README.md index fe8d5d93..defea489 100644 --- a/README.md +++ b/README.md @@ -21,27 +21,28 @@ TODO: - Setting a custom MAC address. - Bus sleep (unclear what the benefit is. Is it needed for IRQs? or is it just power consumption optimization?) -## Running the example +## Running the examples - `cargo install probe-rs-cli` - `cd examples/rpi-pico-w` +### Example 1: Scan the wifi stations +- `cargo run --release --bin wifi_scan` +### Example 2: Create an access point (IP and credentials in the code) +- `cargo run --release --bin tcp_server_ap` +### Example 3: Connect to an existing network and create a server - `WIFI_NETWORK=MyWifiNetwork WIFI_PASSWORD=MyWifiPassword cargo run --release` After a few seconds, you should see that DHCP picks up an IP address like this - ``` 11.944489 DEBUG Acquired IP configuration: 11.944517 DEBUG IP address: 192.168.0.250/24 11.944620 DEBUG Default gateway: 192.168.0.33 11.944722 DEBUG DNS server 0: 192.168.0.33 ``` - -The example implements a TCP echo server on port 1234. You can try connecting to it with: - +This example implements a TCP echo server on port 1234. You can try connecting to it with: ``` nc 192.168.0.250 1234 ``` - Send it some data, you should see it echoed back and printed in the firmware's logs. ## License From c327c6cd6fc3c11cfaf83cf64591940d401c5f6b Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Tue, 30 May 2023 22:42:49 +0200 Subject: [PATCH 129/130] cyw43: move crate to subdir. --- .github/workflows/rust.yml | 29 - .gitignore | 2 - .vscode/extensions.json | 11 - .vscode/settings.json | 17 - LICENSE-APACHE | 201 -- LICENSE-MIT | 25 - ci.sh | 25 - {firmware => cyw43-firmware}/43439A0.bin | Bin {firmware => cyw43-firmware}/43439A0_clm.bin | Bin .../LICENSE-permissive-binary-license-1.0.txt | 0 {firmware => cyw43-firmware}/README.md | 0 cyw43-pio/Cargo.toml | 2 +- Cargo.toml => cyw43/Cargo.toml | 0 README.md => cyw43/README.md | 0 {src => cyw43/src}/bus.rs | 0 {src => cyw43/src}/consts.rs | 0 {src => cyw43/src}/control.rs | 0 {src => cyw43/src}/countries.rs | 0 {src => cyw43/src}/events.rs | 0 {src => cyw43/src}/fmt.rs | 0 {src => cyw43/src}/ioctl.rs | 0 {src => cyw43/src}/lib.rs | 0 {src => cyw43/src}/nvram.rs | 0 {src => cyw43/src}/runner.rs | 0 {src => cyw43/src}/structs.rs | 0 examples/rpi-pico-w/Cargo.lock | 1707 +++++++++++++++++ examples/rpi-pico-w/Cargo.toml | 2 +- examples/rpi-pico-w/src/bin/tcp_server.rs | 25 +- examples/rpi-pico-w/src/bin/tcp_server_ap.rs | 20 +- examples/rpi-pico-w/src/bin/wifi_scan.rs | 20 +- rust-toolchain.toml | 8 - rustfmt.toml | 3 - 32 files changed, 1761 insertions(+), 336 deletions(-) delete mode 100644 .github/workflows/rust.yml delete mode 100644 .gitignore delete mode 100644 .vscode/extensions.json delete mode 100644 .vscode/settings.json delete mode 100644 LICENSE-APACHE delete mode 100644 LICENSE-MIT delete mode 100755 ci.sh rename {firmware => cyw43-firmware}/43439A0.bin (100%) rename {firmware => cyw43-firmware}/43439A0_clm.bin (100%) rename {firmware => cyw43-firmware}/LICENSE-permissive-binary-license-1.0.txt (100%) rename {firmware => cyw43-firmware}/README.md (100%) rename Cargo.toml => cyw43/Cargo.toml (100%) rename README.md => cyw43/README.md (100%) rename {src => cyw43/src}/bus.rs (100%) rename {src => cyw43/src}/consts.rs (100%) rename {src => cyw43/src}/control.rs (100%) rename {src => cyw43/src}/countries.rs (100%) rename {src => cyw43/src}/events.rs (100%) rename {src => cyw43/src}/fmt.rs (100%) rename {src => cyw43/src}/ioctl.rs (100%) rename {src => cyw43/src}/lib.rs (100%) rename {src => cyw43/src}/nvram.rs (100%) rename {src => cyw43/src}/runner.rs (100%) rename {src => cyw43/src}/structs.rs (100%) create mode 100644 examples/rpi-pico-w/Cargo.lock delete mode 100644 rust-toolchain.toml delete mode 100644 rustfmt.toml diff --git a/.github/workflows/rust.yml b/.github/workflows/rust.yml deleted file mode 100644 index 2cd3ba5d..00000000 --- a/.github/workflows/rust.yml +++ /dev/null @@ -1,29 +0,0 @@ -name: Rust - -on: - push: - branches: [master] - pull_request: - branches: [master] - merge_group: - -env: - CARGO_TERM_COLOR: always - -jobs: - build-nightly: - runs-on: ubuntu-latest - steps: - - uses: actions/checkout@v2 - - uses: actions/cache@v2 - with: - path: | - ~/.cargo/registry - ~/.cargo/git - target - key: ${{ runner.os }}-cargo-${{ hashFiles('**/Cargo.lock') }} - - - name: Check fmt - run: cargo fmt -- --check - - name: Build - run: ./ci.sh diff --git a/.gitignore b/.gitignore deleted file mode 100644 index 1e7caa9e..00000000 --- a/.gitignore +++ /dev/null @@ -1,2 +0,0 @@ -Cargo.lock -target/ diff --git a/.vscode/extensions.json b/.vscode/extensions.json deleted file mode 100644 index a8bb78ad..00000000 --- a/.vscode/extensions.json +++ /dev/null @@ -1,11 +0,0 @@ -{ - // See https://go.microsoft.com/fwlink/?LinkId=827846 to learn about workspace recommendations. - // Extension identifier format: ${publisher}.${name}. Example: vscode.csharp - // List of extensions which should be recommended for users of this workspace. - "recommendations": [ - "rust-lang.rust-analyzer", - "tamasfe.even-better-toml", - ], - // List of extensions recommended by VS Code that should not be recommended for users of this workspace. - "unwantedRecommendations": [] -} \ No newline at end of file diff --git a/.vscode/settings.json b/.vscode/settings.json deleted file mode 100644 index dd479929..00000000 --- a/.vscode/settings.json +++ /dev/null @@ -1,17 +0,0 @@ -{ - "editor.formatOnSave": true, - "[toml]": { - "editor.formatOnSave": false - }, - "rust-analyzer.cargo.target": "thumbv6m-none-eabi", - "rust-analyzer.cargo.noDefaultFeatures": true, - "rust-analyzer.check.allTargets": false, - "rust-analyzer.check.noDefaultFeatures": true, - "rust-analyzer.linkedProjects": [ - "examples/rpi-pico-w/Cargo.toml", - ], - "rust-analyzer.server.extraEnv": { - "WIFI_NETWORK": "foo", - "WIFI_PASSWORD": "foo", - } -} \ No newline at end of file diff --git a/LICENSE-APACHE b/LICENSE-APACHE deleted file mode 100644 index ea4fa15c..00000000 --- a/LICENSE-APACHE +++ /dev/null @@ -1,201 +0,0 @@ - Apache License - Version 2.0, January 2004 - http://www.apache.org/licenses/ - -TERMS AND CONDITIONS FOR USE, REPRODUCTION, AND DISTRIBUTION - -1. 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IN NO EVENT -SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY -CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION -OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR -IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER -DEALINGS IN THE SOFTWARE. diff --git a/ci.sh b/ci.sh deleted file mode 100755 index 91683820..00000000 --- a/ci.sh +++ /dev/null @@ -1,25 +0,0 @@ -#!/bin/bash - -set -euxo pipefail -cd $(dirname $0) - -export CARGO_TARGET_DIR=$(pwd)/target -export DEFMT_LOG=trace - -# build examples -#================== - -(cd examples/rpi-pico-w; WIFI_NETWORK=foo WIFI_PASSWORD=bar cargo build --release) - - -# build with log/defmt combinations -#===================================== - -cargo build --target thumbv6m-none-eabi --features '' -cargo build --target thumbv6m-none-eabi --features 'log' -cargo build --target thumbv6m-none-eabi --features 'defmt' -cargo build --target thumbv6m-none-eabi --features 'log,firmware-logs' -cargo build --target thumbv6m-none-eabi --features 'defmt,firmware-logs' - -(cd cyw43-pio; cargo build --target thumbv6m-none-eabi --features '') -(cd cyw43-pio; cargo build --target thumbv6m-none-eabi --features 'overclock') diff --git a/firmware/43439A0.bin b/cyw43-firmware/43439A0.bin similarity index 100% rename from firmware/43439A0.bin rename to cyw43-firmware/43439A0.bin diff --git a/firmware/43439A0_clm.bin b/cyw43-firmware/43439A0_clm.bin similarity index 100% rename from firmware/43439A0_clm.bin rename to cyw43-firmware/43439A0_clm.bin diff --git a/firmware/LICENSE-permissive-binary-license-1.0.txt b/cyw43-firmware/LICENSE-permissive-binary-license-1.0.txt similarity index 100% rename from firmware/LICENSE-permissive-binary-license-1.0.txt rename to cyw43-firmware/LICENSE-permissive-binary-license-1.0.txt diff --git a/firmware/README.md b/cyw43-firmware/README.md similarity index 100% rename from firmware/README.md rename to cyw43-firmware/README.md diff --git a/cyw43-pio/Cargo.toml b/cyw43-pio/Cargo.toml index 2238f761..a7af2c8e 100644 --- a/cyw43-pio/Cargo.toml +++ b/cyw43-pio/Cargo.toml @@ -9,7 +9,7 @@ edition = "2021" overclock = [] [dependencies] -cyw43 = { path = "../" } +cyw43 = { path = "../cyw43" } embassy-rp = { version = "0.1.0", features = ["unstable-traits", "nightly", "unstable-pac", "time-driver"] } pio-proc = "0.2" pio = "0.2.1" diff --git a/Cargo.toml b/cyw43/Cargo.toml similarity index 100% rename from Cargo.toml rename to cyw43/Cargo.toml diff --git a/README.md b/cyw43/README.md similarity index 100% rename from README.md rename to cyw43/README.md diff --git a/src/bus.rs b/cyw43/src/bus.rs similarity index 100% rename from src/bus.rs rename to cyw43/src/bus.rs diff --git a/src/consts.rs b/cyw43/src/consts.rs similarity index 100% rename from src/consts.rs rename to cyw43/src/consts.rs diff --git a/src/control.rs b/cyw43/src/control.rs similarity index 100% rename from src/control.rs rename to cyw43/src/control.rs diff --git a/src/countries.rs b/cyw43/src/countries.rs similarity index 100% rename from src/countries.rs rename to cyw43/src/countries.rs diff --git a/src/events.rs b/cyw43/src/events.rs similarity index 100% rename from src/events.rs rename to cyw43/src/events.rs diff --git a/src/fmt.rs b/cyw43/src/fmt.rs similarity index 100% rename from src/fmt.rs rename to cyw43/src/fmt.rs diff --git a/src/ioctl.rs b/cyw43/src/ioctl.rs similarity index 100% rename from src/ioctl.rs rename to cyw43/src/ioctl.rs diff --git a/src/lib.rs b/cyw43/src/lib.rs similarity index 100% rename from src/lib.rs rename to cyw43/src/lib.rs diff --git a/src/nvram.rs b/cyw43/src/nvram.rs similarity index 100% rename from src/nvram.rs rename to cyw43/src/nvram.rs diff --git a/src/runner.rs b/cyw43/src/runner.rs similarity index 100% rename from src/runner.rs rename to cyw43/src/runner.rs diff --git a/src/structs.rs b/cyw43/src/structs.rs similarity index 100% rename from src/structs.rs rename to cyw43/src/structs.rs diff --git a/examples/rpi-pico-w/Cargo.lock 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} embassy-executor = { version = "0.2.0", features = ["defmt", "integrated-timers", "executor-thread", "arch-cortex-m"] } embassy-time = { version = "0.1.0", features = ["defmt", "defmt-timestamp-uptime"] } diff --git a/examples/rpi-pico-w/src/bin/tcp_server.rs b/examples/rpi-pico-w/src/bin/tcp_server.rs index 8accc469..6a87e7c5 100644 --- a/examples/rpi-pico-w/src/bin/tcp_server.rs +++ b/examples/rpi-pico-w/src/bin/tcp_server.rs @@ -28,7 +28,11 @@ macro_rules! singleton { #[embassy_executor::task] async fn wifi_task( - runner: cyw43::Runner<'static, Output<'static, PIN_23>, PioSpi<'static, PIN_25, PIO0, 0, DMA_CH0>>, + runner: cyw43::Runner< + 'static, + Output<'static, PIN_23>, + PioSpi<'static, PIN_25, PIO0, 0, DMA_CH0>, + >, ) -> ! { runner.run().await } @@ -44,8 +48,8 @@ async fn main(spawner: Spawner) { let p = embassy_rp::init(Default::default()); - let fw = include_bytes!("../../../../firmware/43439A0.bin"); - let clm = include_bytes!("../../../../firmware/43439A0_clm.bin"); + let fw = include_bytes!("../../../../cyw43-firmware/43439A0.bin"); + let clm = include_bytes!("../../../../cyw43-firmware/43439A0_clm.bin"); // To make flashing faster for development, you may want to flash the firmwares independently // at hardcoded addresses, instead of baking them into the program with `include_bytes!`: @@ -57,7 +61,15 @@ async fn main(spawner: Spawner) { let pwr = Output::new(p.PIN_23, Level::Low); let cs = Output::new(p.PIN_25, Level::High); let mut pio = Pio::new(p.PIO0); - let spi = PioSpi::new(&mut pio.common, pio.sm0, pio.irq0, cs, p.PIN_24, p.PIN_29, p.DMA_CH0); + let spi = PioSpi::new( + &mut pio.common, + pio.sm0, + pio.irq0, + cs, + p.PIN_24, + p.PIN_29, + p.DMA_CH0, + ); let state = singleton!(cyw43::State::new()); let (net_device, mut control, runner) = cyw43::new(state, pwr, spi, fw).await; @@ -90,7 +102,10 @@ async fn main(spawner: Spawner) { loop { //control.join_open(env!("WIFI_NETWORK")).await; - match control.join_wpa2(env!("WIFI_NETWORK"), env!("WIFI_PASSWORD")).await { + match control + .join_wpa2(env!("WIFI_NETWORK"), env!("WIFI_PASSWORD")) + .await + { Ok(_) => break, Err(err) => { info!("join failed with status={}", err.status); diff --git a/examples/rpi-pico-w/src/bin/tcp_server_ap.rs b/examples/rpi-pico-w/src/bin/tcp_server_ap.rs index ee2c3237..24ff7767 100644 --- a/examples/rpi-pico-w/src/bin/tcp_server_ap.rs +++ b/examples/rpi-pico-w/src/bin/tcp_server_ap.rs @@ -28,7 +28,11 @@ macro_rules! singleton { #[embassy_executor::task] async fn wifi_task( - runner: cyw43::Runner<'static, Output<'static, PIN_23>, PioSpi<'static, PIN_25, PIO0, 0, DMA_CH0>>, + runner: cyw43::Runner< + 'static, + Output<'static, PIN_23>, + PioSpi<'static, PIN_25, PIO0, 0, DMA_CH0>, + >, ) -> ! { runner.run().await } @@ -44,8 +48,8 @@ async fn main(spawner: Spawner) { let p = embassy_rp::init(Default::default()); - let fw = include_bytes!("../../../../firmware/43439A0.bin"); - let clm = include_bytes!("../../../../firmware/43439A0_clm.bin"); + let fw = include_bytes!("../../../../cyw43-firmware/43439A0.bin"); + let clm = include_bytes!("../../../../cyw43-firmware/43439A0_clm.bin"); // To make flashing faster for development, you may want to flash the firmwares independently // at hardcoded addresses, instead of baking them into the program with `include_bytes!`: @@ -57,7 +61,15 @@ async fn main(spawner: Spawner) { let pwr = Output::new(p.PIN_23, Level::Low); let cs = Output::new(p.PIN_25, Level::High); let mut pio = Pio::new(p.PIO0); - let spi = PioSpi::new(&mut pio.common, pio.sm0, pio.irq0, cs, p.PIN_24, p.PIN_29, p.DMA_CH0); + let spi = PioSpi::new( + &mut pio.common, + pio.sm0, + pio.irq0, + cs, + p.PIN_24, + p.PIN_29, + p.DMA_CH0, + ); let state = singleton!(cyw43::State::new()); let (net_device, mut control, runner) = cyw43::new(state, pwr, spi, fw).await; diff --git a/examples/rpi-pico-w/src/bin/wifi_scan.rs b/examples/rpi-pico-w/src/bin/wifi_scan.rs index a2a44f99..8fb6c65a 100644 --- a/examples/rpi-pico-w/src/bin/wifi_scan.rs +++ b/examples/rpi-pico-w/src/bin/wifi_scan.rs @@ -26,7 +26,11 @@ macro_rules! singleton { #[embassy_executor::task] async fn wifi_task( - runner: cyw43::Runner<'static, Output<'static, PIN_23>, PioSpi<'static, PIN_25, PIO0, 0, DMA_CH0>>, + runner: cyw43::Runner< + 'static, + Output<'static, PIN_23>, + PioSpi<'static, PIN_25, PIO0, 0, DMA_CH0>, + >, ) -> ! { runner.run().await } @@ -42,8 +46,8 @@ async fn main(spawner: Spawner) { let p = embassy_rp::init(Default::default()); - let fw = include_bytes!("../../../../firmware/43439A0.bin"); - let clm = include_bytes!("../../../../firmware/43439A0_clm.bin"); + let fw = include_bytes!("../../../../cyw43-firmware/43439A0.bin"); + let clm = include_bytes!("../../../../cyw43-firmware/43439A0_clm.bin"); // To make flashing faster for development, you may want to flash the firmwares independently // at hardcoded addresses, instead of baking them into the program with `include_bytes!`: @@ -55,7 +59,15 @@ async fn main(spawner: Spawner) { let pwr = Output::new(p.PIN_23, Level::Low); let cs = Output::new(p.PIN_25, Level::High); let mut pio = Pio::new(p.PIO0); - let spi = PioSpi::new(&mut pio.common, pio.sm0, pio.irq0, cs, p.PIN_24, p.PIN_29, p.DMA_CH0); + let spi = PioSpi::new( + &mut pio.common, + pio.sm0, + pio.irq0, + cs, + p.PIN_24, + p.PIN_29, + p.DMA_CH0, + ); let state = singleton!(cyw43::State::new()); let (_net_device, mut control, runner) = cyw43::new(state, pwr, spi, fw).await; diff --git a/rust-toolchain.toml b/rust-toolchain.toml deleted file mode 100644 index 2582e88f..00000000 --- a/rust-toolchain.toml +++ /dev/null @@ -1,8 +0,0 @@ -# Before upgrading check that everything is available on all tier1 targets here: -# https://rust-lang.github.io/rustup-components-history -[toolchain] -channel = "nightly-2023-04-18" -components = [ "rust-src", "rustfmt" ] -targets = [ - "thumbv6m-none-eabi", -] diff --git a/rustfmt.toml b/rustfmt.toml deleted file mode 100644 index 3639f438..00000000 --- a/rustfmt.toml +++ /dev/null @@ -1,3 +0,0 @@ -group_imports = "StdExternalCrate" -imports_granularity = "Module" -max_width=120 \ No newline at end of file From 3f35a8876ee65d030e32ab2444bc0abb29d88382 Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Tue, 30 May 2023 23:22:34 +0200 Subject: [PATCH 130/130] cyw43: adapt build to main embassy repo. --- ci.sh | 11 + cyw43-pio/Cargo.toml | 6 +- cyw43/Cargo.toml | 20 +- examples/rp/Cargo.toml | 3 + .../src/bin/wifi_ap_tcp_server.rs} | 19 +- .../{rpi-pico-w => rp}/src/bin/wifi_scan.rs | 16 +- .../src/bin/wifi_tcp_server.rs} | 24 +- examples/rpi-pico-w/.cargo/config.toml | 8 - examples/rpi-pico-w/Cargo.lock | 1707 ----------------- examples/rpi-pico-w/Cargo.toml | 67 - examples/rpi-pico-w/build.rs | 36 - examples/rpi-pico-w/memory.x | 5 - 12 files changed, 32 insertions(+), 1890 deletions(-) rename examples/{rpi-pico-w/src/bin/tcp_server_ap.rs => rp/src/bin/wifi_ap_tcp_server.rs} (91%) rename examples/{rpi-pico-w => rp}/src/bin/wifi_scan.rs (88%) rename examples/{rpi-pico-w/src/bin/tcp_server.rs => rp/src/bin/wifi_tcp_server.rs} (89%) delete mode 100644 examples/rpi-pico-w/.cargo/config.toml delete mode 100644 examples/rpi-pico-w/Cargo.lock delete mode 100644 examples/rpi-pico-w/Cargo.toml delete mode 100644 examples/rpi-pico-w/build.rs delete mode 100644 examples/rpi-pico-w/memory.x diff --git a/ci.sh b/ci.sh index 1eafda3a..8a3669f0 100755 --- a/ci.sh +++ b/ci.sh @@ -5,6 +5,10 @@ set -euo pipefail export RUSTFLAGS=-Dwarnings export DEFMT_LOG=trace +# needed by wifi examples +export WIFI_NETWORK=x +export WIFI_PASSWORD=x + TARGET=$(rustc -vV | sed -n 's|host: ||p') BUILD_EXTRA="" @@ -82,6 +86,13 @@ cargo batch \ --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7m-none-eabi --features nightly,stm32f100c4,defmt,exti,time-driver-any,unstable-traits \ --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7m-none-eabi --features nightly,stm32h503rb,defmt,exti,time-driver-any,unstable-traits \ --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7m-none-eabi --features nightly,stm32h562ag,defmt,exti,time-driver-any,unstable-traits \ + --- build --release --manifest-path cyw43/Cargo.toml --target thumbv6m-none-eabi --features ''\ + --- build --release --manifest-path cyw43/Cargo.toml --target thumbv6m-none-eabi --features 'log' \ + --- build --release --manifest-path cyw43/Cargo.toml --target thumbv6m-none-eabi --features 'defmt' \ + --- build --release --manifest-path cyw43/Cargo.toml --target thumbv6m-none-eabi --features 'log,firmware-logs' \ + --- build --release --manifest-path cyw43/Cargo.toml --target thumbv6m-none-eabi --features 'defmt,firmware-logs' \ + --- build --release --manifest-path cyw43-pio/Cargo.toml --target thumbv6m-none-eabi --features '' \ + --- build --release --manifest-path cyw43-pio/Cargo.toml --target thumbv6m-none-eabi --features 'overclock' \ --- build --release --manifest-path embassy-boot/nrf/Cargo.toml --target thumbv7em-none-eabi --features embassy-nrf/nrf52840,nightly \ --- build --release --manifest-path embassy-boot/nrf/Cargo.toml --target thumbv8m.main-none-eabihf --features embassy-nrf/nrf9160-ns,nightly \ --- build --release --manifest-path embassy-boot/rp/Cargo.toml --target thumbv6m-none-eabi --features nightly \ diff --git a/cyw43-pio/Cargo.toml b/cyw43-pio/Cargo.toml index a7af2c8e..6e9e784a 100644 --- a/cyw43-pio/Cargo.toml +++ b/cyw43-pio/Cargo.toml @@ -9,9 +9,9 @@ edition = "2021" overclock = [] [dependencies] -cyw43 = { path = "../cyw43" } -embassy-rp = { version = "0.1.0", features = ["unstable-traits", "nightly", "unstable-pac", "time-driver"] } +cyw43 = { version = "0.1.0", path = "../cyw43" } +embassy-rp = { version = "0.1.0", path = "../embassy-rp" } pio-proc = "0.2" pio = "0.2.1" fixed = "1.23.1" -defmt = { version = "0.3", optional = true } \ No newline at end of file +defmt = { version = "0.3", optional = true } diff --git a/cyw43/Cargo.toml b/cyw43/Cargo.toml index 2bb2b8d9..c7f8816f 100644 --- a/cyw43/Cargo.toml +++ b/cyw43/Cargo.toml @@ -11,10 +11,10 @@ log = ["dep:log"] firmware-logs = [] [dependencies] -embassy-time = { version = "0.1.0" } -embassy-sync = { version = "0.2.0" } -embassy-futures = { version = "0.1.0" } -embassy-net-driver-channel = { version = "0.1.0" } +embassy-time = { version = "0.1.0", path = "../embassy-time"} +embassy-sync = { version = "0.2.0", path = "../embassy-sync"} +embassy-futures = { version = "0.1.0", path = "../embassy-futures"} +embassy-net-driver-channel = { version = "0.1.0", path = "../embassy-net-driver-channel"} atomic-polyfill = "0.1.5" defmt = { version = "0.3", optional = true } @@ -26,15 +26,3 @@ futures = { version = "0.3.17", default-features = false, features = ["async-awa embedded-hal-1 = { package = "embedded-hal", version = "1.0.0-alpha.10" } num_enum = { version = "0.5.7", default-features = false } - -[patch.crates-io] -embassy-time = { git = "https://github.com/embassy-rs/embassy", rev = "82f7e104d90a6628d1873017ea5ef6a7afb3b3f7" } -embassy-futures = { git = "https://github.com/embassy-rs/embassy", rev = "82f7e104d90a6628d1873017ea5ef6a7afb3b3f7" } -embassy-sync = { git = "https://github.com/embassy-rs/embassy", rev = "82f7e104d90a6628d1873017ea5ef6a7afb3b3f7" } -embassy-net-driver-channel = { git = "https://github.com/embassy-rs/embassy", rev = "82f7e104d90a6628d1873017ea5ef6a7afb3b3f7" } -embassy-rp = { git = "https://github.com/embassy-rs/embassy", rev = "82f7e104d90a6628d1873017ea5ef6a7afb3b3f7" } - -[workspace] -members = ["cyw43-pio"] -default-members = ["cyw43-pio", "."] -exclude = ["examples"] \ No newline at end of file diff --git a/examples/rp/Cargo.toml b/examples/rp/Cargo.toml index ffeb69f1..f77377a6 100644 --- a/examples/rp/Cargo.toml +++ b/examples/rp/Cargo.toml @@ -19,6 +19,8 @@ embassy-lora = { version = "0.1.0", path = "../../embassy-lora", features = ["ti lora-phy = { version = "1" } lorawan-device = { version = "0.10.0", default-features = false, features = ["async", "external-lora-phy"] } lorawan = { version = "0.7.3", default-features = false, features = ["default-crypto"] } +cyw43 = { path = "../../cyw43", features = ["defmt", "firmware-logs"] } +cyw43-pio = { path = "../../cyw43-pio", features = ["defmt", "overclock"] } defmt = "0.3" defmt-rtt = "0.4" @@ -36,6 +38,7 @@ st7789 = "0.6.1" display-interface = "0.4.1" byte-slice-cast = { version = "1.2.0", default-features = false } smart-leds = "0.3.0" +heapless = "0.7.15" embedded-hal-1 = { package = "embedded-hal", version = "=1.0.0-alpha.10" } embedded-hal-async = "0.2.0-alpha.1" diff --git a/examples/rpi-pico-w/src/bin/tcp_server_ap.rs b/examples/rp/src/bin/wifi_ap_tcp_server.rs similarity index 91% rename from examples/rpi-pico-w/src/bin/tcp_server_ap.rs rename to examples/rp/src/bin/wifi_ap_tcp_server.rs index 24ff7767..15264524 100644 --- a/examples/rpi-pico-w/src/bin/tcp_server_ap.rs +++ b/examples/rp/src/bin/wifi_ap_tcp_server.rs @@ -14,6 +14,7 @@ use embassy_net::{Config, Stack, StackResources}; use embassy_rp::gpio::{Level, Output}; use embassy_rp::peripherals::{DMA_CH0, PIN_23, PIN_25, PIO0}; use embassy_rp::pio::Pio; +use embassy_time::Duration; use embedded_io::asynch::Write; use static_cell::StaticCell; use {defmt_rtt as _, panic_probe as _}; @@ -28,11 +29,7 @@ macro_rules! singleton { #[embassy_executor::task] async fn wifi_task( - runner: cyw43::Runner< - 'static, - Output<'static, PIN_23>, - PioSpi<'static, PIN_25, PIO0, 0, DMA_CH0>, - >, + runner: cyw43::Runner<'static, Output<'static, PIN_23>, PioSpi<'static, PIN_25, PIO0, 0, DMA_CH0>>, ) -> ! { runner.run().await } @@ -61,15 +58,7 @@ async fn main(spawner: Spawner) { let pwr = Output::new(p.PIN_23, Level::Low); let cs = Output::new(p.PIN_25, Level::High); let mut pio = Pio::new(p.PIO0); - let spi = PioSpi::new( - &mut pio.common, - pio.sm0, - pio.irq0, - cs, - p.PIN_24, - p.PIN_29, - p.DMA_CH0, - ); + let spi = PioSpi::new(&mut pio.common, pio.sm0, pio.irq0, cs, p.PIN_24, p.PIN_29, p.DMA_CH0); let state = singleton!(cyw43::State::new()); let (net_device, mut control, runner) = cyw43::new(state, pwr, spi, fw).await; @@ -111,7 +100,7 @@ async fn main(spawner: Spawner) { loop { let mut socket = TcpSocket::new(stack, &mut rx_buffer, &mut tx_buffer); - socket.set_timeout(Some(embassy_net::SmolDuration::from_secs(10))); + socket.set_timeout(Some(Duration::from_secs(10))); control.gpio_set(0, false).await; info!("Listening on TCP:1234..."); diff --git a/examples/rpi-pico-w/src/bin/wifi_scan.rs b/examples/rp/src/bin/wifi_scan.rs similarity index 88% rename from examples/rpi-pico-w/src/bin/wifi_scan.rs rename to examples/rp/src/bin/wifi_scan.rs index 8fb6c65a..aa5e5a39 100644 --- a/examples/rpi-pico-w/src/bin/wifi_scan.rs +++ b/examples/rp/src/bin/wifi_scan.rs @@ -26,11 +26,7 @@ macro_rules! singleton { #[embassy_executor::task] async fn wifi_task( - runner: cyw43::Runner< - 'static, - Output<'static, PIN_23>, - PioSpi<'static, PIN_25, PIO0, 0, DMA_CH0>, - >, + runner: cyw43::Runner<'static, Output<'static, PIN_23>, PioSpi<'static, PIN_25, PIO0, 0, DMA_CH0>>, ) -> ! { runner.run().await } @@ -59,15 +55,7 @@ async fn main(spawner: Spawner) { let pwr = Output::new(p.PIN_23, Level::Low); let cs = Output::new(p.PIN_25, Level::High); let mut pio = Pio::new(p.PIO0); - let spi = PioSpi::new( - &mut pio.common, - pio.sm0, - pio.irq0, - cs, - p.PIN_24, - p.PIN_29, - p.DMA_CH0, - ); + let spi = PioSpi::new(&mut pio.common, pio.sm0, pio.irq0, cs, p.PIN_24, p.PIN_29, p.DMA_CH0); let state = singleton!(cyw43::State::new()); let (_net_device, mut control, runner) = cyw43::new(state, pwr, spi, fw).await; diff --git a/examples/rpi-pico-w/src/bin/tcp_server.rs b/examples/rp/src/bin/wifi_tcp_server.rs similarity index 89% rename from examples/rpi-pico-w/src/bin/tcp_server.rs rename to examples/rp/src/bin/wifi_tcp_server.rs index 6a87e7c5..eafa25f6 100644 --- a/examples/rpi-pico-w/src/bin/tcp_server.rs +++ b/examples/rp/src/bin/wifi_tcp_server.rs @@ -14,6 +14,7 @@ use embassy_net::{Config, Stack, StackResources}; use embassy_rp::gpio::{Level, Output}; use embassy_rp::peripherals::{DMA_CH0, PIN_23, PIN_25, PIO0}; use embassy_rp::pio::Pio; +use embassy_time::Duration; use embedded_io::asynch::Write; use static_cell::StaticCell; use {defmt_rtt as _, panic_probe as _}; @@ -28,11 +29,7 @@ macro_rules! singleton { #[embassy_executor::task] async fn wifi_task( - runner: cyw43::Runner< - 'static, - Output<'static, PIN_23>, - PioSpi<'static, PIN_25, PIO0, 0, DMA_CH0>, - >, + runner: cyw43::Runner<'static, Output<'static, PIN_23>, PioSpi<'static, PIN_25, PIO0, 0, DMA_CH0>>, ) -> ! { runner.run().await } @@ -61,15 +58,7 @@ async fn main(spawner: Spawner) { let pwr = Output::new(p.PIN_23, Level::Low); let cs = Output::new(p.PIN_25, Level::High); let mut pio = Pio::new(p.PIO0); - let spi = PioSpi::new( - &mut pio.common, - pio.sm0, - pio.irq0, - cs, - p.PIN_24, - p.PIN_29, - p.DMA_CH0, - ); + let spi = PioSpi::new(&mut pio.common, pio.sm0, pio.irq0, cs, p.PIN_24, p.PIN_29, p.DMA_CH0); let state = singleton!(cyw43::State::new()); let (net_device, mut control, runner) = cyw43::new(state, pwr, spi, fw).await; @@ -102,10 +91,7 @@ async fn main(spawner: Spawner) { loop { //control.join_open(env!("WIFI_NETWORK")).await; - match control - .join_wpa2(env!("WIFI_NETWORK"), env!("WIFI_PASSWORD")) - .await - { + match control.join_wpa2(env!("WIFI_NETWORK"), env!("WIFI_PASSWORD")).await { Ok(_) => break, Err(err) => { info!("join failed with status={}", err.status); @@ -121,7 +107,7 @@ async fn main(spawner: Spawner) { loop { let mut socket = TcpSocket::new(stack, &mut rx_buffer, &mut tx_buffer); - socket.set_timeout(Some(embassy_net::SmolDuration::from_secs(10))); + socket.set_timeout(Some(Duration::from_secs(10))); control.gpio_set(0, false).await; info!("Listening on TCP:1234..."); diff --git a/examples/rpi-pico-w/.cargo/config.toml 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diff --git a/examples/rpi-pico-w/build.rs b/examples/rpi-pico-w/build.rs deleted file mode 100644 index 3f915f93..00000000 --- a/examples/rpi-pico-w/build.rs +++ /dev/null @@ -1,36 +0,0 @@ -//! This build script copies the `memory.x` file from the crate root into -//! a directory where the linker can always find it at build time. -//! For many projects this is optional, as the linker always searches the -//! project root directory -- wherever `Cargo.toml` is. However, if you -//! are using a workspace or have a more complicated build setup, this -//! build script becomes required. Additionally, by requesting that -//! Cargo re-run the build script whenever `memory.x` is changed, -//! updating `memory.x` ensures a rebuild of the application with the -//! new memory settings. - -use std::env; -use std::fs::File; -use std::io::Write; -use std::path::PathBuf; - -fn main() { - // Put `memory.x` in our output directory and ensure it's - // on the linker search path. - let out = &PathBuf::from(env::var_os("OUT_DIR").unwrap()); - File::create(out.join("memory.x")) - .unwrap() - .write_all(include_bytes!("memory.x")) - .unwrap(); - println!("cargo:rustc-link-search={}", out.display()); - - // By default, Cargo will re-run a build script whenever - // any file in the project changes. By specifying `memory.x` - // here, we ensure the build script is only re-run when - // `memory.x` is changed. - println!("cargo:rerun-if-changed=memory.x"); - - println!("cargo:rustc-link-arg-bins=--nmagic"); - println!("cargo:rustc-link-arg-bins=-Tlink.x"); - println!("cargo:rustc-link-arg-bins=-Tlink-rp.x"); - println!("cargo:rustc-link-arg-bins=-Tdefmt.x"); -} diff --git a/examples/rpi-pico-w/memory.x b/examples/rpi-pico-w/memory.x deleted file mode 100644 index eb8c1731..00000000 --- a/examples/rpi-pico-w/memory.x +++ /dev/null @@ -1,5 +0,0 @@ -MEMORY { - BOOT2 : ORIGIN = 0x10000000, LENGTH = 0x100 - FLASH : ORIGIN = 0x10000100, LENGTH = 1024K - 0x100 - RAM : ORIGIN = 0x20000000, LENGTH = 256K -} \ No newline at end of file