cortex-m: remove owned interrupts.
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@ -5,7 +5,7 @@ use core::sync::atomic::{compiler_fence, Ordering};
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use core::task::{Context, Poll};
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use atomic_polyfill::{AtomicU32, AtomicU8};
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use embassy_cortex_m::interrupt::{Interrupt, InterruptExt};
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use embassy_cortex_m::interrupt::Interrupt;
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use embassy_hal_common::{into_ref, Peripheral, PeripheralRef};
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use embassy_sync::waitqueue::AtomicWaker;
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use fixed::types::extra::U8;
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@ -110,17 +110,15 @@ unsafe fn PIO1_IRQ_0() {
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}
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pub(crate) unsafe fn init() {
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let irq = interrupt::PIO0_IRQ_0::steal();
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irq.disable();
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irq.set_priority(interrupt::Priority::P3);
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interrupt::PIO0_IRQ_0::disable();
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interrupt::PIO0_IRQ_0::set_priority(interrupt::Priority::P3);
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pac::PIO0.irqs(0).inte().write(|m| m.0 = 0);
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irq.enable();
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interrupt::PIO0_IRQ_0::enable();
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let irq = interrupt::PIO1_IRQ_0::steal();
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irq.disable();
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irq.set_priority(interrupt::Priority::P3);
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interrupt::PIO1_IRQ_0::disable();
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interrupt::PIO1_IRQ_0::set_priority(interrupt::Priority::P3);
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pac::PIO1.irqs(0).inte().write(|m| m.0 = 0);
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irq.enable();
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interrupt::PIO1_IRQ_0::enable();
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}
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/// Future that waits for TX-FIFO to become writable
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