cortex-m: remove owned interrupts.
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@ -3,7 +3,7 @@ use core::slice;
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use core::task::Poll;
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use atomic_polyfill::{AtomicU8, Ordering};
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use embassy_cortex_m::interrupt::{self, Binding, Interrupt, InterruptExt};
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use embassy_cortex_m::interrupt::{self, Binding, Interrupt};
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use embassy_hal_common::atomic_ring_buffer::RingBuffer;
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use embassy_sync::waitqueue::AtomicWaker;
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use embassy_time::{Duration, Timer};
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@ -80,8 +80,8 @@ pub(crate) fn init_buffers<'d, T: Instance + 'd>(
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w.set_txim(true);
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});
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T::Interrupt::steal().unpend();
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T::Interrupt::steal().enable();
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T::Interrupt::unpend();
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T::Interrupt::enable();
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};
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}
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@ -362,7 +362,7 @@ impl<'d, T: Instance> BufferedUartTx<'d, T> {
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// FIFO and the number of bytes drops below a threshold. When the
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// FIFO was empty we have to manually pend the interrupt to shovel
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// TX data from the buffer into the FIFO.
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unsafe { T::Interrupt::steal() }.pend();
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T::Interrupt::pend();
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Poll::Ready(Ok(n))
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})
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}
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@ -398,7 +398,7 @@ impl<'d, T: Instance> BufferedUartTx<'d, T> {
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// FIFO and the number of bytes drops below a threshold. When the
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// FIFO was empty we have to manually pend the interrupt to shovel
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// TX data from the buffer into the FIFO.
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unsafe { T::Interrupt::steal() }.pend();
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T::Interrupt::pend();
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return Ok(n);
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}
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}
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@ -460,7 +460,7 @@ impl<'d, T: Instance> Drop for BufferedUartRx<'d, T> {
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// TX is inactive if the the buffer is not available.
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// We can now unregister the interrupt handler
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if state.tx_buf.len() == 0 {
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T::Interrupt::steal().disable();
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T::Interrupt::disable();
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}
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}
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}
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@ -475,7 +475,7 @@ impl<'d, T: Instance> Drop for BufferedUartTx<'d, T> {
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// RX is inactive if the the buffer is not available.
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// We can now unregister the interrupt handler
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if state.rx_buf.len() == 0 {
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T::Interrupt::steal().disable();
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T::Interrupt::disable();
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}
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}
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}
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