Merge #455
455: simple_playback api from nrf sdk r=Dirbaio a=jacobrosenthal Port of the nrf_drv_pwm_simple_playback call from the nordic sdk that allows you to set up a sequence to play across leds with no interaction necessary using the 'shorts' registers to trigger looping sequences Co-authored-by: Jacob Rosenthal <jacobrosenthal@gmail.com>
This commit is contained in:
bors[bot]
GitHub
commit
4112759a8f
@ -1,54 +1,78 @@
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#![macro_use]
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use core::cell::UnsafeCell;
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use core::marker::PhantomData;
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use core::sync::atomic::{compiler_fence, Ordering};
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use embassy::util::Unborrow;
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use embassy_hal_common::unborrow;
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use crate::gpio::sealed::Pin as _;
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use crate::gpio::OptionalPin as GpioOptionalPin;
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use crate::gpio::{AnyPin, OptionalPin as GpioOptionalPin};
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use crate::interrupt::Interrupt;
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use crate::pac;
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use crate::util::slice_in_ram_or;
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#[derive(Debug, Eq, PartialEq, Clone, Copy)]
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pub enum Prescaler {
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Div1,
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Div2,
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Div4,
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Div8,
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Div16,
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Div32,
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Div64,
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Div128,
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}
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/// Interface to the UARTE peripheral
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pub struct Pwm<'d, T: Instance> {
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/// SimplePwm is the traditional pwm interface you're probably used to, allowing
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/// to simply set a duty cycle across up to four channels.
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pub struct SimplePwm<'d, T: Instance> {
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phantom: PhantomData<&'d mut T>,
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duty: [u16; 4],
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ch0: Option<AnyPin>,
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ch1: Option<AnyPin>,
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ch2: Option<AnyPin>,
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ch3: Option<AnyPin>,
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}
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impl<'d, T: Instance> Pwm<'d, T> {
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/// Creates the interface to a UARTE instance.
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/// Sets the baud rate, parity and assigns the pins to the UARTE peripheral.
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/// SequencePwm allows you to offload the updating of a sequence of duty cycles
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/// to up to four channels, as well as repeat that sequence n times.
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pub struct SequencePwm<'d, T: Instance> {
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phantom: PhantomData<&'d mut T>,
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ch0: Option<AnyPin>,
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ch1: Option<AnyPin>,
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ch2: Option<AnyPin>,
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ch3: Option<AnyPin>,
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}
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#[derive(Debug, Clone, Copy, PartialEq, Eq)]
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#[cfg_attr(feature = "defmt", derive(defmt::Format))]
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#[non_exhaustive]
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pub enum Error {
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/// Max Sequence size is 32767
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SequenceTooLong,
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/// Min Sequence count is 1
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SequenceTimesAtLeastOne,
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/// EasyDMA can only read from data memory, read only buffers in flash will fail.
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DMABufferNotInDataMemory,
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}
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impl<'d, T: Instance> SequencePwm<'d, T> {
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/// Creates the interface to a `SequencePwm`.
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///
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/// Must be started by calling `start`
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///
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/// # Safety
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///
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/// The returned API is safe unless you use `mem::forget` (or similar safe mechanisms)
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/// on stack allocated buffers which which have been passed to [`send()`](Pwm::send)
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/// or [`receive`](Pwm::receive).
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/// The returned API is safe unless you use `mem::forget` (or similar safe
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/// mechanisms) on stack allocated buffers which which have been passed to
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/// [`new()`](SequencePwm::new).
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#[allow(unused_unsafe)]
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pub fn new(
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pub fn new<'a>(
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_pwm: impl Unborrow<Target = T> + 'd,
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ch0: impl Unborrow<Target = impl GpioOptionalPin> + 'd,
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ch1: impl Unborrow<Target = impl GpioOptionalPin> + 'd,
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ch2: impl Unborrow<Target = impl GpioOptionalPin> + 'd,
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ch3: impl Unborrow<Target = impl GpioOptionalPin> + 'd,
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) -> Self {
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config: SequenceConfig,
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sequence: &'a [u16],
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) -> Result<Self, Error> {
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slice_in_ram_or(sequence, Error::DMABufferNotInDataMemory)?;
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if sequence.len() > 32767 {
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return Err(Error::SequenceTooLong);
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}
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unborrow!(ch0, ch1, ch2, ch3);
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let r = T::regs();
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let s = T::state();
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if let Some(pin) = ch0.pin_mut() {
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pin.set_low();
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@ -66,6 +90,9 @@ impl<'d, T: Instance> Pwm<'d, T> {
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pin.set_low();
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pin.conf().write(|w| w.dir().output());
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}
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// if NoPin provided writes disconnected (top bit 1) 0x80000000 else
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// writes pin number ex 13 (0x0D) which is connected (top bit 0)
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r.psel.out[0].write(|w| unsafe { w.bits(ch0.psel_bits()) });
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r.psel.out[1].write(|w| unsafe { w.bits(ch1.psel_bits()) });
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r.psel.out[2].write(|w| unsafe { w.bits(ch2.psel_bits()) });
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@ -73,15 +100,306 @@ impl<'d, T: Instance> Pwm<'d, T> {
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// Disable all interrupts
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r.intenclr.write(|w| unsafe { w.bits(0xFFFF_FFFF) });
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r.shorts.reset();
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// Enable
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r.enable.write(|w| w.enable().enabled());
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r.seq0
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.ptr
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.write(|w| unsafe { w.bits(&s.duty as *const _ as u32) });
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.write(|w| unsafe { w.bits(sequence.as_ptr() as u32) });
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r.seq0
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.cnt
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.write(|w| unsafe { w.bits(sequence.len() as u32) });
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r.seq0.refresh.write(|w| unsafe { w.bits(config.refresh) });
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r.seq0
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.enddelay
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.write(|w| unsafe { w.bits(config.end_delay) });
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r.seq1
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.ptr
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.write(|w| unsafe { w.bits(sequence.as_ptr() as u32) });
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r.seq1
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.cnt
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.write(|w| unsafe { w.bits(sequence.len() as u32) });
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r.seq1.refresh.write(|w| unsafe { w.bits(config.refresh) });
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r.seq1
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.enddelay
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.write(|w| unsafe { w.bits(config.end_delay) });
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r.decoder.write(|w| {
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w.load().bits(config.sequence_load as u8);
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w.mode().refresh_count()
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});
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r.mode.write(|w| match config.counter_mode {
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CounterMode::UpAndDown => w.updown().up_and_down(),
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CounterMode::Up => w.updown().up(),
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});
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r.prescaler
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.write(|w| w.prescaler().bits(config.prescaler as u8));
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r.countertop
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.write(|w| unsafe { w.countertop().bits(config.top) });
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Ok(Self {
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phantom: PhantomData,
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ch0: ch0.degrade_optional(),
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ch1: ch1.degrade_optional(),
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ch2: ch2.degrade_optional(),
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ch3: ch3.degrade_optional(),
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})
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}
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/// Start or restart playback
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#[inline(always)]
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pub fn start(&self, times: SequenceMode) -> Result<(), Error> {
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if let SequenceMode::Times(0) = times {
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return Err(Error::SequenceTimesAtLeastOne);
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}
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let r = T::regs();
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self.stop();
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r.enable.write(|w| w.enable().enabled());
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// defensive before seqstart
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compiler_fence(Ordering::SeqCst);
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match times {
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// just the one time, no loop count
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SequenceMode::Times(1) => {
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r.loop_.write(|w| w.cnt().disabled());
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// tasks_seqstart() doesn't exist in all svds so write its bit instead
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r.tasks_seqstart[0].write(|w| unsafe { w.bits(0x01) });
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}
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// loop count is how many times to play BOTH sequences
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// 2 total (1 x 2)
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// 3 total, (2 x 2) - 1
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SequenceMode::Times(n) => {
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let odd = n & 1 == 1;
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let times = if odd { (n / 2) + 1 } else { n / 2 };
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r.loop_.write(|w| unsafe { w.cnt().bits(times) });
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// we can subtract 1 by starting at seq1 instead of seq0
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if odd {
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// tasks_seqstart() doesn't exist in all svds so write its bit instead
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r.tasks_seqstart[1].write(|w| unsafe { w.bits(0x01) });
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} else {
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// tasks_seqstart() doesn't exist in all svds so write its bit instead
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r.tasks_seqstart[0].write(|w| unsafe { w.bits(0x01) });
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}
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}
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// to play infinitely, repeat the sequence one time, then have loops done self trigger seq0 again
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SequenceMode::Infinite => {
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r.loop_.write(|w| unsafe { w.cnt().bits(0x1) });
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r.shorts.write(|w| w.loopsdone_seqstart0().enabled());
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// tasks_seqstart() doesn't exist in all svds so write its bit instead
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r.tasks_seqstart[0].write(|w| unsafe { w.bits(0x01) });
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}
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}
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Ok(())
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}
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/// Stop playback.
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#[inline(always)]
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pub fn stop(&self) {
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let r = T::regs();
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r.shorts.reset();
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compiler_fence(Ordering::SeqCst);
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// tasks_stop() doesn't exist in all svds so write its bit instead
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r.tasks_stop.write(|w| unsafe { w.bits(0x01) });
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}
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/// Disables the PWM generator.
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#[inline(always)]
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pub fn disable(&self) {
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let r = T::regs();
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r.enable.write(|w| w.enable().disabled());
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}
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}
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impl<'a, T: Instance> Drop for SequencePwm<'a, T> {
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fn drop(&mut self) {
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let r = T::regs();
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self.stop();
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self.disable();
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if let Some(pin) = &self.ch0 {
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pin.set_low();
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pin.conf().write(|w| w);
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r.psel.out[0].write(|w| unsafe { w.bits(0x80000000) });
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}
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if let Some(pin) = &self.ch1 {
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pin.set_low();
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pin.conf().write(|w| w);
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r.psel.out[1].write(|w| unsafe { w.bits(0x80000000) });
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}
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if let Some(pin) = &self.ch2 {
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pin.set_low();
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pin.conf().write(|w| w);
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r.psel.out[2].write(|w| unsafe { w.bits(0x80000000) });
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}
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if let Some(pin) = &self.ch3 {
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pin.set_low();
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pin.conf().write(|w| w);
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r.psel.out[3].write(|w| unsafe { w.bits(0x80000000) });
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}
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}
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}
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/// Configure an infinite looping sequence for `SequencePwm`
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#[non_exhaustive]
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pub struct SequenceConfig {
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/// Selects up mode or up-and-down mode for the counter
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pub counter_mode: CounterMode,
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/// Top value to be compared against buffer values
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pub top: u16,
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/// Configuration for PWM_CLK
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pub prescaler: Prescaler,
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/// How a sequence is read from RAM and is spread to the compare register
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pub sequence_load: SequenceLoad,
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/// Number of PWM periods to delay between each sequence sample
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pub refresh: u32,
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/// Number of PWM periods after the sequence ends before starting the next sequence
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pub end_delay: u32,
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}
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impl Default for SequenceConfig {
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fn default() -> SequenceConfig {
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SequenceConfig {
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counter_mode: CounterMode::Up,
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top: 1000,
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prescaler: Prescaler::Div16,
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sequence_load: SequenceLoad::Common,
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refresh: 0,
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end_delay: 0,
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}
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}
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}
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/// How many times to run the sequence
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#[derive(Debug, Eq, PartialEq, Clone, Copy)]
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pub enum SequenceMode {
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/// Run sequence n Times total
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Times(u16),
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/// Repeat until `stop` is called.
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Infinite,
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}
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/// PWM Base clock is system clock (16MHz) divided by prescaler
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#[derive(Debug, Eq, PartialEq, Clone, Copy)]
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pub enum Prescaler {
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Div1,
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Div2,
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Div4,
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Div8,
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Div16,
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Div32,
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Div64,
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Div128,
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}
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/// How the sequence values are distributed across the channels
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#[derive(Debug, Eq, PartialEq, Clone, Copy)]
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pub enum SequenceLoad {
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/// Provided sequence will be used across all channels
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Common,
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/// Provided sequence contains grouped values for each channel ex:
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/// [ch0_0_and_ch1_0, ch2_0_and_ch3_0, ... ch0_n_and_ch1_n, ch2_n_and_ch3_n]
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Grouped,
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/// Provided sequence contains individual values for each channel ex:
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/// [ch0_0, ch1_0, ch2_0, ch3_0... ch0_n, ch1_n, ch2_n, ch3_n]
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Individual,
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/// Similar to Individual mode, but only three channels are used. The fourth
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/// value is loaded into the pulse generator counter as its top value.
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Waveform,
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}
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/// Selects up mode or up-and-down mode for the counter
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#[derive(Debug, Eq, PartialEq, Clone, Copy)]
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pub enum CounterMode {
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/// Up counter (edge-aligned PWM duty cycle)
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Up,
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/// Up and down counter (center-aligned PWM duty cycle)
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UpAndDown,
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}
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impl<'d, T: Instance> SimplePwm<'d, T> {
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/// Creates the interface to a `SimplePwm`
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///
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/// Defaults the freq to 1Mhz, max_duty 1000, duty 0, up mode, and pins low.
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/// Must be started by calling `set_duty`
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///
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/// # Safety
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///
|
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/// The returned API is safe unless you use `mem::forget` (or similar safe
|
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/// mechanisms) on stack allocated buffers which which have been passed to
|
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/// [`new()`](SimplePwm::new).
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#[allow(unused_unsafe)]
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pub fn new(
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_pwm: impl Unborrow<Target = T> + 'd,
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ch0: impl Unborrow<Target = impl GpioOptionalPin> + 'd,
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ch1: impl Unborrow<Target = impl GpioOptionalPin> + 'd,
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ch2: impl Unborrow<Target = impl GpioOptionalPin> + 'd,
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ch3: impl Unborrow<Target = impl GpioOptionalPin> + 'd,
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) -> Self {
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unborrow!(ch0, ch1, ch2, ch3);
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let r = T::regs();
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if let Some(pin) = ch0.pin_mut() {
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pin.set_low();
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pin.conf().write(|w| w.dir().output());
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}
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if let Some(pin) = ch1.pin_mut() {
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pin.set_low();
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pin.conf().write(|w| w.dir().output());
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}
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if let Some(pin) = ch2.pin_mut() {
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pin.set_low();
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pin.conf().write(|w| w.dir().output());
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}
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if let Some(pin) = ch3.pin_mut() {
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pin.set_low();
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pin.conf().write(|w| w.dir().output());
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}
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// if NoPin provided writes disconnected (top bit 1) 0x80000000 else
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// writes pin number ex 13 (0x0D) which is connected (top bit 0)
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r.psel.out[0].write(|w| unsafe { w.bits(ch0.psel_bits()) });
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r.psel.out[1].write(|w| unsafe { w.bits(ch1.psel_bits()) });
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r.psel.out[2].write(|w| unsafe { w.bits(ch2.psel_bits()) });
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r.psel.out[3].write(|w| unsafe { w.bits(ch3.psel_bits()) });
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let pwm = Self {
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phantom: PhantomData,
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ch0: ch0.degrade_optional(),
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ch1: ch1.degrade_optional(),
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ch2: ch2.degrade_optional(),
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ch3: ch3.degrade_optional(),
|
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duty: [0; 4],
|
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};
|
||||
|
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// Disable all interrupts
|
||||
r.intenclr.write(|w| unsafe { w.bits(0xFFFF_FFFF) });
|
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r.shorts.reset();
|
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|
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// Enable
|
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r.enable.write(|w| w.enable().enabled());
|
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|
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r.seq0
|
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.ptr
|
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.write(|w| unsafe { w.bits(&pwm.duty as *const _ as u32) });
|
||||
|
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r.seq0.cnt.write(|w| unsafe { w.bits(4) });
|
||||
r.seq0.refresh.write(|w| unsafe { w.bits(32) });
|
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r.seq0.refresh.write(|w| unsafe { w.bits(0) });
|
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r.seq0.enddelay.write(|w| unsafe { w.bits(0) });
|
||||
|
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r.decoder.write(|w| {
|
||||
@ -89,14 +407,24 @@ impl<'d, T: Instance> Pwm<'d, T> {
|
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w.mode().refresh_count()
|
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});
|
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r.mode.write(|w| w.updown().up());
|
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r.prescaler.write(|w| w.prescaler().div_1());
|
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r.countertop
|
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.write(|w| unsafe { w.countertop().bits(32767) });
|
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r.prescaler.write(|w| w.prescaler().div_16());
|
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r.countertop.write(|w| unsafe { w.countertop().bits(1000) });
|
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r.loop_.write(|w| w.cnt().disabled());
|
||||
|
||||
Self {
|
||||
phantom: PhantomData,
|
||||
}
|
||||
pwm
|
||||
}
|
||||
|
||||
/// Stop playback
|
||||
#[inline(always)]
|
||||
pub fn stop(&self) {
|
||||
let r = T::regs();
|
||||
|
||||
r.shorts.reset();
|
||||
|
||||
compiler_fence(Ordering::SeqCst);
|
||||
|
||||
// tasks_stop() doesn't exist in all svds so write its bit instead
|
||||
r.tasks_stop.write(|w| unsafe { w.bits(0x01) });
|
||||
}
|
||||
|
||||
/// Enables the PWM generator.
|
||||
@ -114,12 +442,24 @@ impl<'d, T: Instance> Pwm<'d, T> {
|
||||
}
|
||||
|
||||
/// Sets duty cycle (15 bit) for a PWM channel.
|
||||
pub fn set_duty(&self, channel: usize, duty: u16) {
|
||||
let s = T::state();
|
||||
unsafe { (*s.duty.get())[channel] = duty & 0x7FFF };
|
||||
pub fn set_duty(&mut self, channel: usize, duty: u16) {
|
||||
let r = T::regs();
|
||||
|
||||
self.duty[channel] = duty & 0x7FFF;
|
||||
|
||||
r.seq0
|
||||
.ptr
|
||||
.write(|w| unsafe { w.bits(&self.duty as *const _ as u32) });
|
||||
|
||||
// defensive before seqstart
|
||||
compiler_fence(Ordering::SeqCst);
|
||||
T::regs().tasks_seqstart[0].write(|w| unsafe { w.bits(1) });
|
||||
|
||||
// tasks_seqstart() doesn't exist in all svds so write its bit instead
|
||||
r.tasks_seqstart[0].write(|w| unsafe { w.bits(1) });
|
||||
|
||||
// defensive wait until waveform is loaded after seqstart
|
||||
while r.events_seqend[0].read().bits() == 0 {}
|
||||
r.events_seqend[0].write(|w| w);
|
||||
}
|
||||
|
||||
/// Sets the PWM clock prescaler.
|
||||
@ -128,7 +468,7 @@ impl<'d, T: Instance> Pwm<'d, T> {
|
||||
T::regs().prescaler.write(|w| w.prescaler().bits(div as u8));
|
||||
}
|
||||
|
||||
/// Sets the PWM clock prescaler.
|
||||
/// Gets the PWM clock prescaler.
|
||||
#[inline(always)]
|
||||
pub fn prescaler(&self) -> Prescaler {
|
||||
match T::regs().prescaler.read().prescaler().bits() {
|
||||
@ -175,36 +515,41 @@ impl<'d, T: Instance> Pwm<'d, T> {
|
||||
}
|
||||
}
|
||||
|
||||
impl<'a, T: Instance> Drop for Pwm<'a, T> {
|
||||
impl<'a, T: Instance> Drop for SimplePwm<'a, T> {
|
||||
fn drop(&mut self) {
|
||||
let r = T::regs();
|
||||
r.enable.write(|w| w.enable().disabled());
|
||||
|
||||
info!("pwm drop: done");
|
||||
self.stop();
|
||||
self.disable();
|
||||
|
||||
// TODO: disable pins
|
||||
if let Some(pin) = &self.ch0 {
|
||||
pin.set_low();
|
||||
pin.conf().write(|w| w);
|
||||
r.psel.out[0].write(|w| unsafe { w.bits(0x80000000) });
|
||||
}
|
||||
if let Some(pin) = &self.ch1 {
|
||||
pin.set_low();
|
||||
pin.conf().write(|w| w);
|
||||
r.psel.out[1].write(|w| unsafe { w.bits(0x80000000) });
|
||||
}
|
||||
if let Some(pin) = &self.ch2 {
|
||||
pin.set_low();
|
||||
pin.conf().write(|w| w);
|
||||
r.psel.out[2].write(|w| unsafe { w.bits(0x80000000) });
|
||||
}
|
||||
if let Some(pin) = &self.ch3 {
|
||||
pin.set_low();
|
||||
pin.conf().write(|w| w);
|
||||
r.psel.out[3].write(|w| unsafe { w.bits(0x80000000) });
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
pub(crate) mod sealed {
|
||||
use super::*;
|
||||
|
||||
pub struct State {
|
||||
pub duty: UnsafeCell<[u16; 4]>,
|
||||
}
|
||||
unsafe impl Sync for State {}
|
||||
|
||||
impl State {
|
||||
pub const fn new() -> Self {
|
||||
Self {
|
||||
duty: UnsafeCell::new([0; 4]),
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
pub trait Instance {
|
||||
fn regs() -> &'static pac::pwm0::RegisterBlock;
|
||||
fn state() -> &'static State;
|
||||
}
|
||||
}
|
||||
|
||||
@ -218,10 +563,6 @@ macro_rules! impl_pwm {
|
||||
fn regs() -> &'static pac::pwm0::RegisterBlock {
|
||||
unsafe { &*pac::$pac_type::ptr() }
|
||||
}
|
||||
fn state() -> &'static crate::pwm::sealed::State {
|
||||
static STATE: crate::pwm::sealed::State = crate::pwm::sealed::State::new();
|
||||
&STATE
|
||||
}
|
||||
}
|
||||
impl crate::pwm::Instance for peripherals::$type {
|
||||
type Interrupt = crate::interrupt::$irq;
|
||||
|
||||
@ -2,15 +2,15 @@ const SRAM_LOWER: usize = 0x2000_0000;
|
||||
const SRAM_UPPER: usize = 0x3000_0000;
|
||||
|
||||
/// Does this slice reside entirely within RAM?
|
||||
pub(crate) fn slice_in_ram(slice: &[u8]) -> bool {
|
||||
pub(crate) fn slice_in_ram<T>(slice: &[T]) -> bool {
|
||||
let ptr = slice.as_ptr() as usize;
|
||||
ptr >= SRAM_LOWER && (ptr + slice.len()) < SRAM_UPPER
|
||||
ptr >= SRAM_LOWER && (ptr + slice.len() * core::mem::size_of::<T>()) < SRAM_UPPER
|
||||
}
|
||||
|
||||
/// Return an error if slice is not in RAM.
|
||||
#[cfg(not(feature = "nrf51"))]
|
||||
pub(crate) fn slice_in_ram_or<T>(slice: &[u8], err: T) -> Result<(), T> {
|
||||
if slice.len() == 0 || slice_in_ram(slice) {
|
||||
pub(crate) fn slice_in_ram_or<T, E>(slice: &[T], err: E) -> Result<(), E> {
|
||||
if slice.is_empty() || slice_in_ram(slice) {
|
||||
Ok(())
|
||||
} else {
|
||||
Err(err)
|
||||
|
||||
@ -7,7 +7,7 @@ mod example_common;
|
||||
use defmt::*;
|
||||
use embassy::executor::Spawner;
|
||||
use embassy::time::{Duration, Timer};
|
||||
use embassy_nrf::pwm::{Prescaler, Pwm};
|
||||
use embassy_nrf::pwm::{Prescaler, SimplePwm};
|
||||
use embassy_nrf::Peripherals;
|
||||
|
||||
// for i in range(1024): print(int((math.sin(i/512*math.pi)*0.4+0.5)**2*32767), ', ', end='')
|
||||
@ -85,8 +85,9 @@ static DUTY: [u16; 1024] = [
|
||||
|
||||
#[embassy::main]
|
||||
async fn main(_spawner: Spawner, p: Peripherals) {
|
||||
let pwm = Pwm::new(p.PWM0, p.P0_13, p.P0_14, p.P0_16, p.P0_15);
|
||||
let mut pwm = SimplePwm::new(p.PWM0, p.P0_13, p.P0_14, p.P0_16, p.P0_15);
|
||||
pwm.set_prescaler(Prescaler::Div1);
|
||||
pwm.set_max_duty(32767);
|
||||
info!("pwm initialized!");
|
||||
|
||||
let mut i = 0;
|
||||
|
||||
47
examples/nrf/src/bin/pwm_led.rs
Normal file
47
examples/nrf/src/bin/pwm_led.rs
Normal file
@ -0,0 +1,47 @@
|
||||
#![no_std]
|
||||
#![no_main]
|
||||
#![feature(type_alias_impl_trait)]
|
||||
|
||||
#[path = "../example_common.rs"]
|
||||
mod example_common;
|
||||
use defmt::*;
|
||||
use embassy::executor::Spawner;
|
||||
use embassy::time::{Duration, Timer};
|
||||
use embassy_nrf::gpio::NoPin;
|
||||
use embassy_nrf::pwm::{Prescaler, SimplePwm};
|
||||
use embassy_nrf::Peripherals;
|
||||
|
||||
#[embassy::main]
|
||||
async fn main(_spawner: Spawner, p: Peripherals) {
|
||||
let mut pwm = SimplePwm::new(p.PWM0, p.P0_13, NoPin, NoPin, NoPin);
|
||||
// set_period doesnt actually set what you give it, because it only has a
|
||||
// few options from the hardhware so be explicit instead
|
||||
// Div128 is slowest, 125khz still crazy fast for our eyes
|
||||
pwm.set_prescaler(Prescaler::Div128);
|
||||
|
||||
info!("pwm initialized!");
|
||||
|
||||
// default max_duty if not specified is 1000
|
||||
// so 0 would be fully off and 1000 or above would be fully on
|
||||
loop {
|
||||
info!("100%");
|
||||
pwm.set_duty(0, 1000);
|
||||
Timer::after(Duration::from_millis(5000)).await;
|
||||
|
||||
info!("25%");
|
||||
pwm.set_duty(0, 250);
|
||||
Timer::after(Duration::from_millis(5000)).await;
|
||||
|
||||
info!("10%");
|
||||
pwm.set_duty(0, 100);
|
||||
Timer::after(Duration::from_millis(5000)).await;
|
||||
|
||||
info!("5%");
|
||||
pwm.set_duty(0, 50);
|
||||
Timer::after(Duration::from_millis(5000)).await;
|
||||
|
||||
info!("0%");
|
||||
pwm.set_duty(0, 0);
|
||||
Timer::after(Duration::from_millis(5000)).await;
|
||||
}
|
||||
}
|
||||
115
examples/nrf/src/bin/pwm_sequence.rs
Normal file
115
examples/nrf/src/bin/pwm_sequence.rs
Normal file
@ -0,0 +1,115 @@
|
||||
#![no_std]
|
||||
#![no_main]
|
||||
#![feature(type_alias_impl_trait)]
|
||||
|
||||
#[path = "../example_common.rs"]
|
||||
mod example_common;
|
||||
use defmt::*;
|
||||
use embassy::executor::Spawner;
|
||||
use embassy::time::{Duration, Timer};
|
||||
use embassy_nrf::gpio::NoPin;
|
||||
use embassy_nrf::pwm::{Prescaler, SequenceConfig, SequenceMode, SequencePwm};
|
||||
use embassy_nrf::Peripherals;
|
||||
|
||||
#[embassy::main]
|
||||
async fn main(_spawner: Spawner, p: Peripherals) {
|
||||
// for i in range(1024): print(int((math.sin(i/512*math.pi)*0.4+0.5)**2*32767), ', ', end='')
|
||||
let seq_values: [u16; 1024] = [
|
||||
8191, 8272, 8353, 8434, 8516, 8598, 8681, 8764, 8847, 8931, 9015, 9099, 9184, 9269, 9354,
|
||||
9440, 9526, 9613, 9700, 9787, 9874, 9962, 10050, 10139, 10227, 10316, 10406, 10495, 10585,
|
||||
10675, 10766, 10857, 10948, 11039, 11131, 11223, 11315, 11407, 11500, 11592, 11685, 11779,
|
||||
11872, 11966, 12060, 12154, 12248, 12343, 12438, 12533, 12628, 12723, 12818, 12914, 13010,
|
||||
13106, 13202, 13298, 13394, 13491, 13587, 13684, 13781, 13878, 13975, 14072, 14169, 14266,
|
||||
14364, 14461, 14558, 14656, 14754, 14851, 14949, 15046, 15144, 15242, 15339, 15437, 15535,
|
||||
15632, 15730, 15828, 15925, 16023, 16120, 16218, 16315, 16412, 16510, 16607, 16704, 16801,
|
||||
16898, 16995, 17091, 17188, 17284, 17380, 17477, 17572, 17668, 17764, 17859, 17955, 18050,
|
||||
18145, 18239, 18334, 18428, 18522, 18616, 18710, 18803, 18896, 18989, 19082, 19174, 19266,
|
||||
19358, 19449, 19540, 19631, 19722, 19812, 19902, 19991, 20081, 20169, 20258, 20346, 20434,
|
||||
20521, 20608, 20695, 20781, 20867, 20952, 21037, 21122, 21206, 21290, 21373, 21456, 21538,
|
||||
21620, 21701, 21782, 21863, 21943, 22022, 22101, 22179, 22257, 22335, 22412, 22488, 22564,
|
||||
22639, 22714, 22788, 22861, 22934, 23007, 23079, 23150, 23220, 23290, 23360, 23429, 23497,
|
||||
23564, 23631, 23698, 23763, 23828, 23892, 23956, 24019, 24081, 24143, 24204, 24264, 24324,
|
||||
24383, 24441, 24499, 24555, 24611, 24667, 24721, 24775, 24828, 24881, 24933, 24983, 25034,
|
||||
25083, 25132, 25180, 25227, 25273, 25319, 25363, 25407, 25451, 25493, 25535, 25575, 25615,
|
||||
25655, 25693, 25731, 25767, 25803, 25838, 25873, 25906, 25939, 25971, 26002, 26032, 26061,
|
||||
26089, 26117, 26144, 26170, 26195, 26219, 26242, 26264, 26286, 26307, 26327, 26346, 26364,
|
||||
26381, 26397, 26413, 26427, 26441, 26454, 26466, 26477, 26487, 26496, 26505, 26512, 26519,
|
||||
26525, 26530, 26534, 26537, 26539, 26540, 26541, 26540, 26539, 26537, 26534, 26530, 26525,
|
||||
26519, 26512, 26505, 26496, 26487, 26477, 26466, 26454, 26441, 26427, 26413, 26397, 26381,
|
||||
26364, 26346, 26327, 26307, 26286, 26264, 26242, 26219, 26195, 26170, 26144, 26117, 26089,
|
||||
26061, 26032, 26002, 25971, 25939, 25906, 25873, 25838, 25803, 25767, 25731, 25693, 25655,
|
||||
25615, 25575, 25535, 25493, 25451, 25407, 25363, 25319, 25273, 25227, 25180, 25132, 25083,
|
||||
25034, 24983, 24933, 24881, 24828, 24775, 24721, 24667, 24611, 24555, 24499, 24441, 24383,
|
||||
24324, 24264, 24204, 24143, 24081, 24019, 23956, 23892, 23828, 23763, 23698, 23631, 23564,
|
||||
23497, 23429, 23360, 23290, 23220, 23150, 23079, 23007, 22934, 22861, 22788, 22714, 22639,
|
||||
22564, 22488, 22412, 22335, 22257, 22179, 22101, 22022, 21943, 21863, 21782, 21701, 21620,
|
||||
21538, 21456, 21373, 21290, 21206, 21122, 21037, 20952, 20867, 20781, 20695, 20608, 20521,
|
||||
20434, 20346, 20258, 20169, 20081, 19991, 19902, 19812, 19722, 19631, 19540, 19449, 19358,
|
||||
19266, 19174, 19082, 18989, 18896, 18803, 18710, 18616, 18522, 18428, 18334, 18239, 18145,
|
||||
18050, 17955, 17859, 17764, 17668, 17572, 17477, 17380, 17284, 17188, 17091, 16995, 16898,
|
||||
16801, 16704, 16607, 16510, 16412, 16315, 16218, 16120, 16023, 15925, 15828, 15730, 15632,
|
||||
15535, 15437, 15339, 15242, 15144, 15046, 14949, 14851, 14754, 14656, 14558, 14461, 14364,
|
||||
14266, 14169, 14072, 13975, 13878, 13781, 13684, 13587, 13491, 13394, 13298, 13202, 13106,
|
||||
13010, 12914, 12818, 12723, 12628, 12533, 12438, 12343, 12248, 12154, 12060, 11966, 11872,
|
||||
11779, 11685, 11592, 11500, 11407, 11315, 11223, 11131, 11039, 10948, 10857, 10766, 10675,
|
||||
10585, 10495, 10406, 10316, 10227, 10139, 10050, 9962, 9874, 9787, 9700, 9613, 9526, 9440,
|
||||
9354, 9269, 9184, 9099, 9015, 8931, 8847, 8764, 8681, 8598, 8516, 8434, 8353, 8272, 8191,
|
||||
8111, 8031, 7952, 7873, 7794, 7716, 7638, 7561, 7484, 7407, 7331, 7255, 7180, 7105, 7031,
|
||||
6957, 6883, 6810, 6738, 6665, 6594, 6522, 6451, 6381, 6311, 6241, 6172, 6104, 6036, 5968,
|
||||
5901, 5834, 5767, 5702, 5636, 5571, 5507, 5443, 5379, 5316, 5253, 5191, 5130, 5068, 5008,
|
||||
4947, 4888, 4828, 4769, 4711, 4653, 4596, 4539, 4482, 4426, 4371, 4316, 4261, 4207, 4153,
|
||||
4100, 4047, 3995, 3943, 3892, 3841, 3791, 3741, 3691, 3642, 3594, 3546, 3498, 3451, 3404,
|
||||
3358, 3312, 3267, 3222, 3178, 3134, 3090, 3047, 3005, 2962, 2921, 2879, 2839, 2798, 2758,
|
||||
2719, 2680, 2641, 2603, 2565, 2528, 2491, 2454, 2418, 2382, 2347, 2312, 2278, 2244, 2210,
|
||||
2177, 2144, 2112, 2080, 2048, 2017, 1986, 1956, 1926, 1896, 1867, 1838, 1810, 1781, 1754,
|
||||
1726, 1699, 1673, 1646, 1620, 1595, 1570, 1545, 1520, 1496, 1472, 1449, 1426, 1403, 1380,
|
||||
1358, 1336, 1315, 1294, 1273, 1252, 1232, 1212, 1192, 1173, 1154, 1135, 1117, 1099, 1081,
|
||||
1063, 1046, 1029, 1012, 996, 980, 964, 948, 933, 918, 903, 888, 874, 860, 846, 833, 819,
|
||||
806, 793, 781, 768, 756, 744, 733, 721, 710, 699, 688, 677, 667, 657, 647, 637, 627, 618,
|
||||
609, 599, 591, 582, 574, 565, 557, 549, 541, 534, 526, 519, 512, 505, 498, 492, 485, 479,
|
||||
473, 467, 461, 455, 450, 444, 439, 434, 429, 424, 419, 415, 410, 406, 402, 398, 394, 390,
|
||||
386, 383, 379, 376, 373, 370, 367, 364, 361, 359, 356, 354, 351, 349, 347, 345, 343, 342,
|
||||
340, 338, 337, 336, 334, 333, 332, 331, 330, 330, 329, 328, 328, 328, 327, 327, 327, 327,
|
||||
327, 328, 328, 328, 329, 330, 330, 331, 332, 333, 334, 336, 337, 338, 340, 342, 343, 345,
|
||||
347, 349, 351, 354, 356, 359, 361, 364, 367, 370, 373, 376, 379, 383, 386, 390, 394, 398,
|
||||
402, 406, 410, 415, 419, 424, 429, 434, 439, 444, 450, 455, 461, 467, 473, 479, 485, 492,
|
||||
498, 505, 512, 519, 526, 534, 541, 549, 557, 565, 574, 582, 591, 599, 609, 618, 627, 637,
|
||||
647, 657, 667, 677, 688, 699, 710, 721, 733, 744, 756, 768, 781, 793, 806, 819, 833, 846,
|
||||
860, 874, 888, 903, 918, 933, 948, 964, 980, 996, 1012, 1029, 1046, 1063, 1081, 1099, 1117,
|
||||
1135, 1154, 1173, 1192, 1212, 1232, 1252, 1273, 1294, 1315, 1336, 1358, 1380, 1403, 1426,
|
||||
1449, 1472, 1496, 1520, 1545, 1570, 1595, 1620, 1646, 1673, 1699, 1726, 1754, 1781, 1810,
|
||||
1838, 1867, 1896, 1926, 1956, 1986, 2017, 2048, 2080, 2112, 2144, 2177, 2210, 2244, 2278,
|
||||
2312, 2347, 2382, 2418, 2454, 2491, 2528, 2565, 2603, 2641, 2680, 2719, 2758, 2798, 2839,
|
||||
2879, 2921, 2962, 3005, 3047, 3090, 3134, 3178, 3222, 3267, 3312, 3358, 3404, 3451, 3498,
|
||||
3546, 3594, 3642, 3691, 3741, 3791, 3841, 3892, 3943, 3995, 4047, 4100, 4153, 4207, 4261,
|
||||
4316, 4371, 4426, 4482, 4539, 4596, 4653, 4711, 4769, 4828, 4888, 4947, 5008, 5068, 5130,
|
||||
5191, 5253, 5316, 5379, 5443, 5507, 5571, 5636, 5702, 5767, 5834, 5901, 5968, 6036, 6104,
|
||||
6172, 6241, 6311, 6381, 6451, 6522, 6594, 6665, 6738, 6810, 6883, 6957, 7031, 7105, 7180,
|
||||
7255, 7331, 7407, 7484, 7561, 7638, 7716, 7794, 7873, 7952, 8031, 8111,
|
||||
];
|
||||
|
||||
let mut config = SequenceConfig::default();
|
||||
config.prescaler = Prescaler::Div1;
|
||||
// 1 period is 32767 * 1/16mhz = 0.002047938 = 2.047938ms
|
||||
config.top = 32767;
|
||||
// pwm example is delaying >~3ms before updating duty cycle, our refreshes
|
||||
// happen exactly at 2.047938ms so we need a delay after each value of >~1ms
|
||||
// which for us is ~1-2 periods
|
||||
config.refresh = 3;
|
||||
|
||||
let pwm = unwrap!(SequencePwm::new(
|
||||
p.PWM0,
|
||||
p.P0_13,
|
||||
NoPin,
|
||||
NoPin,
|
||||
NoPin,
|
||||
config,
|
||||
&seq_values
|
||||
));
|
||||
let _ = pwm.start(SequenceMode::Infinite);
|
||||
info!("pwm started!");
|
||||
|
||||
loop {
|
||||
Timer::after(Duration::from_millis(1000)).await;
|
||||
}
|
||||
}
|
||||
48
examples/nrf/src/bin/pwm_servo.rs
Normal file
48
examples/nrf/src/bin/pwm_servo.rs
Normal file
@ -0,0 +1,48 @@
|
||||
#![no_std]
|
||||
#![no_main]
|
||||
#![feature(type_alias_impl_trait)]
|
||||
|
||||
#[path = "../example_common.rs"]
|
||||
mod example_common;
|
||||
use defmt::*;
|
||||
use embassy::executor::Spawner;
|
||||
use embassy::time::{Duration, Timer};
|
||||
use embassy_nrf::gpio::NoPin;
|
||||
use embassy_nrf::pwm::{Prescaler, SimplePwm};
|
||||
use embassy_nrf::Peripherals;
|
||||
|
||||
#[embassy::main]
|
||||
async fn main(_spawner: Spawner, p: Peripherals) {
|
||||
let mut pwm = SimplePwm::new(p.PWM0, p.P0_05, NoPin, NoPin, NoPin);
|
||||
// sg90 microervo requires 50hz or 20ms period
|
||||
// set_period can only set down to 125khz so we cant use it directly
|
||||
// Div128 is 125khz or 0.000008s or 0.008ms, 20/0.008 is 2500 is top
|
||||
pwm.set_prescaler(Prescaler::Div128);
|
||||
pwm.set_max_duty(2500);
|
||||
info!("pwm initialized!");
|
||||
|
||||
Timer::after(Duration::from_millis(5000)).await;
|
||||
|
||||
// 1ms 0deg (1/.008=125), 1.5ms 90deg (1.5/.008=187.5), 2ms 180deg (2/.008=250),
|
||||
loop {
|
||||
info!("45 deg");
|
||||
pwm.set_duty(0, 2500 - 156);
|
||||
Timer::after(Duration::from_millis(5000)).await;
|
||||
|
||||
info!("90 deg");
|
||||
pwm.set_duty(0, 2500 - 187);
|
||||
Timer::after(Duration::from_millis(5000)).await;
|
||||
|
||||
info!("135 deg");
|
||||
pwm.set_duty(0, 2500 - 218);
|
||||
Timer::after(Duration::from_millis(5000)).await;
|
||||
|
||||
info!("180 deg");
|
||||
pwm.set_duty(0, 2500 - 250);
|
||||
Timer::after(Duration::from_millis(5000)).await;
|
||||
|
||||
info!("0 deg");
|
||||
pwm.set_duty(0, 2500 - 125);
|
||||
Timer::after(Duration::from_millis(5000)).await;
|
||||
}
|
||||
}
|
||||
Loading…
Reference in New Issue
Block a user