stm32: rename HSI16 -> HSI

This commit is contained in:
Dario Nieuwenhuis
2023-10-22 22:39:55 +02:00
parent e70c531d3d
commit 412bcad2d1
22 changed files with 79 additions and 78 deletions

View File

@ -1,7 +1,7 @@
use crate::pac::flash::vals::Latency;
use crate::pac::rcc::vals::{self, Sw};
pub use crate::pac::rcc::vals::{
Hpre as AHBPrescaler, Hsidiv as HSI16Prescaler, Pllm, Plln, Pllp, Pllq, Pllr, Ppre as APBPrescaler,
Hpre as AHBPrescaler, Hsidiv as HSIPrescaler, Pllm, Plln, Pllp, Pllq, Pllr, Ppre as APBPrescaler,
};
use crate::pac::{FLASH, PWR, RCC};
use crate::rcc::{set_freqs, Clocks};
@ -14,7 +14,7 @@ pub const HSI_FREQ: Hertz = Hertz(16_000_000);
#[derive(Clone, Copy)]
pub enum ClockSrc {
HSE(Hertz),
HSI16(HSI16Prescaler),
HSI(HSIPrescaler),
PLL(PllConfig),
LSI,
}
@ -46,9 +46,9 @@ pub struct PllConfig {
impl Default for PllConfig {
#[inline]
fn default() -> PllConfig {
// HSI16 / 1 * 8 / 2 = 64 MHz
// HSI / 1 * 8 / 2 = 64 MHz
PllConfig {
source: PllSrc::HSI16,
source: PllSrc::HSI,
m: Pllm::DIV1,
n: Plln::MUL8,
r: Pllr::DIV2,
@ -60,7 +60,7 @@ impl Default for PllConfig {
#[derive(Clone, Copy, Eq, PartialEq)]
pub enum PllSrc {
HSI16,
HSI,
HSE(Hertz),
}
@ -77,7 +77,7 @@ impl Default for Config {
#[inline]
fn default() -> Config {
Config {
mux: ClockSrc::HSI16(HSI16Prescaler::DIV1),
mux: ClockSrc::HSI(HSIPrescaler::DIV1),
ahb_pre: AHBPrescaler::DIV1,
apb_pre: APBPrescaler::DIV1,
low_power_run: false,
@ -89,7 +89,7 @@ impl Default for Config {
impl PllConfig {
pub(crate) fn init(self) -> Hertz {
let (src, input_freq) = match self.source {
PllSrc::HSI16 => (vals::Pllsrc::HSI, HSI_FREQ),
PllSrc::HSI => (vals::Pllsrc::HSI, HSI_FREQ),
PllSrc::HSE(freq) => (vals::Pllsrc::HSE, freq),
};
@ -121,7 +121,7 @@ impl PllConfig {
// > 3. Change the desired parameter.
// Enable whichever clock source we're using, and wait for it to become ready
match self.source {
PllSrc::HSI16 => {
PllSrc::HSI => {
RCC.cr().write(|w| w.set_hsion(true));
while !RCC.cr().read().hsirdy() {}
}
@ -167,8 +167,8 @@ impl PllConfig {
pub(crate) unsafe fn init(config: Config) {
let (sys_clk, sw) = match config.mux {
ClockSrc::HSI16(div) => {
// Enable HSI16
ClockSrc::HSI(div) => {
// Enable HSI
RCC.cr().write(|w| {
w.set_hsidiv(div);
w.set_hsion(true)