clean-up example

examples-stm32f4/Cargo.toml

@@ -18,7 +18,7 @@ defmt-error = []
 
 [dependencies]
 embassy = { version = "0.1.0", path = "../embassy", features = ["defmt", "defmt-trace"] }
-# embassy-stm32f4 = { version = "*", path = "../embassy-stm32f4", features = ["stm32f405"] }
+embassy-stm32f4 = { version = "*", path = "../embassy-stm32f4", features = ["stm32f405"] }
 
 defmt = "0.1.3"
 defmt-rtt = "0.1.0"
@@ -29,10 +29,11 @@ embedded-hal    = { version = "0.2.4" }
 panic-probe = "0.1.0"
 stm32f4xx-hal  = { version = "0.8.3", features = ["rt", "stm32f405"], git = "https://github.com/xoviat/stm32f4xx-hal.git", branch = "dma-is-done"}
 futures = { version = "0.3.8", default-features = false, features = ["async-await"] }
-cortex-m-rtic = "0.5" # { git = "https://github.com/rtic-rs/cortex-m-rtic", branch = "master"}
+cortex-m-rtic = "0.5"
 rtt-target = { version = "0.3", features = ["cortex-m"] }
 
 
+
 [[bin]]
-name = "dma_adc"
+name = "serial"
-path = "src/dma_adc.rs"
+path = "src/serial.rs"

examples-stm32f4/src/dma_adc.rs

@@ -1,125 +0,0 @@
-#![no_std]
-#![no_main]
-#![feature(lang_items)]
-
-use core::{
-    panic::PanicInfo,
-    sync::atomic::{compiler_fence, Ordering},
-};
-
-use cortex_m::singleton;
-use rtic::app;
-// use rtt_target::{rprintln, rtt_init_print};
-use stm32f4xx_hal::{
-    dma::{config::DmaConfig, Channel0, PeripheralToMemory, Stream0, StreamsTuple, Transfer},
-    pac::{ADC1, DMA2, RCC},
-    prelude::*,
-};
-
-#[lang = "eh_personality"]
-extern "C" fn eh_personality() {}
-
-type DmaTransfer =
-    Transfer<Stream0<DMA2>, Channel0, ADC1, PeripheralToMemory, &'static mut [u16; 128]>;
-
-#[app(device = stm32f4xx_hal::pac, peripherals = true)]
-const APP: () = {
-    struct Resources {
-        transfer: DmaTransfer,
-        triple_buffer: Option<&'static mut [u16; 128]>,
-    }
-
-    #[init]
-    fn init(cx: init::Context) -> init::LateResources {
-        let rcc = cx.device.RCC.constrain();
-
-        // rtt_init_print!();
-        // rprintln!("Init");
-
-        let _clocks = rcc
-            .cfgr
-            .sysclk(84.mhz())
-            .pclk2(28.mhz())
-            .pclk1(28.mhz())
-            .freeze();
-
-        let gpioa = cx.device.GPIOA.split();
-        let _pa0 = gpioa.pa0.into_analog();
-
-        let stream_0 = StreamsTuple::new(cx.device.DMA2).0;
-        let config = DmaConfig::default()
-            .transfer_complete_interrupt(true)
-            .memory_increment(true)
-            .double_buffer(true);
-
-        let rcc = unsafe { &*RCC::ptr() };
-        rcc.apb2enr.modify(|_, w| w.adc1en().enabled());
-        rcc.apb2rstr.modify(|_, w| w.adcrst().set_bit());
-        rcc.apb2rstr.modify(|_, w| w.adcrst().clear_bit());
-        let adc = cx.device.ADC1;
-        adc.cr2.modify(|_, w| {
-            w.dma()
-                .enabled()
-                .cont()
-                .continuous()
-                .dds()
-                .continuous()
-                .adon()
-                .enabled()
-        });
-
-        let first_buffer = singleton!(: [u16; 128] = [0; 128]).unwrap();
-        let second_buffer = singleton!(: [u16; 128] = [0; 128]).unwrap();
-        let triple_buffer = Some(singleton!(: [u16; 128] = [0; 128]).unwrap());
-
-        let transfer = Transfer::init(stream_0, adc, first_buffer, Some(second_buffer), config);
-
-        // rprintln!("Finished init");
-        init::LateResources {
-            transfer,
-            triple_buffer,
-        }
-    }
-
-    #[idle(resources = [transfer])]
-    fn idle(mut cx: idle::Context) -> ! {
-        cx.resources.transfer.lock(|shared| {
-            shared.start(|adc| {
-                adc.cr2.modify(|_, w| w.swstart().start());
-            });
-        });
-        // rprintln!("DMA started");
-        loop {
-            compiler_fence(Ordering::SeqCst);
-        }
-    }
-
-    #[task(binds = DMA2_STREAM0, priority = 2, resources = [transfer, triple_buffer])]
-    fn dma(cx: dma::Context) {
-        static mut COUNT: usize = 0;
-
-        let triple = cx.resources.triple_buffer.take().unwrap();
-        let buf = cx
-            .resources
-            .transfer
-            .next_transfer(triple)
-            .map_err(|_| {})
-            .unwrap()
-            .0;
-        if *COUNT % (1 << 14) == 0 {
-            // rprintln!("Buf: {:?}", &buf[0..10]);
-        }
-        *COUNT += 1;
-        *cx.resources.triple_buffer = Some(buf);
-    }
-};
-
-#[inline(never)]
-#[panic_handler]
-fn panic(info: &PanicInfo) -> ! {
-    cortex_m::interrupt::disable();
-    // rprintln!("{}", info);
-    loop {
-        compiler_fence(Ordering::SeqCst);
-    }
-}

examples-stm32f4/src/serial.rs

@@ -0,0 +1,60 @@
+#![no_std]
+#![no_main]
+#![feature(trait_alias)]
+#![feature(type_alias_impl_trait)]
+
+// extern crate panic_halt;
+
+use cortex_m::singleton;
+use cortex_m_rt::entry;
+use embassy::executor::{task, Executor};
+use embassy::util::Forever;
+use embassy_stm32f4::serial;
+use stm32f4xx_hal::stm32;
+use stm32f4xx_hal::{prelude::*, serial::config};
+
+#[task]
+async fn run(dp: stm32::Peripherals, cp: cortex_m::Peripherals) {
+    // https://gist.github.com/thalesfragoso/a07340c5df6eee3b04c42fdc69ecdcb1
+    let gpioa = dp.GPIOA.split();
+    let rcc = dp.RCC.constrain();
+
+    let clocks = rcc
+        .cfgr
+        .use_hse(16.mhz())
+        .sysclk(48.mhz())
+        .pclk1(24.mhz())
+        .freeze();
+
+    let mut serial = serial::Uarte::new(
+        gpioa.pa10.into_alternate_af7(),
+        gpioa.pa9.into_alternate_af7(),
+        dp.DMA2,
+        dp.USART1,
+        config::Parity::ParityNone,
+        9600.bps(),
+        clocks,
+    );
+
+    let buf = singleton!(: [u8; 30] = [0; 30]).unwrap();
+
+    buf[5] = 0x01;
+
+    serial.send(buf).await;
+}
+
+static EXECUTOR: Forever<Executor> = Forever::new();
+
+#[entry]
+fn main() -> ! {
+    let dp = stm32::Peripherals::take().unwrap();
+    let cp = cortex_m::peripheral::Peripherals::take().unwrap();
+
+    let executor = EXECUTOR.put(Executor::new(cortex_m::asm::sev));
+    executor.spawn(run(dp, cp));
+
+    loop {
+        executor.run();
+        cortex_m::asm::wfe();
+    }
+}