From 6bdacb4f69d523ef814e7e3b9c4a878106ca0e62 Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Mon, 27 Nov 2023 00:35:41 +0100 Subject: [PATCH 1/2] stm32/sdmmc: use unwrap to ensure panics get printed to defmt. --- embassy-stm32/src/sdmmc/mod.rs | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/embassy-stm32/src/sdmmc/mod.rs b/embassy-stm32/src/sdmmc/mod.rs index a99a5707..27a12062 100644 --- a/embassy-stm32/src/sdmmc/mod.rs +++ b/embassy-stm32/src/sdmmc/mod.rs @@ -1457,8 +1457,8 @@ cfg_if::cfg_if! { macro_rules! kernel_clk { ($inst:ident) => { critical_section::with(|_| unsafe { - crate::rcc::get_freqs().pll1_q - }).expect("PLL48 is required for SDIO") + unwrap!(crate::rcc::get_freqs().pll1_q) + }) } } } else if #[cfg(stm32f7)] { @@ -1469,7 +1469,7 @@ cfg_if::cfg_if! { if sdmmcsel == crate::pac::rcc::vals::Sdmmcsel::SYS { crate::rcc::get_freqs().sys } else { - crate::rcc::get_freqs().pll1_q.expect("PLL48 is required for SDMMC") + unwrap!(crate::rcc::get_freqs().pll1_q) } }) }; @@ -1479,7 +1479,7 @@ cfg_if::cfg_if! { if sdmmcsel == crate::pac::rcc::vals::Sdmmcsel::SYS { crate::rcc::get_freqs().sys } else { - crate::rcc::get_freqs().pll1_q.expect("PLL48 is required for SDMMC") + unwrap!(crate::rcc::get_freqs().pll1_q) } }) }; From cf13f70ea929ee550e418fe3c954b0415207ca88 Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Mon, 27 Nov 2023 00:36:04 +0100 Subject: [PATCH 2/2] stm32/test: add stm32f446 (board not in HIL rig yet) --- ci.sh | 3 +++ tests/stm32/Cargo.toml | 29 +++++++++++++++-------------- tests/stm32/src/bin/can.rs | 12 ++++++------ tests/stm32/src/bin/dac.rs | 21 +++++++++------------ tests/stm32/src/bin/sdmmc.rs | 11 ++++------- tests/stm32/src/common.rs | 35 +++++++++++++++++++++++++++++++++++ 6 files changed, 72 insertions(+), 39 deletions(-) diff --git a/ci.sh b/ci.sh index aff88353..5a4773da 100755 --- a/ci.sh +++ b/ci.sh @@ -190,6 +190,7 @@ cargo batch \ --- build --release --manifest-path examples/wasm/Cargo.toml --target wasm32-unknown-unknown --out-dir out/examples/wasm \ --- build --release --manifest-path tests/stm32/Cargo.toml --target thumbv7m-none-eabi --features stm32f103c8 --out-dir out/tests/stm32f103c8 \ --- build --release --manifest-path tests/stm32/Cargo.toml --target thumbv7em-none-eabi --features stm32f429zi --out-dir out/tests/stm32f429zi \ + --- build --release --manifest-path tests/stm32/Cargo.toml --target thumbv7em-none-eabi --features stm32f446re --out-dir out/tests/stm32f446re \ --- build --release --manifest-path tests/stm32/Cargo.toml --target thumbv7em-none-eabi --features stm32g491re --out-dir out/tests/stm32g491re \ --- build --release --manifest-path tests/stm32/Cargo.toml --target thumbv6m-none-eabi --features stm32g071rb --out-dir out/tests/stm32g071rb \ --- build --release --manifest-path tests/stm32/Cargo.toml --target thumbv6m-none-eabi --features stm32c031c6 --out-dir out/tests/stm32c031c6 \ @@ -220,6 +221,8 @@ cargo batch \ rm out/tests/stm32wb55rg/wpan_mac rm out/tests/stm32wb55rg/wpan_ble +# not in CI yet. +rm -rf out/tests/stm32f446re # unstable, I think it's running out of RAM? rm out/tests/stm32f207zg/eth diff --git a/tests/stm32/Cargo.toml b/tests/stm32/Cargo.toml index ab701616..78508225 100644 --- a/tests/stm32/Cargo.toml +++ b/tests/stm32/Cargo.toml @@ -6,28 +6,29 @@ license = "MIT OR Apache-2.0" autobins = false [features] -stm32f103c8 = ["embassy-stm32/stm32f103c8", "not-gpdma"] -stm32f429zi = ["embassy-stm32/stm32f429zi", "chrono", "eth", "stop", "can", "not-gpdma", "dac-adc-pin", "rng"] -stm32g071rb = ["embassy-stm32/stm32g071rb", "cm0", "not-gpdma", "dac-adc-pin"] stm32c031c6 = ["embassy-stm32/stm32c031c6", "cm0", "not-gpdma"] +stm32f103c8 = ["embassy-stm32/stm32f103c8", "not-gpdma"] +stm32f207zg = ["embassy-stm32/stm32f207zg", "chrono", "not-gpdma", "eth", "rng"] +stm32f303ze = ["embassy-stm32/stm32f303ze", "chrono", "not-gpdma"] +stm32f429zi = ["embassy-stm32/stm32f429zi", "chrono", "eth", "stop", "can", "not-gpdma", "dac-adc-pin", "rng"] +stm32f446re = ["embassy-stm32/stm32f446re", "chrono", "stop", "can", "not-gpdma", "dac-adc-pin", "sdmmc"] +stm32f767zi = ["embassy-stm32/stm32f767zi", "chrono", "not-gpdma", "eth", "rng"] +stm32g071rb = ["embassy-stm32/stm32g071rb", "cm0", "not-gpdma", "dac-adc-pin"] stm32g491re = ["embassy-stm32/stm32g491re", "chrono", "stop", "not-gpdma", "rng"] -stm32h755zi = ["embassy-stm32/stm32h755zi-cm7", "chrono", "not-gpdma", "eth", "dac-adc-pin", "rng"] -stm32h753zi = ["embassy-stm32/stm32h753zi", "chrono", "not-gpdma", "eth", "rng"] -stm32h7a3zi = ["embassy-stm32/stm32h7a3zi", "not-gpdma", "rng"] -stm32wb55rg = ["embassy-stm32/stm32wb55rg", "chrono", "not-gpdma", "ble", "mac" , "rng"] stm32h563zi = ["embassy-stm32/stm32h563zi", "chrono", "eth", "rng"] -stm32u585ai = ["embassy-stm32/stm32u585ai", "chrono", "rng"] -stm32u5a5zj = ["embassy-stm32/stm32u5a5zj", "chrono", "rng"] -stm32wba52cg = ["embassy-stm32/stm32wba52cg", "chrono", "rng"] +stm32h753zi = ["embassy-stm32/stm32h753zi", "chrono", "not-gpdma", "eth", "rng"] +stm32h755zi = ["embassy-stm32/stm32h755zi-cm7", "chrono", "not-gpdma", "eth", "dac-adc-pin", "rng"] +stm32h7a3zi = ["embassy-stm32/stm32h7a3zi", "not-gpdma", "rng"] stm32l073rz = ["embassy-stm32/stm32l073rz", "cm0", "not-gpdma", "rng"] stm32l152re = ["embassy-stm32/stm32l152re", "chrono", "not-gpdma"] +stm32l496zg = ["embassy-stm32/stm32l496zg", "not-gpdma", "rng"] stm32l4a6zg = ["embassy-stm32/stm32l4a6zg", "chrono", "not-gpdma", "rng"] stm32l4r5zi = ["embassy-stm32/stm32l4r5zi", "chrono", "not-gpdma", "rng"] stm32l552ze = ["embassy-stm32/stm32l552ze", "not-gpdma", "rng"] -stm32f767zi = ["embassy-stm32/stm32f767zi", "chrono", "not-gpdma", "eth", "rng"] -stm32f207zg = ["embassy-stm32/stm32f207zg", "chrono", "not-gpdma", "eth", "rng"] -stm32f303ze = ["embassy-stm32/stm32f303ze", "chrono", "not-gpdma"] -stm32l496zg = ["embassy-stm32/stm32l496zg", "not-gpdma", "rng"] +stm32u585ai = ["embassy-stm32/stm32u585ai", "chrono", "rng"] +stm32u5a5zj = ["embassy-stm32/stm32u5a5zj", "chrono", "rng"] +stm32wb55rg = ["embassy-stm32/stm32wb55rg", "chrono", "not-gpdma", "ble", "mac" , "rng"] +stm32wba52cg = ["embassy-stm32/stm32wba52cg", "chrono", "rng"] stm32wl55jc = ["embassy-stm32/stm32wl55jc-cm4", "not-gpdma", "rng", "chrono"] eth = [] diff --git a/tests/stm32/src/bin/can.rs b/tests/stm32/src/bin/can.rs index acf54521..8d782d2e 100644 --- a/tests/stm32/src/bin/can.rs +++ b/tests/stm32/src/bin/can.rs @@ -27,21 +27,21 @@ bind_interrupts!(struct Irqs { #[embassy_executor::main] async fn main(_spawner: Spawner) { - let mut p = embassy_stm32::init(config()); + let p = embassy_stm32::init(config()); info!("Hello World!"); - // HW is connected as follows: - // PB13 -> PD0 - // PB12 -> PD1 + let can = peri!(p, CAN); + let tx = peri!(p, CAN_TX); + let mut rx = peri!(p, CAN_RX); // The next two lines are a workaround for testing without transceiver. // To synchronise to the bus the RX input needs to see a high level. // Use `mem::forget()` to release the borrow on the pin but keep the // pull-up resistor enabled. - let rx_pin = Input::new(&mut p.PD0, Pull::Up); + let rx_pin = Input::new(&mut rx, Pull::Up); core::mem::forget(rx_pin); - let mut can = Can::new(p.CAN1, p.PD0, p.PD1, Irqs); + let mut can = Can::new(can, rx, tx, Irqs); info!("Configuring can..."); diff --git a/tests/stm32/src/bin/dac.rs b/tests/stm32/src/bin/dac.rs index 824eb880..29d5f866 100644 --- a/tests/stm32/src/bin/dac.rs +++ b/tests/stm32/src/bin/dac.rs @@ -6,6 +6,8 @@ #[path = "../common.rs"] mod common; +use core::f32::consts::PI; + use common::*; use defmt::assert; use embassy_executor::Spawner; @@ -13,6 +15,7 @@ use embassy_stm32::adc::Adc; use embassy_stm32::dac::{DacCh1, Value}; use embassy_stm32::dma::NoDma; use embassy_time::{Delay, Timer}; +use micromath::F32Ext; use {defmt_rtt as _, panic_probe as _}; #[embassy_executor::main] @@ -20,24 +23,22 @@ async fn main(_spawner: Spawner) { // Initialize the board and obtain a Peripherals instance let p: embassy_stm32::Peripherals = embassy_stm32::init(config()); - #[cfg(feature = "stm32f429zi")] - let dac_peripheral = p.DAC; + let dac = peri!(p, DAC); + let dac_pin = peri!(p, DAC_PIN); + let mut adc_pin = unsafe { core::ptr::read(&dac_pin) }; - #[cfg(any(feature = "stm32h755zi", feature = "stm32g071rb"))] - let dac_peripheral = p.DAC1; - - let mut dac = DacCh1::new(dac_peripheral, NoDma, p.PA4); + let mut dac = DacCh1::new(dac, NoDma, dac_pin); let mut adc = Adc::new(p.ADC1, &mut Delay); #[cfg(feature = "stm32h755zi")] let normalization_factor = 256; - #[cfg(any(feature = "stm32f429zi", feature = "stm32g071rb"))] + #[cfg(any(feature = "stm32f429zi", feature = "stm32f446re", feature = "stm32g071rb"))] let normalization_factor: i32 = 16; dac.set(Value::Bit8(0)); // Now wait a little to obtain a stable value Timer::after_millis(30).await; - let offset = adc.read(&mut unsafe { embassy_stm32::Peripherals::steal() }.PA4); + let offset = adc.read(&mut adc_pin); for v in 0..=255 { // First set the DAC output value @@ -62,10 +63,6 @@ async fn main(_spawner: Spawner) { cortex_m::asm::bkpt(); } -use core::f32::consts::PI; - -use micromath::F32Ext; - fn to_sine_wave(v: u8) -> u8 { if v >= 128 { // top half diff --git a/tests/stm32/src/bin/sdmmc.rs b/tests/stm32/src/bin/sdmmc.rs index 51502538..341d34ba 100644 --- a/tests/stm32/src/bin/sdmmc.rs +++ b/tests/stm32/src/bin/sdmmc.rs @@ -5,11 +5,12 @@ #[path = "../common.rs"] mod common; -use defmt::{assert_eq, *}; +use common::*; +use defmt::assert_eq; use embassy_executor::Spawner; use embassy_stm32::sdmmc::{DataBlock, Sdmmc}; use embassy_stm32::time::mhz; -use embassy_stm32::{bind_interrupts, peripherals, sdmmc, Config}; +use embassy_stm32::{bind_interrupts, peripherals, sdmmc}; use {defmt_rtt as _, panic_probe as _}; bind_interrupts!(struct Irqs { @@ -20,12 +21,8 @@ bind_interrupts!(struct Irqs { async fn main(_spawner: Spawner) { info!("Hello World!"); - let mut config = Config::default(); - config.rcc.sys_ck = Some(mhz(48)); - config.rcc.pll48 = true; - let p = embassy_stm32::init(config); + let p = embassy_stm32::init(config()); - #[cfg(feature = "stm32f429zi")] let (mut sdmmc, mut dma, mut clk, mut cmd, mut d0, mut d1, mut d2, mut d3) = (p.SDIO, p.DMA2_CH3, p.PC12, p.PD2, p.PC8, p.PC9, p.PC10, p.PC11); diff --git a/tests/stm32/src/common.rs b/tests/stm32/src/common.rs index a44e8230..155e1d9d 100644 --- a/tests/stm32/src/common.rs +++ b/tests/stm32/src/common.rs @@ -14,6 +14,8 @@ teleprobe_meta::target!(b"nucleo-stm32g491re"); teleprobe_meta::target!(b"nucleo-stm32g071rb"); #[cfg(feature = "stm32f429zi")] teleprobe_meta::target!(b"nucleo-stm32f429zi"); +#[cfg(feature = "stm32f446re")] +teleprobe_meta::target!(b"weact-stm32f446re"); #[cfg(feature = "stm32wb55rg")] teleprobe_meta::target!(b"nucleo-stm32wb55rg"); #[cfg(feature = "stm32h755zi")] @@ -99,14 +101,25 @@ define_peris!( define_peris!( UART = USART1, UART_TX = PC4, UART_RX = PC5, UART_TX_DMA = DMA1_CH1, UART_RX_DMA = DMA1_CH2, SPI = SPI1, SPI_SCK = PA5, SPI_MOSI = PA7, SPI_MISO = PA6, SPI_TX_DMA = DMA1_CH1, SPI_RX_DMA = DMA1_CH2, + DAC = DAC1, DAC_PIN = PA4, @irq UART = {USART1 => embassy_stm32::usart::InterruptHandler;}, ); #[cfg(feature = "stm32f429zi")] define_peris!( UART = USART6, UART_TX = PG14, UART_RX = PG9, UART_TX_DMA = DMA2_CH6, UART_RX_DMA = DMA2_CH1, SPI = SPI1, SPI_SCK = PA5, SPI_MOSI = PA7, SPI_MISO = PA6, SPI_TX_DMA = DMA2_CH3, SPI_RX_DMA = DMA2_CH2, + DAC = DAC, DAC_PIN = PA4, + CAN = CAN1, CAN_RX = PD0, CAN_TX = PD1, @irq UART = {USART6 => embassy_stm32::usart::InterruptHandler;}, ); +#[cfg(feature = "stm32f446re")] +define_peris!( + UART = USART1, UART_TX = PA9, UART_RX = PA10, UART_TX_DMA = DMA2_CH7, UART_RX_DMA = DMA2_CH5, + SPI = SPI1, SPI_SCK = PA5, SPI_MOSI = PA7, SPI_MISO = PA6, SPI_TX_DMA = DMA2_CH3, SPI_RX_DMA = DMA2_CH2, + DAC = DAC, DAC_PIN = PA4, + CAN = CAN1, CAN_RX = PA11, CAN_TX = PA12, + @irq UART = {USART1 => embassy_stm32::usart::InterruptHandler;}, +); #[cfg(feature = "stm32wb55rg")] define_peris!( UART = LPUART1, UART_TX = PA2, UART_RX = PA3, UART_TX_DMA = DMA1_CH1, UART_RX_DMA = DMA1_CH2, @@ -117,6 +130,7 @@ define_peris!( define_peris!( UART = USART1, UART_TX = PB6, UART_RX = PB7, UART_TX_DMA = DMA1_CH0, UART_RX_DMA = DMA1_CH1, SPI = SPI1, SPI_SCK = PA5, SPI_MOSI = PB5, SPI_MISO = PA6, SPI_TX_DMA = DMA1_CH0, SPI_RX_DMA = DMA1_CH1, + DAC = DAC1, DAC_PIN = PA4, @irq UART = {USART1 => embassy_stm32::usart::InterruptHandler;}, ); #[cfg(feature = "stm32h7a3zi")] @@ -282,6 +296,27 @@ pub fn config() -> Config { config.rcc.sys = Sysclk::PLL1_P; } + #[cfg(feature = "stm32f446re")] + { + use embassy_stm32::rcc::*; + config.rcc.hse = Some(Hse { + freq: Hertz(8_000_000), + mode: HseMode::Oscillator, + }); + config.rcc.pll_src = PllSource::HSE; + config.rcc.pll = Some(Pll { + prediv: PllPreDiv::DIV4, + mul: PllMul::MUL168, + divp: Some(PllPDiv::DIV2), // 8mhz / 4 * 168 / 2 = 168 Mhz. + divq: Some(PllQDiv::DIV7), // 8mhz / 4 * 168 / 7 = 48 Mhz. + divr: None, + }); + config.rcc.ahb_pre = AHBPrescaler::DIV1; + config.rcc.apb1_pre = APBPrescaler::DIV4; + config.rcc.apb2_pre = APBPrescaler::DIV2; + config.rcc.sys = Sysclk::PLL1_P; + } + #[cfg(feature = "stm32f767zi")] { use embassy_stm32::rcc::*;