diff --git a/embassy-stm32/src/adc/f3.rs b/embassy-stm32/src/adc/f3.rs
index 8f16c6ab..c7b876fe 100644
--- a/embassy-stm32/src/adc/f3.rs
+++ b/embassy-stm32/src/adc/f3.rs
@@ -49,6 +49,9 @@ impl<'d, T: Instance> Adc<'d, T> {
 
         while T::regs().cr().read().adcal() {}
 
+        // Wait more than 4 clock cycles after adcal is cleared (RM0364 p. 223)
+        delay.delay_us(6 * Self::freq().0 / 1_000_000);
+
         // Enable the adc
         T::regs().cr().modify(|w| w.set_aden(true));