From 451bb48464fe685d26606d4f050a7972dc093c64 Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Sat, 26 Feb 2022 02:01:59 +0100 Subject: [PATCH] stm32-metapac: remove all macrotables, deduplicate metadata files. --- stm32-metapac-gen/src/assets/lib_inner.rs | 6 - stm32-metapac-gen/src/lib.rs | 795 +++++++----------- stm32-metapac-gen/src/main.rs | 5 +- stm32-metapac/Cargo.toml | 15 + stm32-metapac/build.rs | 27 +- .../build_pregenerated.rs | 10 +- stm32-metapac/src/common.rs | 80 ++ stm32-metapac/src/lib.rs | 12 +- .../assets => stm32-metapac/src}/metadata.rs | 0 9 files changed, 435 insertions(+), 515 deletions(-) delete mode 100644 stm32-metapac-gen/src/assets/lib_inner.rs rename stm32-metapac-gen/src/assets/build.rs => stm32-metapac/build_pregenerated.rs (75%) create mode 100644 stm32-metapac/src/common.rs rename {stm32-metapac-gen/src/assets => stm32-metapac/src}/metadata.rs (100%) diff --git a/stm32-metapac-gen/src/assets/lib_inner.rs b/stm32-metapac-gen/src/assets/lib_inner.rs deleted file mode 100644 index b7729cb3..00000000 --- a/stm32-metapac-gen/src/assets/lib_inner.rs +++ /dev/null @@ -1,6 +0,0 @@ -// GEN PATHS HERE -mod inner; - -pub mod common; - -pub use inner::*; diff --git a/stm32-metapac-gen/src/lib.rs b/stm32-metapac-gen/src/lib.rs index 575be9e4..14625097 100644 --- a/stm32-metapac-gen/src/lib.rs +++ b/stm32-metapac-gen/src/lib.rs @@ -1,8 +1,9 @@ use chiptool::generate::CommonModule; +use chiptool::{generate, ir, transform}; use proc_macro2::TokenStream; use regex::Regex; use std::collections::{BTreeMap, HashMap, HashSet}; -use std::fmt::Write as _; +use std::fmt::{Debug, Write as _}; use std::fs; use std::fs::File; use std::io::Write; @@ -10,9 +11,6 @@ use std::path::Path; use std::path::PathBuf; use std::str::FromStr; -use chiptool::util::ToSanitizedSnakeCase; -use chiptool::{generate, ir, transform}; - mod data; use data::*; @@ -27,532 +25,322 @@ struct Metadata<'a> { dma_channels: &'a [DmaChannel], } -fn make_peripheral_counts(out: &mut String, data: &BTreeMap) { - write!( - out, - "#[macro_export] -macro_rules! peripheral_count {{ - " - ) - .unwrap(); - for (name, count) in data { - write!(out, "({}) => ({});\n", name, count,).unwrap(); - } - write!(out, " }}\n").unwrap(); -} - -fn make_dma_channel_counts(out: &mut String, data: &BTreeMap) { - if data.len() == 0 { - return; - } - write!( - out, - "#[macro_export] -macro_rules! dma_channels_count {{ - " - ) - .unwrap(); - for (name, count) in data { - write!(out, "({}) => ({});\n", name, count,).unwrap(); - } - write!(out, " }}\n").unwrap(); -} - -fn make_table(out: &mut String, name: &str, data: &Vec>) { - write!( - out, - "#[macro_export] -macro_rules! {} {{ - ($($pat:tt => $code:tt;)*) => {{ - macro_rules! __{}_inner {{ - $(($pat) => $code;)* - ($_:tt) => {{}} - }} -", - name, name - ) - .unwrap(); - - for row in data { - write!(out, " __{}_inner!(({}));\n", name, row.join(",")).unwrap(); - } - - write!( - out, - " }}; -}}" - ) - .unwrap(); -} - pub struct Options { pub chips: Vec, pub out_dir: PathBuf, pub data_dir: PathBuf, } -pub fn gen_chip( - options: &Options, - chip_core_name: &str, - chip: &Chip, - core: &Core, - core_index: usize, - all_peripheral_versions: &mut HashSet<(String, String)>, -) { - let mut ir = ir::IR::new(); +pub struct Gen { + opts: Options, + all_peripheral_versions: HashSet<(String, String)>, + metadata_dedup: HashMap, +} - let mut dev = ir::Device { - interrupts: Vec::new(), - peripherals: Vec::new(), - }; - - // Load DBGMCU register for chip - let mut dbgmcu: Option = core.peripherals.iter().find_map(|p| { - if p.name == "DBGMCU" { - p.registers.as_ref().map(|bi| { - let dbgmcu_reg_path = options - .data_dir - .join("registers") - .join(&format!("{}_{}.yaml", bi.kind, bi.version)); - serde_yaml::from_reader(File::open(dbgmcu_reg_path).unwrap()).unwrap() - }) - } else { - None - } - }); - - let mut peripheral_versions: BTreeMap = BTreeMap::new(); - let mut pin_table: Vec> = Vec::new(); - let mut interrupt_table: Vec> = Vec::new(); - let mut peripherals_table: Vec> = Vec::new(); - let mut dma_channels_table: Vec> = Vec::new(); - let mut peripheral_counts: BTreeMap = BTreeMap::new(); - let mut dma_channel_counts: BTreeMap = BTreeMap::new(); - let mut dbgmcu_table: Vec> = Vec::new(); - - let gpio_base = core - .peripherals - .iter() - .find(|p| p.name == "GPIOA") - .unwrap() - .address as u32; - let gpio_stride = 0x400; - - let number_suffix_re = Regex::new("^(.*?)[0-9]*$").unwrap(); - - if let Some(ref mut reg) = dbgmcu { - if let Some(ref cr) = reg.fieldsets.get("CR") { - for field in cr.fields.iter().filter(|e| e.name.contains("DBG")) { - let mut fn_name = String::new(); - fn_name.push_str("set_"); - fn_name.push_str(&field.name.to_sanitized_snake_case()); - dbgmcu_table.push(vec!["cr".into(), fn_name]); - } +impl Gen { + pub fn new(opts: Options) -> Self { + Self { + opts, + all_peripheral_versions: HashSet::new(), + metadata_dedup: HashMap::new(), } } - for p in &core.peripherals { - let captures = number_suffix_re.captures(&p.name).unwrap(); - let root_peri_name = captures.get(1).unwrap().as_str().to_string(); - peripheral_counts.insert( - root_peri_name.clone(), - peripheral_counts.get(&root_peri_name).map_or(1, |v| v + 1), - ); - let mut ir_peri = ir::Peripheral { - name: p.name.clone(), - array: None, - base_address: p.address, - block: None, - description: None, - interrupts: HashMap::new(), + fn gen_chip(&mut self, chip_core_name: &str, chip: &Chip, core: &Core, core_index: usize) { + let mut ir = ir::IR::new(); + + let mut dev = ir::Device { + interrupts: Vec::new(), + peripherals: Vec::new(), }; - if let Some(bi) = &p.registers { - peripheral_counts.insert( - bi.kind.clone(), - peripheral_counts.get(&bi.kind).map_or(1, |v| v + 1), - ); + let mut peripheral_versions: BTreeMap = BTreeMap::new(); - for irq in &p.interrupts { - let mut row = Vec::new(); - row.push(p.name.clone()); - row.push(bi.kind.clone()); - row.push(bi.block.clone()); - row.push(irq.signal.clone()); - row.push(irq.interrupt.to_ascii_uppercase()); - interrupt_table.push(row) - } + let gpio_base = core + .peripherals + .iter() + .find(|p| p.name == "GPIOA") + .unwrap() + .address as u32; + let gpio_stride = 0x400; - let mut peripheral_row = Vec::new(); - peripheral_row.push(bi.kind.clone()); - peripheral_row.push(p.name.clone()); - peripherals_table.push(peripheral_row); - - if let Some(old_version) = - peripheral_versions.insert(bi.kind.clone(), bi.version.clone()) - { - if old_version != bi.version { - panic!( - "Peripheral {} has multiple versions: {} and {}", - bi.kind, old_version, bi.version - ); - } - } - ir_peri.block = Some(format!("{}::{}", bi.kind, bi.block)); - - match bi.kind.as_str() { - "gpio" => { - let port_letter = p.name.chars().skip(4).next().unwrap(); - assert_eq!(0, (p.address as u32 - gpio_base) % gpio_stride); - let port_num = (p.address as u32 - gpio_base) / gpio_stride; - - for pin_num in 0u32..16 { - let pin_name = format!("P{}{}", port_letter, pin_num); - pin_table.push(vec![ - pin_name.clone(), - p.name.clone(), - port_num.to_string(), - pin_num.to_string(), - format!("EXTI{}", pin_num), - ]); - } - } - _ => {} - } - } - - dev.peripherals.push(ir_peri); - } - - for ch in &core.dma_channels { - let mut row = Vec::new(); - let dma_peri = core.peripherals.iter().find(|p| p.name == ch.dma).unwrap(); - let bi = dma_peri.registers.as_ref().unwrap(); - - row.push(ch.name.clone()); - row.push(ch.dma.clone()); - row.push(bi.kind.clone()); - row.push(ch.channel.to_string()); - if let Some(dmamux) = &ch.dmamux { - let dmamux_channel = ch.dmamux_channel.unwrap(); - row.push(format!( - "{{dmamux: {}, dmamux_channel: {}}}", - dmamux, dmamux_channel - )); - } else { - row.push("{}".to_string()); - } - - dma_channels_table.push(row); - - let dma_peri_name = ch.dma.clone(); - dma_channel_counts.insert( - dma_peri_name.clone(), - dma_channel_counts.get(&dma_peri_name).map_or(1, |v| v + 1), - ); - } - - for irq in &core.interrupts { - dev.interrupts.push(ir::Interrupt { - name: irq.name.clone(), - description: None, - value: irq.number, - }); - - let name = irq.name.to_ascii_uppercase(); - - interrupt_table.push(vec![name.clone()]); - - if name.contains("EXTI") { - interrupt_table.push(vec!["EXTI".to_string(), name.clone()]); - } - } - - ir.devices.insert("".to_string(), dev); - - let mut extra = format!( - "pub fn GPIO(n: usize) -> gpio::Gpio {{ - gpio::Gpio(({} + {}*n) as _) - }}", - gpio_base, gpio_stride, - ); - - for (module, version) in &peripheral_versions { - all_peripheral_versions.insert((module.clone(), version.clone())); - write!( - &mut extra, - "#[path=\"../../peripherals/{}_{}.rs\"] pub mod {};\n", - module, version, module - ) - .unwrap(); - } - write!( - &mut extra, - "pub const CORE_INDEX: usize = {};\n", - core_index - ) - .unwrap(); - - // Cleanups! - transform::sort::Sort {}.run(&mut ir).unwrap(); - transform::Sanitize {}.run(&mut ir).unwrap(); - - // ============================== - // Setup chip dir - - let chip_dir = options - .out_dir - .join("src/chips") - .join(chip_core_name.to_ascii_lowercase()); - fs::create_dir_all(&chip_dir).unwrap(); - - // ============================== - // generate pac.rs - - let data = generate::render(&ir, &gen_opts()).unwrap().to_string(); - let data = data.replace("] ", "]\n"); - - // Remove inner attributes like #![no_std] - let data = Regex::new("# *! *\\[.*\\]").unwrap().replace_all(&data, ""); - - let mut file = File::create(chip_dir.join("pac.rs")).unwrap(); - file.write_all(data.as_bytes()).unwrap(); - file.write_all(extra.as_bytes()).unwrap(); - - let mut device_x = String::new(); - - for irq in &core.interrupts { - write!(&mut device_x, "PROVIDE({} = DefaultHandler);\n", irq.name).unwrap(); - } - - // ============================== - // generate mod.rs - - let mut data = String::new(); - - write!(&mut data, "#[cfg(feature=\"metadata\")] pub mod metadata;").unwrap(); - write!(&mut data, "#[cfg(feature=\"pac\")] mod pac;").unwrap(); - write!(&mut data, "#[cfg(feature=\"pac\")] pub use pac::*; ").unwrap(); - - let peripheral_version_table = peripheral_versions - .iter() - .map(|(kind, version)| vec![kind.clone(), version.clone()]) - .collect(); - - make_table(&mut data, "pins", &pin_table); - make_table(&mut data, "interrupts", &interrupt_table); - make_table(&mut data, "peripherals", &peripherals_table); - make_table(&mut data, "peripheral_versions", &peripheral_version_table); - make_table(&mut data, "dma_channels", &dma_channels_table); - make_table(&mut data, "dbgmcu", &dbgmcu_table); - make_peripheral_counts(&mut data, &peripheral_counts); - make_dma_channel_counts(&mut data, &dma_channel_counts); - - let mut file = File::create(chip_dir.join("mod.rs")).unwrap(); - file.write_all(data.as_bytes()).unwrap(); - - // ============================== - // generate metadata.rs - - let metadata = Metadata { - name: &chip.name, - family: &chip.family, - line: &chip.line, - memory: &chip.memory, - peripherals: &core.peripherals, - interrupts: &core.interrupts, - dma_channels: &core.dma_channels, - }; - let metadata = format!("{:#?}", metadata); - let metadata = metadata.replace("[\n", "&[\n"); - let metadata = metadata.replace("[],\n", "&[],\n"); - - let mut data = String::new(); - - write!( - &mut data, - " - include!(\"../../metadata.rs\"); - use MemoryRegionKind::*; - pub const METADATA: Metadata = {}; - ", - metadata - ) - .unwrap(); - - let mut file = File::create(chip_dir.join("metadata.rs")).unwrap(); - file.write_all(data.as_bytes()).unwrap(); - - // ============================== - // generate device.x - - File::create(chip_dir.join("device.x")) - .unwrap() - .write_all(device_x.as_bytes()) - .unwrap(); - - // ============================== - // generate default memory.x - gen_memory_x(&chip_dir, &chip); -} - -fn load_chip(options: &Options, name: &str) -> Chip { - let chip_path = options - .data_dir - .join("chips") - .join(&format!("{}.json", name)); - let chip = fs::read(chip_path).expect(&format!("Could not load chip {}", name)); - serde_yaml::from_slice(&chip).unwrap() -} - -fn gen_opts() -> generate::Options { - generate::Options { - common_module: CommonModule::External(TokenStream::from_str("crate::common").unwrap()), - } -} - -pub fn gen(options: Options) { - fs::create_dir_all(options.out_dir.join("src/peripherals")).unwrap(); - fs::create_dir_all(options.out_dir.join("src/chips")).unwrap(); - - let mut all_peripheral_versions: HashSet<(String, String)> = HashSet::new(); - let mut chip_core_names: Vec = Vec::new(); - - for chip_name in &options.chips { - println!("Generating {}...", chip_name); - - let mut chip = load_chip(&options, chip_name); - - // Cleanup - for core in &mut chip.cores { - for irq in &mut core.interrupts { - irq.name = irq.name.to_ascii_uppercase(); - } - for p in &mut core.peripherals { - for irq in &mut p.interrupts { - irq.interrupt = irq.interrupt.to_ascii_uppercase(); - } - } - } - - // Generate - for (core_index, core) in chip.cores.iter().enumerate() { - let chip_core_name = match chip.cores.len() { - 1 => chip_name.clone(), - _ => format!("{}-{}", chip_name, core.name), + for p in &core.peripherals { + let mut ir_peri = ir::Peripheral { + name: p.name.clone(), + array: None, + base_address: p.address, + block: None, + description: None, + interrupts: HashMap::new(), }; - chip_core_names.push(chip_core_name.clone()); - gen_chip( - &options, - &chip_core_name, - &chip, - core, - core_index, - &mut all_peripheral_versions, - ) + if let Some(bi) = &p.registers { + if let Some(old_version) = + peripheral_versions.insert(bi.kind.clone(), bi.version.clone()) + { + if old_version != bi.version { + panic!( + "Peripheral {} has multiple versions: {} and {}", + bi.kind, old_version, bi.version + ); + } + } + ir_peri.block = Some(format!("{}::{}", bi.kind, bi.block)); + + if bi.kind == "gpio" { + assert_eq!(0, (p.address as u32 - gpio_base) % gpio_stride); + } + } + + dev.peripherals.push(ir_peri); } - } - for (module, version) in all_peripheral_versions { - println!("loading {} {}", module, version); + for irq in &core.interrupts { + dev.interrupts.push(ir::Interrupt { + name: irq.name.clone(), + description: None, + value: irq.number, + }); + } - let regs_path = Path::new(&options.data_dir) - .join("registers") - .join(&format!("{}_{}.yaml", module, version)); + ir.devices.insert("".to_string(), dev); - let mut ir: ir::IR = serde_yaml::from_reader(File::open(regs_path).unwrap()).unwrap(); + let mut extra = format!( + "pub fn GPIO(n: usize) -> gpio::Gpio {{ + gpio::Gpio(({} + {}*n) as _) + }}", + gpio_base, gpio_stride, + ); - transform::expand_extends::ExpandExtends {} - .run(&mut ir) + for (module, version) in &peripheral_versions { + self.all_peripheral_versions + .insert((module.clone(), version.clone())); + write!( + &mut extra, + "#[path=\"../../peripherals/{}_{}.rs\"] pub mod {};\n", + module, version, module + ) .unwrap(); + } + write!( + &mut extra, + "pub const CORE_INDEX: usize = {};\n", + core_index + ) + .unwrap(); - transform::map_names(&mut ir, |k, s| match k { - transform::NameKind::Block => *s = format!("{}", s), - transform::NameKind::Fieldset => *s = format!("regs::{}", s), - transform::NameKind::Enum => *s = format!("vals::{}", s), - _ => {} - }); - + // Cleanups! transform::sort::Sort {}.run(&mut ir).unwrap(); transform::Sanitize {}.run(&mut ir).unwrap(); - let items = generate::render(&ir, &gen_opts()).unwrap(); - let mut file = File::create( - options - .out_dir - .join("src/peripherals") - .join(format!("{}_{}.rs", module, version)), - ) - .unwrap(); - let data = items.to_string().replace("] ", "]\n"); + // ============================== + // Setup chip dir + + let chip_dir = self + .opts + .out_dir + .join("src/chips") + .join(chip_core_name.to_ascii_lowercase()); + fs::create_dir_all(&chip_dir).unwrap(); + + // ============================== + // generate pac.rs + + let data = generate::render(&ir, &gen_opts()).unwrap().to_string(); + let data = data.replace("] ", "]\n"); // Remove inner attributes like #![no_std] - let re = Regex::new("# *! *\\[.*\\]").unwrap(); - let data = re.replace_all(&data, ""); + let data = Regex::new("# *! *\\[.*\\]").unwrap().replace_all(&data, ""); + + let mut file = File::create(chip_dir.join("pac.rs")).unwrap(); file.write_all(data.as_bytes()).unwrap(); + file.write_all(extra.as_bytes()).unwrap(); + + let mut device_x = String::new(); + + for irq in &core.interrupts { + write!(&mut device_x, "PROVIDE({} = DefaultHandler);\n", irq.name).unwrap(); + } + + // ============================== + // generate metadata.rs + + // (peripherals, interrupts, dma_channels) are often equal across multiple chips. + // To reduce bloat, deduplicate them. + let mut data = String::new(); + write!( + &mut data, + " + const PERIPHERALS: &'static [Peripheral] = {}; + const INTERRUPTS: &'static [Interrupt] = {}; + const DMA_CHANNELS: &'static [DmaChannel] = {}; + ", + stringify(&core.peripherals), + stringify(&core.interrupts), + stringify(&core.dma_channels), + ) + .unwrap(); + + let out_dir = self.opts.out_dir.clone(); + let n = self.metadata_dedup.len(); + let deduped_file = self.metadata_dedup.entry(data.clone()).or_insert_with(|| { + let file = format!("metadata_{:04}.rs", n); + let path = out_dir.join("src/chips").join(&file); + fs::write(path, data).unwrap(); + + file + }); + + let data = format!( + "include!(\"../{}\"); + pub const METADATA: Metadata = Metadata {{ + name: {:?}, + family: {:?}, + line: {:?}, + memory: {}, + peripherals: PERIPHERALS, + interrupts: INTERRUPTS, + dma_channels: DMA_CHANNELS, + }};", + deduped_file, + &chip.name, + &chip.family, + &chip.line, + stringify(&chip.memory), + ); + + let mut file = File::create(chip_dir.join("metadata.rs")).unwrap(); + file.write_all(data.as_bytes()).unwrap(); + + // ============================== + // generate device.x + + File::create(chip_dir.join("device.x")) + .unwrap() + .write_all(device_x.as_bytes()) + .unwrap(); + + // ============================== + // generate default memory.x + gen_memory_x(&chip_dir, &chip); } - // Generate src/lib_inner.rs - const PATHS_MARKER: &[u8] = b"// GEN PATHS HERE"; - let librs = include_bytes!("assets/lib_inner.rs"); - let i = bytes_find(librs, PATHS_MARKER).unwrap(); - let mut paths = String::new(); + fn load_chip(&mut self, name: &str) -> Chip { + let chip_path = self + .opts + .data_dir + .join("chips") + .join(&format!("{}.json", name)); + let chip = fs::read(chip_path).expect(&format!("Could not load chip {}", name)); + serde_yaml::from_slice(&chip).unwrap() + } - for name in chip_core_names { - let x = name.to_ascii_lowercase(); - write!( - &mut paths, - "#[cfg_attr(feature=\"{}\", path = \"chips/{}/mod.rs\")]", - x, x + pub fn gen(&mut self) { + fs::create_dir_all(self.opts.out_dir.join("src/peripherals")).unwrap(); + fs::create_dir_all(self.opts.out_dir.join("src/chips")).unwrap(); + + let mut chip_core_names: Vec = Vec::new(); + + for chip_name in &self.opts.chips.clone() { + println!("Generating {}...", chip_name); + + let mut chip = self.load_chip(chip_name); + + // Cleanup + for core in &mut chip.cores { + for irq in &mut core.interrupts { + irq.name = irq.name.to_ascii_uppercase(); + } + for p in &mut core.peripherals { + for irq in &mut p.interrupts { + irq.interrupt = irq.interrupt.to_ascii_uppercase(); + } + } + } + + // Generate + for (core_index, core) in chip.cores.iter().enumerate() { + let chip_core_name = match chip.cores.len() { + 1 => chip_name.clone(), + _ => format!("{}-{}", chip_name, core.name), + }; + + chip_core_names.push(chip_core_name.clone()); + self.gen_chip(&chip_core_name, &chip, core, core_index) + } + } + + for (module, version) in &self.all_peripheral_versions { + println!("loading {} {}", module, version); + + let regs_path = Path::new(&self.opts.data_dir) + .join("registers") + .join(&format!("{}_{}.yaml", module, version)); + + let mut ir: ir::IR = serde_yaml::from_reader(File::open(regs_path).unwrap()).unwrap(); + + transform::expand_extends::ExpandExtends {} + .run(&mut ir) + .unwrap(); + + transform::map_names(&mut ir, |k, s| match k { + transform::NameKind::Block => *s = format!("{}", s), + transform::NameKind::Fieldset => *s = format!("regs::{}", s), + transform::NameKind::Enum => *s = format!("vals::{}", s), + _ => {} + }); + + transform::sort::Sort {}.run(&mut ir).unwrap(); + transform::Sanitize {}.run(&mut ir).unwrap(); + + let items = generate::render(&ir, &gen_opts()).unwrap(); + let mut file = File::create( + self.opts + .out_dir + .join("src/peripherals") + .join(format!("{}_{}.rs", module, version)), + ) + .unwrap(); + let data = items.to_string().replace("] ", "]\n"); + + // Remove inner attributes like #![no_std] + let re = Regex::new("# *! *\\[.*\\]").unwrap(); + let data = re.replace_all(&data, ""); + file.write_all(data.as_bytes()).unwrap(); + } + + // Generate Cargo.toml + const BUILDDEP_BEGIN: &[u8] = b"# BEGIN BUILD DEPENDENCIES"; + const BUILDDEP_END: &[u8] = b"# END BUILD DEPENDENCIES"; + + let mut contents = include_bytes!("../../stm32-metapac/Cargo.toml").to_vec(); + let begin = bytes_find(&contents, BUILDDEP_BEGIN).unwrap(); + let end = bytes_find(&contents, BUILDDEP_END).unwrap() + BUILDDEP_END.len(); + contents.drain(begin..end); + fs::write(self.opts.out_dir.join("Cargo.toml"), contents).unwrap(); + + // copy misc files + fs::write( + self.opts.out_dir.join("build.rs"), + include_bytes!("../../stm32-metapac/build_pregenerated.rs"), + ) + .unwrap(); + fs::write( + self.opts.out_dir.join("src/lib.rs"), + include_bytes!("../../stm32-metapac/src/lib.rs"), + ) + .unwrap(); + fs::write( + self.opts.out_dir.join("src/common.rs"), + include_bytes!("../../stm32-metapac/src/common.rs"), + ) + .unwrap(); + fs::write( + self.opts.out_dir.join("src/metadata.rs"), + include_bytes!("../../stm32-metapac/src/metadata.rs"), ) .unwrap(); } - let mut contents: Vec = Vec::new(); - contents.extend(&librs[..i]); - contents.extend(paths.as_bytes()); - contents.extend(&librs[i + PATHS_MARKER.len()..]); - fs::write(options.out_dir.join("src").join("lib_inner.rs"), &contents).unwrap(); - - // Generate src/lib.rs - const CUT_MARKER: &[u8] = b"// GEN CUT HERE"; - let librs = include_bytes!("../../stm32-metapac/src/lib.rs"); - let i = bytes_find(librs, CUT_MARKER).unwrap(); - let mut contents: Vec = Vec::new(); - contents.extend(&librs[..i]); - contents.extend(b"include!(\"lib_inner.rs\");\n"); - fs::write(options.out_dir.join("src").join("lib.rs"), contents).unwrap(); - - // Generate src/common.rs - fs::write( - options.out_dir.join("src").join("common.rs"), - generate::COMMON_MODULE, - ) - .unwrap(); - - // Generate src/metadata.rs - fs::write( - options.out_dir.join("src").join("metadata.rs"), - include_bytes!("assets/metadata.rs"), - ) - .unwrap(); - - // Generate Cargo.toml - const BUILDDEP_BEGIN: &[u8] = b"# BEGIN BUILD DEPENDENCIES"; - const BUILDDEP_END: &[u8] = b"# END BUILD DEPENDENCIES"; - - let mut contents = include_bytes!("../../stm32-metapac/Cargo.toml").to_vec(); - let begin = bytes_find(&contents, BUILDDEP_BEGIN).unwrap(); - let end = bytes_find(&contents, BUILDDEP_END).unwrap() + BUILDDEP_END.len(); - contents.drain(begin..end); - fs::write(options.out_dir.join("Cargo.toml"), contents).unwrap(); - - // Generate build.rs - fs::write( - options.out_dir.join("build.rs"), - include_bytes!("assets/build.rs"), - ) - .unwrap(); } fn bytes_find(haystack: &[u8], needle: &[u8]) -> Option { @@ -561,6 +349,23 @@ fn bytes_find(haystack: &[u8], needle: &[u8]) -> Option { .position(|window| window == needle) } +fn stringify(metadata: T) -> String { + let mut metadata = format!("{:?}", metadata); + if metadata.starts_with('[') { + metadata = format!("&{}", metadata); + } + metadata = metadata.replace(": [", ": &["); + metadata = metadata.replace("kind: Ram", "kind: MemoryRegionKind::Ram"); + metadata = metadata.replace("kind: Flash", "kind: MemoryRegionKind::Flash"); + metadata +} + +fn gen_opts() -> generate::Options { + generate::Options { + common_module: CommonModule::External(TokenStream::from_str("crate::common").unwrap()), + } +} + fn gen_memory_x(out_dir: &PathBuf, chip: &Chip) { let mut memory_x = String::new(); diff --git a/stm32-metapac-gen/src/main.rs b/stm32-metapac-gen/src/main.rs index fd1e2a06..39144130 100644 --- a/stm32-metapac-gen/src/main.rs +++ b/stm32-metapac-gen/src/main.rs @@ -26,9 +26,10 @@ fn main() { chips.sort(); - gen(Options { + let opts = Options { out_dir, data_dir, chips, - }) + }; + Gen::new(opts).gen(); } diff --git a/stm32-metapac/Cargo.toml b/stm32-metapac/Cargo.toml index 5642af46..c994797b 100644 --- a/stm32-metapac/Cargo.toml +++ b/stm32-metapac/Cargo.toml @@ -3,6 +3,21 @@ name = "stm32-metapac" version = "0.1.0" edition = "2018" resolver = "2" +license = "MIT OR Apache-2.0" +repository = "https://github.com/embassy-rs/embassy" +description = "Peripheral Access Crate (PAC) for all STM32 chips, including metadata." + +# `cargo publish` is unable to figure out which .rs files are needed due to the include! magic. +include = [ + "**/*.rs", + "**/*.x", + "Cargo.toml", +] + +[package.metadata.docs.rs] +features = ["stm32h755zi-cm7", "pac", "metadata"] +default-target = "thumbv7em-none-eabihf" +targets = [] [dependencies] cortex-m = "0.7.3" diff --git a/stm32-metapac/build.rs b/stm32-metapac/build.rs index 7fd5a6b1..44c10ece 100644 --- a/stm32-metapac/build.rs +++ b/stm32-metapac/build.rs @@ -6,7 +6,7 @@ fn parse_chip_core(chip_and_core: &str) -> (String, Option) { let mut s = chip_and_core.split('-'); let chip_name: String = s.next().unwrap().to_string(); if let Some(c) = s.next() { - if c.starts_with("CM") { + if c.starts_with("cm") { return (chip_name, Some(c.to_ascii_lowercase())); } } @@ -18,36 +18,45 @@ fn main() { let out_dir = PathBuf::from(env::var_os("OUT_DIR").unwrap()); let data_dir = PathBuf::from("../stm32-data/data"); - println!("cwd: {:?}", env::current_dir()); - let chip_core_name = env::vars_os() .map(|(a, _)| a.to_string_lossy().to_string()) .find(|x| x.starts_with("CARGO_FEATURE_STM32")) .expect("No stm32xx Cargo feature enabled") .strip_prefix("CARGO_FEATURE_") .unwrap() - .to_ascii_uppercase() + .to_ascii_lowercase() .replace('_', "-"); let (chip_name, _) = parse_chip_core(&chip_core_name); - gen(Options { + let opts = Options { out_dir: out_dir.clone(), data_dir: data_dir.clone(), - chips: vec![chip_name], - }); + chips: vec![chip_name.to_ascii_uppercase()], + }; + Gen::new(opts).gen(); println!( "cargo:rustc-link-search={}/src/chips/{}", out_dir.display(), - chip_core_name.to_ascii_lowercase() + chip_core_name, ); #[cfg(feature = "memory-x")] println!( "cargo:rustc-link-search={}/src/chips/{}/memory_x/", out_dir.display(), - chip_core_name.to_ascii_lowercase() + chip_core_name + ); + println!( + "cargo:rustc-env=STM32_METAPAC_PAC_PATH={}/src/chips/{}/pac.rs", + out_dir.display(), + chip_core_name + ); + println!( + "cargo:rustc-env=STM32_METAPAC_METADATA_PATH={}/src/chips/{}/metadata.rs", + out_dir.display(), + chip_core_name ); println!("cargo:rerun-if-changed=build.rs"); diff --git a/stm32-metapac-gen/src/assets/build.rs b/stm32-metapac/build_pregenerated.rs similarity index 75% rename from stm32-metapac-gen/src/assets/build.rs rename to stm32-metapac/build_pregenerated.rs index 14d041ff..2219acb5 100644 --- a/stm32-metapac-gen/src/assets/build.rs +++ b/stm32-metapac/build_pregenerated.rs @@ -23,7 +23,15 @@ fn main() { println!( "cargo:rustc-link-search={}/src/chips/{}/memory_x/", crate_dir.display(), - chip_core_name, + chip_core_name + ); + println!( + "cargo:rustc-env=STM32_METAPAC_PAC_PATH=chips/{}/pac.rs", + chip_core_name + ); + println!( + "cargo:rustc-env=STM32_METAPAC_METADATA_PATH=chips/{}/metadata.rs", + chip_core_name ); println!("cargo:rerun-if-changed=build.rs"); diff --git a/stm32-metapac/src/common.rs b/stm32-metapac/src/common.rs new file mode 100644 index 00000000..568a9848 --- /dev/null +++ b/stm32-metapac/src/common.rs @@ -0,0 +1,80 @@ +use core::marker::PhantomData; + +#[derive(Copy, Clone, PartialEq, Eq)] +pub struct RW; +#[derive(Copy, Clone, PartialEq, Eq)] +pub struct R; +#[derive(Copy, Clone, PartialEq, Eq)] +pub struct W; + +mod sealed { + use super::*; + pub trait Access {} + impl Access for R {} + impl Access for W {} + impl Access for RW {} +} + +pub trait Access: sealed::Access + Copy {} +impl Access for R {} +impl Access for W {} +impl Access for RW {} + +pub trait Read: Access {} +impl Read for RW {} +impl Read for R {} + +pub trait Write: Access {} +impl Write for RW {} +impl Write for W {} + +#[derive(Copy, Clone, PartialEq, Eq)] +pub struct Reg { + ptr: *mut u8, + phantom: PhantomData<*mut (T, A)>, +} +unsafe impl Send for Reg {} +unsafe impl Sync for Reg {} + +impl Reg { + pub fn from_ptr(ptr: *mut u8) -> Self { + Self { + ptr, + phantom: PhantomData, + } + } + + pub fn ptr(&self) -> *mut T { + self.ptr as _ + } +} + +impl Reg { + pub unsafe fn read(&self) -> T { + (self.ptr as *mut T).read_volatile() + } +} + +impl Reg { + pub unsafe fn write_value(&self, val: T) { + (self.ptr as *mut T).write_volatile(val) + } +} + +impl Reg { + pub unsafe fn write(&self, f: impl FnOnce(&mut T) -> R) -> R { + let mut val = Default::default(); + let res = f(&mut val); + self.write_value(val); + res + } +} + +impl Reg { + pub unsafe fn modify(&self, f: impl FnOnce(&mut T) -> R) -> R { + let mut val = self.read(); + let res = f(&mut val); + self.write_value(val); + res + } +} diff --git a/stm32-metapac/src/lib.rs b/stm32-metapac/src/lib.rs index 5dd2682f..9cdc5e0b 100644 --- a/stm32-metapac/src/lib.rs +++ b/stm32-metapac/src/lib.rs @@ -3,5 +3,13 @@ #![allow(unused)] #![allow(non_camel_case_types)] -// GEN CUT HERE -include!(concat!(env!("OUT_DIR"), "/src/lib_inner.rs")); +pub mod common; + +#[cfg(feature = "pac")] +include!(env!("STM32_METAPAC_PAC_PATH")); + +#[cfg(feature = "metadata")] +pub mod metadata { + include!("metadata.rs"); + include!(env!("STM32_METAPAC_METADATA_PATH")); +} diff --git a/stm32-metapac-gen/src/assets/metadata.rs b/stm32-metapac/src/metadata.rs similarity index 100% rename from stm32-metapac-gen/src/assets/metadata.rs rename to stm32-metapac/src/metadata.rs