From 412bcad2d1b989189f529f272683ce95d5107ef0 Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Sun, 22 Oct 2023 22:39:55 +0200 Subject: [PATCH 1/2] stm32: rename HSI16 -> HSI --- embassy-stm32/Cargo.toml | 4 +-- embassy-stm32/src/rcc/g0.rs | 20 +++++++------- embassy-stm32/src/rcc/g4.rs | 14 +++++----- embassy-stm32/src/rcc/l0l1.rs | 20 +++++++------- embassy-stm32/src/rcc/l4l5.rs | 14 +++++----- embassy-stm32/src/rcc/u5.rs | 29 ++++++++++---------- embassy-stm32/src/rcc/wba.rs | 12 ++++---- embassy-stm32/src/rcc/wl.rs | 8 +++--- examples/stm32g4/src/bin/adc.rs | 2 +- examples/stm32g4/src/bin/pll.rs | 2 +- examples/stm32l0/src/bin/lora_cad.rs | 2 +- examples/stm32l0/src/bin/lora_lorawan.rs | 2 +- examples/stm32l0/src/bin/lora_p2p_receive.rs | 2 +- examples/stm32l0/src/bin/lora_p2p_send.rs | 2 +- examples/stm32l4/src/bin/rng.rs | 2 +- examples/stm32l4/src/bin/usb_serial.rs | 2 +- examples/stm32l5/src/bin/rng.rs | 2 +- examples/stm32l5/src/bin/usb_ethernet.rs | 2 +- examples/stm32l5/src/bin/usb_hid_mouse.rs | 2 +- examples/stm32l5/src/bin/usb_serial.rs | 2 +- examples/stm32u5/src/bin/usb_serial.rs | 4 +-- tests/stm32/src/common.rs | 8 +++--- 22 files changed, 79 insertions(+), 78 deletions(-) diff --git a/embassy-stm32/Cargo.toml b/embassy-stm32/Cargo.toml index f70e75d4..2d694267 100644 --- a/embassy-stm32/Cargo.toml +++ b/embassy-stm32/Cargo.toml @@ -58,7 +58,7 @@ rand_core = "0.6.3" sdio-host = "0.5.0" embedded-sdmmc = { git = "https://github.com/embassy-rs/embedded-sdmmc-rs", rev = "a4f293d3a6f72158385f79c98634cb8a14d0d2fc", optional = true } critical-section = "1.1" -stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-296dd041cce492e3b2b7fb3b8a6c05c9a34a90a1" } +stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-ee64389697d9234af374a89788aa52bb93d59284" } vcell = "0.1.3" bxcan = "0.7.0" nb = "1.0.0" @@ -76,7 +76,7 @@ critical-section = { version = "1.1", features = ["std"] } [build-dependencies] proc-macro2 = "1.0.36" quote = "1.0.15" -stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-296dd041cce492e3b2b7fb3b8a6c05c9a34a90a1", default-features = false, features = ["metadata"]} +stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-ee64389697d9234af374a89788aa52bb93d59284", default-features = false, features = ["metadata"]} [features] diff --git a/embassy-stm32/src/rcc/g0.rs b/embassy-stm32/src/rcc/g0.rs index 85ebd32e..45d41a4e 100644 --- a/embassy-stm32/src/rcc/g0.rs +++ b/embassy-stm32/src/rcc/g0.rs @@ -1,7 +1,7 @@ use crate::pac::flash::vals::Latency; use crate::pac::rcc::vals::{self, Sw}; pub use crate::pac::rcc::vals::{ - Hpre as AHBPrescaler, Hsidiv as HSI16Prescaler, Pllm, Plln, Pllp, Pllq, Pllr, Ppre as APBPrescaler, + Hpre as AHBPrescaler, Hsidiv as HSIPrescaler, Pllm, Plln, Pllp, Pllq, Pllr, Ppre as APBPrescaler, }; use crate::pac::{FLASH, PWR, RCC}; use crate::rcc::{set_freqs, Clocks}; @@ -14,7 +14,7 @@ pub const HSI_FREQ: Hertz = Hertz(16_000_000); #[derive(Clone, Copy)] pub enum ClockSrc { HSE(Hertz), - HSI16(HSI16Prescaler), + HSI(HSIPrescaler), PLL(PllConfig), LSI, } @@ -46,9 +46,9 @@ pub struct PllConfig { impl Default for PllConfig { #[inline] fn default() -> PllConfig { - // HSI16 / 1 * 8 / 2 = 64 MHz + // HSI / 1 * 8 / 2 = 64 MHz PllConfig { - source: PllSrc::HSI16, + source: PllSrc::HSI, m: Pllm::DIV1, n: Plln::MUL8, r: Pllr::DIV2, @@ -60,7 +60,7 @@ impl Default for PllConfig { #[derive(Clone, Copy, Eq, PartialEq)] pub enum PllSrc { - HSI16, + HSI, HSE(Hertz), } @@ -77,7 +77,7 @@ impl Default for Config { #[inline] fn default() -> Config { Config { - mux: ClockSrc::HSI16(HSI16Prescaler::DIV1), + mux: ClockSrc::HSI(HSIPrescaler::DIV1), ahb_pre: AHBPrescaler::DIV1, apb_pre: APBPrescaler::DIV1, low_power_run: false, @@ -89,7 +89,7 @@ impl Default for Config { impl PllConfig { pub(crate) fn init(self) -> Hertz { let (src, input_freq) = match self.source { - PllSrc::HSI16 => (vals::Pllsrc::HSI, HSI_FREQ), + PllSrc::HSI => (vals::Pllsrc::HSI, HSI_FREQ), PllSrc::HSE(freq) => (vals::Pllsrc::HSE, freq), }; @@ -121,7 +121,7 @@ impl PllConfig { // > 3. Change the desired parameter. // Enable whichever clock source we're using, and wait for it to become ready match self.source { - PllSrc::HSI16 => { + PllSrc::HSI => { RCC.cr().write(|w| w.set_hsion(true)); while !RCC.cr().read().hsirdy() {} } @@ -167,8 +167,8 @@ impl PllConfig { pub(crate) unsafe fn init(config: Config) { let (sys_clk, sw) = match config.mux { - ClockSrc::HSI16(div) => { - // Enable HSI16 + ClockSrc::HSI(div) => { + // Enable HSI RCC.cr().write(|w| { w.set_hsidiv(div); w.set_hsion(true) diff --git a/embassy-stm32/src/rcc/g4.rs b/embassy-stm32/src/rcc/g4.rs index ba2a5e19..b14a6197 100644 --- a/embassy-stm32/src/rcc/g4.rs +++ b/embassy-stm32/src/rcc/g4.rs @@ -18,14 +18,14 @@ pub const HSI_FREQ: Hertz = Hertz(16_000_000); #[derive(Clone, Copy)] pub enum ClockSrc { HSE(Hertz), - HSI16, + HSI, PLL, } /// PLL clock input source #[derive(Clone, Copy, Debug)] pub enum PllSrc { - HSI16, + HSI, HSE(Hertz), } @@ -33,7 +33,7 @@ impl Into for PllSrc { fn into(self) -> Pllsrc { match self { PllSrc::HSE(..) => Pllsrc::HSE, - PllSrc::HSI16 => Pllsrc::HSI, + PllSrc::HSI => Pllsrc::HSI, } } } @@ -112,7 +112,7 @@ impl Default for Config { #[inline] fn default() -> Config { Config { - mux: ClockSrc::HSI16, + mux: ClockSrc::HSI, ahb_pre: AHBPrescaler::DIV1, apb1_pre: APBPrescaler::DIV1, apb2_pre: APBPrescaler::DIV1, @@ -135,7 +135,7 @@ pub struct PllFreq { pub(crate) unsafe fn init(config: Config) { let pll_freq = config.pll.map(|pll_config| { let src_freq = match pll_config.source { - PllSrc::HSI16 => { + PllSrc::HSI => { RCC.cr().write(|w| w.set_hsion(true)); while !RCC.cr().read().hsirdy() {} @@ -196,8 +196,8 @@ pub(crate) unsafe fn init(config: Config) { }); let (sys_clk, sw) = match config.mux { - ClockSrc::HSI16 => { - // Enable HSI16 + ClockSrc::HSI => { + // Enable HSI RCC.cr().write(|w| w.set_hsion(true)); while !RCC.cr().read().hsirdy() {} diff --git a/embassy-stm32/src/rcc/l0l1.rs b/embassy-stm32/src/rcc/l0l1.rs index f10c5962..52e9ccb3 100644 --- a/embassy-stm32/src/rcc/l0l1.rs +++ b/embassy-stm32/src/rcc/l0l1.rs @@ -18,20 +18,20 @@ pub enum ClockSrc { MSI(MSIRange), PLL(PLLSource, PLLMul, PLLDiv), HSE(Hertz), - HSI16, + HSI, } /// PLL clock input source #[derive(Clone, Copy)] pub enum PLLSource { - HSI16, + HSI, HSE(Hertz), } impl From for Pllsrc { fn from(val: PLLSource) -> Pllsrc { match val { - PLLSource::HSI16 => Pllsrc::HSI, + PLLSource::HSI => Pllsrc::HSI, PLLSource::HSE(_) => Pllsrc::HSE, } } @@ -83,10 +83,10 @@ pub(crate) unsafe fn init(config: Config) { let freq = 32_768 * (1 << (range as u8 + 1)); (Hertz(freq), Sw::MSI) } - ClockSrc::HSI16 => { - // Enable HSI16 - RCC.cr().write(|w| w.set_hsi16on(true)); - while !RCC.cr().read().hsi16rdy() {} + ClockSrc::HSI => { + // Enable HSI + RCC.cr().write(|w| w.set_hsion(true)); + while !RCC.cr().read().hsirdy() {} (HSI_FREQ, Sw::HSI) } @@ -105,10 +105,10 @@ pub(crate) unsafe fn init(config: Config) { while !RCC.cr().read().hserdy() {} freq } - PLLSource::HSI16 => { + PLLSource::HSI => { // Enable HSI - RCC.cr().write(|w| w.set_hsi16on(true)); - while !RCC.cr().read().hsi16rdy() {} + RCC.cr().write(|w| w.set_hsion(true)); + while !RCC.cr().read().hsirdy() {} HSI_FREQ } }; diff --git a/embassy-stm32/src/rcc/l4l5.rs b/embassy-stm32/src/rcc/l4l5.rs index e54bfa0e..8cf284d1 100644 --- a/embassy-stm32/src/rcc/l4l5.rs +++ b/embassy-stm32/src/rcc/l4l5.rs @@ -34,7 +34,7 @@ pub struct Pll { pub struct Config { // base clock sources pub msi: Option, - pub hsi16: bool, + pub hsi: bool, pub hse: Option, #[cfg(not(any(stm32l47x, stm32l48x)))] pub hsi48: bool, @@ -63,7 +63,7 @@ impl Default for Config { fn default() -> Config { Config { hse: None, - hsi16: false, + hsi: false, msi: Some(MSIRange::RANGE4M), mux: ClockSrc::MSI, ahb_pre: AHBPrescaler::DIV1, @@ -127,7 +127,7 @@ pub(crate) unsafe fn init(config: Config) { msirange_to_hertz(range) }); - let hsi16 = config.hsi16.then(|| { + let hsi = config.hsi.then(|| { RCC.cr().write(|w| w.set_hsion(true)); while !RCC.cr().read().hsirdy() {} @@ -179,7 +179,7 @@ pub(crate) unsafe fn init(config: Config) { }), }; - let pll_input = PllInput { hse, hsi16, msi }; + let pll_input = PllInput { hse, hsi, msi }; let pll = init_pll(PllInstance::Pll, config.pll, &pll_input); let pllsai1 = init_pll(PllInstance::Pllsai1, config.pllsai1, &pll_input); #[cfg(any(stm32l47x, stm32l48x, stm32l49x, stm32l4ax, rcc_l4plus, stm32l5))] @@ -187,7 +187,7 @@ pub(crate) unsafe fn init(config: Config) { let sys_clk = match config.mux { ClockSrc::HSE => hse.unwrap(), - ClockSrc::HSI => hsi16.unwrap(), + ClockSrc::HSI => hsi.unwrap(), ClockSrc::MSI => msi.unwrap(), ClockSrc::PLL1_R => pll._r.unwrap(), }; @@ -315,7 +315,7 @@ fn get_equal(mut iter: impl Iterator) -> Result, ()> } struct PllInput { - hsi16: Option, + hsi: Option, hse: Option, msi: Option, } @@ -358,7 +358,7 @@ fn init_pll(instance: PllInstance, config: Option, input: &PllInput) -> Pll let pll_src = match pll.source { PLLSource::NONE => panic!("must not select PLL source as NONE"), PLLSource::HSE => input.hse, - PLLSource::HSI => input.hsi16, + PLLSource::HSI => input.hsi, PLLSource::MSI => input.msi, }; diff --git a/embassy-stm32/src/rcc/u5.rs b/embassy-stm32/src/rcc/u5.rs index 62bed8be..7664557e 100644 --- a/embassy-stm32/src/rcc/u5.rs +++ b/embassy-stm32/src/rcc/u5.rs @@ -10,6 +10,7 @@ pub const HSI_FREQ: Hertz = Hertz(16_000_000); pub use crate::pac::pwr::vals::Vos as VoltageScale; #[derive(Copy, Clone)] +#[allow(non_camel_case_types)] pub enum ClockSrc { /// Use an internal medium speed oscillator (MSIS) as the system clock. MSI(Msirange), @@ -19,9 +20,9 @@ pub enum ClockSrc { /// never exceed 50 MHz. HSE(Hertz), /// Use the 16 MHz internal high speed oscillator as the system clock. - HSI16, + HSI, /// Use PLL1 as the system clock. - PLL1R(PllConfig), + PLL1_R(PllConfig), } impl Default for ClockSrc { @@ -53,10 +54,10 @@ pub struct PllConfig { } impl PllConfig { - /// A configuration for HSI16 / 1 * 10 / 1 = 160 MHz - pub const fn hsi16_160mhz() -> Self { + /// A configuration for HSI / 1 * 10 / 1 = 160 MHz + pub const fn hsi_160mhz() -> Self { PllConfig { - source: PllSrc::HSI16, + source: PllSrc::HSI, m: Pllm::DIV1, n: Plln::MUL10, r: Plldiv::DIV1, @@ -84,7 +85,7 @@ pub enum PllSrc { /// never exceed 50 MHz. HSE(Hertz), /// Use the 16 MHz internal high speed oscillator as the PLL source. - HSI16, + HSI, } impl Into for PllSrc { @@ -92,7 +93,7 @@ impl Into for PllSrc { match self { PllSrc::MSIS(..) => Pllsrc::MSIS, PllSrc::HSE(..) => Pllsrc::HSE, - PllSrc::HSI16 => Pllsrc::HSI, + PllSrc::HSI => Pllsrc::HSI, } } } @@ -102,8 +103,8 @@ impl Into for ClockSrc { match self { ClockSrc::MSI(..) => Sw::MSIS, ClockSrc::HSE(..) => Sw::HSE, - ClockSrc::HSI16 => Sw::HSI, - ClockSrc::PLL1R(..) => Sw::PLL1_R, + ClockSrc::HSI => Sw::HSI, + ClockSrc::PLL1_R(..) => Sw::PLL1_R, } } } @@ -125,7 +126,7 @@ pub struct Config { } impl Config { - unsafe fn init_hsi16(&self) -> Hertz { + unsafe fn init_hsi(&self) -> Hertz { RCC.cr().write(|w| w.set_hsion(true)); while !RCC.cr().read().hsirdy() {} @@ -211,13 +212,13 @@ pub(crate) unsafe fn init(config: Config) { let sys_clk = match config.mux { ClockSrc::MSI(range) => config.init_msis(range), ClockSrc::HSE(freq) => config.init_hse(freq), - ClockSrc::HSI16 => config.init_hsi16(), - ClockSrc::PLL1R(pll) => { + ClockSrc::HSI => config.init_hsi(), + ClockSrc::PLL1_R(pll) => { // Configure the PLL source let source_clk = match pll.source { PllSrc::MSIS(range) => config.init_msis(range), PllSrc::HSE(hertz) => config.init_hse(hertz), - PllSrc::HSI16 => config.init_hsi16(), + PllSrc::HSI => config.init_hsi(), }; // Calculate the reference clock, which is the source divided by m @@ -292,7 +293,7 @@ pub(crate) unsafe fn init(config: Config) { // Set the prescaler for PWR EPOD w.set_pllmboost(mboost); - // Enable PLL1R output + // Enable PLL1_R output w.set_pllren(true); }); diff --git a/embassy-stm32/src/rcc/wba.rs b/embassy-stm32/src/rcc/wba.rs index aabf782e..8925d960 100644 --- a/embassy-stm32/src/rcc/wba.rs +++ b/embassy-stm32/src/rcc/wba.rs @@ -13,20 +13,20 @@ pub use crate::pac::rcc::vals::{Hpre as AHBPrescaler, Ppre as APBPrescaler}; #[derive(Copy, Clone)] pub enum ClockSrc { HSE(Hertz), - HSI16, + HSI, } #[derive(Clone, Copy, Debug)] pub enum PllSrc { HSE(Hertz), - HSI16, + HSI, } impl Into for PllSrc { fn into(self) -> Pllsrc { match self { PllSrc::HSE(..) => Pllsrc::HSE, - PllSrc::HSI16 => Pllsrc::HSI, + PllSrc::HSI => Pllsrc::HSI, } } } @@ -35,7 +35,7 @@ impl Into for ClockSrc { fn into(self) -> Sw { match self { ClockSrc::HSE(..) => Sw::HSE, - ClockSrc::HSI16 => Sw::HSI, + ClockSrc::HSI => Sw::HSI, } } } @@ -52,7 +52,7 @@ pub struct Config { impl Default for Config { fn default() -> Self { Self { - mux: ClockSrc::HSI16, + mux: ClockSrc::HSI, ahb_pre: AHBPrescaler::DIV1, apb1_pre: APBPrescaler::DIV1, apb2_pre: APBPrescaler::DIV1, @@ -70,7 +70,7 @@ pub(crate) unsafe fn init(config: Config) { freq } - ClockSrc::HSI16 => { + ClockSrc::HSI => { RCC.cr().write(|w| w.set_hsion(true)); while !RCC.cr().read().hsirdy() {} diff --git a/embassy-stm32/src/rcc/wl.rs b/embassy-stm32/src/rcc/wl.rs index 401486bb..4d68b55c 100644 --- a/embassy-stm32/src/rcc/wl.rs +++ b/embassy-stm32/src/rcc/wl.rs @@ -19,7 +19,7 @@ pub const HSE_FREQ: Hertz = Hertz(32_000_000); pub enum ClockSrc { MSI(MSIRange), HSE, - HSI16, + HSI, } /// Clocks configutation @@ -50,7 +50,7 @@ impl Default for Config { pub(crate) unsafe fn init(config: Config) { let (sys_clk, sw, vos) = match config.mux { - ClockSrc::HSI16 => (HSI_FREQ, Sw::HSI, VoltageScale::RANGE2), + ClockSrc::HSI => (HSI_FREQ, Sw::HSI, VoltageScale::RANGE2), ClockSrc::HSE => (HSE_FREQ, Sw::HSE, VoltageScale::RANGE1), ClockSrc::MSI(range) => (msirange_to_hertz(range), Sw::MSI, msirange_to_vos(range)), }; @@ -97,8 +97,8 @@ pub(crate) unsafe fn init(config: Config) { while FLASH.acr().read().latency() != ws {} match config.mux { - ClockSrc::HSI16 => { - // Enable HSI16 + ClockSrc::HSI => { + // Enable HSI RCC.cr().write(|w| w.set_hsion(true)); while !RCC.cr().read().hsirdy() {} } diff --git a/examples/stm32g4/src/bin/adc.rs b/examples/stm32g4/src/bin/adc.rs index db7f6ecb..f0573384 100644 --- a/examples/stm32g4/src/bin/adc.rs +++ b/examples/stm32g4/src/bin/adc.rs @@ -15,7 +15,7 @@ async fn main(_spawner: Spawner) { let mut config = Config::default(); config.rcc.pll = Some(Pll { - source: PllSrc::HSI16, + source: PllSrc::HSI, prediv_m: PllM::DIV4, mul_n: PllN::MUL85, div_p: None, diff --git a/examples/stm32g4/src/bin/pll.rs b/examples/stm32g4/src/bin/pll.rs index 43242647..90c3f8dc 100644 --- a/examples/stm32g4/src/bin/pll.rs +++ b/examples/stm32g4/src/bin/pll.rs @@ -14,7 +14,7 @@ async fn main(_spawner: Spawner) { let mut config = Config::default(); config.rcc.pll = Some(Pll { - source: PllSrc::HSI16, + source: PllSrc::HSI, prediv_m: PllM::DIV4, mul_n: PllN::MUL85, div_p: None, diff --git a/examples/stm32l0/src/bin/lora_cad.rs b/examples/stm32l0/src/bin/lora_cad.rs index 987cdba0..5c2b331c 100644 --- a/examples/stm32l0/src/bin/lora_cad.rs +++ b/examples/stm32l0/src/bin/lora_cad.rs @@ -23,7 +23,7 @@ const LORA_FREQUENCY_IN_HZ: u32 = 903_900_000; // warning: set this appropriatel #[embassy_executor::main] async fn main(_spawner: Spawner) { let mut config = embassy_stm32::Config::default(); - config.rcc.mux = embassy_stm32::rcc::ClockSrc::HSI16; + config.rcc.mux = embassy_stm32::rcc::ClockSrc::HSI; config.rcc.enable_hsi48 = true; let p = embassy_stm32::init(config); diff --git a/examples/stm32l0/src/bin/lora_lorawan.rs b/examples/stm32l0/src/bin/lora_lorawan.rs index 7a93737e..d44d03d3 100644 --- a/examples/stm32l0/src/bin/lora_lorawan.rs +++ b/examples/stm32l0/src/bin/lora_lorawan.rs @@ -33,7 +33,7 @@ const LORAWAN_REGION: region::Region = region::Region::EU868; // warning: set th #[embassy_executor::main] async fn main(_spawner: Spawner) { let mut config = embassy_stm32::Config::default(); - config.rcc.mux = embassy_stm32::rcc::ClockSrc::HSI16; + config.rcc.mux = embassy_stm32::rcc::ClockSrc::HSI; config.rcc.enable_hsi48 = true; let p = embassy_stm32::init(config); diff --git a/examples/stm32l0/src/bin/lora_p2p_receive.rs b/examples/stm32l0/src/bin/lora_p2p_receive.rs index 06e2744a..0478ce1e 100644 --- a/examples/stm32l0/src/bin/lora_p2p_receive.rs +++ b/examples/stm32l0/src/bin/lora_p2p_receive.rs @@ -23,7 +23,7 @@ const LORA_FREQUENCY_IN_HZ: u32 = 903_900_000; // warning: set this appropriatel #[embassy_executor::main] async fn main(_spawner: Spawner) { let mut config = embassy_stm32::Config::default(); - config.rcc.mux = embassy_stm32::rcc::ClockSrc::HSI16; + config.rcc.mux = embassy_stm32::rcc::ClockSrc::HSI; config.rcc.enable_hsi48 = true; let p = embassy_stm32::init(config); diff --git a/examples/stm32l0/src/bin/lora_p2p_send.rs b/examples/stm32l0/src/bin/lora_p2p_send.rs index 23cc1c6f..88a836d3 100644 --- a/examples/stm32l0/src/bin/lora_p2p_send.rs +++ b/examples/stm32l0/src/bin/lora_p2p_send.rs @@ -23,7 +23,7 @@ const LORA_FREQUENCY_IN_HZ: u32 = 903_900_000; // warning: set this appropriatel #[embassy_executor::main] async fn main(_spawner: Spawner) { let mut config = embassy_stm32::Config::default(); - config.rcc.mux = embassy_stm32::rcc::ClockSrc::HSI16; + config.rcc.mux = embassy_stm32::rcc::ClockSrc::HSI; config.rcc.enable_hsi48 = true; let p = embassy_stm32::init(config); diff --git a/examples/stm32l4/src/bin/rng.rs b/examples/stm32l4/src/bin/rng.rs index d8a4e825..553d11c0 100644 --- a/examples/stm32l4/src/bin/rng.rs +++ b/examples/stm32l4/src/bin/rng.rs @@ -17,7 +17,7 @@ bind_interrupts!(struct Irqs { async fn main(_spawner: Spawner) { let mut config = Config::default(); config.rcc.mux = ClockSrc::PLL1_R; - config.rcc.hsi16 = true; + config.rcc.hsi = true; config.rcc.pll = Some(Pll { source: PLLSource::HSI, prediv: PllPreDiv::DIV1, diff --git a/examples/stm32l4/src/bin/usb_serial.rs b/examples/stm32l4/src/bin/usb_serial.rs index 28247654..15c6f198 100644 --- a/examples/stm32l4/src/bin/usb_serial.rs +++ b/examples/stm32l4/src/bin/usb_serial.rs @@ -25,7 +25,7 @@ async fn main(_spawner: Spawner) { let mut config = Config::default(); config.rcc.hsi48 = true; config.rcc.mux = ClockSrc::PLL1_R; - config.rcc.hsi16 = true; + config.rcc.hsi = true; config.rcc.pll = Some(Pll { source: PLLSource::HSI, prediv: PllPreDiv::DIV1, diff --git a/examples/stm32l5/src/bin/rng.rs b/examples/stm32l5/src/bin/rng.rs index b57f438f..b9d4cd25 100644 --- a/examples/stm32l5/src/bin/rng.rs +++ b/examples/stm32l5/src/bin/rng.rs @@ -16,7 +16,7 @@ bind_interrupts!(struct Irqs { #[embassy_executor::main] async fn main(_spawner: Spawner) { let mut config = Config::default(); - config.rcc.hsi16 = true; + config.rcc.hsi = true; config.rcc.mux = ClockSrc::PLL1_R; config.rcc.pll = Some(Pll { // 64Mhz clock (16 / 1 * 8 / 2) diff --git a/examples/stm32l5/src/bin/usb_ethernet.rs b/examples/stm32l5/src/bin/usb_ethernet.rs index bbe44642..f5b3ca34 100644 --- a/examples/stm32l5/src/bin/usb_ethernet.rs +++ b/examples/stm32l5/src/bin/usb_ethernet.rs @@ -45,7 +45,7 @@ async fn net_task(stack: &'static Stack>) -> ! { #[embassy_executor::main] async fn main(spawner: Spawner) { let mut config = Config::default(); - config.rcc.hsi16 = true; + config.rcc.hsi = true; config.rcc.mux = ClockSrc::PLL1_R; config.rcc.pll = Some(Pll { // 80Mhz clock (16 / 1 * 10 / 2) diff --git a/examples/stm32l5/src/bin/usb_hid_mouse.rs b/examples/stm32l5/src/bin/usb_hid_mouse.rs index 44e29ee9..bec3d5e4 100644 --- a/examples/stm32l5/src/bin/usb_hid_mouse.rs +++ b/examples/stm32l5/src/bin/usb_hid_mouse.rs @@ -22,7 +22,7 @@ bind_interrupts!(struct Irqs { #[embassy_executor::main] async fn main(_spawner: Spawner) { let mut config = Config::default(); - config.rcc.hsi16 = true; + config.rcc.hsi = true; config.rcc.mux = ClockSrc::PLL1_R; config.rcc.pll = Some(Pll { // 80Mhz clock (16 / 1 * 10 / 2) diff --git a/examples/stm32l5/src/bin/usb_serial.rs b/examples/stm32l5/src/bin/usb_serial.rs index 612b891a..ff1154f9 100644 --- a/examples/stm32l5/src/bin/usb_serial.rs +++ b/examples/stm32l5/src/bin/usb_serial.rs @@ -20,7 +20,7 @@ bind_interrupts!(struct Irqs { #[embassy_executor::main] async fn main(_spawner: Spawner) { let mut config = Config::default(); - config.rcc.hsi16 = true; + config.rcc.hsi = true; config.rcc.mux = ClockSrc::PLL1_R; config.rcc.pll = Some(Pll { // 80Mhz clock (16 / 1 * 10 / 2) diff --git a/examples/stm32u5/src/bin/usb_serial.rs b/examples/stm32u5/src/bin/usb_serial.rs index 9b2adb0a..f59f623b 100644 --- a/examples/stm32u5/src/bin/usb_serial.rs +++ b/examples/stm32u5/src/bin/usb_serial.rs @@ -23,8 +23,8 @@ async fn main(_spawner: Spawner) { info!("Hello World!"); let mut config = Config::default(); - config.rcc.mux = ClockSrc::PLL1R(PllConfig { - source: PllSrc::HSI16, + config.rcc.mux = ClockSrc::PLL1_R(PllConfig { + source: PllSrc::HSI, m: Pllm::DIV2, n: Plln::MUL10, r: Plldiv::DIV1, diff --git a/tests/stm32/src/common.rs b/tests/stm32/src/common.rs index a0ccfe3a..693fd067 100644 --- a/tests/stm32/src/common.rs +++ b/tests/stm32/src/common.rs @@ -365,7 +365,7 @@ pub fn config() -> Config { { use embassy_stm32::rcc::*; config.rcc.mux = ClockSrc::PLL1_R; - config.rcc.hsi16 = true; + config.rcc.hsi = true; config.rcc.pll = Some(Pll { source: PLLSource::HSI, prediv: PllPreDiv::DIV1, @@ -388,7 +388,7 @@ pub fn config() -> Config { #[cfg(any(feature = "stm32l552ze"))] { use embassy_stm32::rcc::*; - config.rcc.hsi16 = true; + config.rcc.hsi = true; config.rcc.mux = ClockSrc::PLL1_R; config.rcc.pll = Some(Pll { // 110Mhz clock (16 / 4 * 55 / 2) @@ -412,7 +412,7 @@ pub fn config() -> Config { use embassy_stm32::rcc::*; config.rcc.mux = ClockSrc::PLL( // 32Mhz clock (16 * 4 / 2) - PLLSource::HSI16, + PLLSource::HSI, PLLMul::MUL4, PLLDiv::DIV2, ); @@ -423,7 +423,7 @@ pub fn config() -> Config { use embassy_stm32::rcc::*; config.rcc.mux = ClockSrc::PLL( // 32Mhz clock (16 * 4 / 2) - PLLSource::HSI16, + PLLSource::HSI, PLLMul::MUL4, PLLDiv::DIV2, ); From a84ad741a48dfce29b7f764e0cfb6877eba9a027 Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Sun, 22 Oct 2023 22:45:11 +0200 Subject: [PATCH 2/2] stm32/tests: add stm32wba52cg, stm32u5a9zj --- ci.sh | 7 +++++++ tests/stm32/Cargo.toml | 2 ++ tests/stm32/src/common.rs | 35 ++++++++++++++++++++++++++++++++++- 3 files changed, 43 insertions(+), 1 deletion(-) diff --git a/ci.sh b/ci.sh index efe98c7a..ffd36a45 100755 --- a/ci.sh +++ b/ci.sh @@ -197,6 +197,8 @@ cargo batch \ --- build --release --manifest-path tests/stm32/Cargo.toml --target thumbv7em-none-eabi --features stm32wb55rg --out-dir out/tests/stm32wb55rg \ --- build --release --manifest-path tests/stm32/Cargo.toml --target thumbv7em-none-eabi --features stm32h563zi --out-dir out/tests/stm32h563zi \ --- build --release --manifest-path tests/stm32/Cargo.toml --target thumbv7em-none-eabi --features stm32u585ai --out-dir out/tests/stm32u585ai \ + --- build --release --manifest-path tests/stm32/Cargo.toml --target thumbv7em-none-eabi --features stm32u5a5zj --out-dir out/tests/stm32u5a5zj \ + --- build --release --manifest-path tests/stm32/Cargo.toml --target thumbv7em-none-eabi --features stm32wba52cg --out-dir out/tests/stm32wba52cg \ --- build --release --manifest-path tests/stm32/Cargo.toml --target thumbv6m-none-eabi --features stm32l073rz --out-dir out/tests/stm32l073rz \ --- build --release --manifest-path tests/stm32/Cargo.toml --target thumbv7m-none-eabi --features stm32l152re --out-dir out/tests/stm32l152re \ --- build --release --manifest-path tests/stm32/Cargo.toml --target thumbv7em-none-eabi --features stm32l4a6zg --out-dir out/tests/stm32l4a6zg \ @@ -215,8 +217,13 @@ cargo batch \ rm out/tests/stm32wb55rg/wpan_mac rm out/tests/stm32wb55rg/wpan_ble + +# unstable, I think it's running out of RAM? rm out/tests/stm32f207zg/eth +# doesn't work. Wire in D0-D1 might be bad, or the special IOVDD2 PGx pins. +rm out/tests/stm32u5a5zj/{gpio,usart*} + if [[ -z "${TELEPROBE_TOKEN-}" ]]; then echo No teleprobe token found, skipping running HIL tests exit diff --git a/tests/stm32/Cargo.toml b/tests/stm32/Cargo.toml index 48598ec2..c6a50e2c 100644 --- a/tests/stm32/Cargo.toml +++ b/tests/stm32/Cargo.toml @@ -17,6 +17,8 @@ stm32h7a3zi = ["embassy-stm32/stm32h7a3zi", "not-gpdma", "rng"] stm32wb55rg = ["embassy-stm32/stm32wb55rg", "chrono", "not-gpdma", "ble", "mac" , "rng"] stm32h563zi = ["embassy-stm32/stm32h563zi", "chrono", "eth", "rng"] stm32u585ai = ["embassy-stm32/stm32u585ai", "chrono", "rng"] +stm32u5a5zj = ["embassy-stm32/stm32u5a5zj", "chrono", "rng"] +stm32wba52cg = ["embassy-stm32/stm32wba52cg", "chrono", "rng"] stm32l073rz = ["embassy-stm32/stm32l073rz", "not-gpdma", "rng"] stm32l152re = ["embassy-stm32/stm32l152re", "chrono", "not-gpdma"] stm32l4a6zg = ["embassy-stm32/stm32l4a6zg", "chrono", "not-gpdma", "rng"] diff --git a/tests/stm32/src/common.rs b/tests/stm32/src/common.rs index 693fd067..0a70e6a7 100644 --- a/tests/stm32/src/common.rs +++ b/tests/stm32/src/common.rs @@ -24,6 +24,8 @@ teleprobe_meta::target!(b"nucleo-stm32h753zi"); teleprobe_meta::target!(b"nucleo-stm32h7a3zi"); #[cfg(feature = "stm32u585ai")] teleprobe_meta::target!(b"iot-stm32u585ai"); +#[cfg(feature = "stm32u5a5zj")] +teleprobe_meta::target!(b"nucleo-stm32u5a5zj"); #[cfg(feature = "stm32h563zi")] teleprobe_meta::target!(b"nucleo-stm32h563zi"); #[cfg(feature = "stm32c031c6")] @@ -48,6 +50,8 @@ teleprobe_meta::target!(b"nucleo-stm32f303ze"); teleprobe_meta::target!(b"nucleo-stm32l496zg"); #[cfg(feature = "stm32wl55jc")] teleprobe_meta::target!(b"nucleo-stm32wl55jc"); +#[cfg(feature = "stm32wba52cg")] +teleprobe_meta::target!(b"nucleo-stm32wba52cg"); macro_rules! define_peris { ($($name:ident = $peri:ident,)* $(@irq $irq_name:ident = $irq_code:tt,)*) => { @@ -127,6 +131,12 @@ define_peris!( SPI = SPI1, SPI_SCK = PE13, SPI_MOSI = PE15, SPI_MISO = PE14, SPI_TX_DMA = GPDMA1_CH0, SPI_RX_DMA = GPDMA1_CH1, @irq UART = {USART3 => embassy_stm32::usart::InterruptHandler;}, ); +#[cfg(feature = "stm32u5a5zj")] +define_peris!( + UART = LPUART1, UART_TX = PG7, UART_RX = PG8, UART_TX_DMA = GPDMA1_CH0, UART_RX_DMA = GPDMA1_CH1, + SPI = SPI1, SPI_SCK = PA5, SPI_MOSI = PA7, SPI_MISO = PA6, SPI_TX_DMA = GPDMA1_CH0, SPI_RX_DMA = GPDMA1_CH1, + @irq UART = {LPUART1 => embassy_stm32::usart::InterruptHandler;}, +); #[cfg(feature = "stm32h563zi")] define_peris!( UART = LPUART1, UART_TX = PB6, UART_RX = PB7, UART_TX_DMA = GPDMA1_CH0, UART_RX_DMA = GPDMA1_CH1, @@ -199,8 +209,21 @@ define_peris!( SPI = SPI1, SPI_SCK = PA5, SPI_MOSI = PA7, SPI_MISO = PA6, SPI_TX_DMA = DMA1_CH3, SPI_RX_DMA = DMA1_CH2, @irq UART = {USART1 => embassy_stm32::usart::InterruptHandler;}, ); +#[cfg(feature = "stm32wba52cg")] +define_peris!( + UART = LPUART1, UART_TX = PB5, UART_RX = PA10, UART_TX_DMA = GPDMA1_CH0, UART_RX_DMA = GPDMA1_CH1, + SPI = SPI1, SPI_SCK = PB4, SPI_MOSI = PA15, SPI_MISO = PB3, SPI_TX_DMA = GPDMA1_CH0, SPI_RX_DMA = GPDMA1_CH1, + @irq UART = {LPUART1 => embassy_stm32::usart::InterruptHandler;}, +); pub fn config() -> Config { + // Setting this bit is mandatory to use PG[15:2]. + #[cfg(feature = "stm32u5a5zj")] + embassy_stm32::pac::PWR.svmcr().modify(|w| { + w.set_io2sv(true); + w.set_io2vmen(true); + }); + #[allow(unused_mut)] let mut config = Config::default(); @@ -401,12 +424,22 @@ pub fn config() -> Config { }); } - #[cfg(feature = "stm32u585ai")] + #[cfg(any(feature = "stm32u585ai", feature = "stm32u5a5zj"))] { use embassy_stm32::rcc::*; config.rcc.mux = ClockSrc::MSI(Msirange::RANGE_48MHZ); } + #[cfg(feature = "stm32wba52cg")] + { + use embassy_stm32::rcc::*; + config.rcc.mux = ClockSrc::HSI; + + embassy_stm32::pac::RCC.ccipr2().write(|w| { + w.set_rngsel(embassy_stm32::pac::rcc::vals::Rngsel::HSI); + }); + } + #[cfg(feature = "stm32l073rz")] { use embassy_stm32::rcc::*;