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Better interrupt handling

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This commit is contained in:
Thales Fragoso 2021-05-09 17:36:13 -03:00
parent 72fb3a7520
commit 490152d028
407 changed files with 15639 additions and 1318 deletions
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4
embassy-stm32/gen.py
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@ -151,7 +151,7 @@ for chip in chips.values():
f.write(f'impl_dma_channel!({channel}, {name}, {ch_num});') f.write(f'impl_dma_channel!({channel}, {name}, {ch_num});')
if peri['block'] == 'sdmmc_v2/SDMMC': if peri['block'] == 'sdmmc_v2/SDMMC':
f.write(f'impl_sdmmc!({name}, 0x{peri["address"]:x});') f.write(f'impl_sdmmc!({name});')
for pin, funcs in af.items(): for pin, funcs in af.items():
if pin in pins: if pin in pins:
if func := funcs.get(f'{name}_CK'): if func := funcs.get(f'{name}_CK'):
@ -215,7 +215,7 @@ for chip in chips.values():
#[derive(Copy, Clone, Debug, PartialEq, Eq)] #[derive(Copy, Clone, Debug, PartialEq, Eq)]
#[allow(non_camel_case_types)] #[allow(non_camel_case_types)]
enum InterruptEnum {{ pub enum InterruptEnum {{
{''.join(irq_variants)} {''.join(irq_variants)}
}} }}
unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum {{ unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum {{

14889
embassy-stm32/src/pac/regs.rs
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File diff suppressed because it is too large Load Diff

2
embassy-stm32/src/pac/stm32f401cb.rs
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@ -209,7 +209,7 @@ pub mod interrupt {
#[derive(Copy, Clone, Debug, PartialEq, Eq)] #[derive(Copy, Clone, Debug, PartialEq, Eq)]
#[allow(non_camel_case_types)] #[allow(non_camel_case_types)]
enum InterruptEnum { pub enum InterruptEnum {
ADC = 18, ADC = 18,
DMA1_Stream0 = 11, DMA1_Stream0 = 11,
DMA1_Stream1 = 12, DMA1_Stream1 = 12,

2
embassy-stm32/src/pac/stm32f401cc.rs
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@ -209,7 +209,7 @@ pub mod interrupt {
#[derive(Copy, Clone, Debug, PartialEq, Eq)] #[derive(Copy, Clone, Debug, PartialEq, Eq)]
#[allow(non_camel_case_types)] #[allow(non_camel_case_types)]
enum InterruptEnum { pub enum InterruptEnum {
ADC = 18, ADC = 18,
DMA1_Stream0 = 11, DMA1_Stream0 = 11,
DMA1_Stream1 = 12, DMA1_Stream1 = 12,

2
embassy-stm32/src/pac/stm32f401cd.rs
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@ -209,7 +209,7 @@ pub mod interrupt {
#[derive(Copy, Clone, Debug, PartialEq, Eq)] #[derive(Copy, Clone, Debug, PartialEq, Eq)]
#[allow(non_camel_case_types)] #[allow(non_camel_case_types)]
enum InterruptEnum { pub enum InterruptEnum {
ADC = 18, ADC = 18,
DMA1_Stream0 = 11, DMA1_Stream0 = 11,
DMA1_Stream1 = 12, DMA1_Stream1 = 12,

2
embassy-stm32/src/pac/stm32f401ce.rs
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@ -209,7 +209,7 @@ pub mod interrupt {
#[derive(Copy, Clone, Debug, PartialEq, Eq)] #[derive(Copy, Clone, Debug, PartialEq, Eq)]
#[allow(non_camel_case_types)] #[allow(non_camel_case_types)]
enum InterruptEnum { pub enum InterruptEnum {
ADC = 18, ADC = 18,
DMA1_Stream0 = 11, DMA1_Stream0 = 11,
DMA1_Stream1 = 12, DMA1_Stream1 = 12,

2
embassy-stm32/src/pac/stm32f401rb.rs
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@ -209,7 +209,7 @@ pub mod interrupt {
#[derive(Copy, Clone, Debug, PartialEq, Eq)] #[derive(Copy, Clone, Debug, PartialEq, Eq)]
#[allow(non_camel_case_types)] #[allow(non_camel_case_types)]
enum InterruptEnum { pub enum InterruptEnum {
ADC = 18, ADC = 18,
DMA1_Stream0 = 11, DMA1_Stream0 = 11,
DMA1_Stream1 = 12, DMA1_Stream1 = 12,

2
embassy-stm32/src/pac/stm32f401rc.rs
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@ -209,7 +209,7 @@ pub mod interrupt {
#[derive(Copy, Clone, Debug, PartialEq, Eq)] #[derive(Copy, Clone, Debug, PartialEq, Eq)]
#[allow(non_camel_case_types)] #[allow(non_camel_case_types)]
enum InterruptEnum { pub enum InterruptEnum {
ADC = 18, ADC = 18,
DMA1_Stream0 = 11, DMA1_Stream0 = 11,
DMA1_Stream1 = 12, DMA1_Stream1 = 12,

2
embassy-stm32/src/pac/stm32f401rd.rs
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@ -209,7 +209,7 @@ pub mod interrupt {
#[derive(Copy, Clone, Debug, PartialEq, Eq)] #[derive(Copy, Clone, Debug, PartialEq, Eq)]
#[allow(non_camel_case_types)] #[allow(non_camel_case_types)]
enum InterruptEnum { pub enum InterruptEnum {
ADC = 18, ADC = 18,
DMA1_Stream0 = 11, DMA1_Stream0 = 11,
DMA1_Stream1 = 12, DMA1_Stream1 = 12,

2
embassy-stm32/src/pac/stm32f401re.rs
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@ -209,7 +209,7 @@ pub mod interrupt {
#[derive(Copy, Clone, Debug, PartialEq, Eq)] #[derive(Copy, Clone, Debug, PartialEq, Eq)]
#[allow(non_camel_case_types)] #[allow(non_camel_case_types)]
enum InterruptEnum { pub enum InterruptEnum {
ADC = 18, ADC = 18,
DMA1_Stream0 = 11, DMA1_Stream0 = 11,
DMA1_Stream1 = 12, DMA1_Stream1 = 12,

2
embassy-stm32/src/pac/stm32f401vb.rs
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@ -217,7 +217,7 @@ pub mod interrupt {
#[derive(Copy, Clone, Debug, PartialEq, Eq)] #[derive(Copy, Clone, Debug, PartialEq, Eq)]
#[allow(non_camel_case_types)] #[allow(non_camel_case_types)]
enum InterruptEnum { pub enum InterruptEnum {
ADC = 18, ADC = 18,
DMA1_Stream0 = 11, DMA1_Stream0 = 11,
DMA1_Stream1 = 12, DMA1_Stream1 = 12,

2
embassy-stm32/src/pac/stm32f401vc.rs
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@ -217,7 +217,7 @@ pub mod interrupt {
#[derive(Copy, Clone, Debug, PartialEq, Eq)] #[derive(Copy, Clone, Debug, PartialEq, Eq)]
#[allow(non_camel_case_types)] #[allow(non_camel_case_types)]
enum InterruptEnum { pub enum InterruptEnum {
ADC = 18, ADC = 18,
DMA1_Stream0 = 11, DMA1_Stream0 = 11,
DMA1_Stream1 = 12, DMA1_Stream1 = 12,

2
embassy-stm32/src/pac/stm32f401vd.rs
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@ -217,7 +217,7 @@ pub mod interrupt {
#[derive(Copy, Clone, Debug, PartialEq, Eq)] #[derive(Copy, Clone, Debug, PartialEq, Eq)]
#[allow(non_camel_case_types)] #[allow(non_camel_case_types)]
enum InterruptEnum { pub enum InterruptEnum {
ADC = 18, ADC = 18,
DMA1_Stream0 = 11, DMA1_Stream0 = 11,
DMA1_Stream1 = 12, DMA1_Stream1 = 12,

2
embassy-stm32/src/pac/stm32f401ve.rs
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@ -217,7 +217,7 @@ pub mod interrupt {
#[derive(Copy, Clone, Debug, PartialEq, Eq)] #[derive(Copy, Clone, Debug, PartialEq, Eq)]
#[allow(non_camel_case_types)] #[allow(non_camel_case_types)]
enum InterruptEnum { pub enum InterruptEnum {
ADC = 18, ADC = 18,
DMA1_Stream0 = 11, DMA1_Stream0 = 11,
DMA1_Stream1 = 12, DMA1_Stream1 = 12,

2
embassy-stm32/src/pac/stm32f405oe.rs
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@ -287,7 +287,7 @@ pub mod interrupt {
#[derive(Copy, Clone, Debug, PartialEq, Eq)] #[derive(Copy, Clone, Debug, PartialEq, Eq)]
#[allow(non_camel_case_types)] #[allow(non_camel_case_types)]
enum InterruptEnum { pub enum InterruptEnum {
ADC = 18, ADC = 18,
CAN1_RX0 = 20, CAN1_RX0 = 20,
CAN1_RX1 = 21, CAN1_RX1 = 21,

2
embassy-stm32/src/pac/stm32f405og.rs
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@ -287,7 +287,7 @@ pub mod interrupt {
#[derive(Copy, Clone, Debug, PartialEq, Eq)] #[derive(Copy, Clone, Debug, PartialEq, Eq)]
#[allow(non_camel_case_types)] #[allow(non_camel_case_types)]
enum InterruptEnum { pub enum InterruptEnum {
ADC = 18, ADC = 18,
CAN1_RX0 = 20, CAN1_RX0 = 20,
CAN1_RX1 = 21, CAN1_RX1 = 21,

2
embassy-stm32/src/pac/stm32f405rg.rs
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@ -287,7 +287,7 @@ pub mod interrupt {
#[derive(Copy, Clone, Debug, PartialEq, Eq)] #[derive(Copy, Clone, Debug, PartialEq, Eq)]
#[allow(non_camel_case_types)] #[allow(non_camel_case_types)]
enum InterruptEnum { pub enum InterruptEnum {
ADC = 18, ADC = 18,
CAN1_RX0 = 20, CAN1_RX0 = 20,
CAN1_RX1 = 21, CAN1_RX1 = 21,

2
embassy-stm32/src/pac/stm32f405vg.rs
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@ -287,7 +287,7 @@ pub mod interrupt {
#[derive(Copy, Clone, Debug, PartialEq, Eq)] #[derive(Copy, Clone, Debug, PartialEq, Eq)]
#[allow(non_camel_case_types)] #[allow(non_camel_case_types)]
enum InterruptEnum { pub enum InterruptEnum {
ADC = 18, ADC = 18,
CAN1_RX0 = 20, CAN1_RX0 = 20,
CAN1_RX1 = 21, CAN1_RX1 = 21,

2
embassy-stm32/src/pac/stm32f405zg.rs
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@ -287,7 +287,7 @@ pub mod interrupt {
#[derive(Copy, Clone, Debug, PartialEq, Eq)] #[derive(Copy, Clone, Debug, PartialEq, Eq)]
#[allow(non_camel_case_types)] #[allow(non_camel_case_types)]
enum InterruptEnum { pub enum InterruptEnum {
ADC = 18, ADC = 18,
CAN1_RX0 = 20, CAN1_RX0 = 20,
CAN1_RX1 = 21, CAN1_RX1 = 21,

2
embassy-stm32/src/pac/stm32f407ie.rs
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@ -287,7 +287,7 @@ pub mod interrupt {
#[derive(Copy, Clone, Debug, PartialEq, Eq)] #[derive(Copy, Clone, Debug, PartialEq, Eq)]
#[allow(non_camel_case_types)] #[allow(non_camel_case_types)]
enum InterruptEnum { pub enum InterruptEnum {
ADC = 18, ADC = 18,
CAN1_RX0 = 20, CAN1_RX0 = 20,
CAN1_RX1 = 21, CAN1_RX1 = 21,

2
embassy-stm32/src/pac/stm32f407ig.rs
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@ -287,7 +287,7 @@ pub mod interrupt {
#[derive(Copy, Clone, Debug, PartialEq, Eq)] #[derive(Copy, Clone, Debug, PartialEq, Eq)]
#[allow(non_camel_case_types)] #[allow(non_camel_case_types)]
enum InterruptEnum { pub enum InterruptEnum {
ADC = 18, ADC = 18,
CAN1_RX0 = 20, CAN1_RX0 = 20,
CAN1_RX1 = 21, CAN1_RX1 = 21,

2
embassy-stm32/src/pac/stm32f407ve.rs
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@ -287,7 +287,7 @@ pub mod interrupt {
#[derive(Copy, Clone, Debug, PartialEq, Eq)] #[derive(Copy, Clone, Debug, PartialEq, Eq)]
#[allow(non_camel_case_types)] #[allow(non_camel_case_types)]
enum InterruptEnum { pub enum InterruptEnum {
ADC = 18, ADC = 18,
CAN1_RX0 = 20, CAN1_RX0 = 20,
CAN1_RX1 = 21, CAN1_RX1 = 21,

2
embassy-stm32/src/pac/stm32f407vg.rs
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@ -287,7 +287,7 @@ pub mod interrupt {
#[derive(Copy, Clone, Debug, PartialEq, Eq)] #[derive(Copy, Clone, Debug, PartialEq, Eq)]
#[allow(non_camel_case_types)] #[allow(non_camel_case_types)]
enum InterruptEnum { pub enum InterruptEnum {
ADC = 18, ADC = 18,
CAN1_RX0 = 20, CAN1_RX0 = 20,
CAN1_RX1 = 21, CAN1_RX1 = 21,

2
embassy-stm32/src/pac/stm32f407ze.rs
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@ -287,7 +287,7 @@ pub mod interrupt {
#[derive(Copy, Clone, Debug, PartialEq, Eq)] #[derive(Copy, Clone, Debug, PartialEq, Eq)]
#[allow(non_camel_case_types)] #[allow(non_camel_case_types)]
enum InterruptEnum { pub enum InterruptEnum {
ADC = 18, ADC = 18,
CAN1_RX0 = 20, CAN1_RX0 = 20,
CAN1_RX1 = 21, CAN1_RX1 = 21,

2
embassy-stm32/src/pac/stm32f407zg.rs
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@ -287,7 +287,7 @@ pub mod interrupt {
#[derive(Copy, Clone, Debug, PartialEq, Eq)] #[derive(Copy, Clone, Debug, PartialEq, Eq)]
#[allow(non_camel_case_types)] #[allow(non_camel_case_types)]
enum InterruptEnum { pub enum InterruptEnum {
ADC = 18, ADC = 18,
CAN1_RX0 = 20, CAN1_RX0 = 20,
CAN1_RX1 = 21, CAN1_RX1 = 21,

2
embassy-stm32/src/pac/stm32f410c8.rs
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@ -146,7 +146,7 @@ pub mod interrupt {
#[derive(Copy, Clone, Debug, PartialEq, Eq)] #[derive(Copy, Clone, Debug, PartialEq, Eq)]
#[allow(non_camel_case_types)] #[allow(non_camel_case_types)]
enum InterruptEnum { pub enum InterruptEnum {
ADC = 18, ADC = 18,
DMA1_Stream0 = 11, DMA1_Stream0 = 11,
DMA1_Stream1 = 12, DMA1_Stream1 = 12,

2
embassy-stm32/src/pac/stm32f410cb.rs
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@ -146,7 +146,7 @@ pub mod interrupt {
#[derive(Copy, Clone, Debug, PartialEq, Eq)] #[derive(Copy, Clone, Debug, PartialEq, Eq)]
#[allow(non_camel_case_types)] #[allow(non_camel_case_types)]
enum InterruptEnum { pub enum InterruptEnum {
ADC = 18, ADC = 18,
DMA1_Stream0 = 11, DMA1_Stream0 = 11,
DMA1_Stream1 = 12, DMA1_Stream1 = 12,

2
embassy-stm32/src/pac/stm32f410r8.rs
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@ -146,7 +146,7 @@ pub mod interrupt {
#[derive(Copy, Clone, Debug, PartialEq, Eq)] #[derive(Copy, Clone, Debug, PartialEq, Eq)]
#[allow(non_camel_case_types)] #[allow(non_camel_case_types)]
enum InterruptEnum { pub enum InterruptEnum {
ADC = 18, ADC = 18,
DMA1_Stream0 = 11, DMA1_Stream0 = 11,
DMA1_Stream1 = 12, DMA1_Stream1 = 12,

2
embassy-stm32/src/pac/stm32f410rb.rs
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@ -146,7 +146,7 @@ pub mod interrupt {
#[derive(Copy, Clone, Debug, PartialEq, Eq)] #[derive(Copy, Clone, Debug, PartialEq, Eq)]
#[allow(non_camel_case_types)] #[allow(non_camel_case_types)]
enum InterruptEnum { pub enum InterruptEnum {
ADC = 18, ADC = 18,
DMA1_Stream0 = 11, DMA1_Stream0 = 11,
DMA1_Stream1 = 12, DMA1_Stream1 = 12,

2
embassy-stm32/src/pac/stm32f410t8.rs
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@ -139,7 +139,7 @@ pub mod interrupt {
#[derive(Copy, Clone, Debug, PartialEq, Eq)] #[derive(Copy, Clone, Debug, PartialEq, Eq)]
#[allow(non_camel_case_types)] #[allow(non_camel_case_types)]
enum InterruptEnum { pub enum InterruptEnum {
ADC = 18, ADC = 18,
DMA1_Stream0 = 11, DMA1_Stream0 = 11,
DMA1_Stream1 = 12, DMA1_Stream1 = 12,

2
embassy-stm32/src/pac/stm32f410tb.rs
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@ -139,7 +139,7 @@ pub mod interrupt {
#[derive(Copy, Clone, Debug, PartialEq, Eq)] #[derive(Copy, Clone, Debug, PartialEq, Eq)]
#[allow(non_camel_case_types)] #[allow(non_camel_case_types)]
enum InterruptEnum { pub enum InterruptEnum {
ADC = 18, ADC = 18,
DMA1_Stream0 = 11, DMA1_Stream0 = 11,
DMA1_Stream1 = 12, DMA1_Stream1 = 12,

2
embassy-stm32/src/pac/stm32f411cc.rs
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@ -237,7 +237,7 @@ pub mod interrupt {
#[derive(Copy, Clone, Debug, PartialEq, Eq)] #[derive(Copy, Clone, Debug, PartialEq, Eq)]
#[allow(non_camel_case_types)] #[allow(non_camel_case_types)]
enum InterruptEnum { pub enum InterruptEnum {
ADC = 18, ADC = 18,
DMA1_Stream0 = 11, DMA1_Stream0 = 11,
DMA1_Stream1 = 12, DMA1_Stream1 = 12,

2
embassy-stm32/src/pac/stm32f411ce.rs
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@ -237,7 +237,7 @@ pub mod interrupt {
#[derive(Copy, Clone, Debug, PartialEq, Eq)] #[derive(Copy, Clone, Debug, PartialEq, Eq)]
#[allow(non_camel_case_types)] #[allow(non_camel_case_types)]
enum InterruptEnum { pub enum InterruptEnum {
ADC = 18, ADC = 18,
DMA1_Stream0 = 11, DMA1_Stream0 = 11,
DMA1_Stream1 = 12, DMA1_Stream1 = 12,

2
embassy-stm32/src/pac/stm32f411rc.rs
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@ -237,7 +237,7 @@ pub mod interrupt {
#[derive(Copy, Clone, Debug, PartialEq, Eq)] #[derive(Copy, Clone, Debug, PartialEq, Eq)]
#[allow(non_camel_case_types)] #[allow(non_camel_case_types)]
enum InterruptEnum { pub enum InterruptEnum {
ADC = 18, ADC = 18,
DMA1_Stream0 = 11, DMA1_Stream0 = 11,
DMA1_Stream1 = 12, DMA1_Stream1 = 12,

2
embassy-stm32/src/pac/stm32f411re.rs
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@ -237,7 +237,7 @@ pub mod interrupt {
#[derive(Copy, Clone, Debug, PartialEq, Eq)] #[derive(Copy, Clone, Debug, PartialEq, Eq)]
#[allow(non_camel_case_types)] #[allow(non_camel_case_types)]
enum InterruptEnum { pub enum InterruptEnum {
ADC = 18, ADC = 18,
DMA1_Stream0 = 11, DMA1_Stream0 = 11,
DMA1_Stream1 = 12, DMA1_Stream1 = 12,

2
embassy-stm32/src/pac/stm32f411vc.rs
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@ -237,7 +237,7 @@ pub mod interrupt {
#[derive(Copy, Clone, Debug, PartialEq, Eq)] #[derive(Copy, Clone, Debug, PartialEq, Eq)]
#[allow(non_camel_case_types)] #[allow(non_camel_case_types)]
enum InterruptEnum { pub enum InterruptEnum {
ADC = 18, ADC = 18,
DMA1_Stream0 = 11, DMA1_Stream0 = 11,
DMA1_Stream1 = 12, DMA1_Stream1 = 12,

2
embassy-stm32/src/pac/stm32f411ve.rs
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@ -237,7 +237,7 @@ pub mod interrupt {
#[derive(Copy, Clone, Debug, PartialEq, Eq)] #[derive(Copy, Clone, Debug, PartialEq, Eq)]
#[allow(non_camel_case_types)] #[allow(non_camel_case_types)]
enum InterruptEnum { pub enum InterruptEnum {
ADC = 18, ADC = 18,
DMA1_Stream0 = 11, DMA1_Stream0 = 11,
DMA1_Stream1 = 12, DMA1_Stream1 = 12,

2
embassy-stm32/src/pac/stm32f412ce.rs
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@ -196,7 +196,7 @@ pub mod interrupt {
#[derive(Copy, Clone, Debug, PartialEq, Eq)] #[derive(Copy, Clone, Debug, PartialEq, Eq)]
#[allow(non_camel_case_types)] #[allow(non_camel_case_types)]
enum InterruptEnum { pub enum InterruptEnum {
ADC = 18, ADC = 18,
CAN1_RX0 = 20, CAN1_RX0 = 20,
CAN1_RX1 = 21, CAN1_RX1 = 21,

2
embassy-stm32/src/pac/stm32f412cg.rs
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@ -196,7 +196,7 @@ pub mod interrupt {
#[derive(Copy, Clone, Debug, PartialEq, Eq)] #[derive(Copy, Clone, Debug, PartialEq, Eq)]
#[allow(non_camel_case_types)] #[allow(non_camel_case_types)]
enum InterruptEnum { pub enum InterruptEnum {
ADC = 18, ADC = 18,
CAN1_RX0 = 20, CAN1_RX0 = 20,
CAN1_RX1 = 21, CAN1_RX1 = 21,

2
embassy-stm32/src/pac/stm32f412re.rs
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@ -226,7 +226,7 @@ pub mod interrupt {
#[derive(Copy, Clone, Debug, PartialEq, Eq)] #[derive(Copy, Clone, Debug, PartialEq, Eq)]
#[allow(non_camel_case_types)] #[allow(non_camel_case_types)]
enum InterruptEnum { pub enum InterruptEnum {
ADC = 18, ADC = 18,
CAN1_RX0 = 20, CAN1_RX0 = 20,
CAN1_RX1 = 21, CAN1_RX1 = 21,

2
embassy-stm32/src/pac/stm32f412rg.rs
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@ -226,7 +226,7 @@ pub mod interrupt {
#[derive(Copy, Clone, Debug, PartialEq, Eq)] #[derive(Copy, Clone, Debug, PartialEq, Eq)]
#[allow(non_camel_case_types)] #[allow(non_camel_case_types)]
enum InterruptEnum { pub enum InterruptEnum {
ADC = 18, ADC = 18,
CAN1_RX0 = 20, CAN1_RX0 = 20,
CAN1_RX1 = 21, CAN1_RX1 = 21,

2
embassy-stm32/src/pac/stm32f412ve.rs
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@ -299,7 +299,7 @@ pub mod interrupt {
#[derive(Copy, Clone, Debug, PartialEq, Eq)] #[derive(Copy, Clone, Debug, PartialEq, Eq)]
#[allow(non_camel_case_types)] #[allow(non_camel_case_types)]
enum InterruptEnum { pub enum InterruptEnum {
ADC = 18, ADC = 18,
CAN1_RX0 = 20, CAN1_RX0 = 20,
CAN1_RX1 = 21, CAN1_RX1 = 21,

2
embassy-stm32/src/pac/stm32f412vg.rs
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@ -299,7 +299,7 @@ pub mod interrupt {
#[derive(Copy, Clone, Debug, PartialEq, Eq)] #[derive(Copy, Clone, Debug, PartialEq, Eq)]
#[allow(non_camel_case_types)] #[allow(non_camel_case_types)]
enum InterruptEnum { pub enum InterruptEnum {
ADC = 18, ADC = 18,
CAN1_RX0 = 20, CAN1_RX0 = 20,
CAN1_RX1 = 21, CAN1_RX1 = 21,

2
embassy-stm32/src/pac/stm32f412ze.rs
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@ -299,7 +299,7 @@ pub mod interrupt {
#[derive(Copy, Clone, Debug, PartialEq, Eq)] #[derive(Copy, Clone, Debug, PartialEq, Eq)]
#[allow(non_camel_case_types)] #[allow(non_camel_case_types)]
enum InterruptEnum { pub enum InterruptEnum {
ADC = 18, ADC = 18,
CAN1_RX0 = 20, CAN1_RX0 = 20,
CAN1_RX1 = 21, CAN1_RX1 = 21,

2
embassy-stm32/src/pac/stm32f412zg.rs
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@ -299,7 +299,7 @@ pub mod interrupt {
#[derive(Copy, Clone, Debug, PartialEq, Eq)] #[derive(Copy, Clone, Debug, PartialEq, Eq)]
#[allow(non_camel_case_types)] #[allow(non_camel_case_types)]
enum InterruptEnum { pub enum InterruptEnum {
ADC = 18, ADC = 18,
CAN1_RX0 = 20, CAN1_RX0 = 20,
CAN1_RX1 = 21, CAN1_RX1 = 21,

2
embassy-stm32/src/pac/stm32f413cg.rs
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@ -285,7 +285,7 @@ pub mod interrupt {
#[derive(Copy, Clone, Debug, PartialEq, Eq)] #[derive(Copy, Clone, Debug, PartialEq, Eq)]
#[allow(non_camel_case_types)] #[allow(non_camel_case_types)]
enum InterruptEnum { pub enum InterruptEnum {
ADC = 18, ADC = 18,
CAN1_RX0 = 20, CAN1_RX0 = 20,
CAN1_RX1 = 21, CAN1_RX1 = 21,

2
embassy-stm32/src/pac/stm32f413ch.rs
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@ -285,7 +285,7 @@ pub mod interrupt {
#[derive(Copy, Clone, Debug, PartialEq, Eq)] #[derive(Copy, Clone, Debug, PartialEq, Eq)]
#[allow(non_camel_case_types)] #[allow(non_camel_case_types)]
enum InterruptEnum { pub enum InterruptEnum {
ADC = 18, ADC = 18,
CAN1_RX0 = 20, CAN1_RX0 = 20,
CAN1_RX1 = 21, CAN1_RX1 = 21,

2
embassy-stm32/src/pac/stm32f413mg.rs
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@ -302,7 +302,7 @@ pub mod interrupt {
#[derive(Copy, Clone, Debug, PartialEq, Eq)] #[derive(Copy, Clone, Debug, PartialEq, Eq)]
#[allow(non_camel_case_types)] #[allow(non_camel_case_types)]
enum InterruptEnum { pub enum InterruptEnum {
ADC = 18, ADC = 18,
CAN1_RX0 = 20, CAN1_RX0 = 20,
CAN1_RX1 = 21, CAN1_RX1 = 21,

2
embassy-stm32/src/pac/stm32f413mh.rs
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@ -302,7 +302,7 @@ pub mod interrupt {
#[derive(Copy, Clone, Debug, PartialEq, Eq)] #[derive(Copy, Clone, Debug, PartialEq, Eq)]
#[allow(non_camel_case_types)] #[allow(non_camel_case_types)]
enum InterruptEnum { pub enum InterruptEnum {
ADC = 18, ADC = 18,
CAN1_RX0 = 20, CAN1_RX0 = 20,
CAN1_RX1 = 21, CAN1_RX1 = 21,

2
embassy-stm32/src/pac/stm32f413rg.rs
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@ -302,7 +302,7 @@ pub mod interrupt {
#[derive(Copy, Clone, Debug, PartialEq, Eq)] #[derive(Copy, Clone, Debug, PartialEq, Eq)]
#[allow(non_camel_case_types)] #[allow(non_camel_case_types)]
enum InterruptEnum { pub enum InterruptEnum {
ADC = 18, ADC = 18,
CAN1_RX0 = 20, CAN1_RX0 = 20,
CAN1_RX1 = 21, CAN1_RX1 = 21,

2
embassy-stm32/src/pac/stm32f413rh.rs
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@ -302,7 +302,7 @@ pub mod interrupt {
#[derive(Copy, Clone, Debug, PartialEq, Eq)] #[derive(Copy, Clone, Debug, PartialEq, Eq)]
#[allow(non_camel_case_types)] #[allow(non_camel_case_types)]
enum InterruptEnum { pub enum InterruptEnum {
ADC = 18, ADC = 18,
CAN1_RX0 = 20, CAN1_RX0 = 20,
CAN1_RX1 = 21, CAN1_RX1 = 21,

2
embassy-stm32/src/pac/stm32f413vg.rs
View File

@ -302,7 +302,7 @@ pub mod interrupt {
#[derive(Copy, Clone, Debug, PartialEq, Eq)] #[derive(Copy, Clone, Debug, PartialEq, Eq)]
#[allow(non_camel_case_types)] #[allow(non_camel_case_types)]
enum InterruptEnum { pub enum InterruptEnum {
ADC = 18, ADC = 18,
CAN1_RX0 = 20, CAN1_RX0 = 20,
CAN1_RX1 = 21, CAN1_RX1 = 21,

2
embassy-stm32/src/pac/stm32f413vh.rs
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@ -302,7 +302,7 @@ pub mod interrupt {
#[derive(Copy, Clone, Debug, PartialEq, Eq)] #[derive(Copy, Clone, Debug, PartialEq, Eq)]
#[allow(non_camel_case_types)] #[allow(non_camel_case_types)]
enum InterruptEnum { pub enum InterruptEnum {
ADC = 18, ADC = 18,
CAN1_RX0 = 20, CAN1_RX0 = 20,
CAN1_RX1 = 21, CAN1_RX1 = 21,

2
embassy-stm32/src/pac/stm32f413zg.rs
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@ -302,7 +302,7 @@ pub mod interrupt {
#[derive(Copy, Clone, Debug, PartialEq, Eq)] #[derive(Copy, Clone, Debug, PartialEq, Eq)]
#[allow(non_camel_case_types)] #[allow(non_camel_case_types)]
enum InterruptEnum { pub enum InterruptEnum {
ADC = 18, ADC = 18,
CAN1_RX0 = 20, CAN1_RX0 = 20,
CAN1_RX1 = 21, CAN1_RX1 = 21,

2
embassy-stm32/src/pac/stm32f413zh.rs
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@ -302,7 +302,7 @@ pub mod interrupt {
#[derive(Copy, Clone, Debug, PartialEq, Eq)] #[derive(Copy, Clone, Debug, PartialEq, Eq)]
#[allow(non_camel_case_types)] #[allow(non_camel_case_types)]
enum InterruptEnum { pub enum InterruptEnum {
ADC = 18, ADC = 18,
CAN1_RX0 = 20, CAN1_RX0 = 20,
CAN1_RX1 = 21, CAN1_RX1 = 21,

2
embassy-stm32/src/pac/stm32f415og.rs
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@ -287,7 +287,7 @@ pub mod interrupt {
#[derive(Copy, Clone, Debug, PartialEq, Eq)] #[derive(Copy, Clone, Debug, PartialEq, Eq)]
#[allow(non_camel_case_types)] #[allow(non_camel_case_types)]
enum InterruptEnum { pub enum InterruptEnum {
ADC = 18, ADC = 18,
CAN1_RX0 = 20, CAN1_RX0 = 20,
CAN1_RX1 = 21, CAN1_RX1 = 21,

2
embassy-stm32/src/pac/stm32f415rg.rs
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@ -287,7 +287,7 @@ pub mod interrupt {
#[derive(Copy, Clone, Debug, PartialEq, Eq)] #[derive(Copy, Clone, Debug, PartialEq, Eq)]
#[allow(non_camel_case_types)] #[allow(non_camel_case_types)]
enum InterruptEnum { pub enum InterruptEnum {
ADC = 18, ADC = 18,
CAN1_RX0 = 20, CAN1_RX0 = 20,
CAN1_RX1 = 21, CAN1_RX1 = 21,

2
embassy-stm32/src/pac/stm32f415vg.rs
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@ -287,7 +287,7 @@ pub mod interrupt {
#[derive(Copy, Clone, Debug, PartialEq, Eq)] #[derive(Copy, Clone, Debug, PartialEq, Eq)]
#[allow(non_camel_case_types)] #[allow(non_camel_case_types)]
enum InterruptEnum { pub enum InterruptEnum {
ADC = 18, ADC = 18,
CAN1_RX0 = 20, CAN1_RX0 = 20,
CAN1_RX1 = 21, CAN1_RX1 = 21,

2
embassy-stm32/src/pac/stm32f415zg.rs
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@ -287,7 +287,7 @@ pub mod interrupt {
#[derive(Copy, Clone, Debug, PartialEq, Eq)] #[derive(Copy, Clone, Debug, PartialEq, Eq)]
#[allow(non_camel_case_types)] #[allow(non_camel_case_types)]
enum InterruptEnum { pub enum InterruptEnum {
ADC = 18, ADC = 18,
CAN1_RX0 = 20, CAN1_RX0 = 20,
CAN1_RX1 = 21, CAN1_RX1 = 21,

2
embassy-stm32/src/pac/stm32f417ie.rs
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@ -287,7 +287,7 @@ pub mod interrupt {
#[derive(Copy, Clone, Debug, PartialEq, Eq)] #[derive(Copy, Clone, Debug, PartialEq, Eq)]
#[allow(non_camel_case_types)] #[allow(non_camel_case_types)]
enum InterruptEnum { pub enum InterruptEnum {
ADC = 18, ADC = 18,
CAN1_RX0 = 20, CAN1_RX0 = 20,
CAN1_RX1 = 21, CAN1_RX1 = 21,

2
embassy-stm32/src/pac/stm32f417ig.rs
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@ -287,7 +287,7 @@ pub mod interrupt {
#[derive(Copy, Clone, Debug, PartialEq, Eq)] #[derive(Copy, Clone, Debug, PartialEq, Eq)]
#[allow(non_camel_case_types)] #[allow(non_camel_case_types)]
enum InterruptEnum { pub enum InterruptEnum {
ADC = 18, ADC = 18,
CAN1_RX0 = 20, CAN1_RX0 = 20,
CAN1_RX1 = 21, CAN1_RX1 = 21,

2
embassy-stm32/src/pac/stm32f417ve.rs
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@ -287,7 +287,7 @@ pub mod interrupt {
#[derive(Copy, Clone, Debug, PartialEq, Eq)] #[derive(Copy, Clone, Debug, PartialEq, Eq)]
#[allow(non_camel_case_types)] #[allow(non_camel_case_types)]
enum InterruptEnum { pub enum InterruptEnum {
ADC = 18, ADC = 18,
CAN1_RX0 = 20, CAN1_RX0 = 20,
CAN1_RX1 = 21, CAN1_RX1 = 21,

2
embassy-stm32/src/pac/stm32f417vg.rs
View File

@ -287,7 +287,7 @@ pub mod interrupt {
#[derive(Copy, Clone, Debug, PartialEq, Eq)] #[derive(Copy, Clone, Debug, PartialEq, Eq)]
#[allow(non_camel_case_types)] #[allow(non_camel_case_types)]
enum InterruptEnum { pub enum InterruptEnum {
ADC = 18, ADC = 18,
CAN1_RX0 = 20, CAN1_RX0 = 20,
CAN1_RX1 = 21, CAN1_RX1 = 21,

2
embassy-stm32/src/pac/stm32f417ze.rs
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@ -287,7 +287,7 @@ pub mod interrupt {
#[derive(Copy, Clone, Debug, PartialEq, Eq)] #[derive(Copy, Clone, Debug, PartialEq, Eq)]
#[allow(non_camel_case_types)] #[allow(non_camel_case_types)]
enum InterruptEnum { pub enum InterruptEnum {
ADC = 18, ADC = 18,
CAN1_RX0 = 20, CAN1_RX0 = 20,
CAN1_RX1 = 21, CAN1_RX1 = 21,

2
embassy-stm32/src/pac/stm32f417zg.rs
View File

@ -287,7 +287,7 @@ pub mod interrupt {
#[derive(Copy, Clone, Debug, PartialEq, Eq)] #[derive(Copy, Clone, Debug, PartialEq, Eq)]
#[allow(non_camel_case_types)] #[allow(non_camel_case_types)]
enum InterruptEnum { pub enum InterruptEnum {
ADC = 18, ADC = 18,
CAN1_RX0 = 20, CAN1_RX0 = 20,
CAN1_RX1 = 21, CAN1_RX1 = 21,

2
embassy-stm32/src/pac/stm32f423ch.rs
View File

@ -285,7 +285,7 @@ pub mod interrupt {
#[derive(Copy, Clone, Debug, PartialEq, Eq)] #[derive(Copy, Clone, Debug, PartialEq, Eq)]
#[allow(non_camel_case_types)] #[allow(non_camel_case_types)]
enum InterruptEnum { pub enum InterruptEnum {
ADC = 18, ADC = 18,
AES = 79, AES = 79,
CAN1_RX0 = 20, CAN1_RX0 = 20,

2
embassy-stm32/src/pac/stm32f423mh.rs
View File

@ -302,7 +302,7 @@ pub mod interrupt {
#[derive(Copy, Clone, Debug, PartialEq, Eq)] #[derive(Copy, Clone, Debug, PartialEq, Eq)]
#[allow(non_camel_case_types)] #[allow(non_camel_case_types)]
enum InterruptEnum { pub enum InterruptEnum {
ADC = 18, ADC = 18,
AES = 79, AES = 79,
CAN1_RX0 = 20, CAN1_RX0 = 20,

2
embassy-stm32/src/pac/stm32f423rh.rs
View File

@ -302,7 +302,7 @@ pub mod interrupt {
#[derive(Copy, Clone, Debug, PartialEq, Eq)] #[derive(Copy, Clone, Debug, PartialEq, Eq)]
#[allow(non_camel_case_types)] #[allow(non_camel_case_types)]
enum InterruptEnum { pub enum InterruptEnum {
ADC = 18, ADC = 18,
AES = 79, AES = 79,
CAN1_RX0 = 20, CAN1_RX0 = 20,

2
embassy-stm32/src/pac/stm32f423vh.rs
View File

@ -302,7 +302,7 @@ pub mod interrupt {
#[derive(Copy, Clone, Debug, PartialEq, Eq)] #[derive(Copy, Clone, Debug, PartialEq, Eq)]
#[allow(non_camel_case_types)] #[allow(non_camel_case_types)]
enum InterruptEnum { pub enum InterruptEnum {
ADC = 18, ADC = 18,
AES = 79, AES = 79,
CAN1_RX0 = 20, CAN1_RX0 = 20,

2
embassy-stm32/src/pac/stm32f423zh.rs
View File

@ -302,7 +302,7 @@ pub mod interrupt {
#[derive(Copy, Clone, Debug, PartialEq, Eq)] #[derive(Copy, Clone, Debug, PartialEq, Eq)]
#[allow(non_camel_case_types)] #[allow(non_camel_case_types)]
enum InterruptEnum { pub enum InterruptEnum {
ADC = 18, ADC = 18,
AES = 79, AES = 79,
CAN1_RX0 = 20, CAN1_RX0 = 20,

2
embassy-stm32/src/pac/stm32f427ag.rs
View File

@ -341,7 +341,7 @@ pub mod interrupt {
#[derive(Copy, Clone, Debug, PartialEq, Eq)] #[derive(Copy, Clone, Debug, PartialEq, Eq)]
#[allow(non_camel_case_types)] #[allow(non_camel_case_types)]
enum InterruptEnum { pub enum InterruptEnum {
ADC = 18, ADC = 18,
CAN1_RX0 = 20, CAN1_RX0 = 20,
CAN1_RX1 = 21, CAN1_RX1 = 21,

2
embassy-stm32/src/pac/stm32f427ai.rs
View File

@ -341,7 +341,7 @@ pub mod interrupt {
#[derive(Copy, Clone, Debug, PartialEq, Eq)] #[derive(Copy, Clone, Debug, PartialEq, Eq)]
#[allow(non_camel_case_types)] #[allow(non_camel_case_types)]
enum InterruptEnum { pub enum InterruptEnum {
ADC = 18, ADC = 18,
CAN1_RX0 = 20, CAN1_RX0 = 20,
CAN1_RX1 = 21, CAN1_RX1 = 21,

2
embassy-stm32/src/pac/stm32f427ig.rs
View File

@ -346,7 +346,7 @@ pub mod interrupt {
#[derive(Copy, Clone, Debug, PartialEq, Eq)] #[derive(Copy, Clone, Debug, PartialEq, Eq)]
#[allow(non_camel_case_types)] #[allow(non_camel_case_types)]
enum InterruptEnum { pub enum InterruptEnum {
ADC = 18, ADC = 18,
CAN1_RX0 = 20, CAN1_RX0 = 20,
CAN1_RX1 = 21, CAN1_RX1 = 21,

2
embassy-stm32/src/pac/stm32f427ii.rs
View File

@ -346,7 +346,7 @@ pub mod interrupt {
#[derive(Copy, Clone, Debug, PartialEq, Eq)] #[derive(Copy, Clone, Debug, PartialEq, Eq)]
#[allow(non_camel_case_types)] #[allow(non_camel_case_types)]
enum InterruptEnum { pub enum InterruptEnum {
ADC = 18, ADC = 18,
CAN1_RX0 = 20, CAN1_RX0 = 20,
CAN1_RX1 = 21, CAN1_RX1 = 21,

2
embassy-stm32/src/pac/stm32f427vg.rs
View File

@ -333,7 +333,7 @@ pub mod interrupt {
#[derive(Copy, Clone, Debug, PartialEq, Eq)] #[derive(Copy, Clone, Debug, PartialEq, Eq)]
#[allow(non_camel_case_types)] #[allow(non_camel_case_types)]
enum InterruptEnum { pub enum InterruptEnum {
ADC = 18, ADC = 18,
CAN1_RX0 = 20, CAN1_RX0 = 20,
CAN1_RX1 = 21, CAN1_RX1 = 21,

2
embassy-stm32/src/pac/stm32f427vi.rs
View File

@ -333,7 +333,7 @@ pub mod interrupt {
#[derive(Copy, Clone, Debug, PartialEq, Eq)] #[derive(Copy, Clone, Debug, PartialEq, Eq)]
#[allow(non_camel_case_types)] #[allow(non_camel_case_types)]
enum InterruptEnum { pub enum InterruptEnum {
ADC = 18, ADC = 18,
CAN1_RX0 = 20, CAN1_RX0 = 20,
CAN1_RX1 = 21, CAN1_RX1 = 21,

2
embassy-stm32/src/pac/stm32f427zg.rs
View File

@ -346,7 +346,7 @@ pub mod interrupt {
#[derive(Copy, Clone, Debug, PartialEq, Eq)] #[derive(Copy, Clone, Debug, PartialEq, Eq)]
#[allow(non_camel_case_types)] #[allow(non_camel_case_types)]
enum InterruptEnum { pub enum InterruptEnum {
ADC = 18, ADC = 18,
CAN1_RX0 = 20, CAN1_RX0 = 20,
CAN1_RX1 = 21, CAN1_RX1 = 21,

2
embassy-stm32/src/pac/stm32f427zi.rs
View File

@ -346,7 +346,7 @@ pub mod interrupt {
#[derive(Copy, Clone, Debug, PartialEq, Eq)] #[derive(Copy, Clone, Debug, PartialEq, Eq)]
#[allow(non_camel_case_types)] #[allow(non_camel_case_types)]
enum InterruptEnum { pub enum InterruptEnum {
ADC = 18, ADC = 18,
CAN1_RX0 = 20, CAN1_RX0 = 20,
CAN1_RX1 = 21, CAN1_RX1 = 21,

2
embassy-stm32/src/pac/stm32f429ag.rs
View File

@ -341,7 +341,7 @@ pub mod interrupt {
#[derive(Copy, Clone, Debug, PartialEq, Eq)] #[derive(Copy, Clone, Debug, PartialEq, Eq)]
#[allow(non_camel_case_types)] #[allow(non_camel_case_types)]
enum InterruptEnum { pub enum InterruptEnum {
ADC = 18, ADC = 18,
CAN1_RX0 = 20, CAN1_RX0 = 20,
CAN1_RX1 = 21, CAN1_RX1 = 21,

2
embassy-stm32/src/pac/stm32f429ai.rs
View File

@ -341,7 +341,7 @@ pub mod interrupt {
#[derive(Copy, Clone, Debug, PartialEq, Eq)] #[derive(Copy, Clone, Debug, PartialEq, Eq)]
#[allow(non_camel_case_types)] #[allow(non_camel_case_types)]
enum InterruptEnum { pub enum InterruptEnum {
ADC = 18, ADC = 18,
CAN1_RX0 = 20, CAN1_RX0 = 20,
CAN1_RX1 = 21, CAN1_RX1 = 21,

2
embassy-stm32/src/pac/stm32f429be.rs
View File

@ -346,7 +346,7 @@ pub mod interrupt {
#[derive(Copy, Clone, Debug, PartialEq, Eq)] #[derive(Copy, Clone, Debug, PartialEq, Eq)]
#[allow(non_camel_case_types)] #[allow(non_camel_case_types)]
enum InterruptEnum { pub enum InterruptEnum {
ADC = 18, ADC = 18,
CAN1_RX0 = 20, CAN1_RX0 = 20,
CAN1_RX1 = 21, CAN1_RX1 = 21,

2
embassy-stm32/src/pac/stm32f429bg.rs
View File

@ -346,7 +346,7 @@ pub mod interrupt {
#[derive(Copy, Clone, Debug, PartialEq, Eq)] #[derive(Copy, Clone, Debug, PartialEq, Eq)]
#[allow(non_camel_case_types)] #[allow(non_camel_case_types)]
enum InterruptEnum { pub enum InterruptEnum {
ADC = 18, ADC = 18,
CAN1_RX0 = 20, CAN1_RX0 = 20,
CAN1_RX1 = 21, CAN1_RX1 = 21,

2
embassy-stm32/src/pac/stm32f429bi.rs
View File

@ -346,7 +346,7 @@ pub mod interrupt {
#[derive(Copy, Clone, Debug, PartialEq, Eq)] #[derive(Copy, Clone, Debug, PartialEq, Eq)]
#[allow(non_camel_case_types)] #[allow(non_camel_case_types)]
enum InterruptEnum { pub enum InterruptEnum {
ADC = 18, ADC = 18,
CAN1_RX0 = 20, CAN1_RX0 = 20,
CAN1_RX1 = 21, CAN1_RX1 = 21,

2
embassy-stm32/src/pac/stm32f429ie.rs
View File

@ -346,7 +346,7 @@ pub mod interrupt {
#[derive(Copy, Clone, Debug, PartialEq, Eq)] #[derive(Copy, Clone, Debug, PartialEq, Eq)]
#[allow(non_camel_case_types)] #[allow(non_camel_case_types)]
enum InterruptEnum { pub enum InterruptEnum {
ADC = 18, ADC = 18,
CAN1_RX0 = 20, CAN1_RX0 = 20,
CAN1_RX1 = 21, CAN1_RX1 = 21,

2
embassy-stm32/src/pac/stm32f429ig.rs
View File

@ -346,7 +346,7 @@ pub mod interrupt {
#[derive(Copy, Clone, Debug, PartialEq, Eq)] #[derive(Copy, Clone, Debug, PartialEq, Eq)]
#[allow(non_camel_case_types)] #[allow(non_camel_case_types)]
enum InterruptEnum { pub enum InterruptEnum {
ADC = 18, ADC = 18,
CAN1_RX0 = 20, CAN1_RX0 = 20,
CAN1_RX1 = 21, CAN1_RX1 = 21,

2
embassy-stm32/src/pac/stm32f429ii.rs
View File

@ -346,7 +346,7 @@ pub mod interrupt {
#[derive(Copy, Clone, Debug, PartialEq, Eq)] #[derive(Copy, Clone, Debug, PartialEq, Eq)]
#[allow(non_camel_case_types)] #[allow(non_camel_case_types)]
enum InterruptEnum { pub enum InterruptEnum {
ADC = 18, ADC = 18,
CAN1_RX0 = 20, CAN1_RX0 = 20,
CAN1_RX1 = 21, CAN1_RX1 = 21,

2
embassy-stm32/src/pac/stm32f429ne.rs
View File

@ -346,7 +346,7 @@ pub mod interrupt {
#[derive(Copy, Clone, Debug, PartialEq, Eq)] #[derive(Copy, Clone, Debug, PartialEq, Eq)]
#[allow(non_camel_case_types)] #[allow(non_camel_case_types)]
enum InterruptEnum { pub enum InterruptEnum {
ADC = 18, ADC = 18,
CAN1_RX0 = 20, CAN1_RX0 = 20,
CAN1_RX1 = 21, CAN1_RX1 = 21,

2
embassy-stm32/src/pac/stm32f429ng.rs
View File

@ -346,7 +346,7 @@ pub mod interrupt {
#[derive(Copy, Clone, Debug, PartialEq, Eq)] #[derive(Copy, Clone, Debug, PartialEq, Eq)]
#[allow(non_camel_case_types)] #[allow(non_camel_case_types)]
enum InterruptEnum { pub enum InterruptEnum {
ADC = 18, ADC = 18,
CAN1_RX0 = 20, CAN1_RX0 = 20,
CAN1_RX1 = 21, CAN1_RX1 = 21,

2
embassy-stm32/src/pac/stm32f429ni.rs
View File

@ -346,7 +346,7 @@ pub mod interrupt {
#[derive(Copy, Clone, Debug, PartialEq, Eq)] #[derive(Copy, Clone, Debug, PartialEq, Eq)]
#[allow(non_camel_case_types)] #[allow(non_camel_case_types)]
enum InterruptEnum { pub enum InterruptEnum {
ADC = 18, ADC = 18,
CAN1_RX0 = 20, CAN1_RX0 = 20,
CAN1_RX1 = 21, CAN1_RX1 = 21,

2
embassy-stm32/src/pac/stm32f429ve.rs
View File

@ -333,7 +333,7 @@ pub mod interrupt {
#[derive(Copy, Clone, Debug, PartialEq, Eq)] #[derive(Copy, Clone, Debug, PartialEq, Eq)]
#[allow(non_camel_case_types)] #[allow(non_camel_case_types)]
enum InterruptEnum { pub enum InterruptEnum {
ADC = 18, ADC = 18,
CAN1_RX0 = 20, CAN1_RX0 = 20,
CAN1_RX1 = 21, CAN1_RX1 = 21,

2
embassy-stm32/src/pac/stm32f429vg.rs
View File

@ -333,7 +333,7 @@ pub mod interrupt {
#[derive(Copy, Clone, Debug, PartialEq, Eq)] #[derive(Copy, Clone, Debug, PartialEq, Eq)]
#[allow(non_camel_case_types)] #[allow(non_camel_case_types)]
enum InterruptEnum { pub enum InterruptEnum {
ADC = 18, ADC = 18,
CAN1_RX0 = 20, CAN1_RX0 = 20,
CAN1_RX1 = 21, CAN1_RX1 = 21,

2
embassy-stm32/src/pac/stm32f429vi.rs
View File

@ -333,7 +333,7 @@ pub mod interrupt {
#[derive(Copy, Clone, Debug, PartialEq, Eq)] #[derive(Copy, Clone, Debug, PartialEq, Eq)]
#[allow(non_camel_case_types)] #[allow(non_camel_case_types)]
enum InterruptEnum { pub enum InterruptEnum {
ADC = 18, ADC = 18,
CAN1_RX0 = 20, CAN1_RX0 = 20,
CAN1_RX1 = 21, CAN1_RX1 = 21,

2
embassy-stm32/src/pac/stm32f429ze.rs
View File

@ -346,7 +346,7 @@ pub mod interrupt {
#[derive(Copy, Clone, Debug, PartialEq, Eq)] #[derive(Copy, Clone, Debug, PartialEq, Eq)]
#[allow(non_camel_case_types)] #[allow(non_camel_case_types)]
enum InterruptEnum { pub enum InterruptEnum {
ADC = 18, ADC = 18,
CAN1_RX0 = 20, CAN1_RX0 = 20,
CAN1_RX1 = 21, CAN1_RX1 = 21,

2
embassy-stm32/src/pac/stm32f429zg.rs
View File

@ -346,7 +346,7 @@ pub mod interrupt {
#[derive(Copy, Clone, Debug, PartialEq, Eq)] #[derive(Copy, Clone, Debug, PartialEq, Eq)]
#[allow(non_camel_case_types)] #[allow(non_camel_case_types)]
enum InterruptEnum { pub enum InterruptEnum {
ADC = 18, ADC = 18,
CAN1_RX0 = 20, CAN1_RX0 = 20,
CAN1_RX1 = 21, CAN1_RX1 = 21,

2
embassy-stm32/src/pac/stm32f429zi.rs
View File

@ -346,7 +346,7 @@ pub mod interrupt {
#[derive(Copy, Clone, Debug, PartialEq, Eq)] #[derive(Copy, Clone, Debug, PartialEq, Eq)]
#[allow(non_camel_case_types)] #[allow(non_camel_case_types)]
enum InterruptEnum { pub enum InterruptEnum {
ADC = 18, ADC = 18,
CAN1_RX0 = 20, CAN1_RX0 = 20,
CAN1_RX1 = 21, CAN1_RX1 = 21,

2
embassy-stm32/src/pac/stm32f437ai.rs
View File

@ -341,7 +341,7 @@ pub mod interrupt {
#[derive(Copy, Clone, Debug, PartialEq, Eq)] #[derive(Copy, Clone, Debug, PartialEq, Eq)]
#[allow(non_camel_case_types)] #[allow(non_camel_case_types)]
enum InterruptEnum { pub enum InterruptEnum {
ADC = 18, ADC = 18,
CAN1_RX0 = 20, CAN1_RX0 = 20,
CAN1_RX1 = 21, CAN1_RX1 = 21,

2
embassy-stm32/src/pac/stm32f437ig.rs
View File

@ -346,7 +346,7 @@ pub mod interrupt {
#[derive(Copy, Clone, Debug, PartialEq, Eq)] #[derive(Copy, Clone, Debug, PartialEq, Eq)]
#[allow(non_camel_case_types)] #[allow(non_camel_case_types)]
enum InterruptEnum { pub enum InterruptEnum {
ADC = 18, ADC = 18,
CAN1_RX0 = 20, CAN1_RX0 = 20,
CAN1_RX1 = 21, CAN1_RX1 = 21,

2
embassy-stm32/src/pac/stm32f437ii.rs
View File

@ -346,7 +346,7 @@ pub mod interrupt {
#[derive(Copy, Clone, Debug, PartialEq, Eq)] #[derive(Copy, Clone, Debug, PartialEq, Eq)]
#[allow(non_camel_case_types)] #[allow(non_camel_case_types)]
enum InterruptEnum { pub enum InterruptEnum {
ADC = 18, ADC = 18,
CAN1_RX0 = 20, CAN1_RX0 = 20,
CAN1_RX1 = 21, CAN1_RX1 = 21,

2
embassy-stm32/src/pac/stm32f437vg.rs
View File

@ -333,7 +333,7 @@ pub mod interrupt {
#[derive(Copy, Clone, Debug, PartialEq, Eq)] #[derive(Copy, Clone, Debug, PartialEq, Eq)]
#[allow(non_camel_case_types)] #[allow(non_camel_case_types)]
enum InterruptEnum { pub enum InterruptEnum {
ADC = 18, ADC = 18,
CAN1_RX0 = 20, CAN1_RX0 = 20,
CAN1_RX1 = 21, CAN1_RX1 = 21,

2
embassy-stm32/src/pac/stm32f437vi.rs
View File

@ -333,7 +333,7 @@ pub mod interrupt {
#[derive(Copy, Clone, Debug, PartialEq, Eq)] #[derive(Copy, Clone, Debug, PartialEq, Eq)]
#[allow(non_camel_case_types)] #[allow(non_camel_case_types)]
enum InterruptEnum { pub enum InterruptEnum {
ADC = 18, ADC = 18,
CAN1_RX0 = 20, CAN1_RX0 = 20,
CAN1_RX1 = 21, CAN1_RX1 = 21,

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