Add a non-minc write() to DMA which takes a count.
Use it from "read-only" SPI.
This commit is contained in:
parent
7bbad4c4e5
commit
4c5a234a3a
@ -47,6 +47,7 @@ pub(crate) unsafe fn do_transfer(
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peri_addr: *const u8,
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mem_addr: *mut u8,
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mem_len: usize,
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incr_mem: bool,
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#[cfg(dmamux)] dmamux_regs: pac::dmamux::Dmamux,
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#[cfg(dmamux)] dmamux_ch_num: u8,
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) -> impl Future<Output = ()> {
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@ -182,6 +183,7 @@ pac::dma_channels! {
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src,
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buf.as_mut_ptr(),
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buf.len(),
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true,
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#[cfg(dmamux)]
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<Self as super::dmamux::sealed::MuxChannel>::DMAMUX_REGS,
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#[cfg(dmamux)]
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@ -206,6 +208,33 @@ pac::dma_channels! {
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dst,
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buf.as_ptr() as *mut u8,
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buf.len(),
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true,
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#[cfg(dmamux)]
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<Self as super::dmamux::sealed::MuxChannel>::DMAMUX_REGS,
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#[cfg(dmamux)]
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<Self as super::dmamux::sealed::MuxChannel>::DMAMUX_CH_NUM,
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)
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}
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}
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fn write_x<'a>(
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&'a mut self,
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request: Request,
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word: &u8,
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count: usize,
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dst: *mut u8,
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) -> Self::WriteFuture<'a> {
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unsafe {
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do_transfer(
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crate::pac::$dma_peri,
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$channel_num,
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(dma_num!($dma_peri) * 8) + $channel_num,
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request,
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vals::Dir::FROMMEMORY,
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dst,
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word as *const u8 as *mut u8,
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count,
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false,
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#[cfg(dmamux)]
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<Self as super::dmamux::sealed::MuxChannel>::DMAMUX_REGS,
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#[cfg(dmamux)]
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@ -48,6 +48,7 @@ pub(crate) unsafe fn do_transfer(
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peri_addr: *const u8,
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mem_addr: *mut u8,
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mem_len: usize,
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incr_mem: bool,
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#[cfg(dmamux)] dmamux_regs: pac::dmamux::Dmamux,
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#[cfg(dmamux)] dmamux_ch_num: u8,
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) -> impl Future<Output = ()> {
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@ -187,6 +188,7 @@ pac::dma_channels! {
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src,
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buf.as_mut_ptr(),
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buf.len(),
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true,
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#[cfg(dmamux)]
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<Self as super::dmamux::sealed::MuxChannel>::DMAMUX_REGS,
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#[cfg(dmamux)]
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@ -211,6 +213,33 @@ pac::dma_channels! {
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dst,
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buf.as_ptr() as *mut u8,
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buf.len(),
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true,
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#[cfg(dmamux)]
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<Self as super::dmamux::sealed::MuxChannel>::DMAMUX_REGS,
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#[cfg(dmamux)]
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<Self as super::dmamux::sealed::MuxChannel>::DMAMUX_CH_NUM,
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)
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}
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}
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fn write_x<'a>(
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&'a mut self,
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request: Request,
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word: &u8,
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num: usize,
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dst: *mut u8,
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) -> Self::WriteFuture<'a> {
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unsafe {
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do_transfer(
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crate::pac::$dma_peri,
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$channel_num,
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(dma_num!($dma_peri) * 8) + $channel_num,
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request,
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vals::Dir::MEMORYTOPERIPHERAL,
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dst,
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word as *const u8 as *mut u8,
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num,
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false,
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#[cfg(dmamux)]
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<Self as super::dmamux::sealed::MuxChannel>::DMAMUX_REGS,
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#[cfg(dmamux)]
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@ -42,6 +42,14 @@ pub trait Channel: sealed::Channel {
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buf: &'a [u8],
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dst: *mut u8,
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) -> Self::WriteFuture<'a>;
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fn write_x<'a>(
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&'a mut self,
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request: Request,
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word: &u8,
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num: usize,
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dst: *mut u8,
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) -> Self::WriteFuture<'a>;
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}
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pub struct NoDma;
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@ -1,7 +1,7 @@
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#![macro_use]
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#[cfg_attr(spi_v1, path = "v1.rs")]
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#[cfg_attr(spi_v2, path = "v2.rs")]
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//#[cfg_attr(spi_v1, path = "v1.rs")]
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//#[cfg_attr(spi_v2, path = "v2.rs")]
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#[cfg_attr(spi_v3, path = "v3.rs")]
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mod _version;
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use crate::{dma, peripherals, rcc::RccPeripheral};
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@ -18,6 +18,8 @@ use embassy_extras::unborrow;
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use embassy_traits::spi as traits;
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pub use embedded_hal::spi::{Mode, Phase, Polarity, MODE_0, MODE_1, MODE_2, MODE_3};
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use futures::future::join;
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impl WordSize {
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fn dsize(&self) -> u8 {
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match self {
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@ -176,18 +178,58 @@ impl<'d, T: Instance, Tx, Rx> Spi<'d, T, Tx, Rx> {
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}
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#[allow(unused)]
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async fn write_dma_u8(&mut self, write: &[u8]) -> Result<(), Error> {
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async fn write_dma_u8(&mut self, write: &[u8]) -> Result<(), Error>
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where
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Tx: TxDmaChannel<T>,
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{
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let request = self.txdma.request();
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let dst = T::regs().txdr().ptr() as *mut u8;
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let f = self.txdma.write(request, write, dst);
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unsafe {
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T::regs().cfg1().modify(|reg| {
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reg.set_txdmaen(true);
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});
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}
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f.await;
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Ok(())
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}
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#[allow(unused)]
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async fn read_dma_u8(&mut self, read: &mut [u8]) -> Result<(), Error>
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where
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Tx: TxDmaChannel<T>,
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Rx: RxDmaChannel<T>,
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{
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unimplemented!()
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}
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#[allow(unused)]
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async fn read_dma_u8(&mut self, read: &mut [u8]) -> Result<(), Error> {
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unimplemented!()
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async fn read_write_dma_u8(&mut self, read: &mut [u8], write: &[u8]) -> Result<(), Error>
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where
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Tx: TxDmaChannel<T>,
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Rx: RxDmaChannel<T>,
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{
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let rx_request = self.rxdma.request();
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let rx_src = T::regs().rxdr().ptr() as *mut u8;
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let rx_f = self.rxdma.read(rx_request, rx_src, read);
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let tx_request = self.txdma.request();
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let tx_dst = T::regs().txdr().ptr() as *mut u8;
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let clock_byte = 0x00;
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let tx_f = self
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.txdma
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.write_x(tx_request, &clock_byte, read.len(), tx_dst);
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unsafe {
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T::regs().cfg1().modify(|reg| {
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reg.set_txdmaen(true);
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reg.set_rxdmaen(true);
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});
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}
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#[allow(unused)]
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async fn read_write_dma_u8(&mut self, read: &mut [u8], write: &[u8]) -> Result<(), Error> {
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unimplemented!()
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let r = join(tx_f, rx_f).await;
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Ok(())
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}
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}
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