stm32: extract backupdomain into mod
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@ -2,7 +2,7 @@ use stm32_metapac::rtc::vals::{Init, Osel, Pol};
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#[cfg(feature = "low-power")]
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use super::RtcInstant;
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use super::{sealed, RtcClockSource, RtcConfig};
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use super::{sealed, RtcConfig};
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use crate::pac::rtc::Rtc;
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use crate::peripherals::RTC;
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use crate::rtc::sealed::Instance;
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@ -73,22 +73,6 @@ impl WakeupPrescaler {
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}
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impl super::Rtc {
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fn unlock_registers() {
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#[cfg(any(rtc_v2f2, rtc_v2f3, rtc_v2l1))]
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let cr = crate::pac::PWR.cr();
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#[cfg(any(rtc_v2f4, rtc_v2f7, rtc_v2h7, rtc_v2l4, rtc_v2wb))]
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let cr = crate::pac::PWR.cr1();
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// TODO: Missing from PAC for l0 and f0?
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#[cfg(not(any(rtc_v2f0, rtc_v2l0)))]
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{
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if !cr.read().dbp() {
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cr.modify(|w| w.set_dbp(true));
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while !cr.read().dbp() {}
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}
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}
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}
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#[cfg(feature = "low-power")]
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/// start the wakeup alarm and wtih a duration that is as close to but less than
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/// the requested duration, and record the instant the wakeup alarm was started
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@ -155,69 +139,6 @@ impl super::Rtc {
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})
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}
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#[allow(dead_code)]
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pub(crate) fn set_clock_source(clock_source: RtcClockSource) {
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#[cfg(not(rtc_v2wb))]
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use stm32_metapac::rcc::vals::Rtcsel;
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#[cfg(not(any(rtc_v2l0, rtc_v2l1)))]
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let cr = crate::pac::RCC.bdcr();
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#[cfg(any(rtc_v2l0, rtc_v2l1))]
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let cr = crate::pac::RCC.csr();
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Self::unlock_registers();
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cr.modify(|w| {
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// Select RTC source
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#[cfg(not(rtc_v2wb))]
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w.set_rtcsel(Rtcsel::from_bits(clock_source as u8));
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#[cfg(rtc_v2wb)]
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w.set_rtcsel(clock_source as u8);
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});
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}
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pub(super) fn enable() {
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#[cfg(not(any(rtc_v2l0, rtc_v2l1)))]
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let reg = crate::pac::RCC.bdcr().read();
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#[cfg(any(rtc_v2l0, rtc_v2l1))]
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let reg = crate::pac::RCC.csr().read();
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#[cfg(any(rtc_v2h7, rtc_v2l4, rtc_v2wb))]
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assert!(!reg.lsecsson(), "RTC is not compatible with LSE CSS, yet.");
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if !reg.rtcen() {
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Self::unlock_registers();
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#[cfg(not(any(rtc_v2l0, rtc_v2l1, rtc_v2f2)))]
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crate::pac::RCC.bdcr().modify(|w| w.set_bdrst(true));
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#[cfg(not(any(rtc_v2l0, rtc_v2l1)))]
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let cr = crate::pac::RCC.bdcr();
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#[cfg(any(rtc_v2l0, rtc_v2l1))]
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let cr = crate::pac::RCC.csr();
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cr.modify(|w| {
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// Reset
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#[cfg(not(any(rtc_v2l0, rtc_v2l1)))]
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w.set_bdrst(false);
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w.set_rtcen(true);
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w.set_rtcsel(reg.rtcsel());
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// Restore bcdr
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#[cfg(any(rtc_v2l4, rtc_v2wb))]
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w.set_lscosel(reg.lscosel());
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#[cfg(any(rtc_v2l4, rtc_v2wb))]
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w.set_lscoen(reg.lscoen());
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w.set_lseon(reg.lseon());
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#[cfg(any(rtc_v2f0, rtc_v2f7, rtc_v2h7, rtc_v2l4, rtc_v2wb))]
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w.set_lsedrv(reg.lsedrv());
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w.set_lsebyp(reg.lsebyp());
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});
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}
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}
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/// Applies the RTC config
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/// It this changes the RTC clock source the time will be reset
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pub(super) fn configure(&mut self, rtc_config: RtcConfig) {
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