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stm32/rcc: consistent casing and naming for PLL enums.

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This commit is contained in:
Dario Nieuwenhuis
2023-11-13 00:52:01 +01:00
parent 39c7371621
commit 4fe344ebc0
26 changed files with 111 additions and 111 deletions
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4
examples/stm32l4/src/bin/spe_adin1110_http_server.rs
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@ -75,7 +75,7 @@ async fn main(spawner: Spawner) {
let mut config = embassy_stm32::Config::default();
{
use embassy_stm32::rcc::*;
// 80Mhz clock (Source: 8 / SrcDiv: 1 * PLLMul 20 / ClkDiv 2)
// 80Mhz clock (Source: 8 / SrcDiv: 1 * PllMul 20 / ClkDiv 2)
// 80MHz highest frequency for flash 0 wait.
config.rcc.mux = ClockSrc::PLL1_R;
config.rcc.hse = Some(Hse {
@ -83,7 +83,7 @@ async fn main(spawner: Spawner) {
mode: HseMode::Oscillator,
});
config.rcc.pll = Some(Pll {
source: PLLSource::HSE,
source: PllSource::HSE,
prediv: PllPreDiv::DIV1,
mul: PllMul::MUL20,
divp: None,