stm32/rcc: consistent casing and naming for PLL enums.

2023-11-13 00:52:01 +01:00
parent 39c7371621
commit 4fe344ebc0
26 changed files with 111 additions and 111 deletions
--- a/examples/stm32u5/src/bin/usb_serial.rs
+++ b/examples/stm32u5/src/bin/usb_serial.rs
@ -24,7 +24,7 @@ async fn main(_spawner: Spawner) {

    let mut config = Config::default();
    config.rcc.mux = ClockSrc::PLL1_R(PllConfig {
-        source: PllSrc::HSI,
+        source: PllSource::HSI,
        m: Pllm::DIV2,
        n: Plln::MUL10,
        r: Plldiv::DIV1,