Add STM32L5 support.
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@ -15,6 +15,7 @@ use core::mem::MaybeUninit;
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#[cfg_attr(rcc_l0, path = "l0.rs")]
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#[cfg_attr(rcc_l1, path = "l1.rs")]
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#[cfg_attr(rcc_l4, path = "l4.rs")]
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#[cfg_attr(rcc_l5, path = "l5.rs")]
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#[cfg_attr(rcc_u5, path = "u5.rs")]
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#[cfg_attr(rcc_wb, path = "wb.rs")]
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#[cfg_attr(rcc_wl5, path = "wl5.rs")]
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@ -40,11 +41,12 @@ pub struct Clocks {
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// AHB
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pub ahb1: Hertz,
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#[cfg(any(
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rcc_l4, rcc_f2, rcc_f4, rcc_f410, rcc_f7, rcc_h7, rcc_h7ab, rcc_g4, rcc_u5, rcc_wb, rcc_wl5
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rcc_l4, rcc_l5, rcc_f2, rcc_f4, rcc_f410, rcc_f7, rcc_h7, rcc_h7ab, rcc_g4, rcc_u5, rcc_wb,
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rcc_wl5
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))]
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pub ahb2: Hertz,
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#[cfg(any(
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rcc_l4, rcc_f2, rcc_f4, rcc_f410, rcc_f7, rcc_h7, rcc_h7ab, rcc_u5, rcc_wb, rcc_wl5
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rcc_l4, rcc_l5, rcc_f2, rcc_f4, rcc_f410, rcc_f7, rcc_h7, rcc_h7ab, rcc_u5, rcc_wb, rcc_wl5
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))]
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pub ahb3: Hertz,
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#[cfg(any(rcc_h7, rcc_h7ab))]
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