rp/spi: add configurable pha/pol
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f073bdfe43
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@ -3,20 +3,27 @@ use core::marker::PhantomData;
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use embassy::util::Unborrow;
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use embassy::util::Unborrow;
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use embassy_extras::unborrow;
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use embassy_extras::unborrow;
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use embedded_hal::blocking::spi as eh;
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use embedded_hal::blocking::spi as eh;
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use embedded_hal::spi as ehnb;
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use crate::gpio::sealed::Pin as _;
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use crate::gpio::sealed::Pin as _;
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use crate::gpio::{NoPin, OptionalPin};
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use crate::gpio::{NoPin, OptionalPin};
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use crate::{pac, peripherals};
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use crate::{pac, peripherals};
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pub use ehnb::{Phase, Polarity};
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#[non_exhaustive]
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#[non_exhaustive]
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pub struct Config {
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pub struct Config {
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pub frequency: u32,
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pub frequency: u32,
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pub phase: ehnb::Phase,
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pub polarity: ehnb::Polarity,
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}
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}
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impl Default for Config {
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impl Default for Config {
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fn default() -> Self {
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fn default() -> Self {
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Self {
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Self {
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frequency: 1_000_000,
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frequency: 1_000_000,
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phase: ehnb::Phase::CaptureOnFirstTransition,
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polarity: ehnb::Polarity::IdleLow,
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}
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}
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}
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}
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}
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}
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@ -65,8 +72,8 @@ impl<'d, T: Instance> Spi<'d, T> {
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p.cpsr().write(|w| w.set_cpsdvsr(presc as _));
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p.cpsr().write(|w| w.set_cpsdvsr(presc as _));
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p.cr0().write(|w| {
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p.cr0().write(|w| {
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w.set_dss(0b0111); // 8bit
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w.set_dss(0b0111); // 8bit
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w.set_spo(false);
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w.set_spo(config.polarity == ehnb::Polarity::IdleHigh);
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w.set_sph(false);
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w.set_sph(config.phase == ehnb::Phase::CaptureOnSecondTransition);
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w.set_scr((postdiv - 1) as u8);
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w.set_scr((postdiv - 1) as u8);
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});
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});
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p.cr1().write(|w| {
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p.cr1().write(|w| {
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