stm32: Remove OptionalPin
The idea behind OptionalPin has a few problems: - you need to impl the signal traits for NoPin which is a bit weird https://github.com/embassy-rs/embassy/blob/master/embassy-stm32/src/dcmi.rs#L413-L416 - you can pass any combination of set/unset pins, which needs checking at runtime https://github.com/embassy-rs/embassy/blob/master/embassy-stm32/src/dcmi.rs#L130 The replacement is to do multiple `new` constructors for each combination of pins you want to take.
This commit is contained in:
Dario Nieuwenhuis
@ -8,8 +8,8 @@ use embassy_hal_common::unborrow;
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use self::sealed::WordSize;
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use crate::dma;
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use crate::dma::NoDma;
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use crate::gpio::sealed::{AFType, Pin};
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use crate::gpio::{AnyPin, NoPin, OptionalPin};
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use crate::gpio::sealed::{AFType, Pin as _};
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use crate::gpio::{AnyPin, Pin};
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use crate::pac::spi::{regs, vals};
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use crate::peripherals;
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use crate::rcc::RccPeripheral;
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@ -92,10 +92,116 @@ pub struct Spi<'d, T: Instance, Tx, Rx> {
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impl<'d, T: Instance, Tx, Rx> Spi<'d, T, Tx, Rx> {
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pub fn new<F>(
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peri: impl Unborrow<Target = T> + 'd,
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sck: impl Unborrow<Target = impl SckPin<T>> + 'd,
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mosi: impl Unborrow<Target = impl MosiPin<T>> + 'd,
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miso: impl Unborrow<Target = impl MisoPin<T>> + 'd,
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txdma: impl Unborrow<Target = Tx> + 'd,
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rxdma: impl Unborrow<Target = Rx> + 'd,
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freq: F,
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config: Config,
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) -> Self
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where
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F: Into<Hertz>,
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{
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unborrow!(sck, mosi, miso);
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unsafe {
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sck.set_as_af(sck.af_num(), AFType::OutputPushPull);
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#[cfg(any(spi_v2, spi_v3))]
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sck.set_speed(crate::gpio::Speed::VeryHigh);
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mosi.set_as_af(mosi.af_num(), AFType::OutputPushPull);
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#[cfg(any(spi_v2, spi_v3))]
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mosi.set_speed(crate::gpio::Speed::VeryHigh);
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miso.set_as_af(miso.af_num(), AFType::Input);
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#[cfg(any(spi_v2, spi_v3))]
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miso.set_speed(crate::gpio::Speed::VeryHigh);
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}
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Self::new_inner(
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peri,
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Some(sck.degrade()),
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Some(mosi.degrade()),
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Some(miso.degrade()),
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txdma,
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rxdma,
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freq,
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config,
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)
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}
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pub fn new_rxonly<F>(
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peri: impl Unborrow<Target = T> + 'd,
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sck: impl Unborrow<Target = impl SckPin<T>> + 'd,
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miso: impl Unborrow<Target = impl MisoPin<T>> + 'd,
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txdma: impl Unborrow<Target = Tx> + 'd, // TODO remove
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rxdma: impl Unborrow<Target = Rx> + 'd,
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freq: F,
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config: Config,
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) -> Self
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where
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F: Into<Hertz>,
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{
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unborrow!(sck, miso);
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unsafe {
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sck.set_as_af(sck.af_num(), AFType::OutputPushPull);
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#[cfg(any(spi_v2, spi_v3))]
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sck.set_speed(crate::gpio::Speed::VeryHigh);
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miso.set_as_af(miso.af_num(), AFType::Input);
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#[cfg(any(spi_v2, spi_v3))]
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miso.set_speed(crate::gpio::Speed::VeryHigh);
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}
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Self::new_inner(
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peri,
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Some(sck.degrade()),
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None,
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Some(miso.degrade()),
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txdma,
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rxdma,
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freq,
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config,
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)
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}
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pub fn new_txonly<F>(
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peri: impl Unborrow<Target = T> + 'd,
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sck: impl Unborrow<Target = impl SckPin<T>> + 'd,
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mosi: impl Unborrow<Target = impl MosiPin<T>> + 'd,
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txdma: impl Unborrow<Target = Tx> + 'd,
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rxdma: impl Unborrow<Target = Rx> + 'd, // TODO remove
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freq: F,
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config: Config,
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) -> Self
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where
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F: Into<Hertz>,
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{
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unborrow!(sck, mosi);
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unsafe {
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sck.set_as_af(sck.af_num(), AFType::OutputPushPull);
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#[cfg(any(spi_v2, spi_v3))]
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sck.set_speed(crate::gpio::Speed::VeryHigh);
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mosi.set_as_af(mosi.af_num(), AFType::OutputPushPull);
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#[cfg(any(spi_v2, spi_v3))]
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mosi.set_speed(crate::gpio::Speed::VeryHigh);
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}
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Self::new_inner(
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peri,
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Some(sck.degrade()),
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Some(mosi.degrade()),
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None,
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txdma,
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rxdma,
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freq,
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config,
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)
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}
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fn new_inner<F>(
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_peri: impl Unborrow<Target = T> + 'd,
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sck: impl Unborrow<Target = impl SckPin<T>>,
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mosi: impl Unborrow<Target = impl MosiPin<T>>,
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miso: impl Unborrow<Target = impl MisoPin<T>>,
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sck: Option<AnyPin>,
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mosi: Option<AnyPin>,
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miso: Option<AnyPin>,
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txdma: impl Unborrow<Target = Tx>,
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rxdma: impl Unborrow<Target = Rx>,
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freq: F,
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@ -104,32 +210,7 @@ impl<'d, T: Instance, Tx, Rx> Spi<'d, T, Tx, Rx> {
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where
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F: Into<Hertz>,
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{
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unborrow!(sck, mosi, miso, txdma, rxdma);
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let sck_af = sck.af_num();
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let mosi_af = mosi.af_num();
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let miso_af = miso.af_num();
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let sck = sck.degrade_optional();
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let mosi = mosi.degrade_optional();
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let miso = miso.degrade_optional();
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unsafe {
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sck.as_ref().map(|x| {
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x.set_as_af(sck_af, AFType::OutputPushPull);
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#[cfg(any(spi_v2, spi_v3))]
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x.set_speed(crate::gpio::Speed::VeryHigh);
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});
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mosi.as_ref().map(|x| {
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x.set_as_af(mosi_af, AFType::OutputPushPull);
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#[cfg(any(spi_v2, spi_v3))]
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x.set_speed(crate::gpio::Speed::VeryHigh);
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});
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miso.as_ref().map(|x| {
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x.set_as_af(miso_af, AFType::Input);
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#[cfg(any(spi_v2, spi_v3))]
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x.set_speed(crate::gpio::Speed::VeryHigh);
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});
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}
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unborrow!(txdma, rxdma);
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let pclk = T::frequency();
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let br = compute_baud_rate(pclk, freq.into());
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@ -719,15 +800,15 @@ pub(crate) mod sealed {
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fn regs() -> &'static crate::pac::spi::Spi;
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}
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pub trait SckPin<T: Instance>: OptionalPin {
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pub trait SckPin<T: Instance>: Pin {
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fn af_num(&self) -> u8;
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}
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pub trait MosiPin<T: Instance>: OptionalPin {
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pub trait MosiPin<T: Instance>: Pin {
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fn af_num(&self) -> u8;
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}
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pub trait MisoPin<T: Instance>: OptionalPin {
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pub trait MisoPin<T: Instance>: Pin {
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fn af_num(&self) -> u8;
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}
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@ -865,26 +946,6 @@ crate::pac::peripheral_pins!(
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};
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);
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macro_rules! impl_nopin {
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($inst:ident, $signal:ident) => {
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impl $signal<peripherals::$inst> for NoPin {}
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impl sealed::$signal<peripherals::$inst> for NoPin {
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fn af_num(&self) -> u8 {
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0
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}
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}
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};
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}
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crate::pac::peripherals!(
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(spi, $inst:ident) => {
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impl_nopin!($inst, SckPin);
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impl_nopin!($inst, MosiPin);
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impl_nopin!($inst, MisoPin);
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};
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);
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macro_rules! impl_dma {
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($inst:ident, {dmamux: $dmamux:ident}, $signal:ident, $request:expr) => {
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impl<T> sealed::$signal<peripherals::$inst> for T
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