remove write_X variants
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88052480b1
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@ -86,6 +86,7 @@ impl Ch2Trigger {
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#[derive(Debug, Copy, Clone, Eq, PartialEq)]
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#[derive(Debug, Copy, Clone, Eq, PartialEq)]
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#[cfg_attr(feature = "defmt", derive(defmt::Format))]
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#[cfg_attr(feature = "defmt", derive(defmt::Format))]
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/// Single 8 or 12 bit value that can be output by the DAC
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pub enum Value {
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pub enum Value {
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// 8 bit value
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// 8 bit value
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Bit8(u8),
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Bit8(u8),
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@ -97,6 +98,7 @@ pub enum Value {
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#[derive(Debug, Copy, Clone, Eq, PartialEq)]
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#[derive(Debug, Copy, Clone, Eq, PartialEq)]
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#[cfg_attr(feature = "defmt", derive(defmt::Format))]
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#[cfg_attr(feature = "defmt", derive(defmt::Format))]
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/// Array variant of [`Value`]
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pub enum ValueArray<'a> {
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pub enum ValueArray<'a> {
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// 8 bit values
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// 8 bit values
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Bit8(&'a [u8]),
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Bit8(&'a [u8]),
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@ -239,29 +241,7 @@ impl<'d, T: Instance, Tx> Dac<'d, T, Tx> {
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/// ## Current limitations
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/// ## Current limitations
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/// - Only CH1 Supported
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/// - Only CH1 Supported
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///
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///
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/// TODO: Allow an array of Value instead of only u16, right-aligned
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pub async fn write(&mut self, data_ch1: ValueArray<'_>, circular: bool) -> Result<(), Error>
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pub async fn write_8bit(&mut self, data_ch1: &[u8], circular: bool) -> Result<(), Error>
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where
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Tx: Dma<T>,
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{
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self.write_inner(ValueArray::Bit8(data_ch1), circular).await
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}
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pub async fn write_12bit_right_aligned(&mut self, data_ch1: &[u16], circular: bool) -> Result<(), Error>
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where
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Tx: Dma<T>,
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{
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self.write_inner(ValueArray::Bit12Right(data_ch1), circular).await
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}
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pub async fn write_12bit_left_aligned(&mut self, data_ch1: &[u16], circular: bool) -> Result<(), Error>
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where
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Tx: Dma<T>,
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{
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self.write_inner(ValueArray::Bit12Left(data_ch1), circular).await
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}
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async fn write_inner(&mut self, data_ch1: ValueArray<'_>, circular: bool) -> Result<(), Error>
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where
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where
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Tx: Dma<T>,
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Tx: Dma<T>,
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{
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{
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