From 5a208d28d011761d88e12881a69ab9c0663149e2 Mon Sep 17 00:00:00 2001 From: chemicstry Date: Mon, 11 Jul 2022 00:37:00 +0300 Subject: [PATCH] Fix g0 rcc build --- embassy-stm32/src/rcc/g0.rs | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/embassy-stm32/src/rcc/g0.rs b/embassy-stm32/src/rcc/g0.rs index 3ca65cf3..6bfae46b 100644 --- a/embassy-stm32/src/rcc/g0.rs +++ b/embassy-stm32/src/rcc/g0.rs @@ -361,7 +361,7 @@ pub(crate) unsafe fn init(config: Config) { // Enable LSI RCC.csr().write(|w| w.set_lsion(true)); while !RCC.csr().read().lsirdy() {} - (LSI_FREQ, Sw::LSI) + (LSI_FREQ.0, Sw::LSI) } };