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stm32: No need to enable GPIO clocks manually

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This commit is contained in:
Timo Kröger
2021-07-23 14:24:38 +02:00
parent ec5d44333a
commit 5ac91933ff
21 changed files with 36 additions and 221 deletions
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40
examples/stm32l4/src/bin/dac.rs
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@ -13,11 +13,10 @@ use embassy_stm32::gpio::NoPin;
use example_common::*;
use cortex_m_rt::entry;
//use stm32f4::stm32f429 as pac;
use embassy_stm32::dac::{Channel, Dac, Value};
use stm32l4::stm32l4x5 as pac;
use embassy_stm32::pac;
use stm32l4xx_hal::prelude::*;
use stm32l4xx_hal::rcc::PllSource;
use stm32l4xx_hal::{prelude::*};
#[entry]
fn main() -> ! {
@ -30,36 +29,23 @@ fn main() -> ! {
// TRY the other clock configuration
// let clocks = rcc.cfgr.freeze(&mut flash.acr);
rcc
.cfgr
rcc.cfgr
.sysclk(80.mhz())
.pclk1(80.mhz())
.pclk2(80.mhz())
.pll_source(PllSource::HSI16)
.freeze(&mut flash.acr, &mut pwr);
let pp = unsafe { pac::Peripherals::steal() };
pp.DBGMCU.cr.modify(|_, w| {
w.dbg_sleep().set_bit();
w.dbg_standby().set_bit();
w.dbg_stop().set_bit()
});
pp.RCC.apb1enr1.modify(|_, w| {
w.dac1en().set_bit();
w
});
pp.RCC.ahb2enr.modify(|_, w| {
w.gpioaen().set_bit();
w.gpioben().set_bit();
w.gpiocen().set_bit();
w.gpioden().set_bit();
w.gpioeen().set_bit();
w.gpiofen().set_bit();
w
});
unsafe {
pac::DBGMCU.cr().modify(|w| {
w.set_dbg_sleep(true);
w.set_dbg_standby(true);
w.set_dbg_stop(true);
});
pac::RCC.apb1enr1().modify(|w| {
w.set_dac1en(true);
});
}
let p = embassy_stm32::init(Default::default());