eh: update set_config and add get_config

This commit is contained in:
xoviat 2023-10-01 09:37:20 -05:00
parent a7b1e51650
commit 5ad34404af
6 changed files with 28 additions and 10 deletions

View File

@ -26,6 +26,18 @@ pub trait SetConfig {
/// The configuration type used by this driver. /// The configuration type used by this driver.
type Config; type Config;
/// The error type that can occur if `set_config` fails.
type ConfigError;
/// Set the configuration of the driver. /// Set the configuration of the driver.
fn set_config(&mut self, config: &Self::Config); fn set_config(&mut self, config: &Self::Config) -> Result<(), Self::ConfigError>;
}
/// Get the configuration of a peripheral driver.
pub trait GetConfig {
/// The configuration type used by this driver.
type Config;
/// Get the configuration of the driver.
fn get_config(&self) -> Self::Config;
} }

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@ -125,14 +125,14 @@ where
{ {
async fn read(&mut self, address: u8, buffer: &mut [u8]) -> Result<(), I2cDeviceError<BUS::Error>> { async fn read(&mut self, address: u8, buffer: &mut [u8]) -> Result<(), I2cDeviceError<BUS::Error>> {
let mut bus = self.bus.lock().await; let mut bus = self.bus.lock().await;
bus.set_config(&self.config); bus.set_config(&self.config).map_err(|_| I2cDeviceError::Config)?;
bus.read(address, buffer).await.map_err(I2cDeviceError::I2c)?; bus.read(address, buffer).await.map_err(I2cDeviceError::I2c)?;
Ok(()) Ok(())
} }
async fn write(&mut self, address: u8, bytes: &[u8]) -> Result<(), I2cDeviceError<BUS::Error>> { async fn write(&mut self, address: u8, bytes: &[u8]) -> Result<(), I2cDeviceError<BUS::Error>> {
let mut bus = self.bus.lock().await; let mut bus = self.bus.lock().await;
bus.set_config(&self.config); bus.set_config(&self.config).map_err(|_| I2cDeviceError::Config)?;
bus.write(address, bytes).await.map_err(I2cDeviceError::I2c)?; bus.write(address, bytes).await.map_err(I2cDeviceError::I2c)?;
Ok(()) Ok(())
} }
@ -144,7 +144,7 @@ where
rd_buffer: &mut [u8], rd_buffer: &mut [u8],
) -> Result<(), I2cDeviceError<BUS::Error>> { ) -> Result<(), I2cDeviceError<BUS::Error>> {
let mut bus = self.bus.lock().await; let mut bus = self.bus.lock().await;
bus.set_config(&self.config); bus.set_config(&self.config).map_err(|_| I2cDeviceError::Config)?;
bus.write_read(address, wr_buffer, rd_buffer) bus.write_read(address, wr_buffer, rd_buffer)
.await .await
.map_err(I2cDeviceError::I2c)?; .map_err(I2cDeviceError::I2c)?;
@ -153,7 +153,7 @@ where
async fn transaction(&mut self, address: u8, operations: &mut [i2c::Operation<'_>]) -> Result<(), Self::Error> { async fn transaction(&mut self, address: u8, operations: &mut [i2c::Operation<'_>]) -> Result<(), Self::Error> {
let mut bus = self.bus.lock().await; let mut bus = self.bus.lock().await;
bus.set_config(&self.config); bus.set_config(&self.config).map_err(|_| I2cDeviceError::Config)?;
bus.transaction(address, operations) bus.transaction(address, operations)
.await .await
.map_err(I2cDeviceError::I2c)?; .map_err(I2cDeviceError::I2c)?;

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@ -130,7 +130,7 @@ where
{ {
async fn transaction(&mut self, operations: &mut [spi::Operation<'_, u8>]) -> Result<(), Self::Error> { async fn transaction(&mut self, operations: &mut [spi::Operation<'_, u8>]) -> Result<(), Self::Error> {
let mut bus = self.bus.lock().await; let mut bus = self.bus.lock().await;
bus.set_config(&self.config); bus.set_config(&self.config).map_err(|_| SpiDeviceError::Config)?;
self.cs.set_low().map_err(SpiDeviceError::Cs)?; self.cs.set_low().map_err(SpiDeviceError::Cs)?;
let op_res: Result<(), BUS::Error> = try { let op_res: Result<(), BUS::Error> = try {

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@ -148,7 +148,7 @@ where
fn read(&mut self, address: u8, buffer: &mut [u8]) -> Result<(), Self::Error> { fn read(&mut self, address: u8, buffer: &mut [u8]) -> Result<(), Self::Error> {
self.bus.lock(|bus| { self.bus.lock(|bus| {
let mut bus = bus.borrow_mut(); let mut bus = bus.borrow_mut();
bus.set_config(&self.config); bus.set_config(&self.config).map_err(|_| I2cDeviceError::Config)?;
bus.read(address, buffer).map_err(I2cDeviceError::I2c) bus.read(address, buffer).map_err(I2cDeviceError::I2c)
}) })
} }
@ -156,7 +156,7 @@ where
fn write(&mut self, address: u8, bytes: &[u8]) -> Result<(), Self::Error> { fn write(&mut self, address: u8, bytes: &[u8]) -> Result<(), Self::Error> {
self.bus.lock(|bus| { self.bus.lock(|bus| {
let mut bus = bus.borrow_mut(); let mut bus = bus.borrow_mut();
bus.set_config(&self.config); bus.set_config(&self.config).map_err(|_| I2cDeviceError::Config)?;
bus.write(address, bytes).map_err(I2cDeviceError::I2c) bus.write(address, bytes).map_err(I2cDeviceError::I2c)
}) })
} }
@ -164,7 +164,7 @@ where
fn write_read(&mut self, address: u8, wr_buffer: &[u8], rd_buffer: &mut [u8]) -> Result<(), Self::Error> { fn write_read(&mut self, address: u8, wr_buffer: &[u8], rd_buffer: &mut [u8]) -> Result<(), Self::Error> {
self.bus.lock(|bus| { self.bus.lock(|bus| {
let mut bus = bus.borrow_mut(); let mut bus = bus.borrow_mut();
bus.set_config(&self.config); bus.set_config(&self.config).map_err(|_| I2cDeviceError::Config)?;
bus.write_read(address, wr_buffer, rd_buffer) bus.write_read(address, wr_buffer, rd_buffer)
.map_err(I2cDeviceError::I2c) .map_err(I2cDeviceError::I2c)
}) })

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@ -163,7 +163,7 @@ where
fn transaction(&mut self, operations: &mut [Operation<'_, u8>]) -> Result<(), Self::Error> { fn transaction(&mut self, operations: &mut [Operation<'_, u8>]) -> Result<(), Self::Error> {
self.bus.lock(|bus| { self.bus.lock(|bus| {
let mut bus = bus.borrow_mut(); let mut bus = bus.borrow_mut();
bus.set_config(&self.config); bus.set_config(&self.config).map_err(|_| SpiDeviceError::Config)?;
self.cs.set_low().map_err(SpiDeviceError::Cs)?; self.cs.set_low().map_err(SpiDeviceError::Cs)?;
let op_res = operations.iter_mut().try_for_each(|op| match op { let op_res = operations.iter_mut().try_for_each(|op| match op {

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@ -14,6 +14,8 @@ pub mod blocking;
pub enum I2cDeviceError<BUS> { pub enum I2cDeviceError<BUS> {
/// An operation on the inner I2C bus failed. /// An operation on the inner I2C bus failed.
I2c(BUS), I2c(BUS),
/// Configuration of the inner I2C bus failed.
Config,
} }
impl<BUS> i2c::Error for I2cDeviceError<BUS> impl<BUS> i2c::Error for I2cDeviceError<BUS>
@ -23,6 +25,7 @@ where
fn kind(&self) -> i2c::ErrorKind { fn kind(&self) -> i2c::ErrorKind {
match self { match self {
Self::I2c(e) => e.kind(), Self::I2c(e) => e.kind(),
Self::Config => i2c::ErrorKind::Other,
} }
} }
} }
@ -38,6 +41,8 @@ pub enum SpiDeviceError<BUS, CS> {
Cs(CS), Cs(CS),
/// DelayUs operations are not supported when the `time` Cargo feature is not enabled. /// DelayUs operations are not supported when the `time` Cargo feature is not enabled.
DelayUsNotSupported, DelayUsNotSupported,
/// The SPI bus could not be configured.
Config,
} }
impl<BUS, CS> spi::Error for SpiDeviceError<BUS, CS> impl<BUS, CS> spi::Error for SpiDeviceError<BUS, CS>
@ -50,6 +55,7 @@ where
Self::Spi(e) => e.kind(), Self::Spi(e) => e.kind(),
Self::Cs(_) => spi::ErrorKind::Other, Self::Cs(_) => spi::ErrorKind::Other,
Self::DelayUsNotSupported => spi::ErrorKind::Other, Self::DelayUsNotSupported => spi::ErrorKind::Other,
Self::Config => spi::ErrorKind::Other,
} }
} }
} }