eh: update set_config and add get_config
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a7b1e51650
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5ad34404af
@ -26,6 +26,18 @@ pub trait SetConfig {
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/// The configuration type used by this driver.
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/// The configuration type used by this driver.
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type Config;
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type Config;
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/// The error type that can occur if `set_config` fails.
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type ConfigError;
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/// Set the configuration of the driver.
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/// Set the configuration of the driver.
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fn set_config(&mut self, config: &Self::Config);
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fn set_config(&mut self, config: &Self::Config) -> Result<(), Self::ConfigError>;
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}
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/// Get the configuration of a peripheral driver.
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pub trait GetConfig {
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/// The configuration type used by this driver.
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type Config;
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/// Get the configuration of the driver.
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fn get_config(&self) -> Self::Config;
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}
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}
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@ -125,14 +125,14 @@ where
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{
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{
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async fn read(&mut self, address: u8, buffer: &mut [u8]) -> Result<(), I2cDeviceError<BUS::Error>> {
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async fn read(&mut self, address: u8, buffer: &mut [u8]) -> Result<(), I2cDeviceError<BUS::Error>> {
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let mut bus = self.bus.lock().await;
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let mut bus = self.bus.lock().await;
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bus.set_config(&self.config);
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bus.set_config(&self.config).map_err(|_| I2cDeviceError::Config)?;
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bus.read(address, buffer).await.map_err(I2cDeviceError::I2c)?;
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bus.read(address, buffer).await.map_err(I2cDeviceError::I2c)?;
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Ok(())
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Ok(())
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}
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}
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async fn write(&mut self, address: u8, bytes: &[u8]) -> Result<(), I2cDeviceError<BUS::Error>> {
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async fn write(&mut self, address: u8, bytes: &[u8]) -> Result<(), I2cDeviceError<BUS::Error>> {
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let mut bus = self.bus.lock().await;
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let mut bus = self.bus.lock().await;
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bus.set_config(&self.config);
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bus.set_config(&self.config).map_err(|_| I2cDeviceError::Config)?;
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bus.write(address, bytes).await.map_err(I2cDeviceError::I2c)?;
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bus.write(address, bytes).await.map_err(I2cDeviceError::I2c)?;
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Ok(())
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Ok(())
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}
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}
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@ -144,7 +144,7 @@ where
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rd_buffer: &mut [u8],
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rd_buffer: &mut [u8],
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) -> Result<(), I2cDeviceError<BUS::Error>> {
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) -> Result<(), I2cDeviceError<BUS::Error>> {
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let mut bus = self.bus.lock().await;
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let mut bus = self.bus.lock().await;
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bus.set_config(&self.config);
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bus.set_config(&self.config).map_err(|_| I2cDeviceError::Config)?;
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bus.write_read(address, wr_buffer, rd_buffer)
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bus.write_read(address, wr_buffer, rd_buffer)
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.await
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.await
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.map_err(I2cDeviceError::I2c)?;
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.map_err(I2cDeviceError::I2c)?;
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@ -153,7 +153,7 @@ where
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async fn transaction(&mut self, address: u8, operations: &mut [i2c::Operation<'_>]) -> Result<(), Self::Error> {
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async fn transaction(&mut self, address: u8, operations: &mut [i2c::Operation<'_>]) -> Result<(), Self::Error> {
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let mut bus = self.bus.lock().await;
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let mut bus = self.bus.lock().await;
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bus.set_config(&self.config);
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bus.set_config(&self.config).map_err(|_| I2cDeviceError::Config)?;
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bus.transaction(address, operations)
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bus.transaction(address, operations)
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.await
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.await
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.map_err(I2cDeviceError::I2c)?;
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.map_err(I2cDeviceError::I2c)?;
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@ -130,7 +130,7 @@ where
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{
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{
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async fn transaction(&mut self, operations: &mut [spi::Operation<'_, u8>]) -> Result<(), Self::Error> {
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async fn transaction(&mut self, operations: &mut [spi::Operation<'_, u8>]) -> Result<(), Self::Error> {
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let mut bus = self.bus.lock().await;
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let mut bus = self.bus.lock().await;
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bus.set_config(&self.config);
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bus.set_config(&self.config).map_err(|_| SpiDeviceError::Config)?;
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self.cs.set_low().map_err(SpiDeviceError::Cs)?;
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self.cs.set_low().map_err(SpiDeviceError::Cs)?;
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let op_res: Result<(), BUS::Error> = try {
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let op_res: Result<(), BUS::Error> = try {
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@ -148,7 +148,7 @@ where
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fn read(&mut self, address: u8, buffer: &mut [u8]) -> Result<(), Self::Error> {
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fn read(&mut self, address: u8, buffer: &mut [u8]) -> Result<(), Self::Error> {
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self.bus.lock(|bus| {
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self.bus.lock(|bus| {
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let mut bus = bus.borrow_mut();
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let mut bus = bus.borrow_mut();
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bus.set_config(&self.config);
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bus.set_config(&self.config).map_err(|_| I2cDeviceError::Config)?;
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bus.read(address, buffer).map_err(I2cDeviceError::I2c)
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bus.read(address, buffer).map_err(I2cDeviceError::I2c)
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})
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})
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}
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}
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@ -156,7 +156,7 @@ where
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fn write(&mut self, address: u8, bytes: &[u8]) -> Result<(), Self::Error> {
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fn write(&mut self, address: u8, bytes: &[u8]) -> Result<(), Self::Error> {
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self.bus.lock(|bus| {
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self.bus.lock(|bus| {
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let mut bus = bus.borrow_mut();
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let mut bus = bus.borrow_mut();
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bus.set_config(&self.config);
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bus.set_config(&self.config).map_err(|_| I2cDeviceError::Config)?;
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bus.write(address, bytes).map_err(I2cDeviceError::I2c)
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bus.write(address, bytes).map_err(I2cDeviceError::I2c)
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})
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})
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}
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}
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@ -164,7 +164,7 @@ where
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fn write_read(&mut self, address: u8, wr_buffer: &[u8], rd_buffer: &mut [u8]) -> Result<(), Self::Error> {
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fn write_read(&mut self, address: u8, wr_buffer: &[u8], rd_buffer: &mut [u8]) -> Result<(), Self::Error> {
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self.bus.lock(|bus| {
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self.bus.lock(|bus| {
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let mut bus = bus.borrow_mut();
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let mut bus = bus.borrow_mut();
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bus.set_config(&self.config);
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bus.set_config(&self.config).map_err(|_| I2cDeviceError::Config)?;
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bus.write_read(address, wr_buffer, rd_buffer)
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bus.write_read(address, wr_buffer, rd_buffer)
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.map_err(I2cDeviceError::I2c)
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.map_err(I2cDeviceError::I2c)
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})
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})
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@ -163,7 +163,7 @@ where
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fn transaction(&mut self, operations: &mut [Operation<'_, u8>]) -> Result<(), Self::Error> {
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fn transaction(&mut self, operations: &mut [Operation<'_, u8>]) -> Result<(), Self::Error> {
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self.bus.lock(|bus| {
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self.bus.lock(|bus| {
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let mut bus = bus.borrow_mut();
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let mut bus = bus.borrow_mut();
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bus.set_config(&self.config);
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bus.set_config(&self.config).map_err(|_| SpiDeviceError::Config)?;
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self.cs.set_low().map_err(SpiDeviceError::Cs)?;
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self.cs.set_low().map_err(SpiDeviceError::Cs)?;
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let op_res = operations.iter_mut().try_for_each(|op| match op {
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let op_res = operations.iter_mut().try_for_each(|op| match op {
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@ -14,6 +14,8 @@ pub mod blocking;
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pub enum I2cDeviceError<BUS> {
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pub enum I2cDeviceError<BUS> {
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/// An operation on the inner I2C bus failed.
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/// An operation on the inner I2C bus failed.
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I2c(BUS),
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I2c(BUS),
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/// Configuration of the inner I2C bus failed.
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Config,
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}
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}
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impl<BUS> i2c::Error for I2cDeviceError<BUS>
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impl<BUS> i2c::Error for I2cDeviceError<BUS>
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@ -23,6 +25,7 @@ where
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fn kind(&self) -> i2c::ErrorKind {
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fn kind(&self) -> i2c::ErrorKind {
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match self {
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match self {
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Self::I2c(e) => e.kind(),
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Self::I2c(e) => e.kind(),
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Self::Config => i2c::ErrorKind::Other,
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}
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}
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}
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}
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}
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}
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@ -38,6 +41,8 @@ pub enum SpiDeviceError<BUS, CS> {
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Cs(CS),
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Cs(CS),
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/// DelayUs operations are not supported when the `time` Cargo feature is not enabled.
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/// DelayUs operations are not supported when the `time` Cargo feature is not enabled.
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DelayUsNotSupported,
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DelayUsNotSupported,
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/// The SPI bus could not be configured.
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Config,
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}
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}
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impl<BUS, CS> spi::Error for SpiDeviceError<BUS, CS>
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impl<BUS, CS> spi::Error for SpiDeviceError<BUS, CS>
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@ -50,6 +55,7 @@ where
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Self::Spi(e) => e.kind(),
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Self::Spi(e) => e.kind(),
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Self::Cs(_) => spi::ErrorKind::Other,
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Self::Cs(_) => spi::ErrorKind::Other,
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Self::DelayUsNotSupported => spi::ErrorKind::Other,
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Self::DelayUsNotSupported => spi::ErrorKind::Other,
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Self::Config => spi::ErrorKind::Other,
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}
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}
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}
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}
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}
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}
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