embassy-stm32: Simplify time
- Remove unused `MilliSeconds`, `MicroSeconds`, and `NanoSeconds` types - Remove `Bps`, `KiloHertz`, and `MegaHertz` types that were only used for converting to `Hertz` - Replace all instances of `impl Into<Hertz>` with `Hertz` - Add `hz`, `khz`, and `mhz` methods to `Hertz`, as well as free function shortcuts - Remove `U32Ext` extension trait
This commit is contained in:
@ -2,7 +2,7 @@ use crate::pac::flash::vals::Latency;
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use crate::pac::rcc::vals::{self, Hpre, Hsidiv, Ppre, Sw};
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use crate::pac::{FLASH, PWR, RCC};
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use crate::rcc::{set_freqs, Clocks};
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use crate::time::{Hertz, U32Ext};
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use crate::time::Hertz;
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/// HSI speed
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pub const HSI_FREQ: Hertz = Hertz(16_000_000);
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@ -449,14 +449,14 @@ pub(crate) unsafe fn init(config: Config) {
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};
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if config.low_power_run {
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assert!(sys_clk.hz() <= 2_000_000.hz());
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assert!(sys_clk <= 2_000_000);
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PWR.cr1().modify(|w| w.set_lpr(true));
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}
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set_freqs(Clocks {
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sys: sys_clk.hz(),
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ahb1: ahb_freq.hz(),
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apb1: apb_freq.hz(),
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apb1_tim: apb_tim_freq.hz(),
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sys: Hertz(sys_clk),
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ahb1: Hertz(ahb_freq),
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apb1: Hertz(apb_freq),
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apb1_tim: Hertz(apb_tim_freq),
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});
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}
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@ -1,6 +1,6 @@
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use crate::pac::{PWR, RCC};
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use crate::rcc::{set_freqs, Clocks};
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use crate::time::{Hertz, U32Ext};
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use crate::time::Hertz;
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/// HSI speed
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pub const HSI_FREQ: Hertz = Hertz(16_000_000);
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@ -144,17 +144,17 @@ pub(crate) unsafe fn init(config: Config) {
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};
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if config.low_power_run {
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assert!(sys_clk.hz() <= 2_000_000.hz());
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assert!(sys_clk <= 2_000_000);
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PWR.cr1().modify(|w| w.set_lpr(true));
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}
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set_freqs(Clocks {
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sys: sys_clk.hz(),
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ahb1: ahb_freq.hz(),
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ahb2: ahb_freq.hz(),
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apb1: apb1_freq.hz(),
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apb1_tim: apb1_tim_freq.hz(),
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apb2: apb2_freq.hz(),
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apb2_tim: apb2_tim_freq.hz(),
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sys: Hertz(sys_clk),
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ahb1: Hertz(ahb_freq),
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ahb2: Hertz(ahb_freq),
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apb1: Hertz(apb1_freq),
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apb1_tim: Hertz(apb1_tim_freq),
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apb2: Hertz(apb2_freq),
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apb2_tim: Hertz(apb2_tim_freq),
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});
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}
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@ -3,7 +3,7 @@ use crate::pac::RCC;
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#[cfg(crs)]
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use crate::pac::{CRS, SYSCFG};
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use crate::rcc::{set_freqs, Clocks};
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use crate::time::{Hertz, U32Ext};
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use crate::time::Hertz;
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/// HSI speed
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pub const HSI_FREQ: Hertz = Hertz(16_000_000);
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@ -266,7 +266,7 @@ pub(crate) unsafe fn init(config: Config) {
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PLLDiv::Div3 => freq / 3,
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PLLDiv::Div4 => freq / 4,
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};
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assert!(freq <= 32_u32.mhz().0);
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assert!(freq <= 32_000_000);
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RCC.cfgr().write(move |w| {
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w.set_pllmul(mul.into());
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@ -359,11 +359,11 @@ pub(crate) unsafe fn init(config: Config) {
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}
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set_freqs(Clocks {
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sys: sys_clk.hz(),
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ahb1: ahb_freq.hz(),
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apb1: apb1_freq.hz(),
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apb2: apb2_freq.hz(),
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apb1_tim: apb1_tim_freq.hz(),
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apb2_tim: apb2_tim_freq.hz(),
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sys: Hertz(sys_clk),
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ahb1: Hertz(ahb_freq),
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apb1: Hertz(apb1_freq),
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apb2: Hertz(apb2_freq),
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apb1_tim: Hertz(apb1_tim_freq),
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apb2_tim: Hertz(apb2_tim_freq),
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});
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}
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@ -1,7 +1,7 @@
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use crate::pac::rcc::vals::{Hpre, Msirange, Plldiv, Pllmul, Pllsrc, Ppre, Sw};
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use crate::pac::{FLASH, RCC};
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use crate::rcc::{set_freqs, Clocks};
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use crate::time::{Hertz, U32Ext};
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use crate::time::Hertz;
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/// HSI speed
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pub const HSI_FREQ: Hertz = Hertz(16_000_000);
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@ -320,11 +320,11 @@ pub(crate) unsafe fn init(config: Config) {
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};
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set_freqs(Clocks {
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sys: sys_clk.hz(),
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ahb1: ahb_freq.hz(),
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apb1: apb1_freq.hz(),
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apb2: apb2_freq.hz(),
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apb1_tim: apb1_tim_freq.hz(),
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apb2_tim: apb2_tim_freq.hz(),
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sys: Hertz(sys_clk),
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ahb1: Hertz(ahb_freq),
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apb1: Hertz(apb1_freq),
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apb2: Hertz(apb2_freq),
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apb1_tim: Hertz(apb1_tim_freq),
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apb2_tim: Hertz(apb2_tim_freq),
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});
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}
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@ -1,7 +1,7 @@
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use crate::pac::rcc::vals::{Hpre, Msirange, Pllsrc, Ppre, Sw};
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use crate::pac::{FLASH, RCC};
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use crate::rcc::{set_freqs, Clocks};
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use crate::time::{Hertz, U32Ext};
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use crate::time::Hertz;
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/// HSI speed
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pub const HSI_FREQ: Hertz = Hertz(16_000_000);
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@ -489,13 +489,13 @@ pub(crate) unsafe fn init(config: Config) {
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};
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set_freqs(Clocks {
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sys: sys_clk.hz(),
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ahb1: ahb_freq.hz(),
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ahb2: ahb_freq.hz(),
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ahb3: ahb_freq.hz(),
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apb1: apb1_freq.hz(),
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apb2: apb2_freq.hz(),
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apb1_tim: apb1_tim_freq.hz(),
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apb2_tim: apb2_tim_freq.hz(),
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sys: Hertz(sys_clk),
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ahb1: Hertz(ahb_freq),
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ahb2: Hertz(ahb_freq),
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ahb3: Hertz(ahb_freq),
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apb1: Hertz(apb1_freq),
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apb2: Hertz(apb2_freq),
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apb1_tim: Hertz(apb1_tim_freq),
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apb2_tim: Hertz(apb2_tim_freq),
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});
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}
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@ -3,7 +3,7 @@ use stm32_metapac::PWR;
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use crate::pac::rcc::vals::{Hpre, Msirange, Pllsrc, Ppre, Sw};
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use crate::pac::{FLASH, RCC};
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use crate::rcc::{set_freqs, Clocks};
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use crate::time::{Hertz, U32Ext};
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use crate::time::Hertz;
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/// HSI speed
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pub const HSI_FREQ: Hertz = Hertz(16_000_000);
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@ -487,13 +487,13 @@ pub(crate) unsafe fn init(config: Config) {
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};
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set_freqs(Clocks {
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sys: sys_clk.hz(),
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ahb1: ahb_freq.hz(),
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ahb2: ahb_freq.hz(),
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ahb3: ahb_freq.hz(),
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apb1: apb1_freq.hz(),
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apb2: apb2_freq.hz(),
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apb1_tim: apb1_tim_freq.hz(),
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apb2_tim: apb2_tim_freq.hz(),
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sys: Hertz(sys_clk),
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ahb1: Hertz(ahb_freq),
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ahb2: Hertz(ahb_freq),
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ahb3: Hertz(ahb_freq),
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apb1: Hertz(apb1_freq),
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apb2: Hertz(apb2_freq),
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apb1_tim: Hertz(apb1_tim_freq),
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apb2_tim: Hertz(apb2_tim_freq),
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});
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}
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@ -2,7 +2,7 @@ use stm32_metapac::rcc::vals::{Hpre, Msirange, Msirgsel, Pllm, Pllsrc, Ppre, Sw}
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use crate::pac::{FLASH, RCC};
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use crate::rcc::{set_freqs, Clocks};
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use crate::time::{Hertz, U32Ext};
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use crate::time::Hertz;
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/// HSI speed
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pub const HSI_FREQ: Hertz = Hertz(16_000_000);
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@ -483,14 +483,14 @@ pub(crate) unsafe fn init(config: Config) {
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};
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set_freqs(Clocks {
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sys: sys_clk.hz(),
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ahb1: ahb_freq.hz(),
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ahb2: ahb_freq.hz(),
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ahb3: ahb_freq.hz(),
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apb1: apb1_freq.hz(),
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apb2: apb2_freq.hz(),
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apb3: apb3_freq.hz(),
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apb1_tim: apb1_tim_freq.hz(),
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apb2_tim: apb2_tim_freq.hz(),
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sys: Hertz(sys_clk),
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ahb1: Hertz(ahb_freq),
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ahb2: Hertz(ahb_freq),
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ahb3: Hertz(ahb_freq),
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apb1: Hertz(apb1_freq),
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apb2: Hertz(apb2_freq),
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apb3: Hertz(apb3_freq),
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apb1_tim: Hertz(apb1_tim_freq),
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apb2_tim: Hertz(apb2_tim_freq),
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});
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}
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@ -1,6 +1,6 @@
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use crate::pac::RCC;
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use crate::rcc::{set_freqs, Clocks};
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use crate::time::{Hertz, U32Ext};
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use crate::time::Hertz;
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/// Most of clock setup is copied from stm32l0xx-hal, and adopted to the generated PAC,
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/// and with the addition of the init function to configure a system clock.
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@ -157,13 +157,13 @@ pub(crate) unsafe fn init(config: Config) {
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};
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set_freqs(Clocks {
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sys: sys_clk.hz(),
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ahb1: ahb_freq.hz(),
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ahb2: ahb_freq.hz(),
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ahb3: ahb_freq.hz(),
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apb1: apb1_freq.hz(),
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apb2: apb2_freq.hz(),
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apb1_tim: apb1_tim_freq.hz(),
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apb2_tim: apb2_tim_freq.hz(),
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sys: Hertz(sys_clk),
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ahb1: Hertz(ahb_freq),
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ahb2: Hertz(ahb_freq),
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ahb3: Hertz(ahb_freq),
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apb1: Hertz(apb1_freq),
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apb2: Hertz(apb2_freq),
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apb1_tim: Hertz(apb1_tim_freq),
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apb2_tim: Hertz(apb2_tim_freq),
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});
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}
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@ -1,6 +1,6 @@
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use crate::pac::{FLASH, RCC};
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use crate::rcc::{set_freqs, Clocks};
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use crate::time::{Hertz, U32Ext};
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use crate::time::Hertz;
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/// Most of clock setup is copied from stm32l0xx-hal, and adopted to the generated PAC,
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/// and with the addition of the init function to configure a system clock.
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@ -320,14 +320,14 @@ pub(crate) unsafe fn init(config: Config) {
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while FLASH.acr().read().latency() != ws {}
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set_freqs(Clocks {
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sys: sys_clk.hz(),
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ahb1: ahb_freq.hz(),
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ahb2: ahb_freq.hz(),
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ahb3: shd_ahb_freq.hz(),
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apb1: apb1_freq.hz(),
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apb2: apb2_freq.hz(),
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apb3: apb3_freq.hz(),
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apb1_tim: apb1_tim_freq.hz(),
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apb2_tim: apb2_tim_freq.hz(),
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sys: Hertz(sys_clk),
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ahb1: Hertz(ahb_freq),
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ahb2: Hertz(ahb_freq),
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ahb3: Hertz(shd_ahb_freq),
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apb1: Hertz(apb1_freq),
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apb2: Hertz(apb2_freq),
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apb3: Hertz(apb3_freq),
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apb1_tim: Hertz(apb1_tim_freq),
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apb2_tim: Hertz(apb2_tim_freq),
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});
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}
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