Merge v1, v2 DAC and update register definitions
This commit is contained in:
parent
1924f2d67d
commit
5f01e56728
@ -1,8 +1,10 @@
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#![macro_use]
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use cfg_if::cfg_if;
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use embassy_hal_common::{into_ref, PeripheralRef};
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use embassy_hal_common::{into_ref, PeripheralRef};
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use crate::dac::{DacPin, Instance};
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use crate::pac::dac;
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use crate::pac::dac;
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use crate::Peripheral;
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use crate::{peripherals, Peripheral};
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#[derive(Debug, Copy, Clone, Eq, PartialEq)]
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#[derive(Debug, Copy, Clone, Eq, PartialEq)]
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#[cfg_attr(feature = "defmt", derive(defmt::Format))]
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#[cfg_attr(feature = "defmt", derive(defmt::Format))]
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@ -18,6 +20,15 @@ pub enum Channel {
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Ch2,
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Ch2,
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}
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}
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impl Channel {
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fn index(&self) -> usize {
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match self {
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Channel::Ch1 => 0,
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Channel::Ch2 => 1,
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}
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}
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}
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#[derive(Debug, Copy, Clone, Eq, PartialEq)]
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#[derive(Debug, Copy, Clone, Eq, PartialEq)]
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#[cfg_attr(feature = "defmt", derive(defmt::Format))]
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#[cfg_attr(feature = "defmt", derive(defmt::Format))]
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pub enum Ch1Trigger {
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pub enum Ch1Trigger {
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@ -119,27 +130,28 @@ impl<'d, T: Instance> Dac<'d, T> {
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// Sadly we cannot use `RccPeripheral::enable` since devices are quite inconsistent DAC clock
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// Sadly we cannot use `RccPeripheral::enable` since devices are quite inconsistent DAC clock
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// configuration.
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// configuration.
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critical_section::with(|_| {
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critical_section::with(|_| {
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#[cfg(rcc_h7)]
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cfg_if! {
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enable!(apb1lenr, set_dac12en, apb1lrstr, set_dac12rst);
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if #[cfg(rcc_f1)] {
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#[cfg(rcc_h7ab)]
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enable!(apb1enr, set_dacen, apb1rstr, set_dacrst);
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enable!(apb1lenr, set_dac1en, apb1lrstr, set_dac1rst);
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} else if #[cfg(rcc_h7)] {
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#[cfg(stm32g0)]
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enable!(apb1lenr, set_dac12en, apb1lrstr, set_dac12rst);
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enable!(apbenr1, set_dac1en, apbrstr1, set_dac1rst);
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} else if #[cfg(rcc_h7ab)] {
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#[cfg(any(stm32l4, stm32l5))]
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enable!(apb1lenr, set_dac1en, apb1lrstr, set_dac1rst);
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enable!(apb1enr1, set_dac1en, apb1rstr1, set_dac1rst);
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} else if #[cfg(stm32g0)] {
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enable!(apbenr1, set_dac1en, apbrstr1, set_dac1rst);
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} else if #[cfg(any(stm32l4, stm32l5))] {
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enable!(apb1enr1, set_dac1en, apb1rstr1, set_dac1rst);
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} else {
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unimplemented!("DAC enable/reset is not yet implemented for this chip");
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}
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}
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});
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});
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if channels >= 1 {
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T::regs().cr().modify(|reg| {
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T::regs().cr().modify(|reg| {
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for ch in 0..channels {
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reg.set_en1(true);
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reg.set_en(ch as usize, true);
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});
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}
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}
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});
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if channels >= 2 {
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T::regs().cr().modify(|reg| {
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reg.set_en2(true);
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});
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}
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}
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}
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Self { channels, _peri: peri }
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Self { channels, _peri: peri }
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@ -156,17 +168,10 @@ impl<'d, T: Instance> Dac<'d, T> {
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fn set_channel_enable(&mut self, ch: Channel, on: bool) -> Result<(), Error> {
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fn set_channel_enable(&mut self, ch: Channel, on: bool) -> Result<(), Error> {
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self.check_channel_exists(ch)?;
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self.check_channel_exists(ch)?;
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match ch {
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unsafe {
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Channel::Ch1 => unsafe {
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T::regs().cr().modify(|reg| {
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T::regs().cr().modify(|reg| {
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reg.set_en(ch.index(), on);
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reg.set_en1(on);
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})
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})
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},
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Channel::Ch2 => unsafe {
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T::regs().cr().modify(|reg| {
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reg.set_en2(on);
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});
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},
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}
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}
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Ok(())
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Ok(())
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}
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}
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@ -203,17 +208,10 @@ impl<'d, T: Instance> Dac<'d, T> {
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pub fn trigger(&mut self, ch: Channel) -> Result<(), Error> {
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pub fn trigger(&mut self, ch: Channel) -> Result<(), Error> {
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self.check_channel_exists(ch)?;
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self.check_channel_exists(ch)?;
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match ch {
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unsafe {
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Channel::Ch1 => unsafe {
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T::regs().swtrigr().write(|reg| {
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T::regs().swtrigr().write(|reg| {
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reg.set_swtrig(ch.index(), true);
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reg.set_swtrig1(true);
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});
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});
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},
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Channel::Ch2 => unsafe {
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T::regs().swtrigr().write(|reg| {
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reg.set_swtrig2(true);
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})
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},
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}
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}
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Ok(())
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Ok(())
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}
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}
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@ -221,38 +219,53 @@ impl<'d, T: Instance> Dac<'d, T> {
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pub fn trigger_all(&mut self) {
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pub fn trigger_all(&mut self) {
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unsafe {
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unsafe {
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T::regs().swtrigr().write(|reg| {
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T::regs().swtrigr().write(|reg| {
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reg.set_swtrig1(true);
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reg.set_swtrig(Channel::Ch1.index(), true);
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reg.set_swtrig2(true);
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reg.set_swtrig(Channel::Ch2.index(), true);
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})
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})
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}
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}
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}
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}
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pub fn set(&mut self, ch: Channel, value: Value) -> Result<(), Error> {
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pub fn set(&mut self, ch: Channel, value: Value) -> Result<(), Error> {
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self.check_channel_exists(ch)?;
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self.check_channel_exists(ch)?;
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match ch {
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match value {
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Channel::Ch1 => match value {
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Value::Bit8(v) => unsafe {
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Value::Bit8(v) => unsafe {
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T::regs().dhr8r(ch.index()).write(|reg| reg.set_dhr(v));
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T::regs().dhr8r1().write(|reg| reg.set_dacc1dhr(v));
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},
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Value::Bit12(v, Alignment::Left) => unsafe {
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T::regs().dhr12l1().write(|reg| reg.set_dacc1dhr(v));
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},
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Value::Bit12(v, Alignment::Right) => unsafe {
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T::regs().dhr12r1().write(|reg| reg.set_dacc1dhr(v));
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},
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},
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},
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Channel::Ch2 => match value {
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Value::Bit12(v, Alignment::Left) => unsafe {
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Value::Bit8(v) => unsafe {
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T::regs().dhr12l(ch.index()).write(|reg| reg.set_dhr(v));
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T::regs().dhr8r2().write(|reg| reg.set_dacc2dhr(v));
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},
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},
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Value::Bit12(v, Alignment::Right) => unsafe {
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Value::Bit12(v, Alignment::Left) => unsafe {
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T::regs().dhr12r(ch.index()).write(|reg| reg.set_dhr(v));
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T::regs().dhr12l2().write(|reg| reg.set_dacc2dhr(v));
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},
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Value::Bit12(v, Alignment::Right) => unsafe {
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T::regs().dhr12r2().write(|reg| reg.set_dacc2dhr(v));
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},
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},
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},
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}
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}
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Ok(())
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Ok(())
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}
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}
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}
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}
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pub(crate) mod sealed {
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pub trait Instance {
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fn regs() -> &'static crate::pac::dac::Dac;
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}
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}
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pub trait Instance: sealed::Instance + 'static {}
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pub trait DacPin<T: Instance, const C: u8>: crate::gpio::Pin + 'static {}
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foreach_peripheral!(
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(dac, $inst:ident) => {
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impl crate::dac::sealed::Instance for peripherals::$inst {
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fn regs() -> &'static crate::pac::dac::Dac {
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&crate::pac::$inst
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}
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}
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impl crate::dac::Instance for peripherals::$inst {}
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};
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);
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macro_rules! impl_dac_pin {
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($inst:ident, $pin:ident, $ch:expr) => {
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impl crate::dac::DacPin<peripherals::$inst, $ch> for crate::peripherals::$pin {}
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};
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}
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@ -1,36 +0,0 @@
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#![macro_use]
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#[cfg_attr(dac_v1, path = "v1.rs")]
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#[cfg_attr(dac_v2, path = "v2.rs")]
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mod _version;
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pub use _version::*;
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use crate::peripherals;
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pub(crate) mod sealed {
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pub trait Instance {
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fn regs() -> &'static crate::pac::dac::Dac;
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}
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}
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pub trait Instance: sealed::Instance + 'static {}
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pub trait DacPin<T: Instance, const C: u8>: crate::gpio::Pin + 'static {}
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foreach_peripheral!(
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(dac, $inst:ident) => {
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impl crate::dac::sealed::Instance for peripherals::$inst {
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fn regs() -> &'static crate::pac::dac::Dac {
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&crate::pac::$inst
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}
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}
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impl crate::dac::Instance for peripherals::$inst {}
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};
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);
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macro_rules! impl_dac_pin {
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($inst:ident, $pin:ident, $ch:expr) => {
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impl crate::dac::DacPin<peripherals::$inst, $ch> for crate::peripherals::$pin {}
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};
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}
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@ -1 +0,0 @@
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@ -6,7 +6,7 @@ version = "0.1.0"
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[dependencies]
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[dependencies]
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embassy-util = { version = "0.1.0", path = "../../embassy-util", features = ["defmt"] }
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embassy-util = { version = "0.1.0", path = "../../embassy-util", features = ["defmt"] }
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embassy-executor = { version = "0.1.0", path = "../../embassy-executor", features = ["defmt", "defmt-timestamp-uptime", "time-tick-32768hz"] }
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embassy-executor = { version = "0.1.0", path = "../../embassy-executor", features = ["defmt", "defmt-timestamp-uptime", "time-tick-32768hz"] }
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embassy-stm32 = { version = "0.1.0", path = "../../embassy-stm32", features = ["nightly", "defmt", "stm32f103c8", "unstable-pac", "memory-x", "time-driver-any"] }
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embassy-stm32 = { version = "0.1.0", path = "../../embassy-stm32", features = ["nightly", "defmt", "stm32f103rc", "unstable-pac", "memory-x", "time-driver-any"] }
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embassy-usb = { version = "0.1.0", path = "../../embassy-usb", features = ["defmt"] }
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embassy-usb = { version = "0.1.0", path = "../../embassy-usb", features = ["defmt"] }
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embassy-usb-serial = { version = "0.1.0", path = "../../embassy-usb-serial", features = ["defmt"] }
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embassy-usb-serial = { version = "0.1.0", path = "../../embassy-usb-serial", features = ["defmt"] }
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@ -20,6 +20,7 @@ panic-probe = { version = "0.3", features = ["print-defmt"] }
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futures = { version = "0.3.17", default-features = false, features = ["async-await"] }
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futures = { version = "0.3.17", default-features = false, features = ["async-await"] }
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heapless = { version = "0.7.5", default-features = false }
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heapless = { version = "0.7.5", default-features = false }
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nb = "1.0.0"
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nb = "1.0.0"
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micromath = "2.0.0"
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[profile.dev]
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[profile.dev]
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opt-level = "s"
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opt-level = "s"
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37
examples/stm32f1/src/bin/dac.rs
Normal file
37
examples/stm32f1/src/bin/dac.rs
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@ -0,0 +1,37 @@
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#![no_std]
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#![no_main]
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#![feature(type_alias_impl_trait)]
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use defmt::*;
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use embassy_executor::executor::Spawner;
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use embassy_stm32::dac::{Channel, Dac, Value};
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use embassy_stm32::Peripherals;
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use {defmt_rtt as _, panic_probe as _};
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#[embassy_executor::main]
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async fn main(_spawner: Spawner, p: Peripherals) -> ! {
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info!("Hello World, dude!");
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let mut dac = Dac::new_1ch(p.DAC, p.PA4);
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loop {
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for v in 0..=255 {
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unwrap!(dac.set(Channel::Ch1, Value::Bit8(to_sine_wave(v))));
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unwrap!(dac.trigger(Channel::Ch1));
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}
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}
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}
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use micromath::F32Ext;
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fn to_sine_wave(v: u8) -> u8 {
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if v >= 128 {
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// top half
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let r = 3.14 * ((v - 128) as f32 / 128.0);
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(r.sin() * 128.0 + 127.0) as u8
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} else {
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// bottom half
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let r = 3.14 + 3.14 * (v as f32 / 128.0);
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(r.sin() * 128.0 + 127.0) as u8
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}
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}
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@ -1 +1 @@
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Subproject commit b13ba26f6f9b7049097e39ccc7e5e246ac023d15
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Subproject commit ac5e65f02a48a443b160e08e8db4bbd7c7787ab4
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