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stm32/rcc: use PLL enums from PAC.

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This commit is contained in:
Dario Nieuwenhuis
2023-10-09 02:48:22 +02:00
parent c4cff0b79b
commit 6186fe0807
47 changed files with 599 additions and 1383 deletions
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6
examples/stm32f2/src/bin/pll.rs
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@ -7,7 +7,7 @@ use core::convert::TryFrom;
use defmt::*;
use embassy_executor::Spawner;
use embassy_stm32::rcc::{
APBPrescaler, ClockSrc, HSEConfig, HSESrc, PLL48Div, PLLConfig, PLLMainDiv, PLLMul, PLLPreDiv, PLLSrc,
APBPrescaler, ClockSrc, HSEConfig, HSESrc, PLLConfig, PLLMul, PLLPDiv, PLLPreDiv, PLLQDiv, PLLSrc,
};
use embassy_stm32::time::Hertz;
use embassy_stm32::Config;
@ -32,9 +32,9 @@ async fn main(_spawner: Spawner) {
// 1 MHz PLL input * 240 = 240 MHz PLL VCO
mul: unwrap!(PLLMul::try_from(240)),
// 240 MHz PLL VCO / 2 = 120 MHz main PLL output
main_div: PLLMainDiv::Div2,
p_div: PLLPDiv::DIV2,
// 240 MHz PLL VCO / 5 = 48 MHz PLL48 output
pll48_div: unwrap!(PLL48Div::try_from(5)),
q_div: PLLQDiv::DIV5,
};
// System clock comes from PLL (= the 120 MHz main PLL output)
config.rcc.mux = ClockSrc::PLL;

6
examples/stm32g4/src/bin/adc.rs
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@ -16,12 +16,12 @@ async fn main(_spawner: Spawner) {
config.rcc.pll = Some(Pll {
source: PllSrc::HSI16,
prediv_m: PllM::Div4,
mul_n: PllN::Mul85,
prediv_m: PllM::DIV4,
mul_n: PllN::MUL85,
div_p: None,
div_q: None,
// Main system clock at 170 MHz
div_r: Some(PllR::Div2),
div_r: Some(PllR::DIV2),
});
config.rcc.adc12_clock_source = AdcClockSource::SysClk;

6
examples/stm32g4/src/bin/pll.rs
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@ -15,12 +15,12 @@ async fn main(_spawner: Spawner) {
config.rcc.pll = Some(Pll {
source: PllSrc::HSI16,
prediv_m: PllM::Div4,
mul_n: PllN::Mul85,
prediv_m: PllM::DIV4,
mul_n: PllN::MUL85,
div_p: None,
div_q: None,
// Main system clock at 170 MHz
div_r: Some(PllR::Div2),
div_r: Some(PllR::DIV2),
});
config.rcc.mux = ClockSrc::PLL;

8
examples/stm32g4/src/bin/usb_serial.rs
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@ -25,16 +25,16 @@ async fn main(_spawner: Spawner) {
// Change this to `false` to use the HSE clock source for the USB. This example assumes an 8MHz HSE.
const USE_HSI48: bool = true;
let pllq_div = if USE_HSI48 { None } else { Some(PllQ::Div6) };
let pllq_div = if USE_HSI48 { None } else { Some(PllQ::DIV6) };
config.rcc.pll = Some(Pll {
source: PllSrc::HSE(Hertz(8_000_000)),
prediv_m: PllM::Div2,
mul_n: PllN::Mul72,
prediv_m: PllM::DIV2,
mul_n: PllN::MUL72,
div_p: None,
div_q: pllq_div,
// Main system clock at 144 MHz
div_r: Some(PllR::Div2),
div_r: Some(PllR::DIV2),
});
config.rcc.mux = ClockSrc::PLL;

12
examples/stm32h5/src/bin/eth.rs
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@ -9,7 +9,9 @@ use embassy_net::{Ipv4Address, Stack, StackResources};
use embassy_stm32::eth::generic_smi::GenericSMI;
use embassy_stm32::eth::{Ethernet, PacketQueue};
use embassy_stm32::peripherals::ETH;
use embassy_stm32::rcc::{AHBPrescaler, APBPrescaler, Hse, HseMode, Pll, PllSource, Sysclk, VoltageScale};
use embassy_stm32::rcc::{
AHBPrescaler, APBPrescaler, Hse, HseMode, Pll, PllDiv, PllMul, PllPreDiv, PllSource, Sysclk, VoltageScale,
};
use embassy_stm32::rng::Rng;
use embassy_stm32::time::Hertz;
use embassy_stm32::{bind_interrupts, eth, peripherals, rng, Config};
@ -42,10 +44,10 @@ async fn main(spawner: Spawner) -> ! {
});
config.rcc.pll1 = Some(Pll {
source: PllSource::Hse,
prediv: 2,
mul: 125,
divp: Some(2),
divq: Some(2),
prediv: PllPreDiv::DIV2,
mul: PllMul::MUL125,
divp: Some(PllDiv::DIV2),
divq: Some(PllDiv::DIV2),
divr: None,
});
config.rcc.ahb_pre = AHBPrescaler::DIV1;

10
examples/stm32h5/src/bin/usb_serial.rs
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@ -4,7 +4,9 @@
use defmt::{panic, *};
use embassy_executor::Spawner;
use embassy_stm32::rcc::{AHBPrescaler, APBPrescaler, Hse, HseMode, Pll, PllSource, Sysclk, VoltageScale};
use embassy_stm32::rcc::{
AHBPrescaler, APBPrescaler, Hse, HseMode, Pll, PllDiv, PllMul, PllPreDiv, PllSource, Sysclk, VoltageScale,
};
use embassy_stm32::time::Hertz;
use embassy_stm32::usb::{Driver, Instance};
use embassy_stm32::{bind_interrupts, pac, peripherals, usb, Config};
@ -29,9 +31,9 @@ async fn main(_spawner: Spawner) {
});
config.rcc.pll1 = Some(Pll {
source: PllSource::Hse,
prediv: 2,
mul: 125,
divp: Some(2), // 250mhz
prediv: PllPreDiv::DIV2,
mul: PllMul::MUL125,
divp: Some(PllDiv::DIV2), // 250mhz
divq: None,
divr: None,
});

14
examples/stm32h7/src/bin/adc.rs
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@ -18,16 +18,16 @@ async fn main(_spawner: Spawner) {
config.rcc.csi = true;
config.rcc.pll_src = PllSource::Hsi;
config.rcc.pll1 = Some(Pll {
prediv: 4,
mul: 50,
divp: Some(2),
divq: Some(8), // SPI1 cksel defaults to pll1_q
prediv: PllPreDiv::DIV4,
mul: PllMul::MUL50,
divp: Some(PllDiv::DIV2),
divq: Some(PllDiv::DIV8), // SPI1 cksel defaults to pll1_q
divr: None,
});
config.rcc.pll2 = Some(Pll {
prediv: 4,
mul: 50,
divp: Some(8), // 100mhz
prediv: PllPreDiv::DIV4,
mul: PllMul::MUL50,
divp: Some(PllDiv::DIV8), // 100mhz
divq: None,
divr: None,
});

8
examples/stm32h7/src/bin/camera.rs
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@ -32,10 +32,10 @@ async fn main(_spawner: Spawner) {
config.rcc.csi = true;
config.rcc.pll_src = PllSource::Hsi;
config.rcc.pll1 = Some(Pll {
prediv: 4,
mul: 50,
divp: Some(2),
divq: Some(8), // 100mhz
prediv: PllPreDiv::DIV4,
mul: PllMul::MUL50,
divp: Some(PllDiv::DIV2),
divq: Some(PllDiv::DIV8), // 100mhz
divr: None,
});
config.rcc.sys = Sysclk::Pll1P; // 400 Mhz

14
examples/stm32h7/src/bin/dac.rs
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@ -20,16 +20,16 @@ fn main() -> ! {
config.rcc.csi = true;
config.rcc.pll_src = PllSource::Hsi;
config.rcc.pll1 = Some(Pll {
prediv: 4,
mul: 50,
divp: Some(2),
divq: Some(8), // SPI1 cksel defaults to pll1_q
prediv: PllPreDiv::DIV4,
mul: PllMul::MUL50,
divp: Some(PllDiv::DIV2),
divq: Some(PllDiv::DIV8), // 100mhz
divr: None,
});
config.rcc.pll2 = Some(Pll {
prediv: 4,
mul: 50,
divp: Some(8), // 100mhz
prediv: PllPreDiv::DIV4,
mul: PllMul::MUL50,
divp: Some(PllDiv::DIV8), // 100mhz
divq: None,
divr: None,
});

14
examples/stm32h7/src/bin/dac_dma.rs
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@ -28,16 +28,16 @@ async fn main(spawner: Spawner) {
config.rcc.csi = true;
config.rcc.pll_src = PllSource::Hsi;
config.rcc.pll1 = Some(Pll {
prediv: 4,
mul: 50,
divp: Some(2),
divq: Some(8), // SPI1 cksel defaults to pll1_q
prediv: PllPreDiv::DIV4,
mul: PllMul::MUL50,
divp: Some(PllDiv::DIV2),
divq: Some(PllDiv::DIV8), // 100mhz
divr: None,
});
config.rcc.pll2 = Some(Pll {
prediv: 4,
mul: 50,
divp: Some(8), // 100mhz
prediv: PllPreDiv::DIV4,
mul: PllMul::MUL50,
divp: Some(PllDiv::DIV8), // 100mhz
divq: None,
divr: None,
});

6
examples/stm32h7/src/bin/eth.rs
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@ -39,9 +39,9 @@ async fn main(spawner: Spawner) -> ! {
config.rcc.hsi48 = true; // needed for RNG
config.rcc.pll_src = PllSource::Hsi;
config.rcc.pll1 = Some(Pll {
prediv: 4,
mul: 50,
divp: Some(2),
prediv: PllPreDiv::DIV4,
mul: PllMul::MUL50,
divp: Some(PllDiv::DIV2),
divq: None,
divr: None,
});

6
examples/stm32h7/src/bin/eth_client.rs
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@ -40,9 +40,9 @@ async fn main(spawner: Spawner) -> ! {
config.rcc.hsi48 = true; // needed for RNG
config.rcc.pll_src = PllSource::Hsi;
config.rcc.pll1 = Some(Pll {
prediv: 4,
mul: 50,
divp: Some(2),
prediv: PllPreDiv::DIV4,
mul: PllMul::MUL50,
divp: Some(PllDiv::DIV2),
divq: None,
divr: None,
});

8
examples/stm32h7/src/bin/fmc.rs
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@ -18,10 +18,10 @@ async fn main(_spawner: Spawner) {
config.rcc.csi = true;
config.rcc.pll_src = PllSource::Hsi;
config.rcc.pll1 = Some(Pll {
prediv: 4,
mul: 50,
divp: Some(2),
divq: Some(8), // 100mhz
prediv: PllPreDiv::DIV4,
mul: PllMul::MUL50,
divp: Some(PllDiv::DIV2),
divq: Some(PllDiv::DIV8), // 100mhz
divr: None,
});
config.rcc.sys = Sysclk::Pll1P; // 400 Mhz

8
examples/stm32h7/src/bin/low_level_timer_api.rs
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@ -22,10 +22,10 @@ async fn main(_spawner: Spawner) {
config.rcc.hsi48 = true; // needed for RNG
config.rcc.pll_src = PllSource::Hsi;
config.rcc.pll1 = Some(Pll {
prediv: 4,
mul: 50,
divp: Some(2),
divq: Some(8), // 100 Mhz
prediv: PllPreDiv::DIV4,
mul: PllMul::MUL50,
divp: Some(PllDiv::DIV2),
divq: Some(PllDiv::DIV8), // 100mhz
divr: None,
});
config.rcc.sys = Sysclk::Pll1P; // 400 Mhz

6
examples/stm32h7/src/bin/pwm.rs
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@ -21,9 +21,9 @@ async fn main(_spawner: Spawner) {
config.rcc.csi = true;
config.rcc.pll_src = PllSource::Hsi;
config.rcc.pll1 = Some(Pll {
prediv: 4,
mul: 50,
divp: Some(2),
prediv: PllPreDiv::DIV4,
mul: PllMul::MUL50,
divp: Some(PllDiv::DIV2),
divq: None,
divr: None,
});

8
examples/stm32h7/src/bin/sdmmc.rs
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@ -22,10 +22,10 @@ async fn main(_spawner: Spawner) -> ! {
config.rcc.csi = true;
config.rcc.pll_src = PllSource::Hsi;
config.rcc.pll1 = Some(Pll {
prediv: 4,
mul: 50,
divp: Some(2),
divq: Some(4), // default clock chosen by SDMMCSEL. 200 Mhz
prediv: PllPreDiv::DIV4,
mul: PllMul::MUL50,
divp: Some(PllDiv::DIV2),
divq: Some(PllDiv::DIV4), // default clock chosen by SDMMCSEL. 200 Mhz
divr: None,
});
config.rcc.sys = Sysclk::Pll1P; // 400 Mhz

8
examples/stm32h7/src/bin/spi.rs
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@ -44,10 +44,10 @@ fn main() -> ! {
config.rcc.csi = true;
config.rcc.pll_src = PllSource::Hsi;
config.rcc.pll1 = Some(Pll {
prediv: 4,
mul: 50,
divp: Some(2),
divq: Some(4), // used by SPI3. 100Mhz.
prediv: PllPreDiv::DIV4,
mul: PllMul::MUL50,
divp: Some(PllDiv::DIV2),
divq: Some(PllDiv::DIV8), // used by SPI3. 100Mhz.
divr: None,
});
config.rcc.sys = Sysclk::Pll1P; // 400 Mhz

8
examples/stm32h7/src/bin/spi_dma.rs
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@ -40,10 +40,10 @@ fn main() -> ! {
config.rcc.csi = true;
config.rcc.pll_src = PllSource::Hsi;
config.rcc.pll1 = Some(Pll {
prediv: 4,
mul: 50,
divp: Some(2),
divq: Some(4), // used by SPI3. 100Mhz.
prediv: PllPreDiv::DIV4,
mul: PllMul::MUL50,
divp: Some(PllDiv::DIV2),
divq: Some(PllDiv::DIV8), // used by SPI3. 100Mhz.
divr: None,
});
config.rcc.sys = Sysclk::Pll1P; // 400 Mhz

6
examples/stm32h7/src/bin/usb_serial.rs
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@ -28,9 +28,9 @@ async fn main(_spawner: Spawner) {
config.rcc.hsi48 = true; // needed for USB
config.rcc.pll_src = PllSource::Hsi;
config.rcc.pll1 = Some(Pll {
prediv: 4,
mul: 50,
divp: Some(2),
prediv: PllPreDiv::DIV4,
mul: PllMul::MUL50,
divp: Some(PllDiv::DIV2),
divq: None,
divr: None,
});

10
examples/stm32l4/src/bin/rng.rs
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@ -4,7 +4,7 @@
use defmt::*;
use embassy_executor::Spawner;
use embassy_stm32::rcc::{ClockSrc, PLLClkDiv, PLLMul, PLLSource, PLLSrcDiv};
use embassy_stm32::rcc::{ClockSrc, PLLSource, PllMul, PllPreDiv, PllQDiv, PllRDiv};
use embassy_stm32::rng::Rng;
use embassy_stm32::{bind_interrupts, peripherals, rng, Config};
use {defmt_rtt as _, panic_probe as _};
@ -19,10 +19,10 @@ async fn main(_spawner: Spawner) {
// 72Mhz clock (16 / 1 * 18 / 4)
config.rcc.mux = ClockSrc::PLL(
PLLSource::HSI16,
PLLClkDiv::Div4,
PLLSrcDiv::Div1,
PLLMul::Mul18,
Some(PLLClkDiv::Div6), // 48Mhz (16 / 1 * 18 / 6)
PllRDiv::DIV4,
PllPreDiv::DIV1,
PllMul::MUL18,
Some(PllQDiv::DIV6), // 48Mhz (16 / 1 * 18 / 6)
);
let p = embassy_stm32::init(config);

8
examples/stm32l4/src/bin/rtc.rs
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@ -5,7 +5,7 @@
use chrono::{NaiveDate, NaiveDateTime};
use defmt::*;
use embassy_executor::Spawner;
use embassy_stm32::rcc::{self, ClockSrc, PLLClkDiv, PLLMul, PLLSource, PLLSrcDiv};
use embassy_stm32::rcc::{self, ClockSrc, PLLSource, PllMul, PllPreDiv, PllRDiv};
use embassy_stm32::rtc::{Rtc, RtcConfig};
use embassy_stm32::time::Hertz;
use embassy_stm32::Config;
@ -18,9 +18,9 @@ async fn main(_spawner: Spawner) {
let mut config = Config::default();
config.rcc.mux = ClockSrc::PLL(
PLLSource::HSE(Hertz::mhz(8)),
PLLClkDiv::Div2,
PLLSrcDiv::Div1,
PLLMul::Mul20,
PllRDiv::DIV2,
PllPreDiv::DIV1,
PllMul::MUL20,
None,
);
config.rcc.lse = Some(Hertz(32_768));

8
examples/stm32l4/src/bin/spe_adin1110_http_server.rs
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@ -49,7 +49,7 @@ use embassy_net_adin1110::{self, Device, Runner, ADIN1110};
use embedded_hal_bus::spi::ExclusiveDevice;
use hal::gpio::Pull;
use hal::i2c::Config as I2C_Config;
use hal::rcc::{ClockSrc, PLLClkDiv, PLLMul, PLLSource, PLLSrcDiv};
use hal::rcc::{ClockSrc, PLLSource, PllMul, PllPreDiv, PllRDiv};
use hal::spi::{Config as SPI_Config, Spi};
use hal::time::Hertz;
@ -80,9 +80,9 @@ async fn main(spawner: Spawner) {
// 80MHz highest frequency for flash 0 wait.
config.rcc.mux = ClockSrc::PLL(
PLLSource::HSE(Hertz(8_000_000)),
PLLClkDiv::Div2,
PLLSrcDiv::Div1,
PLLMul::Mul20,
PllRDiv::DIV2,
PllPreDiv::DIV1,
PllMul::MUL20,
None,
);
config.rcc.hsi48 = true; // needed for rng

2
examples/stm32l4/src/bin/usb_serial.rs
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@ -23,7 +23,7 @@ async fn main(_spawner: Spawner) {
info!("Hello World!");
let mut config = Config::default();
config.rcc.mux = ClockSrc::PLL(PLLSource::HSI16, PLLClkDiv::Div2, PLLSrcDiv::Div1, PLLMul::Mul10, None);
config.rcc.mux = ClockSrc::PLL(PLLSource::HSI16, PllRDiv::DIV2, PllPreDiv::DIV1, PllMul::MUL10, None);
config.rcc.hsi48 = true;
let p = embassy_stm32::init(config);

10
examples/stm32l5/src/bin/rng.rs
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@ -4,7 +4,7 @@
use defmt::*;
use embassy_executor::Spawner;
use embassy_stm32::rcc::{ClockSrc, PLLClkDiv, PLLMul, PLLSource, PLLSrcDiv};
use embassy_stm32::rcc::{ClockSrc, PLLSource, PllMul, PllPreDiv, PllQDiv, PllRDiv};
use embassy_stm32::rng::Rng;
use embassy_stm32::{bind_interrupts, peripherals, rng, Config};
use {defmt_rtt as _, panic_probe as _};
@ -18,10 +18,10 @@ async fn main(_spawner: Spawner) {
let mut config = Config::default();
config.rcc.mux = ClockSrc::PLL(
PLLSource::HSI16,
PLLClkDiv::Div2,
PLLSrcDiv::Div1,
PLLMul::Mul8,
Some(PLLClkDiv::Div2),
PllRDiv::DIV2,
PllPreDiv::DIV1,
PllMul::MUL8,
Some(PllQDiv::DIV2),
);
let p = embassy_stm32::init(config);

2
examples/stm32l5/src/bin/usb_ethernet.rs
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@ -45,7 +45,7 @@ async fn net_task(stack: &'static Stack<Device<'static, MTU>>) -> ! {
#[embassy_executor::main]
async fn main(spawner: Spawner) {
let mut config = Config::default();
config.rcc.mux = ClockSrc::PLL(PLLSource::HSI16, PLLClkDiv::Div2, PLLSrcDiv::Div1, PLLMul::Mul10, None);
config.rcc.mux = ClockSrc::PLL(PLLSource::HSI16, PllRDiv::DIV2, PllPreDiv::DIV1, PllMul::MUL10, None);
config.rcc.hsi48 = true;
let p = embassy_stm32::init(config);

2
examples/stm32l5/src/bin/usb_hid_mouse.rs
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@ -22,7 +22,7 @@ bind_interrupts!(struct Irqs {
#[embassy_executor::main]
async fn main(_spawner: Spawner) {
let mut config = Config::default();
config.rcc.mux = ClockSrc::PLL(PLLSource::HSI16, PLLClkDiv::Div2, PLLSrcDiv::Div1, PLLMul::Mul10, None);
config.rcc.mux = ClockSrc::PLL(PLLSource::HSI16, PllRDiv::DIV2, PllPreDiv::DIV1, PllMul::MUL10, None);
config.rcc.hsi48 = true;
let p = embassy_stm32::init(config);

2
examples/stm32l5/src/bin/usb_serial.rs
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@ -20,7 +20,7 @@ bind_interrupts!(struct Irqs {
#[embassy_executor::main]
async fn main(_spawner: Spawner) {
let mut config = Config::default();
config.rcc.mux = ClockSrc::PLL(PLLSource::HSI16, PLLClkDiv::Div2, PLLSrcDiv::Div1, PLLMul::Mul10, None);
config.rcc.mux = ClockSrc::PLL(PLLSource::HSI16, PllRDiv::DIV2, PllPreDiv::DIV1, PllMul::MUL10, None);
config.rcc.hsi48 = true;
let p = embassy_stm32::init(config);

6
examples/stm32u5/src/bin/usb_serial.rs
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@ -25,9 +25,9 @@ async fn main(_spawner: Spawner) {
let mut config = Config::default();
config.rcc.mux = ClockSrc::PLL1R(PllConfig {
source: PllSrc::HSI16,
m: PllM::Div2,
n: PllN::Mul10,
r: PllClkDiv::NotDivided,
m: Pllm::DIV2,
n: Plln::MUL10,
r: Plldiv::DIV1,
});
//config.rcc.mux = ClockSrc::MSI(MSIRange::Range48mhz);
config.rcc.hsi48 = true;